9f125 Compal LA-9535P PDF

A B C D E
Compal Confidential
Model Name : EA/EG50_CX (Z5WE1)
File Name : LA-9535P
1 1
Compal Confidential
2 2
EA/EG50_CX (Z5WE1) M/B Schematics Document

Intel Ivy Bridge ULV Processor + Panther Point PCH
Nvidia N14M-GE & N14P-GV2
2013-06-07
3 3
REV:1.0
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

2013/02/04 EOP Title
Issued Date Deciphered Date Cover Page
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-9535P M/B Schematics
Date: Friday, June 07, 2013 Sheet 1 of 55
A B C D E
A B C D E
Fan Control
page 40
1
204pin DDR3-SO-DIMM X1 1
BANK 0, 1, 2, 3 page 11
Nvidia N14P series Intel Memory BUS
with DDR3 x 4
page 22~28 Ivy Bridge Dual Channel
ULV Processor 1.5V DDR3 1333/1600 204pin DDR3-SO-DIMM X1

BANK 4, 5, 6, 7 page 12
eDP
eDP Conn. BGA1023
page 29
page 4~10
CRT Conn. HDMI Conn. LVDS
page 31 page 30 FDI x8 DMI x4
CLK=100MHz CLK=100MHz
HDMI x 4 lanes
2.7GT/s 2.5GB/s x4 Touch USB 3.0 USB 2.0 CMOS
2.97GT/s
2 Screen conn x1 conn x2 Camera 2
USB port 3 USB port 0 USB/B (port 1,2) USB port 10

Intel page 29 page 36 page 36 page 29
PCIE 48MHz
Panther Point-M USBx8
PCIe 2.0 PCIe 2.0
5GT/s 5GT/s PCH
SATA HD Audio 3.3V 24MHz
port 1 port 2
989pin BGA
page 13~21 SPI
SATA3.0 SATA3.0 HDA Codec
LAN(GbE) MINI Card 6.0 Gb/s 6.0 Gb/s ALC3225
Boardcom WLAN port 0 port 2 page 39
57786Xpage 32~33
USB port 8 page 34
SATA HDD SATA CDROM
3 Conn. Conn. LPC BUS 3
page 35 page 35 SPI ROM x1 Int. Speaker Int. MIC Combo Jack
CLK=24MHz
Card Reader
2 in 1 page 13
ENE page 39 page 39 page 39
(SD/MMC)
page 32~33 KB9012
page 37
RTC CKT. Sub Board

page 13
Touch Pad Int.KBD
LS-9531P page 38 page 38
Power On/Off CKT. PWR/B

page 36
page 38
LS-9532P
4
DC/DC Interface CKT. USB/B (port 1,2)
4
page 41 page 36

Power Circuit DC/DC Issued Date Deciphered Date Block Diagrams
page 42~52 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A B C D E
A B C D E
SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Voltage Rails Full ON HIGH HIGH HIGH HIGH ON ON ON ON
Power Plane Description S1 S3 S5 S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
VIN Adapter power supply (19V) N/A N/A N/A
S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
BATT+ Battery power supply (12.6V) N/A N/A N/A
B+ AC or battery power rail for power circuit. N/A N/A N/A S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
1 +CPU_CORE Core voltage for CPU ON OFF OFF 1
S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+VGA_CORE Core voltage for GPU ON OFF OFF
+0.75VS +0.675VSP to +0.675VS switched power rail for DDR terminator ON OFF OFF Board ID / SKU ID Table for AD channel
+1.05VSDGPU +1.0VSDGPU switched power rail for GPU ON OFF OFF Vcc 3.3V +/- 5%
+0.95VSDGPU +0.95VSDGPUP to +0.95VSDGPU switched power rail for CPU ON OFF OFF Ra/Rc/Re 100K +/- 5%
+1.5V +1.35VP to +1.35V power rail for DDRIIIL ON ON OFF Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
+1.5VS +1.5V to +1.5VS switched power rail ON OFF OFF 0 0 0 V 0 V 0 V BTO Option Table
+1.5VSDGPU +1.5VSDGPUP to +1.5VSDGPU switched power rail for GPU ON OFF OFF 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V BTO Item BOM Structure
+1.8VS +3VS to 1.8V switched power rail to CPU ON OFF OFF 2 18K +/- 5% 0.436 V 0.503 V 0.538 V Unpop @
+1.8VSDGPU +1.8VS to +1.8VSDGPU switched power rail for GPU ON OFF OFF 3 33K +/- 5% 0.712 V 0.819 V 0.875 V Connector CONN@
+3VALW +3VALW always on power rail ON ON ON* 4 56K +/- 5% 1.036 V 1.185 V 1.264 V PCH RTC CMOS SP@
+3VLP B+ to +3VLP power rail for suspend power ON ON ON 5 100K +/- 5% 1.453 V 1.650 V 1.759 V TEST PAD TP@
+3VS +3VALW to +3VS power rail ON OFF OFF 6 200K +/- 5% 1.935 V 2.200 V 2.341 V Unpop SPI2 SPI2@
+3VSDGPU +3VS to +3VSDGPU switched power rail for GPU ON OFF OFF 7 NC 2.500 V 3.300 V 3.300 V Unpop CPU CPU@
+5VALW +5VALWP to +5VALW power rail ON ON ON* Unpop GPU GPU@
+5VS +5VALW to +5VS switched power rail ON OFF OFF BOARD ID Table
+VSB +VSBP to +VSB always on power rail for sequence control ON ON ON* Unpop VRAM VRAM@
2
+RTCVCC RTC power ON ON ON
Board ID PCB Revision 2
0 0.1
Back light BL@
1 0.2
IOAC IOAC@
2 0.3
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
3 1.0 Celeron 847 847@
4
Celeron 1007 1007@
EC SM Bus1 address EC SM Bus2 address 5
I3-3227M I33227@
6
I5-3337M I53337@
Device Address Device Address 7
I7-3537M I73537@
Smart Battery 0001 011X
USB Port Table UMA ONLY GPIO UMAO@
VGA Internal Thermal Senser 1001 111x (0x9E)
3 External EDP EDP@
USB 2.0 Port
USB Port LVDS LVDS@
PCH SM Bus address 0 USB Port(Left 3.0)
Device Address
1 USB Port(Right 2.0)
ChannelA DIMM0 1001 000x JDIMM1
2 USB Port(Right 2.0)
ChannelB DIMM1 1001 010x JDIMM2
3 Touch Screen EMC POP EMC@
EHCI1
3
4 EMC NON POP XEMC@ 3
5
6 N14M-GE option N14MGE@
7 N14P-GT option N14PGT@
N14P-GV2 option N14PGV2@
USB 2.0 Port N14P-GT/GV2 Strap GV2GT@
VGA SKU VGA@
8 Mini Card (WLAN+BT)
VRAM x 8pcs 128@
9
PEG 16X 16X@
10 Camera
PEG 8X 8X@
11
EHCI2 GC6 GC6@
12
NON GC6 NGC6@
13
USB 3.0 Port
0 USB Port(Left 3.0)
BOM Config
1
UMAO: EDP@/IOAC@/BL@/EMC@/UMAO@/ CPU config XHCI
2
4
DIS GV2: EDP@/IOAC@/BL@/EMC@/VGA@/ GC6@/N14PGV2@/GV2GT@/8X@/ CPU config + X76 3 4
DIS GE: EDP@/IOAC@/BL@/EMC@/VGA@/ GC6@/N14MGE@/8X@/ CPU config + X76

Issued Date Deciphered Date Notes List
A B C D E
A B C D E
ZZZ
Part Number Description REV0 DA6000ZK000
DAZ10O00100 PCB Z5WE1 LA-9535P LS-9531P/LS-9532P REV1 DA6000ZK010
LA9535_PCB
UCPU1
S IC AV8063801119500 SR0XF L1 1.9G ABO!
I33227@ SA00006D990
1. PEG_RCOMPO and PEG_ICOMPI should be connected together with 4-mil width first. Then be connected to R1 from ball of PEG_ICOMPI.
AV8063801119500 SR0XF L1 1.9G ABO!
2. PEG_ICOMPO should be connected to R1 with width 12-mil.
UCPU1 3. No longer than 500-mil to above two.
1 1
S IC AV8063801129900 SR0XL L1 1.8G ABO!
I53337@ SA00006D860
+1.05VS_VTT
AV8063801129900 SR0XL L1 1.8G ABO! PEG_GTX_HRX_P[0..15]
PEG_GTX_HRX_P[0..15] 22
1
UCPU1 PEG_GTX_HRX_N[0..15]
PEG_GTX_HRX_N[0..15] 22
S IC AV8063801119700 SR0XG L1 2G ABO! R1
PEG_HTX_C_GRX_P[0..15]
PEG_HTX_C_GRX_P[0..15] 22
I73537@ SA00006DB90 24.9_0402_1%
UCPU1A PEG_HTX_C_GRX_N[0..15]
2
G3 PEG_HTX_C_GRX_N[0..15] 22
PEG_COMP
AV8063801119700 SR0XG L1 2G ABO! PEG_ICOMPI G1
M2 PEG_ICOMPO G4
15 DMI_CRX_PTX_N0 DMI_RX#[0] PEG_RCOMPO
UCPU1 P6
15 DMI_CRX_PTX_N1 DMI_RX#[1]
S IC AV8062700852800 SR08N Q0 1.1G ABO! P1
15 DMI_CRX_PTX_N2 DMI_RX#[2]
P10 H22
15 DMI_CRX_PTX_N3 DMI_RX#[3] PEG_RX#[0]
847@ SA00005VK20 J21
N3 PEG_RX#[1] B22
15 DMI_CRX_PTX_P0 DMI_RX[0] PEG_RX#[2]
P7 D21
DMI
AV8062700852800 SR08N Q0 1.1G ABO! P3 A19
P11 D17
UCPU1 B14
K1 PEG_RX#[6] D13
S IC AV8063801118700 SR109 P0 1.5G ABO! 15 DMI_CTX_PRX_N0 DMI_TX#[0] PEG_RX#[7]
M8 A11 PEG_GTX_C_HRX_N7 C1 1 2 8X@ 0.22U_0402_6.3V6K PEG_GTX_HRX_N7
15 DMI_CTX_PRX_N1 N4 DMI_TX#[1] PEG_RX#[8] B10 1 2
1007@ SA00006EW30 PEG_GTX_C_HRX_N6 C2 8X@ 0.22U_0402_6.3V6K PEG_GTX_HRX_N6
15 DMI_CTX_PRX_N2 DMI_TX#[2] PEG_RX#[9]
R2 G8 PEG_GTX_C_HRX_N5 C3 1 2 8X@ 0.22U_0402_6.3V6K PEG_GTX_HRX_N5
15 DMI_CTX_PRX_N3 DMI_TX#[3] PEG_RX#[10] A8 PEG_GTX_C_HRX_N4 C4 1 2 8X@ 0.22U_0402_6.3V6K PEG_GTX_HRX_N4
AV8063801118700 SR109 P0 1.5G ABO! IVY BRIDGE K3 PEG_RX#[11] B6 PEG_GTX_C_HRX_N3 C5 1 2 8X@ 0.22U_0402_6.3V6K PEG_GTX_HRX_N3
15 DMI_CTX_PRX_P0 M7 DMI_TX[0] PEG_RX#[12] H8 PEG_GTX_C_HRX_N2 1 2 PEG_GTX_HRX_N2
C6 8X@ 0.22U_0402_6.3V6K
15 DMI_CTX_PRX_P1 P4 DMI_TX[1] PEG_RX#[13] E5 1 2
PEG_GTX_C_HRX_N1 C7 8X@ 0.22U_0402_6.3V6K PEG_GTX_HRX_N1
15 DMI_CTX_PRX_P2 T3 DMI_TX[2] PEG_RX#[14] K7 1 2
UCPU1 PEG_GTX_C_HRX_N0 C8 8X@ 0.22U_0402_6.3V6K PEG_GTX_HRX_N0
2 15 DMI_CTX_PRX_P3 DMI_TX[3] PEG_RX#[15] 2
S IC AV8063801130300 SR10A P0 1.6G ABO!
K22
1017@ PEG_RX[0] K19
SA00006UH50 PEG_RX[1] C21
U7 PEG_RX[2] D19
15 FDI_CTX_PRX_N0 W11 FDI0_TX#[0] PEG_RX[3] C19
AV8063801130300 SR10A P0 1.6G ABO!
15 FDI_CTX_PRX_N1 W1 FDI0_TX#[1] PEG_RX[4] D16
15 FDI_CTX_PRX_N2 AA6 FDI0_TX#[2] PEG_RX[5] C13
UCPU1
15 FDI_CTX_PRX_N3 FDI0_TX#[3] PEG_RX[6]
S IC AV8063801058800 SR0VQ P0 1.8G ABO! W6 D12
15 FDI_CTX_PRX_N4 V4 FDI1_TX#[0] PEG_RX[7] C11 1 2
PEG_GTX_C_HRX_P7 C9 8X@ 0.22U_0402_6.3V6K PEG_GTX_HRX_P7
PCI EXPRESS -- GRAPHICS

15 FDI_CTX_PRX_N5 Y2 FDI1_TX#[1] PEG_RX[8] C9 1 2
2117@ SA000061240 PEG_GTX_C_HRX_P6 C10 8X@ 0.22U_0402_6.3V6K PEG_GTX_HRX_P6
15 FDI_CTX_PRX_N6 AC9 FDI1_TX#[2] PEG_RX[9] F8 1 2
PEG_GTX_C_HRX_P5 C11 8X@ 0.22U_0402_6.3V6K PEG_GTX_HRX_P5
15 FDI_CTX_PRX_N7 FDI1_TX#[3] PEG_RX[10]
Intel(R) FDI
C8 PEG_GTX_C_HRX_P4 C12 1 2 8X@ 0.22U_0402_6.3V6K PEG_GTX_HRX_P4
AV8063801058800 SR0VQ P0 1.8G ABO! PEG_RX[11] C5 PEG_GTX_C_HRX_P3 C13 1 2 8X@ 0.22U_0402_6.3V6K PEG_GTX_HRX_P3
U6 PEG_RX[12] H6 PEG_GTX_C_HRX_P2 C14 1 2 8X@ 0.22U_0402_6.3V6K PEG_GTX_HRX_P2
15 FDI_CTX_PRX_P0 FDI0_TX[0] PEG_RX[13]
UCPU1 W10 F6 PEG_GTX_C_HRX_P1 C15 1 2 8X@ 0.22U_0402_6.3V6K PEG_GTX_HRX_P1
15 FDI_CTX_PRX_P1 W3 FDI0_TX[1] PEG_RX[14] K6 1 2
S IC AV8063801119100 SR105 P0 1.9G ABO! PEG_GTX_C_HRX_P0 C16 8X@ 0.22U_0402_6.3V6K PEG_GTX_HRX_P0
15 FDI_CTX_PRX_P2 AA7 FDI0_TX[2] PEG_RX[15]
15 FDI_CTX_PRX_P3 W7 FDI0_TX[3] G22
2127@ SA00006UG30 15 FDI_CTX_PRX_P4 T4 FDI1_TX[0] PEG_TX#[0] C23
15 FDI_CTX_PRX_P5 AA3 FDI1_TX[1] PEG_TX#[1] D23
15 FDI_CTX_PRX_P6 FDI1_TX[2] PEG_TX#[2]
AV8063801119100 SR105 P0 1.9G ABO! AC8 F21
15 FDI_CTX_PRX_P7 FDI1_TX[3] PEG_TX#[3] H19
UCPU1 AA11 PEG_TX#[4] C17
15 FDI_FSYNC0 FDI0_FSYNC PEG_TX#[5]
S IC AV8063801058401 SR0N9 L1 1.8G ABO! AC12 K15
+1.05VS_VTT 15 FDI_FSYNC1 FDI1_FSYNC PEG_TX#[6] F17
I33217@ U11 PEG_TX#[7] F14 PEG_HTX_GRX_N7 C17 1 2 8X@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_N7
SA00005L5C0 15 FDI_INT FDI_INT PEG_TX#[8] A15 PEG_HTX_GRX_N6 C18 1 2 8X@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_N6
AA10 PEG_TX#[9] J14 PEG_HTX_GRX_N5 C19 1 2 8X@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_N5
15 FDI_LSYNC0
1
AV8063801058401 SR0N9 L1 1.8G ABO! AG8 FDI0_LSYNC PEG_TX#[10] H13 PEG_HTX_GRX_N4 C20 1 2 8X@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_N4
15 FDI_LSYNC1 FDI1_LSYNC PEG_TX#[11]
R66 M10 PEG_HTX_GRX_N3 C21 1 2 8X@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_N3
R2 PEG_TX#[12] F10 PEG_HTX_GRX_N2 C22 1 2 8X@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_N2
1K_0402_5%
U1010 EDP@ PEG_TX#[13] D9 PEG_HTX_GRX_N1 C23 1 2 8X@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_N1
24.9_0402_1% PEG_TX#[14] J4 PEG_HTX_GRX_N0 C24 1 2 8X@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_N0
3 S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO! 3
2
EDP_COMP AF3 PEG_TX#[15]

HM77@ AD2 eDP_COMPIO F22
SA00005AGI0 eDP_ICOMPO PEG_TX[0]
CPU_EDP_HPD# AG11 A23
29 CPU_EDP_HPD# eDP_HPD# PEG_TX[1] D24
BD82HM77 SLJ8C C1 BGA 989P PCH ABO! PEG_TX[2] E21
EDP_AUXN AG4 PEG_TX[3] G19
29 EDP_AUXN eDP_AUX# PEG_TX[4]
U1010 EDP_AUXP AF4 B18
29 EDP_AUXP eDP_AUX PEG_TX[5]
S IC BD82HM70 SJTNV C1 BGA 989P PCH ABO ! K17
PEG_TX[6]
eDP
G17
HM70@ EDP_TXN0 AC3 PEG_TX[7] E14 PEG_HTX_GRX_P7 C25 1 2 8X@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_P7
SA00005MQ60 29 EDP_TXN0 eDP_TX#[0] PEG_TX[8]
EDP_TXN1 AC4 C15 PEG_HTX_GRX_P6 C31 1 2 8X@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_P6
29 EDP_TXN1 AE11 eDP_TX#[1] PEG_TX[9] K13 PEG_HTX_GRX_P5 C27 1 2 8X@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_P5
BD82HM70 SJTNV C1 BGA 989P PCH ABO ! AE7 eDP_TX#[2] PEG_TX[10] G13 PEG_HTX_GRX_P4 C28 1 2 8X@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_P4
eDP_TX#[3] PEG_TX[11] K10 PEG_HTX_GRX_P3 C29 1 2 8X@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_P3
U1010 EDP_TXP0 AC1 PEG_TX[12] G10 PEG_HTX_GRX_P2 C30 1 2 8X@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_P2
29 EDP_TXP0 AA4 eDP_TX[0] PEG_TX[13] D8 1 2
S IC BD82NM70 SLJTA C1 BGA 989P PCH ABO! EDP_TXP1 PEG_HTX_GRX_P1 C33 8X@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_P1
29 EDP_TXP1 AE10 eDP_TX[1] PEG_TX[14] K4 PEG_HTX_GRX_P0 1 2 PEG_HTX_C_GRX_P0
C32 8X@ 0.22U_0402_6.3V6K
NM70@ AE6 eDP_TX[2] PEG_TX[15]
SA00005WU20 eDP_TX[3]
BD82NM70 SLJTA C1 BGA 989P PCH ABO! IVY-BRIDGE_BGA1023

PCH CPU@
eDP_COMPIO and eDP_ICOMPO should be connected to R247 respectively.
eDP_COMPIO
Trace Width to R2= 4-mil
4 Trace Spacing to Other Signals= 15-mil 4
Max. Routing Length= 500-mil

eDP_ICOMPO
Trace Width to R2= 12-mil
Trace Spacing to Other Signals= 15-mil
Routing Length= 500-mil Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date Deciphered Date PROCESSOR(1/7) DMI,FDI,PEG
A B C D E
A B C D E
UCPU1B
1 1
For 2nd Generation IntelR Core processor family mobile, the output will be high. J3
For Mobile 3rd Generation IntelR Core processor family, the output will be low. BCLK H2 CLK_CPU_DMI 14
BCLK# CLK_CPU_DMI# 14
MISC
For LVDS
CLOCKS
F49
17 H_SNB_IVB# PROC_SELECT# AG3 DPLL_REF_CLK DPLL_REF_CLK R517 2 LVDS@ 1 1K_0402_5%
DPLL_REF_CLK AG1 DPLL_REF_CLK# DPLL_REF_CLK 14 2 LVDS@ 1 1K_0402_5%
DPLL_REF_CLK# R518 +1.05VS_VTT
C57 DPLL_REF_CLK# DPLL_REF_CLK# 14
PROC_DETECT#
If use External Graphic or
use integrated without eDP
DPLL_REF_SSCLK PD 1K_5% to GND
TP@ T2 PAD H_CATERR# C49 DPLL_REF_SSCLK# PH 1K_5% to +1.05VS_VTT
CATERR#
THERMAL
H_PECI A48 AT30 SM_DRAMRST#
37 H_PECI PECI SM_DRAMRST# SM_DRAMRST# 6 Width Spacing Length
R5 2 1 62_0402_5% R7
+1.05VS_VTT
56_0402_5% BF44 SM_RCOMP0 R6 2 1 140_0402_1%
SM_RCOMP0 20-mil 20-mil < 500-mil
DDR3
MISC
H_PROCHOT# 1 2 H_PROCHOT#_R C45 SM_RCOMP[0] BE43 SM_RCOMP1 R8 2 1 25.5_0402_1%
37,49 H_PROCHOT# PROCHOT# SM_RCOMP[1] BG43 SM_RCOMP2 R9 2 1 200_0402_1%
SM_RCOMP[2]
D45
18 H_THRMTRIP# THERMTRIP#
N53
THERMALTRIP# will be asserted when CPU junction PRDY# N55
temperature exceeds approximately 130 °C PREQ# +3VS
L56 XDP_TCK PAD T7 TP@
TCK L55 XDP_TMS PAD T3 TP@
TMS
PWR MANAGEMENT
J58 XDP_TRST# PAD T4 TP@
1
2 TRST# 2
C state information
JTAG & BPM

C48 M60 XDP_TDI PAD T5 TP@ R10
care should be taken to no stub caused by R11 by this resistor 15 H_PM_SYNC PM_SYNC TDI L59 XDP_TDO PAD T6 TP@ 1K_0402_5%
R11 2 1 10K_0402_5% TDO
2
H_CPUPWRGD B46
18 H_CPUPWRGD UNCOREPWRGOOD K58 XDP_DBRESET#
DBR# XDP_DBRESET# 15
Daisy chain
PM_DRAM_PWRGD_R BE45 G58 1
SM_DRAMPWROK BPM#[0] E55 C37 XEMC@
BPM#[1] E59
BPM#[2] G55 0.1U_0402_16V7K
BPM#[3] G59 2
BUF_CPU_RST# D44 BPM#[4] H60
Reserved for ESD
RESERVED for ESD RESET# BPM#[5] J59
BPM#[6] J61
H_CPUPWRGD H_PROCHOT# H_PECI BPM#[7]
1 1 1
C34 XEMC@ C65 XEMC@ C68 XEMC@
0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K IVY-BRIDGE_BGA1023
2 2 2 CPU@
3 3
+3VALW
SM_DRAMPWROK Buffered Reset to CPU +3VS
+1.5VS
+1.05VS_VTT
1
R13
1
200_0402_5%
R14
75_0402_5%
2
5
U1
5
1 U4 R17
G VCC
15 SYS_PWROK
2
B 4 PM_SYS_PWRGD_BUF 1 2 PM_DRAM_PWRGD_R 1 43_0402_1%
P
2 Y R15 130_0402_5% NC 4 BUFO_CPU_RST# 1 2 BUF_CPU_RST#
15 PM_DRAM_PWRGD A Y
PLT_RST# 2
17,37 PLT_RST# A
G
MC74VHC1G09DFT2G_SC70-5
3
SN74LVC1G07DCKR_SC70-5
3
4 4

Issued Date Deciphered Date PROCESSOR(2/7) PWR MANAGMENT
A B C D E
A B C D E
UCPU1C UCPU1D
11 DDR_A_D[0..63] 12 DDR_B_D[0..63]
DDR_A_D0 AG6 DDR_B_D0 AL4
1 SA_DQ[0] SB_DQ[0] 1
DDR_A_D1 AJ6 AU36 DDR_B_D1 AL1 BA34
SA_DQ[1] SA_CK[0] SA_CLK_DDR0 11 SB_DQ[1] SB_CK[0] SB_CLK_DDR0 12
DDR_A_D2 AP11 AV36 DDR_B_D2 AN3 AY34
DDR_A_D3 AL6 SA_DQ[2] SA_CK#[0] AY26 SA_CLK_DDR#0 11 DDR_B_D3 AR4 SB_DQ[2] SB_CK#[0] AR22 SB_CLK_DDR#0 12
DDR_A_D4 AJ10 SA_DQ[3] SA_CKE[0] DDRA_CKE0_DIMMA 11 DDR_B_D4 AK4 SB_DQ[3] SB_CKE[0] DDRB_CKE0_DIMMB 12
DDR_A_D5 AJ8 SA_DQ[4] DDR_B_D5 AK3 SB_DQ[4]
DDR_A_D6 AL8 SA_DQ[5] DDR_B_D6 AN4 SB_DQ[5]
DDR_A_D7 AL7 SA_DQ[6] DDR_B_D7 AR1 SB_DQ[6]
DDR_A_D8 AR11 SA_DQ[7] DDR_B_D8 AU4 SB_DQ[7]
DDR_A_D9 AP6 SA_DQ[8] AT40 DDR_B_D9 AT2 SB_DQ[8] BA36
AU6 SA_DQ[9] SA_CK[1] AU40 SA_CLK_DDR1 11 AV4 SB_DQ[9] SB_CK[1] BB36 SB_CLK_DDR1 12
DDR_A_D10 DDR_B_D10
AV9 SA_DQ[10] SA_CK#[1] BB26 SA_CLK_DDR#1 11 BA4 SB_DQ[10] SB_CK#[1] BF27 SB_CLK_DDR#1 12
DDR_A_D11 DDR_B_D11
AR6 SA_DQ[11] SA_CKE[1] DDRA_CKE1_DIMMA 11 AU3 SB_DQ[11] SB_CKE[1] DDRB_CKE1_DIMMB 12
DDR_A_D12 DDR_B_D12
DDR_A_D13 AP8 SA_DQ[12] DDR_B_D13 AR3 SB_DQ[12]
DDR_A_D14 AT13 SA_DQ[13] DDR_B_D14 AY2 SB_DQ[13]
DDR_A_D15 AU13 SA_DQ[14] DDR_B_D15 BA3 SB_DQ[14]
DDR_A_D16 BC7 SA_DQ[15] DDR_B_D16 BE9 SB_DQ[15]
DDR_A_D17 BB7 SA_DQ[16] BB40 DDR_B_D17 BD9 SB_DQ[16] BE41
BA13 SA_DQ[17] SA_CS#[0] BC41 DDRA_CS0_DIMMA# 11 BD13 SB_DQ[17] SB_CS#[0] BE47 DDRB_CS0_DIMMB# 12
DDR_A_D18 DDR_B_D18
SA_DQ[18] SA_CS#[1] DDRA_CS1_DIMMA# 11 SB_DQ[18] SB_CS#[1] DDRB_CS1_DIMMB# 12
DDR_A_D19 BB11 DDR_B_D19 BF12
DDR_A_D20 BA7 SA_DQ[19] DDR_B_D20 BF8 SB_DQ[19]
DDR_A_D21 BA9 SA_DQ[20] DDR_B_D21 BD10 SB_DQ[20]
DDR_A_D22 BB9 SA_DQ[21] DDR_B_D22 BD14 SB_DQ[21]
DDR_A_D23 AY13 SA_DQ[22] DDR_B_D23 BE13 SB_DQ[22]
DDR_A_D24 AV14 SA_DQ[23] AY40 DDR_B_D24 BF16 SB_DQ[23] AT43
AR14 SA_DQ[24] SA_ODT[0] BA41 SA_ODT0 11 BE17 SB_DQ[24] SB_ODT[0] BG47 SB_ODT0 12
DDR_A_D25 DDR_B_D25
AY17 SA_DQ[25] SA_ODT[1] SA_ODT1 11 BE18 SB_DQ[25] SB_ODT[1] SB_ODT1 12
DDR_A_D26 DDR_B_D26
DDR_A_D27 AR19 SA_DQ[26] DDR_B_D27 BE21 SB_DQ[26]
DDR_A_D28 BA14 SA_DQ[27] DDR_B_D28 BE14 SB_DQ[27]
DDR_A_D29 AU14 SA_DQ[28] DDR_B_D29 BG14 SB_DQ[28]
DDR_A_D30 BB14 SA_DQ[29] DDR_B_D30 BG18 SB_DQ[29]
DDR_A_D31 BB17 SA_DQ[30] AL11 DDR_A_DQS#0 DDR_A_DQS#[0..7] 11 DDR_B_D31 BF19 SB_DQ[30] AL3 DDR_B_DQS#0 DDR_B_DQS#[0..7] 12
DDR_A_D32 BA45 SA_DQ[31] SA_DQS#[0] AR8 DDR_A_DQS#1 DDR_B_D32 BD50 SB_DQ[31] SB_DQS#[0] AV3 DDR_B_DQS#1
DDR_A_D33 AR43 SA_DQ[32] SA_DQS#[1] AV11 DDR_A_DQS#2 DDR_B_D33 BF48 SB_DQ[32] SB_DQS#[1] BG11 DDR_B_DQS#2
2 DDR_A_D34 AW48 SA_DQ[33] SA_DQS#[2] AT17 DDR_A_DQS#3 DDR_B_D34 BD53 SB_DQ[33] SB_DQS#[2] BD17 DDR_B_DQS#3 2
DDR_A_D35 BC48 SA_DQ[34] SA_DQS#[3] AV45 DDR_A_DQS#4 DDR_B_D35 BF52 SB_DQ[34] SB_DQS#[3] BG51 DDR_B_DQS#4
DDR_A_D36 BC45 SA_DQ[35] SA_DQS#[4] AY51 DDR_A_DQS#5 DDR_B_D36 BD49 SB_DQ[35] SB_DQS#[4] BA59 DDR_B_DQS#5
DDR_A_D37 AR45 SA_DQ[36] SA_DQS#[5] AT55 DDR_A_DQS#6 DDR_B_D37 BE49 SB_DQ[36] SB_DQS#[5] AT60 DDR_B_DQS#6
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY B

DDR_A_D38 AT48 SA_DQ[37] SA_DQS#[6] AK55 DDR_A_DQS#7 DDR_B_D38 BD54 SB_DQ[37] SB_DQS#[6] AK59 DDR_B_DQS#7
DDR_A_D39 AY48 SA_DQ[38] SA_DQS#[7] DDR_B_D39 BE53 SB_DQ[38] SB_DQS#[7]
DDR_A_D40 BA49 SA_DQ[39] DDR_B_D40 BF56 SB_DQ[39]
DDR_A_D41 AV49 SA_DQ[40] DDR_B_D41 BE57 SB_DQ[40]
DDR_A_D42 BB51 SA_DQ[41] DDR_B_D42 BC59 SB_DQ[41]
DDR_A_D43 AY53 SA_DQ[42] DDR_B_D43 AY60 SB_DQ[42]
DDR_A_D44 BB49 SA_DQ[43] DDR_B_D44 BE54 SB_DQ[43]
AU49 SA_DQ[44] AJ11 DDR_A_DQS[0..7] 11 BG54 SB_DQ[44]
DDR_A_D45 DDR_A_DQS0 DDR_B_D45
BA53 SA_DQ[45] SA_DQS[0] AR10 BA58 SB_DQ[45] AM2 DDR_B_DQS[0..7] 12
DDR_A_D46 DDR_A_DQS1 DDR_B_D46 DDR_B_DQS0
DDR_A_D47 BB55 SA_DQ[46] SA_DQS[1] AY11 DDR_A_DQS2 DDR_B_D47 AW59 SB_DQ[46] SB_DQS[0] AV1 DDR_B_DQS1
DDR_A_D48 BA55 SA_DQ[47] SA_DQS[2] AU17 DDR_A_DQS3 DDR_B_D48 AW58 SB_DQ[47] SB_DQS[1] BE11 DDR_B_DQS2
DDR_A_D49 AV56 SA_DQ[48] SA_DQS[3] AW45 DDR_A_DQS4 DDR_B_D49 AU58 SB_DQ[48] SB_DQS[2] BD18 DDR_B_DQS3
DDR_A_D50 AP50 SA_DQ[49] SA_DQS[4] AV51 DDR_A_DQS5 DDR_B_D50 AN61 SB_DQ[49] SB_DQS[3] BE51 DDR_B_DQS4
DDR_A_D51 AP53 SA_DQ[50] SA_DQS[5] AT56 DDR_A_DQS6 DDR_B_D51 AN59 SB_DQ[50] SB_DQS[4] BA61 DDR_B_DQS5
DDR_A_D52 AV54 SA_DQ[51] SA_DQS[6] AK54 DDR_A_DQS7 DDR_B_D52 AU59 SB_DQ[51] SB_DQS[5] AR59 DDR_B_DQS6
DDR_A_D53 AT54 SA_DQ[52] SA_DQS[7] DDR_B_D53 AU61 SB_DQ[52] SB_DQS[6] AK61 DDR_B_DQS7
DDR_A_D54 AP56 SA_DQ[53] DDR_B_D54 AN58 SB_DQ[53] SB_DQS[7]
DDR_A_D55 AP52 SA_DQ[54] DDR_B_D55 AR58 SB_DQ[54]
DDR_A_D56 AN57 SA_DQ[55] DDR_B_D56 AK58 SB_DQ[55]
DDR_A_D57 AN53 SA_DQ[56] DDR_B_D57 AL58 SB_DQ[56]
DDR_A_D58 AG56 SA_DQ[57] DDR_B_D58 AG58 SB_DQ[57]
DDR_A_D59 AG53 SA_DQ[58] DDR_B_D59 AG59 SB_DQ[58]
DDR_A_D60 AN55 SA_DQ[59] DDR_B_D60 AM60 SB_DQ[59]
AN52 SA_DQ[60] BG35 DDR_A_MA[0..15] 11 AL59 SB_DQ[60] BF32 DDR_B_MA[0..15] 12
DDR_A_D61 DDR_A_MA0 DDR_B_D61 DDR_B_MA0
DDR_A_D62 AG55 SA_DQ[61] SA_MA[0] BB34 DDR_A_MA1 DDR_B_D62 AF61 SB_DQ[61] SB_MA[0] BE33 DDR_B_MA1
DDR_A_D63 AK56 SA_DQ[62] SA_MA[1] BE35 DDR_A_MA2 DDR_B_D63 AH60 SB_DQ[62] SB_MA[1] BD33 DDR_B_MA2
SA_DQ[63] SA_MA[2] BD35 DDR_A_MA3 SB_DQ[63] SB_MA[2] AU30 DDR_B_MA3
SA_MA[3] AT34 DDR_A_MA4 SB_MA[3] BD30 DDR_B_MA4
SA_MA[4] AU34 DDR_A_MA5 SB_MA[4] AV30 DDR_B_MA5
3 SA_MA[5] BB32 DDR_A_MA6 SB_MA[5] BG30 DDR_B_MA6 3
BD37 SA_MA[6] AT32 DDR_A_MA7 BG39 SB_MA[6] BD29 DDR_B_MA7
11 DDR_A_BS0 BF36 SA_BS[0] SA_MA[7] AY32 12 DDR_B_BS0 BD42 SB_BS[0] SB_MA[7] BE30
DDR_A_MA8 DDR_B_MA8
11 DDR_A_BS1 BA28 SA_BS[1] SA_MA[8] AV32 12 DDR_B_BS1 AT22 SB_BS[1] SB_MA[8] BE28
DDR_A_MA9 DDR_B_MA9
11 DDR_A_BS2 SA_BS[2] SA_MA[9] BE37 12 DDR_B_BS2 SB_BS[2] SB_MA[9] BD43
DDR_A_MA10 DDR_B_MA10
SA_MA[10] BA30 DDR_A_MA11 SB_MA[10] AT28 DDR_B_MA11
SA_MA[11] BC30 DDR_A_MA12 SB_MA[11] AV28 DDR_B_MA12
BE39 SA_MA[12] AW41 DDR_A_MA13 AV43 SB_MA[12] BD46 DDR_B_MA13
11 DDR_A_CAS# SA_CAS# SA_MA[13] 12 DDR_B_CAS# SB_CAS# SB_MA[13]
BD39 AY28 DDR_A_MA14 BF40 AT26 DDR_B_MA14
11 DDR_A_RAS# AT41 SA_RAS# SA_MA[14] AU26 12 DDR_B_RAS# BD45 SB_RAS# SB_MA[14] AU22
DDR_A_MA15 DDR_B_MA15
11 DDR_A_WE# SA_WE# SA_MA[15] 12 DDR_B_WE# SB_WE# SB_MA[15]
IVY-BRIDGE_BGA1023 IVY-BRIDGE_BGA1023
CPU@ CPU@
+1.5V
1
R19
1K_0402_5%
2
3 1 1 2
S
SM_DRAMRST# DIMM_DRAMRST#_R
5 SM_DRAMRST# DIMM_DRAMRST# 11,12
R20 1K_0402_5%
2
0.1U_0402_16V4Z
C2066
Q1
R21 LBSS138LT1G_SOT-23-3 S0
G
1
2
4.99K_0402_1%
DRAMRST_CNTRL_PCH hgih ,MOS ON XEMC@
4 SM_DRAMRST# HIGH,DDR3 DRAMRST# HIGH 4
1
2
RST_GATE_R DRAM not reset
1 2
14 RST_GATE S3
RESERVED for ESD
R176 1 DRAMRST_CNTRL_PCH Low ,MOS OFF
100K_0402_5% C38
0.047U_0402_16V7K
SM_DRAMRST# Low,DDR3 DRAMRST# HIGH
DRAM not reset
2 Security Classification Compal Secret Data Compal Electronics, Inc.
S4,5 2013/02/04 EOP Title
DRAMRST_CNTRL_PCH Low ,MOS OFF
Issued Date Deciphered Date PROCESSOR(3/7) DDRIII
SM_DRAMRST# lo,DDR3 DRAMRST# low THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DRAM reset DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
A B C D E
A B C D E
CFG Straps for Processor

current placement need to support
CFG2 PEG bus lan reversal
1
VGA@ R23
1K_0402_1%
2
UCPU1E
1 1
PCIe Static x16 Lane Numbering Reversal

TP@ T8 PAD CFG0 B50 N59
C51 CFG[0] BCLK_ITP N58
CFG2 B54 CFG[1] BCLK_ITP# 1: (Default)Normal Operation
D53 CFG[2] CFG2
CFG4 A51 CFG[3] N42 Lane # definition matches socket pin map definition
CFG5 C53 CFG[4] RSVD30 L42
0: Lane Reversed
TP@ T53 PAD
CFG6
CFG7
C55
H49
A55
CFG[5]
CFG[6]
CFG[7]
RSVD31
RSVD32
RSVD33
L45
L47 *
H51 CFG[8]
K49 CFG[9] M13
K53 CFG[10] RSVD34 M14
F53 CFG[11] RSVD35 U14
G53 CFG[12] RSVD36 W14 CFG4
L51 CFG[13] RSVD37 P13
F51 CFG[14] RSVD38
1
D52 CFG[15]
L53 CFG[16] AT49 R550 EDP@
CFG[17] RSVD39 K24 1K_0402_1%
RSVD40
RESERVED
TP@ T49 PAD VCC_VAL_SENSE H43
2
TP@ T50 PAD VSS_VAL_SENSE K43 VCC_VAL_SENSE AH2
VSS_VAL_SENSE RSVD41 AG13
RSVD42 check VGA 8lane or 16lane?
AM14
TP@ T51 PAD VAXG_VAL_SENSE H45 RSVD43 AM15
TP@ T52 PAD VSSAXG_VAL_SENSE K45 VAXG_VAL_SENSE RSVD44
VSSAXG_VAL_SENSE CFG5
N50
TP@ T9 PAD F48 RSVD45 These pins are for solder joint CFG6
VCC_DIE_SENSE reliability and non-critical to By 3/12
1
2 2
H48
function. For BGA only. R544 R541
K48 RSVD6 1K_0402_1% 1K_0402_1%
RSVD7 A4 @ VGA@
DC_TEST_A4 C4
2
BA19 DC_TEST_C4 D3 DC_TEST_C4_D3
AV19 RSVD8 DC_TEST_D3 D1
AT21 RSVD9 DC_TEST_D1 A58
BB21 RSVD10 DC_TEST_A58 A59
BB19 RSVD11 DC_TEST_A59 C59 DC_TEST_A59_C59
AY21 RSVD12 DC_TEST_C59 A61
BA22 RSVD13 DC_TEST_A61 C61 DC_TEST_A61_C61
AY22 RSVD14 DC_TEST_C61 D61
AU19 RSVD15 DC_TEST_D61 BD61
AU21 RSVD16 DC_TEST_BD61 BE61 eDP Enable Strap
BD21 RSVD17 DC_TEST_BE61 BE59 DC_TEST_BE59_BE61
BD22 RSVD18 DC_TEST_BE59 BG61
BD25 RSVD19 DC_TEST_BG61 BG59 DC_TEST_BG59_BG61 1: (Default)Disable
BD26 RSVD20 DC_TEST_BG59 BG58 CFG4
BG22
BE22
BG26
RSVD21
RSVD22
RSVD23
DC_TEST_BG58
DC_TEST_BG4
DC_TEST_BG3
BG4
BG3
BE3
*0: Enable
DC_TEST_BE3_BG3
BE26 RSVD24 DC_TEST_BE3 BG1 PCIE Port Bifurcation Straps
BF23 RSVD25 DC_TEST_BG1 BE1 DC_TEST_BE1_BG1
BE24 RSVD26 DC_TEST_BE1 BD1
RSVD27 DC_TEST_BD1 11: (Default) 1x16 PCI Express
CFG[6:5] 10: 2x8 PCI Express
* 01: Reserved
IVY-BRIDGE_BGA1023
CPU@
00: 1x8,2x4 PCI Express
3 3
PEG DEFER TRAINING Tacoma_Fall2 1.0 P.12
1: (Default) PEG Trains immediately and follows

CFG7 * xxRESETB de-assertion
4
0: PEG Wait for BIOS for training 4

Issued Date Deciphered Date PROCESSOR(4/7) RSVD,CFG
A B C D E
A B C D E
UCPU1F POWER
+1.05VS_VTT
AF46
+CPU_CORE VCCIO[1] AG48
VCCIO[3] AG50
A26 VCCIO[4] AG51
A29 VCC[1] VCCIO[5] AJ17
1 VCC[5] VCCIO[9] 1
A38 AJ47
A39 VCC[6] VCCIO[10] AK50
A42 VCC[7] VCCIO[11] AK51
C26 VCC[8] VCCIO[12] AL14
D27 VCC[15] VCCIO[19] AL48
D32 VCC[16] VCCIO[20] AM16
PEG IO AND DDR IO

E26 VCC[21] VCCIO[25] AN20
E37 VCC[25] VCCIO[29]
E38 VCC[26]
F25 VCC[27]
CORE SUPPLY
F26 VCC[28]
F28 VCC[29]
F32 VCC[30]
F34 VCC[31]
F37 VCC[32] AA14
F38 VCC[33] VCCIO[30] AA15
F42 VCC[34] VCCIO[31] AB17
G42 VCC[35] VCCIO[32] AB20
H25 VCC[36] VCCIO[33] AC13
H26 VCC[37] VCCIO[34] AD16
2 H28 VCC[38] VCCIO[35] AD18 2
H29 VCC[39] VCCIO[36] AD21
H32 VCC[40] VCCIO[37] AE14
H34 VCC[41] VCCIO[38] AE15
H35 VCC[42] VCCIO[39] AF16
H40 VCC[45] VCCIO[42] AG15
J25 VCC[46] VCCIO[43] AG16
J32 VCC[50] VCCIO[47] AJ14
J34 VCC[51] VCCIO[48] AJ15
J35 VCC[52] VCCIO[49]
J37 VCC[53]
J38 VCC[54]
J40 VCC[55] +1.05VS_VTT
J42 VCC[56]
K26 VCC[57] W16
K27 VCC[58] VCCIO50 W17
K29 VCC[59] VCCIO51
K32 VCC[60]
K34 VCC[61]
K35 VCC[62]
K37 VCC[63] reserve via
K39 VCC[64]
K42 VCC[66] BC22 VCCIO_SEL PAD TP@ T41
L25 VCC[67] VCCIO_SEL
L28 VCC[68]
L33 VCC[69]
L36 VCC[70] +1.05VS_VTT
L40 VCC[71] +1.05VS_VTT +1.05VS_VTT
3 N26 VCC[72] 3
N30 VCC[73] AM25 1 2
QUIET
RAILS
1
N34 VCC[74] VCCPQE[1] AN22 C39
N38 VCC[75]
VCC[76]
VCCPQE[2] 1U_0402_6.3V6K R34 R35 CPU Power Rail Table
130_0402_5% 75_0402_5%
S0 Iccmax
Voltage Rail Voltage
2
2
Current(A)
Place the PU resistors close to CPU
A44 H_CPU_SVIDALRT# R36 1 2 43_0402_1%
VCC 0.65~1.2 33 Processor Core Voltage
VIDALERT# B43 VR_SVID_ALRT# 49
VR_SVID_CLK
VIDSCLK VR_SVID_CLK 49
SVID
C44 VR_SVID_DAT
VIDSOUT VR_SVID_DAT 49 VCCIO 1.05 8.5 Processor Uncore Voltage
+CPU_CORE
VDDQ 1.5 5 Memory Controller Voltage
1
R39 VCCSA 0.675~0.9 4 System Agent Voltage

100_0402_1%
Place the PU resistors close to VR
VCCPLL 1.8 1.2 Processor PLL Voltage
2
F43 VCCSENSE
VCC_SENSE G43 VSSSENSE VCCSENSE 49
SENSE LINES
VSS_SENSE VSSSENSE 49
VAXG 0.65~1.25 29 Processor Graphics Voltage
1
R42 1 2 10_0402_5%
+1.05VS_VTT
R43 Refer to Mobile 3rd Generation IntelR Core Processor Family External Design
AN16 100_0402_1%
VCCIO_SENSE AN17 VSSIO_SENSE
VCCIO_SENSE 48 Specification (EDS) Volume 1 of 2 Revision 2.2
VSS_SENSE_VCCIO
2
1
R44
4 10_0402_5% 4
IVY-BRIDGE_BGA1023
2
CPU@

Issued Date Deciphered Date PROCESSOR(5/7) PWR,BYPASS
A B C D E
A B C D E
+1.5VS
POWER
1
UCPU1G R45
1K_0402_5%
+VGFX_CORE
DC 29A +V_SM_VREF should be 20-mil trace width and 20-mil spacing
2
AY43 +V_SM_VREF
AA46 SM_VREF
VREF
1
AB47 VAXG[1]
VAXG[2] 1
AB50 BE7 SA_DIMM_VREFDQ TP@ T47 PAD R46
AB51 VAXG[3] SA_DIMM_VREFDQ BG7 SB_DIMM_VREFDQ TP@ T48 PAD C44 1K_0402_5%
AB52 VAXG[4] SB_DIMM_VREFDQ
1 VAXG[5] 0.1U_0402_16V7K 1
AB53 2
2
AB55 VAXG[6]
AB56 VAXG[7]
AB58 VAXG[8]
AB59 VAXG[9]
AC61 VAXG[10]
AD47 VAXG[11]
AD48 VAXG[12] 5A Follow VDDQ 1.5V-Rail Decoupling Recommendation from Intel PDDG Rev 1.0,
AD50 VAXG[13]
AD51 VAXG[14] AJ28 1. 1x 330uF
VAXG[15] VDDQ[1]
- 1.5V RAILS
AD52 AJ33
AD53 VAXG[16] VDDQ[2] AJ36
2. 8x 10uF (0603) +1.5VS
AD55 VAXG[17] VDDQ[3] AJ40 3. 10x 1uF (0402)
AD56 VAXG[18] VDDQ[4] AL30
Place TOP IN BGA
AD58 VAXG[19] VDDQ[5] AL34
AD59 VAXG[20] VDDQ[6] AL38 @ C47 @ C45 C46 C53 C48 C49
VAXG[21] VDDQ[7]
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
AE46 AL42 1
N45 VAXG[22] VDDQ[8] AM33
1
P47 VAXG[23] VDDQ[9] AM36 + C50
P48 VAXG[24] VDDQ[10] AM40 330U_2.5V_M
P50 VAXG[25] VDDQ[11] AN30
2
P51 VAXG[26] VDDQ[12] AN34 2
P52 VAXG[27] VDDQ[13] AN38
P53 VAXG[28] VDDQ[14] AR26
DDR3
GRAPHICS
Place BOT OUT BGA
T48 VAXG[32] VDDQ[18] AR34
T58 VAXG[33] VDDQ[19] AR36 @
T59 VAXG[34] VDDQ[20] AR40 C56 C54 C55 C60 C57 C58
Part Number Description ESR
VAXG[35] VDDQ[21]
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
T61 AV41
VAXG[36] VDDQ[22] SF000002Z00 S_A-P_CAP 330U 2.5V M 6.3X4.2 R17M VLPS 17mΩ
1
U46 AW26
V47 VAXG[37] VDDQ[23] BA40
2 V48 VAXG[38] VDDQ[24] BB28 2
2
V50 VAXG[39] VDDQ[25] BG33
V51 VAXG[40] VDDQ[26]
V52 VAXG[41]
V53 VAXG[42]
V55 VAXG[43]
V56 VAXG[44]
V58 VAXG[45]
V59 VAXG[46]
W50 VAXG[47]
W51 VAXG[48]
W52 VAXG[49]
W53 VAXG[50]
W55 VAXG[51]
W56 VAXG[52]
W61 VAXG[53]
+VGFX_CORE Y48 VAXG[54]
Y61 VAXG[55]
VAXG[56]
1
R54
100_0402_5% +1.5VS
2
AM28
QUIET RAILS
SENSE
LINES
F45 VCCDQ[1] AN26
49 VCC_AXG_SENSE G45 VAXG_SENSE VCCDQ[2]
49 VSS_AXG_SENSE
1
VSSAXG_SENSE
1
C59
R52 1U_0402_6.3V6K
2
VCCPLL Plane Decoupling Recommendation from Intel PDDG Rev 1.0, 100_0402_5%
1.2A
1.8V RAIL
1. 1x 330uF
2
+1.8VS BB3
3
2. 2x 1uF (0402) BC1 VCCPLL[1] 3
BC4 VCCPLL[2] *For ULV Only
VCCPLL[3]
2 VID[0] ball D48 VID[1] ball D49 VCCSA Output
1U_0402_6.3V6K
C61
1U_0402_6.3V6K
C79
C85 1 1
@ 0 0 0.9V
100U_1206_6.3V6M BC43
1 VDDQ_SENSE BA43
2 2 VSS_SENSE_VDDQ 0 1 0.85V
SENSE LINES
6A L17 1 0 0.775V
L21 VCCSA[1]
N16 VCCSA[2]
N20 VCCSA[3] 1 1 0.75V
N22 VCCSA[4]
SA RAIL
P17 VCCSA[5]
+VCCSA P20 VCCSA[6] U10
Place TOP IN BGA R16 VCCSA[7] VCCSA_SENSE
+VCCSA R18 VCCSA[8]
@ R21 VCCSA[9]
C66 C67 C84 C78 U15 VCCSA[10]
VCCSA VID
VCCSA[11]
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
2 V16
1
C423 V17 VCCSA[12] D48 H_VCCSA_VID0

VCCSA[13] VCCSA_VID[0] H_VCCSA_VID0 47
lines
V18 D49 H_VCCSA_VID1

V21 VCCSA[14] VCCSA_VID[1] H_VCCSA_VID1 47
100U_1206_6.3V6M
2
1 W20 VCCSA[15]
VCCSA[16]
Place BOT OUT BGA IVY-BRIDGE_BGA1023

CPU@
<BOM Structure>
@ Follow VCCSA Plane Decoupling Recommendations from Intel PDDG Rev 1.0,
4 C83 C80 C82 C81 4
1. 1x 330uF
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1
2. 5x 10uF (0603)
3. 5x 1uF (0402)
2

Issued Date Deciphered Date PROCESSOR(6/7) PWR
A B C D E
A B C D E
UCPU1H
UCPU1I
A13 AM38
1 VSS[1] VSS[91] 1
A17 AM4
A21 VSS[2] VSS[92] AM42 BG17 M4
A25 VSS[3] VSS[93] AM45 BG21 VSS[181] VSS[250] M58
A28 VSS[4] VSS[94] AM48 BG24 VSS[182] VSS[251] M6
A33 VSS[5] VSS[95] AM58 BG28 VSS[183] VSS[252] N1
A37 VSS[6] VSS[96] AN1 BG37 VSS[184] VSS[253] N17
AA1 VSS[12] VSS[102] AN40 C29 VSS[190] VSS[259] N40
AA51 VSS[15] VSS[105] AN50 D10 VSS[193] VSS[262] N48
AA52 VSS[16] VSS[106] AN54 D14 VSS[194] VSS[263] N51
AA53 VSS[17] VSS[107] AP10 D18 VSS[195] VSS[264] N52
AA8 VSS[20] VSS[110] AP7 D29 VSS[198] VSS[267] P14
AB16 VSS[21] VSS[111] AR13 D35 VSS[199] VSS[268] P16
AB61
AC10
VSS[25]
VSS[26]
VSS[27]
VSS[115]
VSS[116]
VSS[117]
AR48
AR61
D46
D50
VSS[203]
VSS[204]
VSS[205]
VSS VSS[272]
VSS[273]
VSS[274]
P59
P9
AC14 AR7 D54 R17
AC46 VSS[28] VSS[118] AT14 D58 VSS[206] VSS[275] R20
AC6 VSS[29] VSS[119] AT19 D6 VSS[207] VSS[276] R4
AD17 VSS[30] VSS[120] AT36 E25 VSS[208] VSS[277] R46
AD20 VSS[31] VSS[121] AT4 E29 VSS[209] VSS[278] T1
AD4 VSS[32] VSS[122] AT45 E3 VSS[210] VSS[279] T47
2
AD61
AE13
VSS[33]
VSS[34]
VSS[35]
VSS VSS[123]
VSS[124]
VSS[125]
AT52
AT58
E35
E40
VSS[211]
VSS[212]
VSS[213]
VSS[280]
VSS[281]
VSS[282]
T50
T51 2
AE8 AU1 F13 T52
AF1 VSS[36] VSS[126] AU11 F15 VSS[214] VSS[283] T53
AF47 VSS[39] VSS[129] AU51 F35 VSS[217] VSS[286] U13
AF48 VSS[40] VSS[130] AU7 F40 VSS[218] VSS[287] U8
AF50 VSS[41] VSS[131] AV17 F55 VSS[219] VSS[288] V20
AF51 VSS[42] VSS[132] AV21 G51 VSS[220] VSS[289] V61
AF52 VSS[43] VSS[133] AV22 G6 VSS[221] VSS[290] W13
AF53 VSS[44] VSS[134] AV34 G61 VSS[222] VSS[291] W15
AF55 VSS[45] VSS[135] AV40 H10 VSS[223] VSS[292] W18
AF59 VSS[48] VSS[138] AW13 H21 VSS[226] VSS[295] W8
AG10 VSS[49] VSS[139] AW43 H4 VSS[227] VSS[296] Y4
AG47 VSS[52] VSS[142] AY14 J1 VSS[230] VSS[299] Y59
AG52 VSS[53] VSS[143] AY19 J49 VSS[231] VSS[300] G48
AG61 VSS[54] VSS[144] AY30 J55 VSS[232] VSS[301]
AG7 VSS[55] VSS[145] AY36 K11 VSS[233]
AH4 VSS[56] VSS[146] AY4 K21 VSS[234]
AH58 VSS[57] VSS[147] AY41 K51 VSS[235]
AJ13 VSS[58] VSS[148] AY45 K8 VSS[236] A5
AJ16 VSS[59] VSS[149] AY49 L16 VSS[237] VSS_NCTF_1 A57
AJ20 VSS[60] VSS[150] AY55 L20 VSS[238] VSS_NCTF_2 BC61
AJ22 VSS[61] VSS[151] AY58 L22 VSS[239] VSS_NCTF_3 BD3
AJ26 VSS[62] VSS[152] AY9 L26 VSS[240] VSS_NCTF_4 BD59
AJ30 VSS[63] VSS[153] BA1 L30 VSS[241] VSS_NCTF_5 BE4
NCTF
AJ34 VSS[64] VSS[154] BA11 L34 VSS[242] VSS_NCTF_6 BE58
AJ38 VSS[65] VSS[155] BA17 L38 VSS[243] VSS_NCTF_7 BG5
AJ42 VSS[66] VSS[156] BA21 L43 VSS[244] VSS_NCTF_8 BG57
3 AJ45 VSS[67] VSS[157] BA26 L48 VSS[245] VSS_NCTF_9 C3 3
AJ48 VSS[68] VSS[158] BA32 L61 VSS[246] VSS_NCTF_10 C58
AJ7 VSS[69] VSS[159] BA48 M11 VSS[247] VSS_NCTF_11 D59
AK1 VSS[70] VSS[160] BA51 M15 VSS[248] VSS_NCTF_12 E1
AK52 VSS[71] VSS[161] BB53 VSS[249] VSS_NCTF_13 E61
AL10 VSS[72] VSS[162] BC13 VSS_NCTF_14
AL13 VSS[73] VSS[163] BC5
AL17 VSS[74] VSS[164] BC57
AL21 VSS[75] VSS[165] BD12
AL25 VSS[76] VSS[166] BD16
AL28 VSS[77] VSS[167] BD19 IVY-BRIDGE_BGA1023
AL33 VSS[78] VSS[168] BD23 CPU@
AL36 VSS[79] VSS[169] BD27
AL40 VSS[80] VSS[170] BD32
AL43 VSS[81] VSS[171] BD36
AL47 VSS[82] VSS[172] BD40
AL61 VSS[83] VSS[173] BD44
AM13 VSS[84] VSS[174] BD48
AM20 VSS[85] VSS[175] BD52
AM22 VSS[86] VSS[176] BD56
AM26 VSS[87] VSS[177] BD8
AM30 VSS[88] VSS[178] BE5
AM34 VSS[89] VSS[179] BG13
VSS[90] VSS[180]
IVY-BRIDGE_BGA1023
CPU@
4 4

Issued Date Deciphered Date PROCESSOR(7/7) VSS
A B C D E
A B C D E
+V_DDR_REFA +1.5V +1.5V

JDIMM1
+V_DDR_REFA 1 2
3 VREF_DQ VSS1 4 DDR_A_D4
DDR_A_D0 5 VSS2 DQ4 6 DDR_A_D5 +1.5V
DDR_A_D1 7 DQ0 DQ5 8
9 DQ1 VSS3 10 DDR_A_DQS#0
All VREF_DQ and VREFCA should be rounted with width
DDR_A0_DM0 11 VSS4 DQS#0 12 DDR_A_DQS0 at least 20-mil and with spacing at-least 20-mil.
13 DM0 DQS0 14 +VREF_CA RP33
VSS5 VSS6
2.2U_0402_6.3V6M
C86
0.1U_0402_16V7K
C105
@ 1 1 DDR_A_D2 15 16 DDR_A_D6 +VREF_CA 1 8
DDR_A_D3 17 DQ2 DQ6 18 DDR_A_D7 1. +V_DDR_REFA +V_DDR_REFA 2 7
19 DQ3 DQ7 20 +V_DDR_REFA 3 6
DDR_A_D8 21 VSS7 VSS8 22 DDR_A_D12
2. +VREF_CA 4 5
2 2 DDR_A_D9 23 DQ8 DQ12 24 DDR_A_D13
25 DQ9 DQ13 26 1K_0804_8P4R_1%
1 VSS9 VSS10 1
DDR_A_DQS#1 27 28 DDR_A0_DM1
DDR_A_DQS1 29 DQS#1 DM1 30 DIMM_DRAMRST#
DQS1 RESET# DIMM_DRAMRST# 12,6
31 32
DDR_A_D11 35 DQ10 DQ14 36 DDR_A_D15
DDR_A_DQS#[0..7] 6 37 DQ11 DQ15 38
DDR_A_DQS[0..7] 6 41 DQ16 DQ20 42
DDR_A_D17 DDR_A_D21
43 DQ17 DQ21 44
DDR_A_D[0..63] 6 45 VSS15 VSS16 46
DDR_A_DQS#2 DDR_A0_DM2
DDR_A_DQS2 47 DQS#2 DM2 48
DDR_A_MA[0..15] 6 49 DQS2 VSS17 50 DDR_A_D22
DDR_A_D18 51 VSS18 DQ22 52 DDR_A_D23
DDR_A_D19 53 DQ18 DQ23 54
55 DQ19 VSS19 56 DDR_A_D28
DDR_A_D25 59 DQ24 DQ29 60
+1.5V DDR_A0_DM3 63 VSS22 DQS#3 64 DDR_A_DQS3
65 DM3 DQS3 66
@ DDR_A_D27 69 DQ26 DQ30 70 DDR_A_D31
DQ27 DQ31
1U_0402_6.3V6K
C91
1U_0402_6.3V6K
C100
1U_0402_6.3V6K
C106
1U_0402_6.3V6K
C103
71 72
VSS25 VSS26
1 1 1 1
DDRA_CKE0_DIMMA 73 74 DDRA_CKE1_DIMMA
2 2 2 2 6 DDRA_CKE0_DIMMA CKE0 CKE1 DDRA_CKE1_DIMMA 6
75 76
77 VDD1 VDD2 78 DDR_A_MA15
DDR_A_BS2 79 NC1 A15 80 DDR_A_MA14
6 DDR_A_BS2 BA2 A14
81 82
DDR_A_MA12 83 VDD3 VDD4 84 DDR_A_MA11
DDR_A_MA9 85 A12/BC# A11 86 DDR_A_MA7
2 87 A9 A7 88 2
+1.5V
Should be as close as possible to sink of JDIMM1 DDR_A_MA8 89 VDD5 VDD6 90 DDR_A_MA6
DDR_A_MA5 91 A8 A6 92 DDR_A_MA4
93 A5 A4 94
@ DDR_A_MA3 95 VDD7 VDD8 96 DDR_A_MA2
A3 A2
10U_0603_6.3V6M
C87
10U_0603_6.3V6M
C109
10U_0603_6.3V6M
C93
10U_0603_6.3V6M
C98
DDR_A_MA1 97 98 DDR_A_MA0
99 A1 A0 100
1 1 1 1 VDD9 VDD10
SA_CLK_DDR0 101 102 SA_CLK_DDR1
6 SA_CLK_DDR0 CK0 CK1 SA_CLK_DDR1 6
SA_CLK_DDR#0 103 104 SA_CLK_DDR#1
6 SA_CLK_DDR#0 CK0# CK1# SA_CLK_DDR#1 6
105 106
2 2 2 2 DDR_A_MA10 107 VDD11 VDD12 108 DDR_A_BS1
A10/AP BA1 DDR_A_BS1 6
DDR_A_BS0 109 110 DDR_A_RAS#
6 DDR_A_BS0 BA0 RAS# DDR_A_RAS# 6
111 112
DDR_A_WE# 113 VDD13 VDD14 114 DDRA_CS0_DIMMA#
6 DDR_A_WE# WE# S0# DDRA_CS0_DIMMA# 6
DDR_A_CAS# 115 116 SA_ODT0
6 DDR_A_CAS# CAS# ODT0 SA_ODT0 6
117 118
DDR_A_MA13 119 VDD15 VDD16 120 SA_ODT1
A13 ODT1 SA_ODT1 6 +VREF_CA
DDRA_CS1_DIMMA# 121 122
6 DDRA_CS1_DIMMA# S1# NC2
+1.5V 123 124
125 VDD17 VDD18 126 +VREF_CA
127 NCTEST VREF_CA 128
VSS27 VSS28
0.1U_0402_16V7K
@ DDR_A_D32 129 130 DDR_A_D36 @
DQ32 DQ36
10U_0603_6.3V6M
C88
10U_0603_6.3V6M
C96
10U_0603_6.3V6M
C107
C92
1 DDR_A_D33 131 132 DDR_A_D37
DQ33 DQ37
2.2U_0402_6.3V6M
C90
133 134
1 1 1 VSS29 VSS30 1 1
+ C101 DDR_A_DQS#4 135 136 DDR_A0_DM4
330U_2.5V_M DDR_A_DQS4 137 DQS#4 DM4 138
139 DQS4 VSS31 140 DDR_A_D38
2 2 2 2 DDR_A_D34 141 VSS32 DQ38 142 DDR_A_D39 2 2
DDR_A_D35 143 DQ34 DQ39 144
145 DQ35 VSS33 146 DDR_A_D44
DDR_A_D41 149 DQ40 DQ45 150
3 DDR_A0_DM5 153 VSS36 DQS#5 154 DDR_A_DQS5 3
Part Number Description ESR 155 DM5 DQS5 156
SF000002Z00 S_A-P_CAP 330U 2.5V M 6.3X4.2 R17M VLPS 17mΩ DDR_A_D43 159 DQ42 DQ46 160 DDR_A_D47
+0.75VS 161 DQ43 DQ47 162
Should be as close as possible to sink of JDIMM1.203 and JDIMM1.204 DDR_A_D48 163 VSS39 VSS40 164 DDR_A_D52
DDR_A_D49 165 DQ48 DQ52 166 DDR_A_D53
167 DQ49 DQ53 168
VSS41 VSS42
1U_0402_6.3V6K
C104
1U_0402_6.3V6K
C94
DDR_A_DQS#6 169 170 DDR_A0_DM6

DDR_A_DQS6 171 DQS#6 DM6 172
1 1 DQS6 VSS43
173 174 DDR_A_D54
DDR_A_D51 177 DQ50 DQ55 178
2 2 179 DQ51 VSS45 180 DDR_A_D60
DDR_A_D57 183 DQ56 DQ61 184
DDR_A0_DM7 187 VSS48 DQS#7 188 DDR_A_DQS7
189 DM7 DQS7 190
DDR_A_D59 193 DQ58 DQ62 194 DDR_A_D63
195 DQ59 DQ63 196
197 VSS51 VSS52 198
199 SA0 EVENT# 200 D_CK_SDATA
+3VS VDDSPD SDA D_CK_SDATA 12,14
201 202 D_CK_SCLK
203 SA1 SCL 204 D_CK_SCLK 12,14
+0.75VS VTT1 VTT2 +0.75VS
DDR_A0_DM0
DDR_A0_DM1 205 206
G1 G2 JDIMMA (Channel A) H4 Slot RVS TYPE
0.1U_0402_16V7K
C102
DDR_A0_DM2 1
DDR_A0_DM3 FOX_AS0A626-U4RN-7F
DDR_A0_DM4 @ CONN@
DDR_A0_DM5
DDR_A0_DM6 2
4 DDR_A0_DM7 4

Issued Date Deciphered Date DDRIII DIMMA
A B C D E
A B C D E
RP 1% P/N SD300002V00
+1.5V
+V_DDR_REFB +1.5V +1.5V
JDIMM2
+V_DDR_REFB 1 2
3 VREF_DQ VSS1 4 DDR_B_D4 +VREF_CB RP32
DDR_B_D0 5 VSS2 DQ4 6 DDR_B_D5 +VREF_CB 1 8
DDR_B_D1 7 DQ0 DQ5 8 +V_DDR_REFB 2 7
9 DQ1 VSS3 10 DDR_B_DQS#0
All VREF_DQ and VREFCA should be rounted with width +V_DDR_REFB 3 6
DDR_B0_DM0 11 VSS4 DQS#0 12 DDR_B_DQS0 at least 20-mil and with spacing at-least 20-mil. 4 5
13 DM0 DQS0 14
VSS5 VSS6
2.2U_0402_6.3V6M
C110
0.1U_0402_16V7K
C127
1 1 DDR_B_D2 15 16 DDR_B_D6 1K_0804_8P4R_1%
1 DQ2 DQ6 1
@ DDR_B_D3 17
DQ3 DQ7
18 DDR_B_D7 1. +V_DDR_REFB
19 20
DDR_B_D8 21 VSS7 VSS8 22 DDR_B_D12 2. +VREF_CB
2 2 DDR_B_D9 23 DQ8 DQ12 24 DDR_B_D13
25 DQ9 DQ13 26
DDR_B_DQS#1 27 VSS9 VSS10 28 DDR_B0_DM1
DDR_B_DQS1 29 DQS#1 DM1 30 DIMM_DRAMRST#
DQS1 RESET# DIMM_DRAMRST# 11,6
31 32
DDR_B_D10 33 VSS11 VSS12 34 DDR_B_D14
DDR_B_D11 35 DQ10 DQ14 36 DDR_B_D15
DDR_B_DQS#[0..7] 6 37 DQ11 DQ15 38
DDR_B_DQS[0..7] 6 41 DQ16 DQ20 42
DDR_B_D17 DDR_B_D21
43 DQ17 DQ21 44
DDR_B_D[0..63] 6 45 VSS15 VSS16 46
DDR_B_DQS#2 DDR_B0_DM2
DDR_B_DQS2 47 DQS#2 DM2 48
DDR_B_MA[0..15] 6 49 DQS2 VSS17 50 DDR_B_D22
DDR_B_D18 51 VSS18 DQ22 52 DDR_B_D23
DDR_B_D19 53 DQ18 DQ23 54
55 DQ19 VSS19 56 DDR_B_D28
DDR_B_D25 59 DQ24 DQ29 60
+1.5V DDR_B0_DM3 63 VSS22 DQS#3 64 DDR_B_DQS3
65 DM3 DQS3 66
@ DDR_B_D27 69 DQ26 DQ30 70 DDR_B_D31
DQ27 DQ31
1U_0402_6.3V6K
C115
1U_0402_6.3V6K
C122
1U_0402_6.3V6K
C129
1U_0402_6.3V6K
C125
71 72
VSS25 VSS26
1 1 1 1
DDRB_CKE0_DIMMB 73 74 DDRB_CKE1_DIMMB
2 2 2 2 6 DDRB_CKE0_DIMMB CKE0 CKE1 DDRB_CKE1_DIMMB 6
75 76
2 77 VDD1 VDD2 78 DDR_B_MA15 2
DDR_B_BS2 79 NC1 A15 80 DDR_B_MA14
6 DDR_B_BS2 BA2 A14
81 82
DDR_B_MA12 83 VDD3 VDD4 84 DDR_B_MA11
DDR_B_MA9 85 A12/BC# A11 86 DDR_B_MA7
87 A9 A7 88
+1.5V Should be as close as possible to sink of JDIMM2 DDR_B_MA8 89 VDD5 VDD6 90 DDR_B_MA6
DDR_B_MA5 91 A8 A6 92 DDR_B_MA4
93 A5 A4 94
@ DDR_B_MA3 95 VDD7 VDD8 96 DDR_B_MA2
A3 A2
10U_0603_6.3V6M
C112
10U_0603_6.3V6M
C131
10U_0603_6.3V6M
C119
10U_0603_6.3V6M
C121
DDR_B_MA1 97 98 DDR_B_MA0
99 A1 A0 100
1 1 1 1 VDD9 VDD10
SB_CLK_DDR0 101 102 SB_CLK_DDR1
6 SB_CLK_DDR0 CK0 CK1 SB_CLK_DDR1 6
SB_CLK_DDR#0 103 104 SB_CLK_DDR#1
6 SB_CLK_DDR#0 CK0# CK1# SB_CLK_DDR#1 6
105 106
2 2 2 2 DDR_B_MA10 107 VDD11 VDD12 108 DDR_B_BS1
A10/AP BA1 DDR_B_BS1 6
DDR_B_BS0 109 110 DDR_B_RAS#
6 DDR_B_BS0 BA0 RAS# DDR_B_RAS# 6
111 112
DDR_B_WE# 113 VDD13 VDD14 114 DDRB_CS0_DIMMB#
6 DDR_B_WE# WE# S0# DDRB_CS0_DIMMB# 6
DDR_B_CAS# 115 116 SB_ODT0
6 DDR_B_CAS# CAS# ODT0 SB_ODT0 6
117 118
DDR_B_MA13 119 VDD15 VDD16 120 SB_ODT1
A13 ODT1 SB_ODT1 6 +VREF_CB
DDRB_CS1_DIMMB# 121 122
+1.5V 6 DDRB_CS1_DIMMB# S1# NC2
123 124
125 VDD17 VDD18 126 +VREF_CB
127 NCTEST VREF_CA 128
VSS27 VSS28
0.1U_0402_16V7K
@ DDR_B_D32 129 130 DDR_B_D36
DQ32 DQ36
10U_0603_6.3V6M
C114
10U_0603_6.3V6M
C120
10U_0603_6.3V6M
C128
C116
DDR_B_D33 131 132 DDR_B_D37 @
DQ33 DQ37
2.2U_0402_6.3V6M
C111
1 1 1 133 134 1 1
DDR_B_DQS#4 135 VSS29 VSS30 136 DDR_B0_DM4
139 DQS4 VSS31 140 DDR_B_D38
2 2 2 DDR_B_D34 141 VSS32 DQ38 142 DDR_B_D39 2 2
3 DDR_B_D35 143 DQ34 DQ39 144 3
145 DQ35 VSS33 146 DDR_B_D44
DDR_B_D41 149 DQ40 DQ45 150
DDR_B0_DM5 153 VSS36 DQS#5 154 DDR_B_DQS5
155 DM5 DQS5 156
DDR_B_D43 159 DQ42 DQ46 160 DDR_B_D47
+0.75VS 161 DQ43 DQ47 162
Should be as close as possible to sink of JDIMM2.203 and JDIMM2.204 DDR_B_D49 165 DQ48 DQ52 166 DDR_B_D53
167 DQ49 DQ53 168
VSS41 VSS42
1U_0402_6.3V6K
C130
1U_0402_6.3V6K
C113
DDR_B_DQS#6 169 170 DDR_B0_DM6

1 1 DQS6 VSS43
173 174 DDR_B_D54
DDR_B_D51 177 DQ50 DQ55 178
2 2 179 DQ51 VSS45 180 DDR_B_D60
DDR_B_D57 183 DQ56 DQ61 184
DDR_B0_DM7 187 VSS48 DQS#7 188 DDR_B_DQS7
189 DM7 DQS7 190
DDR_B_D59 193 DQ58 DQ62 194 DDR_B_D63
195 DQ59 DQ63 196
197 VSS51 VSS52 198
199 SA0 EVENT# 200 D_CK_SDATA
+3VS VDDSPD SDA D_CK_SDATA 11,14
201 202 D_CK_SCLK
203 SA1 SCL 204 D_CK_SCLK 11,14
+0.75VS VTT1 VTT2 +0.75VS
DDR_B0_DM0
DDR_B0_DM1 205 206
G1 G2 JDIMMB (Channel B) H4 RVS TYPE Slot
0.1U_0402_16V7K
C124
4 DDR_B0_DM2 1 4
DDR_B0_DM3 FOX_AS0A626-U4RN-7F
DDR_B0_DM4 @ CONN@
DDR_B0_DM5
DDR_B0_DM6 2
DDR_B0_DM7

Issued Date Deciphered Date DDRIII DIMMB
A B C D E
A B C D E
+RTCBATT
+RTCVCC
20mil R77 1 2 1M_0402_5% SM_INTRUDER#
1
R78 1 2 330K_0402_5% PCH_INTVRMEN
D3 INTVRMEN(Internal Voltage Regulator Enable)

BAS40-04_SOT23-3 for DcpSus well
+RTCVCC
20mil * H: Integrated VRM enable
2
+3VS
1 +CHGRTC 1
1 L: Integrated VRM disable
C136
0.1U_0402_16V4Z
20mil RP23
2 SERIRQ 1 8
PCH_SATALED# 2 7
JME2 should 3 6
be placed close to JDIMM1 14 PCH_GPIO20
PCH_GPIO20 4 5
10K_0804_8P4R_5%
1 U1010A
2
+RTCVCC C137 JME2 PCH_RTCX1 A20 C38 LPC_AD0
RTCX1 FWH0 / LAD0 A38 LPC_AD0 37
1U_0603_10V6K SHORT PADS LPC_AD1
LPC
LPC_AD1 37
1
2 PCH_RTCX2 C20 FWH1 / LAD1 B37 LPC_AD2
SP@ RTCX2 FWH2 / LAD2 LPC_AD2 37
C37 LPC_AD3
1 2 20K_0402_5% PCH_RTCRST# D20 FWH3 / LAD3 LPC_AD3 37
R85
RTCRST# D36 LPC_FRAME#
32.768 for Real Time Clock 1 2 20K_0402_5% PCH_SRTCRST# G22 FWH4 / LFRAME# LPC_FRAME# 37
R83
PCH_RTCX1 SRTCRST# E36
RTC
SM_INTRUDER# K22 LDRQ0# K36 PCH_GPIO23 R87 1 @ 2 10K_0402_5%
1 INTRUDER# LDRQ1# / GPIO23
2
1 2 PCH_RTCX2
R84 10M_0402_5% C138 JME1 PCH_INTVRMEN C17 V5 SERIRQ
INTVRMEN SERIRQ SERIRQ 37
1U_0603_10V6K SHORT PADS
1
Y1 2
SP@
1 2 AM3
SATA0RXN SATA_PRX_DTX_N0 35
HDA_BITCLK_PCH N34 AM1
HDA_BCLK SATA0RXP SATA_PRX_DTX_P0 35
SATA 6G
32.768K 12.5PF 1TJF125DP1A000D AP7 HDD Connector (JHDD1)
SATA0TXN SATA_PTX_DRX_N0 35
HDA_SYNC_PCH L34 AP5
HDA_SYNC SATA0TXP SATA_PTX_DRX_P0 35
PCH_SPKR T10 AM10
1 1 39 PCH_SPKR SPKR SATA1RXN
C139 C142 AM8
18P_0402_50V8J 15P_0402_50V8J HDA_RST_PCH# K34 SATA1RXP AP11
2 HDA_RST# SATA1TXN AP10 2
2 2 SATA1TXP
HDA_SDIN0 E34 AD7
39 HDA_SDIN0 HDA_SDIN0 SATA2RXN SATA_PRX_DTX_N2 35
AD5
SATA2RXP SATA_PRX_DTX_P2 35
G34 AH5
HDA_SDIN1 SATA2TXN AH4 SATA_PTX_DRX_N2 35 ODD Connector (JODD1)
C34 SATA2TXP SATA_PTX_DRX_P2 35
IHDA
HDA_SDIN2 AB8
+3VALW_PCH A34 SATA3RXN AB10
HDA_SDIN3 SATA3RXP AF3
SATA3TXN AF1
As Intel's definition, SATA Port 1 and Port 3 is diabled by
R88 2 1 1K_0402_5% HDA_SYNC_PCH HDA_SDOUT_PCH A36 SATA3TXP HM70 NM70
SATA
HDA_SDO Y7
SATA4RXN Y5
On-Die PLL Voltage Regulator Voltage Select C36 SATA4RXP AD3
for VccVRM HDA_DOCK_EN# / GPIO33 SATA4TXN AD1 SATAICOMPO and SATACOMPI should be connected together then to R121.
N32 SATA4TXP
* H: 1.5V for VccVRM (for Mobile platform) HDA_DOCK_RST# / GPIO13 SATA3ICOMPO and SATA3COMPI should be connected together then to R440.
Y3
L: 1.8V for VccVRM (for Desktop platform), weak internal pull low R90 SATA5RXN Y1 Trace Impedance= 50-ohm
for HDA_SYNC Potential Leakage Concern SATA5RXP
51_0402_5% AB3 Keep-out to other Signals, especially to CLK= 15-mil
+5VS 2 1 PCH_JTAG_TCK J3 SATA5TXN AB1
JTAG_TCK SATA5TXP
Q4 PAD T10 TP@ PCH_JTAG_TMS H7 Y11 +1.05VS_VTT +3VS
JTAG
2
JTAG_TMS SATAICOMPO
G
RP26 EMC@ LBSS138LT1G_SOT-23-3
1
1 8 HDA_BITCLK_PCH PAD T11 TP@ PCH_JTAG_TDI K5 Y10 SATA_COMP 1 2
39 HDA_BITCLK_AUDIO JTAG_TDI SATAICOMPI
2 7 HDA_SYNC_PCH_R 3 1 HDA_SYNC_PCH R92 37.4_0402_1% R259
39 HDA_SYNC_AUDIO
1
3 6 HDA_RST_PCH# PCH_JTAG_TDO H1
S
PAD T12 TP@ 10K_0402_5%

39 HDA_RST_AUDIO# 4 5 JTAG_TDO AB12 +1.05VS_VTT
HDA_SDOUT_PCH
39 HDA_SDOUT_AUDIO SATA3RCOMPO
2
33_0804_8P4R_5% R95 PCH_SPI_CLK_2 2 XEMC@ 1 AB13 SATA3_COMP 1 2
1M_0402_5% R97 33_0402_5% SATA3COMPI R98 49.9_0402_1% SGEN#
2
1
+3VS PCH_SPI_CLK_1 2 EMC@ 1 PCH_SPI_CLK T3 AH1 RBIAS_SATA3 1 2
3 R99 33_0402_5% SPI_CLK SATA3RBIAS R100 750_0402_1% R258 3
PCH_SPI_CS0# Y14 10K_0402_5%
R101 1 @ 2 1K_0402_5% PCH_SPKR SPI_CS0#
follow design guide 2.0 to cancel series resistor @
PCH_SPI_CS1# T1
SPI
2
SPI_CS1# P3 PCH_SATALED#
No Reboot SATALED# PCH_SATALED# 38
H: enable "No Reboot" mode PCH_SPI_MOSI_2 R151 2 SPI2@ 1 33_0402_5% PCH_SPI_MOSI V4 V14 SGEN#
PCH_SPI_MOSI_1 R159 2 1 33_0402_5% SPI_MOSI SATA0GP / GPIO21
L: disable "No Reboot" mode (default by weak internal PD) PCH_SPI_MISO_1 R160 2 1 33_0402_5% PCH_SPI_MISO U3 P1 PCH_GPIO19
GPIO21
PCH_SPI_MISO_2 R184 2 SPI2@ 1 33_0402_5% SPI_MISO SATA1GP / GPIO19
SGEN#
COUGARPOINT_FCBGA989
PCH@
Switchable GPU 0
HDA_SDOUT_PCH
* Non-Switchable 1
37 HDA_SDOUT_PCH +3VALW_PCH +3VALW_PCH
+3VALW_PCH U16
In accordance with design guide 2.0 page 274, if default
PCH_SPI_CS0# 1 8 +3VS boot destination is SPI, no external pull-up/-down resistors
PCH_SPI_MISO_1 2 CS# VCC 7 SPI_HOLD1# 2 1
Flash Descriptor Security Override /Intel ME Debug Mode R104 1 2 3.3K_0402_5% SPI_WP1# 3 DO HOLD# 6 PCH_SPI_CLK_1 R105 3.3K_0402_5%
on the board are necessary.
1
4 WP# CLK 5 PCH_SPI_MOSI_1
GND DI R106
Boot BIOS Destination Selection
H: enable "ME Debugt" mode 8MB SPI ROM EN25QH64-104HIP_SO8 4.7K_0402_5% @ Routing GTN1#/GPIO51 (BBS1) SATA1GP/GPIO19 (BBS0)
L: disable "ME Debug" mode (default by weak internal PD) SA00006MK00
*
+3VALW_PCH
Reserved 0 1
2
U15 PCH_GPIO19
PCH_SPI_CS1# 1 8 Reserved 1 0
R107 1 SPI2@ 2 3.3K_0402_5% SPI_WP2# 3 CS# VCC 6 PCH_SPI_CLK_2
+3VALW_PCH
R108 1 SPI2@ 2 3.3K_0402_5% SPI_HOLD2# 7 WP# SCLK 5 PCH_SPI_MOSI_2
BIOS request stuff 1023
4 HOLD# SI 2 PCH_SPI_MISO_2
LPC 0 0
GND SO
C141
Reserve for EMI 1MB SPI ROM for Win8 supported S IC FL 8M W25Q80BVSSIG SOIC 8P
* SPI 1 1
4 4
10P_0402_50V8J still use PCB footprint of 4GB ROM (is the same, SPI2@
1 2 2 1 PCH_SPI_CLK
XEMC@ R109 XEMC@ 33_0402_5%
after check spec), but change the part number
for load BOM

Issued Date Deciphered Date PCH (1/9) SATA,HDA,SPI, LPC, XDP
A B C D E
A B C D E
U1010B
PCIE_PRX_DTX_N1 BG34
32 PCIE_PRX_DTX_N1 PERN1
PCIE_PRX_DTX_P1 BJ34 E12 SMB_ALERT#
32 PCIE_PRX_DTX_P1 PERP1 SMBALERT# / GPIO11 SMB_ALERT# 18 +3VALW_PCH
PCIE LAN C145 1 2 0.1U_0402_16V7K PCIE_PTX_DRX_N1 AV32
32 PCIE_PTX_C_DRX_N1 1 2 0.1U_0402_16V7K AU32 PETN1 H14
C144 PCIE_PTX_DRX_P1 PCH_SMBCLK
32 PCIE_PTX_C_DRX_P1 PETP1 SMBCLK PCH_SMBCLK 34
PCIE_PRX_DTX_N2 BE34 C9 PCH_SMBDATA
Directly to WLAN on JMINI1
34 PCIE_PRX_DTX_N2 PCH_SMBDATA 34 RP8
PCIE_PRX_DTX_P2 BF34 PERN2 SMBDATA PCH_SMBCLK 1 8
34 PCIE_PRX_DTX_P2 PERP2
WLAN C143 1 2 0.1U_0402_16V7K PCIE_PTX_DRX_N2 BB32 PCH_SMBDATA 2 7
34 PCIE_PTX_C_DRX_N2 1 2 0.1U_0402_16V7K AY32 PETN2 3 6
C149 PCIE_PTX_DRX_P2 PCH_SML1CLK
SMBUS
34 PCIE_PTX_C_DRX_P2 PETP2 A12 RST_GATE PCH_SML1DATA 4 5
BG36 SML0ALERT# / GPIO60 RST_GATE 6 for S3 Power Reduction
BJ36 PERN3 C8 2.2K_0804_8P4R_5%
AV34 PERP3 SML0CLK RST_GATE R111 1 2 1K_0402_5%
1 PETN3 1
AU34 G12
PETP3 SML0DATA
PCIe Port[8:5] is not supported by HM70 NM70 BF36
BE36 PERN4
+3VS AY34 PERP4 C13 PCH_GPIO74
BB34 PETN4 SML1ALERT# / PCHHOT# / GPIO74 PCH_GPIO74 15
function field : MEMORY (2.3)
R113 2 1 10K_0402_5% MINI1_CLKREQ# PETP4 E14 PCH_SML1CLK
PCI-E*
BG37 SML1CLK / GPIO58 +3VS
BH37 PERN5 M16 PCH_SML1DATA
AY36 PERP5 SML1DATA / GPIO75 R115
+3VALW_PCH Can depop by bios set to GPO BB36 PETN5 4.7K_0402_5%
DRAM on Slot
PETP5
2
1 2
+3VS
BJ38
RP9 @ BG38 PERN6 PCH_SMBDATA 6 1 D_CK_SDATA
D_CK_SDATA 11,12
Controller
1 8 USB_OC4# AU36 PERP6 M7
2 7 USB_OC4# 17 AV36 PETN6 CL_CLK1
PCH_GPIO44 Q5A
3 6 PCH_GPIO46 PETP6 DMN66D0LDW-7_SOT363-6 R116
Link
4 5 PCH_GPIO47 BG40 T11 4.7K_0402_5%
5
BJ40 PERN7 CL_DATA1 1 2
PERP7 +3VS
10K_0804_8P4R_5% AY40
BB40 PETN7 P10 PCH_SMBCLK 3 4
PETP7 CL_RST1# D_CK_SCLK 11,12
RP10 @
1 8 PCH_GPIO45 BE38 Q5B
2 7 PCH_GPIO73 BC38 PERN8 DMN66D0LDW-7_SOT363-6
3 6 PCH_GPIO29 AW38 PERP8
PCH_GPIO29 15 PETN8
4 5 AY38
PETP8
10K_0804_8P4R_5% M10 PCH_GPIO47 +3VS
Y40 PEG_A_CLKRQ# / GPIO47 No use, pull-up with 10K to +3VALW_PCH
Y39 CLKOUT_PCIE0N
CLKOUT_PCIE0P AB37
1. Thermal Sensor for VGA
CLKOUT_PEG_A_N 2. EC
2
CLOCKS
PCH_GPIO73 J2 AB38
No use, pull-up with 10K to +3VALW_PCH PCIECLKRQ0# / GPIO73 CLKOUT_PEG_A_P
2 PCH_SML1DATA 6 1 EC_SMB_DA2 2
EC_SMB_DA2 22,37
AB49 AV22 CLK_CPU_DMI#
34 CLK_PCIE_MINI1# AB47 CLKOUT_PCIE1N CLKOUT_DMI_N AU22 CLK_CPU_DMI# 5
CLK_CPU_DMI Q1006A
34 CLK_PCIE_MINI1 CLKOUT_PCIE1P CLKOUT_DMI_P CLK_CPU_DMI 5
for WLAN(JMIN1) DMN66D0LDW-7_SOT363-6
5
MINI1_CLKREQ# M1
34 MINI1_CLKREQ# PCIECLKRQ1# / GPIO18 AM12 DPLL_REF_CLK#
AA48
CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P
AM13 DPLL_REF_CLK DPLL_REF_CLK# 5
DPLL_REF_CLK 5
for CPU eDP PCH_SML1CLK 3 4 EC_SMB_CK2 EC_SMB_CK2 22,37
AA47 CLKOUT_PCIE2N Q1006B
CLKOUT_PCIE2P BF18 CLK_BUF_CPU_DMI# R114 2 1 10K_0402_5% DMN66D0LDW-7_SOT363-6
PCH_GPIO20 V10 CLKIN_DMI_N BE18 CLK_BUF_CPU_DMI R123 2 1 10K_0402_5%
No use, pull-up with 10K to +3VS 13 PCH_GPIO20 PCIECLKRQ2# / GPIO20 CLKIN_DMI_P
Y37 BJ30 CLKIN_GND1# R127 2 1 10K_0402_5%

32 CLK_PCIE_LAN# CLKOUT_PCIE3N CLKIN_DMI2_N
Y36 BG30 CLKIN_GND1 R130 2 1 10K_0402_5% NOT used in Full Clock Integration mode
32 CLK_PCIE_LAN CLKOUT_PCIE3P CLKIN_DMI2_P
for 10/100 LAN LAN_CLKREQ# A8
18,32 LAN_CLKREQ# PCIECLKRQ3# / GPIO25 G24 CLK_BUF_DREF_96M# R132 2 1 10K_0402_5%
CLKIN_GND1_P (BG30) and CLKIN_GND1_N (BJ30) can
CLKIN_DOT_96N E24 CLK_BUF_DREF_96M R133 2 1 10K_0402_5% share the same PD resistor. <Design Guide 2.0 Page 395>
Y43 CLKIN_DOT_96P
Y45 CLKOUT_PCIE4N
CLKOUT_PCIE4P AK7 CLK_BUF_PCIE_SATA# R134 2 1 10K_0402_5%
No use, pull-up with 10K to +3VALW_PCH PCH_GPIO26 L12 CLKIN_SATA_N / CKSSCD_N AK5 CLK_BUF_PCIE_SATA 2 1 10K_0402_5%
18 PCH_GPIO26 R139
PCIECLKRQ4# / GPIO26 CLKIN_SATA_P / CKSSCD_P
V45 K45 CLK_BUF_ICH_14M R117 1 2 10K_0402_5%

V46 CLKOUT_PCIE5N REFCLK14IN
CLKOUT_PCIE5P
No use, pull-up with 10K to +3VALW_PCH PCH_GPIO44 L14 H45 CLK_PCI_LPBACK
PCIECLKRQ5# / GPIO44 CLKIN_PCILOOPBACK 2 XEMC@ 1 1 2 CLK_PCI_LPBACK 17
R118 33_0402_5% C146 22P_0402_50V8J
AB42 V47 XTAL25_IN XEMC@ XTAL25_IN
22 CLK_PEG_VGA# CLKOUT_PEG_B_N XTAL25_IN
AB40 V49 XTAL25_OUT
3
22 CLK_PEG_VGA CLKOUT_PEG_B_P XTAL25_OUT Reserved for EMI, need to place as close as possible to PCH ball. XTAL25_OUT 1 2 3
VGA_CLKREQ# E6 R120 +1.05VS_VTT R119 1M_0402_5%
22 VGA_CLKREQ# PEG_B_CLKRQ# / GPIO56 90.9_0402_1%
Y47 XCLK_RCOMP 1 2 25MHZ_10PF_7V25000014
V40 XCLK_RCOMP
V42 CLKOUT_PCIE6N 3 1
CLKOUT_PCIE6P 3 1
Need to inform BIOS team to configure it, GND GND
PCH_GPIO45 T13
No use, pull-up with 10K to +3VALW_PCH PCIECLKRQ6# / GPIO45 follow ME FW Bring Up Guide. 1 1
V38 K43 CLK_FLEX0 TP@ C147 4 Y2 2 C148
CLKOUT_PCIE7N CLKOUTFLEX0 / GPIO64 T14 PAD
V37 10P_0402_50V8J 10P_0402_50V8J
FLEX CLOCKS
CLKOUT_PCIE7P F47 CLK_FLEX1 TP@ 2 2

CLKOUTFLEX1 / GPIO65 T13 PAD
PCH_GPIO46 K12
No use, pull-up with 10K to +3VALW_PCH PCIECLKRQ7# / GPIO46 H47 CLK_FLEX2 TP@
CLKOUTFLEX2 / GPIO66 T15 PAD
AK14
AK13 CLKOUT_BCLK0_N / CLKOUT_PCIE8N K49 DGPU_PRSNT#
CLKOUT_BCLK0_P / CLKOUT_PCIE8P CLKOUTFLEX3 / GPIO67
+3VS
PCH@
2
R122
+3VALW_PCH 10K_0402_5%
UMAO@
DGPU_PRSNT#
2 1
1
R126 R124
10K_0402_5% 10K_0402_5%
VGA@
2
1
VGA_CLKREQ#
1
4 4
R125
10K_0402_5%
@
2

Issued Date Deciphered Date PCH (2/9) PCIE, SMBUS, CLK
A B C D E
A B C D E
U1010C
DMI_CTX_PRX_N0 BC24 BJ14 FDI_CTX_PRX_N0

+3VALW_PCH 4 DMI_CTX_PRX_N0 DMI0RXN FDI_RXN0 FDI_CTX_PRX_N0 4 +RTCVCC
DMI_CTX_PRX_N1 BE20 AY14 FDI_CTX_PRX_N1
4 DMI_CTX_PRX_N1 DMI1RXN FDI_RXN1 FDI_CTX_PRX_N1 4
DMI_CTX_PRX_N2 BG18 BE14 FDI_CTX_PRX_N2
1 4 DMI_CTX_PRX_N2 DMI2RXN FDI_RXN2 FDI_CTX_PRX_N2 4 1
DMI_CTX_PRX_N3 BG20 BH13 FDI_CTX_PRX_N3
4 DMI_CTX_PRX_N3 DMI3RXN FDI_RXN3 FDI_CTX_PRX_N3 4
BC12 FDI_CTX_PRX_N4 DSWODVREN R129 2 1 330K_0402_5%
FDI_RXN4 FDI_CTX_PRX_N4 4
DMI_CTX_PRX_P0 BE24 BJ12 FDI_CTX_PRX_N5
4 DMI_CTX_PRX_P0 DMI0RXP FDI_RXN5 FDI_CTX_PRX_N5 4
R128 2 1 200K_0402_5% PCH_ACIN
4 DMI_CTX_PRX_P1
DMI_CTX_PRX_P1 BC20 BG10 FDI_CTX_PRX_N6
FDI_CTX_PRX_N6 4
DMI_CTX_PRX_P2 BJ18 DMI1RXP FDI_RXN6 BG9 FDI_CTX_PRX_N7
4 DMI_CTX_PRX_P2 DMI2RXP FDI_RXN7 FDI_CTX_PRX_N7 4
DMI_CTX_PRX_P3 BJ20
4 DMI_CTX_PRX_P3 DMI3RXP BG14 FDI_CTX_PRX_P0
FDI_RXP0 FDI_CTX_PRX_P0 4
DMI_CRX_PTX_N0 AW24 BB14 FDI_CTX_PRX_P1
2 1 200_0402_5% PM_DRAM_PWRGD
4 DMI_CRX_PTX_N0
DMI_CRX_PTX_N1 AW20 DMI0TXN FDI_RXP1 BF14 FDI_CTX_PRX_P2
FDI_CTX_PRX_P1 4 DSWODVREN - On Die DSW VR Enable
R131 FDI_CTX_PRX_P2 4
4 DMI_CRX_PTX_N1 BB18 DMI1TXN FDI_RXP2 BG13
DMI_CRX_PTX_N2 FDI_CTX_PRX_P3 * H: Enable On Die DSW VR
4 DMI_CRX_PTX_N2 DMI2TXN FDI_RXP3 FDI_CTX_PRX_P3 4
DMI_CRX_PTX_N3 AV18 BE12 FDI_CTX_PRX_P4
FDI_CTX_PRX_P4 4 L: Disable On Die DSW VR
DMI
FDI
4 DMI_CRX_PTX_N3 DMI3TXN FDI_RXP4 BG12
RP24 FDI_CTX_PRX_P5
FDI_RXP5 FDI_CTX_PRX_P5 4
1 8 PCH_GPIO74 DMI_CRX_PTX_P0 AY24 BJ10 FDI_CTX_PRX_P6
PCH_GPIO74 14 4 DMI_CRX_PTX_P0 DMI0TXP FDI_RXP6 FDI_CTX_PRX_P6 4
2 7 RI# DMI_CRX_PTX_P1 AY20 BH9 FDI_CTX_PRX_P7
4 DMI_CRX_PTX_P1 DMI1TXP FDI_RXP7 FDI_CTX_PRX_P7 4
3 6 PCH_PCIE_WAKE# DMI_CRX_PTX_P2 AY18
4 5 4 DMI_CRX_PTX_P2 AU18 DMI2TXP
PCH_RSMRST# DMI_CRX_PTX_P3
4 DMI_CRX_PTX_P3 DMI3TXP AW16 FDI_INT
FDI_INT FDI_INT 4
10K_0804_8P4R_5%
BJ24 AV12 FDI_FSYNC0
DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 4
1 2 DMI_IRCOMP BG25 BC10 FDI_FSYNC1
+1.05VS_VTT DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 4
R135 49.9_0402_1%
1 2 DMI2RBIAS BH21 AV14 FDI_LSYNC0
DMI2RBIAS FDI_LSYNC0 FDI_LSYNC0 4
Ball BJ24 and Ball BG25 should be short together then R136 750_0402_1%
BB10 FDI_LSYNC1
be connected R134, no longer then 500-mil. FDI_LSYNC1 FDI_LSYNC1 4
A18 DSWODVREN
DSWVRMEN
System Power Management

TP@ T23 PAD SUSACK# C12 E22 PCH_RSMRST#
SUSACK# DPWROK Let DPWROK connect to RSMRST# since DS3 is not supported
2 2
XDP_DBRESET# K3 B9 PCH_PCIE_WAKE#
5 XDP_DBRESET# SYS_RESET# WAKE#
SYS_PWROK P12 N3 PCH_GPIO32

SYS_PWROK CLKRUN# / GPIO32
L22 G8 SUS_STAT# PAD T16 TP@

PWROK SUS_STAT# / GPIO61
PCH_PWROK L10 N14 PAD T29 TP@

APWROK SUSCLK / GPIO62 Can depop by bios set to GPO +3VS
PAD T17 TP@
PM_DRAM_PWRGD B13 D10 PM_SLP_S5# PCH_GPIO32 R137 1 @ 2 8.2K_0402_5%
5 PM_DRAM_PWRGD DRAMPWROK SLP_S5# / GPIO63 PM_SLP_S5# 37
PAD T18 TP@
PCH_RSMRST# C21 H4 PM_SLP_S4#
37 PCH_RSMRST# RSMRST# SLP_S4# PM_SLP_S4# 37
PAD T19 TP@
SUSWARN# K16 F4 PM_SLP_S3#
17 SUSWARN# SUSWARN# / SUS_PWR_DN_ACK / GPIO30 SLP_S3# PM_SLP_S3# 37
PBTN_OUT# E20 G10 SLP_A# PAD T20 TP@

37 PBTN_OUT# PWRBTN# SLP_A#
D4
1 2 PCH_ACIN H20 G16 SLP_SUS# PAD T21 TP@
37,44 ACIN ACPRESENT / GPIO31 SLP_SUS#
RB751V-40_SOD323-2 PAD T22 TP@
No use, pull-up with 10K to +3VALW_PCH PCH_GPIO72 E10 AP14 H_PM_SYNC
17 PCH_GPIO72 BATLOW# / GPIO72 PMSYNCH H_PM_SYNC 5
RI# A10 K14 PCH_GPIO29

RI# SLP_LAN# / GPIO29 PCH_GPIO29 14 PU resistor is reserved but no stuff first
3 3
PCH@
+3VS
5
U17
2
P
37 PCH_PWROK B 4 SYS_PWROK
1 Y SYS_PWROK 5
37,49 VGATE A
G
1
MC74VHC1G08DFT2G_SC70-5
3
R142 R143
@ 10K_0402_5%
10K_0402_5%
2
4 4

Issued Date Deciphered Date PCH (3/9) DMI,FDI,PM
A B C D E
A B C D E
1 @ 2
R179 100K_0402_5%
+3VS RP12 1 2
R172 100K_0402_5%
1 8 CTRL_CLK U1010D
2 7 PCH_LCD_CLK ENBKL J47 AP43
1
3 6 CTRL_DATA 37 ENBKL PCH_ENVDD M45 L_BKLTEN SDVO_TVCLKINN AP45 1
29 PCH_ENVDD L_VDD_EN SDVO_TVCLKINP
4 5 PCH_LCD_DATA
DPST_PWM P45 AM42
29 DPST_PWM L_BKLTCTL SDVO_STALLN AM40
2.2K_0804_8P4R_5%
PCH_LCD_CLK T40 SDVO_STALLP
29 PCH_LCD_CLK K47 L_DDC_CLK AP39
PCH_LCD_DATA
29 PCH_LCD_DATA L_DDC_DATA SDVO_INTN AP40
CTRL_CLK T45 SDVO_INTP
CTRL_DATA P39 L_CTRL_CLK
2.37K_0402_1% L_CTRL_DATA
R138 2 1 LVDS_IBG AF37 P38 SDVO_SCLK
AF36 LVD_IBG SDVO_CTRLCLK M39 SDVO_SCLK 30
SDVO_SDATA
LVD_VBG SDVO_CTRLDATA SDVO_SDATA 30
should be placed as close as possible to PCH. AE48
AE47 LVD_VREFH AT49
LVD_VREFL DDPB_AUXN AT47
DDPB_AUXP AT40 PCH_DPB_HPD
AK39 DDPB_HPD PCH_DPB_HPD 30
PCH_TXCLK-
LVDS
29 PCH_TXCLK- LVDSA_CLK#
PCH_TXCLK+ AK40 AV42 PCH_DPB_N0
29 PCH_TXCLK+ LVDSA_CLK DDPB_0N AV40 PCH_DPB_N0 30
PCH_DPB_P0
AN48 DDPB_0P AV45 PCH_DPB_P0 30
PCH_TXOUT0- PCH_DPB_N1
29 PCH_TXOUT0- AM47 LVDSA_DATA#0 DDPB_1N AV46 PCH_DPB_N1 30
PCH_TXOUT1- PCH_DPB_P1
Digital Display Interface

29 PCH_TXOUT1- AK47 LVDSA_DATA#1 DDPB_1P AU48 PCH_DPB_P1 30
PCH_TXOUT2- PCH_DPB_N2
29 PCH_TXOUT2- AJ48 LVDSA_DATA#2 DDPB_2N AU47 PCH_DPB_N2 30
PCH_DPB_P2
LVDSA_DATA#3 DDPB_2P AV47 PCH_DPB_P2 30
PCH_DPB_N3
AN47 DDPB_3N AV49 PCH_DPB_N3 30
PCH_TXOUT0+ PCH_DPB_P3
29 PCH_TXOUT0+ AM49 LVDSA_DATA0 DDPB_3P PCH_DPB_P3 30
PCH_TXOUT1+
29 PCH_TXOUT1+ LVDSA_DATA1
PCH_TXOUT2+ AK49
29 PCH_TXOUT2+ LVDSA_DATA2
AJ47 P46
LVDSA_DATA3 DDPC_CTRLCLK P42
DDPC_CTRLDATA
AF40
AF39 LVDSB_CLK# AP47
2 LVDSB_CLK DDPC_AUXN AP49 2
AH45 DDPC_AUXP AT38
If the LVDS interface is not implemented, AH47 LVDSB_DATA#0 DDPC_HPD
all signals associated with the interface can AF49 LVDSB_DATA#1 AY47
be left as No Connects. AF45 LVDSB_DATA#2 DDPC_0N AY49
The supply pins VCCTX_LVDS and VCCA_LVD can be connected to LVDSB_DATA#3 DDPC_0P AY43
ground. AH43 DDPC_1N AY45
DG 471984 P.193 AH49 LVDSB_DATA0 DDPC_1P BA47
AF47 LVDSB_DATA1 DDPC_2N BA48
AF43 LVDSB_DATA2 DDPC_2P BB47
LVDSB_DATA3 DDPC_3N BB49
DDPC_3P
By 3/11
RP13 PCH_CRT_B N48 M43
31 PCH_CRT_B CRT_BLUE DDPD_CTRLCLK
8 1 PCH_CRT_G P49 M36
31 PCH_CRT_G CRT_GREEN DDPD_CTRLDATA
7 2 PCH_CRT_B PCH_CRT_R T49
6 3 31 PCH_CRT_R CRT_RED
PCH_CRT_G
5 4 PCH_CRT_R AT45
CRT
PCH_CRT_CLK T39 DDPD_AUXN AT43
31 PCH_CRT_CLK M40 CRT_DDC_CLK DDPD_AUXP BH41
150_0804_8P4R_1% PCH_CRT_DATA
31 PCH_CRT_DATA CRT_DDC_DATA DDPD_HPD
BB43
M47 DDPD_0N BB45
31 PCH_CRT_HSYNC CRT_HSYNC DDPD_0P
should be placed as close M49 BF44
31 PCH_CRT_VSYNC CRT_VSYNC DDPD_1N BE44
as possible to PCH. DDPD_1P BF42
CRT_IREF T43 DDPD_2N BE42
T42 DAC_IREF DDPD_2P BJ42
CRT_IRTN DDPD_3N BG42
1
DDPD_3P
R152 PCH@
1K_0402_0.5%
3 3
2
should be placed as close as possible to PCH T43,
and keep the trace is at least 30-mil away from other
siganls (especially clocks).
4 4

Issued Date Deciphered Date PCH (4/9) LVDS,CRT,DP,HDMI
A B C D E
A B C D E
+3VS
Can depop by bios set to GPO
U1010E
RP20 @ AY7
8 1 PCH_GPIO5 NV_CE#0 AV7
7 2 PCH_GPIO51 BG26 NV_CE#1 AU3
6 3 PCH_GPIO52 BJ26 TP1 NV_CE#2 BG4
5 4 PCH_GPIO55 BH25 TP2 NV_CE#3
BJ16 TP3 AT10 EDS
10K_0804_8P4R_5% BG16 TP4 NV_DQS0 BC8 Processor Select: This pin is an output that indicates if the
AH38 TP5 NV_DQS1 processor used is Sandy Bridge or Ivy Bridge.
AH37 TP6 AU2 For Sandy Bridge the output will be high, and for Ivy Bridge the
AK43 TP7 NV_DQ0 / NV_IO0 AT4 output will be low
AK45 TP8 NV_DQ1 / NV_IO1 AT3
1 TP9 NV_DQ2 / NV_IO2 1
C18 AT1 DG
N30 TP10 NV_DQ3 / NV_IO3 AY3
DMI,FDI Termination Voltage Sandy Bridge + Ivy Bridge Compatible:
H3 TP11 NV_DQ4 / NV_IO4 AT5 Connect DF_TVS signal of the PCH to PROC_SELECT# of the
AH12 TP12 NV_DQ5 / NV_IO5 AV3
PU, Set to 1 HR CPU NC processor through a 1K±5% series resistor. PROC_SELECT#
TP13 NV_DQ6 / NV_IO6 DF_TVS
NVRAM
AM4 AV1 also needs a 2.2K±5% pull up resistor to PCH VccDFTERM rail.
AM5 TP14 NV_DQ7 / NV_IO7 BB1
PD, Set to 0 CR CPU PD
RP16
8 1 PCI_PIRQB# Y13 TP15 NV_DQ8 / NV_IO8 BA3
7 2 PCI_PIRQA# K24 TP16 NV_DQ9 / NV_IO9 BB5 +1.8VS
6 3 PCI_PIRQD# L24 TP17 NV_DQ10 / NV_IO10 BB3
5 4 PCI_PIRQC# AB46 TP18 NV_DQ11 / NV_IO11 BB7
1
AB45 TP19 NV_DQ12 / NV_IO12 BE8
RSVD
10K_0804_8P4R_5% TP20 NV_DQ13 / NV_IO13 BD4 R154
NV_DQ14 / NV_IO14 BF6 2.2K_0402_5%
1 2 PCH_GPIO4 NV_DQ15 / NV_IO15
R158 10K_0402_5% B21 AV5
2
1 2 PCH_GPIO54 M20 TP21 NV_ALE AY1 DF_TVS R156 2 1 1K_0402_5%
TP22 NV_CLE H_SNB_IVB# 5
R155 10K_0402_5% AY16
1 2 PCH_GPIO50 BG46 TP23 AV10
R153 10K_0402_5% TP24 NV_RCOMP
AT8
NV_RB#
PCH_USB3_RX0_N BE28 AY5
36 PCH_USB3_RX0_N TP25 NV_RE#_WRB0
BC30 BA2
BE32 TP26 NV_RE#_WRB1
BJ32 TP27 AT12
PCH_USB3_RX0_P BC28 TP28 NV_WE#_CK0 BF3
In accordance with design guide 2.0 page 274, if default 36 PCH_USB3_RX0_P
BE30 TP29 NV_WE#_CK1
boot destination is SPI, no external pull-up/-down resistors BF32 TP30 Port 0 to Port 7 resides EHCI1
BG32 TP31 C24 USB20_N0
on the board are necessary. PCH_USB3_TX0_N AV26 TP32 USBP0N A24 USB20_P0
USB20_N0 36
36 PCH_USB3_TX0_N BB26 TP33 USBP0P C25 USB20_N1 USB20_P0 36 MB USB 3.0 Connector (JUSB1)
Boot BIOS Destination Selection AU28 TP34 USBP1N B25 USB20_P1
USB20_N1 36
AY30 TP35 USBP1P C26 USB20_N2
USB20_P1 36 USB2.0 Sub/B
2 Routing GTN1#/GPIO51 (BBS1) SATA1GP/GPIO19 (BBS0) PCH_USB3_TX0_P AU26 TP36 USBP2N A26 USB20_P2
USB20_N2 36 2
36 PCH_USB3_TX0_P
AY26 TP37 USBP2P K28 USB20_N3
USB20_P2 36 USB2.0 Sub/B
Reserved 0 1 AV28 TP38 USBP3N H28 USB20_P3
USB20_N3 29 +3VALW_PCH
AW30 TP39 USBP3P E28 USB20_P3 29 Touch Screen
Reserved 1 0 TP40 USBP4N D28
USBP4P C28
Port 4, Port 5, Port 6, Port 7, Port 12 and Port 13 is not
LPC 0 0 USBP5N A28 supported by HM70 NM70
USBP5P C29 Can depop by bios set to GPO
* SPI 1 1 USBP6N B29
PCI_PIRQA# K40 USBP6P N28 RP21 @
PCI_PIRQB# K38 PIRQA# USBP7N M28
Port 8 to Port 13 resides EHCI2 PCH_GPIO12 1 8
PCI
H38 PIRQB# USBP7P L30 18 PCH_GPIO12 2 7
PCI_PIRQC# USB20_N8 PCH_GPIO24
G38 PIRQC# USBP8N K30 USB20_N8 34 18 PCH_GPIO24 3 6
PCI_PIRQD# USB20_P8 Mini Card (WLAN) PCH_GPIO57
PIRQD# USBP8P G30 USB20_P8 34 18 PCH_GPIO57 4 5
PCH_GPIO72
USBP9N 15 PCH_GPIO72
PCH_GPIO50 C46 E30
USB
PCH_GPIO52 C44 REQ1# / GPIO50 USBP9P C30 USB20_N10 10K_0804_8P4R_5%
E40 REQ2# / GPIO52 USBP10N A30 USB20_N10 29
PCH_GPIO54 USB20_P10 CMOS Camera (LVDS)
REQ3# / GPIO54 USBP10P L32 USB20_P10 29
RP19
PCH_GPIO51 D47 USBP11N K32 1 8
E42 GNT1# / GPIO51 USBP11P G32 USB_OC6# 2 7
PCH_GPIO55 F46 GNT2# / GPIO53 USBP12N E32 USB_OC7# 3 6
GNT3# / GPIO55 USBP12P Connect USBRBIAS and USBRBIAS# (impedance= 50-ohm
C32 SUSWARN# 4 5
USBP13N A32 single-end) together first, then connect to R158 from USBRBIAS# 15 SUSWARN#
G42 USBP13P (no longer than 500-mil). Keep-out 15-mil to other signals. 10K_0804_8P4R_5%
G40 PIRQE# / GPIO2
PCH_GPIO4 C42 PIRQF# / GPIO3 C33 USBRBIAS 1 2
PCH_GPIO5 D44 PIRQG# / GPIO4 USBRBIAS# R161 22.6_0402_1% RP36 @
PIRQH# / GPIO5 USB_OC1# 1 8
B33 USB_OC3# 2 7
PAD T25 TP@ K10 USBRBIAS USB_OC5# 3 6
PME# Can depop by bios set to GPO USB_OC2# 4 5
PLT_RST# C6 A14 USB_OC0#
37,5 PLT_RST# PLTRST# OC0# / GPIO59 USB_OC0# 18,36
K20 USB_OC1# 10K_0804_8P4R_5%
3 OC1# / GPIO40 B17 USB_OC2# 3
CLK_PCI_LPBACK R164 2 EMC@ 1 22_0402_5% CLK_PCI0 H49 OC2# / GPIO41 C16 USB_OC3#
14 CLK_PCI_LPBACK 1 EMC@ 2 22_0402_5% H43 CLKOUT_PCI0 OC3# / GPIO42 L16
CLK_PCI_LPC R162 CLK_PCI1 USB_OC4#
37 CLK_PCI_LPC J48 CLKOUT_PCI1 OC4# / GPIO43 A16 USB_OC4# 14
CLK_PCI2 USB_OC5#
PAD T24 TP@ CLK_PCI3 K42 CLKOUT_PCI2 OC5# / GPIO9 D14 USB_OC6#
PAD T26 TP@ CLK_PCI4 H40 CLKOUT_PCI3 OC6# / GPIO10 C14 USB_OC7#
PAD T27 TP@ CLKOUT_PCI4 OC7# / GPIO14
PCH@
+3VS
HM77 HM70 NM70 Note
5
U18 USB2.0 14 8 8 HM70/NM70 USB port 4, 5, 6,7,12 and 13 are disabled on 8 port SKUs.
PLT_RST# 2
P
B 4
1 Y PLT_RST_BUF# 32,34 USB 3.0 port 3 and 4 are disabled on HM70
USB3.0 4 2 0
1
A
G
USB 3.0 are all disabled on NM70

R163
3
100K_0402_5% PCIE 8 4 4 HM70/NM70 PCIe port 5–8 are disabled on this SKU.
MC74VHC1G08DFT2G_SC70-5 HM70/NM70 SATA port 1 and 3 are disabled on 4 port SKUs.
2
+3VS
SATA 6 4 4 HM70/NM70 SATA 6 Gb/s support on port 0 only. SATA port 0 also supports 3 Gb/s & 1.5 Gb/s
HM77 SATA 6 Gb/s support on port 0 & port 1. SATA port 0 and 1 also support 3 Gb/s & 1.5 Gb/s.
5
U19
4 2 4
P
B 4
1 Y PLTRST_VGA# 22
DGPU_HOLD_RST#
37 DGPU_HOLD_RST#
1
A
G
VGA@ R165
3
MC74VHC1G08DFT2G_SC70-5 100K_0402_5%
VGA@
2

Issued Date Deciphered Date PCH (5/9) PCI, USB, NVRAM
A B C D E
A B C D E
For common BIOS code

+3VS +3VS +3VS Project ID GPIO68 GPIO69 GPIO70
+3VALW_PCH Q5WE0 1 0 0
On-Die PLL Voltage Regulator
1
for VccVRM Q7YE0 1 0 1
R174 R166 R167
1
* H: enable On-Die PLL Voltage Regulator 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ Q5Wxx-QC 1 1 0

R168
L: disable On-Die PLL Voltage Regulator
4.7K_0402_5% V5VT1 1 1 1
2
PCH_GPIO68 PCH_GPIO69 PCH_GPIO70
*Z5WE1_CR 0 0 0
2
2
PCH_GPIO28
R178 R169 R170
1 1
10K_0402_5% 10K_0402_5% 10K_0402_5%
1
U1010F
PCH_GPIO0 T7 C40 PCH_GPIO68

No use, pull-up with 10K to +3VS BMBUSY# / GPIO0 TACH4 / GPIO68
+3VALW_PCH PCH_GPIO1 A42 B41 PCH_GPIO69
No use, pull-up with 10K to +3VS TACH1 / GPIO1 TACH5 / GPIO69
R171 1 @ 2 10K_0402_5% PCH_GPIO6 H36 C41 PCH_GPIO70
R173 1 @ 2 10K_0402_5% PCH_GPIO27
No use, pull-up with 10K to +3VS TACH2 / GPIO6 TACH6 / GPIO70
EC_SCI# E38 A40 PCH_GPIO71 For eDP/LVDS detect
37 EC_SCI# TACH3 / GPIO7 TACH7 / GPIO71 PCH_GPIO71 29
EC_SMI# C10
37 EC_SMI# GPIO8
PCH_GPIO12 C4 R177 2 1 10K_0402_5%
No use, pull-up with 10K to +3VALW_PCH 17 PCH_GPIO12 LAN_PHY_PWR_CTRL / GPIO12 +3VS
EC_LID_OUT# G2 P4
+3VS 37 EC_LID_OUT# GPIO15 A20GATE GATEA20 37
TP@
AU16 T42 PAD
CPU/MISC
PCH_GPIO16 U2 PECI
1 2 EC_KBRST#
No use, pull-up with 10K to +3VS SATA4GP / GPIO16 P5 EC_KBRST#
R175 10K_0402_5% Ctrl+Alt+Del
1 2 RCIN# EC_KBRST# 37
R180 10K_0402_5% PCH_GPIO1
GPIO
R182 1 2 10K_0402_5% EC_SCI# R110 1 @ 2 0_0402_5% D40 AY11
37,50 VGA_PWROK TACH0 / GPIO17 PROCPWRGD H_CPUPWRGD 5
R183 1 2 10K_0402_5% PCH_GPIO16
PCH_GPIO22 T5 AY10 PCH_THRMTRIP#_R 1 2 H_THRMTRIP#
On Board DRAM Flag SCLOCK / GPIO22 THRMTRIP# R181 390_0402_5%
H_THRMTRIP# 5
PCH_GPIO24 E8 T14
No use, pull-up with 10K to +3VALW_PCH 17 PCH_GPIO24 GPIO24 / MEM_LED INIT3_3V#
PCH_GPIO27 E16
GPIO27
PCH_GPIO28 P8
2 GPIO28 AH8 2
T40 TP@ PAD K1 NC_1
STP_PCI# / GPIO34 AK11
T30 TP@ PAD K4 NC_2
GPIO35 AH10
T43 TP@ PAD V8 NC_3
SATA2GP / GPIO36 AK10
T44 TP@ PAD M5 NC_4
SATA3GP / GPIO37 P37
OPTIMUS_EN# N2 NC_5
SLOAD / GPIO38
On Board DRAM Flag PCH_GPIO39 M3
SDATAOUT0 / GPIO39
PCH_GPIO48 V13 BG2
On Board DRAM Flag SDATAOUT1 / GPIO48 VSS_NCTF_15
T45 TP@ PAD V3 BG48
SATA5GP / GPIO49 VSS_NCTF_16
PCH_GPIO57 D6 BH3
+3VALW_PCH
No use, pull-up with 10K to +3VALW_PCH 17 PCH_GPIO57 GPIO57 VSS_NCTF_17
BH47
VSS_NCTF_18
A4 BJ4
R186 1 2 1K_0402_5% EC_SMI# VSS_NCTF_1 VSS_NCTF_19
A44 BJ44
VSS_NCTF_2 VSS_NCTF_20
use pull up to +3V_LAN A45 BJ45
R188 1 @ 2 10K_0402_5% LAN_CLKREQ# VSS_NCTF_3 VSS_NCTF_21
NCTF
LAN_CLKREQ# 14,32 A46 BJ46
R187 1 2 1K_0402_5% EC_LID_OUT# A5 BJ5
RP29 A6 BJ6
1 8 PCH_GPIO26 VSS_NCTF_6 VSS_NCTF_24
2 7 PCH_GPIO26 14 B3 C2
3 USB_OC0# 3
USB_OC0# 17,36 VSS_NCTF_7 VSS_NCTF_25
3 6 SMB_ALERT#
4 5 SMB_ALERT# 14 B47 C48 Can depop by bios set to GPO
10K_0804_8P4R_5% BD1 D1
in accordance with Chief River check list 1.7, BD49 D49 +3VS
when Unused as GPIO or SATA*GP Use VSS_NCTF_10 VSS_NCTF_28 RP35 @
BE1 E1 PCH_GPIO48 1 8
8.2K-10K pull-down to ground VSS_NCTF_11 VSS_NCTF_29 PCH_GPIO0 2 7
BE49 E49 PCH_GPIO22 3 6
VSS_NCTF_12 VSS_NCTF_30 PCH_GPIO39 4 5
+3VS BF1 F1
VSS_NCTF_13 VSS_NCTF_31 10K_0804_8P4R_5%
BF49 F49
R623 1 @ 2 10K_0402_5% OPTIMUS_EN# VSS_NCTF_14 VSS_NCTF_32
R639 1 VGA@ 2 10K_0402_5% PCH@
+3VS
PCH_GPIO6 1 @ 2
R189
10K_0402_5%
GPIO38
OPTIMUS_EN#
* OPTIMUS 0
DIS Only 1
4 4

Issued Date Deciphered Date PCH (6/9) GPIO, CPU, MISC
A B C D E
A B C D E
SM010014520 3000ma 220ohm@100mhz DCR 0.04 Refer to IntelR 7 Series / C216 Chipset Family Platform Controller Hub (PCH) External Design Specification
+1.05VS_VTT U1010G POWER Be close to ball U48 +3VS (EDS) Revision 2.1
1.61A L1
Be close to ball AA23 FBMA-L11-201209-221LMA30_2P
AA23 U48 +VCCADAC 2 1 PCH Power Rail Table
AC23 VCCCORE[1] VCCADAC
AD21 VCCCORE[2] 1 1 1 S0 Iccmax
CRT
C154 C155 C156 Voltage Rail Voltage
VCCCORE[3] Current(A)
10U_0603_6.3V6M
C151
1U_0402_6.3V6K
C152
1U_0402_6.3V6K
C153
1U_0402_6.3V6K
C158
1 1 1 1 AD23 U47 10U_0603_6.3V6M
AF21 VCCCORE[4] VSSADAC 0.01U_0402_16V7K 0.1U_0402_16V7K
VCC CORE
AF23 VCCCORE[5] 2 2 2
AG21 VCCCORE[6] +3VS V_PROC_IO 1.05 0.002 Processor I/O
1 2 2 2 2 VCCCORE[7] 1
AG23
AG24 VCCCORE[8] AK36 +VCCA_LVDS R366 2 LVDS@ 1 0_0603_5%
AG26 VCCCORE[9] VCCALVDS V5REF 5 0.001 PCH Core Well Reference Voltage
R367 2 EDP@ 1 0_0603_5%
AG27 VCCCORE[10] AK37 +1.8VS
AG29 VCCCORE[11] VSSALVDS LVDS@ L34
AJ23 VCCCORE[12] Be close to ball AM37 V5REF_Sus 5 0.001 Suspend Well Reference Voltag
0.1UH_MLF1608DR10KT_10%_1608
LVDS
AJ26 VCCCORE[13] AM37 +VCCTX_LVDS 2 1
AJ27 VCCCORE[14] VCCTX_LVDS[1]
VCCCORE[15] Vcc3_3 3.3 0.178 I/O Buffer Voltage
0.01U_0402_16V7K
0.01U_0402_16V7K
22U_0805_6.3V6M
AJ29 AM38 1 1 1 0.1uH inductor, 200mA
2
AJ31 VCCCORE[16] VCCTX_LVDS[2]
VCCCORE[17] Display DAC Analog Power. This power is
C328
AP36 R365
+1.05VS_VTT VCCTX_LVDS[3] LVDS@ LVDS@ LVDS@
VccADAC 3.3 0.063 supplied by the core well.
0_0603_5%
AP37 2 2 2 EDP@
VCCTX_LVDS[4]
C341
C340
AN19
VccADPLLA 1.05 0.075 Display PLL A power
1
VCCIO[28]
PAD TP@ +VCCAPLLEXP BJ22 +3VS VccVRM voltage supplies for

T31 VCCAPLLEXP VccADPLLB 1.05 0.075 Display PLL B power
V33
1. VccACLK
3.8A
HVCMOS
AN16 VCC3_3[6]
Be close to ball V33 2. VccAFDIPLL VccCore 1.05 1.73 Internal Logic Voltage
VCCIO[15]
AN17
1 3. VccAPLLEXP
VCCIO[16] V34 C160 4. VccaPLLDMI2
VCC3_3[7] VccDMI 1.05 0.047 DMI Voltage
AN21 2
0.1U_0402_16V7K 5. VccAPLLSATA
VCCIO[17]
AN26 +1.5VS VccIO 1.05 3.799 Core Well I/O buffers
VCCIO[18]
AN27 AT16
1.05 V Supply for Intel Management Engine
VCCIO[19] VCCVRM[3] VccASW 1.05 0.803 and Integrated LAN
+1.05VS_VTT AP21 +1.05VS_VTT
Be close to ball AN21, AN16 and AN33 VCCIO[20]
AP23 AT20
VccSPI 3.3 0.01 3.3 V Supply for SPI Controller Logic
2 VCCIO[21] VCCDMI[1] 2
1 CAP shared with AU20,
DMI
10U_0603_6.3V6M
C164
1U_0402_6.3V6K
C162
1U_0402_6.3V6K
C163
1U_0402_6.3V6K
C172
1U_0402_6.3V6K
C171
AP24 +1.05VS_VTT C166

1 1 1 1 1 VccDSW3_3 3.3 0.001 3.3v supply for Deep Sx well
VCCIO
VCCIO[22] 1U_0402_6.3V6K but should be close to AT20
AP26 AB36
VCCIO[23] VCCIO[1] 2 VccDFTERN
2 2 2 2 2 AT24
1 (VccPNAND) 1.8 0.002 1.8V power supply for DF_TVS
C167
VCCIO[24] 1U_0402_6.3V6K
AN33 2 VccRTC 3.3 6 uA RTC Battery Voltage

VCCIO[25]
AN34 AG16
+3VS VCCIO[26] VCCPNAND[1] +1.8VS VccSus3_3 3.3 0.065 Suspend Well I/O Buffer Voltage
Be close to ball BH29
0.178A High Definition Audio Controller Suspend
NAND / SPI
BH29 AG17
VCC3_3[3] VCCPNAND[2] Be close to AG16 VccSusHDA 3.3 0.01 Voltage
1 1
C168 C169
0.1U_0402_16V7K +1.5VS AJ16 0.1U_0402_16V7K
VCCPNAND[3] VccVRM 1.5 0.147 1.5 V Internal PLL and VRMs
2 AP16 2
VCCVRM[2] AJ17
VCCPNAND[4] VccCLKDMI 1.05 0.075 DMI differential Clock Buffer Voltage
PAD +1.05VS_VCCAPLL_FDI BG6
+1.05VS_VTT T32 VCCFDIPLL
+3VS VccSSC 1.05 0.095 Spread Modulators Power Supply
TP@
AP17
VCCIO[27]
FDI
V1
+1.05VS_VTT VCCSPI VccDIFFCLKN 1.05 0.05 Differential Clock Buffers Power Supply
AU20
VCCDMI[2] 1 Be close to V1
VccALVDS 3.3 0.001 Analog power supply for LVDS (Mobile Only)
share CAP with AT20 C170
COUGARPOINT_FCBGA989 1U_0402_6.3V6K
PCH@ 2
VccTX_LVDS 1.8 0.04 I/O power supply for LVDS (Mobile Only)
3 3
4 4

Issued Date Deciphered Date PCH (7/9) PWR
A B C D E
A B C D E
+3VS
+3VALW +3VALW_PCH
for EMI J16
L3 EMC@ JUMP_43X39
10UH_LB2012T100MR_20% 1 2
1 2 +3VS_VCC_CLKF33 1 2
1 1 U1010J POWER +1.05VS_VTT @
1U_0402_6.3V6K
C174
@ C173 PAD T34 TP@ +VCCACLK AD49 N26
10U_0603_6.3V6M +3VALW_PCH VCCACLK VCCIO[29]
2 2 1 +5VALW_PCH
P26 +5VALW
T16 VCCIO[30] C175 J17
VCCDSW3_3 P28 1U_0402_6.3V6K +3VALW_PCH JUMP_43X39
1 1 VCCIO[31] 2 1
C178 1 2
0.1U_0402_16V7K PAD T33 TP@ +PCH_VCCDSW V12 T27 1 2
Be close to T38 DCPSUSBYP VCCIO[32]
Be close to N26 1 @
2 T29 C176
+3VS_VCC_CLKF33 T38 VCCIO[33] +3VALW_PCH 0.1U_0402_16V7K
VCC3_3[5]
VccVRM voltage supplies for Be close to T16 T23 2
PAD T38 TP@ +VCCAPLL_CPY_PCH BH23 VCCSUS3_3[7]
1. VccACLK VCCAPLLDMI2 T24
2. VccAFDIPLL AL29 VCCSUS3_3[8] 1
C177
Be close to P24
+1.05VS_VTT VCCIO[14] V23 0.1U_0402_16V7K
3. VccAPLLEXP AL29 should be connected to shared with
USB
VCCSUS3_3[9]
4. VccaPLLDMI2 C80, C86, C87, C88, C89 and 90. PAD T46 TP@ +VCCSUS1 AL24 V24 2
Be close to T23 +3VALW_PCH +5VALW_PCH
DCPSUS[3] VCCSUS3_3[10]
5. VccAPLLSATA P24
1
VCCSUS3_3[6] +1.05VS_VTT
AA19 D6 R195
VCCASW[1] T26 RB751V-40_SOD323-2 100_0402_5%
+1.05VS_VTT AA21 VCCIO[34]
+1.05VS_VTT VCCASW[2]
2
AA24 M26 +PCH_V5REF_SUS
L4 VCCASW[3] V5REF_SUS
1
+3VS +5VS
1U_0402_6.3V6K
C179
1U_0402_6.3V6K
C180
1U_0402_6.3V6K
C181
22U_0805_6.3V6M
C182
22U_0805_6.3V6M
C185
10UH_LB2012T100MR_20% AA26
Clock and Miscellaneous

1 2 +1.05VS_VCCA_A_DPL VCCASW[4] AN23 +VCCA_USBSUS TP@T35
TP@ T35 C186
1 1 1 1 1
AA27 DCPSUS[4] PAD
Be close to M26
0.1U_0402_16V7K
1
VCCASW[5] 2
1U_0402_6.3V6K
C184
1 2 +1.05VS_VCCA_B_DPL AN24
VCCSUS3_3[1] +3VALW_PCH
L5 AA29 D5 R198
1 2 2 2 2 2 VCCASW[6]
1U_0402_6.3V6K
C187
1 10UH_LB2012T100MR_20% 100_0402_5%
1 AA31 RB751V-40_SOD323-2
+ C183 VCCASW[7]
2
330U_2.5V_M 2 AC26 P34 +PCH_V5REF_RUN
VCCASW[8] V5REF +3VALW_PCH
2 2 Be close to AA19 AC27
1
2 VCCASW[9] N20 C188 2
Be close to BD47
PCI/GPIO/LPC
AC29 VCCSUS3_3[2] 1U_0603_10V6K
VCCASW[10] 1 2
N22 C189
AC31 VCCSUS3_3[3] 1U_0402_6.3V6K
Be close to BF47 VCCASW[11] P20
Be close to P34
AD29 VCCSUS3_3[4] 2
VCCASW[12] P22
Be close to N20 +3VS
Part Number Description ESR AD31 VCCSUS3_3[5]
VCCASW[13]
SF000002Z00 S_A-P_CAP 330U 2.5V M 6.3X4.2 R17M VLPS 17mΩ W21 AA16
VCCASW[14] VCC3_3[1] @ 1 @ 1 1
W23 W16 C190 C191 C192
VCCASW[15] VCC3_3[8] 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K
W24 T34
VCCASW[16] VCC3_3[4] 2 2 2
W26
VCCASW[17]
W29
Be close to AJ2 Be close to AA16 Be close to T34
VCCASW[18]
W31 AJ2 +1.05VS_VTT
VCCASW[19] VCC3_3[2]
Be close to N16 W33
VCCASW[20] AF13
VCCIO[5] Be close to AH13
1
2 1 +VCCRTCEXT N16
C193 0.1U_0402_16V7K DCPRTC AH13 C194
VCCIO[12] 1U_0402_6.3V6K
Y49 AH14 2
+1.5VS VCCVRM[4] VCCIO[13]
AF14
+1.05VS_VCCA_A_DPL BD47 VCCIO[6]
SATA
VCCADPLLA AK1 +VCCSATAPLL TP@
T36 PAD
3 +1.05VS_VTT +1.05VS_VCCA_B_DPL BF47 VCCAPLLSATA +1.5VS 3
VCCADPLLB
AF11
AF17 VCCVRM[1]
+1.05VS_VTT AF33 VCCIO[7]
AF34 VCCIO[8] AC16 +1.05VS_VTT
1 C195 VCCIO[9] VCCIO[2]
1U_0402_6.3V6K AG34
+1.05VS_VTT VCCIO[11] AC17
VCCIO[3] Be close to AC16
2 1 C196 Be close to AG33
1U_0402_6.3V6K AG33 AD17 1
VCCIO[10] VCCIO[4] C197
1U_0402_6.3V6K
2 2 1 +VCCSST V16
Be close to AF17 1 C198 DCPSST
1U_0402_6.3V6K C199 0.1U_0402_16V7K +1.05VS_VTT 2
Be close to AF33 PAD T37 TP@ +1.05VM_VCCSUS T17 T21

2 V19 DCPSUS[1] VCCASW[22]
DCPSUS[2]
MISC
+1.05VS_VTT V21
VCCASW[23]
CPU
BJ8
V_PROC_IO T19
VCCASW[21]
1 1
+RTCVCC +3VALW_PCH
4.7U_0603_6.3V6K
C200
0.1U_0402_16V7K
C202
RTC
A22 P32 Be close to P32

HDA
2 2 VCCRTC VCCSUSHDA
1U_0402_6.3V6K
C203
0.1U_0402_16V7K
C205
1 1 1
COUGARPOINT_FCBGA989 C206
PCH@ 0.1U_0402_16V7K
2 2 2
Be close to BJ8
4 4
Be close to A22

Issued Date Deciphered Date PCH (8/9) PWR
A B C D E
A B C D E
U1010I
AY4 H46
AY42 VSS[159] VSS[259] K18
AY46 VSS[160] VSS[260] K26
AY8 VSS[161] VSS[261] K39
B11 VSS[162] VSS[262] K46
U1010H B15 VSS[163] VSS[263] K7
1 VSS[164] VSS[264] 1
H5 B19 L18
VSS[0] B23 VSS[165] VSS[265] L2
AA17 AK38 B27 VSS[166] VSS[266] L20
AA2 VSS[1] VSS[80] AK4 B31 VSS[167] VSS[267] L26
AB11 VSS[5] VSS[84] AL16 F45 VSS[171] VSS[271] M12
AB14 VSS[6] VSS[85] AL17 BB12 VSS[172] VSS[272] P16
AB39 VSS[7] VSS[86] AL19 BB16 VSS[173] VSS[273] M18
AC19 VSS[12] VSS[91] AL27 BB30 VSS[178] VSS[278] M34
AC33 VSS[16] VSS[95] AL48 BC14 VSS[182] VSS[282] M46
AC34 VSS[17] VSS[96] AM11 BC18 VSS[183] VSS[283] M8
AC48 VSS[18] VSS[97] AM14 BC2 VSS[184] VSS[284] N18
AD10 VSS[19] VSS[98] AM36 BC22 VSS[185] VSS[285] P30
AD11 VSS[20] VSS[99] AM39 BC26 VSS[186] VSS[286] N47
AD19 VSS[23] VSS[102] AM46 BC36 VSS[189] VSS[289] T33
AD26 VSS[25] VSS[104] AN2 BC42 VSS[191] VSS[291] P43
AD27 VSS[26] VSS[105] AN29 BC48 VSS[192] VSS[292] P47
AD33 VSS[27] VSS[106] AN3 BD46 VSS[193] VSS[293] P7
AD34 VSS[28] VSS[107] AN31 BD5 VSS[194] VSS[294] R2
AD36 VSS[29] VSS[108] AP12 BE22 VSS[195] VSS[295] R48
AD37 VSS[30] VSS[109] AP19 BE26 VSS[196] VSS[296] T12
2 AD38 VSS[31] VSS[110] AP28 BE40 VSS[197] VSS[297] T31 2
AD39 VSS[32] VSS[111] AP30 BF10 VSS[198] VSS[298] T37
AD40 VSS[34] VSS[113] AP38 BF16 VSS[200] VSS[300] W34
AD46 VSS[38] VSS[117] AP8 BF26 VSS[204] VSS[304] V11
AD8 VSS[39] VSS[118] AR2 BF28 VSS[205] VSS[305] V17
AE2 VSS[40] VSS[119] AR48 BD3 VSS[206] VSS[306] V26
AE3 VSS[41] VSS[120] AT11 BF30 VSS[207] VSS[307] V27
AF10 VSS[42] VSS[121] AT13 BF38 VSS[208] VSS[308] V29
AF12 VSS[43] VSS[122] AT18 BF40 VSS[209] VSS[309] V31
AD14 VSS[44] VSS[123] AT22 BF8 VSS[210] VSS[310] V36
AD16 VSS[45] VSS[124] AT26 BG17 VSS[211] VSS[311] V39
AF16 VSS[46] VSS[125] AT28 BG21 VSS[212] VSS[312] V43
AF19 VSS[47] VSS[126] AT30 BG33 VSS[213] VSS[313] V7
AF24 VSS[48] VSS[127] AT32 BG44 VSS[214] VSS[314] W17
AF26 VSS[49] VSS[128] AT34 BG8 VSS[215] VSS[315] W19
AF27 VSS[50] VSS[129] AT39 BH11 VSS[216] VSS[316] W2
AF38 VSS[53] VSS[132] AT7 BH19 VSS[219] VSS[319] Y12
AF4 VSS[54] VSS[133] AU24 H10 VSS[220] VSS[320] Y38
AF42 VSS[55] VSS[134] AU30 BH27 VSS[221] VSS[321] Y4
AF46 VSS[56] VSS[135] AV16 BH31 VSS[222] VSS[322] Y42
AF8 VSS[59] VSS[138] AV30 BH39 VSS[225] VSS[325] BG29
AG19 VSS[60] VSS[139] AV38 BH43 VSS[226] VSS[328] N24
AG2 VSS[61] VSS[140] AV4 BH7 VSS[227] VSS[329] AJ3
AG31 VSS[62] VSS[141] AV43 D3 VSS[228] VSS[330] AD47
AG48 VSS[63] VSS[142] AV8 D12 VSS[229] VSS[331] B43
3 AH11 VSS[64] VSS[143] AW14 D16 VSS[230] VSS[333] BE10 3
AH3 VSS[65] VSS[144] AW18 D18 VSS[231] VSS[334] BG41
AH36 VSS[66] VSS[145] AW2 D22 VSS[232] VSS[335] G14
AH39 VSS[67] VSS[146] AW22 D24 VSS[233] VSS[337] H16
AH40 VSS[68] VSS[147] AW26 D26 VSS[234] VSS[338] T36
AH7 VSS[71] VSS[150] AW34 D34 VSS[237] VSS[343] C22
AJ19 VSS[72] VSS[151] AW36 D38 VSS[238] VSS[344] AP13
AJ21 VSS[73] VSS[152] AW40 D42 VSS[239] VSS[345] M14
AJ24 VSS[74] VSS[153] AW48 D8 VSS[240] VSS[346] AP3
AJ33 VSS[75] VSS[154] AV11 E18 VSS[241] VSS[347] AP1
AJ34 VSS[76] VSS[155] AY12 E26 VSS[242] VSS[348] BE16
AK12 VSS[77] VSS[156] AY22 G18 VSS[243] VSS[349] BC16
AK3 VSS[78] VSS[157] AY28 G20 VSS[244] VSS[350] BG28
VSS[79] VSS[158] G26 VSS[245] VSS[351] BJ28
COUGARPOINT_FCBGA989 G28 VSS[246] VSS[352]
PCH@ G36 VSS[247]
G48 VSS[248]
H12 VSS[249]
H18 VSS[250]
H22 VSS[251]
H24 VSS[252]
H26 VSS[253]
H30 VSS[254]
H32 VSS[255]
H34 VSS[256]
F3 VSS[257]
VSS[258]
PCH@
4 4

Issued Date Deciphered Date PCH (9/9) VSS
A B C D E
A B C D E
+3VSDGPU
RP46
U51A GPIO need confirm with nVidia 10K_0804_8P4R_5% GPIO I/O USAGE
GPIO8_OVERT 8 1
AN12 Part 1 of 7 GPIO9_ALERT 7 2
4 PEG_HTX_C_GRX_P0 AM12 PEX_RX0 P6 6 3
GC6_CLAMP_MON GPIO9_ALERT_GATE GPIO0 I FB_CLAMP_MON
4 PEG_HTX_C_GRX_N0 AN14 PEX_RX0_N GPIO0 M3 5 4
ACIN_BUF
4 PEG_HTX_C_GRX_P1 AM14 PEX_RX1 GPIO1 L6
4 PEG_HTX_C_GRX_N1 AP14 PEX_RX1_N GPIO2 P5 VGA@ GPIO1 O MEM_VD_CTL
4 PEG_HTX_C_GRX_P2 PEX_RX2 GPIO3
AP15 P7
4 PEG_HTX_C_GRX_N2 PEX_RX2_N GPIO4
AN15 L7
AM15 M7 GC6_TGL_REQ# PLTRST_VGA#
4 PEG_HTX_C_GRX_N3
AN17 PEX_RX3_N GPIO6 N8
GPIO2 O LCD_BL_PWM
4 PEG_HTX_C_GRX_P4 AM17 PEX_RX4 GPIO7 M1 GPIO8_OVERT
1 4 PEG_HTX_C_GRX_N4 AP17 PEX_RX4_N GPIO8 M2 1
GPIO9_ALERT GPIO3 O LCD_VCC
2
AP18 L1
4 PEG_HTX_C_GRX_N5 AN18 PEX_RX5_N GPIO10 M5 DGPU_VID
GPIO
4 PEG_HTX_C_GRX_P6 AM18 PEX_RX6 GPIO11 N3 DGPU_VID 50 1 6
ACIN_BUF GPIO8_OVERT GPU_OVERT 37 GPIO4 O LCD_BLEN
4 PEG_HTX_C_GRX_N6 AN20 PEX_RX6_N GPIO12 M4 PSI VGA@
4 PEG_HTX_C_GRX_P7 PEX_RX7 GPIO13 PSI 50
AM20 N4 DMN66D0LDW-7_SOT363-6
4 PEG_HTX_C_GRX_N7 PEX_RX7_N GPIO14
AP20 P2
AP21 PEX_RX8 GPIO15 R8
Q1000A GPIO5 O Reserved
AN21 PEX_RX8_N GPIO16 M6
AM21 PEX_RX9 GPIO17 R1 GPIO9_ALERT_GATE
AN23 PEX_RX9_N GPIO18 P3
GPIO6 O FB_CLAMP_TGL_REQ
AM23 PEX_RX10 GPIO19 P4
PEX_RX10_N GPIO20
5
AP23 P1
AP24 PEX_RX11 GPIO21 GPIO7 O 3D Vision
AN24 PEX_RX11_N GPIO20,21 GPIO9_ALERT 4 3
PEX_RX12 GPU_ALERT 37
AM24 VGA@
AN26 PEX_RX12_N
N14P-GV/-GV2/N14M-LP/GS = availble
DMN66D0LDW-7_SOT363-6
GPIO8 I/O OVERT
N14M-GE/GL = NC
AM26 PEX_RX13
Q1000B
AP26 PEX_RX13_N
AP27 PEX_RX14 GPIO9 I/O ALERT
AN27 PEX_RX14_N AK9
AM27 PEX_RX15 DACA_RED AL10
PEX_RX15_N DACA_GREEN AL9
GPIO10 O MEM_VREF_CTL
DACA_BLUE
DACs
AK14
4 PEG_GTX_HRX_P0 PEX_TX0
AJ14 AM9
4 PEG_GTX_HRX_N0
AH14 PEX_TX0_N DACA_HSYNC AN9
GPIO11 O PWM_VID
4 PEG_GTX_HRX_P1 PEX_TX1 DACA_VSYNC
4 PEG_GTX_HRX_N1 AG14 ACIN_BUF 2 1
AK15 PEX_TX1_N D1001 GPU_ACIN 37
AJ15 AG10 2 @ 1 RB751V-40_SOD323-2
4 PEG_GTX_HRX_N2 PEX_TX2_N DACA_VDD GPIO12 I PWR_LEVEL
PCI EXPRESS
AL16 AP9 R1005 10K_0402_5% VGA@
4 PEG_GTX_HRX_P3 PEX_TX3 DACA_VREF
AK16 AP8 DG-06246 v04
2
4 PEG_GTX_HRX_N3 PEX_TX3_N DACA_RSET 2
AK17 PSI
4 PEG_GTX_HRX_P4
AJ17 PEX_TX4 N14x floating GPIO13 O
4 PEG_GTX_HRX_N4 PEX_TX4_N N13x PD 10K to GND
AH17
4 PEG_GTX_HRX_P5 PEX_TX5 +3VSDGPU
AG17
4 PEG_GTX_HRX_N5
AK18 PEX_TX5_N GPIO14 I HPD_A
4 PEG_GTX_HRX_N6 AJ18 RP1000 VGA@
AL19 PEX_TX6_N 2.2K_0804_8P4R_5%
4 PEG_GTX_HRX_P7
AK19 PEX_TX7 R4 VGA_DDC_CLK I2CB_SCL 1 8
GPIO15 I HPD_C
4 PEG_GTX_HRX_N7 PEX_TX7_N I2CA_SCL
AK20 R5 VGA_DDC_DATA I2CB_SDA 2 7
AJ20 PEX_TX8 I2CA_SDA VGA_DDC_DATA 3 6
PEX_TX8_N 78mA SM010019400 3000ma 33ohm@100mhz DCR 0.05 GPIO16 O FRM_CLK
AH20 R7 I2CB_SCL VGA_DDC_CLK 4 5
AG20 PEX_TX9 I2CB_SCL R6 I2CB_SDA +1.05VSDGPU
AK21 PEX_TX9_N I2CB_SDA RP1001 VGA@ VGA@ GPIO17 I HPD_D
I2C
AJ21 PEX_TX10 R2 VGA_LCD_CLK 2.2K_0804_8P4R_5% +PLLVDD 1 2
AL22 PEX_TX10_N I2CC_SCL R3 VGA_LCD_DATA VGA_LCD_CLK 1 8 L1001 BLM18PG330SN1_2P
AK22 PEX_TX11 I2CC_SDA VGA_LCD_DATA 2 7
AK23 PEX_TX11_N T4 I2CS_SCL I2CS_SDA 3 6
1
C1023
GPIO18 I HPD_E
AJ23 PEX_TX12 I2CS_SCL T3 I2CS_SDA I2CS_SCL 4 5 VGA@
AH23 PEX_TX12_N I2CS_SDA 22U_0603_6.3V6M
AG23 PEX_TX13 2 GPIO19 I HPD_F or HPD_B
AK24 PEX_TX13_N
AJ24 PEX_TX14 Near GPU
AL25 PEX_TX14_N GPIO20 Reserved
PEX_TX15 Place Under AD8 SM010028480 1500ma 180ohm@100mhz DCR 0.18
AK25
PEX_TX15_N VGA@
112mA
AD8 +PLLVDD 1 2 VGA@
GPIO21 Reserved
AJ11 PLLVDD C1000 0.1U_0402_16V4Z +GPU_PLLVDD 1 2
PEX_WAKE_N AE8 L1000 BLM18PG181SN1D_2P
1 VGA@ 2 AL13 SP_PLLVDD GPIO22
+3VSDGPU 14 CLK_PEG_VGA PEX_REFCLK 1 1
R1010 10K_0402_5% AK13 AD7 +GPU_PLLVDD C1024 C1025
14 CLK_PEG_VGA# AK12 PEX_REFCLK_N VID_PLLVDD
VGA_CLKREQ#_R VGA@ VGA@ GPIO23
CLK
PEX_CLKREQ_N 4.7U_0603_6.3V6K 22U_0603_6.3V6M

2 2 2 2
3 PEX_TSTCLK_OUT+ AJ26 H3 XTALIN VGA@ VGA@ 3
2 VGA@ 1 PEX_TSTCLK_OUT- AK26 PEX_TSTCLK_OUT XTAL_IN H2 XTALOUT C1026 C1027
R1011 200_0402_1% PEX_TSTCLK_OUT_N XTAL_OUT 0.1U_0402_16V4Z 0.1U_0402_16V4Z
Near GPU GPIO24
AJ12 J4 XTAL_OUTBUFF 1 1
17 PLTRST_VGA# PEX_RST_N XTAL_OUTBUFF
2 VGA@ 1 PEX_TREMP AP29 H1 XTAL_SSIN
R1012 2.49K_0402_1% PEX_TERMP XTAL_SSIN
Place Under AE8,AD7 VGA@ XTAL_SSIN XTAL_OUTBUFF
NV DG PLL_VDD R1013
1
GPU@ 1M_0402_5%
N13P-GL-A1_FCBGA908
0.1Ux1 XTALOUT 2 1 XTALIN R1015
22Ux1 33ohm(ESR0.05)x1 VGA@ R1014 VGA@ 10K_0402_5%
10K_0402_5%
GC6 function NV DG SP_PLLVDD,VID_PLLVDD
2
27MHZ_10PF_7V27000050
+3VSDGPU +3VSDGPU 0.1Ux2 Under GPU
4.7Ux1,22Ux1 3 1
3 1
180ohm(ESR0.2)x1
1
+3VSDGPU GND GND

GC6@ R1017 VGA@ VGA@ X1000 VGA@ +3VSDGPU
R360 10K_0402_5% VGA_ON C1028 4 2 C1029
2
G
1K_0402_5% GC6@ Q47 10P_0402_50V8J 10P_0402_50V8J
2
LBSS138LT1G_SOT-23-3
2
GC6_CLAMP_MON 2 1 GPU_CLAMP_EN GC6_TGL_REQ# 3 1

GPU_TGLREQ# 37 VGA_ON From EC I2CS_SCL 1 6
S
EC_SMB_CK2 14,37
D7 RB751V-40_SOD323-2 Crystals must have a max ESR of 80 ohm VGA@
GC6@ GC6@ DMN66D0LDW-7_SOT363-6
2
Q1001
G
Q1004A
VGA@ Pull high @ VGA side
1 3 VGA_CLKREQ#_R +3VSDGPU
from EC Add R(100K)C(0.047u)delay 14 VGA_CLKREQ#
D
37 GPU_CLAMP_EN
5
4
D1000
on PWR side L2N7002LT1G_SOT23-3
I2CS_SDA 4 3
4
EC_SMB_DA2 14,37
23 GC6_CLAMP R1019 1 @ 2 2 VGA@
1 1.5VS_DGPU_PWR_EN DMN66D0LDW-7_SOT363-6
1.5VS_DGPU_PWR_EN 47
0_0402_5% 3 Q1004B
1
BAV70W_SOT323-3
GC6@ R1020
10K_0402_5% Security Classification Compal Secret Data Compal Electronics, Inc.
R1021 GC6@ 2013/02/04 EOP Title
1 NGC6@ 2 Issued Date Deciphered Date
By 3/12 37,41,50 VGA_ON
N14P PEG 1/7
2
0_0402_5% AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
A B C D E
A B C D E
VRAM Interface U51B U51C

CMDA[31..0] 27 CMDC[31..0] 28
Part 2 of 7 Part 3 of 7
MDA0 L28 U30 CMDA0 MDC0 G9 D13 CMDC0
MDA1 M29 FBA_D0 FBA_CMD0 T31 CMDA1 MDC1 E9 FBB_D0 FBB_CMD0 E14 CMDC1
MDA2 L29 FBA_D1 FBA_CMD1 U29 CMDA2 MDC2 G8 FBB_D1 FBB_CMD1 F14 CMDC2
MDA3 M28 FBA_D2 FBA_CMD2 R34 CMDA3 MDC3 F9 FBB_D2 FBB_CMD2 A12 CMDC3
MDA4 N31 FBA_D3 FBA_CMD3 R33 CMDA4 MDC4 F11 FBB_D3 FBB_CMD3 B12 CMDC4
MDA5 P29 FBA_D4 FBA_CMD4 U32 CMDA5 MDC5 G11 FBB_D4 FBB_CMD4 C14 CMDC5
MDA6 R29 FBA_D5 FBA_CMD5 U33 CMDA6 MDC6 F12 FBB_D5 FBB_CMD5 B14 CMDC6
MDA7 P28 FBA_D6 FBA_CMD6 U28 CMDA7 MDC7 G12 FBB_D6 FBB_CMD6 G15 CMDC7
MDA8 J28 FBA_D7 FBA_CMD7 V28 CMDA8 MDC8 G6 FBB_D7 FBB_CMD7 F15 CMDC8
1 MDA9 H29 FBA_D8 FBA_CMD8 V29 CMDA9 MDC9 F5 FBB_D8 FBB_CMD8 E15 CMDC9 1
MDA10 J29 FBA_D9 FBA_CMD9 V30 CMDA10 MDC10 E6 FBB_D9 FBB_CMD9 D15 CMDC10
MDA11 H28 FBA_D10 FBA_CMD10 U34 CMDA11 MDC11 F6 FBB_D10 FBB_CMD10 A14 CMDC11
MDA12 G29 FBA_D11 FBA_CMD11 U31 CMDA12 MDC12 F4 FBB_D11 FBB_CMD11 D14 CMDC12
MDA13 E31 FBA_D12 FBA_CMD12 V34 CMDA13 MDC13 G4 FBB_D12 FBB_CMD12 A15 CMDC13
MDA14 E32 FBA_D13 FBA_CMD13 V33 CMDA14 MDC14 E2 FBB_D13 FBB_CMD13 B15 CMDC14
MDA15 F30 FBA_D14 FBA_CMD14 Y32 CMDA15 MDC15 F3 FBB_D14 FBB_CMD14 C17 CMDC15
MDA16 C34 FBA_D15 FBA_CMD15 AA31 CMDA16 MDC16 C2 FBB_D15 FBB_CMD15 D18 CMDC16
MDA17 D32 FBA_D16 FBA_CMD16 AA29 CMDA17 MDC17 D4 FBB_D16 FBB_CMD16 E18 CMDC17
MDA18 B33 FBA_D17 FBA_CMD17 AA28 CMDA18 MDC18 D3 FBB_D17 FBB_CMD17 F18 CMDC18
MDA19 C33 FBA_D18 FBA_CMD18 AC34 CMDA19 MDC19 C1 FBB_D18 FBB_CMD18 A20 CMDC19
MDA20 F33 FBA_D19 FBA_CMD19 AC33 CMDA20 MDC20 B3 FBB_D19 FBB_CMD19 B20 CMDC20
MDA21 F32 FBA_D20 FBA_CMD20 AA32 CMDA21 MDC21 C4 FBB_D20 FBB_CMD20 C18 CMDC21
MDA22 H33 FBA_D21 FBA_CMD21 AA33 CMDA22 MDC22 B5 FBB_D21 FBB_CMD21 B18 CMDC22
MDA23 H32 FBA_D22 FBA_CMD22 Y28 CMDA23 MDC23 C5 FBB_D22 FBB_CMD22 G18 CMDC23
FBA_D23 FBA_CMD23 FBB_D23 FBB_CMD23
MEMORY INTERFACE
MDA24 P34 Y29 CMDA24 MDC24 A11 G17 CMDC24
MDA25 P32 FBA_D24 FBA_CMD24 W31 CMDA25 MDC25 C11 FBB_D24 FBB_CMD24 F17 CMDC25
MEMORY INTERFACE B
MDA26 P31 FBA_D25 FBA_CMD25 Y30 CMDA26 MDC26 D11 FBB_D25 FBB_CMD25 D16 CMDC26
MDA27 P33 FBA_D26 FBA_CMD26 AA34 CMDA27 MDC27 B11 FBB_D26 FBB_CMD26 A18 CMDC27 DG-06246 v04:
MDA28 L31 FBA_D27 FBA_CMD27 Y31 CMDA28 MDC28 D8 FBB_D27 FBB_CMD27 D17 CMDC28
MDA29 L34 FBA_D28 FBA_CMD28 Y34 CMDA29 MDC29 A8 FBB_D28 FBB_CMD28 A17 CMDC29 Reserve footprint for debug only.
MDA30 L32 FBA_D29 FBA_CMD29 Y33 CMDA30 MDC30 C8 FBB_D29 FBB_CMD29 B17 CMDC30
MDA31 L33 FBA_D30 FBA_CMD30 V31 CMDA31 MDC31 B8 FBB_D30 FBB_CMD30 E17 CMDC31
MDA32 AG28 FBA_D31 FBA_CMD31 MDC32 F24 FBB_D31 FBB_CMD31
MDA33 AF29 FBA_D32 MDC33 G23 FBB_D32
MDA34 AG29 FBA_D33 MDC34 E24 FBB_D33
MDA35 AF28 FBA_D34 R32 MDC35 G24 FBB_D34 C12
MDA36 AD30 FBA_D35 FBA_CMD_RFU0 AC32 MDC36 D21 FBB_D35 FBB_CMD_RFU0 C20
MDA37 AD29 FBA_D36 FBA_CMD_RFU1 MDC37 E21 FBB_D36 FBB_CMD_RFU1
MDA38 AC29 FBA_D37 +1.5VSDGPU MDC38 G21 FBB_D37 +1.5VSDGPU
MDA39 AD28 FBA_D38 MDC39 F21 FBB_D38
MDA40 AJ29 FBA_D39 R28 FBA_DEBUG0 R1022 2 VGA@ 1 60.4_0402_1% MDC40 G27 FBB_D39 G14 FBB_DEBUG0 R1023 2 VGA@ 1 60.4_0402_1%
A
2 MDA41 AK29 FBA_D40 FBA_DEBUG0 AC28 FBA_DEBUG1 R1024 2 VGA@ 1 60.4_0402_1% MDC41 D27 FBB_D40 FBB_DEBUG0 G20 FBB_DEBUG1 R1025 2 VGA@ 1 60.4_0402_1% 2
MDA42 AJ30 FBA_D41 FBA_DEBUG1 MDC42 G26 FBB_D41 FBB_DEBUG1
MDA43 AK28 FBA_D42 MDC43 E27 FBB_D42
MDA44 AM29 FBA_D43 MDC44 E29 FBB_D43
MDA45 AM31 FBA_D44 R30 MDC45 F29 FBB_D44 D12
FBA_D45 FBA_CLK0 CLKA0 27 FBB_D45 FBB_CLK0 CLKC0 28
MDA46 AN29 R31 CLKA0# 27 MDC46 E30 E12 CLKC0# 28
MDA47 AM30 FBA_D46 FBA_CLK0_N AB31 MDC47 D30 FBB_D46 FBB_CLK0_N E20
FBA_D47 FBA_CLK1 CLKA1 27 FBB_D47 FBB_CLK1 CLKC1 28
MDA48 AN31 AC31 MDC48 A32 F20
FBA_D48 FBA_CLK1_N CLKA1# 27 FBB_D48 FBB_CLK1_N CLKC1# 28
MDA49 AN32 MDC49 C31
MDA50 AP30 FBA_D49 MDC50 C32 FBB_D49
MDA51 AP32 FBA_D50 MDC51 B32 FBB_D50
MDA52 AM33 FBA_D51 K31 MDC52 D29 FBB_D51 F8
MDA53 AL31 FBA_D52 FBA_WCK01 L30 MDC53 A29 FBB_D52 FBB_WCK01 E8
MDA54 AK33 FBA_D53 FBA_WCK01_N H34 MDC54 C29 FBB_D53 FBB_WCK01_N A5
MDA55 AK32 FBA_D54 FBA_WCK23 J34 MDC55 B29 FBB_D54 FBB_WCK23 A6
MDA56 AD34 FBA_D55 FBA_WCK23_N AG30 MDC56 B21 FBB_D55 FBB_WCK23_N D24
MDA57 AD32 FBA_D56 FBA_WCK45 AG31 MDC57 C23 FBB_D56 FBB_WCK45 D25
MDA58 AC30 FBA_D57 FBA_WCK45_N AJ34 MDC58 A21 FBB_D57 FBB_WCK45_N B27
MDA59 AD33 FBA_D58 FBA_WCK67 AK34 MDC59 C21 FBB_D58 FBB_WCK67 C27
MDA60 AF31 FBA_D59 FBA_WCK67_N MDC60 B24 FBB_D59 FBB_WCK67_N
MDA61 AG34 FBA_D60 MDC61 C24 FBB_D60
MDA62 AG32 FBA_D61 NC MDC62 B26 FBB_D61 NC
MDA63 AG33 FBA_D62 J30 MDC63 C26 FBB_D62 D6
FBA_D63 FBA_WCKB01 J31 FBB_D63 FBB_WCKB01 D7
27 DQMA[3..0] FBA_WCKB01_N 28 DQMC[3..0] FBB_WCKB01_N
DQMA0 P30 J32 DQMC0 E11 C6
DQMA1 F31 FBA_DQM0 FBA_WCKB23 J33 DQMC1 E3 FBB_DQM0 FBB_WCKB23 B6
DQMA2 F34 FBA_DQM1 FBA_WCKB23_N AH31 DQMC2 A3 FBB_DQM1 FBB_WCKB23_N F26
DQMA3 M32 FBA_DQM2 FBA_WCKB45 AJ31 DQMC3 C9 FBB_DQM2 FBB_WCKB45 E26
27 DQMA[7..4] AD31 FBA_DQM3 FBA_WCKB45_N AJ32 28 DQMC[7..4] F23 FBB_DQM3 FBB_WCKB45_N A26
DQMA4 DQMC4 SM010019400 3000ma 33ohm@100mhz DCR 0.05
DQMA5 AL29 FBA_DQM4 FBA_WCKB67 AJ33 DQMC5 F27 FBB_DQM4 FBB_WCKB67 A27
DQMA6 AM32 FBA_DQM5 FBA_WCKB67_N DQMC6 C30 FBB_DQM5 FBB_WCKB67_N Place Near GPU
DQMA7 AF34 FBA_DQM6 2 VGA@ 1 DQMC7 A24 FBB_DQM6 +1.05VSDGPU
3 FBA_DQM7 R1026 10K_0402_5% FBB_DQM7 VGA@ 3
27 DQSA[3..0] 28 DQSC[3..0]
DQSA0 M31 E1 DQSC0 D10 +FB_PLLAVDD L1002 1 2
FBA_DQS_WP0 FB_CLAMP GC6_CLAMP 22 FBB_DQS_WP0
DQSA1 G31 DQSC1 D5 BLM18PG330SN1_2P
DQSA2 E33 FBA_DQS_WP1 DQSC2 C3 FBB_DQS_WP1
FBA_DQS_WP2 62+35mA FBB_DQS_WP2 62mA 1
DQSA3 M33 DQSC3 B9 C1030
27 DQSA[7..4] AE31 FBA_DQS_WP3 K27 28 DQSC[7..4] E23 FBB_DQS_WP3 H17
DQSA4 +FB_PLLAVDD DQSC4 +FB_PLLAVDD VGA@
DQSA5 AK30 FBA_DQS_WP4 FB_DLL_AVDD DQSC5 E28 FBB_DQS_WP4 FBB_PLL_AVDD 22U_0603_6.3V6M
0.1U_0402_16V4Z
DQSA6 AN33 FBA_DQS_WP5 DQSC6 B30 FBB_DQS_WP5 2

0.1U_0402_16V4Z
DQSA7 AF33 FBA_DQS_WP6 DQSC7 A23 FBB_DQS_WP6

FBA_DQS_WP7 U27
2 2 FBB_DQS_WP7 Place Near GPU
27 DQSA#[3..0] FBA_PLL_AVDD 28 DQSC#[3..0] 2
DQSA#0 M30 C1031 C1033 DQSC#0 D9 VGA@
DQSA#1 H30 FBA_DQS_RN0 VGA@ VGA@ DQSC#1 E4 FBB_DQS_RN0 C1032
DQSA#2 E34 FBA_DQS_RN1 1 1 DQSC#2 B2 FBB_DQS_RN1 0.1U_0402_16V4Z
DQSA#3 M34 FBA_DQS_RN2 H26 DQSC#3 A9 FBB_DQS_RN2 1
27 DQSA#[7..4]
DQSA#4 AF30 FBA_DQS_RN3 FB_VREF 28 DQSC#[7..4]
DQSC#4 D22 FBB_DQS_RN3 Place Under H17
DQSA#5 AK31 FBA_DQS_RN4 Place Under U27 Place Under K27 DQSC#5 D28 FBB_DQS_RN4
DQSA#6 AM34 FBA_DQS_RN5 DQSC#6 A30 FBB_DQS_RN5
DQSA#7 AF32 FBA_DQS_RN6 DQSC#7 B23 FBB_DQS_RN6
FBA_DQS_RN7 FBB_DQS_RN7
FBx_PLL_AVDD,FB_DLL_AVDD
MDA[15..0]
GPU@
N13P-GL-A1_FCBGA908
GPU@
N13P-GL-A1_FCBGA908
0.1Ux1 1 Per pin Under GPU
27 MDA[15..0]
MDA[31..16]
22Ux1 Near GPU
27 MDA[31..16]
MDA[47..32] 30ohm@100Mhz(ESR0.01ohm) x1 Near GPU
27 MDA[47..32]
MDA[63..48]
27 MDA[63..48]
MDC[15..0]
28 MDC[15..0]
4 MDC[31..16] 4
28 MDC[31..16]
MDC[47..32]
28 MDC[47..32]
MDC[63..48]
28 MDC[63..48]

Issued Date 2013/02/04 Deciphered Date EOP Title
N14P VRAM 2/7
Custom 1.0
A B C D Date: Friday, June 07, 2013 E Sheet 23 of 55
A B C D E
MULTI LEVEL STRAPS

N14P-GV2/GT
U51D +3VSDGPU +3VSDGPU ZZZ
Straps VRAM Strap
N14M-GE 1G MB X76
Part 4 of 7 U51 U51 U51 strap0 strap1 strap2 strap3
AM6 X76M1G@ X76402BOL11|X76402BOL12
IFPA_TXC
1
AN6 P8
AP3 IFPA_TXC_N NC AC6 R1027 R1028 R1029 R1030 R1031 R1032 R1033 R1034
AN3 IFPA_TXD0 NC AJ28 GV2GT@ @ @ @ @ @ 4.99K_0402_1% N14PGV2@ N14M-GE 1G VRAM X76
AN5 IFPA_TXD0_N NC AJ4 45.3K_0402_1% 4.99K_0402_1% 20K_0402_1% 4.99K_0402_1% 10K_0402_1% 30K_0402_1% GV2GT@ 4.99K_0402_1%
AM5 IFPA_TXD1 NC AJ5 N14P-GV2-A1 N14P-GT-A2 N14M-GE-A2
2
AL6 IFPA_TXD1_N NC AL11 N14PGV2@ N14PGT@ N14MGE@ ZZZ
AK6 IFPA_TXD2 NC C15
IFPA_TXD2_N NC SA00006B530 SA00005W200 SA000068A10 N14M-GE 2G MB X76
NC
AJ6 D19 STRAP0
AH6 IFPA_TXD3 NC D20 STRAP1 ROM_SI X76M2G@
IFPA_TXD3_N NC R3 R1 R3 X76402BOL13
D23 STRAP2 ROM_SO
1
NC D26 STRAP3 ROM_SCLK 1
AJ9 NC H31 STRAP4 N14M-GE 2G VRAM X76
AH9 IFPB_TXC NC T8
AP6 IFPB_TXC_N NC V32
1
AP5 IFPB_TXD4 NC ZZZ
AM7 IFPB_TXD4_N R1036 R1037 R1035 R1039 R1040 R1041 R1042 R1043
IFPB_TXD5 N14P-GV2 2G MB X76
AL7 @ GV2GT@ N14PGV2@ GV2GT@ GV2GT@ P1GDFR@ 10K_0402_1% N14PGT@
AN8 IFPB_TXD5_N 4.99K_0402_1% 34.8K_0402_1% 15K_0402_1% 4.99K_0402_1% 20K_0402_1% 34.8K_0402_1% N14MGE@ 15K_0402_1% X76P2G@
IFPB_TXD6 X76402BOL14|X76402BOL15
AM8
2
AK8 IFPB_TXD6_N
AL8 IFPB_TXD7 N14P-GV2 VRAM X76
IFPB_TXD7_N L4 VCCSENSE_VGA
VDD_SENSE VCCSENSE_VGA 50 R1035
AK1 N14PGT@
AJ1 IFPC_L0 24.9K_0402_1%
AJ3 IFPC_L0_N L5 VSSSENSE_VGA
IFPC_L1 GND_SENSE VSSSENSE_VGA 50
AJ2 N14P-GV2
AH3 IFPC_L1_N R1040 R1041 R1043
AH4 IFPC_L2 10K_0402_1% 10K_0402_1% 10K_0402_1%
VRAM Strap R1041 R1041
AG5 IFPC_L2_N N14MGE@ N14MGE@ N14MGE@ 15K_0402_1% 10K_0402_1%
AG4 IFPC_L3 P2GAFR@ P2GMCN@
IFPC_L3_N
TEST For N14P-GV2 strap table Decive ID : 0x1292
AM1 AK11 TESTMODE
AM2 IFPD_L0 TESTMODE For N14P-GT strap table Decive ID : 0xFE4
AM3 IFPD_L0_N AM10 JTAG_TCK
AM4 IFPD_L1 JTAG_TCK AM11 JTAG_TDI PAD TP@T155
TP@ T155 RP47 GPU Freq. Memory Size Memory Config strap0 strap1 strap2 strap3 strap4 ROM_SI ROM_SO ROM_SCLK
AL3 IFPD_L1_N JTAG_TDI AP12 JTAG_TDO PAD TP@
TP@T156
T156 10K_0804_8P4R_5%
AL4 IFPD_L2 JTAG_TDO AP11 JTAG_TMS PAD TP@
TP@T157
T157 TESTMODE 8 1 900 MHZ 128M* 16* 4 1GB 0x4: HYNIX SA00006H430 R3 H5TC2G63FFR-11C
AK4 IFPD_L2_N JTAG_TMS AN11 JTAG_RST JTAG_TCK 7 2 900 MHZ 128M* 16* 4 1GB 0x6: HYNIX SA00003YO90 R3 H5TQ2G63DFR-11C PD 34.8K
AK5 IFPD_L3 JTAG_TRST_N JTAG_RST 6 3 R PD 24.9K R
IFPD_L3_N
LVDS/TMDS
5 4 N14P-GV2 R R PD 15K R R R PU 4.99K

900 MHZ 256M* 16* 4 2GB 0x1: MICRON SA000065D10 R3 MT41K256M16HA-107G:E PU 45.3K PD 34.8K PD 4.99K PD 20K PD 10K PU 4.99K
AD2 VGA@ 900 MHZ 256M* 16* 4 2GB 0x2: HYNIX SA00006E840 R3 H5TC4G63AFR-11C PD 15K
AD3 IFPE_L0
2
AD1 IFPE_L0_N 900 MHZ 128M* 16* 4 1GB Hynix SA00003YO90 R PD 34.8K R
2
AC1 IFPE_L1 SERIAL 900 MHZ 256M* 16* 4 2GB Micron SA000065D10 PD 24.9K PH 30.1K PD 15K
IFPE_L1_N N14P-GT
AC2 H6 ROM_CS_N R1047 1 VGA@ 2 10K_0402_5% +3VSDGPU
AC3 IFPE_L2 ROM_CS_N H4 ROM_SCLK
AC4 IFPE_L2_N ROM_SCLK H5 ROM_SI
AC5 IFPE_L3 ROM_SI H7
Strap Name Bit3 Bit2 Bit1 Bit0
ROM_SO Resistor Values Pull-up to +3V Pull-down to Gnd
IFPE_L3_N ROM_SO
ROM_SCLK PCI_DEVID[4] SUB_VENDOR PCI_DEVID[5] PEX_PLL_EN_TERM
4.99K 1000 0000
AE3 ROM_SI RAM_CFG[3] RAM_CFG[2] RAM_CFG[1] RAM_CFG[0]
AE4 IFPF_L0
IFPF_L0_N 10K 1001 0001
AF4 ROM_SO FB[1] FB[0] SMB_ALT_ADDR VGA_DEVICE
AF5 IFPF_L1
IFPF_L1_N GENERAL 15K 1010 0010
AD4 STRAP0 USER[3] USER[2] USER[1] USER[0]
AD5 IFPF_L2 L2 R1048 1 VGA@ 2 10K_0402_5%
IFPF_L2_N BUFRST_N 20K 1011 0011
AG1 STRAP1 3GIO_PADCFG[3] 3GIO_PADCFG[2] 3GIO_PADCFG[1] 3GIO_PADCFG[0]
AF1 IFPF_L3 L3
IFPF_L3_N CEC 24.9K 1100 0100
J1 MULTI_STRAP_REF0_GND 1 N14PGV2@
2 N14PGT@
STRAP2 PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0]
MULTI_STRAP_REF0_GND 30.1K 1101 0101
R1049 40.2K_0402_1% R1049 40.2K_0402_1% STRAP3 SOR3_EXPOSED SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSED
AG3 34.8K 1110 0110
AG2 IFPC_AUX_I2CW_SCL
IFPC_AUX_I2CW_SDA_N J2
STRAP4 RESERVED PCIE_SPEED_ PCIE_MAX_SPEED DP_PLL_VDD33V
STRAP0 45.3K 1111 0111
STRAP0 J7 STRAP1 CHANGE_GNE3
AK3 STRAP1 J6 STRAP2
IFPD_AUX_I2CX_SCL STRAP2 Binary Hexadecimal Bom structure SUB_VENDOR PEX_PLL_EN_TERM FB[1:0] SMB_ALT_ADDR VGA_DEVICE DP_PLL_VDD33V
AK2 J5 STRAP3
IFPD_AUX_I2CX_SDA_N STRAP3 J3 STRAP4
STRAP4 0000 0x0 P2GMCN@ 0:No Video BIOS ROM* 0:Disable* 0:Reserved 0:0x9E(Default)* 0:3D Device* 0:Reserved
AB3 0001 0x1 P2GAFR@ 1:BIOS ROM is present 1:Enable 1:Reserved 1:0x9C(Multi-GPU usage) 1:VGA Device 1:Default*
AB4 IFPE_AUX_I2CY_SCL
IFPE_AUX_I2CY_SDA_N K3
2:256MB*
THERMDP 0010 0x2
K4 3:Reserved
AF3 THERMDN
IFPF_AUX_I2CZ_SCL 0011 0x3 M2GMFR@
AF2 3GIO_PADCFG[3:0] SOR[3:0]_EXPOSED PCIE_SPEED_CHANGE_GNE3 PCIE_MAX_SPEED
IFPF_AUX_I2CZ_SDA_N
0100 0x4 P1GFFR@,M2GAFR@
3 0110:GEN1/GEN2 support only* Define audio on each 0:Disable PCIE Gen3 operation* 0:Limit booting to PCIE Gen1 3
0101 0x5 0000:GEN3 support digital display port 0:Enable PCIE Gen3 operation 1:Allow booting to PCIE Gen2/3*
GPU@ 0110 0x6 M1GDFR@,P1GDFR@ 0000:Not in Use*
N13P-GL-A1_FCBGA908
0111 0x7 For N14M-GE Binary strap table Decive ID : 0x1140
1000 0x8 GPU Freq. Memory Size Memory Config strap3 strap2 strap1 strap0 strap4 ROM_SCLK ROM_SI ROM_SO
1001 0x9 900MHz 128Mx16x4 0x6: HYNIX SA00003YO90 R3 H5TQ2G63DFR-11C PD10K PH10K PH10K PD10K
1010 0xA 900MHz 128Mx16x4 0xC: HYNIX SA00006H430 R3 H5TC2G63FFR-11C PH10K PH10K PD10K PD10K
N14M-GE R R R R
1011 0xB 900MHz 256Mx16x4 0xD: MICRON SA000065D10 R3 MT41K256M16HA-107G:E PH10K PH10K PD10K PH10K PD 10K PD 10K PD 10K PD 10K
0x3: HYNIX SA00006DG30 R3 H5TC4G63MFR-11C PD10K PD10K PH10K PH10K
1100 0xC M1GFFR@ 0x4: HYNIX SA00006E840 R3 H5TC4G63AFR-11C PD10K PH10K PD10K PD10K
1101 0xD M2GMCN@

N14M-GE HYNIX 128 H5TQ2G63DFR-11C HYNIX 128 H5TQ2G63FFR-11C HYNIX 256 H5TQ4G63AFR-11C
1110 0xE VRAM Strapstrap3 strap2 strap1 strap0
0XC
strap3 strap2 strap1 strap0
0X4
strap3 strap2 strap1 strap0
0 1 1 0 1 1 0 0 0 1 0 0
1111 0xF
0X6 R1029 R1028 R1030 R1029 R1029
10K_0402_1% 10K_0402_1% 10K_0402_1% 10K_0402_1% 10K_0402_1%
M1GDFR@ M1GDFR@ M1GFFR@ M1GFFR@ M2GAFR@
R1039 R1036 R1037 R1036 R1039 R1037 R1036

10K_0402_1% 10K_0402_1% 10K_0402_1% 10K_0402_1% 10K_0402_1% 10K_0402_1% 10K_0402_1%
M1GDFR@ M1GDFR@ M1GFFR@ M1GFFR@ M2GAFR@ M2GAFR@ M2GAFR@
MICRON 256 MT41K256M16HA-107G:E HYNIX 256 H5TQ4G63MFR-11C

strap3 strap2 strap1 strap0 strap3 strap2 strap1 strap0
0XD 1 1 0 1 0X3 0 0 1 1
R1030 R1029 R1027 R1028 R1027
4 4
10K_0402_1% 10K_0402_1% 10K_0402_1% 10K_0402_1% 10K_0402_1%
M2GMCN@ M2GMCN@ M2GMCN@ M2GMFR@ M2GMFR@
R1037 R1039 R1035

10K_0402_1% 10K_0402_1% 10K_0402_1%
M2GMCN@ M2GMFR@ M2GMFR@

Issued Date Deciphered Date
N14P LVDS 3/7
Custom 1.0
A B C D E
A B C D E
NV DG PEX_IOVVD/Q combined +1.05VSDGPU
1Ux4 Under GPU
4.7U_0603_6.3V6K
NV 14x DG FBVDDQ(DDR3) GB4-128
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
4.7Ux2 Near GPU
VGA@ C1034
VGA@ C1035
VGA@ C1036
VGA@ C1037
VGA@ C1038
VGA@ C1039
VGA@ C1040
1 1 1 1 1 1 1
0.1Ux4,1Ux4,4.7Ux4 Under GPU 10Ux4,22Ux4 Midway GPU & Power supply

10Ux2,22Ux2 Near GPU 2 2 2 2 2 2 2
Under GPU Near GPU Midway GPU & Power supply

U51E
1 1
+1.5VSDGPU Part 5 of 7 +1.05VSDGPU
AA27 AG19
4.7U_0603_6.3V6K
AA30 FBVDDQ_0 PEX_IOVDD_0 AG21
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
AB27 FBVDDQ_1 PEX_IOVDD_1 AG22
VGA@ C1041
VGA@ C1048
VGA@ C1049
VGA@ C1050
VGA@ C1051
VGA@ C1042
VGA@ C1043
VGA@ C1052
VGA@ C1053
VGA@ C1044
VGA@ C1054
2 2 2 2
AB33 FBVDDQ_2 PEX_IOVDD_2 AG24
3300 mA 1 1 1 1 1 1 1
AC27 FBVDDQ_3 PEX_IOVDD_3 AH21
FBVDDQ_4 PEX_IOVDD_4 total 3300mA
AD27 AH25
1 1 1 1 AE27 FBVDDQ_5 PEX_IOVDD_5 Design guide page.76 2 2 2 2 2 2 2
AF27 FBVDDQ_6
AG27 FBVDDQ_7 AG13
Under GPU B13 FBVDDQ_8 PEX_IOVDDQ_0 AG15
FBVDDQ_9 PEX_IOVDDQ_1 Under GPU Near GPU
B16
FBVDDQ_10 PEX_IOVDDQ_2
AG16 Midway GPU & Power supply
B19 AG18
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
E13 FBVDDQ_11 PEX_IOVDDQ_3 AG25

VGA@ C1045
VGA@ C1046
VGA@ C1055
VGA@ C1047
1 1 1 1 FBVDDQ_12 PEX_IOVDDQ_4
E16 AH15 +3VSDGPU
E19 FBVDDQ_13 PEX_IOVDDQ_5 AH18
H10 FBVDDQ_14 PEX_IOVDDQ_6 AH26
2 2 2 2 H11 FBVDDQ_15 PEX_IOVDDQ_7 AH27
H12 FBVDDQ_16 PEX_IOVDDQ_8 AJ27
PEX_SVDD/PLL_HVDD
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
H13 FBVDDQ_17 PEX_IOVDDQ_9 AK27 N14PGV2@
VGA@ C1056
VGA@ C1057
VGA@ C1058
Under GPU H14 FBVDDQ_18 PEX_IOVDDQ_10 AL27
2 1 1
R1050
connect to NV3V3
POWER
H15 FBVDDQ_19 PEX_IOVDDQ_11 AM28 0_0603_5%
H16 FBVDDQ_20 PEX_IOVDDQ_12 AN28
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
H18 FBVDDQ_21 PEX_IOVDDQ_13

0.1Ux1,4.7Ux2 Near GPU 1 2 2
VGA@ C1059
VGA@ C1060
VGA@ C1061
VGA@ C1062
1 1 1 1
H19 FBVDDQ_22 150mA 210mA
H20 FBVDDQ_23 N14MGE@
2 2 2 2
H21 FBVDDQ_24
FBVDDQ_25 PEX_PLL_HVDD
AH12
Near GPU BLM18PG121SN1D_0603
+1.05VSDGPU
NV DG PEX_PLLVDD
H22 R1050
H23
H24
FBVDDQ_26
FBVDDQ_27 1 2
0.1Ux1 Under GPU
FBVDDQ_28
2
Under GPU H8
H9 FBVDDQ_29 PEX_SVDD_3V3
AG12 1Ux1,4.7Ux1 Near GPU 2
L27 FBVDDQ_30 150mA 2

C1063
1
C1064
1
C1065
M27 FBVDDQ_31 VGA@ VGA@ VGA@ if use N14M-GE/GL,use bead NV DG VDD33/3VSMISC
10U_0603_6.3V6M
10U_0603_6.3V6M
N27 FBVDDQ_32 AG26 +PEX_PLLVDD 0.1U_0402_16V4Z 1U_0402_6.3V6K 4.7U_0603_6.3V6K

VGA@ C1066
VGA@ C1067
VGA@ C1068
VGA@ C1069
22U_0603_6.3V6M
22U_0603_6.3V6M
1 1 1 1 FBVDDQ_33 PEX_PLLVDD
P27 1 2 2 120ohm@100MHz(ESR=0.18)
R27
T27
FBVDDQ_34
FBVDDQ_35 Under GPU Near GPU 0.1Ux3 Under GPU 1Per pin
FBVDDQ_36
2 2 2 2 T30
T33 FBVDDQ_37 VDD33_0
J8
K8
1Ux1,4.7Ux1 Near GPU
V27 FBVDDQ_38 VDD33_1 L8 +3VSDGPU
W27 FBVDDQ_39 VDD33_2 M8
W30 FBVDDQ_40 VDD33_3
Near GPU
1U_0402_6.3V6K
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
W33 FBVDDQ_41
VGA@ C1070
VGA@ C1071
VGA@ C1072
VGA@ C1073
VGA@ C1074
FBVDDQ_42 2 2 2 1 1
Y27
FBVDDQ_43 AH8 IFPAB_PLLVDD
IFPAB_PLLVDD AJ8
IFPAB_RSET 1 1 1 2 2
+1.5VSDGPU AG8 IFPAB_IOVDD
IFPA_IOVDD AG9
1 @ 2 0_0402_5% FB_VDDQ_SENSE F1 IFPB_IOVDD
R1051 FB_VDDQ_SENSE
AF7 IFPC_PLLVDD
Under GPU (one per pin) Near GPU
1 @ 2 0_0402_5% FB_GND_SENSE F2 IFPC_PLLVDD AF8
+1.5VSDGPU R1052 FB_GND_SENSE IFPC_RSET
AF6 IFPC_IOVDD
R1053 2 VGA@ 1 40.2_0402_1% FB_CAL_PD_VDDQ J27 IFPC_IOVDD VGA@
FB_CAL_PD_VDDQ RP1002
AG7 IFPD_PLLVDD IFPEF_PLLVDD 1 8
R1054 2 VGA@ 1 42.2_0402_1% FB_CAL_PU_GND H27 IFPD_PLLVDD AN2 IFPEF_IOVDD 2 7
FB_CAL_PU_GND IFPD_RSET IFPC_PLLVDD 3 6
AG6 IFPD_IOVDD IFPD_PLLVDD 4 5
3 R1055 2 VGA@ 1 51.1_0402_1% FB_CAL_TERM_GND H25 IFPD_IOVDD 3
FB_CAL_TERM_GND 10K_0804_8P4R_5%
AB8 IFPEF_PLLVDD VGA@
IFPEF_PLVDD AD6 RP1003
IFPEF_RSET IFPD_IOVDD 1 8
AC7 IFPEF_IOVDD IFPAB_IOVDD 2 7
IFPE_IOVDD AC8 IFPC_IOVDD 3 6
IFPF_IOVDD IFPAB_PLLVDD 4 5
10K_0804_8P4R_5%
GPU@
N13P-GL-A1_FCBGA908
MULTI LEVEL STRAPS
4 4

N14P POWER & GND 4/9
Custom 1.0
A B C D E
A B C D E
U51F U51G
+VGA_CORE +VGA_CORE
Part 6 of 7
A2 D2 Part 7 of 7 V17
AA17 GND_0 GND_100 D31 AA12 VDD_56 V18
AA18 GND_1 GND_101 D33 AA14 VDD_0 VDD_57 V20 N14M-GE 35A
GND_2 GND_102 VDD_1 VDD_58
AA20
AA22 GND_3 GND_103
E10
E22
AA16
AA19 VDD_2 VDD_59
V22
W12
N14P-GV2 45A
GND_4 GND_104 VDD_3 VDD_60
AB12
GND_5 GND_105
E25 AA21
VDD_4 VDD_61
W14 N14P-GT 55A
AB14 E5 AA23 W16
AB16 GND_6 GND_106 E7 AB13 VDD_5 VDD_62 W19
AB19 GND_7 GND_107 F28 AB15 VDD_6 VDD_63 W21
1 1
AB2 GND_8 GND_108 F7 AB17 VDD_7 VDD_64 W23
AB21 GND_9 GND_109 G10 AB18 VDD_8 VDD_65 Y13
A33 GND_10 GND_110 G13 AB20 VDD_9 VDD_66 Y15
AB23 GND_11 GND_111 G16 AB22 VDD_10 VDD_67 Y17
AB28 GND_12 GND_112 G19 AC12 VDD_11 VDD_68 Y18
AB5 GND_15 GND_115 G25 AC19 VDD_14 VDD_71
AB7 GND_16 GND_116 G28 AC21 VDD_15
AC13 GND_17 GND_117 G3 AC23 VDD_16 U1
AC15 GND_18 GND_118 G30 M12 VDD_17 XVDD_1 U2
GND_20 GND_120 VDD_19 XVDD_3
POWER
AC18 G33 M16 U4
AA13 GND_21 GND_121 G5 M19 VDD_20 XVDD_4 U5
AC22 GND_23 GND_123 K2 M23 VDD_22 XVDD_6 U7
AE2 GND_24 GND_124 K28 N13 VDD_23 XVDD_7 U8
AE28 GND_25 GND_125 K30 N15 VDD_24 XVDD_8
AE30 GND_26 GND_126 K32 N17 VDD_25
AE32 GND_27 GND_127 K33 N18 VDD_26 V1
AE33 GND_28 GND_128 K5 N20 VDD_27 XVDD_9 V2
AE5 GND_29 GND_129 K7 N22 VDD_28 XVDD_10 V3
AE7 GND_30 GND_130 M13 P12 VDD_29 XVDD_11 V4
AH10 GND_31 GND_131 M15 P14 VDD_30 XVDD_12 V5
AA15 GND_32 GND_132 M17 P16 VDD_31 XVDD_13 V6
AH19 GND_35 GND_135 M22 P23 VDD_34 XVDD_16
2 AH2 GND_36 GND_136 N12 R13 VDD_35 2
AH22 GND_37 GND_137 N14 R15 VDD_36 W2
AH24 GND_38 GND_138 N16 R17 VDD_37 XVDD_17 W3
AH32 GND_42 GND_142 N23 T12 VDD_41 XVDD_21 W8
GND
AH33 GND_43 GND_143 N28 T14 VDD_42 XVDD_22

AH5 GND_44 GND_144 N30 T16 VDD_43
AH7 GND_45 GND_145 N32 T19 VDD_44 Y1
AJ7 GND_46 GND_146 N33 T21 VDD_45 XVDD_23 Y2
AK10 GND_47 GND_147 N5 T23 VDD_46 XVDD_24 Y3
AK7 GND_48 GND_148 N7 U13 VDD_47 XVDD_25 Y4
AL12 GND_49 GND_149 P13 U15 VDD_48 XVDD_26 Y5
AL18 GND_53 GND_153 P20 U22 VDD_52 XVDD_30
AL2 GND_54 GND_154 P22 V13 VDD_53
AL20 GND_55 GND_155 R12 V15 VDD_54 AA1
AL21 GND_56 GND_156 R14 VDD_55 XVDD_31 AA2
AL23 GND_57 GND_157 R16 XVDD_32 AA3
AL30 GND_61 GND_161 T13 XVDD_36 AA7
AL32 GND_62 GND_162 T15 XVDD_37 AA8
AL33 GND_63 GND_163 T17 XVDD_38
AL5 GND_64 GND_164 T18
3 AM13 GND_65 GND_165 T2 3
AM16 GND_66 GND_166 T20 GPU@
AM19 GND_67 GND_167 T22 N13P-GL-A1_FCBGA908
AM22 GND_68 GND_168 AG11
AM25 GND_69 GND_169 T28
AN1 GND_70 GND_170 T32
AN16 GND_73 GND_173 U12
AN19 GND_74 GND_174 U14
AN22 GND_75 GND_175 U16
AN25 GND_76 GND_176 U19
AN30 GND_77 GND_177 U21
AN34 GND_78 GND_178 U23
AN4 GND_79 GND_179 V12
AN7 GND_80 GND_180 V14
AP2 GND_81 GND_181 V16
AP33 GND_82 GND_182 V19
B1 GND_83 GND_183 V21
B10 GND_84 GND_184 V23
B22 GND_85 GND_185 W13
B25 GND_86 GND_186 W15
B28 GND_87 GND_187 W17
B31 GND_88 GND_188 W18
B34 GND_89 GND_189 W20
B4 GND_90 GND_190 W22
B7 GND_91 GND_191 W28
C10 GND_92 GND_192 Y12
C13 GND_93 GND_193 Y14
4 GND_94 GND_194 4
C19 Y16
C22 GND_95 GND_195 Y19
C25 GND_96 GND_196 Y21
C28 GND_97 GND_197 Y23
C7 GND_98 GND_198 AH11
GND_99 GND_199 C16
GND_OPT W32 Security Classification Compal Secret Data Compal Electronics, Inc.
GND_OPT
N14P POWER & GND 5/7
GPU@ AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
N13P-GL-A1_FCBGA908 Custom 1.0
A B C D E
A B C D E
VRAM DDR3 chips 23 DQSA[7..0]

DQSA[7..0]
DQSA#[7..0]
23 DQSA#[7..0]
DQMA[7..0]
23 DQMA[7..0]
128Mx16 DDR3 *8==>2GB 23 MDA[63..0]

MDA[63..0]
CMDA[30..0]
Low 32 High 32
256Mx16 DDR3 *8==>4GB 23 CMDA[30..0]
U1004 VRAM@ U1005 VRAM@

U1002 VRAM@ U1003 VRAM@
+MEM_VREF2 M8 E3 MDA39 +MEM_VREF3 M8 E3 MDA45 Mode D
+MEM_VREF0 M8 E3 MDA12 +MEM_VREF1 M8 E3 MDA3 +MEM_VREF3 H1 VREFCA DQL0 F7 MDA35 +MEM_VREF2 H1 VREFCA DQL0 F7 MDA40
VREFCA DQL0 VREFCA DQL0 VREFDQ DQL1 VREFDQ DQL1 Address 0..31 32..63
+MEM_VREF1 H1 F7 MDA13 +MEM_VREF0 H1 F7 MDA4 F2 MDA37 F2 MDA46
1 VREFDQ DQL1 F2 MDA8 VREFDQ DQL1 F2 MDA2 CMDA9 N3 DQL2 F8 MDA33 CMDA9 N3 DQL2 F8 MDA41 1
DQL2 DQL2 A0 DQL3 A0 DQL3 CMD0 CS0_L#
CMDA9 N3 F8 MDA15 CMDA9 N3 F8 MDA7 CMDA11 P7 H3 MDA38 Group4 CMDA11 P7 H3 MDA47 Group5
CMDA11 P7 A0 DQL3 H3 MDA9 Group1 CMDA11 P7 A0 DQL3 H3 MDA0 Group0 CMDA8 P3 A1 DQL4 H8 MDA32 CMDA8 P3 A1 DQL4 H8 MDA43
A1 DQL4 A1 DQL4 A2 DQL5 A2 DQL5 CMD1
CMDA8 P3 H8 MDA11 CMDA8 P3 H8 MDA5 CMDA25 N2 G2 MDA36 CMDA25 N2 G2 MDA44
CMDA25 N2 A2 DQL5 G2 MDA10 CMDA25 N2 A2 DQL5 G2 MDA1 CMDA10 P8 A3 DQL6 H7 MDA34 CMDA10 P8 A3 DQL6 H7 MDA42
A3 DQL6 A3 DQL6 A4 DQL7 A4 DQL7 CMD2 ODT_L
CMDA10 P8 H7 MDA14 CMDA10 P8 H7 MDA6 CMDA24 P2 CMDA24 P2
P2 A4 DQL7 P2 A4 DQL7 R8 A5 R8 A5
CMDA24 CMDA24 CMDA22 CMDA22 CMD3 CKE_L
CMDA22 R8 A5 CMDA22 R8 A5 CMDA7 R2 A6 D7 MDA61 CMDA7 R2 A6 D7 MDA53
CMDA7 R2 A6 D7 MDA17 CMDA7 R2 A6 D7 MDA27 CMDA21 T8 A7 DQU0 C3 MDA59 CMDA21 T8 A7 DQU0 C3 MDA49
A7 DQU0 A7 DQU0 A8 DQU1 A8 DQU1 CMD4 A14 A14
CMDA21 T8 C3 MDA21 CMDA21 T8 C3 MDA29 CMDA6 R3 C8 MDA60 CMDA6 R3 C8 MDA55
CMDA6 R3 A8 DQU1 C8 MDA18 CMDA6 R3 A8 DQU1 C8 MDA25 CMDA29 L7 A9 DQU2 C2 MDA57 CMDA29 L7 A9 DQU2 C2 MDA50
A9 DQU2 A9 DQU2 A10/AP DQU3 A10/AP DQU3 CMD5 RST RST
CMDA29 L7 C2 MDA23 CMDA29 L7 C2 MDA30 CMDA23 R7 A7 MDA63 Group7 CMDA23 R7 A7 MDA52 Group6
CMDA23 R7 A10/AP DQU3 A7 MDA19 Group2 CMDA23 R7 A10/AP DQU3 A7 MDA24 Group3 CMDA28 N7 A11 DQU4 A2 MDA56 CMDA28 N7 A11 DQU4 A2 MDA48
CMDA28 N7 A2 MDA22 CMDA28 N7 A2 MDA28 CMDA20 T3 B8 MDA62 CMDA20 T3 B8 MDA54
CMDA20 T3 A12 DQU5 B8 MDA16 CMDA20 T3 A12 DQU5 B8 MDA26 CMDA4 T7 A13 DQU6 A3 MDA58 CMDA4 T7 A13 DQU6 A3 MDA51
CMDA4 T7 A3 MDA20 CMDA4 T7 A3 MDA31 CMDA14 M7 CMDA14 M7
M7 A14 DQU7 M7 A14 DQU7 A15/BA3 +1.5VSDGPU A15/BA3 +1.5VSDGPU
CMDA14 CMDA14 CMD8 A2 A2
A15/BA3 +1.5VSDGPU A15/BA3 +1.5VSDGPU
CMDA12 M2 B2 CMDA12 M2 B2 CMD9 A0 A0
CMDA12 M2 B2 CMDA12 M2 B2 CMDA27 N8 BA0 VDD D9 CMDA27 N8 BA0 VDD D9
CMDA27 N8 BA0 VDD D9 CMDA27 N8 BA0 VDD D9 CMDA26 M3 BA1 VDD G7 CMDA26 M3 BA1 VDD G7
BA1 VDD BA1 VDD BA2 VDD BA2 VDD CMD10 A4 A4
CMDA26 M3 G7 CMDA26 M3 G7 K2 K2
BA2 VDD K2 BA2 VDD K2 VDD K8 VDD K8
VDD VDD VDD VDD CMD11 A1 A1
K8 K8 N1 N1
VDD N1 VDD N1 CLKA1 J7 VDD N9 CLKA1 J7 VDD N9
VDD VDD CK VDD CK VDD CMD12 BA0 BA0
CLKA0 J7 N9 CLKA0 J7 N9 CLKA1# K7 R1 CLKA1# K7 R1
K7 CK VDD R1 K7 CK VDD R1 K9 CK VDD R9 K9 CK VDD R9
CLKA0# CLKA0# CMDA19 CMDA19 CMD13 WE* WE*
CMDA3 K9 CK VDD R9 CMDA3 K9 CK VDD R9 CKE/CKE0 VDD +1.5VSDGPU CKE/CKE0 VDD +1.5VSDGPU
CKE/CKE0 VDD +1.5VSDGPU CKE/CKE0 VDD +1.5VSDGPU
CMD14 A15 A15
CMDA18 K1 A1 CMDA18 K1 A1
CMDA2 K1 A1 CMDA2 K1 A1 CMDA16 L2 ODT/ODT0 VDDQ A8 CMDA16 L2 ODT/ODT0 VDDQ A8
ODT/ODT0 VDDQ ODT/ODT0 VDDQ CS/CS0 VDDQ CS/CS0 VDDQ CMD15 CAS* CAS*
CMDA0 L2 A8 CMDA0 L2 A8 CMDA30 J3 C1 CMDA30 J3 C1
CMDA30 J3 CS/CS0 VDDQ C1 CMDA30 J3 CS/CS0 VDDQ C1 CMDA15 K3 RAS VDDQ C9 CMDA15 K3 RAS VDDQ C9
RAS VDDQ RAS VDDQ CAS VDDQ CAS VDDQ CMD16 CS0_H#
CMDA15 K3 C9 CMDA15 K3 C9 CMDA13 L3 D2 CMDA13 L3 D2
CMDA13 L3 CAS VDDQ D2 CMDA13 L3 CAS VDDQ D2 WE VDDQ E9 WE VDDQ E9
WE VDDQ WE VDDQ 310mAVDDQ 310mAVDDQ CMD17
E9 E9 F1 F1
2 310mAVDDQ F1 VDDQ F1 DQSA4 F3 VDDQ H2 DQSA5 F3 VDDQ H2
2
VDDQ 310mAVDDQ DQSL VDDQ DQSL VDDQ CMD18 ODT_H
DQSA1 F3 H2 DQSA0 F3 H2 DQSA7 C7 H9 DQSA6 C7 H9
DQSA2 C7 DQSL VDDQ H9 DQSA3 C7 DQSL VDDQ H9 DQSU VDDQ DQSU VDDQ
DQSU VDDQ DQSU VDDQ CMD19 CKE_H
DQMA4 E7 A9 DQMA5 E7 A9 CMD20 A13 A13
DQMA1 E7 A9 DQMA0 E7 A9 DQMA7 D3 DML VSS B3 DQMA6 D3 DML VSS B3
DQMA2 D3 DML VSS B3 DQMA3 D3 DML VSS B3 DMU VSS E1 DMU VSS E1
DMU VSS DMU VSS VSS VSS CMD21 A8 A8
E1 E1 G8 G8
VSS G8 VSS G8 DQSA#4 G3 VSS J2 DQSA#5 G3 VSS J2
VSS VSS DQSL VSS DQSL VSS CMD22 A6 A6
DQSA#1 G3 J2 DQSA#0 G3 J2 DQSA#7 B7 J8 DQSA#6 B7 J8
B7 DQSL VSS J8 B7 DQSL VSS J8 DQSU VSS M1 DQSU VSS M1
DQSA#2 DQSA#3 CMD23 A11 A11
DQSU VSS M1 DQSU VSS M1 VSS M9 VSS M9
VSS M9 VSS M9 VSS P1 VSS P1
VSS VSS VSS VSS CMD24 A5 A5
P1 P1 CMDA5 T2 P9 CMDA5 T2 P9
CMDA5 T2 VSS P9 CMDA5 T2 VSS P9 RESET VSS T1 RESET VSS T1
RESET VSS RESET VSS VSS VSS CMD25 A3 A3
T1 T1 ZQ2 L8 T9 ZQ3 L8 T9
ZQ0 L8 VSS T9 ZQ1 L8 VSS T9 ZQ/ZQ0 VSS ZQ/ZQ0 VSS
ZQ/ZQ0 VSS ZQ/ZQ0 VSS CMD26 BA2 BA2
1
VGA@
1
VGA@ J1 B1 R1061 J1 B1 CMD27 BA1 BA1

J1 B1 J1 B1 R1060 L1 NC/ODT1 VSSQ B9 243_0402_1% L1 NC/ODT1 VSSQ B9
R1058 VGA@ L1 NC/ODT1 VSSQ B9 R1059 VGA@ L1 NC/ODT1 VSSQ B9 243_0402_1% J9 NC/CS1 VSSQ D1 J9 NC/CS1 VSSQ D1
NC/CS1 VSSQ NC/CS1 VSSQ NC/CE1 VSSQ NC/CE1 VSSQ CMD28 A12 A12
243_0402_1% J9 D1 243_0402_1% J9 D1 L9 D8 L9 D8
2
L9 NC/CE1 VSSQ D8 L9 NC/CE1 VSSQ D8 NCZQ1 VSSQ E2 NCZQ1 VSSQ E2 CMD29 A10 A10
2
NCZQ1 VSSQ E2 NCZQ1 VSSQ E2 VSSQ E8 VSSQ E8

VSSQ E8 VSSQ E8 VSSQ F9 VSSQ F9
VSSQ VSSQ VSSQ VSSQ CMD30 RAS* RAS*
F9 F9 G1 G1
VSSQ G1 VSSQ G1 VSSQ G9 VSSQ G9
VSSQ VSSQ VSSQ VSSQ Not Available
G9 G9
VSSQ VSSQ 96-BALL 96-BALL
96-BALL 96-BALL SDRAM DDR3 SDRAM DDR3
LOW HIGH
SDRAM DDR3 SDRAM DDR3 H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96
H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96
U1002 U1002 U1002 U1002
3 +1.5VSDGPU +1.5VSDGPU 3
CLKA1
23 CLKA1
1
CLKA0 SA00003YO90 SA00006H430 SA000065D10 SA00006E840
23 CLKA0
+1.5VSDGPU +1.5VSDGPU R1062 R1063 R1064 H5TQ2G63DFR-11C H5TC2G63FFR-11C MT41K256M16HA H5TC4G63AFR-11C
1
VGA@ VGA@ VGA@ HYDFR@ HYFFR@ MTHA@ HYAFR@

VGA@ 1.33K_0402_1% 1.33K_0402_1% 160_0402_1%
R1065 U1003 U1003 U1003 U1003
2
R1066 R1067 160_0402_1% CLKA1#
23 CLKA1#
VGA@ VGA@ +MEM_VREF2 +MEM_VREF3
2
1.33K_0402_1% 1.33K_0402_1% CLKA0#

23 CLKA0#
1 1
R1068 C1075 R1069 C1076
+MEM_VREF0 +MEM_VREF1 VGA@ VGA@ VGA@ VGA@ SA00003YO90 SA00006H430 SA000065D10 SA00006E840
CMDA2 R1070 1 VGA@ 2 10K_0402_5% 1.33K_0402_1% 0.1U_0402_16V4Z 1.33K_0402_1% 0.1U_0402_16V4Z H5TQ2G63DFR-11C H5TC2G63FFR-11C MT41K256M16HA H5TC4G63AFR-11C
CMDA3 R1071 1 VGA@ 2 10K_0402_5% 2 2 HYDFR@ HYFFR@ MTHA@ HYAFR@
1 1
R1073 C1077 R1074 C1078 CMDA5 R1075 1 VGA@ 2 10K_0402_5%
VGA@ VGA@ VGA@ VGA@ U1004 U1004 U1004 U1004
1.33K_0402_1% 0.1U_0402_16V4Z 1.33K_0402_1% 0.1U_0402_16V4Z CMDA18 R1072 1 VGA@ 2 10K_0402_5%
2 2 CMDA19 R1076 1 VGA@ 2 10K_0402_5%
Command Bit Default Pull-down +1.5VSDGPU
ODTx 10k
SA00003YO90 SA00006H430 SA000065D10 SA00006E840
DDR3 CKEx 10k H5TQ2G63DFR-11C H5TC2G63FFR-11C MT41K256M16HA H5TC4G63AFR-11C
HYDFR@ HYFFR@ MTHA@ HYAFR@
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
RST 10k
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
VGA@ C1079
VGA@ C1080
VGA@ C1081
VGA@ C1082
VGA@ C1083
VGA@ C1084
VGA@ C1085
VGA@ C1086
VGA@ C1087
VGA@ C1088
VGA@ C1089
VGA@ C1090
CS* No Termination 1 1 1 1 1 1 1 1 1 1 1 1
U1005 U1005 U1005 U1005
+1.5VSDGPU
2 2 2 2 2 2 2 2 2 2 2 2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
VGA@ C1091
VGA@ C1092
VGA@ C1093
VGA@ C1094
VGA@ C1095
VGA@ C1096
VGA@ C1097
VGA@ C1098
VGA@ C1099
VGA@ C1100
VGA@ C1101
VGA@ C1102
1 1 1 1 1 1 1 1 1 1 1 1 SA00003YO90 SA00006H430 SA000065D10 SA00006E840

H5TQ2G63DFR-11C H5TC2G63FFR-11C MT41K256M16HA H5TC4G63AFR-11C
HYDFR@ HYFFR@ MTHA@ HYAFR@
4 4
2 2 2 2 2 2 2 2 2 2 2 2

N14P DDR3 6/7
Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-9535P M/B Schematics
A B C D E
A B C D E
VRAM DDR3 chips 23 DQSC[7..0]

DQSC[7..0]
DQSC#[7..0]
23 DQSC#[7..0]
128Mx16 DDR3 *8==>2GB 23 DQMC[7..0]
DQMC[7..0]
256Mx16 DDR3 *8==>4GB MDC[63..0]
23
23 MDC[63..0]
CMDC[30..0]
CMDC[30..0] Low 32 High 32
U1006 VRAM@ U1007 VRAM@ U1008 VRAM@ U1009 VRAM@
Mode D
+MEM_VREF4 M8 E3 MDC8 +MEM_VREF5 M8 E3 MDC3 +MEM_VREF6 M8 E3 MDC39 +MEM_VREF7 M8 E3 MDC63 0..31 32..63
1
H1 VREFCA DQL0 F7 H1 VREFCA DQL0 F7 H1 VREFCA DQL0 F7 H1 VREFCA DQL0 F7
Address 1
+MEM_VREF5 MDC12 +MEM_VREF4 MDC7 +MEM_VREF7 MDC33 +MEM_VREF6 MDC58
VREFDQ DQL1 F2 MDC11 VREFDQ DQL1 F2 MDC1 VREFDQ DQL1 F2 MDC37 VREFDQ DQL1 F2 MDC62
DQL2 DQL2 DQL2 DQL2 CMD0 CS0_L#
CMDC9 N3 F8 MDC13 CMDC9 N3 F8 MDC4 CMDC9 N3 F8 MDC32 CMDC9 N3 F8 MDC59
CMDC11 P7 A0 DQL3 H3 MDC9 Group1 CMDC11 P7 A0 DQL3 H3 MDC2 Group0 CMDC11 P7 A0 DQL3 H3 MDC36 Group4 CMDC11 P7 A0 DQL3 H3 MDC60 Group7
A1 DQL4 A1 DQL4 A1 DQL4 A1 DQL4 CMD1
CMDC8 P3 H8 MDC14 CMDC8 P3 H8 MDC6 CMDC8 P3 H8 MDC34 CMDC8 P3 H8 MDC61
CMDC25 N2 A2 DQL5 G2 MDC10 CMDC25 N2 A2 DQL5 G2 MDC0 CMDC25 N2 A2 DQL5 G2 MDC38 CMDC25 N2 A2 DQL5 G2 MDC57
A3 DQL6 A3 DQL6 A3 DQL6 A3 DQL6 CMD2 ODT_L
CMDC10 P8 H7 MDC15 CMDC10 P8 H7 MDC5 CMDC10 P8 H7 MDC35 CMDC10 P8 H7 MDC56
CMDC24 P2 A4 DQL7 CMDC24 P2 A4 DQL7 CMDC24 P2 A4 DQL7 CMDC24 P2 A4 DQL7
A5 A5 A5 A5 CMD3 CKE
CMDC22 R8 CMDC22 R8 CMDC22 R8 CMDC22 R8
CMDC7 R2 A6 D7 MDC18 CMDC7 R2 A6 D7 MDC26 CMDC7 R2 A6 D7 MDC44 CMDC7 R2 A6 D7 MDC54
CMDC21 T8 C3 MDC20 CMDC21 T8 C3 MDC31 CMDC21 T8 C3 MDC43 CMDC21 T8 C3 MDC48
CMDC6 R3 A8 DQU1 C8 MDC17 CMDC6 R3 A8 DQU1 C8 MDC25 CMDC6 R3 A8 DQU1 C8 MDC47 CMDC6 R3 A8 DQU1 C8 MDC52
A9 DQU2 A9 DQU2 A9 DQU2 A9 DQU2 CMD5 RST RST
CMDC29 L7 C2 MDC22 CMDC29 L7 C2 MDC30 CMDC29 L7 C2 MDC40 CMDC29 L7 C2 MDC50
CMDC23 R7 A10/AP DQU3 A7 MDC16 Group2 CMDC23 R7 A10/AP DQU3 A7 MDC27 Group3 CMDC23 R7 A10/AP DQU3 A7 MDC45 Group5 CMDC23 R7 A10/AP DQU3 A7 MDC53 Group6
CMDC28 N7 A2 MDC23 CMDC28 N7 A2 MDC28 CMDC28 N7 A2 MDC42 CMDC28 N7 A2 MDC51
CMDC20 T3 A12 DQU5 B8 MDC19 CMDC20 T3 A12 DQU5 B8 MDC24 CMDC20 T3 A12 DQU5 B8 MDC46 CMDC20 T3 A12 DQU5 B8 MDC55
CMDC4 T7 A3 MDC21 CMDC4 T7 A3 MDC29 CMDC4 T7 A3 MDC41 CMDC4 T7 A3 MDC49
CMDC14 M7 A14 DQU7 CMDC14 M7 A14 DQU7 CMDC14 M7 A14 DQU7 CMDC14 M7 A14 DQU7
A15/BA3 +1.5VSDGPU A15/BA3 +1.5VSDGPU A15/BA3 +1.5VSDGPU A15/BA3 +1.5VSDGPU
CMD8 A2 A2
CMD9 A0 A0
CMDC12 M2 B2 CMDC12 M2 B2 CMDC12 M2 B2 CMDC12 M2 B2
CMDC27 N8 BA0 VDD D9 CMDC27 N8 BA0 VDD D9 CMDC27 N8 BA0 VDD D9 CMDC27 N8 BA0 VDD D9
BA1 VDD BA1 VDD BA1 VDD BA1 VDD CMD10 A4 A4
CMDC26 M3 G7 CMDC26 M3 G7 CMDC26 M3 G7 CMDC26 M3 G7
BA2 VDD K2 BA2 VDD K2 BA2 VDD K2 BA2 VDD K2
VDD VDD VDD VDD CMD11 A1 A1
K8 K8 K8 K8
VDD N1 VDD N1 VDD N1 VDD N1
VDD VDD VDD VDD CMD12 BA0 BA0
CLKC0 J7 N9 CLKC0 J7 N9 CLKC1 J7 N9 CLKC1 J7 N9
CLKC0# K7 CK VDD R1 CLKC0# K7 CK VDD R1 CLKC1# K7 CK VDD R1 CLKC1# K7 CK VDD R1
CK VDD CK VDD CK VDD CK VDD CMD13 WE* WE*
CMDC3 K9 R9 CMDC3 K9 R9 CMDC19 K9 R9 CMDC19 K9 R9
CKE/CKE0 VDD +1.5VSDGPU CKE/CKE0 VDD +1.5VSDGPU CKE/CKE0 VDD +1.5VSDGPU CKE/CKE0 VDD +1.5VSDGPU
CMD14 A15 A15
CMDC2 K1 A1 CMDC2 K1 A1 CMDC18 K1 A1 CMDC18 K1 A1 CMD15 CAS* CAS*
CMDC0 L2 ODT/ODT0 VDDQ A8 CMDC0 L2 ODT/ODT0 VDDQ A8 CMDC16 L2 ODT/ODT0 VDDQ A8 CMDC16 L2 ODT/ODT0 VDDQ A8
2 CMDC30 J3 CS/CS0 VDDQ C1 CMDC30 J3 CS/CS0 VDDQ C1 CMDC30 J3 CS/CS0 VDDQ C1 CMDC30 J3 CS/CS0 VDDQ C1 2
RAS VDDQ RAS VDDQ RAS VDDQ RAS VDDQ CMD16 CS0_H#
CMDC15 K3 C9 CMDC15 K3 C9 CMDC15 K3 C9 CMDC15 K3 C9
CMDC13 L3 CAS VDDQ D2 CMDC13 L3 CAS VDDQ D2 CMDC13 L3 CAS VDDQ D2 CMDC13 L3 CAS VDDQ D2
WE VDDQ WE VDDQ WE VDDQ WE VDDQ CMD17
E9 E9 E9 E9
310mAVDDQ F1 VDDQ F1
310mAVDDQ F1
310mAVDDQ F1
VDDQ 310mAVDDQ VDDQ VDDQ CMD18 ODT_H
DQSC1 F3 H2 DQSC0 F3 H2 DQSC4 F3 H2 DQSC7 F3 H2
DQSC2 C7 DQSL VDDQ H9 DQSC3 C7 DQSL VDDQ H9 DQSC5 C7 DQSL VDDQ H9 DQSC6 C7 DQSL VDDQ H9
DQSU VDDQ DQSU VDDQ DQSU VDDQ DQSU VDDQ CMD19 CKE_H
CMD20 A13 A13
DQMC1 E7 A9 DQMC0 E7 A9 DQMC4 E7 A9 DQMC7 E7 A9
DQMC2 D3 DML VSS B3 DQMC3 D3 DML VSS B3 DQMC5 D3 DML VSS B3 DQMC6 D3 DML VSS B3
DMU VSS DMU VSS DMU VSS DMU VSS CMD21 A8 A8
E1 E1 E1 E1
VSS G8 VSS G8 VSS G8 VSS G8
DQSC#1 G3 J2 DQSC#0 G3 J2 DQSC#4 G3 J2 DQSC#7 G3 J2
DQSC#2 B7 DQSL VSS J8 DQSC#3 B7 DQSL VSS J8 DQSC#5 B7 DQSL VSS J8 DQSC#6 B7 DQSL VSS J8
DQSU VSS DQSU VSS DQSU VSS DQSU VSS CMD23 A11 A11
M1 M1 M1 M1
VSS M9 VSS M9 VSS M9 VSS M9
P1 P1 P1 P1
CMDC5 T2 VSS P9 CMDC5 T2 VSS P9 CMDC5 T2 VSS P9 CMDC5 T2 VSS P9
RESET VSS RESET VSS RESET VSS RESET VSS
CMD25 A3 A3
T1 T1 T1 T1
ZQ4 L8 VSS T9 ZQ5 L8 VSS T9 ZQ6 L8 VSS T9 ZQ7 L8 VSS T9
ZQ/ZQ0 VSS ZQ/ZQ0 VSS ZQ/ZQ0 VSS ZQ/ZQ0 VSS CMD26 BA2 BA2
1
1
243_0402_1%
243_0402_1%
CMD27 BA1 BA1
1
R1077 J1 B1 R1078 J1 B1 J1 B1 R1080 J1 B1
128@ L1 NC/ODT1 VSSQ B9 128@ L1 NC/ODT1 VSSQ B9 R1079 L1 NC/ODT1 VSSQ B9 128@ L1 NC/ODT1 VSSQ B9
NC/CS1 VSSQ NC/CS1 VSSQ NC/CS1 VSSQ NC/CS1 VSSQ CMD28 A12 A12
J9 D1 J9 D1 128@ J9 D1 243_0402_1% J9 D1
L9 NC/CE1 VSSQ D8 L9 NC/CE1 VSSQ D8 243_0402_1% L9 NC/CE1 VSSQ D8 L9 NC/CE1 VSSQ D8 CMD29 A10 A10
2
2
NCZQ1 VSSQ E2 NCZQ1 VSSQ E2 NCZQ1 VSSQ E2 NCZQ1 VSSQ E2
2
VSSQ E8 VSSQ E8 VSSQ E8 VSSQ E8
VSSQ VSSQ VSSQ VSSQ
CMD30 RAS* RAS*
F9 F9 F9 F9
VSSQ G1 VSSQ G1 VSSQ G1 VSSQ G1
VSSQ VSSQ VSSQ VSSQ Not Available
G9 G9 G9 G9
VSSQ VSSQ VSSQ VSSQ
3 96-BALL 96-BALL 96-BALL 96-BALL
LOW HIGH 3
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 U1006 U1006
H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96
CLKC1
23 CLKC1
1
+1.5VSDGPU +1.5VSDGPU SA00003YO90 SA000065D10
R1081 H5TQ2G63DFR-11C MT41K256M16HA
CLKC0 128@ GTHYDFR@ GTMTHA@
23 CLKC0
+1.5VSDGPU +1.5VSDGPU 160_0402_1%
1
R1083 R1084 U1007 U1007
2
R1082 128@ 128@ CLKC1#
23 CLKC1#
128@ 1.33K_0402_1% 1.33K_0402_1%
R1085 R1086 160_0402_1%
128@ 128@
2
1.33K_0402_1% 1.33K_0402_1% CLKC0# +MEM_VREF6 +MEM_VREF7

23 CLKC0# CMDC18 R1091 1 128@ 2 10K_0402_5% SA00003YO90 SA000065D10
1 1 CMDC19 R1093 1 128@ 2 10K_0402_5% H5TQ2G63DFR-11C MT41K256M16HA
+MEM_VREF4 +MEM_VREF5 CMDC2 R1087 1 128@ 2 10K_0402_5% R1088 C1103 R1090 C1104 GTHYDFR@ GTMTHA@
CMDC3 R1089 1 128@ 2 10K_0402_5% 128@ 128@ 128@ 128@
1 1 CMDC5 R1092 1 128@ 2 10K_0402_5% 1.33K_0402_1% 0.1U_0402_16V4Z 1.33K_0402_1% 0.1U_0402_16V4Z U1008 U1008
R1094 C1105 R1095 C1106 2 2
128@ 128@ 128@ 128@
1.33K_0402_1% 0.1U_0402_16V4Z 1.33K_0402_1% 0.1U_0402_16V4Z
2 2
Command Bit Default Pull-down +1.5VSDGPU

SA00003YO90 SA000065D10
ODTx 10k H5TQ2G63DFR-11C MT41K256M16HA
GTHYDFR@ GTMTHA@
DDR3 CKEx 10k
U1009 U1009
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
RST 10k
128@ C1107
128@ C1108
128@ C1109
128@ C1110
128@ C1111
128@ C1112
128@ C1113
128@ C1114
128@ C1115
128@ C1116
128@ C1117
128@ C1118
CS* No Termination 1 1 1 1 1 1 1 1 1 1 1 1
4 4
+1.5VSDGPU
2 2 2 2 2 2 2 2 2 2 2 2
SA00003YO90 SA000065D10
H5TQ2G63DFR-11C MT41K256M16HA
GTHYDFR@ GTMTHA@
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
128@ C1119
128@ C1120
128@ C1121
128@ C1122
128@ C1123
128@ C1124
128@ C1125
128@ C1126
128@ C1127
128@ C1128
128@ C1129
128@ C1130
1 1 1 1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2 2 2 2 Issued Date 2013/02/04 Deciphered Date EOP Title
N14P DDR3 7/7
A B C D E
A B C D E
Place closed to JLVDS1

+3VS
LCD POWER CIRCUIT

1
@ C375
+3VS +LCDVDD +INVPWR_B+ B+
1 U8 W=60mils W=60mils 0.1U_0402_16V4Z 1
1 2
5 OUT W=60mils
L11
IN FBMA-L11-201209-221LMA30_2P
1 1
2 C419 2 1
GND
1U_0402_6.3V6K
C140
4 @ XEMC@ EMC@
IN
1000P_0402_50V7K
C364
1 0.1U_0402_16V4Z 1 1 XEMC@
3 C367 2 2 C365 SM010014520 3000ma
EN 4.7U_0603_6.3V6K 68P_0402_50V8J
G5243T11U_SOT23-5
220ohm@100mhz
Touch Screen Touch Module
2 2 2 DCR 0.04 CONN@
+5VS_TS JTS1
1
16 PCH_ENVDD 1
USB20_N3 2
17 USB20_N3 3 2
USB20_P3
17 USB20_P3 4 3
TS_EN_1 5 4 7
TS_EN_2 6 5 G1 8
6 G2
+3VS ACES_88460-00601-P01
HPD
1
Part Number = SP010013W00
R556 PCB Footprint = ACES_88460-00601-P01_6P
4 CPU_EDP_HPD# 10K_0402_5%
LCD/ LED PANEL Conn.

1
2
D Q8 PCH_GPIO71
2 2 EDP_HPD PCH_GPIO71 18 2
EDP@ G
1
L2N7002LT1G_SOT23-3 D
S
1
EDP_HPD 2 Q33 @
3
G L2N7002LT1G_SOT23-3 1 R959 2
R202 S EDP@ 100K_0402_5%
3
100K_0402_5%
EDP@ W=60mils JLVDS1
2
1
+INVPWR_B+ 1
2 41
3 2 G1 42
4 3 G2 43
GPIO71 W=60mils 5 4 G3 44
+LCDVDD 5 G4
PCH_GPIO71 6 45
7 6 G5 46
+3VS 7 G6
DPST_PWM 8
eDP 0 16 DPST_PWM
BKOFF# 9 8
37 BKOFF# 10 9
PCH_LCD_CLK
LVDS 1 16 PCH_LCD_CLK PCH_LCD_DATA 11 10
16 PCH_LCD_DATA 12 11
PCH_TXOUT0- 13 12
eDP 16
16
PCH_TXOUT0-
PCH_TXOUT0+
PCH_TXOUT0+ 14
15
13
14
PCH_TXOUT1- 16 15
16 PCH_TXOUT1- 16
C372 1 2 0.1U_0402_16V7K EDP@ EDP_TXN0_C PCH_TXOUT1+ 17
4 EDP_TXN0 16 PCH_TXOUT1+ 17
C371 1 2 0.1U_0402_16V7K EDP@ EDP_TXP0_C 18
4 EDP_TXP0 +5VS +5VS_TS 19 18
3 PCH_TXOUT2- 3
16 PCH_TXOUT2- 19
C374 1 2 0.1U_0402_16V7K EDP@ EDP_TXN1_C PCH_TXOUT2+ 20
4 EDP_TXN1 16 PCH_TXOUT2+ 20
C373 1 2 0.1U_0402_16V7K EDP@ EDP_TXP1_C 21
4 EDP_TXP1 22 21
R81 PCH_TXCLK-
16 PCH_TXCLK- 22
4 EDP_AUXN C369 1 2 0.1U_0402_16V7K EDP@ EDP_AUXN_C 0_0603_5% PCH_TXCLK+ 23
16 PCH_TXCLK+ 23
4 EDP_AUXP C370 1 2 0.1U_0402_16V7K EDP@ EDP_AUXP_C 1 @ 2 24
EDP_TXN0_C 25 24
EDP_TXP0_C 26 25
27 26
EDP_TXN1_C 28 27
EDP_TXP1_C 29 28
30 29
R414 1 2 0_0402_5% TS_EN_1 EDP_AUXN_C 31 30
37 TS_EN 31
R424 1 @ 2 0_0402_5% EDP_AUXP_C 32
33 32
R425 1 @ 2 0_0402_5% TS_EN_2 EDP_HPD 34 33
R426 1 2 0_0402_5% 35 34
36 35
TS_INT_1 for TS one chip solution
Touch Screen 37 36
+3VS 37
TS_INT_2 for TS two chip solution USB20_P10 38
17 USB20_P10 39 38
Camera USB20_N10
17 USB20_N10 40 39
40
ACES_50203-04001-001
SP010014B00
CONN@
4 4

eDP Connector
Size
Document Number Rev
Custom 1.0
A B C D E
A B C D E
RP17
680_0804_8P4R_5%
C381 2 1 0.1U_0402_16V7K HDMI_TX1- 4 5 HDMI_CLK- R368 1 XEMC@ 2 0_0402_5% HDMI_R_CK-
16 PCH_DPB_N1
16 PCH_DPB_P1 C382 2 1 0.1U_0402_16V7K HDMI_TX1+ 3 6
16 PCH_DPB_N0 C379 2 1 0.1U_0402_16V7K HDMI_TX2- 2 7
+HDMI_5V_OUT C380 2 1 0.1U_0402_16V7K HDMI_TX2+ 1 8
+5VS 16 PCH_DPB_P0
U3
HDMI_GND
W=40mils 16 PCH_DPB_N2 C383 2 1 0.1U_0402_16V7K HDMI_TX0- 4 5
3 16 PCH_DPB_P2 C384 2 1 0.1U_0402_16V7K HDMI_TX0+ 3 6
OUT C385 2 1 0.1U_0402_16V7K HDMI_CLK- 2 7 HDMI_CLK+ R369 1 XEMC@ 2 0_0402_5% HDMI_R_CK+
1 16 PCH_DPB_N3
1 16 PCH_DPB_P3 C386 2 1 0.1U_0402_16V7K HDMI_CLK+ 1 8
IN C378
1 1
2 0.1U_0402_16V4Z RP18 HDMI_TX0- R370 1 XEMC@ 2 0_0402_5% HDMI_R_D0-
GND 2 EMC@ 680_0804_8P4R_5%
3
1 1 AP2330W-7_SC59-3
C396 C398 +3VS 5

0.1U_0402_16V4Z 0.1U_0402_16V4Z Q14B
2 EMC@ 2 EMC@ DMN66D0LDW-7_SOT363-6 HDMI_TX0+ R371 1 XEMC@ 2 0_0402_5% HDMI_R_D0+
4
HDMI_TX1- R372 1 XEMC@ 2 0_0402_5% HDMI_R_D1-
For ESD at HDMI USB3 test
HDMI_TX1+ R373 1 XEMC@ 2 0_0402_5% HDMI_R_D1+
HDMI_TX2- R374 1 XEMC@ 2 0_0402_5% HDMI_R_D2-
2 2
HDMI_TX2+ R375 1 XEMC@ 2 0_0402_5% HDMI_R_D2+
+3VS
+3VS
1
R376
1M_0402_5% Q14A
2
2
1 6 HDMI_HPD
16 PCH_DPB_HPD
1
1
R121 C387
100K_0402_5% 220P_0402_50V7K
2 XEMC@
2
RP15
2.2K_0804_8P4R_5%
1 8 HDMI_SCLK
3
+HDMI_5V_OUT
2 7 HDMI_SDATA HDMI connector 3
3 6 SDVO_SCLK JHDMI1
+3VS 4 5 SDVO_SDATA HDMI_HPD 19
18 HP_DET
+HDMI_5V_OUT +5V
17
HDMI_SDATA 16 DDC/CEC_GND
HDMI_SCLK 15 SDA
+3VS 14 SCL
13 Reserved
CEC
2
HDMI_R_CK- 12
Q15A 11 CK-
CK_shield
2
DMN66D0LDW-7_SOT363-6 HDMI_R_CK+ 10
HDMI_R_D0- 9 CK+
1 6 HDMI_SCLK 8 D0-
16 SDVO_SCLK D0_shield
HDMI_R_D0+ 7
4 3 HDMI_SDATA D2 HDMI_R_D1- 6 D0+
16 SDVO_SDATA D1-
Q15B XEMC@ 5
DMN66D0LDW-7_SOT363-6 HDMI_R_D1+ 4 D1_shield 20
YSLC05CH_SOT23-3
1
HDMI_R_D2- 3 D1+ GND 21
5
2 D2- GND 22
+3VS D2_shield GND
Place closed to JHDMI1 HDMI_R_D2+ 1 23
D2+ GND
Reserved for ESD
ACON_HMR2U-AK120C
CONN@
4 DC232002700 4

HDMI Conn
Custom 1.0
A B C D E
A B C D E
1 1
+HDMI_5V_OUT
CRB1.0 use 47ohm@100Mhz Bead
L42 EMC@ L35

CRT Connector
BLM18BA470SN1D_2P BLM18BA470SN1D_2P
1 2 CRT_R_1 1 2 CRT_R_2 JCRT1
16 PCH_CRT_R 6
L45 EMC@ L31
BLM18BA470SN1D_2P BLM18BA470SN1D_2P CRT_11 11
1 2 CRT_G_1 1 2 CRT_G_2 1
16 PCH_CRT_G 7
L46 EMC@ L28
BLM18BA470SN1D_2P BLM18BA470SN1D_2P 12
1 2 CRT_B_1 1 2 CRT_B_2 2
16 PCH_CRT_B 8
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
13
1 1 1 1 1 1 1 1 1 3
2
2
9
C648
C615
C611
C622
C601
C588
C647
C618
C616
R536 R537 R538 14
150_0402_1% 150_0402_1% 150_0402_1% CRT_4 4
2 2 2 2 2 2 2 2 2 10 G 16
15 G 17
1
1
5
EMC@ EMC@ EMC@ EMC@ EMC@ EMC@
C-H_13-12201560CP
CONN@
2
DC060006E00
R185 2
+HDMI_5V_OUT 1 XEMC@ 2 0_0603_5% CRT_HSYNC_2
U24 CRT_DATA
1 5 R190
R439 OE Vcc 1 XEMC@ 2 0_0603_5% CRT_VSYNC_2
0_0402_5% 1 1
2 @ 1 CRT_HSYNC 2
16 PCH_CRT_HSYNC IN A C448 C449 CRT_CLK
10P_0402_50V8J 10P_0402_50V8J
3 4 CRT_HSYNC_1 @ 2 2@
GND OUT Y
M74VHC1GT125DF2G_SC70-5
+HDMI_5V_OUT
U23
1 5
OE Vcc
2 @ 1 CRT_VSYNC 2
16 PCH_CRT_VSYNC IN A
R441
0_0402_5%
3 4 CRT_VSYNC_1
GND OUT Y
M74VHC1GT125DF2G_SC70-5
+3VS
3 3
2
G
+HDMI_5V_OUT PCH_CRT_DATA 1 6 CRT_DATA RP37
+3VS 16 PCH_CRT_DATA
D
2.2K_0804_8P4R_5%
Q1008B +HDMI_5V_OUT
1 8 CRT_DATA
5
1 2 C452 DMN66D0LDW-7_SOT363-6 2 7 CRT_CLK
0.1U_0402_16V4Z 3 6 PCH_CRT_CLK
G
+3VS
@ 16 PCH_CRT_CLK PCH_CRT_CLK 4 3 CRT_CLK 4 5 PCH_CRT_DATA
D
1
2
7
U10
Q1008A
VCC_VIDEO
VCC_SYNC
VCC_DDC
3 CRT_R_2
PCH_CRT_HSYNC 13 VIDEO_1 4 CRT_G_2
PCH_CRT_VSYNC 15 SYNC_IN1 VIDEO_2 5 CRT_B_2
SYNC_IN2 VIDEO_3
PCH_CRT_CLK 10 14 CRT_HSYNC_1
PCH_CRT_DATA 11 DDC_IN1 SYNC_OUT1 16 CRT_VSYNC_1
DDC_IN2 SYNC_OUT2
9 CRT_CLK
1 2 8 DDC_OUT1 12 CRT_DATA
4 BYP DDC_OUT2 4
C454
0.1U_0402_16V4Z DDC_CLK/DAT reserved PU Resistor
GND
@
For contact discharge ESD +/-8kV CM2009-00QR_QSOP16
6
@
CRT Connector
Custom 1.0
A B C D E
A B C D E
+1.2V_LAN
+VDDO_CR
U48 L74
37 +LAN_BIASVDDH +3VALW BLM31PG601SN1L_2P +3V_LAN +3V_LAN
4.7U_0603_6.3V6K
20 BIASVDDH EMC@
0.1U_0402_16V4Z
60mil
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 1 1 1 VDDO_CR 1 2
C771
C772
C773
C774
@ @ +3V_LAN_R
+1.2V_LAN 35 17
1 EMC@ +LAN_XTALVDDH
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1 VDDC XTALVDDH 1 1
61
C777
C779
C780
@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
2 2 2 2 VDDC 1
C803
C820 1 1
48 +LAN_AVDDH DMG2301U-7_SOT23-3 EMC@
C784
@
2 2 AVDDH 42 2 2
C783
1U_0402_6.3V6K
+3V_LAN AVDDH 3 1 2
D
7 2 2
56 VDDO Q6
VDDO 1 1
62 C815 C792
G
2
1 VDDO 1
49 LAN_MIDI3-
TRD3_N LAN_MIDI3- 33
50 LAN_MIDI3+ 0.1U_0402_16V7K 0.1U_0402_16V7K
TRD3_P LAN_MIDI3+ 33 2 2
47 LAN_MIDI2-
TRD2_N 46 LAN_MIDI2- 33
LAN_MIDI2+
LAN_MIDI2+ 33
1
TRD2_P
+LAN_AVDDL 39 43 LAN_MIDI1- R12
45 AVDDL TRD1_N 44 LAN_MIDI1+
LAN_MIDI1- 33
10K_0402_5%
20mil L56
AVDDL TRD1_P LAN_MIDI1+ 33
51 +LAN_XTALVDDH 1 1 2
AVDDL +3V_LAN
41 LAN_MIDI0- C785 BLM18AG601SN1D_2P
LAN_MIDI0- 33
2
+LAN_GPHYPLLVDDL 36 TRD0_N 40 LAN_MIDI0+ 0.1U_0402_16V4Z
GPHY_PLLVDDL TRD0_P LAN_MIDI0+ 33
+LAN_PCIEPLLVDD 32 LAN_PWR_EN# 37 20mil 2
R02 modify for ESD L57
PCIE_PLLVDDL +LAN_BIASVDDH 1 2
1
29 C787 BLM18AG601SN1D_2P
C786 1 2 0.1U_0402_16V4Z PLT_RST_BUF# PCIE_PLLVDDL 65 0.1U_0402_16V4Z
EMC@ SO_LINKLED# LAN_LINK# 33
66 2
SCLK_SPD1000LED# 20mil
L58
2 +LAN_AVDDH 1 2
SPD100LED#_SERIALDO BLM18AG601SN1D_2P
1 1
C789 C790
0.1U_0402_16V7K 1 2 C788 PCIE_PRX_C_DTX_P1 28 67 R760 2 @ 1 0_0402_5% @
14 PCIE_PRX_DTX_P1 PCIE_TXD_P TRAFFICLED#_SERIALDI LAN_ACTIVITY# 33
0.1U_0402_16V7K 1 2 C791 PCIE_PRX_C_DTX_N1 27 0.1U_0402_16V4Z 0.1U_0402_16V4Z
14 PCIE_PRX_DTX_N1 PCIE_TXD_N 2 2
33
14 PCIE_PTX_C_DRX_P1 34 PCIE_RXD_P 8 +VDDO_CR_R R761 1 @ 2 0_0603_5% +VDDO_CR
+VDDO_CR
14 PCIE_PTX_C_DRX_N1 PCIE_RXD_N GPIO1_LR_OUT
5 5IN1_LED_R# R762 2 @ 1 0_0402_5%
GPIO_0 5IN1_LED# 38
37 EC_PME# R763 1 @ 2 0_0402_5%
+3V_LAN R764 1 2 4.7K_0402_5% 64 SPROM_DOUT

SI_EEDATA 63 SPROM_CLK
LAN_PME# 3 CS#_EECLK
2 WAKE# 2
R766 1 @ 2 0_0402_5% 11
17,34 PLT_RST_BUF# 31 PREST#
14 CLK_PCIE_LAN 30 PCIE_REFCLK_P
14 CLK_PCIE_LAN# PCIE_REFCLK_N 1 CR_XD_WE#_SD_DETECT_R R767 2 @ 1 0_0402_5% CR_XD_WE#_SD_DETECT
SD_DETECT/XD_WE# CR_XD_WE#_SD_DETECT 33
68
CR_DATA0 R768 1 EMC@ 2 33_0402_5% CR_DATA0_R 25 SR_DISABLE/XD_DETECT#
33 CR_DATA0 CR_DATA0
CR_DATA1 R769 1 EMC@ 2 33_0402_5% CR_DATA1_R 24 59
33 CR_DATA1 1 2 23 CR_DATA1 MS_INS#/XD_CE#
CR_DATA2 R770 EMC@ 33_0402_5% CR_DATA2_R
33 CR_DATA2 1 2 22 CR_DATA2 9
CR_DATA3 R771 EMC@ 33_0402_5% CR_DATA3_R
33 CR_DATA3 52 CR_DATA3 GPIO2_MEDIA_SENSE/XD_RE#
53 CR_DATA4 57 CR_WP#_XD_WP#_R R772 2 @ 1 0_0402_5% CR_WP#_XD_WP#
54 CR_DATA5 CR_WP#/XD_WP# CR_WP#_XD_WP# 33
55 CR_DATA6 60 CR_PWR_EN_R R773 2 @ 1 0_0402_5% CR_PWR_EN
CR_DATA7 CR_LED_CR_BUS_PWR/XD_ALE CR_PWR_EN 33 For EMI request
21 CR_CLK_XD_RY_BY#_R R774 1 2 56_0402_5%
CR_CLK/XD_RY_BY# CR_CLK_XD_RY_BY# 33
EMC@
+3VS 26 CR_CMD_XD_CLE_R R775 1 2 22_0402_5%
CR_CMD_XD_CLE CR_CMD_XD_CLE 33
R776 1 2 1K_0402_5% 58
VMAIN_PRSNT
+3V_LAN
R777 1 2 4.7K_0402_5% 6
TEST1
1 2 10
40mil L59
TEST2 16 +1.2V_LAN_OUT 1 2
40mil
R778 4.7K_0402_5% +1.2V_LAN
SR_LX 4.7UH_PG031B-4R7MS_1.1A_20%
4 13
LOW_PWR SR_VFB 1 1
EMI Request...2010/07/27
C793 C794
LAN_XTALO_R 19 0.1U_0402_16V4Z 10U_0603_6.3V6M
LAN_XTALI 18 XTALO 2 2
XTALI SM010005500 500ma 600ohm@100mhz DCR 0.38
R02 Modify
3
20mil L60 3
15
40mil +LAN_PCIEPLLVDD 1 2
Reserved for leakage current
GND PLANE
SR_VDDP +3V_LAN +1.2V_LAN

14 BLM18AG601SN1D_2P
1 2 LAN_RDAC
15mil 38 SR_VDD
RDAC 1 0.1U_0402_16V4Z 1 4.7U_0603_6.3V6K 1 1
R780 1.24K_0402_1% C795 C796 C797 C798
2 @ 1 12
14,18 LAN_CLKREQ# CLK_REQ# 0.1U_0402_16V4Z 4.7U_0603_6.3V6K
R896 BCM57786XA1KMLG_QFN68_8X8 2 2 2 2
69
0_0402_5% 1 2
+3V_LAN
R794 PLACE NEXT P14
10K_0402_5% 20mil L61
+LAN_GPHYPLLVDDL 1 2
+3V_LAN +1.2V_LAN
BLM18AG601SN1D_2P
1 1
C801 C802
2
1K_0402_5%
0.1U_0402_16V4Z 4.7U_0603_6.3V6K
2 2
LAN_XTALI
R783
LAN_XTALO_R
1
20mil
1
R779 SPROM_CLK L62

Y6 200_0402_1% SPROM_DOUT +LAN_AVDDL 1 2
+1.2V_LAN
25MHZ_10PF_7V25000014 BLM18AG601SN1D_2P
2
1K_0402_5%
1 1
2
R784
C804 C805
1 3 SPROM_CLK SPROM_DOUT
1 3 LAN_XTALO (EECLK) (EEDATA) 0.1U_0402_16V4Z 4.7U_0603_6.3V6K
GND GND 2 2
1 1
1
C799 On chip 1 0
2 4 C800
15P_0402_50V8J 15P_0402_50V8J
2 2 AT24C02 1 1
4 4

Broadcom BCM57786X
A B C D E
A B C D E
+3V_LAN
T1
1
1 24 R786 R787
1
32
32
LAN_MIDI3+
LAN_MIDI3-
LAN_MIDI3+
LAN_MIDI3-
2
3
TCT1
TD1+
MCT1
MX1+
23
22
RJ45_MIDI3+
RJ45_MIDI3-
LAN Connector 1K_0402_5% 1K_0402_5%
1
TD1- MX1-
2
4 21
LAN_MIDI2- 5 TCT2 MCT2 20 RJ45_MIDI2- C806 1 2 220P_0402_50V7K
32 LAN_MIDI2- TD2+ MX2+
32 LAN_MIDI2+ LAN_MIDI2+ 6 19 RJ45_MIDI2+ XEMC@
TD2- MX2- C807 1 2 220P_0402_50V7K
7 18 JRJ45 XEMC@
LAN_MIDI1+ 8 TCT3 MCT3 17 RJ45_MIDI1+ RJ45_MIDI0+ 1
32 LAN_MIDI1+ TD3+ MX3+ PR1+
32 LAN_MIDI1- LAN_MIDI1- 9 16 RJ45_MIDI1- 9 LAN_ACTIVITY#
TD3- MX3- RJ45_MIDI0- 2 LED_YELLOW_A1 LAN_ACTIVITY# 32
10 15 PR1- 10 C808 1 2 68P_0402_50V8J
LAN_MIDI0- 11 TCT4 MCT4 14 RJ45_MIDI0- RJ45_MIDI1+ 3 LED_YELLOW_A2 XEMC@
32 LAN_MIDI0- TD4+ MX4+ PR2+
32 LAN_MIDI0+ LAN_MIDI0+ 12 13 RJ45_MIDI0+
TD4- MX4- RJ45_MIDI2+ 4
PR3+ 11 LAN_LINK#
RJ45_MIDI2- 5 LED_GREEN_B1 LAN_LINK# 32
75_0402_1%
75_0402_1%
75_0402_1%
75_0402_1%
PR3-
1
GST5009-E 12 C809 1 2 68P_0402_50V8J
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
SP050006B10 RJ45_MIDI1- 6 LED_GREEN_B2 XEMC@
PR2-
R788
R789
R790
R791
1 1 1 1
7 13
C810
C811
C812
C813
RJ45_MIDI3+
PR4+ GND 14
2
RJ45_MIDI3- 8 GND
2 2 2 2 PR4- 40mil
SANTA_130451-F
CARD READER_2in1 SP07000TF00 CONN@
DC234005300
RJ45_GND
2
Place close to TCT pin 2
BOTHHAND: S X'FORM_ GST5009-E LF LAN, SP050006B10

TIMAG:S X'FORM_ IH-160 LAN , SP050006F00 JP1 XEMC@
B88069X9231T203_4P5X3P2-2
FCE:S X'FORM_ NS892407 1G , SP050006800 2 1
RJ45_GND C814 1 2 LANGND

EMC@
10P_0402_50V8J
B88069X9231T203_4P5X3P2-2
1
XEMC@
J15
1
40mil JUMP_43X118
D39 EMC@
@
L30ESDL5V0C3-2_SOT23-3
2
Card Reader Connector
JP2
2
+XDPWR_SDPWR_MSPWR
1
JREAD1
For EMI change to 22 ohm Bead
CR_CMD_XD_CLE 3
3 32 CR_CMD_XD_CLE 4 CMD 3
SM01000LU00 300ma 22ohm@100mhz DCR 0.3 VSS
5
R897 2 EMC@ 1 CR_CLK 6 VDD
32 CR_CLK_XD_RY_BY# CLK
BLM15BA220SN1D_0402 7
VSS
CR_DATA0 8
32 CR_DATA0 9 DAT0
CR_DATA1
32 CR_DATA1 DAT1 +XDPWR_SDPWR_MSPWR
CR_DATA2 1
32 CR_DATA2 2 DAT2
CR_DATA3
32 CR_DATA3 CD/DAT3
+3VALW U13
By 3/11 L75
40mil
CR_WP#_XD_WP# 10 1 +XDPWR_SDPWR_MSPWR_R 1 2
32 CR_WP#_XD_WP# 11 WP SW 5 OUT
CR_XD_WE#_SD_DETECT BLM31PG601SN1L_2P
32 CR_XD_WE#_SD_DETECT 12 CD SW IN
1 EMC@ 1 1
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
13 GND SW 2
C817
C819
C821 @
GND SW 4 GND EMC@
IN 1U_0402_6.3V6K
T-SOL_156-1000302601_NR 3 2 2 2
EN CR_PWR_EN 32
CONN@ 1 2
SP07000TF00 C823 G5243T11U_SOT23-5
C230
1U_0402_6.3V6K 0.22U_0402_6.3V6K
2 1
C26
R26
CR_CLK 1 XEMC@ 2 1 2
XEMC@
22_0402_5%
6.8P_0402_50V8C
4 4

LAN Magnetic & RJ45
Custom 1.0
A B C D E
A B C D E
For Wireless LAN

+1.5VS J13 +1.5VS_WLAN
+3VS 60mil +3VS_WLAN JUMP_43X39
@ J3 1 2
1 2 1 2
2 1 1 1 @ 1
JUMP_43X118 C458 @ C459 C460 @ C463
C441 0.1U_0402_16V4Z 0.1U_0402_16V4Z
470P_0402_50V7K 4.7U_0603_6.3V6K 0.1U_0402_16V4Z
1 2 2 2 2
EMC@
1 1
+3VS_WLAN
Mini Card Power Rating
Add 3/12 +3VS_WLAN
+1.5VS_WLAN
R429 1 2 4.7K_0402_5%
JMINI1
WLAN_PME# 1 2
37 WLAN_PME# 1 2
3 4
5 3 4 6
7 5 6 8
14 MINI1_CLKREQ# 7 8
+3VS_WLAN 9 10
+3VALW 11 9 10 12
14 CLK_PCIE_MINI1# 13 11 12 14
U9 W=60mils 14 CLK_PCIE_MINI1 13 14
1 15 16
5 OUT 17 15 16 18
IOAC@ IN 19 17 18 20 WL_OFF#
19 20 WL_OFF# 37
2 21 22 PLT_RST_BUF#
GND 21 22 PLT_RST_BUF# 17,32
1U_0402_6.3V6K
C165
4 14 PCIE_PRX_DTX_N2
23 24
IN 25 23 24 26
1 14 PCIE_PRX_DTX_P2 25 26
3 27 28
EN 29 27 28 30 MINI1_SMBCLK R432 1 @ 2 0_0402_5%
29 30 PCH_SMBCLK 14
G5243T11U_SOT23-5 31 32 MINI1_SMBDATA R434 1 @ 2 0_0402_5% PCH_SMBDATA 14
2 14 PCIE_PTX_C_DRX_N2 31 32
IOAC@ 33 34
14 PCIE_PTX_C_DRX_P2 33 34
35 36
37 35 36 38 USB20_N8 17
37 WLAN_ON 39 37 38 40 USB20_P8 17
41 39 40 42 R443 1 2 100K_0402_5%
+3VS_WLAN 41 42 +3VS_WLAN
43 44 MINI1_LED# 37
2 R435 45 43 44 46 2
0_0402_5% 47 45 46 48
1 @ 2 E51TXD_P80DATA_R 49 47 48 50
37 E51TXD_P80DATA 49 50
1 @ 2 E51RXD_P80CLK_R 51 52
37 E51RXD_P80CLK 51 52
1
R436 53 54
0_0402_5% GNDGND
R437 BELLW_80053-1021
100K_0402_5% CONN@
DC040009P00
2
3 3
4 4

MINI CARD (WLAN)
Custom 1.0
A B C D E
A B C D E
SATA HDD Conn.

JHDD1
1
SATA ODD Conn.
C392 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P0 2 GND JODD1
13 SATA_PTX_DRX_P0 A+
13 SATA_PTX_DRX_N0 C393 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N0 3
4 A- 1
C391 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N0 5 GND C401 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P2 2 GND
13 SATA_PRX_DTX_N0 B- 13 SATA_PTX_DRX_P2 A+
1 C394 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P0 6 13 SATA_PTX_DRX_N2 C402 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N2 3 1
13 SATA_PRX_DTX_P0 7 B+ 4 A-
GND C403 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N2 5 GND
13 SATA_PRX_DTX_N2 B-
C405 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P2 6
8 13 SATA_PRX_DTX_P2 7 B+
+3VS V33 GND
9
10 V33 +5VS
11 V33 8
+5VS 12 GND 1 @ 2
80mils +5VS_ODD 9 DP
GND +5V
10U_0603_6.3V6M
C404
0.1U_0402_16V4Z
C407
13 R593 0_0805_5% 1 10
GND +5V
1
1 @ 2 +5VS_HDD 14 T28 PAD 11
R49 0_0805_5% 15 V5 TP@ 12 MD 14
16 V5 13 GND GND 15
2
17 V5 2 GND GND
18 GND
19 Reserved 23 SANTA_201902-1_13P-T
+3VS +5VS 20 GND GND 24 CONN@
21 V12 GND 25
100mils 22 V12 GND 26 LTCX004HZ00
V12 GND
10U_0603_6.3V6M
C420
0.1U_0402_16V4Z
C397
1 1 CCM_C127043HR022M27FZR_22P-T
1
0.1U_0402_16V4Z
C390
@ CONN@
DC231211190
2
2 2
2 2
3 3
4 4

HDD/ODD
Custom 1.0
A B C D E
A B C D E
+5VALW +USB3_VCCA
For ESD request
L24 D15 C483 U25
W=60mils
17 PCH_USB3_TX0_P 2 1 PCH_USB3_TX0_P_C 2 1 U3TXDP0 U3RXDN0 1 1 10 9 U3RXDN0 0.01U_0402_16V7K 1 8
C484 0.1U_0402_16V7K 1 2 2 GND OUT 7 R454
2 2 IN OUT
U3RXDP0 9 8 U3RXDP0 @ 3 6 0_0402_5%
2 1 PCH_USB3_TX0_N_C 3 4 U3TXDN0 4 IN OUT 5 1 @ 2
17 PCH_USB3_TX0_N 37 USB_EN# EN/ENB OCB USB_OC0# 17,18
C482 0.1U_0402_16V7K U3TXDN0 4 4 7 7 U3TXDN0
DLW21SN670HQ2L_4P SY6288D10CAC_MSOP8
EMC@ U3TXDP0 5 5 6 6 U3TXDP0
3 3
L25
1 17 PCH_USB3_RX0_P 2 1 U3RXDP0 8 1
PCH_USB3_RX0_P
L05ESDL5V0NA-4 SLP2510P8
PCH_USB3_RX0_N 3 4 U3RXDN0 XEMC@
17 PCH_USB3_RX0_N +USB3_VCCA
DLW21SN670HQ2L_4P
EMC@ By 3/18 W=100mils SF000002Y00
1 1 EMC@ 220U 6.3V OSCON
C487
ESR 17mohm@100Khz
0.1U_0402_16V4Z
C486 +
R458 1 @ 2 0_0402_5% 220U_6.3V_M 2

R461 1
L26
@ 2 0_0402_5% 2
USB3.0 Conn.
USB20_P0 3 4 U2DP0_L
17 USB20_P0 3 4 JUSB1
1
USB20_N0 2 1 U2DN0_L U2DN0_L 2 VBUS
17 USB20_N0 2 1 D-
U2DP0_L 3
WCM2012F2SF-670T04-0805_4P 4 D+
XEMC@ U3RXDN0 5 GND
U3RXDP0 6 StdA-SSRX- 10
7 StdA-SSRX+ GND 11
U3TXDN0 8 GND-DRAIN GND 12
U3TXDP0 9 StdA-SSTX- GND 13
StdA-SSTX+ GND
OCTEK_USB-09EAAB
CONN@
2 2
DC233008O20
3 3
USB/B
(USB Port 1, Port2)
+5VALW
PWR/B 1
JUSB2
JPWR1 2 1
1 3 2
1 +3VALW 3
2 +3VLP
4
2 3 LID_SW# USB_EN# 5 4
3 LID_SW# 37 5
4 PWR_LED# PWR_LED# 38 6
4 5 ON/OFFBTN# USB20_N1 7 6
5 ON/OFFBTN# 38 17 USB20_N1 7
6 USB20_P1 8
6 17 USB20_P1 9 8
7 USB20_N2 10 9
GND 17 USB20_N2 10
8 USB20_P2 11
GND 17 USB20_P2 12 11
ACES_88514-00601-071 13 12
CONN@ 14 13
14
SP010014M00
ACES_88514-01201-071
CONN@
SP01001BF00
4 4

USB3.0 Conn/USB_B/PWR_B
Custom 1.0
A B C D E
A B C D E
+EC_VCCA
+3VALW_EC +3VS
+3VLP L29 SM010015410 300ma 80ohm@100mhz DCR 0.3
Reserve for EMI FBMA-L11-160808-800LMT_0603
1 @ 2 +3VALW_EC 1 2 +EC_VCCA EC_MUTE# R287 1 @ 2 10K_0402_5%
+EC_VCCA 43
C329 R286 0_0805_5% 1 1 1 1 2 1
0.1U_0402_16V4Z
C330
0.1U_0402_16V4Z
C331
0.1U_0402_16V4Z
C332
0.1U_0402_16V4Z
C336
1000P_0402_50V7K
C333
10P_0402_50V8J @ @ +3VLP
1 2 2 EMC@ 1 CLK_PCI_LPC C335
EMC@ R285 33_0402_5% 0.1U_0402_16V4Z
2 2 2 2 1 2
ECAGND
EMC@
ECAGND 43
111
125
R288 2 1 47K_0402_5% EC_RST# +5VS
22
33
96
67
+3VALW_EC U22
9
1 1
C337 2 1 0.1U_0402_16V4Z TP_CLK R293 1 2 4.7K_0402_5%
EC_VDD/AVCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD0
TP_DATA R292 1 2 4.7K_0402_5%
GATEA20 1 21 EC_SPOK
18 GATEA20 2 GATEA20/GPIO00 GPIO0F 23 EC_SPOK 43
EC_KBRST# BEEP# +3VS
18 EC_KBRST# 3 KBRST#/GPIO01 BEEP#/GPIO10 26 BEEP# 39
SERIRQ
13 SERIRQ 4 SERIRQ GPIO12 27 USB_EN# 36
LPC_FRAME# GPU_OVERT RP11
13 LPC_FRAME# LPC_FRAME# ACOFF/GPIO13 GPU_OVERT 22
LPC_AD3 5 GPU_OVERT 1 8
13 LPC_AD3 7 LPC_AD3
LPC_AD2 PW M Output C338 2 1 100P_0402_50V8J ECAGND GPU_ALERT 2 7
13 LPC_AD2 8 LPC_AD2 63 3 6
LPC_AD1 BATT_TEMP GPU_TGLREQ#
13 LPC_AD1 10 LPC_AD1 BATT_TEMP/GPIO38 64 BATT_TEMP 43
LPC_AD0 4 5
13 LPC_AD0 LPC_AD0LPC & MISC GPIO39 65 ADP_I
EMC@
12 ADP_I/GPIO3A 66 ADP_I 43,44
CLK_PCI_LPC AD Input AD_BID0 10K_0804_8P4R_5%
+3VALW_EC 17 CLK_PCI_LPC 13 CLK_PCI_EC GPIO3B 75
PLT_RST#
17,5 PLT_RST# 37 PCIRST#/GPIO05 GPIO42 76
EC_RST# VGA_PWROK
R294 1 @ 2 100K_0402_5% EC_PME# EC_SCI# 20 EC_RST# IMON/GPIO43 VGA_PWROK 18,50
18 EC_SCI# EC_SCII#/GPIO0E H_PROCHOT# 49,5
WLAN_ON 38
34 WLAN_ON GPIO1D
R295 1 2 100K_0402_5% LID_SW# 68 GPU_ALERT
DAC_BRIG/GPIO3C 70 GPU_ALERT 22
EN_DFAN1
EN_DFAN1 40
1
RP34 EN_DFAN1/GPIO3D 71 D
DA Output IREF/GPIO3E
1 8 EC_SMB_CK1 KSI0 55 72 H_PROCHOT#_EC 2 Q16
+3VS 2 7 EC_SMB_DA1 KSI1 56 KSI0/GPIO30 CHGVADJ/GPIO3F G LBSS138LT1G_SOT-23-3
3 6 EC_SMB_CK2 KSI2 57 KSI1/GPIO31
S
3
4 5 EC_SMB_DA2 KSI3 58 KSI2/GPIO32 83 EC_MUTE#
KSI4 59 KSI3/GPIO33 EC_MUTE#/GPIO4A 84 EC_MUTE# 39
60 KSI4/GPIO34 USB_EN#/GPIO4B 85 LAN_PWR_EN# 32
2.2K_0804_8P4R_5% KSI5 WLAN_PME#
KSI5/GPIO35 CAP_INT#/GPIO4C WLAN_PME# 34
KSI6 61 PS2 Interface 86 DGPU_HOLD_RST#
KSI7 62 KSI6/GPIO36 EAPD/GPIO4D 87 TP_CLK DGPU_HOLD_RST# 17
39 KSI7/GPIO37 TP_CLK/GPIO4E 88 TP_CLK 38
KSO0 TP_DATA
KSO1 40 KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA 38
KSO2 41 KSO1/GPIO21
KSI[0..7] KSO3 42 KSO2/GPIO22 97 VGATE
2 38 KSI[0..7] 43 KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 98 VGATE 15,49 2
KSO4 VGA_ON
KSO[0..17] 44 KSO4/GPIO24 WOL_EN/GPXIOA01 99 VGA_ON 22,41,50
Reserve for ESD KSO5 Int. K/B HDA_SDOUT_PCH
38 KSO[0..17] 45 KSO5/GPIO25 HDA_SDO/GPXIOA02 109 HDA_SDOUT_PCH 13
KSO6 VCIN0_PH_R
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00
KSO7/GPIO27 SPI Device Interface
C339 1 2 0.01U_0402_16V7K PLT_RST# KSO8 47
KSO9 48 KSO8/GPIO28 119
KSO10 49 KSO9/GPIO29 SPIDI/GPIO5B 120
XEMC@
KSO11 50 KSO10/GPIO2A SPIDO/GPIO5C 126
KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58
KSO12 51 128
KSO13 52 KSO12/GPIO2C SPICS#/GPIO5A
KSO14 53 KSO13/GPIO2D R302 1 2 100K_0402_5%
KSO15 54 KSO14/GPIO2E 73 ENBKL
81 KSO15/GPIO2F ENBKL/GPIO40 74 ENBKL 16
KSO16
KSO17 82 KSO16/GPIO48 PECI_KB930/GPIO41 89 FSTCHG KBL_EN# 38
KSO17/GPIO49 FSTCHG/GPIO50 FSTCHG 44
90 BATT_BLUE_LED#
BATT_CHG_LED#/GPIO52 BATT_BLUE_LED# 38
91 GPU_CLAMP_EN
77 CAPS_LED#/GPIO53 92 GPU_CLAMP_EN 22
EC_SMB_CK1 GPIO PWR_LED PWR_LED 38
43,44 EC_SMB_CK1 78 EC_SMB_CK1/GPIO44 PWR_LED#/GPIO54 93
EC_SMB_DA1 BATT_AMB_LED#
43,44 EC_SMB_DA1 79 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 95 BATT_AMB_LED# 38
EC_SMB_CK2 SM Bus SYSON
14,22 EC_SMB_CK2 80 EC_SMB_CK2/GPIO46 SYSON/GPIO56 121 SYSON 41,46
EC_SMB_DA2 VR_ON
14,22 EC_SMB_DA2 EC_SMB_DA2/GPIO47 VR_ON/GPIO57 127 VR_ON 49
PM_SLP_S4#/GPIO59 PM_SLP_S4# 15
PM_SLP_S3# 6 100 PCH_RSMRST#

15 PM_SLP_S3# 14 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 101 PCH_RSMRST# 15
PM_SLP_S5# EC_LID_OUT#
15 PM_SLP_S5# 15 PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 102 EC_LID_OUT# 18
EC_SMI# VCIN1_PROCHOT_R
18 EC_SMI# 16 EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 103
TS_EN H_PROCHOT#_EC
29 TS_EN 17 GPIO0A H_PROCHOT#_EC/GPXIOA06 104 H_PROCHOT#_EC 43
MINI1_LED# MAINPWON
34 MINI1_LED# 18 GPIO0B VCOUT0_PH/GPXIOA07 105 MAINPWON 43,45 1 2
GPU_TGLREQ# GPO BKOFF# BKOFF# @ ACIN
22 GPU_TGLREQ# WL_OFF# 19 GPIO0C BKOFF#/GPXIOA08 106 PBTN_OUT# BKOFF# 29
GPIO R297
PBTN_OUT# 15
1
34 WL_OFF# 25 GPIO0D PBTN_OUT#/GPXIOA09 107 100K_0402_5%
FAN_SPEED1 28 EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10 108 SA_PGOOD C342
40 FAN_SPEED1 FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11 SA_PGOOD 47
EC_PME# 29 100P_0402_50V8J
32 EC_PME#
2
3 E51TXD_P80DATA 30 EC_PME#/GPIO15 EMC@ 3
34 E51TXD_P80DATA EC_TX/GPIO16
E51RXD_P80CLK use for BT_ON E51RXD_P80CLK 31 110 ACIN
34 E51RXD_P80CLK EC_RX/GPIO17 AC_IN/GPXIOD01 ACIN 15,44
PCH_PWROK 32 112 EC_ON
15 PCH_PWROK 34 PCH_PWROK/GPIO18 EC_ON/GPXIOD02 114 EC_ON 45
PWR_SUSP_LED# ON/OFF
38 PWR_SUSP_LED# 36 SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 115 ON/OFF 38
EC_WLAN_LED# GPI LID_SW#
38 EC_WLAN_LED# NUM_LED#/GPIO1A LID_SW#/GPXIOD04 116 LID_SW# 36
SUSP#
SUSP#/GPXIOD05 117 SUSP# 41,44,46,48
GPU_ACIN
GPXIOD06 118 GPU_ACIN 22
9012_PECI R306 1 2 43_0402_1%
PECI_KB9012/GPXIOD07 H_PECI 5
122
AGND/AGND
T39 PAD 123 XCLKI/GPIO5D 124 +V18R

GND/GND
GND/GND
GND/GND
GND/GND
TP@ XCLKO/GPIO5E V18R

1
GND0
C344 +3VALW_EC
4.7U_0603_6.3V6K
KB9012QF-A3_LQFP128_14X14 2
11
24
35
94
69
113
20mil Connection for power OTP mechanism
1
L30
ECAGND 2 1 R309 comparator is incorporated by 9012
FBMA-L11-160808-800LMT_0603 10K_0402_5%
@
2
SM010015410 300ma 80ohm@100mhz DCR 0.3 VCIN0_PH_R 2 @ 1
VCIN0_PH 43
R442 0_0402_5%
VCIN1_PROCHOT_R 2 @ 1
Board ID R440 0_0402_5%
VCIN1_PROCHOT 43
See definition no Notes page, NEED to check EVERY TIME before new gerber-out
+3VALW_EC
2
R314
4 Ra 100K_0402_5% 4
Phase Revision BID0 BID1
1
AD_BID0 EVT 0.1 0 X

2
R316
1
C346 * PVT 0.2 1 X
Rb 33K_0402_5% 0.1U_0402_16V4Z PVT2 0.3 2 X
@
2
MP 1.0 3 X
1
EC ENE-KB9012
A B C D E
A B C D E
KSI[0..7]
KB Conn. KSO[0..17]
KSI[0..7] 37
JKB1
KSO[0..17] 37
KSO0 1
KSO1 2 1
KSO2 3 2
KSO3 4 3
KSO4 5 4
KSO5 6 5 TP_CLK
KSO6 7 6 TP_DATA
KSO7 8 7
100P_0402_50V8J
9 8
XEMC@ C553
XEMC@ C551
KSO8
100P_0402_50V8J
1
9 1 1 1
KSO9 10
KSO10 11 10
KSO11 12 11
KSO12 13 12 2 2
KSO13 14 13
KSO14 15 14
KSO15 16 15
KSO16 17 16
KSO17 18 17
KSI0
KSI1
19
20
18
19 To TP/B Conn.
KSI2 21 20
KSI3 22 21 +5VS
KSI4 23 22
23 JTP2
KSI5 24 0.1U_0402_16V4Z
KSI6 25 24 27 1 C663 1 2
KSI7 26 25 G1 28 1 2 SW4 SW5
26 G2 2 3 TP_DATA 37
TJE-532QR5_6P TJE-532QR5_6P
3 TP_CLK 37
4 LEFT_BTN# 3 1 RIGHT_BTN# 3 1
E-T_6905-E26N-01R 4 5 RIGHT_BTN#
CONN@ 5 6 LEFT_BTN# 4 2 4 2
6
SP01000IJ00
7
5
6
5
6
GND 8
GND
KB Conn. ACES_88514-00601-071
JKB2
CONN@ 100g for Press 100g for Press
2 KSO0 1 SP010014M00 2
KSO1 2 1
KSO2 3 2
KSO3 4 3
KSO4
KSO5
5
6
4
5
KB BackLight Conn.
KSO6 7 6 +5VS
KSO7 8 7 JBL1
8
S
KSO8 9 3 1 +5VS_BL 4 6
KSO9 10 9 +5VALW BL@ 3 4 G2 5
KSO10 11 10 2 3 G1
KSO11 12 11 R451 Q44 1 2 +3VALW
G
LED
2
KSO12 13 12 100K_0402_5% DMG2301U-7_SOT23-3 1 LED6

KSO13 14 13 1 BL@ 2 KBL_EN_R ACES_50504-0040N-001 PWR_LED#
15 14 PWR_LED# 36 1 2 1 2
KSO14 CONN@ 37 BATT_BLUE_LED# BATT_BLUE_LED#
15
1
KSO15 16 1 @ 2 D Q17 B R699 51_0402_5%
16 SP01000Z300
KSO16 17 R592 37 PWR_LED 2 L2N7002LT1G_SOT23-3
17
1
KSO17 18 0_0402_5% D G BATT_AMB_LED# 3 4 1 2

18 1 37 BATT_AMB_LED#
1
KSI0 19 2 A R698 680_0402_5%
37 KBL_EN# S
3
KSI1 20 19 G C524 R535
KSI2 21 20 Q26 100K_0402_5% LTST-C295TBKF-CA_AMBER-BLUE
S 0.1U_0603_25V7K
3
KSI3 22 21 L2N7002LT1G_SOT23-3 2 LED7

22 @
KSI4 23 @ avoid flash issue when
2
KSI5 24 23 abnormall shutdown PWR_LED# 1 2 1 2
KSI6 25 24 27 B R700 51_0402_5%
KSI7 26 25 G1 28
26 G2 PWR_SUSP_LED# 3 4 1 2
37 PWR_SUSP_LED# A R701 680_0402_5%
E-T_6905-E26N-01R +3VS
3 CONN@ LTST-C295TBKF-CA_AMBER-BLUE 3
SP01000IJ00 HDD LED For BCM57786X
2
+3VS
+3VS R632 +3VS

10K_0402_5% LED8
5
R740 LED4 U39
1
51_0402_5% 2 EC_WLAN_LED# 1 2 1 2
ON/OFF BTN
P
B 5IN1_LED# 32 37 EC_WLAN_LED#
1 2 2 1 MEDIA_LED# 4
Y
A R702 680_0402_5%
+3VLP A 1
A PCH_SATALED# 13
G
LTST-C191KFKT-2CA_ORANGE
LTST-C191TBKT-CA_BLUE MC74VHC1G08DFT2G_SC70-5
3
2
R534
100K_0402_5%
1
ON/OFFBTN# 1 @ 2
ON/OFF 37
R594
0_0402_5%
4 36 ON/OFFBTN# 4

KB & TP & LED
Custom 1.0
A B C D E
A B C D E
Int. Speaker Conn.

+5VS +VDDA JSPK1
SPKR+ 1 2
40mil SPK_R+ 1
J6 R527 XEMC@ 0_0603_5%
40mil 1 2 40mil SPKR- R528 1 XEMC@ 2 0_0603_5% SPK_R- 2 1
2
1 SPKL+ R532 1 XEMC@ 2 0_0603_5% SPK_L+ 3 5
C554 JUMP_43X118 SPKL- R533 1 XEMC@ 2 0_0603_5% SPK_L- 4 3 G1 6
EMC@ @ 4 G2
0.1U_0402_16V4Z ACES_88266-04001
3
2 CONN@ GND
+VDDA SP02000K200
D27 D37
AZ5125-02S.R7G_SOT23-3 AZ5125-02S.R7G_SOT23-3
XEMC@ XEMC@
1
1 GND 1
R523
HP_PLUG#_1 100K_0402_5%
1
SM010014520 3000ma 220ohm@100mhz DCR 0.04
2
L33 +PVDD_HDA
40mil
1
FBMA-L11-201209-221LMA30_2P D
2 1 0.1U_0402_16V4Z Q31 2 HP_PLUG# GND GND
+VDDA
1 L2N7002LT1G_SOT23-3 G
1
10U_0603_6.3V6M
C608
C558 S
Headphone Out
3
2 2 GNDA
C444 C445
2 2 XEMC@ XEMC@ JHP1
GNDA 330P_0402_50V7K 330P_0402_50V7K COM_MIC 4
1 1
GND
Place near Pin41 Place near Pin46 L36 3
0_0603_5%
HP_LEFT R238 1 2 60.4_0603_1% HPOUT_L_1 1 XEMC@ 2 HPOUT_L_2 1
L55 1 @ 2 0.1U_0402_16V4Z +3VS_VDDA
+3VS
HP_RIGHT R237 1 2 60.4_0603_1% HPOUT_R_1 1 XEMC@ 2 HPOUT_R_2 2
1
HD Audio Codec
1
10U_0603_6.3V6M
C605
0_0603_5% C604 L38 5

0_0603_5%
GNDA
2
2 HP_PLUG# 6 7
GNDA SINGA_2SJ3053-100111F
Place near Pin40 SM010030010 200ma 120ohm@100mhz DCR 0.2 CONN@
20mil +MIC2_VREFO COM_MIC DC230009K00
SM010030010 200ma 120ohm@100mhz DCR 0.2
+3VS_DVDD 0.1U_0402_16V4Z L52 1 @ 2 HP_PLUG# GNDA
+3VS
1
+AVDD1_HDA
2
0_0603_5% R539
L54 1 @ 2 20mil 1
@ C582
1
C636
1
C564 2.2K_0402_5% D1
+VDDA
10U_0603_6.3V6M
C567
1 R542 AZ5125-02S.R7G_SOT23-3
1
2 0_0603_5% 10U_0603_6.3V6M 22K_0402_5% EMC@ 2
2
C562 2 2 2 MIC2JD 1 2 COM_MIC
0.1U_0402_16V4Z
2
2
1
2
0.1U_0402_16V4Z GND Place near Pin1, 9 C571
GNDA R543
26
40
41
46
36
1
1
9
Place near Pin25, 38 U34 10U_0603_6.3V6M 22K_0402_5%
2
DVDD
DVDD_IO
CPVDD
AVDD1
AVDD2
PVDD1
PVDD2
Internal MIC INT_MIC_R 2 1 INT_MIC C770 1 2 LINE2_C_L 24
1
R726 1K_0402_5% 4.7U_0603_6.3V6K LINE2_L
C62 1 2 C769 1 2 LINE2_C_R 23
EMC@ 1000P_0402_50V7K 4.7U_0603_6.3V6K LINE2_R 35mA 42 SPKL+
GNDA C568 1 2 MIC2_C_L 17 68mA 600mA SPK_OUT_L+
GNDA GNDA GND
COM_MIC 2 1 COM_MIC_R 4.7U_0603_6.3V6K MIC2_L
Combo MIC
R540 1K_0402_5% C569 1 2 MIC2_C_R 18 43 SPKL-
4.7U_0603_6.3V6K MIC2_R SPK_OUT_L-
22 45 SPKR+
LINE1_L SPK_OUT_R+
21
LINE1_R 44 SPKR-
19 SPK_OUT_R-
MIC1_L 32 HP_LEFT
20 HPOUT_L
MIC1_R 33 HP_RIGHT
35 HPOUT_R
1 CBN 8 HDA_SDIN0_AUDIO 1 R547 2
SDATA_IN HDA_SDIN0 13
C570 33_0402_5%
2.2U_0402_6.3V6M 37 5
2 CBP SDATA_OUT HDA_SDOUT_AUDIO 13
29 10
+MIC2_VREFO MIC2_VREFO SYNC HDA_SYNC_AUDIO 13
10mil 11 HDA_RST_AUDIO#
RESETB HDA_RST_AUDIO# 13
30
3 MIC1_VREFO_R 6 3
+INTMIC_VREFO
10mil 31 BCLK HDA_BITCLK_AUDIO 13
MIC1_VREFO_L XEMC@ +INTMIC_VREFO
C584 1 2
10mil 27 1 XEMC@ 2 1 2 C573
GNDA LDO1_CAP
10U_0603_6.3V6M R548 0_0402_5% 22P_0402_50V8J
Int. MIC
1
GNDA C574 1 2 39 GND R417 SM010030010 200ma 120ohm@100mhz DCR 0.2
10U_0603_6.3V6M LDO2_CAP 2
GPIO0/DMIC_DATA For EMI
GND C583 1 2 7 10K_0402_5%
10U_0603_6.3V6M LDO3_CAP 3
GPIO1/DMIC_CLK 15mil 15mil
GNDA R546 2 1 20K_0402_1% 15 JMIC1
2
JDREF 47 INT_MIC_R 1 XEMC@ 2 INT_MIC_R_1 1
PD# EC_MUTE# 37 L51 2 1
0_0603_5% 2
Place near 1
GND C550
codec C575 1 2 2.2U_0402_6.3V6M CPVEE 34 12 MONO_IN 2 1 BEEP#_R 1 @ 2 XEMC@ 3
CPVEE PCBEEP BEEP# 37 G1
220P_0402_50V7K 4
HP_PLUG#_1 2 1 SENSE_A
10mil 13 16 2 G2
R545 39.2K_0402_1% C555 R529
14 SENSE A MONO_OUT 38 1U_0402_6.3V6K 47K_0402_5% ACES_88266-02001
SENSE B AVSS2 CONN@
2
28 CODEC_VREF 1 1 2 GND SP020008Y00

MIC2JD 48 VREF XEMC@ PCH_SPKR 13
SPDIFO 10mil 1 1 1
2.2U_0402_6.3V6M
C577
R531
4.7K_0402_5%
C556
@ @ 100P_0402_50V8J R530
0.1U_0402_16V4Z
C576
10U_0603_6.3V6M
C578
4 25 47K_0402_5% GNDA
DVSS AVSS1 2
1
49 2 2 2
GND
ALC3225-CG_MQFN48_6X6
GND
GNDA Place next pin27 GNDA
J7 J14
JUMP_43X39 JUMP_43X39
4 1 2 1 2 4
@ 1 2 @ 1 2
GNDA
J11 J12
JUMP_43X39 JUMP_43X39
1 2 1 2
@ 1 2 @ 1 2
GND GNDA GND GNDA

HD Audio Codec ALC3225
A B C D E
A B C D E
FAN1 Conn
+5VS C632
4.7U_0603_10V6K H3 H4 H5 H6 H9 H10 H11 H12 H17
1 2 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 FD1 FD2
U31 @ @
1
1 1
1 8
2 EN GND 7 FIDUCIAL_C40M80 FIDUCIAL_C40M80
+VCC_FAN1 3 VIN GND 6
2 @ 1 4 VOUT GND 5 @ @ @ @ @ @ @ @ @ FD3 FD4
37 EN_DFAN1 VSET GND
R515 NCT3942S_SO8 H13 H14 H15 H16 H20 H24
0_0402_5% H_4P0 H_4P0 H_4P0 H_4P0 H_4P0 H_4P0 @ @
1
FIDUCIAL_C40M80 FIDUCIAL_C40M80
1
C627 @ @ @ @ @ @
4.7U_0603_10V6K
+3VS 1 2 H21 H27
@ H_3P0 H_3P7
C631
1
1000P_0402_50V7K
R516 1 2
1
10K_0402_5%
2 2
40mil JFAN1
2
+VCC_FAN1 1 @ @
2 1 4
37 FAN_SPEED1 2 GND
3 5
3 GND
1
C630 H22 H23
1000P_0402_50V7K ACES_88231-03041 H_2P5N H_2P5X3P5N
XEMC@ CONN@
2
SP020020710
@ @
1
3 3
4 4

FAN & Screw Hole & G-Sensor
Custom 1.0
A B C D E
A B C D E
+5VALW
+1.5V to +1.5VS 2
C468
1 4.7U_0603_6.3V6K
2
+1.5V +1.5VS
U30 R552
AO4478L_SO8 100K_0402_5%
8 1 U11 @ J36
4.7U_0603_6.3V6K
C414
7 2 2 +3VALW 1 14 +3VS_OUT 1 2 +3VS
1
VIN1 VOUT1 1 2
2
4.7U_0603_6.3V6K
C410
6 3 2 13 SUSP
5 VIN1 VOUT1 46 SUSP
2 R377 47K_0402_5% C976 JUMP_43X118
1 470_0603_5% SUSP# 2 R927 1 3VS_ON 3 12 2 1 330P_0402_50V7K 1
1 C980 ON1 CT1 Q29
4
1 2 +5VALW 4 11 L2N7002LT1G_SOT23-3
1
VBIAS GND
1
1 +1.5VS_R 0.1U_0402_16V4Z 2 1 D
2 R926 1 5VS_ON 5 10 2 1 C469 2
ON2 CT2 37,44,46,48 SUSP#
6
0_0402_5% 330P_0402_50V7K 4.7U_0603_6.3V6K G
1
R378 FF change to CPU C979 +5VALW
6 9 C967 @ J37 S
3
330K_0402_5% Q1009A 1 2 7 VIN2 VOUT2 8 +5VS_OUT 1 2 R555
VIN2 VOUT2 1 2 +5VS
+VSB 2 1 1.5VS_GATE DMN66D0LDW-7_SOT363-6 2 SUSP @ 0.1U_0402_16V4Z 10K_0402_5%
15 JUMP_43X118
GPAD
1
2
C416 TPS22966DPUR_SON14_2X3
3
0.1U_0603_25V7K
2
SUSP 5
Q1009B
4
DMN66D0LDW-7_SOT363-6 +0.75VS +1.05VS_VTT +1.8VS
2
R566 R567 R568
470_0603_5% @ 470_0603_5% @ 470_0603_5%
+1.05VS_VTT to +1.05VSDGPU
1
+0.75VS_R +1.05VS_VTT_R +1.8VS_R
+3VS to +3VSDGPU for GPU
1
2 D D D 2
+1.05VS_VTT +1.05VSDGPU 2 SUSP 2 SUSP 2 SUSP
U40 G G G
AO4478L_SO8 S Q36 S Q37 S Q38
3
8 1 +3VS +3VSDGPU L2N7002LT1G_SOT23-3 L2N7002LT1G_SOT23-3 L2N7002LT1G_SOT23-3
(By 3/12)
10U_0603_6.3V6M
C1447
1U_0402_6.3V6K
C1449
7 2 U12 100mil(1.5A) @ @
1
10U_0603_6.3V6M
C1448
6 3 1 1 1
5 R1101 5 OUT
1 IN
47_0603_5% 2
+1.5V +5VALW
VGA@
VGA@
VGA@ VGA@ 2
4
2 2 4 GND C621
3 2
2 +1.05VSDGPU_R IN VGA@
2
2
C620 3 1 4.7U_0603_6.3V6K
VGA@ EN R573 R554
1U_0402_6.3V6K G5243T11U_SOT23-5 @ 470_0603_5% 100K_0402_5%
5 VGA_ON# 1 VGA@ @
+VSB 1 VGA@ 2 1.05VSDGPU_GATE
1
R1105 Q54B SYSON#
4
6
270K_0402_5% DMN66D0LDW-7_SOT363-6 +1.5V_R
3
1 VGA@
6
C1451
VGA_ON# 2 0.1U_0603_25V7K
22,37,50 VGA_ON 5
Q54A VGA@ VGA_ON From EC SYSON
2 2 SYSON 37,46
DMN66D0LDW-7_SOT363-6 SYSON# Q40B
1
VGA@ Q40A DMN66D0LDW-7_SOT363-6
4
DMN66D0LDW-7_SOT363-6 @
1
@
3 3
注意 S3 reduce +5VALW
+0.75V sequence
2
R560
100K_0402_5%
VGA@
1
VGA_ON#
Q34
L2N7002LT1G_SOT23-3
1
D
VGA_ON 2
G
2
VGA@ S
3
R561
100K_0402_5%
VGA@
1
4 4

DC Interface
Custom 1.0
A B C D E
A B C D E
1 1
EMI@ PL102
HCB2012KF-121T50_0805
1 2
VIN
CONN@ PJP101 EMI@ PL101
ACES_50305-00441-001_4P HCB2012KF-121T50_0805
DC_IN_S1 1 2
1
2
3
4
1
GND
GND EMI@ PC101 EMI@ PC102 EMI@ PC103 EMI@ PC104
1000P_0603_50V7K 100P_0603_50V8 100P_0603_50V8 1000P_0603_50V7K
2
2
2 2
PBJ1 @ PR57 PR102

560_0603_5% 560_0603_5%
2 1 +RTCBATT_R1 1 2 +RTCBATT_R 1 2 +RTCBATT
ML1220T13RE
3 3
@ PR105
0_0402_5%
1 2
+3VLP +CHGRTC
4 4

DCIN
Custom 1.0
A B C D E
A B C D E
EMI@ PL202 +3VLP

HCB2012KF-121T50_0805
CONN@ PJP201 1 2
SUYIN_200275GR008G13GZR
10 EMI@ PL201
GND 9 HCB2012KF-121T50_0805
GND 8
8 7
BATT_S1 1 2 BATT+ <45,47>
1
7 6 BI @ PC209
6 5
1
TH 2 1 0.1U_0603_25V7K
+3VLP
2
5 4
1
EC_SMCK PR206
1 4 3 1
EC_SMDA 6.49K_0402_1% EMI@ PC202 EMI@ PC201 @ PR229 @ PR230
3 2
1
PR203 1000P_0402_50V7K 0.01U_0402_25V7K 10K_0402_1% 10K_0402_1%
2
2 1 PR202 PR208 1K_0402_1%
2
1
1
100_0402_1% 1K_0402_1%
1
1 2 @ PU204
BATT_TEMP 37 1 8
PR201 @ PR231
2
100_0402_1% 100K_0402_1% VCC TMSNS1
EC_SMB_CK1 37,44
2 7 2 1
2
GND RHYST1
EC_SMB_DA1 37,44
1
MAINPWON 3 6 @ PR232
37,45 MAINPWON OT1 TMSNS2 47K_0402_1%
4 5 @ PH202
OT2 RHYST2 100K_0402_1%_TSM0B104F4251RZ
G718TM1U_SOT23-8
2
2 2
For KB9012 For KB9012 Active Recovery

OTP sense 20mΩ
92℃ 1.2V, Active 65W 84W,1.2V 56W,0.793V
56℃ 2.255V, Recovery 90W 117W,1.2V 77W,0.791V

PQ202
TP0610K-T1-E3_SOT23-3
3 1
PH201 under CPU botten side : 120W
B+ +VSBP
CPU thermal protection at 92 degree C ( shutdown )
0.22U_0603_25V7K
0.1U_0603_25V7K
1
Recovery at 56 degree C
1
PR211
PC205
PC206
100K_0402_1%
3 37 EC_SPOK 3
2
PR212 @
2
22K_0402_1% 37 +EC_VCCA ADP_I 37,44

VL 2 1
65W@ PR218
1
4.87K_0402_1%
1
PR228
@ PR213 12.4K_0402_1% 90W@ PR218
100K_0402_1% 10.5K_0402_1%
2
@ PR219
2
0_0402_5% D
1 2 2 VCIN0_PH 37
45 SPOK G PQ203
2N7002KW_SOT323-3
1
S
3
@ PC208 VCIN1_PROCHOT 37
1U_0402_6.3V6K
2
PR207 10K_0402_1%
1
1 @ 2 H_PROCHOT#_EC 37
PH201
100K_0402_1%_TSM0B104F4251RZ
@ PJ201 B value:4250K±1%
1 2
+VSBP +VSB
2
1 2
JUMP_43X39
1
1
PR225
10K_0402_1%
PR226
0_0402_5%
4 4
For 65W adapter==>action 84W , Recovery 56W
2
@
For 90W adapter==>action 117W , Recovery 77W
2
37 ECAGND
BATTERY CONN / OTP
Custom 1.0
A B C D E
A B C D
for reverse input protection
1
D
2 PQ301
G 2N7002KW_SOT323-3
S
3
PQ304
SIS412DN-T1-GE3_POWERPAK8-5
1 2 1 2 1
2
1
PR302 PR301 5 3 1
1M_0402_5% 3M_0402_5%
100ppm
0.01U_0402_50V7K
VIN PQ302 P1 PQ303 P2 B+ CHG_B+
add EMI request cap 3/12
4
AON6414AL_DFN8-5 SIS412DN-T1-GE3_POWERPAK8-5 PR303
1
1 1
1_0402_1%
0.02_1206_1% EMI@ PL301
PC308
PR305
1
2 2 1.2UH_PNS40201R2YAF_3A_30%
5 3 3 5 1 4 1 2
2200P_0402_50V7K
4x4x2
2
0.1U_0402_25V6
2 3
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
@
2
0.1U_0402_25V6
2
4
4
1
1
1_0402_1%
BQ24725_BATDRV 1 2
PC303
PC304
PC305
PC307
PR304 EMI@ PC745 PC747 EMI@
1
1
VIN
PC301
470P_0402_50V7K 470P_0402_50V7K
PC302
1
PC306 PR306
2
0.1U_0402_25V6 @EMI@ @EMI@ 4.12K_0603_1%
2
2
@ 1 2
2
2
PC746 EMI@
0.1U_0603_25V7K
0.1U_0402_25V6
PD302 470P_0402_50V7K
BAS40CW_SOT323-3 EMI request not mount 3/12
1
PC311
PC309
EMI request 3/13
1
4.12K_0603_1%
4.12K_0603_1%
PC310
0.047U_0402_25V7K
1
1 2
PR307
PR308
5
10_1206_1%
2.2_0603_5%
1
PR310
PR309
2
PR311 PQ305
2.2_0603_5% SIS412DN-T1-GE3_POWERPAK8-5
BQ24735_ACN
2 2
BQ24725_BST 2
BQ24735_ACP
1
DH_CHG 1 2 DH_CHG-1 4
BQ24725_LX
1 2 PD303
EMI request 3/13
DH_CHG
RB751V-40_SOD323-2
PC312 PL302 PR312
3
2
1
1U_0603_25V6K 1 2 10UH_FDSD0630-H-100M-P3_3.8A_20% 0.01_1206_1%
BQ24725_LX 1 2 CHG 1 4
BATT+
PC313
4.7_1206_5%
1U_0603_25V6K 2 3
20
19
18
17
16
PR313
PU301
1 CSOP1
1 CSON1
VCC
PHASE
HIDRV
BTST
REGN
10U_0805_25V6K
10U_0805_25V6K
21
0.1U_0402_25V6
0.1U_0402_25V6
PAD @EMI@
PC314
PC317
PC315
PC318
1
1
PQ306
1 15 DL_CHG 4
2
ACN LODRV
680P_0402_50V7K
2
1
2 14
PC316
ACP GND PR314
3
2
1
BQ24725ARGRR_QFN20_3P5X3P5 10_0603_5%
0.1U_0603_25V7K
2
BQ24735_CMSRC 3 13 SRP 1 2 CSOP1 @EMI@
CMSRC SRP
PC321
BQ24735_ACDRV 4 12 SRN 1 2 CSON1
2
ACDRV SRN PR315
6.8_0603_5%
1 2 ACOK 5 11 BQ24725_BATDRV
+3VLP ACOK BATDRV
PR316 ACDET
100K_0402_1%
IOUT
SDA
SCL
ILIM
3 15,37 ACIN 3
6
10
PR317
For 4S per cell 4.35V battery 316K_0402_1%
2 1
+3VALW
100K_0402_1%
ACDET
1
VIN
0.01U_0402_25V7K
PC322
PR320
1
1
Vin Detector
2
PR319
2
1
2M_0402_1%
PR322
422K_0402_1%
Min. Typ Max.
2
L-->H 17.520V 18.006V 18.504V

2
H-->L 16.967V 17.593V 18.237V

1
PR321 ACDET
2M_0402_1%
2200P_0402_50V7K
ILIM and external DPM

1
EC_SMB_CK1 37,43
1 2
1
PC326
PR324
64.9K_0402_1%
PQ307
EC_SMB_DA1 37,43 Min. Typ Max.
2
PR326 PDTC115EU_SOT323-3 @ PR325 Close EC 3.906A 4.006A 4.108A

2
100K_0402_1% 0_0402_5%
1 2 2 2 1 1 2
37 FSTCHG ADP_I 37,43
1
PC324 @ PC325
4 4
100P_0402_50V8J 0.1U_0402_16V7K
3
2
1
PQ308 D
2
37,41,46,48 SUSP# G
S 2N7002KW_SOT323-3
3
CHARGER
Custom 1.0
A B C D
A B C D E
PR401
499K_0402_1%
1 2
B+
1
150K_0402_1%
PR405
1 1
2
EN1 and EN2 dont't floating
B+
PU401
new version SY8208C add rise time
EMI@
PL401 7 1 3V5V_EN PC426 PR413

HCB2012KF-121T50_0805 EN2 EN1 0.01UF_0402_25V7K 1K_0402_5%
2200P_0402_50V7K
1 2
10U_0805_25V6K
10U_0805_25V6K
8 3 1 2 1 2
0.1U_0402_25V6
3V_VIN
IN FB PR404 PC401
6 1
BST_3V 2 1 2
BS
1
1
@EMI@ PC403
EMI@ PC410
PC408
@ PC405
0_0603_5%
0.1U_0603_25V7K
PL402
2
10 LX_3V 1 2
LX +3VALWP
@EMI@ PR409
9 4 1UH_FDSD0630-H-1R0M-P3_11A_20%
GND OUT
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1
1
680P_0603_50V7K 4.7_1206_5%
SPOK 2 5
43 SPOK PG LDO +3VLP
PC411
PC416
PC414
PC413
1
2
1
SY8208BQNC_QFN10_3X3 PC422
13V_SN
PR450 4.7U_0603_6.3V6K
2
100K_0402_1%
2 2
2
@EMI@ PC423
3.3V LDO 150mA~300mA
2
+3VALWP
Vout is 3.234V~3.366V
TDC=8A
@
PJ401
P J401
+3VALWP 1 2 +3VALW
1 2
JUMP_43X118
B+ new version SY8208C add rise time

EMI@
PL404
HCB2012KF-121T50_0805 PU402 PC425 PR412
1 2 5V_VIN 8 1 3V5V_EN 6800P_0402_25V7K1K_0402_5%
IN EN
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
3 3
3 PR403 PC404 1 2 1 2
FB 0_0603_5% 0.1U_0603_25V7K
1
1
PC406
@ PC407
EMI@ PC409
@EMI@ PC402
6 BST_5V 1 2 1 2
BS
2
PL403
9 10 LX_5V 1 2 +5VALWP
GND LX
VCC_3.3V 5 4 1UH_FDSD0630-H-1R0M-P3_11A_20%
VCC OUT
1
680P_0603_50V7K 4.7_1206_5%
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1
1
@EMI@ PC424 @EMI@ PR408
SPOK 2 7
PG LDO VL
PC417
PC418
PC415
PC412
1
PC420
4.7U_0603_6.3V6K
2
15V_SN
SY8208CQNC_QFN10_3X3
2
1
PC421
4.7U_0603_6.3V6K
2
@
PJ402
P J402
+5VALWP 1 2 +5VALW
2
1 2
JUMP_43X118
PR407
2.2K_0402_5%
Vout is 4.998V~5.202V
1 2
37 EC_ON
5V LDO 150mA~300mA TDC=8A
@
PR402
P R402
1 2
37,43 MAINPWON
0_0402_5%
4 4
3V5V_EN
1M_0402_1%
4.7U_0603_6.3V6K
1
1
PR406
PC419
change to common part 0603 size(0311)

2

2
3VALW/5VALW
EN1 and EN2 dont't floating AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
<BOM Structure> Date: Friday, June 07, 2013 Sheet 45 of 55
A B C D E
A B C D E
+1.35VP EMI@ PL507

HCB2012KF-121T50_0805
Ipeak = max{ 0.7*Ibudget, 1st +2nd max loading} 1.35V_B+ 2 1 B+
Ipeak = max{ 12.34*0.7 , 4.2+8.14 }
2200P_0402_50V7K
Ipeak=12.34A ; 1.2Ipeak=14.808A ;Imax=8.638A
10U_0805_25V6K
0.1U_0402_25V6
1/2Delta I=0.7353A (F=300K Hz)
1
PC502
PC503
PC521
PR504=(1.2Ipeak-1/2Delta I) *Rds(on)(max)*1.2/9uA=8.45Kohm
choose PR504=8.45Kohm (for safety >1.2Ipeak)
2
Rds(on)=5.0m ohm(max) ; Rds(on)=4.2m ohm(typical) EMI@ @EMI@
MDV1525URH_PDFN33-8-5
1 Ilimit_min=(8.366K*9uA)/(5.0m*1.2)=15.058A
+1.5VP 1
Ilimit_max=(8.535K*11uA)/(4.2m*1.2)=22.352A
PQ502
Iocp=Ilimit+1/2Delta I=15.79A~23.09A UG_1.35V 4
JUMP_43X39
Iocp(min)>1.2Ipeak
PJ503
1
2012/9/6
3
2
1
2
@
2
PR502 PC504 PL501
OVP=110% 115% 120% 2.2_0603_5%
BST_1.35V 2 1
0.1U_0603_25V7K
BST_1.35V-1 2 1
S COIL 1.5UH 20% TMPB0604M-1R5MN-Z01 11A
1 2
+0.75VSP 6.6x7.3x3.8 TAI-TECH +1.5VP
靠近Output Cap PAD LX_1.35V
10U_0805_25V6K
10U_0805_25V6K
1
S TR MDU1512RH 1N POWERDFN56-8
DCR:8.5mΩ
5
20
19
18
17
16
1
1
PU501 @EMI@ PR503
PC501
PC505
4.7_1206_5% 1
VTT
BOOT
UGATE
PHASE
VLDOIN
21
2
2
PAD
PQ503
+ PC506
1 15 LG_1.35V 4 330U_2.5V_M
VTTGND LGATE
1
@EMI@ PC507
680P_0402_50V7K 2
2 14
2
VTTSNS PGND PR504
3
2
1
8.45K_0402_1%
3 13 2 1
GND RT8207MZQW_WQFN20_3X3 CS
4 12 Rds=4.2mΩ(Typ)
2
+VTT_REFP VTTREF VDDP
5.0mΩ(Max) 2
5 11 2 1
+1.5VP VDDQ VDD +5VALW
PGOOD
PR505
+3VALW
1
5.1_0603_5% @ PJ504
1U_0603_10V6K
TON
PC508 +1.5VP 1 2 +1.5V
FB
S3
S5
0.033U_0402_16V7K 1 2
HW sequence 0222
10K_0402_1%
2
1
JUMP_43X118
PC509
6
10
PC510
PR506
S3_1.35V
S5_1.35V
1U_0603_10V6K @ PJ505
2
PR511 1 2
470K_0402_1% @ 1 2
2
1 2
37,41,44,48 SUSP# PGOOD_1.35V JUMP_43X118
@ PR507 PR508
0_0402_5% 887K_0402_1%
1 2 2 1 1.35V_B+ @ PJ506
37,41 SYSON 1 2
PR509 +0.75VSP 1 2 +0.75VS
10K_0402_1% HW request 0308 JUMP_43X79
1
1 2
PQ501
2N7002KW_SOT323-3 PR513 FB=0.75V
1
D
1
100K_0402_1%
2 To GND = 1.5V
41 SUSP SUSP PC511
2
G 0.1U_0402_16V7K PR510 To VDD = 1.8V

2
10K_0402_1%
S
3
3 3
STATE S3 S5 1.35VP VTT_REFP 0.675VSP
4
S0 Hi Hi On On On 4
Off
S3 Lo Hi On On (Hi-Z)
S4/S5 Lo Lo Off Off Off

(Discharge) (Discharge) (Discharge) Security Classification Compal Secret Data Compal Electronics, Inc.
1.5VP/0.75VSP
Note: S3 - sleep ; S5 - power off AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
A B C D E
A B C D E
VFB= 0.704V
Vo=VFB*(1+11.5K/10K)= 1.5V VGA@EMI@ PL504
Freq=290KHz(typ) HCB2012KF-121T50_0805
1.5VSG_B+ 2 1
1
B+ 1
Cesr= 15m ohm
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
Ipeak= 4.7A Imax= 3.29A Iocp=5.64A
PC516
PC517
PC518
PC519
1
1
Iocp= 5.72A~6.43A
PQ504
VGA@EMI@ VGA@ @ @EMI@
2
4
VGA@
VGA@ PR517 VGA@ PC514
3
2
1
HW sequence (0311) VGA@ PU502 2.2_0603_1% 0.1U_0603_25V7K
1 10 BST_1.5VSG 1 2 1 2
PR1003 PGOOD VBST
VGA@ 2 1 TRIP_1.5VSG 2 9 DH_1.5VSG VGA@ PL502
30K_0402_1% VGA@ PR512 TRIP DRVH 4.7UH_PCMB063T-4R7MS_5.5A_20% +1.5VSDGPUP
22 1.5VS_DGPU_PWR_EN
1 2 56.2K_0402_1% EN_+1.5VSG 3 8 SW_1.5VSG 1 2
EN SW
5
FB_1.5VSG 4 7 +5VALW
VFB V5IN
1
SI7716ADN-T1-GE3_POWERPAK8-5
PC1009
1
0.1U_0402_16V7K RF_1.5VSG 5 6 DL_1.5VSG 1
TST DRVL
PQ505
VGA@
2
1
11 @EMI@ PR518 + VGA@ PC523
TP VGA@ PC515 4 4.7_1206_5% 330U_2.5V_M
VGA@ PR514 TPS51212DSCR_SON10_3X3 1U_0603_10V6K VGA@
2
470K_0402_1% 2
2
1
2 Rds=13.5mΩ(Typ) @EMI@ PC522 2
3
2
1
680P_0402_50V7K
16.5mΩ(Max)
2
Resistance(KΩ) Frequency(KHz)
VGA@ PR515
470 290 11.5K_0402_1%
FB=0.704V
2 1
200 340
100 380
1
39 430
VGA@ PR516
10K_0402_1%
VID [0] VID[1] VCCSA Vout
2
0 0 0.9V
@ PJ509 0 1 0.85V
1 2
1 2
JUMP_43X118
1 0 0.775V
+1.5VSDGPUP
@ PJ510
+1.5VSDGPU 1 1 0.75V
1 2
1 2
3 JUMP_43X118 3
+3VS output voltage adjustable network

22U_0805_6.3V6M
22U_0805_6.3V6M
1
1
PC743
PC739
1
100K_0402_1%
PU702
2
9
@ PJ701 GND
PR745
1 2 +1.05VS_VTT_VIN 5 4 +VCCSAP
+1.05VS_VTT 1 2 VIN Vo
2
JUMP_43X118 6 3
0.9V
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
+5VALW VPP Vo @ PR743
0_0402_5%
22U_0805_6.3V6M
7 2 1 2 H_VCCSA_VID1 H_VCCSA_VID1 9
37 SA_PGOOD POK D1
1
PC744
PC738
PC737
PC740
48 VCCPPWRGOOD 1 2 8 1 1 2 H_VCCSA_VID0 H_VCCSA_VID0 9
VEN/MODE D0
2
0_0402_5% G978F11U_SO8 0_0402_5%
1
1
1U_0603_6.3V6M
1U_0402_6.3V6K
@ PR746 @ PR744
2
2
PC741
PC742
+VCCSAP @ PJ702 +VCCSA

@ 1 2
1 2
JUMP_43X118
Imax= 4.2A, Ipeak= 6A
4 FB=0.6V 4

+VCCSAP/+1.5VSDGPUP
Custom 1.0
A B C D E
A B C D E
+1.05VSP Ipeak=5.36A ; Imax=3.752A ; 1.2Ipeak=6.432

Delta I=0.xxxxA=>1/2Delta I=0.xxxxA,F= 800K Hz(typ)
EMI@ PL601
HCB2012KF-121T50_0805
+1.05VS_VTTP_B+ 1 2
B+
2200P_0402_50V7K
10U_0805_25V6K
0.1U_0402_25V6
1 1
1
PC602
PC603
PC604
+3VS
2
@
5
@EMI@
1
PR602
@ PR611 100K_0402_1% PQ601
47 VCCPPWRGOOD 4
0_0402_5% MDV1525URH_PDFN33-8-5
2
1 2
PR604 PC605
PU601 2.2_0603_5% 0.1U_0603_25V7K
PR603 1 10 1
BST_+1.05VS_VTTP 2 1 2
3
2
1
105K_0402_1% PGOOD VBST
SH00000KS00 7*7*3
PR601 1 2 2
TRIP_+1.05VS_VTTP 9 UG_+1.05VS_VTTP PL602
200K_0402_1% TRIP DRVH 1UH_VMPI0703AR-1R0M-Z01_11A_20%
37,41,44,46 SUSP# 1 2 EN_+1.05VS_VTTP3 8 SW_+1.05VS_VTTP 1 2
EN SW +1.05VS_VTTP
4
FB_+1.05VS_VTTP 7
VFB V5IN +5VALW
1
0.1U_0402_16V7K
5
RF_+1.05VS_VTTP 6 LG_+1.05VS_VTTP <BOM Structure>
TST DRVL
1
PR605 @EMI@
PC601
HW sequence 0222
330U_2.5V_M
1
MDU1512RH_POWERDFN56-8-5
1
11 4.7_1206_5%
TP
1
+
PC608
2
2
PR606 TPS51212DSCR_SON10_3X3 PC606 4 ESR=17m ohm
0.1U_0402_16V7K
470K_0402_1% 1U_0603_6.3V6M
1
PC609 @EMI@ 2
PC610
2
680P_0402_50V7K
2 2
3
2
1
2
PQ602
@ PC611 @ PR607
1000P_0402_50V7K 1.2K_0402_1%
1 2 1 2 +1.05VS_VTTP
PR608 PR609
4.99K_0402_1% 100_0402_5%
1 2 1 2
VCCIO_SENSE 8
1 The RC value (PC611 and PR607) need fine-tune if need

PR610
10K_0402_1%
2
@ PJ601
1 2
+1.05VS_VTTP 1 2 +1.05VS_VTT
JUMP_43X118
@ PJ602
1 2
1 2
JUMP_43X118
3
+3VS 3
1
@ PC5002
1U_0402_6.3V6K
2
Note:Iload(max)=3A
PU5000
APL5930KAI-TRG_SO8
6
5 VCNTL 3
0.022U_0402_16V7K
9 VIN VOUT 4 +1.8VSP

VIN VOUT
1
@ PJ603
1
PC5000 8 1 2
7 EN 1 2 +1.8VS
1
4.7U_0603_6.3V6K 2 <BOM Structure>

PR5002 +1.8VSP
PC5003
GND
22U_0805_6.3V6M
22U_0805_6.3V6M
POK FB 20K_0402_1% JUMP_43X118

2
FB=0.8V
2
1
PC5004
PC5005
1
PR5000 <BOM Structure> FB_1.8VS

200K_0402_1%
2
SUSP# 1 2 +1.8VS_ON @ <BOM Structure>

1
<BOM Structure>
1
PR5003
1
<BOM Structure> @ PR5001 15.8K_0402_1% <BOM Structure>

PC5001 22K_0402_5%
2
4
0.1U_0402_16V7K 4
2
<BOM Structure>
<BOM Structure>

Ien=10uA, Vth=0.3V, notice
the res. and pull high THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+1.05VS_VTTP/+1.8VSP
voltage from HW Custom 1.0
A B C D E
A B C D E
Layout Note
SVID routing Layout Note
1. Alert# signal must be routed between Reduce Acoustic Noise
1
@ PC701
the Clock and Date lines to reduce the cross 1000P_0402_50V7K 1. The AL bulk capacitor of B+ should be very
talk between them. Signal order arrangement:
close to CPU_CORE MOSFET.
2
mobile order is Clock-Alert-Date. 9 VCC_AXG_SENSE
2. SVID spacing requirement is 18mils(0.475mm). 2. Input ceramic caps must place on symmetry
1
same location on top side and bottom side.
3. Maximum total microstrip routing length of
each SVID signal must not exceed 6000mils(152.4mm).
PC702 OCP setting=39.9~44.99A
0.01UF_0402_25V7K
2
4. The SVID bus must be ground reference, It cannot be 9 VSS_AXG_SENSE VDD source use +5VS and PGOOD source use +3VS
referenced to input (Vbat or 12V) power plans as they can
Please confirm power on and down sequence, +CPU_B+
couple noise into the SVID bus as power states change.
5. Avoid routing under noisy circuit, e.g. switch node , make sure VGATE after CPU_CORE on.
1 PC703 PC704 1
Gate driver, B+, Vin, high speed signal. 68P_0402_50V8J
470P_0402_50V7K
6. When SVID signal changes Layer, GND return path PC705 1 2 1 2 1 2
may be changed also. We need add GND via for GND 6800P_0402_25V7K PR701
10U_0805_25V6K
10U_0805_25V6K
reference. PC706 499_0402_1% MDV1525 Vds=30V
2200P_0402_50V7K
1 2 150P_0402_50V8J
1
1 2 1 2 1 2 Rds(on)=11.5~14m ohm@Vgs=4.5V
PC707
PC708
PC709
649 +-1% 0402
PR702 PR703
PR704
1
137K_0402_1% 2.55K_0402_1%
Close GFX choke
2
PR705 @ PR706
PH701 2K_0402_1% 0_0603_5% @EMI@
33.2K_0402_1%
2
1
10K_0402_1%_ERTJ0EG103FA PR707 UGATEG1 1 2 UGATEG1-1 4
PR708
VSUMG- 1 2
1 2
1
0.22uH DCR= 0.97+-5% m ohm, Idc~Isat= 25~34A
576 +-1% 0402 PQ701
PC710 MDV1525URH_PDFN33-8-5
+3VS
3
2
1
0.1U_0402_16V7K GFX_OCP 0314 330P_0402_50V7K +VGFX_CORE
2
1
PC711
11K_0402_1%
0.047U_0402_25V7K
1 2
0.1U_0603_25V7K
VSUMG_NTC PHASEG 1 4
PL701
2.61K_0402_1%
1.91K_0402_1%
1
1
0.36UH_FDUM0640J-H-R36M-P3_22A_20%
PC713
1 VSUMG+_1
PR709
PC712
1 VSUMG-_1
2
5
PC714 2 3
PR710 BOOTG 0.1U_0603_25V7K
1
BOOTG 1 2 1 2
2
2 UGATEG1 PR712 transient request 0218
2
2.2_0603_5% @EMI@ PR713
VSUMG+ PHASEG LGATEG 4 4.7_1206_5%
3.65K_0402_1% 1_0402_5%
PR711
1 2
PR714 PR715
Close GFX L/S MOS LGATEG +5VS
2
PR716 PU701 PQ702 @EMI@ PC715
33
32
31
30
29
28
27
26
25
3
2
1
61.9K_0402_1% MDU1511RH_POWERDFN56-8-5 680P_0402_50V7K
2
1 2
VSUMG+
VSUMG-
PAD
ISUMPG
ISUMNG
RTNG
FBG
COMPG
PGOODG
BOOTG
UGATEG
2 2
1U_0603_10V6K
PH702 PR717
1
470K +-5% ERTJ0EV474J 0402 3.83K_0402_1%
PR718
0_0603_5%
MDU1511 Vds=30V
1
1 2 NTCG_1 1 2 NTCG 1 24 PR719
PC716
@ PR720 NTCG PHASEG 1_0603_5% Rds(on)=2.7~3.3m ohm@Vgs=4.5V
37 VR_ON 1 2 2 23 @
2
VR_ON LGATEG EMI@ PL702
2
8 VR_SVID_CLK 0_0402_5% VR_SVID_CLK 3 22 HCB2012KF-121T50_0805
SCLK VCCP 1 2
VR_SVID_ALRT# 4 ISL95833HRTZ-T_TQFN32_4X4 21 +CPU_B+
8 VR_SVID_ALRT# ALERT# VDD @ PR721 1.91K_0402_1% EMI@ PL703
1U_0603_10V6K
VR_SVID_DAT 5 20 1 2 HCB2012KF-121T50_0805
PC717
8 VR_SVID_DAT SDA PWM2
1
1 2 B+
6 19 LGATE1
37,5 H_PROCHOT# VR_HOT# LGATE1
0.1U_0402_25V6
10U_0805_25V6K
10U_0805_25V6K
1 1
2
NTC 7 18 PHASE1
NTC PHASE1 + +
33U_25V_M
33U_25V_M
_HOT#, already
3.83K_0402_1%
1
1
PGOOD
1 2 8 17
PC720
PC721
PC718
PC719
Height 8 mm
BOOT1
PC722
ISUMN
ISUMP
igh at power side.
COMP
ISEN2 UGATE1
ISEN1
PR729
RTN
1
@ PC723 PR722 2 2
FB
54.9_0402_1%
499_0402_1%
130_0402_1%
2
1
47P_0402_50V8J 0_0402_5%
UGATE1 @
PR725
PR726
PR723
+5VS
2
10
11
12
13
14
15
16
5
NTC_1
BOOT1
@
470K +-5% ERTJ0EV474J 0402
61.9K_0402_1%
2
VGATE 15,37 @ PR728 0.22uH DCR= 0.97+-5% m ohm, Idc~Isat= 25~34A

1
0_0603_5%
UGATE1 1 2UGATE1-1 4
PH703
PR724
1 2 +3VS
+1.05VS_VTT OCP setting=39.9~44.99A
1
1.91K_0402_1% PR727 PQ703 PL704

3 3
2
@ PC724 MDV1525URH_PDFN33-8-5 0.22UH_FDUE0640J-H-R22M-P3_25A_20% +CPU_CORE
3
2
1
PR716 and PR724 0.1U_0402_16V7K
2
PHASE1 1 4
27.4K ohm for 100 degree
5
2.2_0603_5%
Close CPU L/S MOS
1
61.9K ohm for 110 degree PR730 PC725 2 3
680P_0402_50V7K 4.7_1206_5%
BOOT1 1 2 1 2
PR731
1 VSUM+_1
1 VSUM-_1
0.1U_0603_25V7K
PC726 PR732 PR733 LGATE1 4 4 @EMI@
2
470P_0402_50V7K 2K_0402_1% 42.2K_0402_1% VSUM+
1 2 1 2 1 2
2.61K_0402_1%
1
PQ705
1_0402_5%
1
3.65K_0402_1%
PR734
3
2
1
3
2
1
PQ704 PR735 PR736
PC727
11K_0402_1%
PC728 PC729 MDU1511RH_POWERDFN56-8-5 CM@
649 +-1% 0402
0.047U_0402_25V7K
2
1
470P_0402_50V7K 68P_0402_50V8J
PR738
2
1
0.1U_0603_25V7K
1 2 1 2 1 2 @EMI@
PC730
1
PR737 VSUM_NTC
422_0402_1%
PC731
499_0402_1%
PR739
1
2
PH704 VSUM+
PR740
Close CPU choke

2
PR741 PC732
6800P_0402_25V7K
2
1
1.91K_0402_1% 150P_0402_50V8J 10K_0402_1%_ERTJ0EG103FA

PC733
1 2 1 2 1 2
2
PR742 VSUM-
2
137K_0402_1%
VSUM-
@ PC734
0.1U_0402_16V7K
330P_0402_50V7K
1
1 2
PC735
4 4
2
8 VCCSENSE
1 2
PL701 PL702 Footprint用SH00000HQ00代替,因為SH00000NM00_R22為2PIN 2012/07/05
PC736
0.01UF_0402_25V7K
8 VSSSENSE Security Classification <BOM Structure> Compal Secret Data Compal Electronics, Inc.
CPU_CORE/VGFX_CORE
Custom 1.0
A B C D E
A B C D E
VGA@EMI@ PL801
HCB2012KF-121T50_0805
2 1
+VGA_B+
VGA@EMI@ PL803
HCB2012KF-121T50_0805
2 1
B+
2200P_0402_50V7K
1 1
MDU1516URH_POWERDFN56-8-5
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
5
1
PC801
PC802
PC803
PC804
PQ801
VGA@ PR801
2
0_0603_5% VGA@ VGA@ @EMI@ VGA@EMI@
UGATE1_VGA 2 1 UGATE1_2_VGA 4
VGA@
22
DGPU_VID
PC806
0.1U_0402_16V7K
VGA@
3
2
1
22
PSI
2 1
+3VS
VGA@ PR802 VGA@ PC805 VGA@ PL802
0_0603_5% 0.22U_0603_10V7K 0.22UH_FDUE0640J-H-R2_25A_20%
BOOT1_VGA 2 1 BOOT1_2_VGA 2 1 1 2
PR803 VGA@ DCR: 0.97mΩ±5% +VGA_CORE
39K_0402_1%
7x7x4
1
2 1 EN_VGA
22,37,41 VGA_ON
5
10K_0402_1%
PR806
follow EZEL setting 0218 GE@ PR808 GE@ PR809 PHASE1_VGA @EMI@ PR804
2
0_0402_5%
PR805
30K_0402_1% 39K_0402_1% 4.7_1206_5%
PQ802
1 SNUB1_VGA 2
VGA@
GE@ PR810 @ LGATE1_VGA 4
3K_0402_1% VGA@
1
2
1
GV2@ PR808 GV2@ PR809
3
2
1
20K_0402_1% 20K_0402_1% GPU_VID @ PR807 @EMI@ PC807
EN_VGA
2 1 2 1 VIDBUF
Rds=2.7mΩ(Typ)
VREF 100K_0402_1% 680P_0402_50V7K
GE@ PC809 GE@ PR812 3.3mΩ(Max)
2
1
1800P_0402_50V7K 27K_0402_1%
GV2@ PR810
2 2
1
GV2@ PR812 2K_0402_1%
18K_0402_1%
VID
PSI
HG1
EN
VIDBUF
BST1
2
2 1
2
2 1 REFIN 7 24
GV2@ PC809 REFIN PH1 VGA@ PC810
VGA@ PR826 2700P_0402_50V7K 2 1 VREF 8 23 4.7U_0603_6.3V6K
VREF LG1
2
10_0402_1% VGA@ PC808
2 1 0.01U_0603_50V7K FS 9 22 @ PR814
1
VGA@ PR813 FS PGND 0_0402_5%
1
24 VSSSENSE_VGA 33.2K_0402_1% 10 21 PVCC_VGA 2 1 +5VS
FBRTN PVCC
VGA@ PC812 VGA@ PR815 FB_VGA 11 20
1
VGA@ PC811 47P_0402_50V8J 51_0402_1% FB LG2 +VGA_B+

1000P_0402_50V7K 1 2 FB1_VGA1 2 1 2
COMP_VGA 12 19
TALERT#
COMP PH2
PGOOD
VGA@ PC813
2
TSNS
10P_0402_50V8J
BST2
GND
VCC
HG2
1 2 1 2 FB2_VGA 1 2
24 VCCSENSE_VGA
MDU1516URH_POWERDFN56-8-5
10U_0805_25V6K
10U_0805_25V6K
5
PC815
PC816
VGA@ PR816 VGA@ PC814 VGA@ PR817 VGA@ PU801
25
13
14
15
16
17
18
2
1
10K_0402_1% 100P_0402_50V8J 82K_0402_1% NCP81172MNTXG_QFN24_4X4
PQ803
VGA@ PR827 BOOT2_VGA VGA@ PR818 VGA@ VGA@
VCC_VGA
2
10_0402_1% 0_0603_5%
UGATE2_VGA 2 1 UGATE2_2_VGA 4
1
100K_0402_1%_TSM0B104F4251RZ
VGA@
VGA_PWROK 18,37
VGA@ PR819 VGA@ PR820 VGA@ PC818 VGA@ PL804
1
10K_0402_1% 0_0603_5% 0.22U_0603_10V7K 0.22UH_FDUE0640J-H-R2_25A_20%
3
2
1
1
2 1 +3VSDGPU 2 1 BOOT2_2_VGA 1 2 1 2
+VGA_CORE +VGA_CORE
3.92K_0402_1%
PH801
VGA@ PC817 VGA@ PR822 DCR: 0.97mΩ±5%

1
PR821
0.1U_0402_16V7K 2.2_0402_5%
7x7x4
2
1
2 1 +5VS
2
3 VGA@ VGA@ @EMI@ PR823 3

N14P-GV2 OpenVR config is B VGA@ PC819 PHASE2_VGA 4.7_1206_5%
2
5
Vmin=0.6V 1U_0402_6.3V6K
2
1SNUB2_VGA 2
Vmax=1.2V
PQ804
VREF
Vboot=0.9V
VGA@ PR824 LGATE2_VGA 4
Vstep=6.25mV 10K_0402_1% VGA@
Thermistor near MOSFET 2 1
Number of Voltage Levels N=96 trigger point 110 degree C.
+3VS
@EMI@ PC820
PWM Frequency FPWM=1.125MHz 680P_0402_50V7K
3
2
1
2
PWM Minimum Pulse Width TDmin=9.26ns Rds=2.7mΩ(Typ)
VID Transient Time T < 100uS 3.3mΩ(Max)
N14P-GE OpenVR config is C

Vmin=0.65V
Vmax=1.15V
Vboot=0.9V
Vstep=25mV
Number of Voltage Levels N=20
PWM Frequency FPWM=0.676MHz
PWM Minimum Pulse Width TDmin=74ns
VID Transient Time T < 100uS
4 N14P-GV2 TDP 25W 4
Ipeak=55A
Imax=25A
Iocp=72A
Fsw=450KHz
bulk cap 560uF*2 Security Classification Compal Secret Data Compal Electronics, Inc.
+VGA_CORE
Custom 1.0
A B C D E
A B C D E
PWR Rule 17W@ULV(CR BGA1023_GT2) CPU2.9m GFx3.9m

CPU 330uF/9m *3, 22uF(0805) *12, 2.2uF(0402)*16 +CPU_CORE
+VGFX_CORE GFX 330uF/9m*2, 22uF(0805)*6, 10uF(0603)*6, 1uF(0402)*11

1.05V 330uF*2,10uF(0603)*10,1uF(0402)*26
1
2.2U_0402_6.3V6M
PC902
2.2U_0402_6.3V6M
PC903
2.2U_0402_6.3V6M
PC904
2.2U_0402_6.3V6M
PC905
2.2U_0402_6.3V6M
PC906
2.2U_0402_6.3V6M
PC907
2.2U_0402_6.3V6M
PC908
2.2U_0402_6.3V6M
PC909
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
@ @ @ @ @
1U_0402_6.3V6K
2
1
1
@
PC901
PC910
PC911
PC912
PC913
PC914
PC915
PC916
PC917
PC918
PC919
1 1
For BOT side
1
2.2U_0402_6.3V6M
PC920
2.2U_0402_6.3V6M
PC921
2.2U_0402_6.3V6M
PC922
2.2U_0402_6.3V6M
PC923
2.2U_0402_6.3V6M
PC924
2.2U_0402_6.3V6M
PC925
2.2U_0402_6.3V6M
PC926
2.2U_0402_6.3V6M
PC927
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
@ @ @ @ @
@ @
1
1
PC928
PC929
PC930
PC931
PC932
PC933
2
2
+CPU_CORE
1 1 1 1 1 1 1
22U_0805_6.3V6M
PC934
22U_0805_6.3V6M
PC935
22U_0805_6.3V6M
PC936
22U_0805_6.3V6M
PC937
22U_0805_6.3V6M
PC938
22U_0805_6.3V6M
PC939
22U_0805_6.3V6M
PC940
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
2 2 2 2 2 2 2
330U_D2_2V_Y
330U_D2_2V_Y
1 1 1 1 1 1 1 1
PC941
PC942
PC943
PC944
PC945
PC946
PC947
PC948
@ @ @ @
+ +
ESR=9m ohm 2 2 2 2 2@ 2
For TOP side
2 2 @
2 1 1 1 1 1 1 1 @ 2
22U_0805_6.3V6M
PC949
22U_0805_6.3V6M
PC950
22U_0805_6.3V6M
PC951
22U_0805_6.3V6M
PC952
22U_0805_6.3V6M
PC953
22U_0805_6.3V6M
PC954
22U_0805_6.3V6M
PC955
2 2 2 2 2 2 2
Vaxg @
‧ Can connect to GND if motherboard only

supports external graphics and if GFX VR is not
stuffed in a common motherboard design,
‧ VAXG can be left floating in a common
motherboard design (Gfx VR keeps VAXG from +CPU_CORE
floating) if the VR is stuffed
+1.05VS_VTT
+-20% SGA00006100 ESR=9m ohm

1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1
1
1
+ PC969 + PC970 + PC971
330U_D2_2V_Y 330U_D2_2V_Y 330U_D2_2V_Y
PC956
PC957
PC958
PC959
PC960
PC961
PC962
PC963
PC964
PC965
PC966
PC967
PC968
ESR=9m ohm
2
2
2 2 2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
3 3
1
1
PC972
PC973
PC974
PC975
PC976
PC977
PC978
PC979
PC980
PC981
PC982
PC983
PC984
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
@ @ @
1
1
PC985
PC986
PC987
PC988
PC989
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
@ @
330U_D2_2V_Y
1
1
PC995
PC990
PC991
PC992
PC993
PC994
+
ESR=9m ohm
2
4 4

CPU_CORE_CAP
Custom 1.0
A B C D E
A B C D E
+VGA_CORE nVidia GB4-128 package

Under GPU
VGA@ PC1001
VGA@ PC1002
VGA@ PC1003
VGA@ PC1004
VGA@ PC1005
VGA@ PC1006
VGA@ PC1007
VGA@ PC1008
1
4.7uF 0603 * 10 1
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
1
2 0.1uF 0402 * 4
2
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
VGA@ PC1011
VGA@ PC1012
VGA@ PC1013
VGA@ PC1014
1
1
2
2 2
+VGA_CORE
nVidia GB4-128 package
Near GPU
47uF 0805 *1
47U_0805_6.3V6M
22U_0805_6.3V6M
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
22uF 0805 *1
VGA@ PC1015
VGA@ PC1016
VGA@ PC1017
VGA@ PC1018
VGA@ PC1019
VGA@ PC1020
VGA@ PC1021
1
4.7uF 0805 *5 (0603)

2
330uF POS *1 <6mΩ
3 3
1 1 1
560U_2.5V_M
560U_2.5V_M
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
330U_D2_2.5VY_R9M
@ PC1022
@ PC1023
@ PC1024
VGA@ PC1025
VGA@ PC1026
PC1027
1
+ + +
2
2 2 2@
4 4

VGA_CORE CAP
Custom 1.0
A B C D E
A B C D E
1 1
RP8
2.2K R115
4.7K
RP8 2.2K
+3VALW_PCH
R116
+3VS
4.7K
Q5
H14 PCH_SMBCLK D_CK_SCLK 200
2N7002 D_CK_SDATA 202 DIMM1, 2
C9 PCH_SMBDATA
2N7002
PCH
VGA
R432 0 @ MINI1_SMBCLK 30
R434 0 @ MIN1I_SMBDATA 32 WLAN
N14M-GE
2
N14P-GV2 2
RP8 2.2K RP1001 2.2K
RP8
2.2K
+3VALW_PCH RP1001 2.2K
+3VSDGPU
Q1004
HM77 E14 PCH_SML1CLK
Q1006
EC_SMB_CK2 I2CS_SCL T4
2N7002 DMN66D0LDW
M16 PCH_SML1DATA EC_SMB_DA2 I2CS_SDA T3
2N7002
DMN66D0LDW
RP34 2.2K
RP34
2.2K
+3VS
79 EC_SMB_CK2
SCL2
80 EC_SMB_DA2
SDA2
RP34 2.2K
3 3
+3VALW_EC
KBC RP34
2.2K
PR202
77 EC_SMB_CK1 100 ohm 4
SCL1 PR201 BATTERY
78 EC_SMB_DA1 100 ohm 3
SDA1 CONN
KB9012
9
Charger IC
8
4 4

SMBUS Block diagram
Custom 1.0
A B C D E
5 4 3 2 1
Version change list (P.I.R. List) Page 1 of 1

for PWR
Item Reason for change PG# Modify List Date Phase
1 For 4S battery request 44 mount PR319,PR321,PR326,PQ307,PQ308 0310 C

D D
2 change size to common part 45 PC419 change to 0603 common part 0310 C
3 HW sequence request 47 PR1003 to 30k 0311 C
4 0312 C
EMI request 44 not mount PC307
5 EMI request 44 add PC745 PC746 PC747 0313 C
6 EMI request 44 change PR311 PR310 to 2.2Ohm 0313 C
7 GFX_OCP 49 change PR707 to 576hm 0314 C
C C
10
11
12
13 3/5 EVT
14 3/5 EVT
15
B
16 B
17
18
19
20
A A

PW PIR
A3 1.0
5 4 3 2 1
5 4 3 2 1
-------------------------------------------------------------------------------------- ------------------------------------------------------------------------------------------
03/06 0318
Change R1033 from 4.99K to 10K(ROM_SO VGA_DEVICE) L24,L25 change from SM070001600 (12ohm USB3.0 common mode choke)
Change U51 N14P-GV2 from SA00006B500 to SA00006B510 to SM070001R00 (Murata 67ohm )
Change Y6 P/N to SJ10000E800(合併用料)
--------------------------------------------------------------------------------------
--------------------------------------------------------------------------------------- 0419
03/11 Add Touch screen feature and JTS1
Add net +XDPWR_SDPWR_MSPWR_R -----------------------------------------------------------------------------------------
D
Add share rom feature 0422 D
Add R112 R140 R141 R144 Remove PEG 16X

Add EC_SPI_MISO_1 , PCH_SPI_MISO_1 ------------------------------------------------------------------------------------------------
Add EC_SPI_CS0# , PCH_SPI_CS0# 0425
Add EC_SPI_CLK_1 , PCH_SPI_CLK_1 Add HM70 NM70 文字敘述
Add EC_SPI_MOSI_1 , PCH_SPI_MOSI_1 Add FFR VRAM strap for N14M-GE N14P-GV2
R541 pop 1K VGA@ --------------------------------------------------------------------------------
R1101 470-->47 SD013470A80 0502
D1000.3 VGA_PWROK changes into VGA_ON Update CPU,PCH,VRAM P/N
------------------------------------------------------------------------------
SW3 @ 拿掉不上 0505
Removed U15,R107,R108 Pop RP16 for LAN loopback
Removed R151,R159,R160,R184,R97 -------------------------------------------------------------------------------
Removed R524,R525,R526 換 RP13 5%--->1% 0528
--------------------------------------------------------------------------------------- N14M-GE ROM_SO keep 10K pull low.
03/12 N14P-GV2 need change be to EVT R1033 as 4.99K_0402_1%
Add C441 470pF(SE074471K80),EMC@, EMI solution
Change U51 N14P-GV2 SA00006B510-->SA00006B530 R3 P/N C142-->15pF(SE071150J80) to meet off mode timing
C Change U51 N14M-GE SA000068A00-->SA000068A10 R3 P/N ----------------------------------------------------------------------------- C
0604
--------------------------------------------------------------------------------------- Correct page1 date code
0313a Update page24 3D device/vga device notice
Combine with PWR_Z5WE1_LA9535PR02_PWR_0313.DSN
0313b
Remove RP14,
PCH_GPIO2 不接
PCH_GPIO3 不接
PCH_GPIO53 不接
RP13 5%--->1%(SD300002Y00)
0313C
2nd rom 加回去
Add U15,R107,R108
Add R97 R151 R159 R160 R184
B
Del R112 R140 R141 R144 B
-----------------------------------------------------------------------------
0314
R285 XEMC@-->EMC@
C329 22P-->10P, XEMC@-->EMC@
Add C230 0.1U for card reader enable
Board ID
R316 0ohm 改 8.2K 上件
R314 @-->改上件
C346 @-->改上件
----------------------------------------
0314C
R774 change from 10 to 56ohm
R1027,R1028,R1029,R1030,R1035,R1036,R1039,R1033,R1042
at N14M-GE SKU 10K_0402_5% change to 10K_0402_1%
A A
0314d
L33 changes into SM010014520
-------------------------------------------------------------------------------
0315a
Add net CRT_4, CRT_11 for 測點
R541 bom structure--->VGA@ THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HW PIR
C346 board ID cap改@ 不上 Custom 1.0
5 4 3 2 1

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A B C D E

EA/EG50_CX (Z5WE1) M/B Schematics Document

Security Classification Compal Secret Data Compal Electronics, Inc.

ULV Processor 1.5V DDR3 1333/1600 204pin DDR3-SO-DIMM X1

USB port 3 USB port 0 USB/B (port 1,2) USB port 10

RTC CKT. Sub Board

Power On/Off CKT. PWR/B

Security Classification Compal Secret Data Compal Electronics, Inc.

Voltage Rails Full ON HIGH HIGH HIGH HIGH ON ON ON ON

DIS GE: EDP@/IOAC@/BL@/EMC@/VGA@/ GC6@/N14MGE@/8X@/ CPU config + X76

Security Classification Compal Secret Data Compal Electronics, Inc.

PCI EXPRESS -- GRAPHICS

EDP_COMP AF3 PEG_TX#[15]

BD82NM70 SLJTA C1 BGA 989P PCH ABO! IVY-BRIDGE_BGA1023

eDP_COMPIO and eDP_ICOMPO should be connected to R247 respectively.

Max. Routing Length= 500-mil

JTAG & BPM

Security Classification Compal Secret Data Compal Electronics, Inc.

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY B

CFG Straps for Processor

PCIe Static x16 Lane Numbering Reversal

PEG DEFER TRAINING Tacoma_Fall2 1.0 P.12

1: (Default) PEG Trains immediately and follows

Security Classification Compal Secret Data Compal Electronics, Inc.

PEG IO AND DDR IO

R39 VCCSA 0.675~0.9 4 System Agent Voltage

Security Classification Compal Secret Data Compal Electronics, Inc.

C423 V17 VCCSA[12] D48 H_VCCSA_VID0

V18 D49 H_VCCSA_VID1

Place BOT OUT BGA IVY-BRIDGE_BGA1023

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data Compal Electronics, Inc.

+V_DDR_REFA +1.5V +1.5V

DDR_A_DQS#6 169 170 DDR_A0_DM6

Security Classification Compal Secret Data Compal Electronics, Inc.

DDR_B_DQS#6 169 170 DDR_B0_DM6

Security Classification Compal Secret Data Compal Electronics, Inc.

20mil R77 1 2 1M_0402_5% SM_INTRUDER#

D3 INTVRMEN(Internal Voltage Regulator Enable)

RP26 EMC@ LBSS138LT1G_SOT-23-3

PAD T12 TP@ 10K_0402_5%

Security Classification Compal Secret Data Compal Electronics, Inc.

Y37 BJ30 CLKIN_GND1# R127 2 1 10K_0402_5%

V45 K45 CLK_BUF_ICH_14M R117 1 2 10K_0402_5%

CLKOUT_PCIE7P F47 CLK_FLEX1 TP@ 2 2

Security Classification Compal Secret Data Compal Electronics, Inc.

DMI_CTX_PRX_N0 BC24 BJ14 FDI_CTX_PRX_N0

System Power Management

SYS_PWROK P12 N3 PCH_GPIO32

L22 G8 SUS_STAT# PAD T16 TP@

PCH_PWROK L10 N14 PAD T29 TP@

PBTN_OUT# E20 G10 SLP_A# PAD T20 TP@

RI# A10 K14 PCH_GPIO29

Security Classification Compal Secret Data Compal Electronics, Inc.

Digital Display Interface

Security Classification Compal Secret Data Compal Electronics, Inc.

USB 3.0 are all disabled on NM70

Security Classification Compal Secret Data Compal Electronics, Inc.

For common BIOS code

* H: enable On-Die PLL Voltage Regulator 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ Q5Wxx-QC 1 1 0

PCH_GPIO0 T7 C40 PCH_GPIO68