You are on page 1of 88

A B C D E

1 1

ACL05 LA-1371 Schematics


2

Document REV 1.0


2

INTEL Coppermine-T or Tualatin CPU uFCBGA/uFCPGA


Almador-M(830MG) + ICH3-M + VCH Chipset
3 3

4 4

Title
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 1 of 87
A B C D E
A B C D E

ACL05 BLOCK
DIAGRAM
Mobile Tualatin
4 4
or
Coppermine-T Thermal Sensor CK TITAN CPU VID & All
(uFCBGA/uFCPGA) MAX1617MEE ICS9250-38 reference voltage
PAGE 4,5,6 PAGE 5 PAGE12 PAGE 7

PSB
Almador-M
CRT CONN. VCH/B GMCH-M SO-DIMM * 2
GM Bus Interface Memory Bus
PAGE 16
CONN. BANK 2,3,4,5 PAGE 13,14
625 BGA
3 PAGE 15 3

PAGE 8,9,10,11

HUB Interface
USB IEEE 1394
USB TI TSB43AB22
PAGE 27 PAGE 22

HDD Connector ATA 66/100


LAN FAN on controller &
PAGE 20 RTL8100-L TEMP. sensing circuit
PAGE 21
PAGE 35
Audio CD-DJ ICH3-M
OZ163
2 Rev.C PAGE 30 421 BGA Mini PCI 2
PCI BUS DC/DC Interface
Socket
PAGE 17,18,19 PAGE 28
RTC Battery
Audio Amplifier AC'97 CODEC PAGE 37
PAGE 32
CS4299 PAGE 31
LPC
CardBus
TI Slot 0/1
Audio Jack PCI1420 PAGE 24 BATTERY
PAGE 23
Super I/O Embedded Charger
PAGE 32
Controller PAGE 41
LPC47N227 NS PC87591
PAGE 25 PAGE 33

POWER
Interface
Scan KB BIOS & I/O PAGE 40,42,43,44
1
Parallel FDD 1

PAGE 26 PAGE 20 PAGE 15


PORT PAGE 34

Title
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 2 of 87
A B C D E
A B C D E
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Voltage Rails
PIR
Power Plane Description S1 S3 S5 REV 0.1

VIN Adapter power supply (19V) N/A N/A N/A


Date Page Description
1 B+ AC or battery power rail for power circuit. N/A N/A N/A 1

+VCC_H_CORE Core voltage for CPU ON OFF OFF


+VTT 1.2V switched power rail for CPU AGTL Bus ON OFF OFF
+1.5V 1.5V power rail ON ON OFF
+1.5VS AGP 4X ON OFF OFF
+1.8V 1.8V power rail ON ON OFF
+1.8VS 1.8V switched power rail ON OFF OFF
+2.5V 2.5V power rail ON ON OFF
+3VALW 3.3V always on power rail ON ON ON*
+3V 3.3V power rail ON ON OFF
+3VS 3.3V switched power rail ON OFF OFF
+5VALW 5V always on power rail ON ON ON*
+5V 5V power rail ON ON OFF
+5VS 5V switched power rail ON OFF OFF
+12VALW 12V always on power rail ON ON ON*
2 2
+12VS 12V switched power rail ON OFF OFF
RTCVCC RTC power ON ON ON

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

External PCI Devices


Device IDSEL# REQ#/GNT# Interrupts
VCH CONN. PIRQA
IEEE 1394 A D16 0 PIRQA
C ardBus AD20 2 PIRQA/PIRQB
LAN A D17 3 PIRQB
Mini-PCI AD18 1/4 PIRQC/PIRQD
SD/SM (RESERVE) AD22 PIRQC/PIRQD
3 3

EC SM Bus1 address EC SM Bus2 address


Device Address Device Address
Smart Battery 0001 011X b MAX1617MEE 1001 110X b
EEPROM(24C16/02) 1010 000X b OZ163 0011 0100 b
(24C04) 1011 000Xb Smart Battery 0001 011X b
Docking 0011 011X b
DOT Board XXXX XXXXb

ICH3-M SM Bus address


Device Address
4 4
Clock Generator ( ICS9238-50) 1101 0000
SDRAM Select ( 74HC4052 ) 1010 0000
CPU Voltage VID select ( F3565 ) 0110 111Xb

Title
Compal Electronics, inc.
SCHEMATIC, M/B LA-1371
Size Document Number Rev
Custom 1B
401208
Date: 星期一, 四月 07, 2003 Sheet 3 of 87
A B C D E
A B C D E

+VCC_H_CORE

1 1

AC21

AC19

AC17

AC15

AC13

AC11
AB22
AA21

AB20
AA19

AB18
AA17

AB16
AA15

AB14
AA13

AB12
AA11

AB10
W21
M22

AC9

AC7
G21

AA9

AB8
AA7
D22

H22

N21

R21

U21

D20

D18

D16

D14

D12

D10
E21

K22

P22

V22

Y22

E19

E17

E15

E13

E11
F22

T22

F20

F18

F16

F14

F12

F10
L21
J21

G5
D8

D6

H6

N5
E9

E7

E5

K6

V6
F8

F6

T6
J5
H_A#[3..31] U9A H_D#[0..63]
8 H_A#[3..31] H_D#[0..63] 8

VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
H_A#3 K1 A16 H_D#0
H_A#4 A#3 D#0 H_D#1
J1 A#4 D#1 B17
H_A#5 G2 A17 H_D#2
H_A#6 A#5 D#2 H_D#3
K3 A#6 D#3 D23
H_A#7 J2 B19 H_D#4
H_A#8 A#7 D#4 H_D#5
H3 A#8 D#5 C20
H_A#9 G1 VCC C16 H_D#6
H_A#10 A#9 D#6 H_D#7
A3 A#10 D#7 A20
H_A#11 J3 A22 H_D#8
H_A#12 A#11 D#8 H_D#9
H1 A#12 D#9 A19
H_A#13 D3 A23 H_D#10
H_A#14 A#13 D#10 H_D#11
F3 A#14 D#11 A24
H_A#15 G3 C18 H_D#12
H_A#16 A#15 D#12 H_D#13
C2 A#16 D#13 D24
H_A#17 B5 B24 H_D#14
H_A#18 A#17 D#14 H_D#15
B11 A#18 D#15 A18
H_A#19 C6 E23 H_D#16
H_A#20 A#19 D#16 H_D#17
B9 A#20 D#17 B21
H_A#21 B7 B23 H_D#18
H_A#22 A#21 D#18 H_D#19
C8 A#22 D#19 E26
H_A#23 A8 C24 H_D#20
2 H_A#24 A#23 D#20 H_D#21 2
A10 A#24 Address D#21 F24
H_A#25 B3 Lines D25 H_D#22
H_A#26 A#25 D#22 H_D#23
A13 A#26 D#23 E24
H_A#27 A9 B25 H_D#24
H_A#28 A#27 D#24 H_D#25
C3 A#28 D#25 G24
H_A#29 C12 H24 H_D#26
H_A#30 A#29 D#26 H_D#27
C10 A#30 D#27 F26
H_A#31 A6 L24 H_D#28
A#31 D#28 H_D#29
A15 H25
A14
B13
A12
A#32
A#33
A#34
Mobile Data
Signals
D#29
D#30
D#31
C26
K24
G26
H_D#30
H_D#31
H_D#32
8 H_REQ#[0..4]
H_REQ#[0..4]

H_REQ#0 R1
A#35

REQ#0
Tualatin D#32
D#33
D#34
D#35
K25
J24
K26
H_D#33
H_D#34
H_D#35
H_REQ#1 L3 F25 H_D#36
H_REQ#2 REQ#1 D#36 H_D#37
T1 REQ#2 Request D#37 N26
H_REQ#3 U1 Signals J26 H_D#38
H_REQ#4 REQ#3 D#38 H_D#39
L1 REQ#4 D#39 M24
T4 U26 H_D#40
RP# D#40 H_D#41
8 H_ADS# AA3 ADS# D#41 P25
L26 H_D#42
D#42 H_D#43
D#43 R24
W2 R26 H_D#44
AERR# D#44 H_D#45
AB3 AP#0 D#45 M25
P3 Error V25 H_D#46
+1.5VS AP#1 D#46 H_D#47
C14 BERR# Interface D#47 T24
R331 1.5K AF23 M26 H_D#48
BINIT# D#48 H_D#49
1 2 AF4 IERR# D#49 P24
3 H_D#50 3
D#50 AA26
R87 10 T26 H_D#51
D#51 H_D#52
1 2 A7 BREQ0# D#52 U24
C4 Arbitration Y25 H_D#53
NC D#53 H_D#54
C22 NC Signals D#54 W26
AD23 V26 H_D#55
NC D#55 H_D#56
8 H_BPRI# R2 BPRI# D#56 AB25
L2 T25 H_D#57
8 H_BNR# BNR# D#57
V3 Snoop VSS VCC Y24 H_D#58
8 H_LOCK# LOCK# D#58
Signals W24 H_D#59
D#59 H_D#60
D#60 Y26
AA2 AB24 H_D#61
8 H_HIT# HIT# D#61
U2 AA24 H_D#62
8 H_HITM# HITM# D#62
T3 V24 H_D#63
8 H_DEFER# DEFER# D#63

VCC_80
VCC_79
VCC_78
VCC_77
VCC_76
VCC_75
VCC_74
VCC_73
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_0
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9

TUALATIN
E16
R4
E25
G25
J25
L25
N25
R25
U25
W25
AA25
AC25
AF25
AE26
C23
F23
H23
K23
M23
P23
T23
V23
Y23
AB23
AE23
B22
D21
F21
E22
H21
G22
K21
J22
M21
L22
P21
N22
T21
R22
V21
U22
Y21
W22
AB21
AA22
AC22
AE21
B20
D19
AB19
AA20
AC20
AE19
B18
D17
F17
E18
AB17

P6
M6
AC5
AA5
AB6
W5
Y6
U5
+VCC_H_CORE

4 4

Title
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 4 of 87
A B C D E
A B C D E

+VTT

AC18

AC16

AC14

AC12

AC10
AA18

AE17

AB15
AA16

AE15

AB13
AA14

AE13

AB11
AA12

AE11

AA10

AC8

AC6
AB9

AE9

AB7
AA8

AE7

AB5
AA6

AE5
D15

D13

D11
B16

B14

E14

B12

E12

B10

E10
F15

F13

F11

W6

W4
M3
G6
D9

D7

H5

N6

R6

U6

D4

H4

U4

D2

H2
B8

E8

B6

K5

V5

Y5

B4

K4

B2
F9

F7

F5

T5

F4

F2
L6
J6
+1.8VS U9B

VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
+1.5VS

+1.5VS +VTT
RP23
Y3 AE24 TESTHI1 1 8
8 H_RS#0 RS#0 DEP#0

1
V1 AD25 TESTHI2 2 7
8 H_RS#1 RS#1 DEP#1
1 Place H_RESET# R61 R325 R335 R336 U3 AE25 3 6 TESTLO1 1
8 H_RS#2 RS#2 DEP#2
R3<0.1" from U1 56.2_1% 1.5K 3K 1.5K M5 Request AC24 4 5 TESTLO2
RSP# DEP#3
8 H_TRDY# W1 TRDY# Signals GND DEP#4 AF24
AD26 8P4R_1K
2

2
DEP#5
Data DEP#6 AC26
H_A20M# AC3 Signals AD24
17 H_A20M# A20M# DEP#7
17 H_FERR# AF6 FERR#
AF5 FLUSH#
H_IGNNE# AD9 AF21
17 H_IGNNE# IGNNE# VREF_1 +V_AGTLREF
17 H_SMI# AD3 SMI# VREF_2 AB26
AB4 H26 +VCC_H_CORE
17 H_PW RGD PWRGOOD VREF_3 +VTT
17 H_STPCLK# AE4 STPCLK# VTT Ref VREF_4 A21
17,43 H_DPSLP#
H_INTR
AF8 DPSLP# Compatibility VREF_5 AF9
17 H_INTR AD15 INTR/LINT0 VREF_6 A4
H_NMI AE14 N1
17 H_NMI NMI/LINT1 VREF_7
17 H_INIT# AE6 INIT# VREF_8 AA1
8 H_RESET# B15 RESET#
Y4 TESTLO1
TESTLO
8 H_DBSY# W3 DBSY# VCC R5
8 H_DRDY# Y1 DRDY# PLL1 N3 1 2
+1.5VS L30 4.7UH
Analog PLL2 N2
NC P1
+1.5VS H_THERMDA AF13 THERMDA NC P5
H_THERMDC AF14 E1 C520
THERMDC NC 33UF_16V_D2
F1

Mobile NC
1

+
R62 R55 AE12
10,12 H_BSEL0 SELFSB0
150 150 AF10 AC1 CLK_HCLK

Tualatin
12 H_BSEL1 SELFSB1 CLK0 CLK_HCLK 12
2 1 2 AF16 AD1 CLK_HCLK# 2
EDGECTRLP CLK0# CLK_HCLK# 12
R280 M1 TESTLO2
2

R53 @0 110_1% TESTLO


1 2 AD19 +VTT
17 H_PICD0 PICD0
1 2 AD17 AF18 R76 14_1%
17 H_PICD1 PICD1 NC
R64 @0 AF20 APIC AD16 1 2
12 CLK_CPU_APIC PICCLK NCHCTRLP
C39 AF11 TESTHI1
R41 2 TESTHI
1 NC AE8
@33_0402 AF22 RP2# NC N24
@10PF AE20 RP3# Debug NC AE10
AD22 Break E2 TESTHI2
BPM0# TESTHI
AD21 BPM1# Point
NC P4
AD10 TCK
AD7 TDI Test
AD11 TDO Access NC_1 AD4
R482 1.5K AF7 PORT A5
ITP_TRST# TMS NC_2
1 2 AF15 TRST# NC_3 D1
1 2 AF19 PREQ# ( ITP ) NC_4 AD13
+1.5VS AE22 PRDY# NC_5 B1
+VS_CMOSREF R517 200 P26
NC_6
NC_7 A11
AF12 CMOSREF_1
AD5 CMOSREF_0
1 2 AE16 VCCT VID E3 CPUVTT_PWRGD
R68 56.2_1% RTTIMPDEP VTTPWRGOOD

17,19 PM_CPUPERF# L5 GHI# NC D26


3 3
VCCT_10
VCCT_11
VCCT_12
VCCT_13
VCCT_14
VCCT_15
VCCT_16
VCCT_17
VCCT_18
VCCT_19
VCCT_20
VCCT_21
VCCT_22
VCCT_23
VCCT_24
VCCT_25
VCCT_26
VCCT_27
VCCT_28
VCCT_29
VCCT_30
VCCT_31
VCCT_32
VCCT_33
VCCT_34
VCCT_35
VCCT_36
VCCT_37
VCCT_38

VSS_142
VSS_141
VSS_140
VSS_139
VSS_138
VSS_137
VSS_136
VSS_135
VSS_134
VSS_133
VSS_132
VSS_131
VSS_130
VCCT_1
VCCT_2
VCCT_3
VCCT_4
VCCT_5
VCCT_6
VCCT_7
VCCT_8
VCCT_9

Note :
GHI# Pull-Up internally

VID0
VID1
VID2
VID3
VID4

VSS
VSS
VSS

NC
NC
NC
TUALATIN
A26
G23
J23
L23
N23
R23
U23
W23
AA23
C21
C19
AD20
C17
AD18
C15
C13
AD14
C11
AD12
C9
C7
AD8
C5
AD6
AC23
AA4
E4
G4
J4
L4
AC4
V4
AE3
AF2
AF1
AE18
D5
E6

AB1
AC2
AE2
AF3
R3

B26
M4
AF26

C1
AF17
N4

F19
E20
C25
A25
AE1
AD2
AB2
Y2
V2
T2
P2
M2
K2
+VTT +VTT

1
R44 R99
1 2 +5VALW 10K
2

C40 200 CPU_VR_VID4 7

2
CPU_VR_VID3 7 CPUVTT_PWRGD
.1UF
CPU_VR_VID2 7
1

1
CPU_VR_VID1 7
CPU_VR_VID0 7 2 Q6
+3VS +3V
U8 2N7002

3
1

1
C70 1 16
2200PF NC NC R100
2 VCC STBY 15 EC_SMC2 30,33,40
H_THERMDA

14
3 14
2

H_THERMDC DXP SMBCLK 10K U36F


4 DXN NC 13
R80 5 12 From 87591

2
NC SMBDATA
+5VALW 1 2 6 ADD1 ALERT 11 44 VTT_PWRGD 13 12 VTT_PWRGD# 12,33
1K 7 GND ADD0 10

1
8 9 C105 74LVC14
4 GND NC EC_SMD2 30,33,40 4

7
MAX6654 .1UF

2
1

R50 R49
Thermal Sensor
1K 10K
Compal Electronics, inc.
2

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
+5VALW AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 5 of 87
A B C D E
A B C D E

Layout note :
Place close to CPU, Use 2~3 vias per PAD.
1 Place .47uF caps underneath balls on solder side. Layout note : 1
Place 10uF caps on the peripheral near balls.
Use 2~3 vias per PAD. Place close to CPU,
Use 2 vias per PAD.

+VCC_H_CORE +VTT
1

1
C388 C389 C391 C392 C393 C394 C395 C396 C397 C398 C390 C412 + C45 + C513
.47UF .47UF .47UF .47UF .47UF .47UF .47UF .47UF .47UF .47UF .47UF .47UF 220UF_4V_D2 220UF_4V_D2
2

2
+VCC_H_CORE
+VTT
1UF_10V_0603
1UF_10V_0603 1UF_10V_0603 1UF_10V_0603
1

1
C434 C425 C411 C433 C424 C421 C525 C432 C409 C420 C408 C431
.47UF .47UF .47UF .47UF .47UF .47UF .47UF .47UF .47UF .47UF .47UF .47UF C32 C34 C37 C41 C43 C48 C59 C67 C72 C79
2

2
1UF_10V_0603

2
2 2
1UF_10V_0603 1UF_10V_0603 1UF_10V_0603
1UF_10V_0603 1UF_10V_0603

+VCC_H_CORE
1

1
C450 C449 C448 C447 C446
10UF_10V_1206 10UF_10V_1206 10UF_10V_1206 10UF_10V_1206 10UF_10V_1206
2

+VCC_H_CORE
1

C445 C117 C30 C38 C33


10UF_10V_1206 10UF_10V_1206 10UF_10V_1206 10UF_10V_1206 10UF_10V_1206
2

+VCC_H_CORE
3 3
1

+ C536 + C537 + C519 + C549 + C538


150UF_6.3V_D2 150UF_6.3V_D2 150UF_6.3V_D2 150UF_6.3V_D2 150UF_6.3V_D2
2

+VCC_H_CORE
1

+ C310 + C309 + C308 + C314 + C313 + C297


150UF_6.3V_D2 150UF_6.3V_D2 150UF_6.3V_D2 150UF_6.3V_D2 150UF_6.3V_D2 150UF_6.3V_D2
2

4 4

Title
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 6 of 87
A B C D E
A B C D E

Tualatin
D4 D3 D2 D1 D0 CPU_Core(V) ES(before MP)
CPU Voltege ID +3VS +3V --------------------------------------------------------
0 0 1 0 1 1.50V (Performance)
Default for Resistors Should 0 1 1 0 0 1.15V (Battery)

1
+3V 1 0 1 0 1 0.85V (Deeper Sleep)
be +VCC_CPU = 0.7V, for

1
2
3
4
R172
Deeper Sleep Only.

1
RP30 C213 +VTT
R321 @8P4R_10K @100K 1 2
GTL Reference Voltage
@10K Address 0110 111X

1
1 .1UF D4 D3 D2 D1 D0 CPU_Core(V) QS( MP) 1

8
7
6
5
U17 -------------------------------------------------------- R303 Layout note :

2
1 20 R460 0 0 0 1 1 1 1.40V (Performance) 1K_1%
12,14,17 SMB_CLK SCL VCC 0 1 1 0 0 1.15V (Battery)
12,14,17 SMB_DATA 2 SDA ASEL 19 1 2
1 0 1 0 1 0.85V (Deeper Sleep)
1. Place R303 and R322 between and GMCH and CPU.
3 18 1 2 2. Place decoupling caps near CPU.(Within 500mils)

2
Override# WP R461 0
5 CPU_VR_VID0 4 I_0 NC 17
5 CPU_VR_VID1 5 I_1 MUX_SEL 16 +V_AGTLREF
5 CPU_VR_VID2 6 I_2 Y_0 15 CPU_VID0 43

1
From Tualatin CPU 7 14
5 CPU_VR_VID3 I_3 Y_1 CPU_VID1 43

1
8 13 R322 C514 C71 C35 C27
5 CPU_VR_VID4 I_4 Y_2 CPU_VID2 43
9 12 2K_1% .1UF .1UF .1UF .1UF
A/B# Y_3 CPU_VID3 43
10 11 CPU_VID4 43

2
+3V GND Y_4

2
1 2 C647 FM3565
+3VS
1 2
R173
@10K .1UF
5
17,43 PM_DPRSLPVR 1
4 MUX_SEL
17,43 PM_GMUXSEL 2
+1.5VS
CMOS Reference Voltage
3

U49 Over ride# MUX_SEL A/B# M UX_outputs Mo de


NC7SZ02 1 1 X MUX_inputs +3V
Battery System Memory Reference

1
PM_GMUXSEL = 1 : for Performance mode
0 : for CPU default power 1 0 0 From R288 Layout note :

1
1K_1%
Non-volatile R302
PM_DPRSLPVR = 1: for Deeper Sleep mode 1. Place R288 and R291 between and GMCH and CPU.
2 0 : for Performance mode register(SOPRB) Performance 249_1% 249.9_1% 2. Place decoupling caps near CPU. 2

2
1 0 1 From
Non-volatile +VS_CMOSREF

2
Place capacitor close to GMCH.
register(SOPRA) Deeper sleep

1
+V_SMREF

1
R291 C439 C440

1
2K_1% .1UF .1UF

1
R297 C467

2
49.9_1% .1UF

2
2
2
Place Reference Circuit near GMCH
+1.5VS
+1.8VS C578470PF
HUB Interface Reference 1 2

1
R308 R376 R373
301_1% Layout note : 1K_1% 82.5_1%

1. Place R308 and R296 in middle of Bus.

2
3
2. Place capacitors near GMCH. +VAGP_BRDREF 3
+VS_HUBREF

1
1
R370 R365

1
R296 C453 1K_1% 82.5_1%
301_1% .1UF
C555470PF

2
1 2

2
+1.8VS

+1.8VS
HUB Interface VSwing Voltage

1
R275
1
576_1%
R93
301_1% 1. Place R275 and R274 near GMCH.

2
1. Place R93 and R94 in middle of Bus. +VS_RIMMREF
2

1
+VS_HUBVSWING
R274
1

2K_1%
1

R94 C97
301_1% .1UF

2
4 4
2
2

Title
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 7 of 87
A B C D E
A B C D E

M12
M13
M17
M18

AC5

AH2

AC7
AE2
AB2
N12
N13
N14
N15
N16
N17
N18

R13
R14
R15
R16
R17

U12
U13
U14
U15
U16
U17
U18
P13
P14
P15
P16
P17

V12
V13
V17
V18
T13
T14
T15
T16
T17

AJ5

W2

G2
D2

U5

H5

N2
Y5

P5

K2
T2
L5
H_D#[0..63] U7A H_A#[3..31]
4 H_D#[0..63] H_A#[3..31] 4
1 1

VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36

VSS_H0
VSS_H1
VSS_H2
VSS_H3
VSS_H4
VSS_H5
VSS_H6
VSS_H7
VSS_H8
VSS_H9
VSS_H10
VSS_H11
VSS_H12
VSS_H13
VSS_H14
VSS_H15
VSS_H16
H_D#0 U4 H2 H_A#3
H_D#1 H_D#0 H_A#3 H_A#4
P1 H_D#1 H_A#4 E3
H_D#2 W6 G3 H_A#5
H_D#3 H_D#2 H_A#5 H_A#6
U2 H_D#3 H_A#6 N4
H_D#4 U6 M6 H_A#7
H_D#5 H_D#4 H_A#7 H_A#8
R1 H_D#5 VSS H_A#8 F1
H_D#6 N3 F2 H_A#9
H_D#7 H_D#6 H_A#9 H_A#10
W5 H_D#7 H_A#10 J3
H_D#8 V4 F3 H_A#11
H_D#9 H_D#8 H_A#11 H_A#12
P3 H_D#9 H_A#12 P6
H_D#10 R3 G1 H_A#13
H_D#11 H_D#10 H_A#13 H_A#14
U1 H_D#11 H_A#14 N5
H_D#12 V6 H1 H_A#15
H_D#13 H_D#12 H_A#15 H_A#16
W4 H_D#13 H_A#16 P4
H_D#14 T3 T4 H_A#17
H_D#15 H_D#14 H_A#17 H_A#18
P2 H_D#15 H_A#18 M2
H_D#16 V3 J2 H_A#19
H_D#17 H_D#16 H_A#19 H_A#20
R2 H_D#17 H_A#20 L2
H_D#18 T1 R4 H_A#21
H_D#19 H_D#18 H_A#21 H_A#22
W3 H_D#19 H_A#22 K1
H_D#20 U3 L3 H_A#23
H_D#21 H_D#20 H_A#23 H_A#24
Y4 H_D#21 H_A#24 L1
H_D#22 AA3 J1 H_A#25
H_D#23 H_D#22 H_A#25 H_A#26
W1 H_D#23 H_A#26 N1
H_D#24 V1 T5 H_A#27
H_D#25 H_D#24 H_A#27 H_A#28
Y1 H_D#25 H_A#28 H3
2 H_D#26 Y6 M3 H_A#29 2
H_D#27 H_D#26 H_A#29 H_A#30
AD3 H_D#27 Host H_A#30 M1
H_D#28 AB4 Interface K3 H_A#31 Close to Ball R6.
H_D#29 H_D#28 H_A#31
AB5
H_D#30
H_D#31
H_D#32
V2
Y3
Y2
H_D#29
H_D#30
H_D#31
H_D#32
Host
Interface Almador-M H_CPURST#
H_ADS#
R6
C1
1
R290
2
@0
H_RESETX#
H_RESET# 5
H_ADS# 4
H_D#33
H_D#34
H_D#35
H_D#36
AA4
AA1
AA6
AB1
H_D#33
H_D#34
H_D#35
GMCH H_BNR#
H_BPRI#
H_DBSY#
E1
L4
G5
J4
H_BNR# 4
H_BPRI# 4
H_DBSY# 5
H_DEFER# 4
H_D#37
H_D#38
H_D#39
AC4
AA2
AB3
H_D#36
H_D#37
H_D#38
H_D#39
A3 H_DEFER#
H_DRDY#
H_HIT#
H_HITM#
F4
D3
D1
H_DRDY# 5
H_HIT#
H_HITM# 4
4
H_D#40 AD2 J6
H_D#40 H_LOCK# H_LOCK# 4
H_D#41 AD1 G4
H_D#41 H_TRDY# H_REQ#[0..4] H_TRDY# 5
H_D#42 AC2 H_D#42 H_REQ#[0..4] 4
H_D#43 AB6
H_D#44 H_D#43 H_REQ#0
AC6 H_D#44 H_REQ#0 K6
H_D#45 AC1 M4 H_REQ#1
H_D#46 H_D#45 H_REQ#1 H_REQ#2
AF3 H_D#46 H_REQ#2 K5
H_D#47 AD4 K4 H_REQ#3
H_D#48 H_D#47 H_REQ#3 H_REQ#4
AD6 H_D#48 H_REQ#4 L6
H_D#49 AC3 H_RS#[0..2]
H_D#49 H_RS#[0..2] 5
H_D#50 AH3
H_D#51 H_D#50 H_RS#0
AE5 H_D#51 H_RS#0 H6
H_D#52 AE3 H4 H_RS#1
H_D#53 H_D#52 H_RS#1 H_RS#2
AG2 H_D#53 H_RS#2 G6
H_D#54

AGP_RCOMP/DVOBC_RCOMP
AF4 H_D#54
3 H_D#55 3
AF2 H_D#55
H_D#56 AJ3 AJ4
H_D#56 CLK_HT CLK_GHT 12
H_D#57 AE4 AH5
H_D#58 H_D#57 CLK_HT# CLK_GHT# 12
AG1 H_D#58
H_D#59 AE1 H_D#59

VSSPCMOS_LM0
VSSPCMOS_LM1
VSSPCMOS_LM2
H_D#60 AG4 AC19
H_D#60 CLK_DREF CLK_DREF 12

H_GTLRCOMP
H_D#61 AH4 AG26
HUB_PSTRB#

DVO_RCOMP

HUB_RCOMP
H_D#61 CLK_GBIN CLK_GBIN 12
HUB_PSTRB

VSSP_DVO0
VSSP_DVO1
VSSP_DVO2
VSSP_HUB0
VSSP_HUB1
H_D#62

H_GTLREF1
H_GTLREF0
SM_RCOMP

VSSA_CPLL
VSSA_HPLL
AG3 AD24 1 2

VSSA_DAC
H_D#62 CLK_GBOUT 12
HUB_PD10

CLK_GBOUT

VSSP_IO0
VSSP_IO1
VSSP_IO2
H_D#63
HUB_REF

AGP_REF
HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9

AF1 H_D#63 RESET# R26047

2
.01UF

VSS
VSS
R242 R276 C373

2
@33_0402 @33_0402
ALMADOR-M R158
G26
H28
H29
H27
F29
F27
E29
E28
G25
G27
H26
G29
F28
H24

AC22
F6
J23
J25
K24
AB24
AA7
J7

C2

AB23
AC23

AH19
AH20
AF5

G28
H25

AC26
AD22
AE28

AH24
AF25
AF27

AH26

G8
AD7
240K

1
HUB_PD10

C322 C381 Closely to C.G


HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9

1
+VS_HUBREF @10PF
1 2 @10PF
R91 80.6_1%
+V_AGTLREF
1

17 HUB_PD[0..10]
C469 C471
17 HUB_PSTRB
.1UF .1UF
17 HUB_PSTRB#
2

2
1

R246 2 1 54.9_1%
C476 R92 1 2 27.4_1%
4 PCIRST# 15,17,19,20,21,22,23,24,25,28,29,35 4
.01UF R83 1 2 54.9_1% 2 1
2

R78 54.9_1%
1

C470
.1UF
10 mils wide,length <=500 mils.
Compal Electronics, inc.
2

+VAGP_CRDREF Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 8 of 87
A B C D E
A B C D E
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
VSSA_DPLL0 10 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VSSA_DPLL1 10

AG15
AG16
AG21
AD10

AH21

AH11
AH12
AH14
AH17
AH18
AE10
AE11
AE12
AE13
AE17
AE19

AB28

AE20
AF10
AF11
AF12
AF13
AF14
AF15
AF16
AF17
AF18
AF19
AF20
AJ21

W28
AG7
AD8
AD9

AH6
AH8
AH9

G24
AE8
AE9

N28

U25
AF8
AF9

K28

P25

Y25
T28

L25
U7B SM_D_MA[0..12]
SM_D_MA[0..12] 13
R254 0 *

VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM

VSSP_AGP0
VSSP_AGP1
VSSP_AGP2
VSSP_AGP3
VSSP_AGP4
VSSP_AGP5
VSSP_AGP6
VSSP_AGP7
VSSP_AGP8

VSSA_DPLL0
VSSA_DPLL1
VSSA_DPLL01 2
R306 0 *
SM_DQ0 D29 A20 SM_D_MA0 VSSA_DPLL11 2
SM_DQ1 SM_DQ0 SM_MA0 SM_D_MA1
C29 SM_DQ1 SM_MA1 B20
1 SM_DQ2 D27 B19 SM_D_MA2 1
SM_DQ3 SM_DQ2 SM_MA2 SM_D_MA3
C27 SM_DQ3 SM_MA3 C19
SM_DQ4 A27 A18 SM_D_MA4
SM_DQ5 SM_DQ4 SM_MA4 SM_D_MA5
B26 SM_DQ5 VSS SM_MA5 A19
SM_DQ6 E24 C17 SM_D_MA6
SM_DQ7 SM_DQ6 SM_MA6 SM_D_MA7
C25 SM_DQ7 SM_MA7 C18
SM_DQ8 E23 B17 SM_D_MA8
SM_DQ9 SM_DQ8 SM_MA8 SM_D_MA9
B25 SM_DQ9 SM_MA9 A17
SM_DQ10 C23 A16 SM_D_MA10
SM_DQ11 SM_DQ10 SM_MA10 SM_D_MA11
F22 SM_DQ11 SM_MA11 C15
SM_DQ12 B23 C14 SM_D_MA12
SM_DQ13 SM_DQ12 SM_MA12
C22 SM_DQ13
SM_DQ14 E21
SM_DQ15 SM_DQ14
B22 SM_DQ15 NC F20
SM_DQ16 C12 E20 XOR layout note:
SM_DQ17 SM_DQ16 NC F20,E20,F12,E11 add
D10 SM_DQ17 NC F12 For Almador-M A3 s tepping requirement.
SM_DQ18 C11 E11 testpoint for factory
SM_DQ19 SM_DQ18 NC
A10 SM_DQ19 VSS C21
SM_DQ20 C10 F19 +3V
SM_DQ21 SM_DQ20 VSS
C8 SM_DQ21 VCC_SM E12
SM_DQ22 A7 A12
SM_DQ23 SM_DQ22 VCC_SM
E9 SM_DQ23 1 2
SM_DQ24 C7 C512 .1UF
SM_DQ25 SM_DQ24 R3191
E8 SM_DQ25 SM_BA0 B16 2 10 SM_BA0 14
SM_DQ26 A5 C16 R3101 2 10
SM_DQ26 SM_BA1 SM_BA1 14
SM_DQ27 F8
SM_DQ28 SM_DQ27 SM_DQM[0..7] 14
C5 SM_DQ28
SM_DQ29 D6 F18 SM_DQM0

2
SM_DQ30
SM_DQ31
SM_DQ32
B4
C4
E27
SM_DQ29
SM_DQ30
SM_DQ31
SM_DQ32
SDRAM
System
Almador-M SDRAM
System
SM_DQM0
SM_DQM1
SM_DQM2
SM_DQM3
D18
D13
D12
SM_DQM1
SM_DQM2
SM_DQM3
2

SM_DQ33 Memory Memory SM_DQM4


SM_DQ34
SM_DQ35
C28
B28
E26
SM_DQ33
SM_DQ34 GMCH SM_DQM4
SM_DQM5
E18
F17
F14
SM_DQM5
SM_DQM6
SM_DQ36
SM_DQ37
SM_DQ38
C26
D25
A26
SM_DQ35
SM_DQ36
SM_DQ37
SM_DQ38
A3 SM_DQM6
SM_DQM7 F13 SM_DQM7

SM_DQ39 D24 E17 SM_CS#0


SM_DQ39 SM_CS#0 SM_CS#0 14
SM_DQ40 F23 F16 SM_CS#1
SM_DQ40 SM_CS#1 SM_CS#1 14
SM_DQ41 A25 D16 SM_CS#2
SM_DQ41 SM_CS#2 SM_CS#2 14
SM_DQ42 G22 D15 SM_CS#3
SM_DQ42 SM_CS#3 SM_CS#3 14
SM_DQ43 D22 E15 +3V
SM_DQ44 SM_DQ43 VCCQ_SM
A23 SM_DQ44 VSS E14
SM_DQ45 F21
SM_DQ46 SM_DQ45
D21 SM_DQ46
SM_DQ47 A22 A15 SM_D_CLK0
SM_DQ48 SM_DQ47 SM_CLK0 SM_D_CLK1
F11 SM_DQ48 SM_CLK1 B2
SM_DQ49 A11 B14 SM_D_CLK2
SM_DQ50 SM_DQ49 SM_CLK2 SM_D_CLK3
B11 SM_DQ50 SM_CLK3 A3
SM_DQ51 F10 A14
SM_DQ52 SM_DQ51 VSS
B10 SM_DQ52 VSS C3
SM_DQ53 B8
SM_DQ54 SM_DQ53
D9 SM_DQ54
SM_DQ55 B7 A13 SM_CKE0
SM_DQ55 SM_CKE0 SM_CKE0 14
SM_DQ56 F9 C9 SM_CKE1
SM_DQ56 SM_CKE1 SM_CKE1 14
SM_DQ57 A6 C13 SM_CKE2
SM_DQ57 SM_CKE2 SM_CKE2 14
SM_DQ58 C6 A9 SM_CKE3
SM_DQ58 SM_CKE3 SM_CKE3 14
SM_DQ59 D7 VSS Power B13
3 SM_DQ60 SM_DQ59 VSS 3
B5 SM_DQ60 VCC_SM A8
SM_DQ61 E6 C452 .1UF
SM_DQ62 SM_DQ61 +3V
VSSP_SM10
VSSP_SM11
VSSP_SM12
VSSP_SM13
VSSP_SM14
VSSP_SM15
VSSP_SM16
VSSP_SM17
VSSP_SM18
VSSP_SM19

A4 1 2
SM_VREF1
SM_VREF0
VSSP_SM0
VSSP_SM1
VSSP_SM2
VSSP_SM3
VSSP_SM4
VSSP_SM5
VSSP_SM6
VSSP_SM7
VSSP_SM8
VSSP_SM9

SM_DQ62
SM_OCLK

SM_DQ63
SM_RCLK

SM_CAS#
SM_RAS#
D4 SM_DQ63 SM_WE#
Layout note :
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

1.Placement TP6 for Almador-M A2 stepping die.


2.The 0.1uF capacitor and connection to +3V
ALMADOR-M
must be implante d for Almador-M A3 stepping
B3
B6
B9
B12
B15
B18
B21
B24
B27
E7
E10
E13
E16
E19
E22
E25
G9
G21
E4
D28

H7
H23
K7
K23
L7
N6
T6
W7
Y7
AB7
M24
P24
T24
V24
Y23
M14
M15
M16
P12
R12
T12
P18
R18
T18

F24
E5

C24
A24

A21
D19
C20

SM_DQ[0..63] di e.
SM_DQ[0..63] 14
R312 1 2 10
SM_RAS# 14
R311 1 2 10
SM_CAS# 14
R316 1 2 10
+VTT SM_WE# 14
SM_OCLK 1 2
SM_RCLK
C507 @22PF
Layout note :
Layout note :
Line length 0.15 inches +- 50mils near pin C24
Layout note :
+V_SMREF
Place resistors & capacitors near GMCH
1

C494 C493
Close to Ball E5 and F24
.1UF .1UF
2

4 4
SM_D_CLK0 R318 1 2 10
SMD_CLK0 14
SM_D_CLK1 R313 1 2 10
SMD_CLK1 14
SM_D_CLK2 R317 1 2 10
SMD_CLK2 14
SM_D_CLK3 R315 1 2 10
SMD_CLK3 14

Compal Electronics, inc.


1

C506 C516 C515 C517 Title


@33PF @33PF @33PF @33PF
SCHEMATIC, M/B LA-1371
2

Size Document Number Rev


Custom 1B
401208
Date: 星期一, 四月 07, 2003 Sheet 9 of 87
A B C D E
A B C D E

0_0805
1 2 +1.8VS VSSA_DPLL0 9 Strap Name Low High
R277
VSSA_DPLL1 9
*C283 *C282 DVOA_D0 Reserved 133MHz

1
+1.5VS +VTT
* *

1
C383 C384 C286 C285 DVOA_D1 IOQD=2 IOQD=8
+1.8VS C330 .1UF +3V @.1UF @.1UF@220UF_4V_D2 @220UF_4V_D2 +VTT

2
Layout note : 2 1 .01UF .1UF * L3 0_0805 R301 0 * DVOA_D5 Desktop Mobile

2
+VTT +3V +1.8VS 1 2 1 2
Place close to AE16, 2 1 1 2 1 2 DVOA_D6 Dual Ended Term Single Ended Term
C483 .1UF +VTT
AE15 of GMCH * L4 0_0805 R299 0 *
+1.5VS R269 1 2 @2.2K DVOA_D6
+1.5VS R226 1
1 2 2.2K DVOA_D5 1

1
C413

AG27
AD15
AD16

AD23

AC20

AC21
AE16
AE15

AE25

AA26

AA23

AF26

AF21
AF24
68PF R240 1 2 @2.2K DVOA_D0 1 2

W23

AG5
M26

AC9
AC8

AD5
G10
G20
AE6

AE7

AA5
N24

R26

U24

AF6
H_BSEL0 5,12

V14
V15
V16

V26
F26

F25
L23
J24

J26

M5
G7

R5
R232 @2.2K

V5

E2
F5
J5
2
U7C

VCCP_HUB
VCCP_HUB

VCCQ_AGP
VCCQ_AGP

VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
VDD_LM
VDD_LM
VDD_LM
VDD_LM
VDD_LM
VDD_LM
VDD_LM

VCCQ_SM
VCCQ_SM

VCCPCMOS_LM
VCCPCMOS_LM
VCCPCMOS_LM
VCCPCMOS_LM
VCCP_IO
VCCP_IO

VCCA_HPLL
VCCA_CPLL

VCCP_DVO
VCCP_DVO
VCCA_DAC
VCCA_DAC

VCC_H
VCC_H
VCC_H
VCC_H
VCC_H
VCC_H
VCC_H
VCC_H
VCC_H

VCCA_DPLL0
VCCA_DPLL1

VCCP_DVO
AGP_SBA[0..7]
15 AGP_SBA[0..7]
AGP_SBA0 AA29 AE29
AGP_SBA0/ZV_D8 DAC_VSYNC DAC_VSYNC 16
AGP_SBA1 AA24 AD28
AGP_SBA1/ZV_D7 DAC_HSYNC DAC_HSYNC 16
AGP_SBA2 AA25 AF28
AGP_SBA2/ZV_D6 DAC_RED# DAC_RED# 16
AGP_SBA3 Y24 AG28
AGP_SBA3/ZV_D5 DAC_GREEN# DAC_GREEN# 16
AGP_SBA4 Y27 AH27
AGP_SBA4/ZV_D2 DAC_BLUE# DAC_BLUE# 16
AGP_SBA5 Y26 AF29
AGP_SBA5/ZV_D1 DAC_RED DAC_RED 16
AGP_SBA6 W24 Power AG29
AGP_SBA6/ZV_D0 DAC_GREEN DAC_GREEN 16
AGP_SBA7 Y28 Interface AH28 R252 10K
AGP_SBA7/ZV_HREF DAC_BLUE DAC_BLUE 16
AE27 IO_DDC1CLK 1 2
AGP_CBE#[0..3] IO_DDC1CLK IO_DDC1DATA R262 1 +3VS
15 AGP_CBE#[0..3] IO_DDC1DATA AD27 2 10K
AGP_CBE#0 L27 AJ27 1 2
AGP_CBE#1 P29 AGP_CBE#0/DVOB_D7 DAC_REFSET R229 255_1% R551 1
AGP_CBE#1/DVOB_BLANK# 2 0 AGP_DDCCLK 15,16
AGP_CBE#2 R27 R552 1 2 0
AGP_CBE#2/ZV_VSYNC AGP_DDCDATA 15,16
AGP_CBE#3 T25 AD20 DVOA_CLKIN
AGP_CBE#3/DVOC_D5 DVO_CLKIN R551,R552: No stuff in AGP mode,
DVO_BLANK# AD21 VCH_I2CDATA 15
AF23 Stuff in VCH mode
DVO_VSYNC VCH_I2CCLK 15
15 AGP_ADSTB0 AGP_ADSTB0 L29 AF22
AGP_ADSTB#0 AGP_ADSTB0/DVOB_CLK DVO_HSYNC R261 1
15 AGP_ADSTB#0 L28 AGP_ADSTB#0/DVOB_CLK# IO_I2CCLK AD25 2 10K
15 AGP_ADSTB1 AGP_ADSTB1 U29 AC25 R263 1 2 10K
AGP_ADSTB#1 AGP_ADSTB1/DVOC_CLK IO_I2CDATA +3VS
15 AGP_ADSTB#1 U28 AGP_ADSTB#1/DVOC_CLK# DVO_CLK# AG24
2 AGP_SBSTB AA27 AJ24 2
15 AGP_SBSTB AGP_SBSTB/ZV_D4 DVO_CLK
AGP_SBSTB# AA28
15 AGP_SBSTB# AGP_SBSTB#/ZV_D3 +1.5VS
AGP_FRAME# R29
15 AGP_FRAME# AGP_FRAME#/M_DDC1_DATA
AGP_IRDY# P26 AJ22 DVOA_D0 R259 100K
15 AGP_IRDY# AGP_IRDY#/M_I2C_CLK DVO_D0
AGP_TRDY# P27 Display AH22 DVOA_D1 DVOA_CLKIN 1 2
15 AGP_TRDY# AGP_TRDY#/M_DDC1_CLK DVO_D1
AGP_STOP# N25 Interface AG22 R255 100K
15 AGP_STOP# AGP_STOP#/M_DDC2_DATA DVO_D2
AGP_DEVSEL# R28 AJ23 DVOA_INTR# 1 2
15 AGP_DEVSEL# AGP_DEVSEL#/M_I2C_DATA DVO_D3
AGP_REQ# AC27 (DVOA port) AH23 DVOA_D4 R256 10K
15 AGP_REQ# AGP_REQ#/ZV_CLK DVO_D4
AGP_GNT# AD29 AGP AG23 DVOA_D5 DVOA_FIELD 1 2
15 AGP_GNT# AGP_GNT#/ZV_D15 DVO_D5
AGP_PAR P28 Interface AE23 DVOA_D6
15 AGP_PAR
15 AGP_AD[0..31]
AGP_AD[0..31]

AGP_AD0 J29
AGP_PAR/DVO_DETECT

AGP_AD0/DVOB_HSYNC
(DVOB/DVOC & ZV port) Almador-M DVO_D6
DVO_D7
DVO_D8
DVO_D9
AE24
AJ25
AH25
XOR layout note: AE24,AJ25
add testpoint for factory
AGP_AD1
AGP_AD2
AGP_AD3
J28
K26
K25
AGP_AD1/DVOB_VSYNC
AGP_AD2/DVOB_D1 GMCH DVO_D10
DVO_D11
AG25
AJ26 TV_OUT_DDC2DATA 15
TV_OUT_DDC2CLK 15
AGP_AD4
AGP_AD5
AGP_AD6
L26
J27
K29
AGP_AD3/DVOB_D0
AGP_AD4/DVOB_D3
AGP_AD5/DVOB_D2
AGP_AD6/DVOB_D5
A3 IO_DDC2DATA
IO_DDC2CLK
AD26
AE26
R251 1
R250 1
2 10K
2 10K +3VS
AGP_AD7 K27 AE21 DVOA_INTR#
AGP_AD8 AGP_AD7/DVOB_D4 DVO_INTR# DVOA_FIELD
M29 AGP_AD8/DVOB_D6 DVO_FIELD AE22
AGP_AD9 M28
AGP_AD10 AGP_AD9/DVOB_D9
L24 AGP_AD10/DVOB_D8
AGP_AD11 M27 AG17
AGP_AD12 AGP_AD11/DVOB_D11 LM_DQA0
N29 AGP_AD12/DVOB_D10 LM_DQA1 AJ17
AGP_AD13 M25 AG18
AGP_AD14 AGP_AD13/DVOBC_CLKINT# LM_DQA2
N26 AGP_AD14/DVOB_FLD/STL LM_DQA3 AJ18
AGP_AD15 N27 AG19
AGP_AD16 AGP_AD15/M_DDC2_CLK LM_DQA4
3
R25 AGP_AD16/DVOC_VSYNC Lo cal Memory LM_DQA5 AJ19
3
AGP_AD17 R24 AG20
AGP_AD18 AGP_AD17/DVOC_HSYNC Interface LM_DQA6
T29 AGP_AD18/DVOC_BLANK# LM_DQA7 AJ20
AGP_AD19 T27
AGP_AD20 AGP_AD19/DVOC_D0
T26 AGP_AD20/DVOC_D1
AGP_AD21 U27 AJ11
AGP_AD22 AGP_AD21/DVOC_D2 LM_DQB0
V27 AGP_AD22/DVOC_D3 LM_DQB1 AH10
AGP_AD23 V28 AJ10
AGP_AD24 AGP_AD23/DVOC_D4 LM_DQB2
U26 AGP_AD24/DVOC_D7 LM_DQB3 AG10
AGP_AD25 V29 Local Memory AJ9
AGP_AD26 AGP_AD25/DVOC_D6 LM_DQB4 R257
W29 AG9
AGP_AD26/DVOC_D9 Interface LM_DQB5
AGP_PIPE#/ZV_D10

AGP_RBF#/ZV_D11

AGP_AD27 V25 AJ8 1 2


AGP_WBF#/ZV_D9

AGP_AD27/DVOC_D8 LM_DQB6 +3VS


AGP_ST0/ZV_D14
AGP_ST1/ZV_D13
AGP_ST2/ZV_D12

AGP_AD28 W26 AG8 *


AGP_AD29 AGP_AD28/DVOC_D11 LM_DQB7 10K
LM_RAMREF0
LM_RAMREF1

W25 AGP_AD29/DVOC_D10
AGP_AD30 W27 AGP_AD30/DVOBC_INTR#/DPMS_CLK

VCCQ_SM
VCCQ_SM

VCCQ_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM

VCCP_SM

VCCP_SM
AGP_AD31 AGP_BUSY#
LM_GCLK

LM_CTM#

LM_CFM#
LM_RCLK

Y29 AC24
LM_CMD

AGP_BUSY# 15,17
LM_CTM

LM_CFM

AGP_AD31/DVOC_FLD/STL AGP_BUSY#

VCC_LM
VCC_LM
VCC_LM
VCC_LM
VCC_LM
VCC_LM
VCC_LM
VCC_LM
VCC_LM
LM_RQ0
LM_RQ1
LM_RQ2
LM_RQ3
LM_RQ4
LM_RQ5
LM_RQ6
LM_RQ7
LM_SCK
LM_SIO

ALMADOR-M
AB26
AB29
AB25

AGP_ST0 AC28
AGP_ST1 AC29
AGP_ST2 AB27

AH7
AF7
AJ7

AG11
AJ12
AG12
AH13
AG13
AJ13
AG14
AJ14

AJ6
AG6

AD14
AE14

AH15
AJ15

AJ16
AH16

D5
D8
D11
D14
D17
D20
D23
D26
F7
F15
G11
G19
G23

AC10
AC11
AD11
AD12
AD13
AE18
AD17
AD18
AD19
+1.8VS

AGP_PAR : Strapping option for SW detection of


AGP or DVO device. AGP_PIPE#
15 AGP_PIPE#

1
0 -> DVO B/C device AGP_WBF# +3V
15 AGP_WBF#
1 -> AGP device AGP_RBF# C354
15 AGP_RBF#
68PF

2
AGP_PAR AGP_ST[0..2]
4 15 AGP_ST[0..2] 4

R272 R279 R234 1 2 10K +VS_RIMMREF


1 2 1 2 R239 1 2 10K
+1.5VS
@8.2K 330

Compal Electronics, inc.


1

Title
C340 C328
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL .1UF .1UF SCHEMATIC, M/B LA-1371
2

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 10 of 87
A B C D E
A B C D E

Layout note : Layout note :


Distribute as close as possible Distribute as close as possible
to GMCH Processor Quadrant . to VCCPCMOS_LM .

+1.8VS
+VTT

1 1

1
C363 C364 C365 C334
1

1
+ C302
C353 C327 C350 C357 C358 C343 C344 C387 C407 C419 22UF_16V_1206 .1UF .1UF .01UF .01UF

2
.1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF
2

2
+VTT

Layout note :
1

1
Distribute as close as possible
C437 C454 C466 C474 C427 C435 C438 C460 C459 C462
.1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF
to GMCH Local Memory Quadrant .
2

2
+1.8VS

1
1

1
C345+ C301 C359 C360 C361 C356 C355+ C298 + C299 + C319 + C320 + C300

82PF 22UF_16V_1206 .1UF .1UF 82PF .1UF .1UF 68UF_4V_B2 68UF_4V_B2 68UF_4V_B2 @68UF_4V_B2 @68UF_4V_B2

2
2 +VTT 2
Layout note :
Distribute as close as possible
1

to GMCH AGP/DVO Quadrant .


1

1
+ C127
220UF_4V_D2 C405 C404 C403 C418 C429 C436 C372 C386 C399 C423
.1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF
2

2
+1.5VS

+VTT

1
+ C379 C415 C428 C457
C287 C336 C335 C382 C400 C366 C406 C442 C244 C443
1

.1UF .1UF 82PF .1UF .1UF 82PF .1UF .1UF 82PF .1UF .1UF 82PF .1UF

2
1

1
+ C80
220UF_4V_D2 C410 C463 C473 C81 C28 C74 C88 C31 C78 C83 22UF_16V_1206
.1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF
2

2
+VTT
Layout note :
Distribute as close as possible
to GMCH System Memory Quadrant .
1

+ C36
220UF_4V_D2 C380 C401 C422 C441 C451 C456 C465 C458 C472 C468 +3V
3 .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF 3
2

1
+VTT + C481 C501 C496 C497
C523 C477 C482 C503 C502 C500 C489 C498 C495 C480 C479 C491 C505
22UF_16V_1206 .1UF .1UF 82PF .1UF .1UF 82PF .1UF .1UF 82PF .1UF .1UF 82PF .1UF .1UF .1UF .1UF
2

2
1

C475 C484 C490 C504 C402 C414 C417 C464


.1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF
2

Layout note :
Distribute as close as possible
+VTT
to IO Quadrant .
1

+3V
+ C62 + C106
220UF_4V_D2 220UF_4V_D2
2

+ C524 C499 C511


22UF_16V_1206 .1UF .1UF
2

2
2

4 4

Title
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 11 of 87
A B C D E
A B C D E

+3VS L6 +3V_CLK
CHB2012U170
1 2 Width=40 mils

1
Check Bead Value +
C115 C130 C133 C152 C121 C122 C124 C155 C156 C123
should be 19.6K 22UF_16V_1206 .01UF .01UF .01UF .01UF .01UF .01UF .01UF .01UF .01UF

2
1 1

14
19
32
37
46
50
1
8
U10
+3VS Place Crystal within 500 mils of CK_Titan

VDD_PCI
VDD_PCI
VDD_REF

VDD_48MHZ
VDD_3V66
VDD_3V66

VDD_CPU
VDD_CPU
L5 +3VS
+3VS C118 5PF CHB2012U170
1 2 2 XTAL_IN VDD_CORE 26 1 2
+3VS

1
1
caps are internal Y1 + Place all these Block's
1

1
to CK_TITAN 14.318MHZ C120 C128
R146 R110 R111 .01UF 22UF_16V_1206
Components near CK_Titan(U5)

2
10K 330 330
1 2 3 XTAL_OUT GND_CORE 27
2

C129 5PF 45 CLK_BCLK 1 2


CPUCLKT2 CLK_HCLK 5
SEL2 40 R324 1 2 33
SEL2

1
SEL1 55 R329 61.9_1%
5 H_BSEL1 SEL1
SEL0 54 Place all these Block's
5,10 H_BSEL0 SEL0 R334
Components near CPU (U1)
1

R528 1 2 0 475_1%
17,33 PM_SLP_S1#
R145 R112 R114 R328 1 2 61.9_1%

2
@0 @0 @0 R529 1 2 @0 25 44 CLK_BCLK# 1 2 33
17,33 PM_SLP_S3# PWR_DWN# CPU_CLKC2 CLK_HCLK# 5
34 R323
17 PM_STPPCI# PCI_STOP#
R116 1 2 0 53 49 CLK_GCLK 1 2
17 PM_STPCPU# CLK_GHT 8
2

CPU_STOP# CPUCLKT1 R32 1 2 33

1
R562 1 2 10K R33 61.9_1%
+3VS
2 Place all these Block's 2
1 2 28 R34
5,33 VTT_PWRGD# D47 VTT_PWRGD# 475_1%
Components near GMCH (U6)
RB751V R31 1 2 61.9_1%

2
48 CLK_GCLK# R30 1 2 33 CLK_GHT# 8
R138 1 CPUCLKC1
2 10K 43 MULT0
CPUCLKT0 52
R157 1 2 4.7K
+3V

7,14,17 SMB_DATA 29 SDATA


7,14,17 SMB_CLK 30 SCLK

+3V 1 2
R154 4.7K 51
CPUCLKC0
33 3V66_0/DRCG
R151 1 2 33 35 24
15 CLK_VCH R151: No stuff in AGP mode 3V66_1/VCH_CLK 66MHZ_IN/3V66_5 CLK_GBOUT 8
Stuff in VCH mode 2 1
23 R153 1 2 33 CLK_AGPCONN 15 @33_0402
R137 1 66MHZ_OUT2/3V66_4
2 220_1% 42 IREF 66MHZ_OUT1/3V66_3 22 R150 1 2 33 CLK_GBIN 8
@10PF
* 22 1_1% 21 R147 1 2 33 R155 C154
66MHZ_OUT0/3V66_2 CLK_ICHHUB 17
R119:Stuff in AGP mode
No stuff in VCH mode
R141 1 2 22 39 7 R119 1 2 33
17 CLK_ICH48 48MHZ_USB PCICLK_F2 CLK_ICHPCI 17
* 33 6 R118 1 2 33 PCIF1
PCICLK_F1 R115 1
PCICLK_F0 5 2 @33 PCIF0

R149 1 2 22 38
8 CLK_DREF 48MHZ_DOT
* 33 18 R143 1 2 33
3 PCICLK6 CLK_PCI_CB 23 3
17 R144 1 2 33
PCICLK5 CLK_PCI_LAN 21
16 R140 1 2 33
PCICLK4 CLK_LPC_SIO 25
R108 1 2 33 56 13 R136 1 2 33
17 CLK_ICH14 REF PCICLK3 CLK_PCI_1394 22
1 2 12 R125 1 2 @33
25 CLK_SIO14 PCICLK2 CLK_PCI_SD/SM 29
GND_48MHZ

R109 33 11 R121 1 2 33
PCICLK1 CLK_LPC_EC 33
GND_3V66
GND_3V66

GND_IREF
GND_CPU
GND_REF

10 R122 1 2 33
GND_PCI
GND_PCI

PCICLK0 CLK_MINIPCI 28

1
C147 C149 C150
Place caps. near
1

C135 C148 ICS950805 @10PF @10PF @10PF


CK_Titan (U5)
4
9
15
20
31
36
41
47

2
Place caps. near
@10PF @10PF
CK Titan (U5)
2

Place near CPU


R36 26.7_1%
PCIF1 1 2 CLK_CPU_APIC 5
PCIF0 1 2 CLK_ICHAPIC 17
SEL2 SEL1 SEL0 CPUCLKC[0..2] CPUCLKT[0..2] R351
1 0 0 66.67 66.67 @51.1_1%

1
1 0 1 100.00 100.00
1 1 0 200.00 200.00 R35 R352 348_1%
1 1 1 133.33 133.33 137_1% 0_0603
0 ohm resistor for ICH3 doesn't
need to support APIC function.

2
4 4

Title
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 12 of 87
A B C D E
A B C D E

9,14 SM_DQ[0..63] MD[0..63] 9,14

SM_DQ0 MD0 SM_DQ32 MD32


SM_DQ1 MD1 SM_DQ33 MD33
SM_DQ2 MD2 SM_DQ34 MD34 Layout note :
1 SM_DQ3 MD3 SM_DQ35 MD35 1
One .1uF cap per power pin .
Place each cap close to SODIMM(DIMM 0) pin .
SM_DQ4 MD4 SM_DQ36 MD36
SM_DQ5 MD5 SM_DQ37 MD37
SM_DQ6 MD6 SM_DQ38 MD38
SM_DQ7 MD7 SM_DQ39 MD39 +3V

SM_DQ8 MD8 SM_DQ40 MD40

1
SM_DQ9 MD9 SM_DQ41 MD41 C167 C184 C169 C199 C195 C190 C188 C216 C203
SM_DQ10 MD10 SM_DQ42 MD42 C192 C168 C164 C170 C196 C194 C189 C209 C202
SM_DQ11 MD11 SM_DQ43 MD43 .1UF 1000PF .1UF 1000PF .1UF 1000PF .1UF 1000PF .1UF 1000PF .1UF 1000PF .1UF 1000PF .1UF 1000PF .1UF 1000PF

2
SM_DQ12 MD12 SM_DQ44 MD44 +3V
SM_DQ13 MD13 SM_DQ45 MD45
SM_DQ14 MD14 SM_DQ46 MD46

1
SM_DQ15 MD15 SM_DQ47 MD47
+ C119
22UF_16V_1206

2
SM_DQ16 MD16 SM_DQ48 MD48
SM_DQ17 MD17 SM_DQ49 MD49
SM_DQ18 MD18 SM_DQ50 MD50
SM_DQ19 MD19 SM_DQ51 MD51
2 2

SM_DQ20 MD20 SM_DQ52 MD52 Layout note :


SM_DQ21 MD21 SM_DQ53 MD53
SM_DQ22 MD22 SM_DQ54 MD54 One .1uF cap per power pin .
SM_DQ23 MD23 SM_DQ55 MD55
Place each cap close to SODIMM(DIMM 1) pin .

SM_DQ24 MD24 SM_DQ56 MD56


SM_DQ25 MD25 SM_DQ57 MD57 +3V
SM_DQ26 MD26 SM_DQ58 MD58
SM_DQ27 MD27 SM_DQ59 MD59

1
C212 C211 C205 C210 C207 C166 C221 C219 C217 C165 C214
SM_DQ28 MD28 SM_DQ60 MD60 C206 C222 C215 C220 C218 C160 C187
SM_DQ29 MD29 SM_DQ61 MD61 .1UF 1000PF .1UF 1000PF .1UF 1000PF .1UF 1000PF .1UF 1000PF .1UF 1000PF .1UF 1000PF .1UF 1000PF .1UF 1000PF

2
SM_DQ30 MD30 SM_DQ62 MD62
SM_DQ31 MD31 SM_DQ63 MD63

+3V

1
+ C126
22UF_16V_1206

2
3 3

9 SM_D_MA[0..12] MAA[0..12] 14

RP22
SM_D_MA0 1 8 MAA0
SM_D_MA1 2 7 MAA1
SM_D_MA2 3 6 MAA2
SM_D_MA3 4 5 MAA3

8P4R_10
RP21
SM_D_MA4 1 8 MAA4
SM_D_MA5 2 7 MAA5
SM_D_MA6 3 6 MAA6
SM_D_MA7 4 5 MAA7

8P4R_10
RP20
SM_D_MA8 1 8 MAA8
SM_D_MA9 2 7 MAA9
SM_D_MA10 3 6 MAA10
SM_D_MA11 4 5 MAA11
4 4
8P4R_10

SM_D_MA12 1 2 MAA12

R176 10

Title
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 13 of 87
A B C D E
A B C D E

+3V +3V +3V

SO-DIM 144 PINS


RAM MODULE CONN.
+3V
BANK 0/1 +3V
+
C142

10UF_10V_1206
+
C143

10UF_10V_1206
+
C132

10UF_10V_1206
BANK 2/3
+3V +3V

JP26 JP27
1 VSS VSS 2 1 VSS VSS 2
MD0 3 4 MD8 MD0 3 4 MD8
MD1 DQ0 DQ32 MD9 MD1 DQ0 DQ32 MD9
1 5 DQ1 DQ33 6 5 DQ1 DQ33 6 1
MD2 7 8 MD10 MD2 7 8 MD10
MD3 DQ2 DQ34 MD11 MD3 DQ2 DQ34 MD11
9 DQ3 DQ35 10 9 DQ3 DQ35 10
MAA[0..12] 11 12 11 12
13 MAA[0..12] VCC VCC VCC VCC
MD4 13 14 MD12 MD4 13 14 MD12
MD5 DQ4 DQ36 MD13 MD5 DQ4 DQ36 MD13
15 DQ5 DQ37 16 15 DQ5 DQ37 16
MD[0..63] MD6 17 18 MD14 MD6 17 18 MD14
9 MD[0..63] DQ6 DQ38 DQ6 DQ38
MD7 19 20 MD15 MD7 19 20 MD15
SM_DQM[0..7] DQ7 DQ39 DQ7 DQ39
9 SM_DQM[0..7] 21 VSS VSS 22 21 VSS VSS 22
SM_DQM0 23 24 SM_DQM1 SM_DQM0 23 24 SM_DQM1
SM_DQM4 CE0# CE4# SM_DQM5 SM_DQM4 CE0# CE4# SM_DQM5
25 CE1# CE5# 26 25 CE1# CE5# 26
27 VCC VCC 28 27 VCC VCC 28
MAA0 29 30 MAA3 MAA0 29 30 MAA3
MAA1 A0 A3 MAA4 MAA1 A0 A3 MAA4
31 A1 A4 32 31 A1 A4 32
MAA2 33 34 MAA5 MAA2 33 34 MAA5
A2 A5 A2 A5
35 VSS VSS 36 35 VSS VSS 36
MD32 37 38 MD40 MD32 37 38 MD40
MD33 DQ8 DQ40 MD41 MD33 DQ8 DQ40 MD41
39 DQ9 DQ41 40 39 DQ9 DQ41 40
MD34 41 42 MD42 MD34 41 42 MD42
MD35 DQ10 DQ42 MD43 MD35 DQ10 DQ42 MD43
43 DQ11 DQ43 44 43 DQ11 DQ43 44
45 VCC VCC 46 45 VCC VCC 46
MD36 47 48 MD44 MD36 47 48 MD44
MD37 DQ12 DQ44 MD45 MD37 DQ12 DQ44 MD45
49 DQ13 DQ45 50 49 DQ13 DQ45 50
MD38 51 52 MD46 MD38 51 52 MD46
MD39 DQ14 DQ46 MD47 MD39 DQ14 DQ46 MD47
53 DQ15 DQ47 54 53 DQ15 DQ47 54
55 VSS VSS 56 55 VSS VSS 56
C204 R174 57 58 C163 R162 57 58
RESVD/DQ64 RESVD/DQ68 RESVD/DQ64 RESVD/DQ68
59 RESVD/DQ65 RESVD/DQ69 60 59 RESVD/DQ65 RESVD/DQ69 60
2 10PF 22 10PF 22 2
61 62 SM_CKE0 61 62 SM_CKE2
9 SMD_CLK0 RFU/CLK0 RFU/CKE0 SM_CKE0 9 9 SMD_CLK2 RFU/CLK0 RFU/CKE0 SM_CKE2 9
63 VCC VCC 64 63 VCC VCC 64
SM_RAS# 65 66 SM_CAS# SM_RAS# 65 66 SM_CAS#
9 SM_RAS# RFU RFU RFU RFU SM_CAS# 9
SM_WE# 67 68 SM_CKE1 SM_WE# 67 68 SM_CKE3
9 SM_WE# WE# RFU/CKE1 SM_CKE1 9 WE# RFU/CKE1 SM_CKE3 9
SM_CS#0 69 70 MAA12 SM_CS#2 69 70 MAA12
9 SM_CS#0 SM_CS#1 RE0# RFU 9 SM_CS#2 SM_CS#3 RE0# RFU
9 SM_CS#1 71 RE1# RFU 72 9 SM_CS#3 71 RE1# RFU 72
73 OE#/RESVD RFU/CLK1 74 SMD_CLK1 9 73 OE#/RESVD RFU/CLK1 74 SMD_CLK3 9
75 VSS VSS 76 75 VSS VSS 76
77 RESVD/DQ66 RESVD/DQ70 78 77 RESVD/DQ66 RESVD/DQ70 78
79 RESVD/DQ67 RESVD/DQ71 80 79 RESVD/DQ67 RESVD/DQ71 80
81 82 R175 81 82 R170
MD16 VCC VCC MD24 22 MD16 VCC VCC MD24 22
83 DQ16 DQ48 84 83 DQ16 DQ48 84
MD17 85 86 MD25 MD17 85 86 MD25
MD18 DQ17 DQ49 MD26 MD18 DQ17 DQ49 MD26
87 DQ18 DQ50 88 87 DQ18 DQ50 88
MD19 89 90 MD27 MD19 89 90 MD27
DQ19 DQ51 DQ19 DQ51
91 VSS VSS 92 91 VSS VSS 92
MD20 93 94 MD28 C223 MD20 93 94 MD28 C193
MD21 DQ20 DQ52 MD29 10PF MD21 DQ20 DQ52 MD29 10PF
95 DQ21 DQ53 96 95 DQ21 DQ53 96
MD22 97 98 MD30 MD22 97 98 MD30
MD23 DQ22 DQ54 MD31 MD23 DQ22 DQ54 MD31
99 DQ23 DQ55 100 99 DQ23 DQ55 100
101 VCC VCC 102 101 VCC VCC 102
MAA6 103 104 MAA7 MAA6 103 104 MAA7
MAA8 A6 A7 SM_BA0 MAA8 A6 A7 SM_BA0
105 A8 A11/BA0 106 SM_BA0 9 105 A8 A11/BA0 106
107 VSS VSS 108 107 VSS VSS 108
MAA9 109 110 SM_BA1 MAA9 109 110 SM_BA1
A9 A12/BA1 SM_BA1 9 A9 A12/BA1
MAA10 111 112 MAA11 MAA10 111 112 MAA11
A10 A13/A11 A10 A13/A11
113 VCC VCC 114 113 VCC VCC 114
SM_DQM2 115 116 SM_DQM3 SM_DQM2 115 116 SM_DQM3
3 SM_DQM6 CE2#/RESVD CE6#/RESVD SM_DQM7 SM_DQM6 CE2#/RESVD CE6#/RESVD SM_DQM7 3
117 CE3#/RESVD CE7#/RESVD 118 117 CE3#/RESVD CE7#/RESVD 118
119 VSS VSS 120 119 VSS VSS 120
MD48 121 122 MD56 MD48 121 122 MD56
MD49 DQ24 DQ56 MD57 MD49 DQ24 DQ56 MD57
123 DQ25 DQ57 124 123 DQ25 DQ57 124
MD50 125 126 MD58 MD50 125 126 MD58
MD51 DQ26 DQ58 MD59 MD51 DQ26 DQ58 MD59
127 DQ27 DQ59 128 127 DQ27 DQ59 128
129 VCC VCC 130 129 VCC VCC 130
MD52 131 132 MD60 MD52 131 132 MD60
MD53 DQ28 DQ60 MD61 MD53 DQ28 DQ60 MD61
133 DQ29 DQ61 134 133 DQ29 DQ61 134
MD54 135 136 MD62 MD54 135 136 MD62
MD55 DQ30 DQ62 MD63 MD55 DQ30 DQ62 MD63
137 DQ31 DQ63 138 137 DQ31 DQ63 138
139 VSS VSS 140 139 VSS VSS 140
SDADIMM0 141 142 SCKDIMM0 +3V SDADIMM1 141 142 SCKDIMM1
SDA SCL C230 SDA SCL
143 VCC VCC 144 143 VCC VCC 144

SO-DIMM144-STANDRD SO-DIMM144 REVERSE


.1UF
U18
16

DIMM0 6 1 SCKDIMM0
DIMM1
VCC

INH X0 SCKDIMM1
17 SM_SEL0 10 A X1 5
9 B X2 2
X3 4

7,12,17 SMB_CLK 3 X
12 SDADIMM0
Y0 SDADIMM1
7,12,17 SMB_DATA 13 Y Y1 14
15
GND
GND

Y2
4 Y3 11 4

74HC4052 SM_SEL0 X/Y


7
8

0 SCKDIMM0
+3V 1 SCKDIMM1
RP4
SCKDIMM1
Compal Electronics, inc.
1 8
2 7 SCKDIMM0 Title
SDADIMM1
3
4
6
5 SDADIMM0 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
8P4R_10K R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 14 of 87
A B C D E
5 4 3 2 1

KSI[0..7]
33 KSI[0..7]
KS0[0..15]
33 KSO[0..15] Int. Keyboard CONN.
JP11
AGP CONN. 17,23,24,29 RTCCLK 1 2 +12V
+3V 3 4 +3V
5 6
JP8 7 8
RP38 +2.5V
KSI0 9 10 KSI1
D
16 AGP_R 1 1 2 2 CRMA 16 1 8 PID0 25 11 12 D
3 4 2 7 KSI2 KSI3
16 AGP_G 3 4 LUMA 16 PID1 25 13 14
5 6 3 6 KSI4 KSI5
16 AGP_B 5 6 COMPS 16 PID2 25 15 16
7 8 4 5 KSI6 KSI7
16 AGP_HSYNC1 7 8 TV_SYNC 16 PID3 25 17 18
9 10 TVOUT_IO_DDC2CLK KSO0 KSO1
16 AGP_VSYNC1 9 10 TVOUT_IO_DDC2DATA 19 20
11 12 @8P4R_0 In AGP mode : stuff RP38, no stuff RP39. KSO2 KSO3
10,16 AGP_DDCDATA 11 12 VCH_IO_I2CCLK In VCH mode: stuff RP39, no stuff RP38. KSO4 21 22 KSO5
10,16 AGP_DDCCLK 13 13 14 14 23 24
15 16 VCH_IO_I2CDATA RP39 KSO6 KSO7
16 DDC_MD2 15 16 25 26
17 18 INVT_PWM 1 8 KSO8 KSO9
16,18 M_SEN# 17 18 INVT_PWM 33 TV_OUT_DDC2CLK 10 27 28
19 20 2 7 KSO10 KSO11
+5VALW 19 20 +5VALW TV_OUT_DDC2DATA 10 29 30
DAC_BRIG 21 22 ENBKL 3 6 KSO12 KSO13
33 DAC_BRIG 21 22 ENBKL 33 VCH_I2CCLK 10 31 32
23 24 ENVEE 4 5 KSO14 KSO15
21,22,23,24,28,29 CBRST# 23 24 ENVEE 33 VCH_I2CDATA 10 33 34
+1.5V 25 25 26 26 +1.5V +3VS 35 36 +5V
27 28 8P4R_0
27 28 +5VS 37 38
+1.5VS 29 29 30 30 +1.5VS 33 TP_DATA 39 40 TP_CLK 33
31 31 32 32
17,21,25,35 SUS_STAT# 33 34 PIRQA# 17,19,22,23 HEADER 2X20
33 34 PCI_RST#
10,17 AGP_BUSY# 35 35 36 36 PCIRST# 8,17,19,20,21,22,23,24,25,28,29,35
10 AGP_REQ# 37 37 38 38 AGP_GNT# 10
10 AGP_ST0 39 39 40 40 AGP_ST1 10
10 AGP_ST2 41 41 42 42 AGP_PIPE# 10
10 AGP_RBF# 43 43 44 44 AGP_WBF# 10
45 45 46 46
AGP_SBA0 47 48 AGP_SBA1
AGP_SBA2 47 48 AGP_SBA3
49 49 50 50
10 AGP_SBSTB 51 51 52 52 AGP_SBSTB# 10
AGP_SBA4 53 54 AGP_SBA5 +1.5V +3.3VAUX +3VS_MDC +5VS_MDC
AGP_SBA6 53 54 AGP_SBA7
55 55 56 56
AGP_CLK 57 58
12 CLK_AGPCONN 57 58

1
C 59 60 + C101 C146 C145 C159 C
59 60 AGP_CBE#3 10
AGP_AD31 61 62 AGP_AD30
AGP_AD29 61 62 AGP_AD28 22UF_16V_1206 1UF_25V_0805 1UF_25V_0805 1UF_25V_0805
63 64

2
AGP_AD27 63 64 AGP_AD26
65 65 66 66
AGP_AD25 67 68 AGP_AD24
67 68
69 69 70 70
10 AGP_ADSTB1 71 71 72 72 AGP_ADSTB#1 10
73 73 74 74
AGP_AD23 75 76 AGP_AD22
AGP_AD21 75 76 AGP_AD20
77 77 78 78
AGP_AD19 79 80 AGP_AD18
AGP_AD17 79 80 AGP_AD16
81 81 82 82
10 AGP_CBE#2 83 83 84 84
CLK_VCH 85 86 AGP_FRAME#
12 CLK_VCH 85 86 AGP_FRAME# 10
AGP_IRDY# 87 88
10 AGP_IRDY# 87 88 AGP_TRDY# 10
AGP_DEVSEL# 89 90
10 AGP_DEVSEL# 89 90 AGP_STOP# 10 JP13
91 91 92 92 AGP_PAR 10
10 AGP_CBE#1 93 93 94 94
AGP_AD14 95 96 AGP_AD15 1 2
95 96 31 MD_MIC MONO_OUT/PC_BEEP AUDIO_PWDN MDC_DN# 34
AGP_AD12 97 98 AGP_AD13 3 4
97 98 GND MONO_PHONE MD_SPK 31
AGP_AD10 99 100 AGP_AD11 5 6
AGP_AD8 99 100 AGP_AD9 AUXA_RIGHT RESERVED
101 101 102 102 7 AUXA_LEFT GND 8
103 104 9 10 +5VS_MDC1 2
103 104 CD_GND +5V +5VS
10 AGP_ADSTB0 105 105 106 106 AGP_ADSTB#0 10 11 CD_RIGHT RESERVED 12
107 108 13 14 L41 CHB1608B121
STP_AGP# 107 108 CD_LEFT RESERVED
109 109 110 110 AGP_CBE#0 10 15 GND RESERVED 16 1 2 +3VS
AGP_AD7 111 112 AGP_AD6 17 18
AGP_AD5 111 112 AGP_AD4 +3.3VAUX L39 3.3Vaux RESERVED R388 10K
113 113 114 114 19 GND RESERVED 20
AGP_AD3 115 116 AGP_AD2 1 2 +3VS_MDC 21 22
B 115 116 +3VS 3.3Vmain AC97_SYNC IAC_SYNC 17,31 B
AGP_AD1 117 118 AGP_AD0 CHB1608B121 23 24 1 2
+VAGP_BRDREF 119
117
119
118
120 120 +VAGP_CRDREF
17,31 IAC_SDATAO
17,31 IAC_RST# 25
27
AC97_SDATA_OUT AC97_SDATA_IN1
AC97_RESET#
GND
AC97_SDATA_IN0
GND
26
28
R548
1
22
2
* IAC_SDATAI1 17
29 30 R383 @22
HEADER 2X60 AC97_MSTRCLK AC97_BITCLK
* 1 2
R381 @10K
AGP_AD[0..31] AMP-108-5424
10 AGP_AD[0..31] +3V
MDC CONN. 1 2
AGP_SBA[0..7] C727 IAC_BITCLK 17,31
10 AGP_SBA[0..7] R378 22
1 2
R104 C112
AGP_CLK 1 2 1 2 .1UF U60
5

@33 @15PF 1
17,21,25,35 SUS_STAT# 4 STP_AGP#
R120 C125
17 C3_STAT# 2
CLK_VCH 1 2 1 2
3

@33 @15PF @7SH08FU

1 2
R544 0

A A

Compal Electronics, inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 15 of 87
5 4 3 2 1
A B C D E

TV_OUT CONN.
@DAN217 @DAN217 @DAN217
D11 D10 D9

1
R559 For CH7011
1 2 +3VS
R559 @0

3
1 1 2 +5VS 1
L17
R560 @0 R560 For CH7007
15 TV_SYNC 1 2
@FBM-11-160808-121 L21 JP2
1 2 1
15 LUMA @FBM-11-160808-121
2
L20 3
15 CRMA 1 2 4
@FBM-11-160808-121
L22 5
6
15 COMPS 1 2 7
@FBM-11-160808-121
@S CONN._SUYIN
1

1
R220 R218 R219 C293 C291 C292 C261 C270 C269
C262
@75 @75
@75 @47PF @47PF @47PF @47PF @47PF @47PF @470PF
2

2
2

TV_GND

In AGP mode: No stuff C326,R245,C318,R231,C325,R230.


2 In VCH mode: Stuff C326,R245,C318,R231,C325,R230 2

C326 .1UF *
1 2

R245 37.5_1% *
10 DAC_RED# 1 2

C318 .1UF *
1 2
R231 37.5_1% *
10 DAC_GREEN# 1 2

C325 .1UF *
1 2
R230 37.5_1% *
10 DAC_BLUE# 1 2

+5VS

+5VS +5VS
CRT Connector
1

R_CRT_VCC CRT_VCC
3 R86 D8 F1 3
1

1
D7 D6 D5 2 1 1 2
10K

1
In AGP mode: No stuff R6,R8,R10,R12,R14. Stuff R9,R11,R13,R549,R550 FUSE_1A
RB491D
2

In VCH mode: Stuff R6,R8,R10,R12,R14. No stuff R9,R11,R13,R549,R550


C5

2
DAN217 DAN217 DAN217 .1UF JP3
15 DDC_MD2
2

3
CRT-15P
In AGP mode: Stuff R16,R15,R7. No stuff R553,R554,R555.
15,18 M_SEN#
L10 6 In VCH mode: Stuff R553,R554,R555. No stuff R16,R15,R7
R14 1 2 0 11 CRT_VCC
10 DAC_RED R13 CRT_VCC
15 AGP_R 1 2 @0 1 2 1
FCM2012C80_0805 7 +12VS +3VS +5VS +5VS
R12 1 2 0 L11 12
10 DAC_GREEN R11
15 AGP_G 1 2 @0 1 2 2

1
FCM2012C80_0805 8

1
R10 1 2 0 L12 13 R16
10 DAC_BLUE R9
15 AGP_B 1 2 @0 1 2 3 R553 R554 R555
FCM2012C80_0805 CRT_VCC 9 2.2K 2.2K 100K @2.2K R15 R7
2

14 @2.2K @2.2K

2
1

R199 C265 R200 C264 R201 C266 C256 C255 C254 4

2
75 18PF 75 18PF 75 18PF 10
2

15PF 15PF 15PF 15


2

C253 5
1

2
100PF
AGP_DDCDATA 10,15
2

@0 L1
R549 3 1 1 2 5VDDCDA 1 3
15 AGP_HSYNC1

2
Q18 CHB1608B121 Q1 2N7002
2N7002 5VDDCCL
4 4
FROM AGP CONN. L2 1 3 AGP_DDCCLK 10,15
2

R550 @0 C2 Q3 2N7002
15 AGP_VSYNC1 3 1 1 2
CHB1608B121 220PF C252
1

Q17 220PF
2

R202 100K 2N7002 C3 C4 C250


Compal Electronics, inc.
2

68PF 68PF 100PF


+12VS
2

*10PF *10PF
R6 0 Title
10 DAC_HSYNC 1
*
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
FROM GMCH 1 2 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
10 DAC_VSYNC R8 0 R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 16 of 87
A B C D E
A B C D

RP15
1 8 ICH_PID0
36 ICH_VGATE LPC_AD0 25,33
ECSMI# 2 7 ICH_PID1
19 ECSMI# 5,19 PM_CPUPERF# LPC_AD1 25,33
ECSCI# 3 6 ICH_PID2

IAC_SDATAO
19 ECSCI# 7,43 PM_GMUXSEL LPC_AD2 25,33 +3VS
LID# 4 5 ICH_PID3
19 LID# 33 ATF_INT# LPC_AD3 25,33

IAC_SYNC
IDE_PATADET
20 IDE_PATADET 15,21,25,35 SUS_STAT# LPC_DRQ#0 19,33

0
R60 0 8P4R_4.7K
12 PM_STPPCI# LPC_DRQ#1 19,25
5,23,24,29 RTCCLK 2 1 PM_SUSCLK 12 PM_STPCPU#
C60
LPC_FRAME# 25,33

PIDEPWR
R65 @10K
33 PM_SLP_S5#
IAC_BITCLK GNTA# 1 2
15,31 IAC_BITCLK 12,33 PM_SLP_S3# SM_SEL0 14 +3VS

1
10K
IAC_RST# GPIO_25 1 2
15,31 IAC_RST# 12,33 PM_SLP_S1# SIDEPWR 20 +3V

2 47
2 47
IAC_SDATAI0 PM_RSMRST# R72 R54 10K
31 IAC_SDATAI0 36 PM_RSMRST# CLK_ICHAPIC 12 Place closely to ICH3-M
IAC_SDATAI1 1 2
15 IAC_SDATAI1 19 ICH_RI# H_PICD0 5
1 IAC_SDATAO 0 R37 CLK_ICHAPIC 1
15,31 IAC_SDATAO 36 SYS_PWROK H_PICD1 5
I AC_SYNC

CLK_ICHAPIC
IAC_BITCLK 2
15,31 IAC_SYNC 19 PBTN#

2
IAC_SDATAI0
IAC_SDATAI1

IDE_PATADET
PM_SUSCLK
7,43 PM_DPRSLPVR R342

ICH_PID0
ICH_PID1
ICH_PID2
ICH_PID3
IAC_RST#
INT_IRQ14 19,20

H_PICD0
H_PICD1
19,22,23,25,28,29,33 PM_CLKRUN# @33_0402

PIRQC#
PIRQD#
PIRQA#
PIRQB#
INT_IRQ15 19,30

1
1
15 C3_STAT#

ECSCI#
ECSMI#

GPIO_25
33 PM_BATLOW# INT_SERIRQ 19,23,25,33
PM_LANPWROK

LID#

1
R70
R69
10,15 AGP_BUSY#
C540

AB21

AB14
PIRQA# @10PF

W20

W19
AC2
AB3

AB1
AA6
AA1
AA7

AA5
AA2

AA4
AB4
U21

U20

D11

C11

H22
V21

Y20
V19

B11
PIRQA# 15,19,22,23

J19
J20
J21
W2

W3
W4
U5

C7

U3

U2

U4
U1

C1

C5
PIRQB#

V4
Y5

V5

B7

A7

V1

V2

Y4
Y2

Y3

B1

B2
A2
A6
B5

A5
T3

T2
U33A PIRQC# PIRQB# 19,21,23
21,22,23,28,29 PCI_AD[0..31] PIRQD# PIRQC# 19,28,29

INT_APICCLK
PM_AUXPWROK

PM_PWROK

PM_SUS_CLK

AC_BITCLK
PM_AGPBUSY#/GPIO6

PM_BATLOW#

PM_GMUXSEL/GPIO23

AC_SDATAOUT

GPIO_7
GPIO_8
GPIO_12
GPIO_13
GPIO_25
GPIO_27
GPIO_28

INT_APICD0
INT_APICD1
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
INT_PIRQE#/GPIO2
INT_PIRQF#/GPIO3
INT_PIRQG#/GPIO4
PM_C3_STAT#/GPIO21
PM_CLKRUN#/GPIO24

PM_PWRBTN#

PM_RSMRST#
PM_RI#

PM_SLP_S1#/GPIO19
PM_SLP_S3#
PM_SLP_S5#
PM_STPCPU#/GPIO20
PM_STPPCI#/GPIO18

PM_SUS_STAT#
PM_THRM#

PM_CPUPREF#/GPIO22

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_FRAME#
LPC_DRQ#0
LPC_DRQ#1

INT_PIRQH#/GPIO5
INT_IRQ14
INT_IRQ15
INT_SERIRQ
PM_DPRSLPVR

PM_VGATE/VRMPWRGD

AC_RST#
AC_SDATAIN0
AC_SDATAIN1

AC_SYNC
PIRQD# 19,28,29
CLK_ICHPCI

1
PCI_AD0 J2 T5 CLK_ICHPCI R66
PCI_AD0 PCI_CLK CLK_ICHPCI 12
PCI_AD1 K1 M3
PCI_AD1 PCI_DEVSEL# PCI_DEVSEL# 19,21,22,23,28,29
PCI_AD2 J4 F1 @10
PCI_AD2 PCI_FRAME# PCI_FRAME# 19,21,22,23,28,29
PCI_AD3 K3 C4 PCI_REQA# 19

1 2
PCI_AD4 PCI_AD3 PCI_GPIO0/REQA#
H5 PCI_AD4 PCI_GPIO1/REQB#/REQ5# D4 PCI_REQB# 19
PCI_AD5 K4 AC'97 LPC unMUX Interrupt B6 GNTA# C42
PCI_AD6 PCI_AD5 PCI_GPIO16/GNTA#
H3 PCI_AD6 Power Management Geyserville Interface Interface GPIO Interface PCI_GPIO17/GNTB#/GNT5# B3
PCI_AD7 L1 N3 @15PF
PCI_IRDY# 19,21,22,23,28,29

2
PCI_AD8 PCI_AD7 PCI_IRDY#
L2 PCI_AD8 PCI_PAR G5 PCI_PAR 19,21,22,23,28,29
PCI_AD9 G2 M2
PCI_AD9 PCI_PERR# PCI_PERR# 19,21,22,23,28
PCI_AD10 L4 M1
PCI_AD10 PCI_LOCK# PCI_LOCK# 19
PCI_AD11 H4 PCI W1
PCI_AD11 PCI_PME# ICH_WAKE_UP# 33
2 PCI_AD12 M4 Interface Y1 2
PCI_AD13 PCI_AD12 PCI_RST# PCIRST# 8,15,19,20,21,22,23,24,25,28,29,35
J3 PCI_AD13 PCI_SERR# L5 PCI_SERR# 19,21,22,23,28
PCI_AD14 M5 H2
PCI_AD14 STOP# PCI_STOP# 19,21,22,23,28,29
PCI_AD15 J1 H1
PCI_AD15 PCI_TRDY# PCI_TRDY# 19,21,22,23,28,29
PCI_AD16 F5
PCI_AD17 PCI_AD16 +1.5VS
N2 PCI_AD17
PCI_AD18 G4 Y6
PCI_AD18 SM_INTRUDER# SM_INTRUDER# 19
PCI_AD19 P2 AC3
PCI_AD19 SMLINK0 SMLINK0 19
PCI_AD20 G1 AB2
PCI_AD20 System SMLINK1 SMLINK1 19

1
PCI_AD21 P1 Managment SMB_CLK AC4
Place closely to ICH3-M PCI_AD21 SMB_CLK 7,12,14
PCI_AD22 F2 AB5 R327 (for use if CPU unable
PCI_AD23 PCI_AD22 Interface SMB_DATA SMB_DATA 7,12,14
@10K to support DPSLP#)
P3 PCI_AD23 SMB_ALERT#/GPIO11 AC5 SMB_ALERT# 19
CLK_ICH14 PCI_AD24 F3 PCI
PCI_AD25 R1
PCI_AD24
Interface
ICH3-M (1/2)

2
PCI_AD25
1

PCI_AD26 E2 Y22
PCI_AD26 CPU_A20GATE GATEA20 33
R337 PCI_AD27 N4 V23
PCI_AD27 CPU_A20M# H_A20M# 5
PCI_AD28 D1 AB22 1 2
@10 PCI_AD29 PCI_AD28 CPU_DPSLP# H_DPSLP# 5,43
P4 PCI_AD29 CPU_FERR# J22 H_FERR# 5
PCI_AD30 E1 AA21 R332 0
H_IGNNE# 5
1 2

PCI_AD31 PCI_AD30 CPU_IGNNE#


P5 PCI_AD31 CPU_INIT# AB23 H_INIT# 5
C541 CPU AA23
CPU_INTR H_INTR 5
Interface CPU_NMI Y21 H_NMI 5
@15PF K2 W23
21,22,23,28,29 PCI_C/BE#0 H_PW RGD 5
2

PCI_C/BE#0 CPU_PWRGOOD
21,22,23,28,29 PCI_C/BE#1 K5 PCI_C/BE#1 CPU_RCIN# U22 RC# 33
21,22,23,28,29 PCI_C/BE#2 N1 PCI_C/BE#2 CPU_SLP# W21
21,22,23,28,29 PCI_C/BE#3 R2 PCI_C/BE#3 CPU_SMI# Y23 H_SMI# 5
CLK_ICH48 U23
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL STPCLK# H_STPCLK# 5
1

A4 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
3 19,22 PCI_GNT#0 PCI_GNT#0 R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS 3
R340 E3 L22 HUB_PD0
19,28 PCI_GNT#1 PCI_GNT#1 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. HUB_PD0
D2 M21 HUB_PD1 H_PICD0
19,23 PCI_GNT#2 PCI_GNT#2 HUB_PD1
@10 D5 M23 HUB_PD2 H_PICD1
19,21 PCI_GNT#3 PCI_GNT#3 HUB_PD2
B4 N20 HUB_PD3
1 2

19,28 PCI_GNT#4 PCI_GNT#4 HUB_PD3

1
P21 HUB_PD4
C534 HUB_PD4 HUB_PD5
HUB_PD5 R22
D3 R20 HUB_PD6 R338 R339
19,22 PCI_REQ#0 PCI_REQ#0 HUB_PD6
@15PF F4 VSS Clocks LAN EEPROM HubLink T23 HUB_PD7 1K 1K
19,28 PCI_REQ#1
2

PCI_REQ#1 HUB_PD7 HUB_PD8


19,23 PCI_REQ#2 A3 Interface Interface Interface M19

2
PCI_REQ#2 HUB_PD8 HUB_PD9
19,21 PCI_REQ#3 R4 PCI_REQ#3 HUB_PD9 P19
E4 N19 HUB_PD10
19,28 PCI_REQ#4 PCI_REQ#4 HUB_PD10

LAN_RSTSYNC

HUB_VSWING

HUB_PSTRB#
HUB_RCOMP
CLK_RTEST#

HUB_PSTRB
HUB_PD[0..10]

EEP_SHCLK
CLK_RTCX1
CLK_RTCX2
CLK_VBIAS

EEP_DOUT

HUB_VREF
LAN_RXD2
LAN_RXD1
LAN_RXD0
HUB_PD[0..10] 8

LAN_TXD2
LAN_TXD1
LAN_TXD0
LAN_JCLK

HUB_PAR
HUB_CLK
EEP_DIN
EEP_CS
CLK_14
CLK_48
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34

CLK_ICHHUB
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9

+VS_HUBREF

2
+VS_HUBVSWING R344
ICH3-M
A1
A13
A16
A17
A20
A23
B8
B10
B13
B14
B15
B18
B19
B20
B22
C3
C6
F19
C14
C15
C16
C17
C18
C19
C20
C21
C22
D9
D13
D16
D17
D20
D21
D22
E5

J23
F20
RTC_RST# Y7
RTC_X1 AC7
RTC_X2 AC6
AB7

D7
C9
A10
C10
B9
A9
A8
C8

D10
E8
D8
E9

L19
L20
K19
P23
N22
R19
T19
10
RTC_VBIAS

CLK_ICHHUB
CLK_ICHHUB 12

1
CLK_ICH14 HUB_PSTRB 8 C543
12 CLK_ICH14 HUB_PSTRB# 8
CLK_ICH48 HUB_ICH_RCOMP 1 2 5PF
12 CLK_ICH48
R346 36.5_1%
1

R287 1K C426 1 2
+RTCVCC
1 2 1 2 RTC_VBIAS R77
+RTCVCC

1
R286 15K @0
1

4 4
.047UF RTC_X1 C530 C529
C416 J1
1 2 1 2 1 2 RTC_X2 .01UF .01UF
JOPEN
2

2
1UF_10V_0603
2

Close to ICH3-M.
R521 22M R295 10M R294 10M
1

X2 PM_LANPWROK
R522 R278 100K
1K R59 C44 Compal Electronics, inc.
1

2.4M C461 32.768KHZ C444 1 2 1 2 Title


+3V
SCHEMATIC, M/B LA-1371
2

12PF 12PF
2

R67 10K .1UF Size Document Number Rev


PM_RSMRST# 1 Custom 1B
2 401208
Date: 星期一, 四月 07, 2003 Sheet 17 of 87
A B C D
A B C D E

CLOSE TO ICH3-M(< 1 inch)


C508 @5PF +3V
+5VS +3VS
1 2
USB_D_PP1
27 USB_PP1

1
USB_D_PN1
27 USB_PN1
USB_D_PP0 R73 D26 R305
27 USB_PP0
USB_D_PN0 1K 1SS355 0
27 USB_PN0
+V5S_ICHREF

2
1 2
1 1
C509 @5PF VCC5REF

1
1

1
C91 @5PF C492
1 2 C58 C455 .1UF

2
.1UF 1UF_10V_0603

VCC5REFSUS
USB_D_PP3
27 USB_PP3
USB_D_PN3 +1.8V
27 USB_PN3
USB_D_PP2 +3V
27 USB_PP2 +1.8V +V1.8_ICHLAN
USB_D_PN2 +1.5VS
27 USB_PN2

1
L33
R320 +RTCVCC
1 2 1 2

1
1 2 0_0805 R341
CHB2012U170 0_0805 +3VS +1.8VS
C197 @5PF R298 +1.8VA_ICH

2
0_0805
C86 @5PF

2
1 2

M10

M14
G18
AB6

C13

U18

C23

H18

R18
E13

K12
P10

K10

P14

V22

B23

A21
A22

P12
V15
V16
V17
V18

E11

K18

P18
V10
V14
F14

F15
F16

F10

T21

T18
J18
W8

W5

G6
D6

C2

H6

R6

U6
USB_D_PP4

V6
V7

E6

E7

K6

P6
F7
F8

F9

T1

F6

T6
J6
USB_PP4 U33B
USB_D_PN4
USB_PN4

VCC_SUS0
VCC_SUS1
VCC_SUS2
VCC_SUS3
VCC_SUS4
VCC_SUS5

VCC_USB0/VCC_SUS6
VCC_USB1/VCC_SUS7

VCC_AUX0/VCCLAN1_8
VCC_AUX1/VCCLAN1_8
VCC_AUX2/VCCLAN1_8

VCC5REF1
VCC5REF2

VCC5REFSUS1
VCC5REFSUS2

N/C0
N/C1
N/C2
N/C3
N/C4

VSS102
VSS103

VCCPPCI0
VCCPPCI1
VCCPPCI2
VCCPPCI3
VCCPPCI4
VCCPPCI5
VCCPPCI6
VCCPPCI7

VCCP0
VCCP1

VCCPIDE0
VCCPIDE1
VCCPIDE2
VCCPIDE3
VCCPIDE4

VCCPHL0
VCCPHL1
VCCPHL2
VCCPHL3

VCCCORE0
VCCCORE1
VCCCORE2
VCCCORE3
VCCCORE4
VCCCORE5
VCCCORE6
VCC_RTC

VCCPAUX0/VCCLAN3_3
VCCPAUX1/VCCLAN3_3

VCCPCPU0
VCCPCPU1
VCCPCPU2

VCCUSBBG/VCC_SUS8

VCCUSBPLL/VCC_SUS9
IDE_PDCS1# AC15 IDE_PDCS1# 20
+3V RP19 AB15
8P4R_10K USB_D_PP0 IDE_PDCS3# IDE_PDCS3# 20
D19 USB_PP0 IDE_SDCS1# AC21 IDE_SDCS1# 30
2 USB_D_PP1 A19 AC22 2
USB_OC#2 USB_D_PP2 USB_PP1 IDE_SDCS3# IDE_SDCS3# 30
1 8 E17 USB_PP2
2 7 USB_D_PP3 B17 AA14
USB_OC#4 USB_D_PP4 USB_PP3 IDE_PDA0 IDE_PDA0 20
3 6 D15 USB_PP4 Power IDE_PDA1 AC14 IDE_PDA1 20
4 5 USB_OC#5 USB_PP5 A15 AA15
USB_D_PN0 USB_PP5 IDE_PDA2 IDE_PDA2 20
D18 USB_PN#0 IDE_SDA0 AC20 IDE_SDA0 30
USB_D_PN1 A18 AA19
USB_D_PN2 USB_PN#1 IDE_SDA1 IDE_SDA1 30
E16 USB_PN#2 IDE_SDA2 AB20 IDE_SDA2 30
USB_D_PN3 B16 USB_PN#3 IDE_PDD[0..15] 20
USB_D_PN4 D14 W12 IDE_PDD0
USB_PN5 USB_PN#4 IDE_PDD0 IDE_PDD1
A14 USB_PN#5 IDE_PDD1 AB11
AA10 IDE_PDD2
IDE_PDD2 IDE_PDD3
IDE_PDD3 AC10
USB_OC#0 E12 W11 IDE_PDD4
27 USB_OC#0 USB_OC#0 IDE_PDD4
USB_OC#1 D12 Y9 IDE_PDD5
27 USB_OC#1 USB_OC#1 IDE_PDD5
USB_OC#2 C12 AB9 IDE_PDD6
USB_OC#3 USB_OC#2 IDE_PDD6 IDE_PDD7
27 USB_OC#3 B12 USB_OC#3 IDE_PDD7 AA9
USB_OC#4 A12 USB AC9 IDE_PDD8
USB_OC#5 USB_OC#4 IDE_PDD8 IDE_PDD9
A11 USB_OC#5 Interface IDE_PDD9 Y10
W9 IDE_PDD10
IDE_PDD10 IDE_PDD11
IDE_PDD11 Y11
H20 AB10 IDE_PDD12
20 ICH_IDE_PRST# USB_LEDA#0/GPIO32 IDE_PDD12
G22 AC11 IDE_PDD13
20 ICH_IDE_SRST# USB_LEDA#1/GPIO33 IDE_PDD13
F21 AA11 IDE_PDD14
USB_LEDA#2/GPIO34 IDE_PDD14 IDE_PDD15
G19 AC12

ICH3-M (2/2)
USB_LEDA#3/GPIO35 IDE_PDD15 IDE_SDD[0..15] 30
R98 @0 E22 IDE
USB_LEDA#4/GPIO36 IDE_SDD0
1 2 E21 USB_LEDA#5/GPIO37 Interface IDE_SDD0 Y17
H21 W17 IDE_SDD1
USB_LEDG#0/GPIO38 IDE_SDD1 IDE_SDD2
19 FWH_WP# G23 USB_LEDG#1/GPIO39 IDE_SDD2 AC17
3 IDE_SDD3 3
19 FWH_TBL# F23 USB_LEDG#2/GPIO40 IDE_SDD3 AB16
G21 W16 IDE_SDD4
34 EC_FLASH# ICH_ACIN USB_LEDG#3/GPIO41 IDE_SDD4 IDE_SDD5
D23 USB_LEDG#4/GPIO42 IDE_SDD5 Y14
E23 AA13 IDE_SDD6
15,16 M_SEN# USB_LEDG#5/GPIO43 IDE_SDD6
W15 IDE_SDD7
IDE_SDD7 IDE_SDD8
IDE_SDD8 W13
USB_RBIAS B21 Y16 IDE_SDD9
USB_RBIAS IDE_SDD9 IDE_SDD10
IDE_SDD10 Y15
1

AC16 IDE_SDD11
R314 ICH_SPKR IDE_SDD11 IDE_SDD12
32 ICH_SPKR H23 SPKR Misc IDE_SDD12 AB17
18.2_1% AA17 IDE_SDD13
IDE_SDD13 IDE_SDD14
IDE_SDD14 Y18
U19 AC18 IDE_SDD15
2

+1.8VS VCCA IDE_SDD15


Power
IDE_PDDACK# Y13 IDE_PDDACK# 20
R309
+3V 1 2 F17 VCCPSUS3/VCCPUSB0 IDE_SDDACK# Y19 IDE_SDDACK# 30
0_0805 F18 VCCPSUS4/VCCPUSB1 IDE_PDDREQ AB12 IDE_PDDREQ 20
K14 VCCPSUS5/VCCPUSB2 IDE_SDDREQ AB18 IDE_SDDREQ 30
IDE_PDIOR# AC13 IDE_PDIOR# 20
VSS IDE_SDIOR# AC19 IDE_SDIOR# 30
Disable Timeout Feature E10 Y12
+V3A_ICH VCCPSUS0 IDE_PDIOW# IDE_PDIOW# 20
V8 VCCPSUS1 IDE_SDIOW# AA18 IDE_SDIOW# 30
1 2 ICH_SPKR V9 AB13
+3VS VCCPSUS2 IDE_PIORDY IDE_PIORDY 20
IDE_SIORDY AB19 IDE_SIORDY 30
R343

VSS100
VSS101
@1K
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
4 +3VS 4
ICH3-M
E14
E15
E18
E19
E20
F22
G3
G20
H19
AA22
J5
K11
K13
K20
K21
K22
K23
L3
L10
L11
L12
L13
L14
L21
L23
M11
M12
M13
M20
M22
N5
N10
N11
N12
N13
N14
N21
N23
P11
P13
P20
P22
R3
R5
R21
R23
T4
T20
T22
V3
AC23
V20
W6
W7
W10
W14
W18
W22
Y8
AA3
AA8
AA12
AA16
AA20
AB8
AC1
AC8
1

R326
100K

Title
Compal Electronics, inc.
2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
1 2 ICH_ACIN AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
33,35,38,41 ACIN D32 RB751V R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 18 of 87
A B C D E
A B C D E

+3VS +3VS

RP13
17,21,22,23,28,29 PCI_FRAME# 1 10
17,21,22,23,28,29 PCI_IRDY# 2 9 PCI_SERR# 17,21,22,23,28
17,21,22,23,28,29 PCI_TRDY# 3 8 PCI_DEVSEL# 17,21,22,23,28,29
17,21,22,23,28,29 PCI_STOP# 4 7 PCI_PERR# 17,21,22,23,28
5 6 PCI_LOCK# 17
10P8R_8.2K
1 1

+3VS +3VS +3VS

RP18 RP24
1 10 1 8 R71 1 2 @100
17 PCI_REQA# 18 FWH_WP# 17,21,22,23,28,29 PCI_PAR
17 PCI_REQB# 2 9 PCI_REQ#2 17,23 18 FWH_TBL# 2 7
17,22 PCI_REQ#0 3 8 PCI_REQ#3 17,21 17,22,23,25,28,29,33 PM_CLKRUN# 3 6
17,28 PCI_REQ#1 4 7 PCI_REQ#4 17,28 4 5
5 6 INT_SERIRQ 17,23,25,33
8P4R_10K
10P8R_8.2K
+3V
+3VS +3VS

RP14
17,28 PCI_GNT#1 1 10
2 9 R289 1 2 10K
17,23 PCI_GNT#2 INT_IRQ15 17,30 17 SMB_ALERT#
17,28,29 PIRQD# 3 8 PIRQA# 15,17,22,23
17,20 INT_IRQ14 4 7 PIRQB# 17,21,23
+V5S_ICHREF +1.5VS
5 6 PIRQC# 17,28,29
10P8R_8.2K
+3VS +3VS

1
1

1
1 2 R45 1 2 10K + +
17,22 PCI_GNT#0 17,33 LPC_DRQ#0
R57 8.2K C75 C49 C64 C84 C102 C110
1 2 1UF_10V_0603 .1UF .1UF 1UF_10V_0603 .1UF .1UF
17,21 PCI_GNT#3

2
2 R63 8.2K R56 1 2 10K 2
17,25 LPC_DRQ#1

17,28 PCI_GNT#4 1 2

R58 8.2K
+3V

+3VS
8,15,17,20,21,22,23,24,25,28,29,35 PCIRST# 1 2
R39 @8.2K
17 SMLINK0 1 2
R515 4.7K

1
17 SMLINK1 1 2

1
R516 4.7K + + C46 C56 C77 C89 C162
C362 C385 C51 C47 C50 C55 C57 C65 C93 C94 C87 C100 C103 C161 C73
22UF_16V_1206 22UF_16V_1206 .1UF .1UF 47PF .1UF .1UF 47PF .1UF .1UF 47PF .1UF .1UF .1UF 47PF .1UF .1UF 47PF .1UF .1UF

2
+RTCVCC

17 SM_INTRUDER# 1 2
R282 100K +3V
+V1.8_ICHLAN
R300 @10K
5,17 PM_CPUPERF# 1 2 +VTT
1

1
+ C487 C69 C63 C54
C341 C486 C485 C488
22UF_16V_1206 .1UF .1UF .1UF 47PF .1UF .1UF .1UF
2

2
3 PBTN# 3
33 PBTN_OUT# 1 2 PBTN# 17
D14 RB751V +1.8VS

33,35 ON/OFF 1 2
D15 @RB751V
1

1
+3V 1 2 +
R38 10K C317 C85 C52 C95 C96 C76 C98 C99
1 2 ICH_RI# 150UF_6.3V_D2 .1UF 47PF .1UF .1UF 47PF .1UF .1UF
33 EC_RIOUT# ICH_RI# 17
2

2
D13 RB751V

+3V 1 2
R47 10K +1.8VA_ICH
1 2 ECSMI#
33 EC_SMI# ECSMI# 17
D16 RB751V
+3V 1 2
1

R42 10K
1

1 2 ECSCI# +
33 EC_SCI# ECSCI# 17
D17 RB751V C527 C531 C532 C533
22UF_16V_1206 .1UF .1UF .1UF
2

+3V 1 2
R40 10K
1 2 LID# +V3A_ICH
33 EC_LID_OUT# LID# 17
D18 RB751V

C92 C82 C61 C66 C104 C68

.1UF .1UF .1UF .1UF .01UF .01UF


4 4

Title
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 19 of 87
A B C D E
+5VS
IDE,CD-ROM Module CONN.

+5VS HDD Manual ATA Type Selection:


C107

1
C109 C114
C518 ATA33 : populate R43, de-populate R46.
1000PF 10UF_16V_1206
1UF_25V_0805 .1UF ATA66/100 : populate R46, de-populate R43.

1
IDE_PDD[0..15] R43
18 IDE_PDD[0..15] Place component's closely IDE CONN. +5VCD Q9 +5VMOD
@10K SI3456DV
6

2
5 4
JP7
IDE_PATADET 17 2

1
PIDE_RST# 1
IDE_PDD7 1 2 IDE_PDD8 C174 R161
+
3 4

1
IDE_PDD6 IDE_PDD9 4.7UF_16V_1206

3
IDE_PDD5 5 6 IDE_PDD10 R46 <1st Part Field> 1K

2
IDE_PDD4 7 8 IDE_PDD11 +12VALW

2
IDE_PDD3 9 10 IDE_PDD12 10K
IDE_PDD2 11 12 IDE_PDD13

D2
R165

2
IDE_PDD1 13 14 IDE_PDD14
15 16 2 1

3
IDE_PDD0 IDE_PDD15 Q39
17 18

1
100K DTC144EKA 5 EXTIDE_EN#
IDE_PDDREQ 19 20
G2
18 IDE_PDDREQ 21 22

4
18 IDE_PDIOW# 23 24 47K Q41B
18 IDE_PDIOR# 25 26 34 EXTIDEPWR# 2

S2
IDE_PIORDY PCSEL 1 2 R412 1K SI1906DL
18 IDE_PIORDY 27 28 R84 470 C176

D1
18 IDE_PDDACK# INT_IRQ14 29 30 .01UF
17,19 INT_IRQ14 47K

2
31 32

6
18 IDE_PDA1 33 34 1 2
R556 @0 2
18 IDE_PDA0 IDE_PDA2 18 17 SIDEPWR

3
35 36 G1 Q41A
18 IDE_PDCS1# 37 38 IDE_PDCS3# 18
SI1906DL
34 PHDD_LED#

1
39 40
+5VS 41 42 +5VS

S1
+5VS 1 2 43 44
R95 100K
SI3456DV: N CHANNEL
VGS: 4.5V, RDS: 65 mOHM
1 2 SHDD_LED# HDD 44P SUYIN 20225A-44G5-A R75 10K R82 5.6K Id(MAX): 5.1A
+5VMOD
R167 100K 1 2 IDE_PDD7 1 2 IDE_PDDREQ VGS,+-20V
R152 5.6K
CDD[0..15] R429 10K 1 2 CD_DREQ
30 CDD[0..15]
1 2 CDD7

JP17 R88 1K
1 2 IDE_PIORDY
31 INT_CD_L 1 2 INT_CD_R 31 +3VS
CD_AGND CD_AGND
31 CD_AGND 3 4
CD_RSTDRV# CD D8 R428 1K
30 CD_RSTDRV# 5 6
CD D7 CD D9 1 2 CD_SIORDY
CD D6 7 8 CDD10 +5VMOD
CD D5 9 10 CDD11
CD D4 11 12 CDD12
CD D3 13 14 CDD13
CD D2 15 16 CDD14
CD D1 17 18 CDD15 +5VS
CD D0 19 20 CD_DREQ C140
21 22 CD_DREQ 30
23 24 CD_SIOR# 30 1 2
30 CD_SIOW# 25 26 CD_DACK# 30
CD _SIORDY .1UF U12
30 CD_SIORDY 27 28 CD_SBA2 30

5
CD_IRQ
30 CD_IRQ 29 30 CD_SCS3# 30
EXTID0 PCIRST# 1
30 CD_SBA1 31 32 EXTID0 34 8,15,17,19,21,22,23,24,25,28,29,35 PCIRST#
EXTID1 4 PIDE_RST#
30 CD_SBA0 33 34 EXTID1 34
EXTID2 2
30 CD_SCS1# 35 36 EXTID2 34 18 ICH_IDE_PRST#
SHDD_LED# HDSEL#
34 SHDD_LED# 37 38 HDSEL# 25
EXTCSEL

3
39 40 WGATE# 7SH08FU
41 42 WGATE# 25
RDATA# 43 44
25 RDATA# 45 46
WP#
25 WP# 47 48
TRACK0# FDD IR#
25 TRACK0# 49 50 FDDIR# 25
WDATA# 3MODE#
25 WDATA# 51 52 3MODE# 25
STEP#
25 STEP# 53 54 +5VS
MTR0#
25 MTR0# 55 56
DSKCHG# INDEX#
25 DSKCHG# 57 58 INDEX# 25
DRV0#
25,34 DRV0# 59 60 +5VMOD C139
HEADER 2X30 1 2
.1UF
+5VS +3VALW U13

5
RP2 RP3
8 1 DSKCHG# 1 8 EXTID0 PCIRST#1
7 2 INDEX# 2 7 EXTID1 4 SIDE_RST# 30
6 3 WP# 3 6 EXTID2 2
TRACK0# 18 ICH_IDE_SRST#
5 4 4 5

3
8P4R_1K 8P4R_100K 7SH08FU

1 2 DRV0#
R253 1K
W=80mils
RP1 +5VMOD
1

WDATA# 6 5 C186 C183 C182 C185


+5VS
WGATE# 7 4 STEP#
HDSEL# 8 3 MTR0# 1000PF 10UF_16V_1206 1UF_25V_0805 .1UF
2

FDD IR# 9 2 RDATA#


+5VS 10 1

10P8R_1K
Place component's closely CD-ROM CONN. Compal Electronics, inc.
Title
1 2 EXTCSEL SCHEMATIC, M/B LA-1371
R166 470 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 20 of 87
5 4 3 2 1

LAN_IDSEL +3V

AVDD-1 1 2
1 L28 4.7UH
R271
AVDD-2 1 2
100K L27 4.7UH
2

AVDD-3 1 2
L25 4.7UH

D C288 D
33 LAN_PME#

1
LAN_RD- C295 C306 C304 4.7UF_10V_1206
LAN_RD+
3

*BOM 16.9K_1% .1UF .1UF .1UF

2
2 Q24 LAN_TD-
34 EN_LAN#
LAN_TD+
2N7002
1

1
R241 LAN_X1
15,17,25,35 SUS_STAT#
1 2 Y2
+12VALW R217 LAN_X2 25 MHz
470K 1.69K_1% LAN_X1 LAN_X2
2

ACTIVITY#
LINK10_100#
+3VS 1 2

1
+2.5VLAN C312 C311

1
PCI_AD17 1 3 LAN_IDSEL R227 @1K +3VLAN +3V
18PF 18PF R52

2
Q23 R222 +3V For 3V LAN only 1 2
FDV301 @15K
0_1206

1
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
U6 R224
+3VLAN

ISOLATEB

PMEB
TXD+
LED0
LED1

LED2

RXIN+

RTSET
AVDD25

AVDD25

RTT2
RTT3

X1
X2

AVDD25

VCTRL

VDD25
NC

AVDD

GND

TXD-
AVDD

RXIN-
GND

GND

AVDD

GND

NC
NC
NC
5.6K
17,19,23 PIRQB# @0 1 2 R484 +3V

2
8,15,17,19,20,22,23,24,25,28,29,35 PCIRST# 0
15,22,23,24,28,29 CBRST# 1 2 R485 81 INTAB AUX 50 AUX U5

1
82 49 LAN_EECS 1 8 C348 C347 C367 C369 C332
CLK_PCI_LAN RSTB EECS LAN_EECLK CS VCC
12 CLK_PCI_LAN 83 CLK EESK 48 2 SK NC 7

1
C 84 47 LAN_EEDI 3 6 C21 .1UF 1000PF .1UF 1000PF .1UF C
17,19 PCI_GNT#3

2
GNTB EEDI LAN_EEDO DI NC
17,19 PCI_REQ#3 85 REQB EEDO 46 4 DO GND 5
PCI_AD31 86 45 PCI_AD0 .1UF

2
PCI_AD30 AD31 AD0 PCI_AD1 9346
87 AD30 AD1 44
+3VLAN 88 43 +2.5VLAN +2.5VLAN
PCI_AD29 GND GND PCI_AD2 +3VLAN
89 AD29 AD2 42
90 41 PCI_AD3
PCI_AD28 VDD AD3
91 AD28 VDD25 40

1
PCI_AD27 92 39 C368 C351 C371 C329 C349
PCI_AD26 AD27 VDD PCI_AD4
93 AD26 AD4 38
+2.5VLAN PCI_AD25 94 37 PCI_AD5 .1UF 1000PF .1UF 1000PF .1UF

2
PCI_AD24 AD25 AD5 PCI_AD6
95 AD24 AD6 36
96 VDD25 VDD25 35
97 VDD VDD 34
98 33 PCI_AD7
17,22,23,28,29 PCI_C/BE#3 CBE3B AD7
R2701 2 100 99 32
IDSEL CBE0B PCI_C/BE#0 17,22,23,28,29
1

LAN_IDSEL PCI_AD23 R187

DEVSELB
100 31

FRAMEB
C370 AD23 GND 510_0603 JP5

PERRB
SERRB
TRDYB

STOPB
CBE2B

CBE1B
VDD25

IRDYB
AD22

AD21
AD20
AD19

AD18
AD17
AD16

AD15
AD14
AD13
AD12
AD11
AD10
1 2 12
GND

GND
VDD

VDD
PAR
2

AD9
AD8
Amber LED+

1
.1UF C29 C333
4.7UF_10V_1206 11
.1UF Amber LED-
16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

2
SHLD4

1
RTL8100-L 8
Q20 PR4-
C SHLD3 15
10K
DTA114YKA 7 PR4+
PCI_FRAME#

ACTIVITY# 2
PCI_AD22

PCI_AD21
PCI_AD20
PCI_AD19

PCI_AD18
PCI_AD17
PCI_AD16

PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_C/BE#2

PCI_TRDY#

PCI_PERR#
PCI_SERR#
PCI_DEVSEL#
PCI_IRDY#

PCI_STOP#

PCI_AD9
PCI_AD8
RJ45_RX- 6 PR2-
PCI_PAR B
47K
PCI_AD[0..31] E
5
B 17,22,23,28,29 PCI_AD[0..31] PR3- B
+2.5VLAN
4

3
PR3+
RJ45_RX+ 3
+3V PR2+
CLK_PCI_LAN RJ45_TX- 2 PR1-
17,22,23,28,29 PCI_C/BE#2 +3VLAN SHLD2 14
1

RJ45_TX+ 1
17,19,22,23,28,29 PCI_FRAME# PR1+
1

R238 13
17,19,22,23,28,29 PCI_IRDY# SHLD1
C352 10
17,19,22,23,28,29 PCI_TRDY# Green LED-
@22 R186
17,19,22,23,28,29 PCI_DEVSEL#
2

.1UF 1 2 9
17,19,22,23,28,29 PCI_STOP#
1 2

Green LED+
17,19,22,23,28 PCI_PERR# Layout Note

1
C324 H0013 pls close to 510_0603 AMP RJ45/RJ11 with LED
17,19,22,23,28 PCI_SERR#
Q21
17,19,22,23,28,29 PCI_PAR conn. C
@10PF
17,22,23,28,29 PCI_C/BE#1
2

10K
DTA114YKA

1
U23 LINK10_100# 2
R184
B 75
LAN_RD+ 1 16 RJ45_RX+ 47K R185
LAN_RD- RD+ RX+ RJ45_RX-
E
75
2 RD- RX- 15
C248
3 14

2
CT CT LAN_GND LANGND
4 13

3
NC NC
1

5 NC NC 12

1
R22 R21 6 11 1000P_2KV_1206 C249 C257
LAN_TD+ CT CT RJ45_TX+ +3V
7 TD+ TX+ 10
50 50 LAN_TD- 8 9 RJ45_TX- .1UF

2
TD- TX- 4.7UF_10V_0805
2

1
1

Pulse H0013
A A
1

R25 R24 R17 R18 Termination plane should be copled to chassis ground
C12 50 50 +3V 75 75
1

.1UF
2

C19 C18
2

1 2 .1UF .1UF LAN_GND


2

C11 .1UF Compal Electronics, inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 21 of 87
5 4 3 2 1
A B C D E

+3V

8P4R_4.7K RP31 +3V


1 8
2 7
3 6

1
4 5 C614 C640 C649 C645 C631 C642 C609 C651 C632

PCI_AD[0..31] .01UF .01UF .01UF .01UF .01UF .1UF .1UF .1UF .1UF

2
17,21,23,28,29 PCI_AD[0..31] +3V

1 1

U48
TSB43AB22

20
35
48
62
78

87

86
96
10
11
VDDP
VDDP
VDDP
VDDP
VDDP

CYCLEOUT
TEST7
TEST17
TEST16
CYCLEIN
DVDD 15 +3V
PCI_AD31 22 27
PCI_AD30 PCI_AD31 DVDD
24 PCI_AD30 DVDD 39
PCI_AD29 25 51
PCI_AD28 PCI_AD29 DVDD
26 PCI_AD28 DVDD 59
PCI_AD27 28 72
PCI_AD26 PCI_AD27 DVDD
29 PCI_AD26 DVDD 88
PCI_AD25 L45
31 PCI_AD25 DVDD 100
PCI_AD24 32 7 PLLVDD 1 2
PCI_AD23 37
PCI_AD24
PCI_AD23
TSB43AB22 PLLVDD
AVDD 1 +3V
0_0805 +3V

1
PCI_AD22 38 2
PCI_AD21 PCI_AD22 AVDD C652 C653
40 PCI_AD21 AVDD 107
PCI_AD20 41 108

2
PCI_AD19 PCI_AD20 AVDD .01UF 4.7UF_10V_0805
42 PCI_AD19 AVDD 120
PCI_AD18 43 PCI_AD18
PCI_AD17 45 PCI_AD17
PCI BUS INTERFACE
PCI_AD16 46 106 1 2
PCI_AD15 PCI_AD16 CPS R434 1K
61 PCI_AD15
PCI_AD14 63
PCI_AD13 PCI_AD14
65 PCI_AD13 PHY PORT 2 TPBIAS1 125 1 2
PCI_AD12 66 124 C646 .1UF
PCI_AD11 PCI_AD12 TPA1+ R459 1K
67 PCI_AD11 TPA1- 123
PCI_AD10 69 122 1 2
2 PCI_AD9 PCI_AD10 TPB1+ 2
70 PCI_AD9 TPB1- 121 1 2
PCI_AD8 71 R458 1K
PCI_AD7 PCI_AD8
74 PCI_AD7 BIAS CURRENT R0 118
PCI_AD6 76 R453
PCI_AD5 PCI_AD6 6.34K_1%
77 PCI_AD5
PCI_AD4 79
PCI_AD3 PCI_AD4
80 PCI_AD3
PCI_AD16 1 C656
2 1394_IDSEL PCI_AD2 81 PCI_AD2 R1 119
R475 100 PCI_AD1 82 1 2
PCI_AD0 PCI_AD1
84 PCI_AD0 OSCILLATOR X0 6
PCI_C/BE#3 34 15PF
17,21,23,28,29 PCI_C/BE#3 PCI_C/BE#2 PCI_C/BE3 Y4
17,21,23,28,29 PCI_C/BE#2 47 PCI_C/BE2
PCI_C/BE#1 60
17,21,23,28,29 PCI_C/BE#1 PCI_C/BE#0 PCI_C/BE1 24.576MHz C655
17,21,23,28,29 PCI_C/BE#0 73 PCI_C/BE0 X1 5
CLK_PCI_1394 16 1 2
12 CLK_PCI_1394 PCI_CLK
17,19 PCI_GNT#0 18 PCI_GNT
19 3 1 2 15PF
17,19 PCI_REQ#0 1394_IDSEL 36 PCI_REQ FILTER FILTER0 C650 .1UF
PCI_IDSEL
17,19,21,23,28,29 PCI_FRAME# 49 PCI_FRAME FILTER1 4 JP12
17,19,21,23,28,29 PCI_IRDY# 50 PCI_IRDY
52 92 1 2 TPB0- 1
17,19,21,23,28,29 PCI_TRDY# PCI_TRDY EEPROM 2 WIRE BUS SDA R424 220 TPB0+ 1
17,19,21,23,28,29 PCI_DEVSEL# 53 PCI_DEVSEL 2 2
54 91 1 2 TPA0- 3
17,19,21,23,28,29 PCI_STOP# PCI_STOP SCL R425 220 TPA0+ 3
17,19,21,23,28 PCI_PERR# 56 PCI_PERR 4 4
15,17,19,23 PIRQA# 13 PCI_INTA POWER CLASS PC0 99

1
1394_PME# 21 98 R394 56.2_1% C590
33 1394_PME# PCI_PME PC1
PCI_SERR# 57 97 Molex SD-54030-0411
17,19,21,23,28 PCI_SERR# PCI_PAR PCI_SERR PC2 .33UF
58

2
17,19,21,23,28,29 PCI_PAR PCI_PAR TPBIAS0 R399
17,19,23,25,28,29,33 PM_CLKRUN# 12 PCI_CLKRUN PHY PORT 1 TPBIAS0 116
3 PCIRST# 56.2_1% TPA0+ 3
8,15,17,19,20,21,23,24,25,28,29,35 PCIRST# 85 PCI_RST TPA0+ 115
114 TPA0-
TPA0- TPB0+
TPB0 + 113
112 TPB0-
TPB0 -

94 R423 1 2 220
TEST9 R422 1
TEST8 95 2 220 R400 R387
14 56.2_1% 5.11K_1%
15,21,23,24,28,29 CBRST# G_RST
101 R437 1 2 220
TEST3 R439 220
PLLGND1
PLLGND2

89 GPIO3 TEST2 102 1 2


90 104 R441 1 2 220 R395 C585 220PF
GPIO2 TEST1
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND

105 R442 1 2 220 56.2_1%


TEST0
2

8
9
109
110
111
117
126
127
128
17
23
30
33
44
55
64
68
75
83
93
103

R411 R410

220 220
1

CLK_PCI_1394 For TSB43AA22


C657 C605
C657,C605
1

@.1UF @.1UF
1

4 4
R462 change to 0
@22 ohm to short
to GND
2

TSB43AB22 USE
C654
Compal Electronics, inc.
Title
@10PF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 22 of 87
A B C D E
A B C D E

24 SLATCH
15,17,24,29 RTCCLK PCM_SPK# 32
24 SLDATA
17,19 PCI_GNT#2 +3V CARDBUS +3V

17,19 PCI_REQ#2
17,21,22,28,29 PCI_C/BE#3
PCI1420

1
17,21,22,28,29 PCI_C/BE#2 C667 C668 C669 C666
17,21,22,28,29 PCI_C/BE#1 .1UF .1UF .1UF .1UF

2
17,21,22,28,29 PCI_C/BE#0
12 CLK_PCI_CB 1 2
C664 .1UF

1
R473 S2_VCC
17,19,21,22,28,29 PCI_FRAME# +3V
17,19,21,22,28,29 PCI_DEVSEL#
1 R478 8,15,17,19,20,21,22,24,25,28,29,35 PCIRST# S1_VCC 1
33
+12VS 1 2 17,19,21,22,28,29 PCI_TRDY#
1 2

1 2
17,19,21,22,28,29 PCI_IRDY#

1
100K +3V +3V C681 .1UF
17,19,21,22,28,29 PCI_STOP# C695 C691 C693
17,19,21,22,28 PCI_PERR# CBRST# .1UF .1UF
3 1 CBRST# 15,21,22,24,28,29

2
17,19,21,22,28 PCI_SERR# 10PF

2
Q60 2N7002 17,19,21,22,28,29 PCI_PAR
S1_D[0..15]

W12

M17
G15

G19
C13

N15
24 S1_D[0..15]

A14

A10

A15

B13

E19

E11

B14

A11
F14

F17

F18

M5
S1_A[0..25]

C6

C7

C8

D1

U7

C9
+3V

B6
A6

A7
B7

E2
A5

E7
F7

F8

F3
U51

L3
24 S1_A[0..25] S2_D[0..15]
24 S2_D[0..15] S2_A[0..25]

PCLK

DATA
CLOCK

VCCI

VCCP
VCCP

VCCB

VCCA
SPKOUT
SERR#
PERR#
STOP#
IRDY#
TRDY#
RSTIN#
DEVSEL#
FRAME#

C/BE0#
C/BE1#
C/BE2#
C/BE3#

REQ#

GRST#
PAR

GNT#

LATCH

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
24 S2_A[0..25] +3V

1
S2_D0 W10 H14 S1_D0
S2_D1 B_D0/CAD27 A_D0/CAD27 S1_D1 C687 C688
U10 B_D1/CAD29 A_D1/CAD29 G18
S2_D2 P10 G14 S1_D2 1000PF 1000PF

2
B_D2/RSVD A_D2/RSVD

1
S2_D3 H2 U11 S1_D3
S2_D4 B_D3/CAD0 A_D3/CAD0 S1_D4 C692 C690
J1 R11
S2_D5 J3
B_D4/CAD1 Power A_D4/CAD1
U12 S1_D5 1000PF 1000PF

2
S2_D6 B_D5/CAD3 A_D5/CAD3 S1_D6
K1 B_D6/CAD5 A_D6/CAD5 R12
S2_D7 K3 V13 S1_D7
S2_D8 B_D7/CAD7 A_D7/CAD7 S1_D8
V10 B_D8/CAD28 A_D8/CAD28 H15
S2_D9 R10 G17 S1_D9
S2_D10 B_D9/CAD30 A_D9/CAD30 S1_D10
W11 B_D10/CAD31 A_D10/CAD31 F19
S2_D11 H1 P11 S1_D11
S2_D12 B_D11/CAD2 A_D11/CAD2 S1_D12
J2 B_D12/CAD4 A_D12/CAD4 V12
S2_D13 J6 P12 S1_D13
S2_D14 B_D13/CAD6 A_D13/CAD6 S1_D14
K2 B_D14/RSVD A_D14/RSVD W13
S2_D15 K5 U13 S1_D15
2
B_D15/CAD8 A_D15/CAD8 2
S2_A0 R8 B_A0/CAD26
PCI A_A0/CAD26 J19 S1_A0
S2_A1 W7 K14 S1_A1
S2_A2 B_A1/CAD25 A_A1/CAD25 S1_A2
V7 B_A2/CAD24 A_A2/CAD24 K15
S2_A3 W6 K19 S1_A3
S2_A4 B_A3/CAD23 A_A3/CAD23 S1_A4
V6 L15
S2_A5 U6
B_A4/CAD22
B_A5/CAD21
Interface A_A4/CAD22
A_A5/CAD21 L17 S1_A5
S2_A6 V5 L19 S1_A6
S2_A7 B_A6/CAD20 A_A6/CAD20 S1_A7
U5 B_A7/CAD18 A_A7/CAD18 M15
S2_A8 N1 W16 S1_A8
S2_A9 B_A8/CC/BE1# A_A8/CC/BE1# S1_A9 S1_A23
M3 B_A9/CAD14 A_A9/CAD14 R14 S1_VCC
S2_A10 L1 W14 S1_A10 R468 22K
S2_A11 M1
B_A10/CAD9 Slot A_A10/CAD9
P14 S1_A11 S1_WP 1 2
S2_A12 T1
B_A11/CAD12
B_A12/CC/BE2#
Slot A_A11/CAD12
A_A12/CC/BE2# N18 S1_A12 R470 22K
S1_VCC
S2_A13 N3 R17 S1_A13
S2_A14 B_A13/CPAR A_A13/CPAR S1_A14
P1 B_A14/CPERR# A_A14/CPERR# N14
R463 S2_A15 P5 M14 S1_A15 R466
S2_A16 1 2 SB_A16 P6
B_A15/CIRDY#
B_A16/CCLK
B A A_A15/CIRDY#
A_A16/CCLK P18 SA_A16 1 2 S1_A16
S2_A17 M6 U15 S1_A17
S2_A18 B_A17/CAD16 A_A17/CAD16 S1_A18
47 N2 T19 47
S2_A19 B_A18/RSVD A_A18/RSVD S1_A19
Placement near N6 B_A19/CBLOCK# A_A19/CBLOCK# P15 Placement near
to PCMCIA S2_A20 N5 R18 S1_A20 to PCMCIA
S2_A21 B_A20/CSTOP# A_A20/CSTOP# S1_A21
controller R1 B_A21/CDEVSEL# A_A21/CDEVSEL# P17 controller
S2_A22 R2 P19 S1_A22
S2_A23 B_A22/CTRDY# A_A22/TRDY# S1_A23
R3 B_A23/CFRAME# A_A23/CFRAME# N17
S2_A24 W4 N19 S1_A24
S2_A25 B_A24/CAD17 A_A24/CAD17 S1_A25
R6 B_A25/CAD19 A_A25/CAD19 M18
S2_BVD1 V9 H19 S1_BVD1
3 24 S2_BVD1 B_BVD1/CSTSCHG A_BVD1/CSTSCHG S1_BVD1 24 3
S2_BVD2 W9 J15 S1_BVD2
24 S2_BVD2 B_BVD2/CAUDIO A_BVD2/CAUDIO S1_BVD2 24
S2_CD1# H3 V11 S1_CD1#
24 S2_CD1# B_CD1#/CCD1# A_CD1#/CCD1# S1_CD1# 24
S2_CD2# R9 H17 S1_CD2#
24 S2_CD2# B_CD2#/CCD2# A_CD2#/CCD2# S1_CD2# 24
S2_RDY# V8 J17 S1_RDY#
24 S2_RDY# S2_WAIT# B_READY/CINT# A_READY/CINT# S1_WAIT# S1_RDY# 24
24 S2_WAIT# W8 B_WAIT#/CSERR# A_WAIT#/CSERR# J14 S1_WAIT# 24
S2_WP U9 H18 S1_WP
24 S2_WP B_WP/CCLKRUN# A_WP/CCLKRUN# S1_WP 24
S2_INPACK# R7 L14 S1_INPACK#
24 S2_INPACK# B_INPACK/CREQ# A_INPACK/CREQ# S1_INPACK# 24

24 S2_CE1# K6 B_CE1#/CC/BE0# A_CE1#/CC/BE0# P13 S1_CE1# 24


24 S2_CE2# L2 B_CE2#/CAD10 A_CE2#/CAD10 R13 S1_CE2# 24
24 S2_WE# P3 B_WE#/CGNT# A_WE#/CGNT# R19 S1_WE# 24
24 S2_IORD# L5 W15 S1_IORD# 24
24 S2_IOWR# M2
B_IORD#/CAD13
B_IOWR#/CAD15
IRQ/DMA A_IORD#/CAD13
A_IOWR#/CAD15 V15 S1_IOWR# 24
24 S2_OE# L6 B_OE#/CAD11 A_OE#/CAD11 U14 S1_OE# 24
S2_VS1 U8 J18 S1_VS1
24 S2_VS1 B_VS1#/CVS1 A_VS1#/CVS1 S1_VS1 24
S2_VS2 P7 M19 S1_VS2
24 S2_VS2 B_VS2#/CVS2 A_VS2#/CVS2 S1_VS2 24
DMAREQ#/MFUNC2

DMAGNT#/MFUNC5
CLKRUN#/MFUNC6
24 S2_REG# P8 B_REG#/CC/BE3# A_REG#/CC/BE3# K17 S1_REG# 24
IRQSER/MFUNC3

S2_RST W5 L18 S1_RST


LOCK#/MFUNC4

24 S2_RST B_RESET/CRST# A_RESET/CRST# S1_RST 24 +3V


INTA#/MFUNC0
INTB#/MFUNC1

RIOUT#/PME#
SUSPEND#

GND R477
R472
22K
22K
IDSEL
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9

PCM_INTA# 1 2
PCI1420-GHK D41 RB751V PIRQA# 15,17,19,22
H5
G1
G3
H6
F1
G5
F2
E1
G6
F5
E3
C12
A4
E6
B5
F6
B8
A8
E9
F9
B9
A9
F10
E10
F11
E13
C11
B11
A12
B12
E12
A13

C10

F15
E17
D19
A16
C15
E14
F13
B15

C14

G2
J5
P2
P9
V14
K18
E18
F12
B10
E8
C5
PCI_AD29
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28

PCI_AD30
PCI_AD31
PCI_AD0
PCI_AD1
PCI_AD2

PCI_AD6

PCI_AD9
PCI_AD3
PCI_AD4
PCI_AD5

PCI_AD7
PCI_AD8

PCM_INTA#
PCM_INTB#

4 4
1

PCM_INTB# 1 2
R474 D40 RB751V PIRQB# 17,19,21
100 PCM_PME#
PCM_PME# 33
S2_WP 1 2 S2_VCC PM_CLKRUN# 17,19,22,25,28,29,33
R435 22K PCM1_LED
PCM1_LED 34
Compal Electronics, inc.
2

S2_A23
PCI_AD20

S2_VCC PCM_RI# 29
R177 22K INT_SERIRQ 17,19,25,33
PCI_AD[0..31] PCM2_LED Title
17,21,22,28,29 PCI_AD[0..31] PCM2_LED 34
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL R307 22K
+3V SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF 2 1 Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS D27 RB751V PCM_SUSP# 33 B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 23 of 87
A B C D E
PCMCIA POWER CTRL.
CARDBUS
+5V_CBS
+3V +12V S1_VPP

W=40mils
S1_VPP

S1_VCC
SOCKET
U19 JP19

1
25 VCC_5V AVPP 8 A77 a68 b68 B77
9 C240 A76 B76
C231 AVCC S1_CD2# a34 b34 S2_CD2#
7 10 A75 B75

2
12V AVCC 23 S1_CD2# a67 b67 S2_CD2# 23
1 2 1UF_25V_0805 24 12V AVCC 11 4.7UF_10V_0805
23 S1_WP
S1_WP A74 a33 b33 B74 S2_WP
S2_WP 23
A73 GND GND B73
1 2 C226 1 5V BVPP 23 S2_VPP S2_VPP S1_D10 A72 a66 b66 B72 S2_D10
.1UF 2 20 S1_D2 A71 B71 S2_D2
5V BVCC a32 b32
1 2 C225 30 5V BVCC 21 W=40mils S2_VCC S1_D9 A70 a65 b65 B70 S2_D9
.1UF 22 S1_D1 A69 B69 S2_D1
BVCC a31 b31

1
1 2 C227 15 3.3V
S1_D8 A68 a64 b64 B68 S2_D8
.1UF 16 6 C237 S1_D0 A67 B67 S2_D0
3.3V RESET a30 b30
1 2 C660 17 14 S1_BVD1 A66 B66 S2_BVD1

2
.1UF 3.3V RESET# 4.7UF_10V_0805 23 S1_BVD1 a63 b63 S2_BVD1 23
A65 GND GND B65
1 2 C638 23 SLDATA 3 DATA NC 26 S1_A0 A64 a29 b29 B64 S2_A0
.1UF 5 27 S1_BVD2 A63 B63 S2_BVD2
23 SLATCH LATCH NC 23 S1_BVD2 a62 b62 S2_BVD2 23
1 2 C641 15,17,23,29 RTCCLK 4 CLOCK NC 28 S1_A1 A62 a28 b28 B62 S2_A1
.1UF 29 CBRST# S1_REG# A61 B61 S2_REG# S2_REG# 23
NC 23 S1_REG# S1_A2 a61 b61 S2_A2
13 APWR_GOOD# A60 a27 b27 B60
19 S1_INPACK# A59 B59 S2_INPACK#
BPWR_GOOD# 23 S1_INPACK# S1_A3 a60 b60 S2_A3 S2_INPACK# 23
34 OCCB# 18 OC# GND 12 A58 a26 b26 B58
A57 GND GND B57
+3V 1 2 S1_WAIT# A56 B56 S2_WAIT#
23 S1_WAIT# S1_A4 a59 b59 S2_A4 S2_WAIT# 23
TPS2206AI/TPS2216 A55 B55
R455 S1_RST a25 b25 S2_RST
23 S1_RST A54 a58 b58 B54 S2_RST 23
100K S1_A5 A53 B53 S2_A5
S1_VS2 a24 b24 S2_VS2
23 S1_VS2 A52 a57 b57 B52 S2_VS2 23
S1_A6 A51 B51 S2_A6
S1_A25 a23 b23 S2_A25
A50 a56 b56 B50
A49 GND GND B49
S1_A7 A48 B48 S2_A7
+3V S1_A24 a22 b22 S2_A24
A47 a55 b55 B47
S1_A12 A46 B46 S2_A12
S1_A23 a21 b21 S2_A23
A45 a54 b54 B45
S1_A15 A44 B44 S2_A15
a20 b20
1
C116 S1_A22 A43 B43 S2_A22
PCMRST# 34 a53 b53
A42 GND GND B42
.1UF U37A S1_A16 S2_A16

14
A41 B41
2
a19 b19

1
74LVC125 A40 B40
S1_VPP a52 b52 S2_VPP
A39 a18 b18 B39
2 3 1 2 CBRST# A38 B38
8,15,17,19,20,21,22,23,25,28,29,35 PCIRST# CBRST# 15,21,22,23,28,29 S1_VCC a51 b51 S2_VCC
R348 0 A37 B37
a17 b17

1
S1_A21 A36 B36 S2_A21
+3V POWER R354 S1_RDY# a50 b50 S2_RDY#
A35 B35
7
S1_A[0..25] 23 S1_RDY# S1_A20 a16 b16 S2_A20 S2_RDY# 23
23 S1_A[0..25] A34 a49 b49 B34
S1_D[0..15] 10K S1_WE# A33 B33 S2_WE#
23 S1_D[0..15] S2_A[0..25] 23 S1_WE# S1_A19 a15 b15 S2_A19 S2_WE# 23
23 S2_A[0..25] A32 B32

2
S2_D[0..15] S1_A14 a48 b48 S2_A14
23 S2_D[0..15] A31 a14 b14 B31
S1_A18 A30 B30 S2_A18
+3V S1_A13 a47 b47 S2_A13
33 G_RST# 1 2 A29 a13 b13 B29
R349 @0 A28 B28
S1_A17 GND GND S2_A17
A27 a46 b46 B27
S1_A8 A26 B26 S2_A8
S1_IOWR# a12 b12 S2_IOWR#
23 S1_IOWR# A25 a45 b45 B25 S2_IOWR# 23
S2_VPP W=30mils +5V +5V_CBS S1_A9 A24 B24 S2_A9
S1_IORD# a11 b11 S2_IORD#
23 S1_IORD# A23 a44 b44 B23 S2_IORD# 23
1

JP29
A22 GND GND B22
C233 C659 80 mils 1 2 80 mils S1_A11 A21 B21 S2_A11
S1_VS1 a10 b10 S2_VS1
A20 B20 S2_VS1 23
2

.01UF 1UF_25V_0805 PAD-OPEN 4x4m 23 S1_VS1 S1_OE# a43 b43 S2_OE#


23 S1_OE# A19 a9 b9 B19 S2_OE# 23
S1_CE2# A18 B18 S2_CE2#
23 S1_CE2# S1_A10 a42 b42 S2_A10 S2_CE2# 23
A17 a8 b8 B17
U58 A16 B16
4.926V S1_D15 GND GND S2_D15
1 IN OUT 8 A15 a41 b41 B15
S1_CE1# A14 B14 S2_CE1#
W=30mils 23 S1_CE1# S1_D14 a7 b7 S2_D14 S2_CE1# 23
S1_VPP 2 IN OUT 7 A13 a40 b40 B13
1

S1_D7 A12 B12 S2_D7


a6 b6
1

1
C718 3 6 S1_D13 A11 B11 S2_D13
RST# SET a39 b39
2

C229 C228 @1UF_10V_0603 R531 C719 S1_D6 A10 B10 S2_D6


2

@100K_1% @2.2UF_0805 a5 b5
4 5 A9 B9
2

2
.01UF 1UF_25V_0805 SHDN# GND S1_D12 GND GND S2_D12
A8 a38 b38 B8
@MAX1857 S1_D5 A7 B7 S2_D5
S1_D11 a4 b4 S2_D11
A6 B6
1

S1_D4 a37 b37 S2_D4


A5 a3 b3 B5
S1_CD1# A4 B4 S2_CD1# S2_CD1# 23
S1_VCC 1.25V 23 S1_CD1# S1_D3 a36 b36 S2_D3
A3 a2 b2 B3
A2 a35 b35 B2
U59 A1 B1
a1 b1
1 IN OUT 8
2

C670
1

2 7 R532 S1_CD1# 1 2 PCMC154PIN


C671 C663 C661 C662 R533 @10K IN OUT @34K_1%_0603 @1000PF
10UF_16V_1206 56PF .1UF 1000PF 1 2 3 6
2

RST# SET C686


1

1 2 4 5 S1_CD2# 1 2
SHDN# GND @1000PF
R534 @MAX1857 C689
@10K S2_CD1# 1 2
S2_VCC @1000PF
C665
S2_CD2# 1
1000PF
2 Compal Electronics, inc.
1

Title
C678 C234 C673 C674
10UF_16V_1206 56PF .1UF 1000PF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
2

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 24 of 87
A B C D E

.1UF
C713
1 2 U55
1 2 +3VS
5 6 LPCRST R518 10K
+3V VCC Y1

8,15,17,19,20,21,22,23,24,28,29,35 PCIRST# 1 A1
4 1 2 LPC_RST#
SUPER I/O SMsC FDC47N227 LPCRST1 2 3 A2
Y2

GND 2 D45
LPC_RST# 33

1
R524 C714 RB751V
10K NC7WZ14
1 .1UF 1

2
LPC_AD[0..3]
17,33 LPC_AD[0..3]
U29
LPC_AD0 20 68 LPD0
LPC_AD1 LAD0 PD0/INDEX# LPD1
21 LAD1 PD1/TRK0 69
LPC_AD2 22 70 LPD2 LPD[0..7]
LAD2 PD2/WRTPRT# LPD[0..7] 26
LPC_AD3 23 71 LPD3
LAD3 PD3/RDATA# LPD4
PD4/DSKCHG# 72
24 73 LPD5
17,33 LPC_FRAME# LFRAME# PD5 LPD6
17,19 LPC_DRQ#1 25 LDRQ# PD6/MTR0# 74
75 LPD7
LPC_RST# PD7
26 PCIRST#
27 79 LPTBUSY
15,17,21,35 SUS_STAT# LPCPD# BUSY/MTR1# LPTBUSY 26
78 LPTPE
PE/WDATA# LPTSLCT LPTPE 26
+3VS 1 2 50 GPIO12/IO_SMI# SLCT/WGATE# 77 LPTSLCT 26
R209 10K 1 2 17 81 LPTERR#
R248 10K IO_PME# ERROR#/HDSEL# LPTACK# LPTERR# 26
17,19,23,33 INT_SERIRQ 30 SIRQ ACK#/DS1# 80 LPTACK# 26
17,19,22,23,28,29,33 PM_CLKRUN# 28 CLKRUN# INIT#/DIR# 66 INIT# 26
CLK_LPC_SIO 29 82 RP10 +3VS RP11 +3VS
12 CLK_LPC_SIO PCICLK AUTOFD#/DRVDEN0# LPTAFD# 26
STROBE#/DS0# 83 LPTSTB# 26
CLK_SIO14 19 67 DCD#1 1 8 CTS#2 1 8
12 CLK_SIO14 CLK14 SLCTIN#/STEP# SLCTIN# 26
RI#1 2 7 DSR#2 2 7
48 100 CTS#1 3 6 DCD#2 3 6
15 PID0 GPIO10 DTR2#
54 99 CTS#2 DSR#1 4 5 RI#2 4 5
15 PID1 GPIO15 CTS2#
2 55 98 2
15 PID2 GPIO16 RTS2#
56 97 DSR#2 8P4R_4.7K 8P4R_4.7K
15 PID3 GPIO17 DSR2#
27 BT_DET# 57 GPIO20 TXD2 96
58 GPIO21 RXD2 95 1 2
59 94 DCD#2 R223 1K +5V
GPIO22 DCD2# RI#2
+3VS 1 2 6 GPIO24 RI2# 92
R520 10K 32 JP24
GPIO30 DTR#1
33 GPIO31 DTR1# 89
34 88 CTS#1 1
GPIO32 CTS1# RTS#1 1
35 GPIO33 RTS1# 87 2 2
36 86 DSR#1 RXD1 3
GPIO34 DSR1# TXD1 29 RXD1 TXD1 3
37 GPIO35 TXD1 85 29 TXD1 4 4
38 84 RXD1 1 2 DSR#1 5
GPIO36 RXD1 DCD#1 R213 1K 29 DSR#1 RTS#1 5
39 GPIO37 DCD1# 91 29 RTS#1 6 6
40 90 RI#1 CTS#1 7
GPIO40 RI1# 29 CTS#1 DTR#1 7
41 GPIO41 29 DTR#1 8 8
42 63 RI#1 9
GPIO42 IRMODE/IRRX3 IRMODE 26 29 RI#1 9
43 61 DCD#1 10
GPIO43 IRRX2 IRRX 26 29 DCD#1 10
44 GPIO44 IRTX2 62 IRTXOUT 26
45 GPIO45
46 16 RDATA# @96212-1011S
GPIO46 RDATA# RDATA# 20
47 10 WDATA#
GPIO47 WDATA# WDATA# 20
11 WGATE#
WGATE# WGATE# 20
1 2 51 12 HDSEL#
GPIO13/IRQIN1 HDSEL# HDSEL# 20
R195 10K 52 8 FDD IR#
GPIO14/IRQIN2 DIR# FDDIR# 20
1 2 64 9 STEP#
GPIO23/FDC_PP STEP# STEP# 20
R196 10K 5 DRV0#
DS0# DRV0# 20,34
18 13 INDEX#
+3VS VTR INDEX# INDEX# 20
CLK_SIO14 CLK_LPC_SIO 4 DSKCHG#
3 DSKCHG# DSKCHG# 20 3
53 15 WP#
VCC WRTPRT# WP# 20
2

65 14 TRACK0#
VCC TRK0# TRACK0# 20
R249 R228 93 3 MTR0#
VCC MTR0# MTR0# 20
@33 DRVDEN0 1 3MODE# 20
1

10 C278 C294 C338 C276 7 VSS


31 2 2 1 +5VS
2 1

2 1

4.7UF_10V_0805 .1UF .1UF .1UF VSS DRVDEN1 R247 10K


60
2

10V VSS
76 VSS GPIO11/SYSOPT 49 1 2
C339 C307 R208 1K
1

15PF @22PF
SMsC LPC47N227 Base I/O Address
* 0 = 02Eh
1 = 04Eh

4 4

Compal Electronics, inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 25 of 87
A B C D E
FIR Module +3VS

1
+3VS
R2 R5
W=40mils
@4.7_1206 @4.7_1206

1
FIR_VCC

1
1/4W + C259

2
U1

1
C7 + C1
1 10 W=40mils @68UF_4V_B2

2
@68UF_4V_B2 @.47UF VCC LEDA

2
7 GND AGND 2

1 2 4 9 IRTXOUT
MODE0 TXD IRTXOUT 25
R4 @10K
1 2 5 8 IRRX
MODE1 RXD IRRX 25
R3 @10K

1
3 FIR_SEL N.C 6
R561
10K
IRMODE (R561 For VCH ONLY)
25 IRMODE
@HSDL-3600

2
The component's most place
cloely IRDA MODULE.

+5V_PRN

LPTSLCT
LPTPE
PARALLEL PORT
LPTBUSY
LPTACK#

+5V_PRN
10
9
8
7
6

CP2
RP7 AFD#/3M# 1 8
10P8R_2.7K D4 LPTERR# 2 7
2 1 LPTINIT# 3 6
+5VS LPTSLCTIN# 4 5
RB420D
R192 8P4C_220PF
2.2K C251 CP1
1
2
3
4
5

220PF LPTSLCT 4 5
+5V_PRN R191 LPTPE 3 6
LPTSTB# LPTBUSY 2 7
AFD#/3M# 25 LPTSTB# LPTACK# 1 8
LPTERR# AFD#/3M# 33
LPTINIT# 8P4C_220PF
LPTSLCTIN# R190 1 CP3
R189 14 F D0 1 8
25 LPTAFD# F D0 F D1
33 33 2 2 7
1 2 LPTINIT# LPTERR# 15 F D2 3 6
25 INIT# 25 LPTERR# F D1 F D3
3 4 5
+5V_PRN R188 LPTINIT# 16
1 33 2 LPTSLCTIN# F D2 4 8P4C_220PF
F D4 25 SLCTIN# LPTSLCTIN# 17 CP4
F D5 F D3 5 F D4 1 8
F D6 18 F D5 2 7
F D7 F D4 6 F D6 3 6
RP6 F D7
19 4 5
LPD0 1 8 F D0 F D5 7
LPD1 F D1 8P4C_220PF
10

2 7 20
9
8
7
6

LPD2 3 6 F D2 F D6 8
RP8 LPD3 4 5 F D3 21 JP4
10P8R_2.7K F D7 9 LPTCN-25
22
8P4R_68 LPTACK# 10
RP5 25 LPTACK#
23
LPD7 1 8 F D7 LPTBUSY 11
25 LPTBUSY
LPD6 2 7 F D6 24
1
2
3
4
5

LPD5 3 6 F D5 LPTPE 12
LPD4 F D4 25 LPTPE
+5V_PRN 4 5 25
LPTSLCT 13
F D3 25 LPTSLCT
F D2 8P4R_68
F D1
F D0
LPD[0..7]
25 LPD[0..7]
Compal Electronics, inc.
Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 26 of 87
USB PORT
USB_VCCA USB_VCCC
F4 F3

+5VS +5VS

1
C208 + C263 +
POLYSWITCH_0.75A POLYSWITCH_0.75A

1
C153 C267
R353 .1UF 150UF_E R194 .1UF 150UF_E

2
470K USB_AGND 470K USB_CGND

2
18 USB_OC#0 18 USB_OC#3

1
C560 R355 C279 R197

2
1000PF 560K 1000PF 560K

2
JP9
L36 L19
0_0603 1 0_0603
USB0_D- 1 2 USB3_D- 1 2
18 USB_PN0 2 18 USB_PN3
USB0_D+ 1 2 USB3_D+ 1 2
18 USB_PP0 3 18 USB_PP3
L34 L18
4

1
0_0603 C720 C721 0_0603
SUYIN USB Connector 2569A-04G3T-B
47PF 47PF

1
1

1
L35 L13
CHB4516G750_1806 C535 CHB4516G750_1806 C271

1
4516 4516 C722 C723

2
.1UF .1UF
47PF 47PF

2
+5VALW +3VALW USB_VCCB

1
F2
Bluetooth R171
+5VS
2

1
R163 C172 @100K C272 +
POLYSWITCH_0.75A

1
@100K JP15 C281

2
@ .1UF R203 .1UF 150UF_E
34 BT_DETACH
2

2
1 2
3

34 BT_WAKE_UP
1

3 4 470K USB_BGND
2 5 6
USB2_D+
18 USB_PP2 BT_DET# 25

2
Q10 USB2_D- 7 8
18 USB_PN2 18 USB_OC#1
1

9 10
1

C171 @SI2301DS
11 12

1
BT_VCC 34 BT_RESET# 13 14
@ .1UF C273 R204 JP1
2

15 16
BT_VCC

2
17 18 1
1

2 22K C201 1000PF 560K


34,35 RFOFF# 19 20 2

1
+ C198

2
Q40 3
22K @ 4.7UF_10V_1206 @ .1UF L16 4
@DTC124EK 0_0603
2

2
@ HRS DF15-08-20DS-065V USB1_D- 5
18 USB_PN1 1 2
3

USB1_D+ 6
18 USB_PP1 1 2 7
L15
0_0603 8
SUYIN 2553A-0BG5T-A

1
C724 C725

1
47PF 47PF

2
L14 C275
CHB4516G750_1806

2
.1UF

2
4516

Compal Electronics, inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 27 of 87
Q54
+5VS_MINIPCI
+3VALW @SI2301DS +3.3VAUX
R385

1
S

D
3 1 1 2 C175 C236
+3V
0 C173 C178
@.1UF @.1UF @10UF_16V_1206

2
1

1
@1000PF

G
2
C629 C592
@1UF_25V_0805 @1UF_25V_0805 1 2 PCIRST#
PCIRST# 8,15,17,19,20,21,22,23,24,25,29,35
2

2
R168 0
MINI_RST# 1 2 CBRST# 15,21,22,23,24,29
R164 @0
R454 +3VS_MINIPCI

33 EN_WOL# 1 2 +5VALW

1
C224
@100K +3V C177
.1UF 10UF_16V_1206

2
C728
1 2
U61

5
.1UF
34 WL_OFF# 1
4 JP18
2 TIP 1 2 RING
34,35 KILL_SW 1 2
KEY KEY
3 4

3
7SH08FU 3 4
5 5 6 6
7 7 8 8
LAN RESERVED 9 10 LAN RESERVED
9 10
11 11 12 12
+3VS_MINIPCI 13 13 14 14
15 15 16 16
L9 PIRQD# 17 18 W=30mils +5VS_MINIPCI
W=40mils 17,19,29 PIRQD# 17 18 PIRQC#
+3V 1 2 19 19 20 20 PIRQC# 17,19,29
PCI_REQ#4 21 22
17,19 PCI_REQ#4 21 22 PCI_GNT#4 17,19 +3VS_MINIPCI
1

CHB1608B121 C232 C191 23 24 W=40mils +3.3VAUX


0603 CLK_MINIPCI 23 24 MINI_RST# L8
12 CLK_MINIPCI 25 25 26 26
.1UF .1UF 27 28 W=40mils 1 2
2

PCI_REQ#1 27 28 +3V
17,19 PCI_REQ#1 29 29 30 30 PCI_GNT#1 17,19

1
31 32 C181 C200 CHB1608B121
PCI_AD31 31 32 0603
17,21,22,23,29 PCI_AD31 33 33 34 34 WLANPME# 33
PCI_AD29 35 36 .1UF .1UF
17,21,22,23,29 PCI_AD29

2
35 36 PCI_AD30
37 37 38 38 PCI_AD30 17,21,22,23,29
PCI_AD27 39 40
17,21,22,23,29 PCI_AD27 39 40
PCI_AD25 41 42 PCI_AD28
17,21,22,23,29 PCI_AD25 41 42 PCI_AD28 17,21,22,23,29
43 44 PCI_AD26
PCI_C/BE#3 43 44 PCI_AD24 PCI_AD26 17,21,22,23,29
17,21,22,23,29 PCI_C/BE#3 45 45 46 46 PCI_AD24 17,21,22,23,29
PCI_AD23 47 48 MINI_IDSEL 1 2 PCI_AD18
17,21,22,23,29 PCI_AD23 47 48
CLK_MINIPCI 49 50 R48 100
PCI_AD21 49 50 PCI_AD22
17,21,22,23,29 PCI_AD21 51 51 52 52 PCI_AD22 17,21,22,23,29
1

PCI_AD19 53 54 PCI_AD20
17,21,22,23,29 PCI_AD19 53 54 PCI_AD20 17,21,22,23,29
R169 55 56 PCI_PAR
@10 PCI_AD17 55 56 PCI_AD18 PCI_PAR 17,19,21,22,23,29
17,21,22,23,29 PCI_AD17 57 57 58 58 PCI_AD18 17,21,22,23,29
PCI_C/BE#2 59 60 PCI_AD16
17,21,22,23,29 PCI_C/BE#2 59 60 PCI_AD16 17,21,22,23,29
P CI_IRDY# 61 62
17,19,21,22,23,29 PCI_IRDY#
1 2

61 62 PCI_FRAME#
63 63 64 64 PCI_FRAME# 17,19,21,22,23,29
PM_CLKRUN# 65 66 PCI_TRDY#
17,19,22,23,25,29,33 PM_CLKRUN# 65 66 PCI_TRDY# 17,19,21,22,23,29
C180 PCI_SERR# 67 68 PCI_STOP#
17,19,21,22,23 PCI_SERR# 67 68 PCI_STOP# 17,19,21,22,23,29
@33PF 69 70
2

PCI_PERR# 69 70 PCI_DEVSEL#
17,19,21,22,23 PCI_PERR# 71 71 72 72 PCI_DEVSEL# 17,19,21,22,23,29
PCI_C/BE#1 73 74
17,21,22,23,29 PCI_C/BE#1 73 74
PCI_AD14 75 76 PCI_AD15
17,21,22,23,29 PCI_AD14 75 76 PCI_AD15 17,21,22,23,29
77 78 PCI_AD13
77 78 PCI_AD13 17,21,22,23,29
PCI_AD12 79 80 PCI_AD11
17,21,22,23,29 PCI_AD12 79 80 PCI_AD11 17,21,22,23,29
PCI_AD10 81 82
17,21,22,23,29 PCI_AD10 81 82
83 84 PCI_AD9
83 84 PCI_AD9 17,21,22,23,29
PCI_AD8 85 86 PCI_C/BE#0
17,21,22,23,29 PCI_AD8 85 86 PCI_C/BE#0 17,21,22,23,29
PCI_AD7 87 88
17,21,22,23,29 PCI_AD7 87 88
89 90 PCI_AD6
89 90 PCI_AD6 17,21,22,23,29
PCI_AD5 91 92 PCI_AD4
17,21,22,23,29 PCI_AD5 91 92 PCI_AD4 17,21,22,23,29
93 94 PCI_AD2
93 94 PCI_AD2 17,21,22,23,29
PCI_AD3 95 96 PCI_AD0
17,21,22,23,29 PCI_AD3 95 96 PCI_AD0 17,21,22,23,29
W=30mils 97 98
+5VS_MINIPCI PCI_AD1 97 98
17,21,22,23,29 PCI_AD1 99 99 100 100
101 101 102 102
103 103 104 104
105 105 106 106
107 107 108 108
109 109 110 110
111 111 112 112
113 113 114 114
115 115 116 116
117 117 118 118
119 119 120 120
121 121 122 122
1 2 W=30mils 123 124 W=20mils +3.3VAUX
+5VS 123 124
L7 0_0603
1

C179
0603 Mini-PCI SLOT
.1UF
2

+5VS_MINIPCI

Compal Electronics, inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 28 of 87
R486 @1M
+3V +3V 1 2 +3V SMC_VCC
@.1UF
U52
C729 U62

1
C698 C699 C700 C701 C702 C703 C704 C705 C706 C707 1 2 2 4 SM_LED 3 1
INPUT OUTPUT SM_LED 35 VIN VOUT
SMVC3EN 4 5
VIN/CE VOUT

1
.1UF 1000PF .1UF 1000PF .1UF .1UF 1000PF .1UF 1000PF .1UF +3V C708 C709

1
5 2 C717 R535
SMC_VCC VCC R545 GND @.1UF @1000PF@10UF_16V_1206
3 1

2
GND NC @1K
@1K @RT9701-CB

2
2
@NC7S14

103
113
124
SMC_VCC C726 @1000PF

17
28
39
49
60
70
81
92
U53

6
1 2 JP14

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
@100K 12
SMCD# VCC
+3V 1 2 11 PCD#
PCI_AD[0..31] R487 SMD4 13
17,21,22,23,28 PCI_AD[0..31] I/O4
10 VSS
Power SMD5 14
SMCD# 1 I/O5
2 SMEJSW# SMD3 9 I/O3
R523 @0 SMD6 15
PCI_AD0 SMD0 SMD2 I/O6
53 AD0 SMD0 86 8 I/O2
PCI_AD1 52 90 SMD1 SMD7 16
PCI_AD2 AD1 SMD1 SMD2 SMD1 I/O7
51 AD2 SMD2 93 7 I/O1
PCI_AD3 50 95 SMD3 SM_LVD 17
PCI_AD4 AD3 SMD3 SMD4 SMD0 LVD
48 AD4 SMD4 99 6 I/O0
PCI_AD5 47 96 SMD5 18
PCI_AD6 AD5 SMD5 SMD6 SM_WP# GND
46 AD6 SMD6 94 5 WP#
PCI_AD7 45 91 SMD7 SM_R/B# 19

SmartMedia I/F
PCI_AD8 AD7 SMD7 SM_CLE SMWE# RDY
42 AD8 SMCLE 75 4 WE#
PCI_AD9 41 78 SM_ALE SM_RE# 20
PCI_AD10 AD9 SMALE SM_CE# SM_ALE RD#
40 AD10 SMCE# 77 3 ALE
PCI_AD11 38 80 SMWE# SM_CE# 21
PCI_AD12 AD11 SMWE# SM_RE# SM_CLE CE#
37 AD12 SMRE# 79 2 CLE
PCI_AD13 36 84 SM_WP# 22
PCI_AD14 AD13 SMWP# SM_R/B# SMC_VCC VCC
35 AD14 SMRB# 82 1 VSS
PCI_AD15 34 100 SMCD# 23
PCI_AD16 AD15 SMCD# SM_LVD GND
22 AD16 SMLVD 88 +3V 1 2 SMWPD# 24 WPRO#
PCI_AD17 21 73 SMWPD# R488 @10K
PCI_AD18 AD17 SMWPD# SMEJSW#
20 AD18 SMEJSW# 74
PCI_AD19 19 107 R490 1 2 @100K +3V @SmartMedia Slot
AD19 SMLED#

PCI I/F
PCI_AD20 18 109 R491 1 2 @100K +3V
PCI_AD21 AD20 SMLOCK# R492 1
16 AD21 SMEJCT# 106 2 @100K +3V
PCI_AD22 15 72 SMVC3EN
PCI_AD23 AD22 SMVC3EN C716 @.1UF
14 AD23 SMVC5EN 71
PCI_AD24 10 PWRST# 2 1
PCI_AD25 AD24
9 AD25
PCI_AD26 8 1 2
PCI_AD27 AD26 R525 @10K +3V
7 AD27
C711 PCI_AD28 5 AD28
CLK_PCI_SD/SM 1 2 PCI_AD29 4
R511 @22 PCI_AD30 AD29
3 59

System I/F
AD30 CLK32 RTCCLK 15,17,23,24
PCI_AD31 2 56 PWRST# FCMODE 1 2
@10PF PCI_C/BE#0 AD31 PWRST# R493 @10K +3V
17,21,22,23,28 PCI_C/BE#0 43 CBE0# SUSPEND# 57 SUSP# 30,33,37,41
PCI_C/BE#1 32 58 FCMODE
17,21,22,23,28 PCI_C/BE#1 PCI_C/BE#2 CBE1# FCMODE
17,21,22,23,28 PCI_C/BE#2 31 CBE2# ROM_CS 68
PCI_C/BE#3 11 67 1 2
17,21,22,23,28 PCI_C/BE#3 CBE3# ROM_SK R526 @0
17,19,21,22,23,28 PCI_PAR 30 PAR ROM_D 66 1 2 +3V
24 R498 @100K
17,19,21,22,23,28 PCI_FRAME# FRAME#
17,19,21,22,23,28 PCI_IRDY# 25 IRDY#
17,19,21,22,23,28 PCI_TRDY# 26 TRDY#
1 2 IDSEL0 17,19,21,22,23,28 PCI_STOP# 29 STOP#
RP34
R536 @0 SMD0 1 8
PCI_AD22 R496 1 @100 2 IDSEL0 13 110 R499 1 2 @100K SMD1 2 7
PCI_AD22 IDSEL1 IDSEL0 GPIO0 R500 @100K +3V SMD2
1 2 120 IDSEL1 GPIO1 111 1 2 +3V 3 6
+3V 1 2 IDSEL1 R497 @100
GPIO2 112 R501 1 2 @100K When the serial SMD3 4 5
R514 @100K 55 114 R502 1 2 @100K ROM interface is

GPIO I/F
17,19,22,23,25,28,33 PM_CLKRUN# CLKRUN# GPIO3 R503 @100K +3V not applied need @8P4R_100K
17,19,21,22,23,28 PCI_DEVSEL# 27 DEVSEL# GPIO4 115 1 2
CLK_PCI_SD/SM 125 116 R504 1 2 @100K pull up. RP35
12 CLK_PCI_SD/SM PCICLK GPIO5 R505 @100K SMD4
15,21,22,23,24,28 CBRST# 1 2 123 PCIRST# GPIO6 117 1 2 1 8
R546 @0 121 119 R506 1 2 @100K SMD5 2 7
17,19,28 PIRQC# INTA# GPIO7 SMD6
17,19,28 PIRQD# 122 INTB# 3 6
PCTRST#1 2 128 SMD7 4 5
8,15,17,19,20,21,22,23,24,25,28,35 PCIRST# 33 SM/SD_PME# PME#
R547 @0 126
NC @8P4R_100K
NC 127
SD CARD I/F

RP36
R537 1 2 @100K SDCD0 101 SM_CLE 1 8
R538 @100K SDCD1 SDCD0 SM_ALE
+3V 1 2 102 SDCD1 2 7
R539 1 2 @100K SDCD2 83 SM_WP# 3 6
Test Pins

R540 @100K SDCD3 SDCD2 SM_LVD


1 2 85 SDCD3 4 5
R541 1 2 @100K SDCMD 89 61
SDCMD TEST0 @8P4R_100K
98 SDCLK TEST1 62 1 2
R508 @0
SD Transfer Conn. 1
R542
2
@0
104
105
SDCD# TEST2 63
64
SDWP TEST3
JP28 69
SDCD0 SDCD1 SDPWR SMC_VCC
SDCD2 1 2 SDCD3 RP37
SDCMD 3 4 SDCLK SM_CE#
5 6 GND 1 8
SDCD# SDWP SMWE# 2 7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

SDPWR 7 8 SDLED SM_RE#


9 10 3 6
11 12 +3V 4 5
RXD1
1
12
23
33
44
54
65
76
87
97
108
118

25 RXD1 DSR#1 13 14 @TC6371AF @8P4R_100K


25 DSR#1 CTS#1 15 16 TXD1
25 CTS#1 DTR#1 17 18 RTS#1 TXD1 25 +3V +3V SM_R/B#
25 DTR#1 19 20 RTS#1 25 1 2
DCD#1 RI#1
25 DCD#1 21 22 COM_RI# RI#1 25 R494 @10K
30,33,37,41 SUSP# 23 24
2

25 26 R509 R510
+5V 27 28 @10K @10K
29 30
@SD/COM D43
1

23 PCM_RI# 2 1 RING# 33
@RB751V
Compal Electronics, inc.
1

D
COM_RI# 2 Q62 Title
G @2N7002
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL S
SCHEMATIC, M/B LA-1371
3

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星 薑@, 四月 07, 2003 Sheet 29 of 87
CHB1608U301
+5VOZ 1 2
L42
34,35 STOPBTN# 1 2 1 2 +5VCD
R357 0 L43
CHB1608U301
D34 +5VOZ C575 C561 C607 C562
1 2 OZ_STOPBTN# .1UF .1UF .1UF .1UF
34 CD_STOPBTN#

@RB751V

CDD[0..15]
CDD[0..15] 20
U43

44

58
9
OZ168
IDE_SDD[0..15]

VDD

VDD

VDD
IDE_SDD[0..15] 18
IDE_SDD0 76 77 CD D0
IDE_SDD1 HDD0 CDD0 CD D1
78 HDD1 CDD1 79
IDE_SDD2 81 82 CD D2
IDE_SDD3 HDD2 CDD2 CD D3
83 HDD3 CDD3 84
IDE_SDD4 86 87 CD D4
IDE_SDD5 HDD4 CDD4 CD D5
90 HDD5 CDD5 91
IDE_SDD6 95 96 CD D6
IDE_SDD7 HDD6 CDD6 CD D7
97 HDD7 CDD7 98
IDE_SDD8 2 1 CD D8
IDE_SDD9 HDD8 CDD8 CD D9
4 HDD9 CDD9 3
IDE_SDD10 8 7 CDD10
IDE_SDD11 HDD10 CDD10 CDD11
11 HDD11 CDD11 10
IDE_SDD12 15 14 CDD12
IDE_SDD13 HDD12 CDD12 CDD13
18 HDD13 CDD13 17
IDE_SDD14 20 19 CDD14
IDE_SDD15 HDD14 CDD14 CDD15
22 HDD15 CDD15 21
+5VCD

IDE_SDA0 68 69 CD_SBA0 RP29


18 IDE_SDA0 HDA0 CDA0 CD_SBA0 20
IDE_SDA1 70 71 CD_SBA1 ISCDROM 1 8
18 IDE_SDA1 HDA1 CDA1 CD_SBA1 20
IDE_SDA2 66 67 CD_SBA2 CD_IRQ 2 7
18 IDE_SDA2 HDA2 CDA2 CD_SBA2 20
CDASPN 3 6
IDE_SDCS1# 63 64 CD_SCS1# MODE1 4 5
18 IDE_SDCS1# HCS0 CCS0 CD_SCS1# 20
IDE_SDCS3# 61 62 CD_SCS3#
18 IDE_SDCS3# HCS1 CCS1 CD_SCS3# 20
8P4R_10K

IDE_SDIOR# 99 100 CD_SIOR# RP26


18 IDE_SDIOR# HDIOR# CDIOR# CD_SIOR# 20
IDE_SDIOW# 6 5 CD_SIOW# GPIO_0 1 8
18 IDE_SDIOW# HDIOW# CDIOW# CD_SIOW# 20
72 73 CIOCS16# GPIO_1 2 7
HIOCS16# CIOCS16# CD _SIORDY INTN
18 IDE_SIORDY 93 HIORDY CIORDY 94 CD_SIORDY 20 3 6
4 5

74 75 CD_IRQ 8P4R_10K
X3 17,19 INT_IRQ15 HINTRQ CHINTRQ CD_IRQ 20
IDE_SDDREQ 12 13 CD_DREQ
18 IDE_SDDREQ HDMARQ CDMARQ CD_DREQ 20
OSC1 OSC2 IDE_SDDACK# 88 89 CD_DACK# RP25
18 IDE_SDDACK# HDMACK# CHDMACK# CD_DACK# 20
PLAYBTN# 1 8
REVBTN# 2 7
8MHZ
24 23 CD_RSTDRV# FRDBTN# 3 6
R364 20 SIDE_RST# HRESET# CRESET# CD_RSTDRV# 20
59 60 CDASPN STOPBTN# 4 5
HDASPN CDASPN
48 47 @8P4R_10K
HSYNC SSYNC
1M 53 HBIT_CLK SBIT_CLK 52
55 54 RP33
HDATA_OUT SDATA_OUT CD D3
50 HDATA_IN SDATA_IN 49 1 16
C546 C547 46 45 CD D1 2 15
HACRSTN SACRSTN CD D2
10PF 10PF 1 2 +5VCD 3 14
DM_ON 28 R366 @10K CD D0 4 13
PLAYBTN# PAV_EN CD D4
35 PLAYBTN# 36 PLAY/PAUSE PWR_CTL 51 1 2 5 12
FRDBTN# 35 R372 10K R414 0 CD D6 6 11
35 FRDBTN# FFORWARD
REVBTN# 34 1 2 CD D5 7 10
35 REVBTN# REWIND MEDIA_DETECT 34
OZ_STOPBTN# 37 80 1 2 ISCDROM CD D7 8 9
STOP/EJECT ISCDROM
10UF_16V_1206 39 GPIO_1 R413 @0 @16P8R_4.7K
C542 DM_ON GPIO[1]/VOL_UP GPIO_0
29 PCSYSTEM_OFF GPIO[0]/VOL_DN 40 ** No stuff R414 When stuff OZ163
R358 10K INTN 25 ** No stuff R413 and R375 when stuff OZ168 RP27
34 CD_INTA# INTN R375 @1K CD D8
+5VCD 1 2 30 RESET# 8 9
56 1 2 CD D9 7 10
D36 MODE0 MODE1 CDD10
D1 S1 MODE1 57 6 11
1 2 6 1 26 CDD11 5 12
5,33,40 EC_SMD2 SDATA
Q32A CDD12 4 13
SI1906DL 38 1 2 CDD13 3 14
RB751V PAVMODE CDD14
27 R359 10K Select SM BUS ADDRESS 2 15
2

SCLK CDD15
CSN 41 PULL-HIGH SMBus ID = B4h 1 16
G1

D2 S2 INCN 42 1 2 +5VCD PULL-Low SMBus ID = 34h


3 4 OSC1 31 43 R483 @10K @16P8R_4.7K
5,33,40 EC_SMC2 OSCI UDN
OSC2 32 OSCO
1

Q32B +5VCD CIOCS16# 1 2


GND
GND
GND
GND
GND

SI1906DL +5VCD R367 47K +5VMOD


5
G2

+5VALW R361 R128


16
33
65
85
92

200K 200K R360


2

1 2 R139 100K
+5VCD +5VCD
100K
R519 100K +5VCD
C554 C558 DM_ON
DM_ON 31
1UF_25V_0805 U38 DM_ON#
DM_ON# 31
10UF_16V_1206

D1
+5VALW 1 S D 8
C550 C134

D2
2 S D 7

6
R123 240K 3 6 .1UF
S D
+5VALW 1 2 4 G D 5 10UF_16V_1206 3 SUSP# 2 Q7A
DM_ON 5 Q7B G1
SI4425DY SI1906DL
G2

1
C553 SI1906DL
4

S1
1 2
S2
1

1UF_25V_0805 R117 10K

SUSP# 22K 22K CD_PLAY


Compal Electronics, inc.
29,33,37,41 SUSP# 2 2
CD_PLAY 34 Title
22K 22K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
Q27 Q25 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
3

DTC124EK DTC124EK R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 30 of 87
AC97 Codec
+5VS +5VS C627
U40 R_INT_CD_L 3 1 1 3 LEFT
20 INT_CD_L
4 VIN VOUT 5 VDDA 1UF_25V_0805 Q37 Q38

1
C580 C577 2 6 2N7002 2N7002

2
DELAY SENSE

1
C552
4.7UF_10V_0805 .1UF 7 1 input to AMPLIFY

2
ERROR CNOISE 4.7UF_10V_0805

2
8 3 C635
ON/OFF# GND

1
C564 R_INT_CD_R 3 1 1 3 RIGHT
20 INT_CD_R
SI9182
.1UF 1UF_25V_0805 Q45 Q46

2
2N7002 2N7002

2
DM_ON
30 DM_ON

+5VAMP_PU
R449 R450
22K 10K
1 2 2 1 R_INT_CD_L 3 1 1 3 CDROM_L
+3VS

1
Q48 Q49
R445 2N7002 2N7002

2
@10K
C634
10UF_10V_1206 input to CS 4297A

2
R451
AVDD_AC97 10K
L37 R_INT_CD_R CDROM_R
+5VAMP_PU 2 1 3 1 1 3
VDDA 1 2

1
VDDC Q51 Q50
CHB2012U170 R124 R452 2N7002 2N7002

2
1 2 +3VS @10K

1
C565 C599 C579 0_0603

2
1

1
4.7UF_10V_0805
.1UF C568
.1UF
2

2
4.7UF_10V_0805

2
DM_ON#
30 DM_ON#

25

38

9
U41 C571
2 1 1000PF

AVCC

AVCC

VCC

VCC
C573
2 1 AUD_VREF 1 2 1000PF
R418 6.8K C567
2 1 14 35 LINEL 1 2 4.7UF_10V_0805 LEFT
AUX_L LINE_OUT_L LEFT 32
R402 6.8K C566
15 36 LINER 1 2 4.7UF_10V_0805 RIGHT
AUX_R LINE_OUT_R RIGHT 32
2 1 C557
32 LINE_IN_L
R417 6.8K 16 37 1 2 1UF_25V_0805
VIDEO_L MONO_OUT MD_MIC 15
2 1 C559
32 LINE_IN_R
R403 6.8K 17 39 2 1 1000PF
VIDEO_R HP_OUT_L
2 1
R405 6.8K 1 2 23 41
C597 1UF_25V_0805 LIN_IN_L HP_OUT_R
2 1 IAC_BITCLK 15,17
R408 6.8K 1 2 24 R374 22
C598 1UF_25V_0805 LIN_IN_R R81 10K
BIT_CLK 6 1 2
CDROM_L 2 1 CD_L_R 1 2 18 R377 1 2
R406 20K C595 1UF_25V_0805 CD_L
SDATA_IN 8 1 2 22 IAC_SDATAI0 17
CDROM_R 2 1 CD_R_R 1 2 20
R407 20K C596 1UF_25V_0805 CD_R C570
XTL_IN 2
CD_GNA 1 2 19 22PF
C602 1UF_25V_0805 CD_GNA Y3 NPO
MIC 1 2 21
32 MIC MIC1 24.576MHz
C603 1UF_25V_0805
1 2 2 1 AUD_VREF 22 MIC2 XTL_OUT 3
C606 1000PF R404 2.4K C572
1 2 2 1 1 2 13 29 1 2 22PF
15 MD_SPK PHONE AFLT1
C604 1UF_25V_0805 R393 10K C600 1UF_25V_0805 C589 1000PF NPO
12 30 NPO 1 2
32 MONO_IN PC_BEEP AFLT2 C583 1000PF
28 NPO 1 2
VREFOUT AUD_VREF
2 1 11 R396 0
15,17 IAC_RST# RESET#
R379 100 27
REFFLT
15,17 IAC_SYNC 10 SYNC
FLT3D 32
15,17 IAC_SDATAO 5 SDATA_OUT

1
1
45 ID0# BPCFG 31
46 33 C591 C584

2
ID1# FLTI

1
34 .1UF 1UF_25V_0805

2
FLTO C581 C574
32 EAPD 47 EAPD# NC 43
44 R380 .01UF AUD_VREF

2
NC C576 @100K 1UF_25V_0805 L44 CHB2012U170
48 S/PDIF_OUT
1

40 1 2
1
NC
4 GND AGND 26
7 42 1000PF L40 CHB2012U170
2

GND AGND NPO 1 2

1
C593
CS4299A L38 CHB2012U170 C594
1 2 .1UF 4.7UF_10V_0805

2
2 1 CD_GNA
20 CD_AGND R416 3.3K
1

R427 R415
Title
Compal Electronics, inc.
0 3.3K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
2

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 31 of 87
A B C D E

+5VCD
+5VCD
AMP & Audio Jack

1
U56 D39

2
LM7111 +5VCD R401 2 Q42 3 3
+ 3 VOL_AMP 33 100K

1
VOL_OP 1 W=40Mil 2SB1188 1
Q53 DTC314TK R430 +5VCD
4

1
10K
- SHUTDOWN# 1 2 2

1
C601 C612 2.2K

1
C712 R512 Q30 INTSPK_R1 1 R420 2.2K
2 1 3

1 2
1
4 @1000PF 1.65K .1UF 4.7UF_10V_0805 2 DAN217 4
EAPD 31

2
1 2 R444 33 R419 C620
4.7K

3
2

10K
2N7002 Q52 DTC314TK 10UF_16V_1206

2
R513

2
INTSPK_R2 1 2 1 3
10K
U46 R443 33

1
7 PVDD SHUTDOWN# 22

1
18 15 NBA_PLUG 2 1
PVDD SE/BTL# +5VCD

2
19 14 C637 1 2 R448 100K C626
R432 100K VDD PC-BEEP .1UF Q43 DTC314TK 4.7UF_10V_0805
11

2
BYPASS

10K
1 2 2 9 INTSPK_L2
VOL_OP PC-ENABLE LOUT- INTSPK_R2
3 VOLUME ROUT- 16
INTSPK_L1 4 10 INTSPK_L1 1 2 1 3
INTSPK_R1 LOUT+ LIN
21 ROUT+ RIN 8

2
1 2 U3-5 5 R446 33
31 LEFT C615 .47UF U3-23 LLINEIN
23 RLINEIN GND 1

10K
1 2 U3-6 6 12 C618 C625 C622 Q44 DTC314TK
31 RIGHT U3-20 LHPIN GND
20 RHPIN GND 13
C644 .47UF 24 .47UF .47UF .47UF INTSPK_L2 1 2 1 3

2
C610 .47UF GND
17 CLK
1 2 R447 33
C630 JP20

1
1 2 TPA0132 5

C643 .47UF .047UF_0805 4

2
1
C613 FBM-11-160808-700T
31 LINE_IN_R 1 2 3 LINE_IN JACK
3 @.1UF L46 6 3

2
31 LINE_IN_L 1 2 2
JP16 L47 1
INTSPK_R1 FBM-11-160808-700T
1

1
INTSPK_R2 C685 C680
INTSPK_L1 2 PHONEJACK
INTSPK_L2 3 330PF 330PF

2
4
ACES 85205-0400

JP23
1 2 5
R479 1K
C633 NBA_PLUG 4
150UF_6.3V_D2 L49 SPEAKER OUT

+ +
+3V +3V INTSPK_R1 1 2 1 2 1 2 INTSPK_R1-3 3
R480 47 FBM-11-160808-700T 6 JACK
33 BEEP#
VDDA INTSPK_L1 1 2 1 2 1 2 INTSPK_L1-3 2
1

C551 R481 47 L50 1


R345 1 2 C623 FBM-11-160808-700T
1

1
100K 150UF_6.3V_D2 C697 C696
U37B .1UF R392 PHONEJACK
74LVC125 10K 330PF 330PF
14
2

2
4

U36A
C528 R333
2

5 6 1 2 1 2 1 2 1 2
R350 8.2K
560
1

2 74LVC14 1UF_10V_0603 C611 2


1

+3V POWER C539 +3V POWER R397


7

10K 10UF_16V_1206
2

.22UF
2

AVDD_AC97
2

C588
1 2 MONO_IN R457
MONO_IN 31

1
18K_1%
1

C586 R390 1UF_10V_0603 1 2 2 Q47


AVDD_AC97
2

1 2 1 2 2 2SC2411K
23 PCM_SPK#

1
Q34 R409 1 2

3
1UF_10V_0603 560

1
2SC2411K 2.4K R456 18K_1% C648
3

1
1

2
1UF_10V_0603 R476

2
+3V R464
100K_1% 2.2K JP21
5

2
14

4
U36B EXT.
C587 R391 3 MICPHONE
3 4 1 2 1 2 6
18 ICH_SPKR MIC 1 2 2 JACK
560 31 MIC
74LVC14 1UF_10V_0603 L48 1
+3V POWER FBM-11-160808-700T
7

1
R389 C694 PHONEJACK
10K D33 220PF

2
1 1
RB751V
2

Title
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 32 of 87
A B C D E
5 4 3 2 1

+3VALW 1 2
+3VALW R79 0 +3VALW EC_AVCC +RTCVCC KBA[0..18]
34 KBA[0..18] +3V 1 2
1 2 51VDD ADB[0..7] R258 10K
+3VS 34 ADB[0..7] KSI[0..7]
R74 @0
15 KSI[0..7]
1

1
C374 C378 C430 C108 C90 C377 C53 KSO[0..15] MMO_ON 1 2
15 KSO[0..15] VR_ON 43

123
136
157
166

161
.1UF .1UF .1UF .1UF 1000PF 1000PF .1UF D22 RB751V

16

34
45

95
2

2
U34
2 1

VBAT
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VDD

AVCC
KBA0 +3VS R283 10K
IOPH0/A0/ENV0 124
INVT_PWM 32 125 KBA1
EC_AVCC +3VALW 15 INVT_PWM IOPA0/PWM0 IOPH1/A1/ENV1 KBA2 ATFOUT# 1
32 BEEP# 33 IOPA1/PWM1 IOPH2/A2/BADDR0 126 2 ATF_INT# 17
+RTCVCC L31 For PWM 36 127 KBA3
EN_DFAN IOPA2/PWM2 IOPH3/A3/BADDR1 KBA4 D23 RB751V
D 1 2 39 ACOFF 37 IOPA3/PWM3 IOPH4/A4/TRIS 128 D
CHB1608U800 38 131 KBA5
17 PM_BATLOW# IOPA4/PWM4 IOPH5/A5/SHBM
1

C375 C510 39 132 KBA6


35 51ON IOPA5/PWM5 IOPH6/A6
40 133 KBA7
19 EC_LID_OUT# IOPA6/PWM6 IOPH7/A7
.1UF .1UF 43
23 PCM_SUSP#
2

ECAGND IOPA7/PWM7 KBA8


IOPK0/A8 143
KSO16 EC_URXD 153 142 KBA9
KSO17 EC_UTXD IOPB0/URXD IOPK1/A9 KBA10
154 IOPB1/UTXD IOPK2/A10 135
EC_USCLK 162 134 KBA11
28 EN_WOL# IOPB2/USCLK IOPK3/A11
EC_SMC1 163 130 KBA12
34,40 EC_SMC1 IOPB3/SCL1 IOPK4/A12
EC_SMD1 164 129 KBA13
34,40 EC_SMD1 IOPB4/SDA1 IOPK5/A13/BE0
165 121 KBA14
+3VS 25 LPC_RST# IOPB7/RING#/PFAIL# IOPK6/A14/BE1 KBA15
IOPK7/A15/CBRD 120
19 PBTN_OUT# 168 IOPC0
EC_SMC2 169 113 KBA16
5,30,40 EC_SMC2 IOPC1/SCL2 IOPL0/A16
EC_SMD2 170 112 KBA17
5,30,40 EC_SMD2 IOPC2/SDA2 IOPL1/A17
2

171 104 KBA18


35 FAN_SPEED IOPC3/TA1 IOPL2/A18
R292 R285 PCI_PME# 172 103 KBA19
10K 10K ATFOUT# IOPC4/TB1/EXWINT22 IOPL3/A19
175 IOPC5/TA2 IOPL4/WR1# 48 FSTCHG 39,40
35 MP3# 176 IOPC6/TB2/EXWINT23
D25 PC7 1 138 ADB0
35 PC7
1

G20 IOPC7/CLKOUT IOPI0/D0 ADB1


17 GATEA20 2 1 IOPI1/D1 139
AC IN 26 140 ADB2
18,35,38,41 ACIN IOPD0/RI1#/EXWINT20 IOPI2/D2
RB751V RING# 29 141 ADB3
29 RING# IOPD1/RI2#/EXWINT21 IOPI3/D3
D24 30 144 ADB4
RCL# 12,17 PM_SLP_S3# SCR_LED# 41 IOPD2/EXWINT24 IOPI4/D4 ADB5
17 RC# 2 1 IOPD4 IOPI5/D5 145
42 146 ADB6
35 NUM_LED# IOPD5 IOPI6/D6
RB751V 54 147 ADB7
35 CAPS_LED# IOPD6 IOPI7/D7
35 ARROW_LED# 55 IOPD7
C 150 FR D# C
IOPJ0/RD# FRD# 34
19 EC_SMI# 62 IOPJ2/BST0 IOPJ1/WR0# 151 FWR# 34
VGA_SUSP# 63 IOPJ3/BST1 SELIO#
24 G_RST# 69 IOPJ4/BST2 SELIO# 152 SELIO# 34
19 EC_RIOUT# 70 IOPJ5/PFS#
D19 RB751V 75 173 FSEL#
40 A/B#USE IOPJ6/PLI SEL0# FSEL# 34
29 SM/SD_PME# 1 2 1 2 +3VALW 12,17 PM_SLP_S1# 76 IOPJ7/BRKL_RSTO# SEL1# 174

D20 R265 10K BATT_TEMPA 81 148 SYSON


40 BATT_TEMPA AD0 IOPM0/D8 SYSON 37
1 BATT_TEMPB 82 149 SUSP#
22 1394_PME# 40 BATT_TEMPB AD1 IOPM1/D9 SUSP# 29,30,37,41
3 VBATTA 83 155 MMO_ON
VBATTB AD2 IOPM2/D10
23 PCM_PME# 2 84 AD3 IOPM3/D11 156 TRICKLE 40
VTT_ON +3VALW
IOPM4/D12 3 VTT_ON 44
RB717F 87 4 VTT_PWRGD#
40 ALI/MH# IOPE0AD4 IOPM5/D13 VTT_PWRGD# 5,12
D21 88 27 ENVEE
40 BLI/MH# IOPE1/AD5 IOPM6/D14 ENVEE 15
1 BATT_CHGI 89 28 ENBKL
28 WLANPME# IOPE2/AD6 IOPM7/D15 ENBKL 15
3 ADP_I 90 KBA0 1 2
IOPE3/AD7 KBD_CLK R129 @1K
21 LAN_PME# 2 19,35 ON/OFF 2 IOPE4/SWIN PSCLK1/IOPF0 110
44 111 KBD_DATA KBA1 1 2
17 PM_SLP_S5# IOPE5/EXWINT40 PSDAT1/IOPF1 PS2_CLK R130 1K
RB717F 114
OEM PSCLK2/IOPF2 PS2_DATA KBA2
93 DP/AD8 PSDAT2/IOPF3 115
D44 RB751V OEM 94 116 TP_CLK R131 @1K
DN/AD9 PSCLK3/IOPF4 TP_CLK 15
1 2 PCI_PME# 117 TP_DATA KBA3 1 2
17 ICH_WAKE_UP# PSDAT3/IOPF5 TP_DATA 15
99 118 R132 1K
15 DAC_BRIG DA0 PSCLK4/IOPF6 LID_SW# 35
100 119 KBA4
32 VOL_AMP DA1 PSDAT4/IOPF7 CDON#/MP3 35
101 R133 @1K
39 IREF DA2
102 71 KSI0 KBA5 1 2
35 EN_DFAN DA3 KBSIN0
ECAGND 1 2 BATT_TEMPA 72 KSI1 R134 1K
C521 .01UF EC_TINIT# KBSIN1 KSI2
105 TINT# KBSIN2 73
B BATT_TEMPB EC_TCK KSI3 B
1 2 106 TCK KBSIN3 74
C522 .01UF EC_TDO 107 77 KSI4
+3VALW EC_TDI TDO KBSIN4 KSI5
108 TDI KBSIN5 78
RP16 EC_TMS 109 79 KSI6
G_RST# TMS KBSIN6 KSI7
1 8 KBSIN7 80
2 7 FR D#
3 6 SELIO# LPC_AD[0..3] 49 KSO0
FSEL# 17,25 LPC_AD[0..3] LPC_AD0 KBSOUT0 KSO1
4 5 15 LAD0 KBSOUT1 50 I/O Address
LPC_AD1 14 51 KSO2
LPC_AD2 LAD1 KBSOUT2 KSO3
8P4R_10K 13 LAD2 KBSOUT3 52 BADDR1(KBA3) BADDR0(KBA2) Index Data
LPC_AD3 10 53 KSO4
LAD3 KBSOUT4 KSO5
KBSOUT5 56 0 0 2E 2F
9 57 KSO6
17,25 LPC_FRAME# LFRAME# KBSOUT6 KSO7
17,19 LPC_DRQ#0 1 2 8 LDRQ# KBSOUT7 58 0 1 4E 4F
+5VALW R293 @0 7 59 KSO8
17,19,23,25 INT_SERIRQ SERIRQ KBSOUT8 KSO9
KBSOUT9 60 * 1 0 (HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1
51RST# 19 61 KSO10
EC_SMC2 35 EC_RST# LREST# KBSOUT10 KSO11
1 2 22 SMI# KBSOUT11 64 1 1 Reserved
R237 4.7K 23 65 KSO12
EC_SMD2 PWUREQ# KBSOUT12 KSO13
1 2 35 LPCPD# 24 IOPE6/LPCPD#/EXWIN45 KBSOUT13 66
R236 4.7K KSO14 R266
17,19,22,23,25,28,29 PM_CLKRUN# 25 IOPE7/CLKRUN#/EXWINT46 KBSOUT14 67
68 KSO15 C RY1 1 2 C RY2 ENV0 (KBA0) ENV1 (KBA1) TRIS (KBA4)
KBSOUT15
19 EC_SCI# 31 IOPD3/ECSCI#

2
JP25 G20 C RY1 20M IRE 0 0 0
5 GA20/IOPB5 32KX1/32KCLKOUT 158
1 RCL# 6 R267 * OBD 0 1 0
1 +3VALW KBRST#/IOPB6
2 EC_TINIT# 160 C RY2 120K DEV 1 0 0
2 EC_TCK 32KX2
3 3 12 CLK_LPC_EC 18 LCLK
PROG 1 1 0
AGND
GND1
GND2
GND3
GND4
GND5
GND6
GND7

NC10

4 EC_TDO 47 X1
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9

1
4 EC_TDI CLK
A 5 5 SHBM(KBA5)=1: Enable shared memory with host BIOS A
6 EC_TMS TRIS(KBA4)=1: While in IRE and OBD, float all the
6

1
7 1 2 1 2 PC87591VPC 32.768KHZ signals for clip-on ISE use
17
35
46
122
137
159
167

96

11
12
20
21
85
86
91
92
97
98

7 EC_URXD C478 @22PFR304 @33 C376 C346


8 8
9 EC_UTXD 2 10PF 12PF

2
9 EC_USCLK L32
10
10 ECAGND 1 2
CHB1608U800
Compal Electronics, inc.
@96212-1011S Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 33 of 87
5 4 3 2 1
+3VALW
C315 +5VALW .1UF
C289
1 2
1 2
.1UF

20
U31

20
2 18 ADB0 U27

VCC
35 BUTTON1# 1A1 1Y1
4 16 ADB1 +3VALW ADB0 3 2

VCC
35 INTERNET# 1A2 1Y2 D0 Q0 EXTIDEPWR# 20
6 14 ADB2 RP12 +3VALW ADB1 4 5
30 CD_INTA# 1A3 1Y3 C284 D1 Q1 MDC_DN# 15
PCM_LED 8 12 ADB3 ADB2 7 6
1A4 1Y4 D2 Q2 BT_DETACH 27
11 9 ADB4 DD 1 8 1 2 ADB3 8 9 1 2
20 SHDD_LED# 2A1 2Y1 D3 Q3 RFOFF# 27,35
13 7 ADB5 AA 2 7 ADB4 13 12 R221 0
20 PHDD_LED# 2A2 2Y2 D4 Q4 BT_RESET# 27
15 5 ADB6 BB 3 6 ADB5 14 15
20,25 DRV0# 2A3 2Y3 U25A D5 Q5 CD_PLAY 30
ADB7 CC .1UF ADB6

14
24 OCCB# 17 2A4 2Y4 3 4 5 17 D6 Q6 16 HDD_LED# 35
74LVC32 ADB7 18 D7 Q7 19 2ND_CHGI_CD_FDD_LED# 35
+3VALW 1 8P4R_100K KBA2 1

GND
1G AA
19 3 11

GND
U25B 2G SELIO# LARST# CLK

14
2 1 CLR
74LVC32 74LVC244

10
KBA1 4 74HCT273

10
6 CC
SELIO# 5
33 SELIO# R268 C342

+5VALW 1 2 1 2

7
20K 1UF_25V_0805
1

R243

100K
D12 +5VALW
2

C243
23 PCM1_LED 1
3 PCM_LED +3VALW 1 2
C316
23 PCM2_LED 2
1 2 .1UF

20
DAN202U .1UF U26

20
U32 ADB0 3 2

VCC
D0 Q0 PWR_LED# 35
2 18 ADB0 ADB1 4 5

VCC
20 EXTID0 1A1 1Y1 D1 Q1 2nd_BATT_LOW_LED# 35
4 16 ADB1 ADB2 7 6
20 EXTID1 1A2 1Y2 D2 Q2 BATT_LOW_LED# 35
6 14 ADB2 ADB3 8 9
20 EXTID2 1A3 1Y3 D3 Q3 BATT_CHGI_LED# 35
8 12 ADB3 +3VALW ADB4 13 12
27 BT_WAKE_UP 1A4 1Y4 D4 Q4 WL_OFF# 28
11 9 ADB4 ADB5 14 15
30 MEDIA_DETECT 2A1 2Y1 U25C D5 Q5 CD_STOPBTN# 30
ADB5 ADB6

14
35 VOL_UP# 13 2A2 2Y2 7 17 D6 Q6 16 PCMRST# 24
ADB6 74LVC32 ADB7
35 VOL_DW# 15 2A3 2Y3 5 18 D7 Q7 19 EN_LAN# 21
17 3 ADB7 KBA4 9
28,35 KILL_SW 2A4 2Y4 BB
8 11

GND
+3VALW SELIO# LARST# CLK
1 10 1
GND

1G CLR
U25D 19 2G 74HCT273
14

10
74LVC32 74LVC244
10

KBA3 12
11 DD
SELIO# 13
7

+5VALW
+3VALW +3VALW +3VALW
C290 +5VALW +5VALW +5VALW

1
C280
1 2

1
R433
1 2 1 2 R205

1
.1UF C608 .1UF R398
20

1 2 +12VS 100K
U24 100K R206 R214 .1UF
100K

2
MP3_STOPBTN# ADB0 U21

G
2 18
VCC

35 MP3_STOPBTN#

2
1A1 1Y1

5
MP3_PLAYBTN# 4 16 ADB1 Q36 4.7K 4.7K 8 1
35 MP3_PLAYBTN#

2
MP3_FRDBTN# 1A2 1Y2 ADB2 VCC A0
35 MP3_FRDBTN# 6 14 2 1 3 7 2

2
+3VALW MP3_REVBTN# 1A3 1Y3 ADB3 FWE# EC_FLASH# 18 WC A1
8 12 4 6 3

S
C331 35 MP3_REVBTN# 1A4 1Y4 33,40 EC_SMC1 SCL A2
11 9 ADB4 1 2N7002 5 4
30,35 STOPBTN# 2A1 2Y1 FWR# 33 33,40 EC_SMD1 SDA GND
1 2 1 R26 2 100K 13 2A2 2Y2 7 ADB5 U44
1 2 100K 15 5 ADB6 7SH32FU NM24C16

3
.1UF R28 B ID 2A3 2Y3 ADB7
1 2 17 2A4 2Y4 3
5

R29 @100K

1
KBA5 2 U30 1 R27 2 1
GND

100K 1G
4 19 2G
SELIO# 1 2 R557 1 @100K R198
+3VALW 74LVC244 100K
2 1
10

R558 @100K
3

2
7SH32FU
1 2 +5VALW
R159 @0 1 2
C158 .1UF U16
1 2 +3VALW
C151 R156 0 U14
1 2 FLASH_VCC KBA11 1 32 FR D#
U15 KBA18 KBA9 A11 OE# KBA10
1 NC VCC 32 FLASH_VCC 2 A9 A10 31
.1UF KBA16 2 31 FWE# KBA8 3 30 FSEL#
KBA11 FR D# KBA15 A16 WE* KBA17 KBA13 A8 CE# ADB7
1 A11 OE# 32 FRD# 33 3 A15 A17 30 4 A13 DQ7 29
KBA9 2 31 KBA10 KBA12 4 29 KBA14 KBA14 5 28 ADB6
KBA8 A9 A10 FSEL# KBA7 A12 A14 KBA13 KBA17 A14 DQ6 ADB5
3 A8 CE# 30 FSEL# 33 5 A7 A13 28 6 A17 DQ5 27
KBA13 4 29 ADB7 KBA6 6 27 KBA8 FWE# 7 26 ADB4
KBA14 A13 DQ7 ADB6 KBA5 A6 A8 KBA9 WE# DQ4 ADB3
5 A14 DQ6 28 7 A5 A9 26 FLASH_VCC 8 VCC DQ3 25
KBA17 6 27 ADB5 KBA4 8 25 KBA11 KBA18 9 24
FWE# A17 DQ5 ADB4 KBA3 A4 A11 FR D# KBA16 A18 VSS ADB2
7 WE# DQ4 26 9 A3 OE* 24 10 A16 DQ2 23
8 25 ADB3 KBA2 10 23 KBA10 KBA15 11 22 ADB1
KBA18 VCC DQ3 KBA1 A2 A10 FSEL# KBA12 A15 DQ1 ADB0
9 A18 VSS 24 11 A1 CE* 22 12 A12 DQ0 21
KBA16 10 23 ADB2 KBA0 12 21 ADB7 KBA7 13 20 KBA0
KBA15 A16 DQ2 ADB1 ADB0 A0 DQ7 ADB6 KBA6 A7 A0 KBA1
11 A15 DQ1 22 13 DQ0 DQ6 20 14 A6 A1 19
KBA12 12 21 ADB0 ADB1 14 19 ADB5 KBA5 15 18 KBA2
KBA7 A12 DQ0 KBA0 ADB2 DQ1 DQ5 ADB4 KBA4 A5 A2 KBA3
13 A7 A0 20 15 DQ2 DQ4 18 16 A4 A3 17
KBA6 14 19 KBA1 16 17 ADB3
KBA5
KBA4
15
A6
A5
A1
A2 18 KBA2
KBA3
VSS DQ3
@29F040_TSOP
Compal Electronics, inc.
16 A4 A3 17
29F040/SST39VF040_PLCC Title

@SST39VF040_TSOP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
KBA[0..18] AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
33 KBA[0..18] R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
ADB[0..7] B 1B
33 ADB[0..7] MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 34 of 87
5 4 3 2 1

+3VS RP9

1 8 MP3_STOPBTN#
2 7 MP3_PLAYBTN#
+3VALW 3 6 MP3_FRDBTN#
4 5 MP3_REVBTN#

1
+3VALW 8P4R_10K
R85
MP3_FRDBTN# 2 1 FRDBTN#
34 MP3_FRDBTN#

1
470K D29 RB751V
R273

2
EC_RST# MP3_REVBTN# 2 1 REVBTN#
EC_RST# 33 34 MP3_REVBTN#
D 470K D28 RB751V D

1
Q26 MP3_STOPBTN# 2 1 STOPBTN#
34 MP3_STOPBTN#
2 D30 RB751V
33 PC7
2N7002
MP3_PLAYBTN# 2 1 PLAYBTN#
34 MP3_PLAYBTN#

3
D31 RB751V

JP6
19,33 ON/OFF 1 2 51ON# 38
33 51ON 3 4 LID_SW# 33
34 2nd_BATT_LOW_LED# 5 6 MP3# 33
1 2 SMLED
27,34 RFOFF# 7 8 SM_LED 29
R19 @0
28,34 KILL_SW 9 10 CAPS_LED# 33
33 ARROW_LED# 11 12 NUM_LED# 33
34 INTERNET# 13 14 BUTTON1# 34
34 VOL_DW# 15 16 VOL_UP# 34
18,33,38,41 ACIN 17 18 PWR_LED# 34
34 BATT_LOW_LED# 19 20 BATT_CHGI_LED# 34
+3VALW 34 HDD_LED# 21 22 2ND_CHGI_CD_FDD_LED# 34
33 CDON#/MP3 23 24
FRDBTN# REVBTN#
30 FRDBTN# 25 26 REVBTN# 30
1 2 STOPBTN# PLAYBTN#
30,34 STOPBTN# 27 28 PLAYBTN# 30
C321 .1UF
C U28 29 30 C
31 32
5

33 34
8,15,17,19,20,21,22,23,24,25,28,29 PCIRST# 1 +5VALW 35 36 +3VALW
4 LPCPD#
LPCPD# 33 37 38
15,17,21,25 SUS_STAT# 2 +3V 39 40 +3VS
SUYIN-80065A-040G2T
3

LPCPD# 7SH08FU
R233 @0

For PC87591 REV 0.A Only

FAN CONN.
+12V

+5V

1
R160

3.6K

1
B C C569 B

2
2 Q29 D38
B FMMT619 @10UF_16V_1206

2
1

1
+5V E

3
C548 D37 C157 1SS355

2
1 2 FAN1

2
D46 .1UF C556 .1UF 1N4148 .1UF JP10

1
1 2 2 1

1
+5VS 1

5
Q64 VCC U39 D35
2
1

@DTC114YKA R543 @110 EN_DFAN 1 1N4148


@HSMB-C110 BLUE 33 EN_DFAN 3
4 Q33
1 2 3 2SA1036K 53398-0310-FAN

2
10K R113
SMLED 2 13K_1% VEE LMV321_SOT23-5

2
+3V

47K

1
1 2
3

FOR SM LED R347 R369


7.32K_1%
10K

2
33 FAN_SPEED

A A

Compal Electronics, inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 35 of 87
5 4 3 2 1
A B C D E

+3V

RTC Batt. Connector +3V +3V


R105
+RTCVCC BATT1 +RTC_BATT 47K

14

14
C141 U36C U36D
2 1 1 2 R101
5 6 9 8 PM_RSMRST#
PM_RSMRST# 17
.1UF
- +

1
330K 74LVC14 74LVC14
RTCBATT C526

7
1 .22UF +3V POWER +3V POWER 1

2
1 2 1 2 CHGRTC
W=30mils W=30mils
D3 D1
RB751V RB751V +5V +3V
C111
1

1 2

1
C131 +3V
.1UF R106 U35
2

5
Place near ICH3-M .1UF

14
47K U36E 2
R102
4

2
1 2 11 10 1

1
330K 74LVC14

3
C113 7SH32FU

7
2
.1UF

H30 H31 H32 H33 H35 H37 H38 H39

+3VS
2 C136 .1UF 2
+5VS 1 2
1

1
U11 U37C

10
EMI FINGER EMI FINGER EMI FINGER EMI FINGER EMI FINGER EMI FINGER EMI FINGER EMI FINGER R126 MAX6342 74LVC125

1
100K 5 6 9 8

VCC
MR# RST# SYS_PWROK 17

2
ST1 H18 H2 H8 ST2 ST3 ST4
3 PFI

1
1
4 +3V POWER R103

GND
PFO#

1
R127 C137 C138
10K

2
240K .01UF .1UF
1

2
Screw Boss 070 Stand-Off 090 Stand-Off 115 Stand-Off 053 Stand-Off 053 Stand-Off 053 Stand-Off 090

+3V
H12 H27 H10 H9

1
R97

100K
U37D

13
1

2
74LVC125
3 3
J CPU Thermal Plane Screw Hold J CPU Thermal Plane Screw Hold J CPU Thermal Plane Screw Hold J CPU Thermal Plane Screw Hold 12 11 1 2
43 VGATE ICH_VGATE 17
R107 @0

+3V POWER
H3 H28 H23 H1 H4 H29 H20 H5 H22

CF11 CF18 CF15 CF13 CF16 CF2 CF4 CF1 CF9


SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80
1

I Fixed Position Hold F Fixed Position Hold M Fixed Position Hold


A Screw Hold C Screw Hold D Screw Hold F Screw Hold G Screw Hold I Screw Hold

1
H11 H24 H14 H13 H7 H17 H21 H19 H26 CF10 CF6 CF7 CF8 CF3 CF5 CF19 CF20 CF17 CF12
SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80

1
1

FD2 FD1 FD3 FD5 FD4 FD6


L Screw Hold M Screw Hold N Screw Hold O Screw Hold O Screw Hold O Screw Hold O Screw Hold O Screw Hold O Screw Hold FIDUCAL FIDUCAL FIDUCAL FIDUCAL FIDUCAL FIDUCAL
4 4

1
H25 H16 H15 H6

Compal Electronics, inc.


Title
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
E HDD Frame Hold E HDD Frame Hold E HDD Frame Hold E HDD Frame Hold AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 36 of 87
A B C D E
A B C D E

+5VALW To +5V Transfer


+3VALW To +3V Transfer
+3VALW +3V +5VALW +5V +1.5V TO +1.5V_SW Transfer
U47 U20 C245
7 3 7 3 4.7UF_10V_0805
VIN S2 VIN S2 +1.5V +1.5VS
6 VIN S2 4 6 VIN S2 4
1

1
C246 U4
5 VIN VHV 8 5 VIN VHV 8

1
C628 1 C636 C639 1 C247 8 1
S1 4.7UF_10V_0805 S1 D S
2 2 7 2
2

2
4.7UF_10V_0805 VON/OFF VON/OFF D S

1
4.7UF_10V_0805 1UF_25V_0805 1UF_25V_0805 6 3

2
D S +5VS_GATE C20 C23 C25
SI4702DY SI4702DY 5 D G 4
1 1UF_10V_0603 4.7UF_10V_0805 4.7UF_10V_0805 1

2
1

1
SYSON# ON_GATE 2 1 SYSON# ON_GATE SI4800 R20
+12VALW C16

2
1

1
R438 C242 D Q12 4.7UF_10V_0805 1K

1
C624 R440 100K SYSON# 2

1 2
1M .01UF G 2N7002

2
.01UF D
S

3
SUSP 2 Q5

2
G 2N7002
S

3
+3VALW To +3VS Transfer
+3VALW +3VS +1.8V_ALW TO +1.8V_SW Transfer
U22 1UF_10V_0603
+1.8V +1.8VS
7 VIN S2 3
U3
6 VIN S2 4
1

5 8 C268 8 1
VIN VHV 1 D S

1
1 C277 C6 C258 C260 7 2
S1 D S

1
SUSP 2 6 3
2

VON/OFF 10UF_16V_1206 10UF_16V_1206 10UF_16V_1206 10UF_16V_1206 D S +5VS_GATE C22 C17 C24


5 4
2

2
D G
1

SI4702DY 1UF_10V_0603 4.7UF_10V_0805 4.7UF_10V_0805

2
1

1
C323 +3V +3VS
4.7UF_10V_0805 SI4800 R23
2

C14

2
1
+5VS_GATE 1 2 +12V 4.7UF_10V_0805 1K
2 R212 100K R183 R193 2

1 2
1

470 1K
R211 D
1

C26 1M SUSP 2 Q56

1 2
.1UF G 2N7002

1
D D
S
2

3
SYSON# 2 SUSP 2
G Q16 G Q19
S 2N7002 S 2N7002

3
+5VALW To +5VS Transfer
+5V +5VS
+5VALW +5VS +1.8V
U50

1
7 VIN S2 3
6 4 R182 R465
VIN S2

1
5 8 470 1K
VIN VHV
1

1 C672 C675 C677 C679 C676 C8 C10 C9


SUSP S1 C13 1UF_10V_0603 4.7UF_10V_0805 4.7UF_10V_0805
2

1 2

2
VON/OFF 4.7UF_10V_0805 .1UF 4.7UF_25V_1206 4.7UF_25V_1206 4.7UF_25V_1206 4.7UF_10V_0805
2

1
D D
SI4702DY
SYSON# 2 SUSP 2
1

G Q15 G Q55
C658 +5VS_GATE S 2N7002 S 2N7002

3
4.7UF_10V_0805 Q2
2

1
1

R436 D 2N7002
C621 2 SUSP
3 .01UF 330K G 3
2

S
2

+3VALW
+12VALW
+12VALW To +12V Transfer +3VALW
+12VALW To +12VS Transfer

1
+12VALW +12V +12VS

1
+12VALW R210
1

R216
2

1
C239 R180 +12VALW 10K
1

100K C238 R178 R467 4.7K

2
1

.1UF_25V_0805 SYSON#

D1
SYSON# 42
1

2
3

S
1UF_25V_0805 C682 R469 1K 1K SUSP

D2
2

6
G
2 Q11 100K Q22A
1 2

1 2

3
NDS352P .1UF_25V_0805 C684 2 SI1906DL
33 SYSON
2
1

D S D D G1 SUSP# 5
1

R179 G
Q58 1UF_25V_0805 SYSON# 2 SUSP 2 29,30,33,41 SUSP# Q22B
+12V 2 G2

1
47K NDS352P G Q14 G Q57 SI1906DL

4
1

S1
D S 2N7002 S 2N7002
1

4 4
1

S2
R471 +12VS
1 2

C235 51K
D 1UF_25V_0805
2

2
1 2

G Q13 C683
1

C241 2N7002 D 1UF_25V_0805


S
Compal Electronics, inc.
3

SUSP# 2
1000PF Q59 G Title
2

2N7002 S
SCHEMATIC, M/B LA-1371
3

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
SYSON 33 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 37 of 87
A B C D E
A B C D E

+5VALW To +5V Transfer


+3VALW To +3V Transfer
+3VALW +3V +5VALW +5V +1.5V TO +1.5V_SW Transfer
U47 U20 C245
7 3 7 3 4.7UF_10V_0805
VIN S2 VIN S2 +1.5V +1.5VS
6 VIN S2 4 6 VIN S2 4
1

1
C246 U4
5 VIN VHV 8 5 VIN VHV 8

1
C628 1 C636 C639 1 C247 8 1
S1 4.7UF_10V_0805 S1 D S
2 2 7 2
2

2
4.7UF_10V_0805 VON/OFF VON/OFF D S

1
4.7UF_10V_0805 1UF_25V_0805 1UF_25V_0805 6 3

2
D S +5VS_GATE C20 C23 C25
SI4702DY SI4702DY 5 D G 4
1 1UF_10V_0603 4.7UF_10V_0805 4.7UF_10V_0805 1

2
1

1
SYSON# ON_GATE 2 1 SYSON# ON_GATE SI4800 R20
+12VALW C16

2
1

1
R438 C242 D Q12 4.7UF_10V_0805 1K

1
C624 R440 100K SYSON# 2

1 2
1M .01UF G 2N7002

2
.01UF D
S

3
SUSP 2 Q5

2
G 2N7002
S

3
+3VALW To +3VS Transfer
+3VALW +3VS +1.8V_ALW TO +1.8V_SW Transfer
U22 1UF_10V_0603
+1.8V +1.8VS
7 VIN S2 3
U3
6 VIN S2 4
1

5 8 C268 8 1
VIN VHV 1 D S

1
1 C277 C6 C258 C260 7 2
S1 D S

1
SUSP 2 6 3
2

VON/OFF 10UF_16V_1206 10UF_16V_1206 10UF_16V_1206 10UF_16V_1206 D S +5VS_GATE C22 C17 C24


5 4
2

2
D G
1

SI4702DY 1UF_10V_0603 4.7UF_10V_0805 4.7UF_10V_0805

2
1

1
C323 +3V +3VS
4.7UF_10V_0805 SI4800 R23
2

C14

2
1
+5VS_GATE 1 2 +12V 4.7UF_10V_0805 1K
2 R212 100K R183 R193 2

1 2
1

470 1K
R211 D
1

C26 1M SUSP 2 Q56

1 2
.1UF G 2N7002

1
D D
S
2

3
SYSON# 2 SUSP 2
G Q16 G Q19
S 2N7002 S 2N7002

3
+5VALW To +5VS Transfer
+5V +5VS
+5VALW +5VS +1.8V
U50

1
7 VIN S2 3
6 4 R182 R465
VIN S2

1
5 8 470 1K
VIN VHV
1

1 C672 C675 C677 C679 C676 C8 C10 C9


SUSP S1 C13 1UF_10V_0603 4.7UF_10V_0805 4.7UF_10V_0805
2

1 2

2
VON/OFF 4.7UF_10V_0805 .1UF 4.7UF_25V_1206 4.7UF_25V_1206 4.7UF_25V_1206 4.7UF_10V_0805
2

1
D D
SI4702DY
SYSON# 2 SUSP 2
1

G Q15 G Q55
C658 +5VS_GATE S 2N7002 S 2N7002

3
4.7UF_10V_0805 Q2
2

1
1

R436 D 2N7002
C621 2 SUSP
3 .01UF 330K G 3
2

S
2

+12VALW To +12VS Transfer

+12VALW

+12VALW
1

+3VALW
+12VALW To +12V Transfer
1

+12VALW C682 R469 +3VALW


1

100K

1
+12VALW .1UF_25V_0805 C684
2

1
S
+12V +12VS R210
2

2
1

G
2 Q58 1UF_25V_0805 R216
2

C239 R180 NDS352P 10K


1

1
100K C238 D 4.7K
1

2
.1UF_25V_0805 R471 R178 R467 SYSON#

D1
+12VS SYSON# 42
1

2
3

S
1UF_25V_0805 51K SUSP

D2
2

6
G
2 Q11 1K 1K Q22A
1

3
NDS352P 2 SI1906DL
33 SYSON
1 2

1 2

1 2
1

D C683 G1 SUSP# 5
1

R179 D 1UF_25V_0805 D D 29,30,33,41 SUSP# Q22B


+12V G2
2

1
47K SUSP# 2 SYSON# 2 SUSP 2 SI1906DL

4
S1
Q59 G G Q14 G Q57
4 4
1

S2
2N7002 S S 2N7002 S 2N7002
1 2

C235
D 1UF_25V_0805
2

2
G Q13
1

C241 S 2N7002
Compal Electronics, inc.
3

1000PF Title
2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
SYSON 33 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 80 of 87
A B C D E
A B C D

Vin Detector

High 18.764 17.901 17.063


VIN
PF1
PL1
CHC4532U800_1812
Low 17.745 16.903 16.038
5A 32V UL/CSA FAST
PCN1 1 2 PR2
1 1M_1% VS

1
1 1 1 2 1

PR1 VIN

1
3 @10_1206
2
3 PD1

12

1
2 BYS10-45

1
PC1 PC2 PC3 PC4 PR3

2
2DC-S026B201 2.5D 5P 1000PF_50V 100PF_50V 1000PF_50V 100PF_50V PZD1 PR4 PR5
@RLZ24B 84.5K_1% 10K 1K
1 2

2
PR6 ACIN 18,33,35,41
PJP1

8
1 2 1 2 22K
1 2 3 +
3MM PL2 1
CHC4532U800_1812 PACIN 39,40
2 -

1
1

1
PC5 PR7 PC6 PU1A

4
1000PF_50V 20K_1% 0.1UF_50V PZD2 PR8
LM393M RLZ3.6B 10K

2
2

2
RTCVREF
PH1 under CPU botten side : 2 1
PR11
CPU thermal protection at 82 degree C 10K 3.3V
Recovery at 50(51) degree C
2
VL 2

VS VIN
1

PR10
PR9 PC7 47K_1%

2
2.15K_1% 0.1UF_50V PD3
2

RB751V PD2
2 1 RLS4148
40 VMBA
PR12
8

16.9K_1%

1
5 PD4
+
7 MAINPWON RB751V
MAINPWON 41,42
TM_REF1 6 2 1
- 40 VMBB
PR15
VS
10K_1%_0805

PU1B
4

33_1206
LM393M PQ1
0.22UF_0805_16V

PZD3
1000PF_50V

RLZ6.2C TP0610T
PH1

CHGRTCP 2 1 3 1
RTCVREF
PC8

PU2 PR18

1
VL

2
200_0805

1
PC9

S-81233SGUP (SOT-89)
PR13 PR16 PC10 PC11
100K_1% 3.3V 100K 0.22UF_1206_25V 0.1UF_0805_25V

2
CHGRTC 1 2 3 2

2
3 2

1
PR14
3 100K_1% PR19 1 2 3
35 51ON#

1
200 PC12 PZD4
PC13 1UF_0805_25V RLZ16B PR17

1
10UF_1206_10V 22K

2
PJP2 PJP5
+12VALWP 2 1 +12VALW (120mA,20mils ,Via NO.= 1) +1_5VP 2 1 +1.5V (1.5A,60mils ,Via NO.= 3)
JOPEN/+12V 3MMA/CPU_IO

PJP6
PJP3
+1_8VP 2 1 +1.8V (3A,120mils ,Via NO.= 6)
+5VALWP 1 2 +5VALW (5A,200mils ,Via NO.= 10)
3MMA/CPU_IO
PAD-OPEN 4x4m

4
PJP4 PJP7 4

+3VALWP 1 2 +3VALW (5A,200mils ,Via NO.= 10) +VTTP 1 2 +VTT (6A,240mils ,Via NO.= 12)
PAD-OPEN 4x4m PAD-OPEN 4x4m

Compal Electronics, inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 38 of 87
A B C D
A B C D

1 1

Iadp=0~2.9A
P2 P3 B+ B++
PQ2 PQ3 PR20 PL3 PQ4
SI4835DY SI4835DY 0.02_2512_1% FBM-L11-453215-900LMAT_1812 SI4835DY
VIN 8 1 1 8 2 1 1 2 1 8
7 2 2 7 2 7

1
6 3 3 6 PC14 PC15 PC16 PC17 3 6
5 5 5
1

1
4.7UF_1210_25V 4.7UF_1210_25V 0.1UF_0805_25V @1000PF

2
4

4
PR21 PR22
10K 200K
2

ACOFF# 1 2 1 2 VIN

1
PR25 PR23 10K PR24 47K
1

PU3 0
PD5 PR26 MB3878
1SS355 150K 1 24

2
-INC2 +INC2

3
2
1
ACOFF# 1 2
2

1
2 2 1 2 23 PC18 2
OUTC2 GND 220PF_50V 4
PR28 PR27
1

10K D PQ7 10K PQ5


3 +INE2 CS 22 1 2 100K
1 2 2 2N7002 FDS4435 2
38,40 PACIN ACOFF 33
G
S 1 4 21 1 2
3

-INE2 VCC(o)
1

PR29 100K PQ6

5
6
7
8
1

24.9K_1% PC19 DTC115EK

3
PC20 PR30 1 2 1 2 5 20 0.1UF_0805_25V
40 ACON FB2 OUT
0.1UF_16V 10K_1% PC22
2

PC21 PR31 0.1UF_50V


2

4700PF_50V 10K 6 19 1 2 LXCHRG


VREF VH PC25
1

0.1UF_0805_25V
PC23 1 2 1 2 7 18 1 2
0.1UF_16V FB1 VCC
2

PC24 PR32
2200PF_50V 10K 8 17 1 2
FSTCHG 33,40 CC=0~2.52A
PR36 -INE1 RT
162K_1% PR34 CV=16.84V(8 CELLS)

2
1 2 9 16 68K PL4
33 IREF +INE1 -INE3 22UH_SPC-1205P-220A BATT+
PR37 10K PD6 1 2 1 2
2 1 10 15 1 2 1 2 1SS355
OUTC1 FB3
1

PC30 PR35
*

100UF_EC_25V

4.7UF_1210_25V

4.7UF_1210_25V
PR39 0.1UF_16V PR38 PC27 0.02_2512_1%
IREF=1.31*Icharge

1
100K_1% 11 14 47K 1500PF_50V
2

OUTD CTL

1
PC26

PC28

PC29
+
IREF=0.73 ~ 3.3V

1
3 PD8 3
2

12 13 PR40 RB051L-40

2
-INC1 +INC1 47K

2
2
2 1 2 1
PR41 PR42
47.5K_1% 143K_1%

4 4

Compal Electronics, inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B 401208
Date: 星期一, 四月 07, 2003 Sheet 39 of 87
A B C D
A B C D

VMBA
38 VMBA VMBB 38

1
PC31 PC32
1000PF_50V BATT+ @1000PF_50V
P5 P4
PQ9 PQ11

2
PF2 PL5 PQ8 PQ10 PL6 PF3
PJP8 7A 24V UL/CSA FAST BLM41P600S_1806 FDS4435 FDS4435 @FDS4435 @FDS4435 @BLM41P600S_1806 @5A 125V UL/CSA SLOW PJP9

1 2 1 8 1 1 8 8 1 1 8 2 1 1
ALI/NIMH# 7 2 2 7 7 2 2 7 BLI/NIMH#
2 AB/I BB/I 2
3 6 3 3 6 6 3 3 6 3
1 TSA 5 5 5 5 TSB 1
4 4

1
5 5

1
PR43 PR44

4
6 6

1
1K PC33 PC34 @1K
7 7

1
0.01UF_50V PR45 PR46 @0.01UF_50V

2
PR47 PR48 39K @39K PR49 PR50
@SUYIN 25063A-07G1-E 7P P2.5

2
SUYIN 25063A-07G1-E 7P P2.5 100 100 @100 @100

2
2

2
1 2
EC_SMD1 1 2 EC_SMD2
EC_SMD1 33,34 5,30,33 EC_SMD2
PR51 22K

1
EC_SMC1 PR52 @22K
EC_SMC1 33,34

1
2 EC_SMC2
5,30,33 EC_SMC2
2
PQ12 PQ13

3
1

1
HMBT2222A @HMBT2222A

3
2
PD9 PD10

1
@BAS40-04 @BAS40-04
PD12
PR53 PD11 PR54 PD13 PD14
10K RLS4148 @10K @RLS4148 @BAS40-04 @BAS40-04
3

1
2 1 2 1

3
1

1
+5VALWP 100K 100K
GA 2 GB 2
2
42 GA 42 GB 2

PQ14 PQ15 +5VALWP

2
100K DTC115EK 100K @DTC115EK
PR55 PR56

3
@10K
10K
1

1
+3VALWP

PR59
25.5K_1%
1 2 TSA

1
VS

1
PU4 VMBB PR61
7

74HC253 VL @47K PR63


PD15 PD16 1K
1Y

2Y

GND

1
PC35 PR66 3 3

2
1

16 0.01UF_50V PR57 @1K


VL

2
VCC PR58 @1M_0.5% ALI/NIMH#2 1 1 1

2
100K PU5A PR60
1EN
2EN
1

8
1C0
1C1
1C2
1C3

2C0
2C1
2C2
2C3

LM393M 100K_1% 2 2
S0
S1

39 ACON

2
PC36 + 3 1 2 33 BATT_TEMPA
33 ALI/MH#
2
1

0.1UF_50V 1 2 1 @BAS40-04 @BAS40-04


2

6
5
4
3

10
11
12
13

14
2
1
15

1
PR64 - 2

1
270K PR62 4.7K
PR65 PC37
4

499K_1% @100PF_50V
2

2
2
3 3

S1 1 2

PR67 5.6M
PQ16 PR68 VL RTCVREF 3.3V 8 CELLS BATTERY UVP
1

DTC115EK 100K VMBA


H 10.68V L 9.518V
1

1 2

1
PR69
1

10K PR70
100K PR71 PU5B 1M_0.5%
33,39 FSTCHG 2 PR74
1 2 LM393M +3VALWP PR72
2

100K 100K_1% @25.5K_1%


2

100K PR73 5 2 1 1 2 TSB


+
2

100K S0 1 2 7
3

1
- 6

1
PR76 4.7K PR75
PR78 PC38 @47K PR77
499K_1% 100PF_50V PD17 PD18 @1K
2
1

1 2 PR79 3 3
2

2
@1K

2
PR80 PC39 BLI/NIMH# 2 1 1 1
2

5.6M 1000PF_50V
100K
33 A/B#USE 2 2 2
33 BATT_TEMPB
33 BLI/MH#
1

@BAS40-04 @BAS40-04
PQ17 100K
DTC115EK
3

PQ18 100K
2 2 1 PACIN 38,39
4 DTC115EK 4

PR81
100K 47K
3

2 1 TRICKLE
33

PD19
Compal Electronics, inc.
RLS4148 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 40 of 87
A B C D
A B C D

+5VALWP VS
DAP202U
B++ PD20 B++

3
PC43 PC45
VL

0.1UF_0805_25V

0.1UF_0805_25V
2200PF_50V 4.7UF_1210_25V PC40 PC41 PC42

8
7
6
5

5
6
7
8
4.7UF_1210_25V 0.1UF_0805_25V 4.7UF_1210_25V

PC47

PC48
PC49 PC44 PR82 PR83

D
D
D
D

D
D
D
D
2
1 470PF_0805_100V 4.7UF_1210_25V PQ19 PC50 PC46 15K_1% 15K_1% PQ20 1

SI4800 4.7UF_1206_16V 2.2UF_0805_16V SI4800

G
S
S
S

S
S
S
PR84
22_1206

1
2
3
4

4
3
2
1
PC52

22

21

25

24

23
PR85 0 0.1UF_0805_25V PL7
1 2 4 1 30 16 2 1

TRIP1

TRIP2
VREF5

REG5V_IN

VCC
LH1 LH2
PD21 EC11FS2 PC51 0.1UF_0805_25V PR86 0 10UH_SPC_1205P_100
29 OUT1_U OUT2_U 17
1

8
7
6
5

5
6
7
8
2 3
PZD5 PR87 0 PR88 0

D
D
D
D

D
D
D
D
RLZ16B PQ21 28 PU6 18
SI4810DY LL1 LL2 PQ22
PC53 PT1 TPS5120 SI4810DY
2

G
S
S
S

S
S
S
2.2UF_1206_25V 10UH_SDT-1205P-100-118 27 19
OUT1_D OUT2_D

1
2
3
4

4
3
2
1
SKIP/PWM #
26 20 PC54

5V_STBY
OUTGND1 OUTGND2 @1000PF_50V

SOFT1

SOFT2
STBY1

STBY2

PGOD
PU7 PC55

GND
INV1

INV2
SCP
REF
3

FB1

FB2
AMS2906 @1000PF_50V

CT
PRA1
Vin

@0_0402

10

11

12

13

PC56 0.01UF_50V 14

15
2 A Type AMS2906 PR89 PR90
Vout
ADJ

0.1UF_16V
2 PRB1
B Type XC6202 57.6K_1% 33.2K_1% 2

47P_50V
0_0402 +5VALWP
1

SCP
PR91 PR92
PR93 430 330 330 PC60 4700PF_50V PC66
150UF_D_6.3V
+3VALWP

PC59
1

1
PC58
PC57 PC61 PR94
PRB2 + + 3300P_50V PC64 2200PF_50V 220

PC69 0.01UF_50V
0_0402 PD22 PZD6 PC62 PC63 2200PF_50V + + PZD7 PD23
BYS10-45 RLZ6.2C 150UF_D_6.3V 150UF_D_6.3V PC65 RLZ4.3B BYS10-45
0.85VREF +3VALWP @150UF_D_6.3V
2

2
VL PC67
VL 10PF_50V PR96
PR97 11.5K_1%
11.5K_1%
PR99
PRA2 PR100 @100K
@0_0402
+5V : Ipeak = 6.66A ~ 10A 47K PR101
47K
+12VALWP
+3.3V : Ipeak = 6.66A ~10A
1
MAINPWON
MAINPWON 38,42
5V_STBY
VS
PR95 PR102 150K
75_1% 100K
29,30,33,37 SUSP# 2
4.7UF_1206_16V

PC70
PQ23 100K 0.047U_16V
PC68

3 DTC115EK 3
3

1
PR202

1
PR98 PR103 100K
649_1% PC71 100K 2 PQ44

2
0.01UF_50V FMMT3904

3
PC121 PR203
1

1UF_0805_25V 47K
2 PQ24
18,33,35,38 ACIN
2N7002
3

PR207 PZD8
2K RLZ10C
5V_STBY
VIN VS

1
PR204

1
100K
1

2 PQ45
PC72 FMMT3904

2
3
2

3
SCP 0.1UF_0805_25V
22K PC122 PR205
PQ25 1UF_0805_25V 47K
3

TP0610T 2
B++
2 1 2 VL 47K

PR104 10K
1

4 PQ43 4

DTA144WKA
1

PR105

330
Compal Electronics, inc.
2

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 41 of 87
A B C D
A B C D

+1_8VP
PQ26
PH2 near main Battery CONN :
SI3442DV +1.5V+-5% BAT. thermal protection at 73 degree C

D
6 Recovery at 50(51) degree C

S
1 1

5 4 +1_5VP
2
1 VL
+5VALWP VS
4.7UF_1206_25V

2
3 + PC73

PR107
5.1K
PR106
PC74

1
0.1UF_50V
47UF_D_6.3V PR170 PC117 PR171
2.37K_1% 0.1UF_50V 47K_1%

1
1

220PF_50V
PC75

2
PC76
2
PR172
10K_1%
PU8A 5 +
8

7 MAINPWON
LM358A MAINPWON 38,41
+ 3 2 1 TM_REF2 6 -
VL
1 PU9B
- 2 PR108 LM393M
69.8K_1%

0.22UF_0805_16V
4

0.01UF_50V

PC118 1000PF_50V
PR109

1
30.1K_1%

PC77
PC78

PC119
10K_1%_0805
68PF_50V VL
100K SYSON# PR173 100K_1%
1 2 2 1 2 SYSON# 37

PH2
2 PR110 0 2

PR111 5.1K
100K PR174
PQ27 100K_1%

3
DTC115EK

+1.8V+-5%
PQ28
SI3445DV PL8 +1_8VP
+5VALWP 5UH-SPC-06704-5R0

D
LX18

S
6 1 2
8 Cells Charger OVP : 18.059V 4 5
VIN 2
40 GA

1
1
1

1
PR112

G
2 PD25 191K_1% + PC79

3
1

1
3
BATT+ PD24 PQ30 RB051L-40 150UF_D_4V_FP 3

PQ29 PC80 RB751V HMBT2222A


3

2
1
2N7002 PR113 4.7UF_1206_25V PR114

2
36K VS 1 2 2 10K

1
2
PR116 PR115 PR117

3
1
1M_0.5% 1K 162K_1%
PC81
PU9A 2200PF_50V

2
LM393M +5VALWP
40 GB
8

PR119 PR118 0
1

309K 1% + 3
2 1

8
- 2 0.85VREF

3
PQ31 + 3
3

@2N7002 PR120 PQ32 2 1


4

100K 2SA1036K - 2 1 2 0.85VREF


PR121 PR122 PU13A

1
PR124 PC82 100K_0.5% 97.6K_1% LM393M PR123 10K

1
100K 1UF_1206_25V PC83 PC84
1000PF_50V 1UF_0805_16V

100K SYSON#
2 SYSON# 37

1
PC85
0.01UF_50V 100K

2
PQ33

3
DTC115EK
4 4

Compal Electronics, inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 42 of 87
A B C D
A B C D

PC91 PC93 B++


4.7UF_1210_25V 4.7UF_1210_25V

PC95
2200PF_50V
+3V
2 1
1 PC92 PC94 1

PR125 4.7UF_1210_25V 4.7UF_1210_25V


2

2
0 GL2
PR126 PR127 PR128 PR129 PR130
10K 10K 10K 10K 10K +5VALWP
BL1
1

2
PC86 PC87 PC89
@4700PF_50V @4700PF_50V @4700PF_50V

5
6
7
8

5
6
7
8

5
6
7
8
PC88 PC90 PR131 PR139
@4700PF_50V @4700PF_50V 0_0805 0.002_21515_1%(2W)
7 CPU_VID4

1
4 4 4 LC 2 1 +VCC_H_CORE
7 CPU_VID3

0
1 2

2
PQ34 PQ35 PQ36 + +
7 CPU_VID2

2
PR133
PR132 10 PD27 SI4894DY SI4894DY SI4894DY

0
1SS355 PL9 PC97 PC98
7 CPU_VID1
2

0
PR135 0.7UF HK-RM136-22A0R7 220UF_D_4V 220UF_D_4V

3
2
1

3
2
1

3
2
1
PR136
20
7 CPU_VID0

1
2

PU10 MAX1718

1
PR137
1 21 27 BL2
D4 LX
0

1
2

PR138

22 D3 DH 28

1
+3V
1
PR140

23 26 1 2 PQ38 PQ39 +5VALWP


D2 BST
1

5
6
7
8

5
6
7
8
PC96 SI4404DY SI4404DY PQ40 PD28

5
6
7
8
2 PR143 24 16 PR141 0 0.1UF_0805_25V SI4404DY EC10QS04 2
1

@10K D1 DL

2
0.1UF_0805_25V
25 D0 V+ 1 4 4
36 VGATE 4 PC120
2

PC101 4.7UF_1206_16V

@0.01UF_50V
1 2 1 2 14 9 0.1UF_0805_25V PR177
VGATE VCC

5
499_1%
PR144 PR206 @1K 2 1 3 4 + 3 2 1
@0 TIME FB
1 2 1 2 1
PC123 PR145 51K 2 13 - 4 2 1

3
2
1

3
2
1
@0.01UF_50V SDN/SKIP POS PR146 PR142 0 PU14

3
2
1

1
PC102 4.7UF_1206_16V 17 5 100 MAX4322 PR178

2
VDD NEG

PC99

PC100
1K_1%

PC104 470PF_50V
6 CC ZMODE 19
GL3 PC103
1000PF_50V
*
PR148
0
2 1
20 18

2
OVP SUS PR176
1 2 PC105 1UF_0805_16V 11 8 1K_1%
33 VR_ON REF S1
PR147 12 7
ILIM S0
1

150K COM
15 GND TON 10
PR175 1 10 1 2
180K NO2 V+ +3VALWP
*

2
2 9 PR149 CPU_COREP OUTPUT_ MODE VOLTS
*
2

NO3 COM

2
@0
3 8 PR151 PR153
PR200 0 NO1 NO0 @10K @0 D3 D2 D1 D0 D4 = 1 D4 = 0
4 7

1
INH ADDA

1
3 5 6 2 1 0 0 0 0 0.975 1.75 3
GND ADDB PM_GMUXSEL 7,17 0 0 0 1 1.70
PR201 0
*
PU11
* PR156 @0 0.950
2

@MAX4524
PR152 0 0 1 0 0.925 1.65
0 2 1
PM_DPRSLPVR 7,17 0 0 1 1 0.900 1.60

1
PR150 PR157 0
1

249K_1% 0 1 0 0 0.875 1.55


2

* *
2
0 1 0 1 0.850 1.50
PR159 PR161 100K
2 2 1
@604K_1% @61.9K_1% H_DPSLP# 5,17 0 1 1 0 0.825 1.45
PR155 PR154 PR162 @0
*
1

150K_1% 0 100K 0 1 1 1 0.800 1.40

*
1

PQ41

3
@DTC115EK 1 0 0 0 0.775 1.35

1 0 0 1 0.750 1.30
2

*
PR158
@19.6K_1%
*
PR160
@16.2K_1%
1

1
0

0
1

1
0

1
0.725

0.700
1.25

1.20
CPU CONTROL MODE
1

1 1 0 0 0.675 1.15
MODE OFFSET RBOTTOM Vout(0A) ADDA ADDB
DEEPER SLEEP 0mV X 0.850 X X 1 1 0 1 0.650 1.10
BATTEY SLEEP -56mV 16.2K 1.094 1 0
PERFORMANCE SLEEP -51mV 19.6K 1.199 1 1 1 1 1 0 0.625 1.05
4 BATTERY MODE -16mV 61.9K 1.134 0 0 4

PERFORMANCE MODE -1.8mV 604K 1.248 0 1 1 1 1 1 0.600 1.00

Compal Electronics, inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 43 of 87
A B C D
5 4 3 2 1

D D

+5VALWP

2
PR163
0_0805

1
PC107
4.7UF_1210_25V

B++
PC106 PC108
PC109 0.1UF_0805_25V 4.7UF_1210_25V

2
PR164 10 PD29 4.7UF_1206_16V
1SS355 4 5
PU12
PC110 PL10
4.7UF_1206_16V
15 VCC VDD 14 3 6
10UH_SPC-1205P-100
(+1.25V : I_peak = 6A)

1
18 19 IO_BST 2 7
SKIP BST PC111 +VTTP
17 1 IO_GL4 0.1UF_0805_25V 1 8
V+ DH PR165
10 20 IO_LX 2.49K_1%
5 VTT_PWRGD PGOOD LX

1
PD30
C IO_GL5 PQ42 EC10QS04 + C
33 VTT_ON 3 SHDN DL 13
SI4834DY
PR166 0 6 12 PC112
ILIM PGND 150UF_D_6.3V PR167

2
2 11 10K_1%
N/C N/C
1 2
Vref 2.0V 7 9
REF N/C
1

PR168 16 5
PR169 15K_1% TON OUT
84.5K_1% 8 4 IO_FB
AGND FB
MAX1714A
FB 1.0V
2

PC113
0.1UF_16V

PC115
PC114 @0.1UF
@150PF_50V

B B

A A

Title
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 44 of 87
5 4 3 2 1
A B C D E

ATW03 BLOCK DIAGRAM


Mobile Tualatin
4 4
or
Coppermine-T Thermal Sensor CK TITAN CPU VID & All
(uFCBGA/uFCPGA) MAX1617MEE ICS9250-38 reference voltage
PAGE 47,48,49 PAGE 48 PAGE 55 PAGE 50

PSB
TV-OUT CONN.
Almador-M
PAGE 59
VCH/B GMCH-M SO-DIMM * 2
GM Bus Interface Memory Bus
CONN. BANK 2,3,4,5 PAGE 56,57

CRT CONN. 625 BGA


3 PAGE 58 3

PAGE 59
PAGE 51,52,53,54

HUB Interface
USB USB

PAGE 60

HDD Connector ATA 66/100


FAN on controller &
PAGE 63 TEMP. sensing circuit
PAGE 78
Audio CD-DJ ICH3-M
OZ163
2 Rev.C PAGE 73 421 BGA Mini PCI 2
PCI BUS DC/DC Interface
Socket
PAGE 60,61,62 PAGE 71
RTC Battery
Audio Amplifier AC'97 CODEC PAGE 80
PAGE 75
CS4299 PAGE 74
LPC
CardBus
TI Slot 0/1
Audio Jack PCI1420 PAGE 67 BATTERY
PAGE 66
Super I/O Embedded Charger
PAGE 75
Controller PAGE 84
LPC47N227 NS PC87591
PAGE 68 PAGE 76

POWER
Interface
Scan KB BIOS & I/O PAGE 83,85,86,87
1
Parallel FDD 1

PAGE 69 PAGE 63 PAGE 58


PORT PAGE 77

Title
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 45 of 87
A B C D E
A B C D E
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Voltage Rails
PIR
Power Plane Description S1 S3 S5 REV 0.1

VIN Adapter power supply (19V) N/A N/A N/A


Date Page Description
1 B+ AC or battery power rail for power circuit. N/A N/A N/A 1

+VCC_H_CORE Core voltage for CPU ON OFF OFF


+VTT 1.2V switched power rail for CPU AGTL Bus ON OFF OFF
+1.5V 1.5V power rail ON ON OFF
+1.5VS AGP 4X ON OFF OFF
+1.8V 1.8V power rail ON ON OFF
+1.8VS 1.8V switched power rail ON OFF OFF
+2.5V 2.5V power rail ON ON OFF
+3VALW 3.3V always on power rail ON ON ON*
+3V 3.3V power rail ON ON OFF
+3VS 3.3V switched power rail ON OFF OFF
+5VALW 5V always on power rail ON ON ON*
+5V 5V power rail ON ON OFF
+5VS 5V switched power rail ON OFF OFF
+12VALW 12V always on power rail ON ON ON*
2 2
+12VS 12V switched power rail ON OFF OFF
RTCVCC RTC power ON ON ON

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

External PCI Devices


Device IDSEL# REQ#/GNT# Interrupts
VCH CONN. PIRQA
IEEE 1394 A D16 0 PIRQA
C ardBus AD20 2 PIRQA/PIRQB
LAN A D17 3 PIRQB
Mini-PCI AD18 1/4 PIRQC/PIRQD
SD/SM (RESERVE) AD22 PIRQC/PIRQD
3 3

EC SM Bus1 address EC SM Bus2 address


Device Address Device Address
Smart Battery 0001 011X b MAX1617MEE 1001 110X b
EEPROM(24C16/02) 1010 000X b OZ163 0011 0100 b
(24C04) 1011 000Xb Smart Battery 0001 011X b
Docking 0011 011X b
DOT Board XXXX XXXXb

ICH3-M SM Bus address


Device Address
4 4
Clock Generator ( ICS9238-50) 1101 0000
SDRAM Select ( 74HC4052 ) 1010 0000
CPU Voltage VID select ( F3565 ) 0110 111Xb

Title
Compal Electronics, inc.
SCHEMATIC, M/B LA-1371
Size Document Number Rev
Custom 1B
401208
Date: 星期一, 四月 07, 2003 Sheet 46 of 87
A B C D E
A B C D E

+VCC_H_CORE

1 1

AC21

AC19

AC17

AC15

AC13

AC11
AB22
AA21

AB20
AA19

AB18
AA17

AB16
AA15

AB14
AA13

AB12
AA11

AB10
W21
M22

AC9

AC7
G21

AA9

AB8
AA7
D22

H22

N21

R21

U21

D20

D18

D16

D14

D12

D10
E21

K22

P22

V22

Y22

E19

E17

E15

E13

E11
F22

T22

F20

F18

F16

F14

F12

F10
L21
J21

G5
D8

D6

H6

N5
E9

E7

E5

K6

V6
F8

F6

T6
J5
H_A#[3..31] U9A H_D#[0..63]
8 H_A#[3..31] H_D#[0..63] 8

VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
H_A#3 K1 A16 H_D#0
H_A#4 A#3 D#0 H_D#1
J1 A#4 D#1 B17
H_A#5 G2 A17 H_D#2
H_A#6 A#5 D#2 H_D#3
K3 A#6 D#3 D23
H_A#7 J2 B19 H_D#4
H_A#8 A#7 D#4 H_D#5
H3 A#8 D#5 C20
H_A#9 G1 VCC C16 H_D#6
H_A#10 A#9 D#6 H_D#7
A3 A#10 D#7 A20
H_A#11 J3 A22 H_D#8
H_A#12 A#11 D#8 H_D#9
H1 A#12 D#9 A19
H_A#13 D3 A23 H_D#10
H_A#14 A#13 D#10 H_D#11
F3 A#14 D#11 A24
H_A#15 G3 C18 H_D#12
H_A#16 A#15 D#12 H_D#13
C2 A#16 D#13 D24
H_A#17 B5 B24 H_D#14
H_A#18 A#17 D#14 H_D#15
B11 A#18 D#15 A18
H_A#19 C6 E23 H_D#16
H_A#20 A#19 D#16 H_D#17
B9 A#20 D#17 B21
H_A#21 B7 B23 H_D#18
H_A#22 A#21 D#18 H_D#19
C8 A#22 D#19 E26
H_A#23 A8 C24 H_D#20
H_A#24 A#23 D#20 H_D#21
2 A10 A#24 Address D#21 F24 2
H_A#25 B3 Lines D25 H_D#22
H_A#26 A#25 D#22 H_D#23
A13 A#26 D#23 E24
H_A#27 A9 B25 H_D#24
H_A#28 A#27 D#24 H_D#25
C3 A#28 D#25 G24
H_A#29 C12 H24 H_D#26
H_A#30 A#29 D#26 H_D#27
C10 A#30 D#27 F26
H_A#31 A6 L24 H_D#28
A#31 D#28 H_D#29
A15 H25
A14
B13
A12
A#32
A#33
A#34
Mobile Data
Signals
D#29
D#30
D#31
C26
K24
G26
H_D#30
H_D#31
H_D#32
8 H_REQ#[0..4]
H_REQ#[0..4]

H_REQ#0 R1
A#35

REQ#0
Tualatin D#32
D#33
D#34
D#35
K25
J24
K26
H_D#33
H_D#34
H_D#35
H_REQ#1 L3 F25 H_D#36
H_REQ#2 REQ#1 D#36 H_D#37
T1 REQ#2 Request D#37 N26
H_REQ#3 U1 Signals J26 H_D#38
H_REQ#4 REQ#3 D#38 H_D#39
L1 REQ#4 D#39 M24
T4 U26 H_D#40
RP# D#40 H_D#41
8 H_ADS# AA3 ADS# D#41 P25
L26 H_D#42
D#42 H_D#43
D#43 R24
W2 R26 H_D#44
AERR# D#44 H_D#45
AB3 AP#0 D#45 M25
P3 Error V25 H_D#46
+1.5VS AP#1 D#46 H_D#47
C14 BERR# Interface D#47 T24
R331 1.5K AF23 M26 H_D#48
BINIT# D#48 H_D#49
1 2 AF4 IERR# D#49 P24
3 H_D#50 3
D#50 AA26
R87 10 T26 H_D#51
D#51 H_D#52
1 2 A7 BREQ0# D#52 U24
C4 Arbitration Y25 H_D#53
NC D#53 H_D#54
C22 NC Signals D#54 W26
AD23 V26 H_D#55
NC D#55 H_D#56
8 H_BPRI# R2 BPRI# D#56 AB25
L2 T25 H_D#57
8 H_BNR# BNR# D#57
V3 Snoop VSS VCC Y24 H_D#58
8 H_LOCK# LOCK# D#58
Signals W24 H_D#59
D#59 H_D#60
D#60 Y26
AA2 AB24 H_D#61
8 H_HIT# HIT# D#61
U2 AA24 H_D#62
8 H_HITM# HITM# D#62
T3 V24 H_D#63
8 H_DEFER# DEFER# D#63

VCC_80
VCC_79
VCC_78
VCC_77
VCC_76
VCC_75
VCC_74
VCC_73
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_0
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9

TUALATIN
E16
R4
E25
G25
J25
L25
N25
R25
U25
W25
AA25
AC25
AF25
AE26
C23
F23
H23
K23
M23
P23
T23
V23
Y23
AB23
AE23
B22
D21
F21
E22
H21
G22
K21
J22
M21
L22
P21
N22
T21
R22
V21
U22
Y21
W22
AB21
AA22
AC22
AE21
B20
D19
AB19
AA20
AC20
AE19
B18
D17
F17
E18
AB17

P6
M6
AC5
AA5
AB6
W5
Y6
U5
+VCC_H_CORE

4 4

Title
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 47 of 87
A B C D E
A B C D E

+VTT

AC18

AC16

AC14

AC12

AC10
AA18

AE17

AB15
AA16

AE15

AB13
AA14

AE13

AB11
AA12

AE11

AA10

AC8

AC6
AB9

AE9

AB7
AA8

AE7

AB5
AA6

AE5
D15

D13

D11
B16

B14

E14

B12

E12

B10

E10
F15

F13

F11

W6

W4
M3
G6
D9

D7

H5

N6

R6

U6

D4

H4

U4

D2

H2
B8

E8

B6

K5

V5

Y5

B4

K4

B2
F9

F7

F5

T5

F4

F2
L6
J6
+1.8VS U9B

VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
+1.5VS

+1.5VS +VTT
RP23
Y3 AE24 TESTHI1 1 8
8 H_RS#0 RS#0 DEP#0

1
V1 AD25 TESTHI2 2 7
8 H_RS#1 RS#1 DEP#1
1 Place H_RESET# R61 R325 R335 R336 U3 AE25 3 6 TESTLO1 1
8 H_RS#2 RS#2 DEP#2
R3<0.1" from U1 56.2_1% 1.5K 3K 1.5K M5 Request AC24 4 5 TESTLO2
RSP# DEP#3
8 H_TRDY# W1 TRDY# Signals GND DEP#4 AF24
AD26 8P4R_1K
2

2
DEP#5
Data DEP#6 AC26
H_A20M# AC3 Signals AD24
17 H_A20M# A20M# DEP#7
17 H_FERR# AF6 FERR#
AF5 FLUSH#
H_IGNNE# AD9 AF21
17 H_IGNNE# IGNNE# VREF_1 +V_AGTLREF
17 H_SMI# AD3 SMI# VREF_2 AB26
AB4 H26 +VCC_H_CORE
17 H_PW RGD PWRGOOD VREF_3 +VTT
17 H_STPCLK# AE4 STPCLK# VTT Ref VREF_4 A21
17,43 H_DPSLP#
H_INTR
AF8 DPSLP# Compatibility VREF_5 AF9
17 H_INTR AD15 INTR/LINT0 VREF_6 A4
H_NMI AE14 N1
17 H_NMI NMI/LINT1 VREF_7
17 H_INIT# AE6 INIT# VREF_8 AA1
8 H_RESET# B15 RESET#
Y4 TESTLO1
TESTLO
8 H_DBSY# W3 DBSY# VCC R5
8 H_DRDY# Y1 DRDY# PLL1 N3 1 2
+1.5VS L30 4.7UH
Analog PLL2 N2
NC P1
+1.5VS H_THERMDA AF13 THERMDA NC P5
H_THERMDC AF14 E1 C520
THERMDC NC 33UF_16V_D2
F1

Mobile NC
1

+
R62 R55 AE12
10,12 H_BSEL0 SELFSB0
150 150 AF10 AC1 CLK_HCLK

Tualatin
12 H_BSEL1 SELFSB1 CLK0 CLK_HCLK 12
2 1 2 AF16 AD1 CLK_HCLK# 2
EDGECTRLP CLK0# CLK_HCLK# 12
R280 M1 TESTLO2
2

R53 @0 110_1% TESTLO


1 2 AD19 +VTT
17 H_PICD0 PICD0
1 2 AD17 AF18 R76 14_1%
17 H_PICD1 PICD1 NC
R64 @0 AF20 APIC AD16 1 2
12 CLK_CPU_APIC PICCLK NCHCTRLP
C39 AF11 TESTHI1
R41 2 TESTHI
1 NC AE8
@33_0402 AF22 RP2# NC N24
@10PF AE20 RP3# Debug NC AE10
AD22 Break E2 TESTHI2
BPM0# TESTHI
AD21 BPM1# Point
NC P4
AD10 TCK
AD7 TDI Test
AD11 TDO Access NC_1 AD4
R482 1.5K AF7 PORT A5
ITP_TRST# TMS NC_2
1 2 AF15 TRST# NC_3 D1
1 2 AF19 PREQ# ( ITP ) NC_4 AD13
+1.5VS AE22 PRDY# NC_5 B1
+VS_CMOSREF R517 200 P26
NC_6
NC_7 A11
AF12 CMOSREF_1
AD5 CMOSREF_0
1 2 AE16 VCCT VID E3 CPUVTT_PWRGD
R68 56.2_1% RTTIMPDEP VTTPWRGOOD

17,19 PM_CPUPERF# L5 GHI# NC D26


3 3
VCCT_10
VCCT_11
VCCT_12
VCCT_13
VCCT_14
VCCT_15
VCCT_16
VCCT_17
VCCT_18
VCCT_19
VCCT_20
VCCT_21
VCCT_22
VCCT_23
VCCT_24
VCCT_25
VCCT_26
VCCT_27
VCCT_28
VCCT_29
VCCT_30
VCCT_31
VCCT_32
VCCT_33
VCCT_34
VCCT_35
VCCT_36
VCCT_37
VCCT_38

VSS_142
VSS_141
VSS_140
VSS_139
VSS_138
VSS_137
VSS_136
VSS_135
VSS_134
VSS_133
VSS_132
VSS_131
VSS_130
VCCT_1
VCCT_2
VCCT_3
VCCT_4
VCCT_5
VCCT_6
VCCT_7
VCCT_8
VCCT_9

Note :
GHI# Pull-Up internally

VID0
VID1
VID2
VID3
VID4

VSS
VSS
VSS

NC
NC
NC
TUALATIN
A26
G23
J23
L23
N23
R23
U23
W23
AA23
C21
C19
AD20
C17
AD18
C15
C13
AD14
C11
AD12
C9
C7
AD8
C5
AD6
AC23
AA4
E4
G4
J4
L4
AC4
V4
AE3
AF2
AF1
AE18
D5
E6

AB1
AC2
AE2
AF3
R3

B26
M4
AF26

C1
AF17
N4

F19
E20
C25
A25
AE1
AD2
AB2
Y2
V2
T2
P2
M2
K2
+VTT +VTT

1
R44 R99
1 2 +5VALW 10K
2

C40 200 CPU_VR_VID4 7

2
CPU_VR_VID3 7 CPUVTT_PWRGD
.1UF
CPU_VR_VID2 7
1

1
CPU_VR_VID1 7
CPU_VR_VID0 7 2 Q6
+3VS +3V
U8 2N7002

3
1

1
C70 1 16
2200PF NC NC R100
2 VCC STBY 15 EC_SMC2 30,33,40
H_THERMDA

14
3 14
2

H_THERMDC DXP SMBCLK 10K U36F


4 DXN NC 13
R80 5 12 From 87591

2
NC SMBDATA
+5VALW 1 2 6 ADD1 ALERT 11 44 VTT_PWRGD 13 12 VTT_PWRGD# 12,33
1K 7 GND ADD0 10

1
8 9 C105 74LVC14
4 GND NC EC_SMD2 30,33,40 4

7
MAX6654 .1UF

2
1

R50 R49
Thermal Sensor
1K 10K
Compal Electronics, inc.
2

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
+5VALW AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 48 of 87
A B C D E
A B C D E

Layout note :
Place close to CPU, Use 2~3 vias per PAD.
1 Place .47uF caps underneath balls on solder side. Layout note : 1
Place 10uF caps on the peripheral near balls.
Use 2~3 vias per PAD. Place close to CPU,
Use 2 vias per PAD.

+VCC_H_CORE +VTT
1

1
C388 C389 C391 C392 C393 C394 C395 C396 C397 C398 C390 C412 + C45 + C513
.47UF .47UF .47UF .47UF .47UF .47UF .47UF .47UF .47UF .47UF .47UF .47UF 220UF_4V_D2 220UF_4V_D2
2

2
+VCC_H_CORE
+VTT
1UF_10V_0603
1UF_10V_0603 1UF_10V_0603 1UF_10V_0603
1

1
C434 C425 C411 C433 C424 C421 C525 C432 C409 C420 C408 C431
.47UF .47UF .47UF .47UF .47UF .47UF .47UF .47UF .47UF .47UF .47UF .47UF C32 C34 C37 C41 C43 C48 C59 C67 C72 C79
2

2
1UF_10V_0603

2
2 2
1UF_10V_0603 1UF_10V_0603 1UF_10V_0603
1UF_10V_0603 1UF_10V_0603

+VCC_H_CORE
1

1
C450 C449 C448 C447 C446
10UF_10V_1206 10UF_10V_1206 10UF_10V_1206 10UF_10V_1206 10UF_10V_1206
2

+VCC_H_CORE
1

C445 C117 C30 C38 C33


10UF_10V_1206 10UF_10V_1206 10UF_10V_1206 10UF_10V_1206 10UF_10V_1206
2

+VCC_H_CORE
3 3
1

+ C536 + C537 + C519 + C549 + C538


150UF_6.3V_D2 150UF_6.3V_D2 150UF_6.3V_D2 150UF_6.3V_D2 150UF_6.3V_D2
2

+VCC_H_CORE
1

+ C310 + C309 + C308 + C314 + C313 + C297


150UF_6.3V_D2 150UF_6.3V_D2 150UF_6.3V_D2 150UF_6.3V_D2 150UF_6.3V_D2 150UF_6.3V_D2
2

4 4

Title
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 49 of 87
A B C D E
A B C D E

Tualatin
D4 D3 D2 D1 D0 CPU_Core(V) ES(before MP)
CPU Voltege ID +3VS +3V --------------------------------------------------------
0 0 1 0 1 1.50V (Performance)
Default for Resistors Should 0 1 1 0 0 1.15V (Battery)

1
+3V 1 0 1 0 1 0.85V (Deeper Sleep)
be +VCC_CPU = 0.7V, for

1
2
3
4
R172
Deeper Sleep Only.

1
RP30 C213 +VTT
R321 @8P4R_10K @100K 1 2
GTL Reference Voltage
@10K Address 0110 111X

1
1 .1UF D4 D3 D2 D1 D0 CPU_Core(V) QS( MP) 1

8
7
6
5
U17 -------------------------------------------------------- R303 Layout note :

2
1 20 R460 0 0 0 1 1 1 1.40V (Performance) 1K_1%
12,14,17 SMB_CLK SCL VCC 0 1 1 0 0 1.15V (Battery)
12,14,17 SMB_DATA 2 SDA ASEL 19 1 2
1 0 1 0 1 0.85V (Deeper Sleep)
1. Place R303 and R322 between and GMCH and CPU.
3 18 1 2 2. Place decoupling caps near CPU.(Within 500mils)

2
Override# WP R461 0
5 CPU_VR_VID0 4 I_0 NC 17
5 CPU_VR_VID1 5 I_1 MUX_SEL 16 +V_AGTLREF
5 CPU_VR_VID2 6 I_2 Y_0 15 CPU_VID0 43

1
From Tualatin CPU 7 14
5 CPU_VR_VID3 I_3 Y_1 CPU_VID1 43

1
8 13 R322 C514 C71 C35 C27
5 CPU_VR_VID4 I_4 Y_2 CPU_VID2 43
9 12 2K_1% .1UF .1UF .1UF .1UF
A/B# Y_3 CPU_VID3 43
10 11 CPU_VID4 43

2
+3V GND Y_4

2
1 2 C647 FM3565
+3VS
1 2
R173
@10K .1UF
5
17,43 PM_DPRSLPVR 1
4 MUX_SEL
17,43 PM_GMUXSEL 2
+1.5VS
CMOS Reference Voltage
3

U49 Over ride# MUX_SEL A/B# M UX_outputs Mo de


NC7SZ02 1 1 X MUX_inputs +3V
Battery System Memory Reference

1
PM_GMUXSEL = 1 : for Performance mode
0 : for CPU default power 1 0 0 From R288 Layout note :

1
1K_1%
Non-volatile R302
PM_DPRSLPVR = 1: for Deeper Sleep mode 1. Place R288 and R291 between and GMCH and CPU.
2 0 : for Performance mode register(SOPRB) Performance 249_1% 249.9_1% 2. Place decoupling caps near CPU. 2

2
1 0 1 From
Non-volatile +VS_CMOSREF

2
Place capacitor close to GMCH.
register(SOPRA) Deeper sleep

1
+V_SMREF

1
R291 C439 C440

1
2K_1% .1UF .1UF

1
R297 C467

2
49.9_1% .1UF

2
2
2
Place Reference Circuit near GMCH
+1.5VS
+1.8VS C578470PF
HUB Interface Reference 1 2

1
R308 R376 R373
301_1% Layout note : 1K_1% 82.5_1%

1. Place R308 and R296 in middle of Bus.

2
3
2. Place capacitors near GMCH. +VAGP_BRDREF 3
+VS_HUBREF

1
1
R370 R365

1
R296 C453 1K_1% 82.5_1%
301_1% .1UF
C555470PF

2
1 2

2
+1.8VS

+1.8VS
HUB Interface VSwing Voltage

1
R275
1
576_1%
R93
301_1% 1. Place R275 and R274 near GMCH.

2
1. Place R93 and R94 in middle of Bus. +VS_RIMMREF
2

1
+VS_HUBVSWING
R274
1

2K_1%
1

R94 C97
301_1% .1UF

2
4 4
2
2

Title
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 50 of 87
A B C D E
A B C D E

M12
M13
M17
M18

AC5

AH2

AC7
AE2
AB2
N12
N13
N14
N15
N16
N17
N18

R13
R14
R15
R16
R17

U12
U13
U14
U15
U16
U17
U18
P13
P14
P15
P16
P17

V12
V13
V17
V18
T13
T14
T15
T16
T17

AJ5

W2

G2
D2

U5

H5

N2
Y5

P5

K2
T2
L5
H_D#[0..63] U7A H_A#[3..31]
4 H_D#[0..63] H_A#[3..31] 4

VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36

VSS_H0
VSS_H1
VSS_H2
VSS_H3
VSS_H4
VSS_H5
VSS_H6
VSS_H7
VSS_H8
VSS_H9
VSS_H10
VSS_H11
VSS_H12
VSS_H13
VSS_H14
VSS_H15
VSS_H16
1 1

H_D#0 U4 H2 H_A#3
H_D#1 H_D#0 H_A#3 H_A#4
P1 H_D#1 H_A#4 E3
H_D#2 W6 G3 H_A#5
H_D#3 H_D#2 H_A#5 H_A#6
U2 H_D#3 H_A#6 N4
H_D#4 U6 M6 H_A#7
H_D#5 H_D#4 H_A#7 H_A#8
R1 H_D#5 VSS H_A#8 F1
H_D#6 N3 F2 H_A#9
H_D#7 H_D#6 H_A#9 H_A#10
W5 H_D#7 H_A#10 J3
H_D#8 V4 F3 H_A#11
H_D#9 H_D#8 H_A#11 H_A#12
P3 H_D#9 H_A#12 P6
H_D#10 R3 G1 H_A#13
H_D#11 H_D#10 H_A#13 H_A#14
U1 H_D#11 H_A#14 N5
H_D#12 V6 H1 H_A#15
H_D#13 H_D#12 H_A#15 H_A#16
W4 H_D#13 H_A#16 P4
H_D#14 T3 T4 H_A#17
H_D#15 H_D#14 H_A#17 H_A#18
P2 H_D#15 H_A#18 M2
H_D#16 V3 J2 H_A#19
H_D#17 H_D#16 H_A#19 H_A#20
R2 H_D#17 H_A#20 L2
H_D#18 T1 R4 H_A#21
H_D#19 H_D#18 H_A#21 H_A#22
W3 H_D#19 H_A#22 K1
H_D#20 U3 L3 H_A#23
H_D#21 H_D#20 H_A#23 H_A#24
Y4 H_D#21 H_A#24 L1
H_D#22 AA3 J1 H_A#25
H_D#23 H_D#22 H_A#25 H_A#26
W1 H_D#23 H_A#26 N1
H_D#24 V1 T5 H_A#27
H_D#25 H_D#24 H_A#27 H_A#28
Y1 H_D#25 H_A#28 H3
2 H_D#26 Y6 M3 H_A#29 2
H_D#27 H_D#26 H_A#29 H_A#30
AD3 H_D#27 Host H_A#30 M1
H_D#28 AB4 Interface K3 H_A#31 Close to Ball R6.
H_D#29 H_D#28 H_A#31
AB5
H_D#30
H_D#31
H_D#32
V2
Y3
Y2
H_D#29
H_D#30
H_D#31
H_D#32
Host
Interface Almador-M H_CPURST#
H_ADS#
R6
C1
1
R290
2
@0
H_RESETX#
H_RESET# 5
H_ADS# 4
H_D#33
H_D#34
H_D#35
H_D#36
AA4
AA1
AA6
AB1
H_D#33
H_D#34
H_D#35
GMCH H_BNR#
H_BPRI#
H_DBSY#
E1
L4
G5
J4
H_BNR# 4
H_BPRI# 4
H_DBSY# 5
H_DEFER# 4
H_D#37
H_D#38
H_D#39
AC4
AA2
AB3
H_D#36
H_D#37
H_D#38
H_D#39
A3 H_DEFER#
H_DRDY#
H_HIT#
H_HITM#
F4
D3
D1
H_DRDY# 5
H_HIT#
H_HITM# 4
4
H_D#40 AD2 J6
H_D#40 H_LOCK# H_LOCK# 4
H_D#41 AD1 G4
H_D#41 H_TRDY# H_REQ#[0..4] H_TRDY# 5
H_D#42 AC2 H_D#42 H_REQ#[0..4] 4
H_D#43 AB6
H_D#44 H_D#43 H_REQ#0
AC6 H_D#44 H_REQ#0 K6
H_D#45 AC1 M4 H_REQ#1
H_D#46 H_D#45 H_REQ#1 H_REQ#2
AF3 H_D#46 H_REQ#2 K5
H_D#47 AD4 K4 H_REQ#3
H_D#48 H_D#47 H_REQ#3 H_REQ#4
AD6 H_D#48 H_REQ#4 L6
H_D#49 AC3 H_RS#[0..2]
H_D#49 H_RS#[0..2] 5
H_D#50 AH3
H_D#51 H_D#50 H_RS#0
AE5 H_D#51 H_RS#0 H6
H_D#52 AE3 H4 H_RS#1
H_D#53 H_D#52 H_RS#1 H_RS#2
AG2 H_D#53 H_RS#2 G6
H_D#54

AGP_RCOMP/DVOBC_RCOMP
AF4 H_D#54
3 H_D#55 3
AF2 H_D#55
H_D#56 AJ3 AJ4
H_D#56 CLK_HT CLK_GHT 12
H_D#57 AE4 AH5
H_D#58 H_D#57 CLK_HT# CLK_GHT# 12
AG1 H_D#58
H_D#59 AE1 H_D#59

VSSPCMOS_LM0
VSSPCMOS_LM1
VSSPCMOS_LM2
H_D#60 AG4 AC19
H_D#60 CLK_DREF CLK_DREF 12

H_GTLRCOMP
H_D#61 AH4 AG26
HUB_PSTRB#

DVO_RCOMP

HUB_RCOMP
H_D#61 CLK_GBIN CLK_GBIN 12
HUB_PSTRB

VSSP_DVO0
VSSP_DVO1
VSSP_DVO2
VSSP_HUB0
VSSP_HUB1
H_D#62

H_GTLREF1
H_GTLREF0
SM_RCOMP

VSSA_CPLL
VSSA_HPLL
AG3 AD24 1 2

VSSA_DAC
H_D#62 CLK_GBOUT 12
HUB_PD10

CLK_GBOUT

VSSP_IO0
VSSP_IO1
VSSP_IO2
H_D#63
HUB_REF

AGP_REF
HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9

AF1 H_D#63 RESET# R26047

2
.01UF

VSS
VSS
R242 R276 C373

2
@33_0402 @33_0402
ALMADOR-M R158
G26
H28
H29
H27
F29
F27
E29
E28
G25
G27
H26
G29
F28
H24

AC22
F6
J23
J25
K24
AB24
AA7
J7

C2

AB23
AC23

AH19
AH20
AF5

G28
H25

AC26
AD22
AE28

AH24
AF25
AF27

AH26

G8
AD7
240K

1
HUB_PD10

C322 C381 Closely to C.G


HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9

1
+VS_HUBREF @10PF
1 2 @10PF
R91 80.6_1%
+V_AGTLREF
1

17 HUB_PD[0..10]
C469 C471
17 HUB_PSTRB
.1UF .1UF
17 HUB_PSTRB#
2

2
1

R246 2 1 54.9_1%
C476 R92 1 2 27.4_1%
4 PCIRST# 15,17,19,20,21,22,23,24,25,28,29,35 4
.01UF R83 1 2 54.9_1% 2 1
2

R78 54.9_1%
1

C470
.1UF
10 mils wide,length <=500 mils.
Compal Electronics, inc.
2

+VAGP_CRDREF Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 51 of 87
A B C D E
A B C D E

VSSA_DPLL0 10
VSSA_DPLL1 10

AG15
AG16
AG21
AD10

AH21

AH11
AH12
AH14
AH17
AH18
AE10
AE11
AE12
AE13
AE17
AE19

AB28

AE20
AF10
AF11
AF12
AF13
AF14
AF15
AF16
AF17
AF18
AF19
AF20
AJ21

W28
AG7
AD8
AD9

AH6
AH8
AH9

G24
AE8
AE9

N28

U25
AF8
AF9

K28

P25

Y25
T28

L25
U7B SM_D_MA[0..12]
SM_D_MA[0..12] 13
R254 0 *

VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM

VSSP_AGP0
VSSP_AGP1
VSSP_AGP2
VSSP_AGP3
VSSP_AGP4
VSSP_AGP5
VSSP_AGP6
VSSP_AGP7
VSSP_AGP8

VSSA_DPLL0
VSSA_DPLL1
VSSA_DPLL01 2
R306 0 *
SM_DQ0 D29 A20 SM_D_MA0 VSSA_DPLL11 2
SM_DQ1 SM_DQ0 SM_MA0 SM_D_MA1
C29 SM_DQ1 SM_MA1 B20
1 SM_DQ2 D27 B19 SM_D_MA2 1
SM_DQ3 SM_DQ2 SM_MA2 SM_D_MA3
C27 SM_DQ3 SM_MA3 C19
SM_DQ4 A27 A18 SM_D_MA4
SM_DQ5 SM_DQ4 SM_MA4 SM_D_MA5
B26 SM_DQ5 VSS SM_MA5 A19
SM_DQ6 E24 C17 SM_D_MA6
SM_DQ7 SM_DQ6 SM_MA6 SM_D_MA7
C25 SM_DQ7 SM_MA7 C18
SM_DQ8 E23 B17 SM_D_MA8
SM_DQ9 SM_DQ8 SM_MA8 SM_D_MA9
B25 SM_DQ9 SM_MA9 A17
SM_DQ10 C23 A16 SM_D_MA10
SM_DQ11 SM_DQ10 SM_MA10 SM_D_MA11
F22 SM_DQ11 SM_MA11 C15
SM_DQ12 B23 C14 SM_D_MA12
SM_DQ13 SM_DQ12 SM_MA12
C22 SM_DQ13
SM_DQ14 E21
SM_DQ15 SM_DQ14
B22 SM_DQ15 NC F20
SM_DQ16 C12 E20 XOR layout note:
SM_DQ17 SM_DQ16 NC F20,E20,F12,E11 add
D10 SM_DQ17 NC F12 For Almador-M A3 s tepping requirement.
SM_DQ18 C11 E11 testpoint for factory
SM_DQ19 SM_DQ18 NC
A10 SM_DQ19 VSS C21
SM_DQ20 C10 F19 +3V
SM_DQ21 SM_DQ20 VSS
C8 SM_DQ21 VCC_SM E12
SM_DQ22 A7 A12
SM_DQ23 SM_DQ22 VCC_SM
E9 SM_DQ23 1 2
SM_DQ24 C7 C512 .1UF
SM_DQ25 SM_DQ24 R3191
E8 SM_DQ25 SM_BA0 B16 2 10 SM_BA0 14
SM_DQ26 A5 C16 R3101 2 10
SM_DQ26 SM_BA1 SM_BA1 14
SM_DQ27 F8
SM_DQ28 SM_DQ27 SM_DQM[0..7] 14
C5 SM_DQ28
SM_DQ29 D6 F18 SM_DQM0

2
SM_DQ30
SM_DQ31
SM_DQ32
B4
C4
E27
SM_DQ29
SM_DQ30
SM_DQ31
SM_DQ32
SDRAM
System
Almador-M SDRAM
System
SM_DQM0
SM_DQM1
SM_DQM2
SM_DQM3
D18
D13
D12
SM_DQM1
SM_DQM2
SM_DQM3
2

SM_DQ33 Memory Memory SM_DQM4


SM_DQ34
SM_DQ35
C28
B28
E26
SM_DQ33
SM_DQ34 GMCH SM_DQM4
SM_DQM5
E18
F17
F14
SM_DQM5
SM_DQM6
SM_DQ36
SM_DQ37
SM_DQ38
C26
D25
A26
SM_DQ35
SM_DQ36
SM_DQ37
SM_DQ38
A3 SM_DQM6
SM_DQM7 F13 SM_DQM7

SM_DQ39 D24 E17 SM_CS#0


SM_DQ39 SM_CS#0 SM_CS#0 14
SM_DQ40 F23 F16 SM_CS#1
SM_DQ40 SM_CS#1 SM_CS#1 14
SM_DQ41 A25 D16 SM_CS#2
SM_DQ41 SM_CS#2 SM_CS#2 14
SM_DQ42 G22 D15 SM_CS#3
SM_DQ42 SM_CS#3 SM_CS#3 14
SM_DQ43 D22 E15 +3V
SM_DQ44 SM_DQ43 VCCQ_SM
A23 SM_DQ44 VSS E14
SM_DQ45 F21
SM_DQ46 SM_DQ45
D21 SM_DQ46
SM_DQ47 A22 A15 SM_D_CLK0
SM_DQ48 SM_DQ47 SM_CLK0 SM_D_CLK1
F11 SM_DQ48 SM_CLK1 B2
SM_DQ49 A11 B14 SM_D_CLK2
SM_DQ50 SM_DQ49 SM_CLK2 SM_D_CLK3
B11 SM_DQ50 SM_CLK3 A3
SM_DQ51 F10 A14
SM_DQ52 SM_DQ51 VSS
B10 SM_DQ52 VSS C3
SM_DQ53 B8
SM_DQ54 SM_DQ53
D9 SM_DQ54
SM_DQ55 B7 A13 SM_CKE0
SM_DQ55 SM_CKE0 SM_CKE0 14
SM_DQ56 F9 C9 SM_CKE1
SM_DQ56 SM_CKE1 SM_CKE1 14
SM_DQ57 A6 C13 SM_CKE2
SM_DQ57 SM_CKE2 SM_CKE2 14
SM_DQ58 C6 A9 SM_CKE3
SM_DQ58 SM_CKE3 SM_CKE3 14
SM_DQ59 D7 VSS Power B13
3 SM_DQ60 SM_DQ59 VSS 3
B5 SM_DQ60 VCC_SM A8
SM_DQ61 E6 C452 .1UF
SM_DQ62 SM_DQ61 +3V
VSSP_SM10
VSSP_SM11
VSSP_SM12
VSSP_SM13
VSSP_SM14
VSSP_SM15
VSSP_SM16
VSSP_SM17
VSSP_SM18
VSSP_SM19

A4 1 2
SM_VREF1
SM_VREF0
VSSP_SM0
VSSP_SM1
VSSP_SM2
VSSP_SM3
VSSP_SM4
VSSP_SM5
VSSP_SM6
VSSP_SM7
VSSP_SM8
VSSP_SM9

SM_DQ62
SM_OCLK

SM_DQ63
SM_RCLK

SM_CAS#
SM_RAS#
D4 SM_DQ63 SM_WE#
Layout note :
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

1.Placement TP6 for Almador-M A2 stepping die.


2.The 0.1uF capacitor and connection to +3V
ALMADOR-M
must be implante d for Almador-M A3 stepping
B3
B6
B9
B12
B15
B18
B21
B24
B27
E7
E10
E13
E16
E19
E22
E25
G9
G21
E4
D28

H7
H23
K7
K23
L7
N6
T6
W7
Y7
AB7
M24
P24
T24
V24
Y23
M14
M15
M16
P12
R12
T12
P18
R18
T18

F24
E5

C24
A24

A21
D19
C20

SM_DQ[0..63] di e.
SM_DQ[0..63] 14
R312 1 2 10
SM_RAS# 14
R311 1 2 10
SM_CAS# 14
R316 1 2 10
+VTT SM_WE# 14
SM_OCLK 1 2
SM_RCLK
C507 @22PF
Layout note :
Layout note :
Line length 0.15 inches +- 50mils near pin C24
Layout note :
+V_SMREF
Place resistors & capacitors near GMCH
1

C494 C493
Close to Ball E5 and F24
.1UF .1UF
2

4 4
SM_D_CLK0 R318 1 2 10
SMD_CLK0 14
SM_D_CLK1 R313 1 2 10
SMD_CLK1 14
SM_D_CLK2 R317 1 2 10
SMD_CLK2 14
SM_D_CLK3 R315 1 2 10
SMD_CLK3 14

Compal Electronics, inc.


1

C506 C516 C515 C517 Title


@33PF @33PF @33PF @33PF
SCHEMATIC, M/B LA-1371
2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 52 of 87
A B C D E
A B C D E

0_0805
1 2 +1.8VS VSSA_DPLL0 9 Strap Name Low High
R277
VSSA_DPLL1 9
*C283 *C282 DVOA_D0 Reserved 133MHz

1
+1.5VS +VTT
* *

1
C383 C384 C286 C285 DVOA_D1 IOQD=2 IOQD=8
+1.8VS C330 .1UF +3V @.1UF @.1UF@220UF_4V_D2 @220UF_4V_D2 +VTT

2
Layout note : 2 1 .01UF .1UF * L3 0_0805 R301 0 * DVOA_D5 Desktop Mobile

2
+VTT +3V +1.8VS 1 2 1 2
Place close to AE16, 2 1 1 2 1 2 DVOA_D6 Dual Ended Term Single Ended Term
C483 .1UF +VTT
AE15 of GMCH * L4 0_0805 R299 0 *
+1.5VS R269 1 2 @2.2K DVOA_D6
+1.5VS R226 1
1 2 2.2K DVOA_D5 1

1
C413

AG27
AD15
AD16

AD23

AC20

AC21
AE16
AE15

AE25

AA26

AA23

AF26

AF21
AF24
68PF R240 1 2 @2.2K DVOA_D0 1 2

W23

AG5
M26

AC9
AC8

AD5
G10
G20
AE6

AE7

AA5
N24

R26

U24

AF6
H_BSEL0 5,12

V14
V15
V16

V26
F26

F25
L23
J24

J26

M5
G7

R5
R232 @2.2K

V5

E2
F5
J5
2
U7C

VCCP_HUB
VCCP_HUB

VCCQ_AGP
VCCQ_AGP

VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
VDD_LM
VDD_LM
VDD_LM
VDD_LM
VDD_LM
VDD_LM
VDD_LM

VCCQ_SM
VCCQ_SM

VCCPCMOS_LM
VCCPCMOS_LM
VCCPCMOS_LM
VCCPCMOS_LM
VCCP_IO
VCCP_IO

VCCA_HPLL
VCCA_CPLL

VCCP_DVO
VCCP_DVO
VCCA_DAC
VCCA_DAC

VCC_H
VCC_H
VCC_H
VCC_H
VCC_H
VCC_H
VCC_H
VCC_H
VCC_H

VCCA_DPLL0
VCCA_DPLL1

VCCP_DVO
AGP_SBA[0..7]
15 AGP_SBA[0..7]
AGP_SBA0 AA29 AE29
AGP_SBA0/ZV_D8 DAC_VSYNC DAC_VSYNC 16
AGP_SBA1 AA24 AD28
AGP_SBA1/ZV_D7 DAC_HSYNC DAC_HSYNC 16
AGP_SBA2 AA25 AF28
AGP_SBA2/ZV_D6 DAC_RED# DAC_RED# 16
AGP_SBA3 Y24 AG28
AGP_SBA3/ZV_D5 DAC_GREEN# DAC_GREEN# 16
AGP_SBA4 Y27 AH27
AGP_SBA4/ZV_D2 DAC_BLUE# DAC_BLUE# 16
AGP_SBA5 Y26 AF29
AGP_SBA5/ZV_D1 DAC_RED DAC_RED 16
AGP_SBA6 W24 Power AG29
AGP_SBA6/ZV_D0 DAC_GREEN DAC_GREEN 16
AGP_SBA7 Y28 Interface AH28 R252 10K
AGP_SBA7/ZV_HREF DAC_BLUE DAC_BLUE 16
AE27 IO_DDC1CLK 1 2
AGP_CBE#[0..3] IO_DDC1CLK IO_DDC1DATA R262 1 +3VS
15 AGP_CBE#[0..3] IO_DDC1DATA AD27 2 10K
AGP_CBE#0 L27 AJ27 1 2
AGP_CBE#1 P29 AGP_CBE#0/DVOB_D7 DAC_REFSET R229 255_1% R551 1
AGP_CBE#1/DVOB_BLANK# 2 0 AGP_DDCCLK 15,16
AGP_CBE#2 R27 R552 1 2 0
AGP_CBE#2/ZV_VSYNC AGP_DDCDATA 15,16
AGP_CBE#3 T25 AD20 DVOA_CLKIN
AGP_CBE#3/DVOC_D5 DVO_CLKIN R551,R552: No stuff in AGP mode,
DVO_BLANK# AD21 VCH_I2CDATA 15
AF23 Stuff in VCH mode
DVO_VSYNC VCH_I2CCLK 15
15 AGP_ADSTB0 AGP_ADSTB0 L29 AF22
AGP_ADSTB#0 AGP_ADSTB0/DVOB_CLK DVO_HSYNC R261 1
15 AGP_ADSTB#0 L28 AGP_ADSTB#0/DVOB_CLK# IO_I2CCLK AD25 2 10K
15 AGP_ADSTB1 AGP_ADSTB1 U29 AC25 R263 1 2 10K
AGP_ADSTB#1 AGP_ADSTB1/DVOC_CLK IO_I2CDATA +3VS
15 AGP_ADSTB#1 U28 AGP_ADSTB#1/DVOC_CLK# DVO_CLK# AG24
2 AGP_SBSTB AA27 AJ24 2
15 AGP_SBSTB AGP_SBSTB/ZV_D4 DVO_CLK
AGP_SBSTB# AA28
15 AGP_SBSTB# AGP_SBSTB#/ZV_D3 +1.5VS
AGP_FRAME# R29
15 AGP_FRAME# AGP_FRAME#/M_DDC1_DATA
AGP_IRDY# P26 AJ22 DVOA_D0 R259 100K
15 AGP_IRDY# AGP_IRDY#/M_I2C_CLK DVO_D0
AGP_TRDY# P27 Display AH22 DVOA_D1 DVOA_CLKIN 1 2
15 AGP_TRDY# AGP_TRDY#/M_DDC1_CLK DVO_D1
AGP_STOP# N25 Interface AG22 R255 100K
15 AGP_STOP# AGP_STOP#/M_DDC2_DATA DVO_D2
AGP_DEVSEL# R28 AJ23 DVOA_INTR# 1 2
15 AGP_DEVSEL# AGP_DEVSEL#/M_I2C_DATA DVO_D3
AGP_REQ# AC27 (DVOA port) AH23 DVOA_D4 R256 10K
15 AGP_REQ# AGP_REQ#/ZV_CLK DVO_D4
AGP_GNT# AD29 AGP AG23 DVOA_D5 DVOA_FIELD 1 2
15 AGP_GNT# AGP_GNT#/ZV_D15 DVO_D5
AGP_PAR P28 Interface AE23 DVOA_D6
15 AGP_PAR
15 AGP_AD[0..31]
AGP_AD[0..31]

AGP_AD0 J29
AGP_PAR/DVO_DETECT

AGP_AD0/DVOB_HSYNC
(DVOB/DVOC & ZV port) Almador-M DVO_D6
DVO_D7
DVO_D8
DVO_D9
AE24
AJ25
AH25
XOR layout note: AE24,AJ25
add testpoint for factory
AGP_AD1
AGP_AD2
AGP_AD3
J28
K26
K25
AGP_AD1/DVOB_VSYNC
AGP_AD2/DVOB_D1 GMCH DVO_D10
DVO_D11
AG25
AJ26 TV_OUT_DDC2DATA 15
TV_OUT_DDC2CLK 15
AGP_AD4
AGP_AD5
AGP_AD6
L26
J27
K29
AGP_AD3/DVOB_D0
AGP_AD4/DVOB_D3
AGP_AD5/DVOB_D2
AGP_AD6/DVOB_D5
A3 IO_DDC2DATA
IO_DDC2CLK
AD26
AE26
R251 1
R250 1
2 10K
2 10K +3VS
AGP_AD7 K27 AE21 DVOA_INTR#
AGP_AD8 AGP_AD7/DVOB_D4 DVO_INTR# DVOA_FIELD
M29 AGP_AD8/DVOB_D6 DVO_FIELD AE22
AGP_AD9 M28
AGP_AD10 AGP_AD9/DVOB_D9
L24 AGP_AD10/DVOB_D8
AGP_AD11 M27 AG17
AGP_AD12 AGP_AD11/DVOB_D11 LM_DQA0
N29 AGP_AD12/DVOB_D10 LM_DQA1 AJ17
AGP_AD13 M25 AG18
AGP_AD14 AGP_AD13/DVOBC_CLKINT# LM_DQA2
N26 AGP_AD14/DVOB_FLD/STL LM_DQA3 AJ18
AGP_AD15 N27 AG19
AGP_AD16 AGP_AD15/M_DDC2_CLK LM_DQA4
3
R25 AGP_AD16/DVOC_VSYNC Lo cal Memory LM_DQA5 AJ19
3
AGP_AD17 R24 AG20
AGP_AD18 AGP_AD17/DVOC_HSYNC Interface LM_DQA6
T29 AGP_AD18/DVOC_BLANK# LM_DQA7 AJ20
AGP_AD19 T27
AGP_AD20 AGP_AD19/DVOC_D0
T26 AGP_AD20/DVOC_D1
AGP_AD21 U27 AJ11
AGP_AD22 AGP_AD21/DVOC_D2 LM_DQB0
V27 AGP_AD22/DVOC_D3 LM_DQB1 AH10
AGP_AD23 V28 AJ10
AGP_AD24 AGP_AD23/DVOC_D4 LM_DQB2
U26 AGP_AD24/DVOC_D7 LM_DQB3 AG10
AGP_AD25 V29 Local Memory AJ9
AGP_AD26 AGP_AD25/DVOC_D6 LM_DQB4 R257
W29 AG9
AGP_AD26/DVOC_D9 Interface LM_DQB5
AGP_PIPE#/ZV_D10

AGP_RBF#/ZV_D11

AGP_AD27 V25 AJ8 1 2


AGP_WBF#/ZV_D9

AGP_AD27/DVOC_D8 LM_DQB6 +3VS


AGP_ST0/ZV_D14
AGP_ST1/ZV_D13
AGP_ST2/ZV_D12

AGP_AD28 W26 AG8 *


AGP_AD29 AGP_AD28/DVOC_D11 LM_DQB7 10K
LM_RAMREF0
LM_RAMREF1

W25 AGP_AD29/DVOC_D10
AGP_AD30 W27 AGP_AD30/DVOBC_INTR#/DPMS_CLK

VCCQ_SM
VCCQ_SM

VCCQ_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM

VCCP_SM

VCCP_SM
AGP_AD31 AGP_BUSY#
LM_GCLK

LM_CTM#

LM_CFM#
LM_RCLK

Y29 AC24
LM_CMD

AGP_BUSY# 15,17
LM_CTM

LM_CFM

AGP_AD31/DVOC_FLD/STL AGP_BUSY#

VCC_LM
VCC_LM
VCC_LM
VCC_LM
VCC_LM
VCC_LM
VCC_LM
VCC_LM
VCC_LM
LM_RQ0
LM_RQ1
LM_RQ2
LM_RQ3
LM_RQ4
LM_RQ5
LM_RQ6
LM_RQ7
LM_SCK
LM_SIO

ALMADOR-M
AB26
AB29
AB25

AGP_ST0 AC28
AGP_ST1 AC29
AGP_ST2 AB27

AH7
AF7
AJ7

AG11
AJ12
AG12
AH13
AG13
AJ13
AG14
AJ14

AJ6
AG6

AD14
AE14

AH15
AJ15

AJ16
AH16

D5
D8
D11
D14
D17
D20
D23
D26
F7
F15
G11
G19
G23

AC10
AC11
AD11
AD12
AD13
AE18
AD17
AD18
AD19
+1.8VS

AGP_PAR : Strapping option for SW detection of


AGP or DVO device. AGP_PIPE#
15 AGP_PIPE#

1
0 -> DVO B/C device AGP_WBF# +3V
15 AGP_WBF#
1 -> AGP device AGP_RBF# C354
15 AGP_RBF#
68PF

2
AGP_PAR AGP_ST[0..2]
4 15 AGP_ST[0..2] 4

R272 R279 R234 1 2 10K +VS_RIMMREF


1 2 1 2 R239 1 2 10K
+1.5VS
@8.2K 330

Compal Electronics, inc.


1

Title
C340 C328
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL .1UF .1UF SCHEMATIC, M/B LA-1371
2

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 53 of 87
A B C D E
A B C D E

Layout note : Layout note :


Distribute as close as possible Distribute as close as possible
to GMCH Processor Quadrant . to VCCPCMOS_LM .

+1.8VS
+VTT

1 1

1
C363 C364 C365 C334
1

1
+ C302
C353 C327 C350 C357 C358 C343 C344 C387 C407 C419 22UF_16V_1206 .1UF .1UF .01UF .01UF

2
.1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF
2

2
+VTT

Layout note :
1

1
Distribute as close as possible
C437 C454 C466 C474 C427 C435 C438 C460 C459 C462
.1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF
to GMCH Local Memory Quadrant .
2

2
+1.8VS

1
1

1
C345+ C301 C359 C360 C361 C356 C355+ C298 + C299 + C319 + C320 + C300

82PF 22UF_16V_1206 .1UF .1UF 82PF .1UF .1UF 68UF_4V_B2 68UF_4V_B2 68UF_4V_B2 @68UF_4V_B2 @68UF_4V_B2

2
2 +VTT 2
Layout note :
Distribute as close as possible
1

to GMCH AGP/DVO Quadrant .


1

1
+ C127
220UF_4V_D2 C405 C404 C403 C418 C429 C436 C372 C386 C399 C423
.1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF
2

2
+1.5VS

+VTT

1
+ C379 C415 C428 C457
C287 C336 C335 C382 C400 C366 C406 C442 C244 C443
1

.1UF .1UF 82PF .1UF .1UF 82PF .1UF .1UF 82PF .1UF .1UF 82PF .1UF

2
1

1
+ C80
220UF_4V_D2 C410 C463 C473 C81 C28 C74 C88 C31 C78 C83 22UF_16V_1206
.1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF
2

2
+VTT
Layout note :
Distribute as close as possible
to GMCH System Memory Quadrant .
1

+ C36
220UF_4V_D2 C380 C401 C422 C441 C451 C456 C465 C458 C472 C468 +3V
3 .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF 3
2

1
+VTT + C481 C501 C496 C497
C523 C477 C482 C503 C502 C500 C489 C498 C495 C480 C479 C491 C505
22UF_16V_1206 .1UF .1UF 82PF .1UF .1UF 82PF .1UF .1UF 82PF .1UF .1UF 82PF .1UF .1UF .1UF .1UF
2

2
1

C475 C484 C490 C504 C402 C414 C417 C464


.1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF
2

Layout note :
Distribute as close as possible
+VTT
to IO Quadrant .
1

+3V
+ C62 + C106
220UF_4V_D2 220UF_4V_D2
2

+ C524 C499 C511


22UF_16V_1206 .1UF .1UF
2

2
2

4 4

Title
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 54 of 87
A B C D E
A B C D E

+3VS L6 +3V_CLK
CHB2012U170
1 2 Width=40 mils

1
Check Bead Value +
C115 C130 C133 C152 C121 C122 C124 C155 C156 C123
should be 19.6K 22UF_16V_1206 .01UF .01UF .01UF .01UF .01UF .01UF .01UF .01UF .01UF

2
1 1

14
19
32
37
46
50
1
8
U10
+3VS Place Crystal within 500 mils of CK_Titan

VDD_PCI
VDD_PCI
VDD_REF

VDD_48MHZ
VDD_3V66
VDD_3V66

VDD_CPU
VDD_CPU
L5 +3VS
+3VS C118 5PF CHB2012U170
1 2 2 XTAL_IN VDD_CORE 26 1 2
+3VS

1
1
caps are internal Y1 + Place all these Block's
1

1
to CK_TITAN 14.318MHZ C120 C128
R146 R110 R111 .01UF 22UF_16V_1206
Components near CK_Titan(U5)

2
10K 330 330
1 2 3 XTAL_OUT GND_CORE 27
2

C129 5PF 45 CLK_BCLK 1 2


CPUCLKT2 CLK_HCLK 5
SEL2 40 R324 1 2 33
SEL2

1
SEL1 55 R329 61.9_1%
5 H_BSEL1 SEL1
SEL0 54 Place all these Block's
5,10 H_BSEL0 SEL0 R334
Components near CPU (U1)
1

R528 1 2 0 475_1%
17,33 PM_SLP_S1#
R145 R112 R114 R328 1 2 61.9_1%

2
@0 @0 @0 R529 1 2 @0 25 44 CLK_BCLK# 1 2 33
17,33 PM_SLP_S3# PWR_DWN# CPU_CLKC2 CLK_HCLK# 5
34 R323
17 PM_STPPCI# PCI_STOP#
R116 1 2 0 53 49 CLK_GCLK 1 2
17 PM_STPCPU# CLK_GHT 8
2

CPU_STOP# CPUCLKT1 R32 1 2 33

1
R562 1 2 10K R33 61.9_1%
+3VS
2 Place all these Block's 2
1 2 28 R34
5,33 VTT_PWRGD# D47 VTT_PWRGD# 475_1%
Components near GMCH (U6)
RB751V R31 1 2 61.9_1%

2
48 CLK_GCLK# R30 1 2 33 CLK_GHT# 8
R138 1 CPUCLKC1
2 10K 43 MULT0
CPUCLKT0 52
R157 1 2 4.7K
+3V

7,14,17 SMB_DATA 29 SDATA


7,14,17 SMB_CLK 30 SCLK

+3V 1 2
R154 4.7K 51
CPUCLKC0
33 3V66_0/DRCG
R151 1 2 33 35 24
15 CLK_VCH R151: No stuff in AGP mode 3V66_1/VCH_CLK 66MHZ_IN/3V66_5 CLK_GBOUT 8
Stuff in VCH mode 2 1
23 R153 1 2 33 CLK_AGPCONN 15 @33_0402
R137 1 66MHZ_OUT2/3V66_4
2 220_1% 42 IREF 66MHZ_OUT1/3V66_3 22 R150 1 2 33 CLK_GBIN 8
@10PF
* 22 1_1% 21 R147 1 2 33 R155 C154
66MHZ_OUT0/3V66_2 CLK_ICHHUB 17
R119:Stuff in AGP mode
No stuff in VCH mode
R141 1 2 22 39 7 R119 1 2 33
17 CLK_ICH48 48MHZ_USB PCICLK_F2 CLK_ICHPCI 17
* 33 6 R118 1 2 33 PCIF1
PCICLK_F1 R115 1
PCICLK_F0 5 2 @33 PCIF0

R149 1 2 22 38
8 CLK_DREF 48MHZ_DOT
* 33 18 R143 1 2 33
3 PCICLK6 CLK_PCI_CB 23 3
17 R144 1 2 33
PCICLK5 CLK_PCI_LAN 21
16 R140 1 2 33
PCICLK4 CLK_LPC_SIO 25
R108 1 2 33 56 13 R136 1 2 33
17 CLK_ICH14 REF PCICLK3 CLK_PCI_1394 22
1 2 12 R125 1 2 @33
25 CLK_SIO14 PCICLK2 CLK_PCI_SD/SM 29
GND_48MHZ

R109 33 11 R121 1 2 33
PCICLK1 CLK_LPC_EC 33
GND_3V66
GND_3V66

GND_IREF
GND_CPU
GND_REF

10 R122 1 2 33
GND_PCI
GND_PCI

PCICLK0 CLK_MINIPCI 28

1
C147 C149 C150
Place caps. near
1

C135 C148 ICS950805 @10PF @10PF @10PF


CK_Titan (U5)
4
9
15
20
31
36
41
47

2
Place caps. near
@10PF @10PF
CK Titan (U5)
2

Place near CPU


R36 26.7_1%
PCIF1 1 2 CLK_CPU_APIC 5
PCIF0 1 2 CLK_ICHAPIC 17
SEL2 SEL1 SEL0 CPUCLKC[0..2] CPUCLKT[0..2] R351
1 0 0 66.67 66.67 @51.1_1%

1
1 0 1 100.00 100.00
1 1 0 200.00 200.00 R35 R352 348_1%
1 1 1 133.33 133.33 137_1% 0_0603
0 ohm resistor for ICH3 doesn't
need to support APIC function.

2
4 4

Title
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 55 of 87
A B C D E
A B C D E

9,14 SM_DQ[0..63] MD[0..63] 9,14

SM_DQ0 MD0 SM_DQ32 MD32


SM_DQ1 MD1 SM_DQ33 MD33
SM_DQ2 MD2 SM_DQ34 MD34 Layout note :
1 SM_DQ3 MD3 SM_DQ35 MD35 1
One .1uF cap per power pin .
Place each cap close to SODIMM(DIMM 0) pin .
SM_DQ4 MD4 SM_DQ36 MD36
SM_DQ5 MD5 SM_DQ37 MD37
SM_DQ6 MD6 SM_DQ38 MD38
SM_DQ7 MD7 SM_DQ39 MD39 +3V

SM_DQ8 MD8 SM_DQ40 MD40

1
SM_DQ9 MD9 SM_DQ41 MD41 C167 C184 C169 C199 C195 C190 C188 C216 C203
SM_DQ10 MD10 SM_DQ42 MD42 C192 C168 C164 C170 C196 C194 C189 C209 C202
SM_DQ11 MD11 SM_DQ43 MD43 .1UF 1000PF .1UF 1000PF .1UF 1000PF .1UF 1000PF .1UF 1000PF .1UF 1000PF .1UF 1000PF .1UF 1000PF .1UF 1000PF

2
SM_DQ12 MD12 SM_DQ44 MD44 +3V
SM_DQ13 MD13 SM_DQ45 MD45
SM_DQ14 MD14 SM_DQ46 MD46

1
SM_DQ15 MD15 SM_DQ47 MD47
+ C119
22UF_16V_1206

2
SM_DQ16 MD16 SM_DQ48 MD48
SM_DQ17 MD17 SM_DQ49 MD49
SM_DQ18 MD18 SM_DQ50 MD50
SM_DQ19 MD19 SM_DQ51 MD51
2 2

SM_DQ20 MD20 SM_DQ52 MD52 Layout note :


SM_DQ21 MD21 SM_DQ53 MD53
SM_DQ22 MD22 SM_DQ54 MD54 One .1uF cap per power pin .
SM_DQ23 MD23 SM_DQ55 MD55
Place each cap close to SODIMM(DIMM 1) pin .

SM_DQ24 MD24 SM_DQ56 MD56


SM_DQ25 MD25 SM_DQ57 MD57 +3V
SM_DQ26 MD26 SM_DQ58 MD58
SM_DQ27 MD27 SM_DQ59 MD59

1
C211 C210 C207 C166 C221 C219 C217 C165 C214
SM_DQ28 MD28 SM_DQ60 MD60 C212 C205 C206 C222 C215 C220 C218 C160 C187
SM_DQ29 MD29 SM_DQ61 MD61 .1UF 1000PF .1UF 1000PF .1UF 1000PF .1UF 1000PF .1UF 1000PF .1UF 1000PF .1UF 1000PF .1UF 1000PF .1UF 1000PF

2
SM_DQ30 MD30 SM_DQ62 MD62
SM_DQ31 MD31 SM_DQ63 MD63

+3V

1
+ C126
22UF_16V_1206

2
3 3

9 SM_D_MA[0..12] MAA[0..12] 14

RP22
SM_D_MA0 1 8 MAA0
SM_D_MA1 2 7 MAA1
SM_D_MA2 3 6 MAA2
SM_D_MA3 4 5 MAA3

8P4R_10
RP21
SM_D_MA4 1 8 MAA4
SM_D_MA5 2 7 MAA5
SM_D_MA6 3 6 MAA6
SM_D_MA7 4 5 MAA7

8P4R_10
RP20
SM_D_MA8 1 8 MAA8
SM_D_MA9 2 7 MAA9
SM_D_MA10 3 6 MAA10
SM_D_MA11 4 5 MAA11
4 4
8P4R_10

SM_D_MA12 1 2 MAA12

R176 10

Title
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 56 of 87
A B C D E
A B C D E

+3V +3V +3V

SO-DIM 144 PINS


RAM MODULE CONN.
+3V
BANK 0/1 +3V
+
C142

10UF_10V_1206
+
C143

10UF_10V_1206
+
C132

10UF_10V_1206
BANK 2/3
+3V +3V

JP26 JP27
1 VSS VSS 2 1 VSS VSS 2
MD0 3 4 MD8 MD0 3 4 MD8
MD1 DQ0 DQ32 MD9 MD1 DQ0 DQ32 MD9
1 5 DQ1 DQ33 6 5 DQ1 DQ33 6 1
MD2 7 8 MD10 MD2 7 8 MD10
MD3 DQ2 DQ34 MD11 MD3 DQ2 DQ34 MD11
9 DQ3 DQ35 10 9 DQ3 DQ35 10
MAA[0..12] 11 12 11 12
13 MAA[0..12] VCC VCC VCC VCC
MD4 13 14 MD12 MD4 13 14 MD12
MD5 DQ4 DQ36 MD13 MD5 DQ4 DQ36 MD13
15 DQ5 DQ37 16 15 DQ5 DQ37 16
MD[0..63] MD6 17 18 MD14 MD6 17 18 MD14
9 MD[0..63] DQ6 DQ38 DQ6 DQ38
MD7 19 20 MD15 MD7 19 20 MD15
SM_DQM[0..7] DQ7 DQ39 DQ7 DQ39
9 SM_DQM[0..7] 21 VSS VSS 22 21 VSS VSS 22
SM_DQM0 23 24 SM_DQM1 SM_DQM0 23 24 SM_DQM1
SM_DQM4 CE0# CE4# SM_DQM5 SM_DQM4 CE0# CE4# SM_DQM5
25 CE1# CE5# 26 25 CE1# CE5# 26
27 VCC VCC 28 27 VCC VCC 28
MAA0 29 30 MAA3 MAA0 29 30 MAA3
MAA1 A0 A3 MAA4 MAA1 A0 A3 MAA4
31 A1 A4 32 31 A1 A4 32
MAA2 33 34 MAA5 MAA2 33 34 MAA5
A2 A5 A2 A5
35 VSS VSS 36 35 VSS VSS 36
MD32 37 38 MD40 MD32 37 38 MD40
MD33 DQ8 DQ40 MD41 MD33 DQ8 DQ40 MD41
39 DQ9 DQ41 40 39 DQ9 DQ41 40
MD34 41 42 MD42 MD34 41 42 MD42
MD35 DQ10 DQ42 MD43 MD35 DQ10 DQ42 MD43
43 DQ11 DQ43 44 43 DQ11 DQ43 44
45 VCC VCC 46 45 VCC VCC 46
MD36 47 48 MD44 MD36 47 48 MD44
MD37 DQ12 DQ44 MD45 MD37 DQ12 DQ44 MD45
49 DQ13 DQ45 50 49 DQ13 DQ45 50
MD38 51 52 MD46 MD38 51 52 MD46
MD39 DQ14 DQ46 MD47 MD39 DQ14 DQ46 MD47
53 DQ15 DQ47 54 53 DQ15 DQ47 54
55 VSS VSS 56 55 VSS VSS 56
C204 R174 57 58 C163 R162 57 58
RESVD/DQ64 RESVD/DQ68 RESVD/DQ64 RESVD/DQ68
59 RESVD/DQ65 RESVD/DQ69 60 59 RESVD/DQ65 RESVD/DQ69 60
2 10PF 22 10PF 22 2
61 62 SM_CKE0 61 62 SM_CKE2
9 SMD_CLK0 RFU/CLK0 RFU/CKE0 SM_CKE0 9 9 SMD_CLK2 RFU/CLK0 RFU/CKE0 SM_CKE2 9
63 VCC VCC 64 63 VCC VCC 64
SM_RAS# 65 66 SM_CAS# SM_RAS# 65 66 SM_CAS#
9 SM_RAS# RFU RFU RFU RFU SM_CAS# 9
SM_WE# 67 68 SM_CKE1 SM_WE# 67 68 SM_CKE3
9 SM_WE# WE# RFU/CKE1 SM_CKE1 9 WE# RFU/CKE1 SM_CKE3 9
SM_CS#0 69 70 MAA12 SM_CS#2 69 70 MAA12
9 SM_CS#0 SM_CS#1 RE0# RFU 9 SM_CS#2 SM_CS#3 RE0# RFU
9 SM_CS#1 71 RE1# RFU 72 9 SM_CS#3 71 RE1# RFU 72
73 OE#/RESVD RFU/CLK1 74 SMD_CLK1 9 73 OE#/RESVD RFU/CLK1 74 SMD_CLK3 9
75 VSS VSS 76 75 VSS VSS 76
77 RESVD/DQ66 RESVD/DQ70 78 77 RESVD/DQ66 RESVD/DQ70 78
79 RESVD/DQ67 RESVD/DQ71 80 79 RESVD/DQ67 RESVD/DQ71 80
81 82 R175 81 82 R170
MD16 VCC VCC MD24 22 MD16 VCC VCC MD24 22
83 DQ16 DQ48 84 83 DQ16 DQ48 84
MD17 85 86 MD25 MD17 85 86 MD25
MD18 DQ17 DQ49 MD26 MD18 DQ17 DQ49 MD26
87 DQ18 DQ50 88 87 DQ18 DQ50 88
MD19 89 90 MD27 MD19 89 90 MD27
DQ19 DQ51 DQ19 DQ51
91 VSS VSS 92 91 VSS VSS 92
MD20 93 94 MD28 C223 MD20 93 94 MD28 C193
MD21 DQ20 DQ52 MD29 10PF MD21 DQ20 DQ52 MD29 10PF
95 DQ21 DQ53 96 95 DQ21 DQ53 96
MD22 97 98 MD30 MD22 97 98 MD30
MD23 DQ22 DQ54 MD31 MD23 DQ22 DQ54 MD31
99 DQ23 DQ55 100 99 DQ23 DQ55 100
101 VCC VCC 102 101 VCC VCC 102
MAA6 103 104 MAA7 MAA6 103 104 MAA7
MAA8 A6 A7 SM_BA0 MAA8 A6 A7 SM_BA0
105 A8 A11/BA0 106 SM_BA0 9 105 A8 A11/BA0 106
107 VSS VSS 108 107 VSS VSS 108
MAA9 109 110 SM_BA1 MAA9 109 110 SM_BA1
A9 A12/BA1 SM_BA1 9 A9 A12/BA1
MAA10 111 112 MAA11 MAA10 111 112 MAA11
A10 A13/A11 A10 A13/A11
113 VCC VCC 114 113 VCC VCC 114
SM_DQM2 115 116 SM_DQM3 SM_DQM2 115 116 SM_DQM3
3 SM_DQM6 CE2#/RESVD CE6#/RESVD SM_DQM7 SM_DQM6 CE2#/RESVD CE6#/RESVD SM_DQM7 3
117 CE3#/RESVD CE7#/RESVD 118 117 CE3#/RESVD CE7#/RESVD 118
119 VSS VSS 120 119 VSS VSS 120
MD48 121 122 MD56 MD48 121 122 MD56
MD49 DQ24 DQ56 MD57 MD49 DQ24 DQ56 MD57
123 DQ25 DQ57 124 123 DQ25 DQ57 124
MD50 125 126 MD58 MD50 125 126 MD58
MD51 DQ26 DQ58 MD59 MD51 DQ26 DQ58 MD59
127 DQ27 DQ59 128 127 DQ27 DQ59 128
129 VCC VCC 130 129 VCC VCC 130
MD52 131 132 MD60 MD52 131 132 MD60
MD53 DQ28 DQ60 MD61 MD53 DQ28 DQ60 MD61
133 DQ29 DQ61 134 133 DQ29 DQ61 134
MD54 135 136 MD62 MD54 135 136 MD62
MD55 DQ30 DQ62 MD63 MD55 DQ30 DQ62 MD63
137 DQ31 DQ63 138 137 DQ31 DQ63 138
139 VSS VSS 140 139 VSS VSS 140
SDADIMM0 141 142 SCKDIMM0 +3V SDADIMM1 141 142 SCKDIMM1
SDA SCL C230 SDA SCL
143 VCC VCC 144 143 VCC VCC 144

SO-DIMM144-STANDRD SO-DIMM144 REVERSE


.1UF
U18
16

DIMM0 6 1 SCKDIMM0
DIMM1
VCC

INH X0 SCKDIMM1
17 SM_SEL0 10 A X1 5
9 B X2 2
X3 4

7,12,17 SMB_CLK 3 X
12 SDADIMM0
Y0 SDADIMM1
7,12,17 SMB_DATA 13 Y Y1 14
15
GND
GND

Y2
4 Y3 11 4

74HC4052 SM_SEL0 X/Y


7
8

0 SCKDIMM0
+3V 1 SCKDIMM1
RP4
SCKDIMM1
Compal Electronics, inc.
1 8
2 7 SCKDIMM0 Title
SDADIMM1
3
4
6
5 SDADIMM0 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
8P4R_10K R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 57 of 87
A B C D E
5 4 3 2 1

KSI[0..7]
33 KSI[0..7]
KS0[0..15]
33 KSO[0..15] Int. Keyboard CONN.
JP11
AGP CONN. 17,23,24,29 RTCCLK 1 2 +12V
+3V 3 4 +3V
5 6
JP8 7 8
RP38 +2.5V
KSI0 9 10 KSI1
D
16 AGP_R 1 1 2 2 CRMA 16 1 8 PID0 25 11 12 D
3 4 2 7 KSI2 KSI3
16 AGP_G 3 4 LUMA 16 PID1 25 13 14
5 6 3 6 KSI4 KSI5
16 AGP_B 5 6 COMPS 16 PID2 25 15 16
7 8 4 5 KSI6 KSI7
16 AGP_HSYNC1 7 8 TV_SYNC 16 PID3 25 17 18
9 10 TVOUT_IO_DDC2CLK KSO0 KSO1
16 AGP_VSYNC1 9 10 TVOUT_IO_DDC2DATA 19 20
11 12 @8P4R_0 In AGP mode : stuff RP38, no stuff RP39. KSO2 KSO3
10,16 AGP_DDCDATA 11 12 VCH_IO_I2CCLK In VCH mode: stuff RP39, no stuff RP38. KSO4 21 22 KSO5
10,16 AGP_DDCCLK 13 13 14 14 23 24
15 16 VCH_IO_I2CDATA RP39 KSO6 KSO7
16 DDC_MD2 15 16 25 26
17 18 INVT_PWM 1 8 KSO8 KSO9
16,18 M_SEN# 17 18 INVT_PWM 33 TV_OUT_DDC2CLK 10 27 28
19 20 2 7 KSO10 KSO11
+5VALW 19 20 +5VALW TV_OUT_DDC2DATA 10 29 30
DAC_BRIG 21 22 ENBKL 3 6 KSO12 KSO13
33 DAC_BRIG 21 22 ENBKL 33 VCH_I2CCLK 10 31 32
23 24 ENVEE 4 5 KSO14 KSO15
21,22,23,24,28,29 CBRST# 23 24 ENVEE 33 VCH_I2CDATA 10 33 34
+1.5V 25 25 26 26 +1.5V +3VS 35 36 +5V
27 28 8P4R_0
27 28 +5VS 37 38
+1.5VS 29 29 30 30 +1.5VS 33 TP_DATA 39 40 TP_CLK 33
31 31 32 32
17,21,25,35 SUS_STAT# 33 34 PIRQA# 17,19,22,23 HEADER 2X20
33 34 PCI_RST#
10,17 AGP_BUSY# 35 35 36 36 PCIRST# 8,17,19,20,21,22,23,24,25,28,29,35
10 AGP_REQ# 37 37 38 38 AGP_GNT# 10
10 AGP_ST0 39 39 40 40 AGP_ST1 10
10 AGP_ST2 41 41 42 42 AGP_PIPE# 10
10 AGP_RBF# 43 43 44 44 AGP_WBF# 10
45 45 46 46
AGP_SBA0 47 48 AGP_SBA1
AGP_SBA2 47 48 AGP_SBA3
49 49 50 50
10 AGP_SBSTB 51 51 52 52 AGP_SBSTB# 10
AGP_SBA4 53 54 AGP_SBA5 +1.5V +3.3VAUX +3VS_MDC +5VS_MDC
AGP_SBA6 53 54 AGP_SBA7
55 55 56 56
AGP_CLK 57 58
12 CLK_AGPCONN 57 58

1
C 59 60 + C101 C146 C145 C159 C
59 60 AGP_CBE#3 10
AGP_AD31 61 62 AGP_AD30
AGP_AD29 61 62 AGP_AD28 22UF_16V_1206 1UF_25V_0805 1UF_25V_0805 1UF_25V_0805
63 64

2
AGP_AD27 63 64 AGP_AD26
65 65 66 66
AGP_AD25 67 68 AGP_AD24
67 68
69 69 70 70
10 AGP_ADSTB1 71 71 72 72 AGP_ADSTB#1 10
73 73 74 74
AGP_AD23 75 76 AGP_AD22
AGP_AD21 75 76 AGP_AD20
77 77 78 78
AGP_AD19 79 80 AGP_AD18
AGP_AD17 79 80 AGP_AD16
81 81 82 82
10 AGP_CBE#2 83 83 84 84
CLK_VCH 85 86 AGP_FRAME#
12 CLK_VCH 85 86 AGP_FRAME# 10
AGP_IRDY# 87 88
10 AGP_IRDY# 87 88 AGP_TRDY# 10
AGP_DEVSEL# 89 90
10 AGP_DEVSEL# 89 90 AGP_STOP# 10 JP13
91 91 92 92 AGP_PAR 10
10 AGP_CBE#1 93 93 94 94
AGP_AD14 95 96 AGP_AD15 1 2
95 96 31 MD_MIC MONO_OUT/PC_BEEP AUDIO_PWDN MDC_DN# 34
AGP_AD12 97 98 AGP_AD13 3 4
97 98 GND MONO_PHONE MD_SPK 31
AGP_AD10 99 100 AGP_AD11 5 6
AGP_AD8 99 100 AGP_AD9 AUXA_RIGHT RESERVED
101 101 102 102 7 AUXA_LEFT GND 8
103 104 9 10 +5VS_MDC1 2
103 104 CD_GND +5V +5VS
10 AGP_ADSTB0 105 105 106 106 AGP_ADSTB#0 10 11 CD_RIGHT RESERVED 12
107 108 13 14 L41 CHB1608B121
STP_AGP# 107 108 CD_LEFT RESERVED
109 109 110 110 AGP_CBE#0 10 15 GND RESERVED 16 1 2 +3VS
AGP_AD7 111 112 AGP_AD6 17 18
AGP_AD5 111 112 AGP_AD4 +3.3VAUX L39 3.3Vaux RESERVED R388 10K
113 113 114 114 19 GND RESERVED 20
AGP_AD3 115 116 AGP_AD2 1 2 +3VS_MDC 21 22
B 115 116 +3VS 3.3Vmain AC97_SYNC IAC_SYNC 17,31 B
AGP_AD1 117 118 AGP_AD0 CHB1608B121 23 24 1 2
+VAGP_BRDREF 119
117
119
118
120 120 +VAGP_CRDREF
17,31 IAC_SDATAO
17,31 IAC_RST# 25
27
AC97_SDATA_OUT AC97_SDATA_IN1
AC97_RESET#
GND
AC97_SDATA_IN0
GND
26
28
R548
1
22
2
* IAC_SDATAI1 17
29 30 R383 @22
HEADER 2X60 AC97_MSTRCLK AC97_BITCLK
* 1 2
R381 @10K
AGP_AD[0..31] AMP-108-5424
10 AGP_AD[0..31] +3V
MDC CONN. 1 2
AGP_SBA[0..7] C727 IAC_BITCLK 17,31
10 AGP_SBA[0..7] R378 22
1 2
R104 C112
AGP_CLK 1 2 1 2 .1UF U60
5

@33 @15PF 1
17,21,25,35 SUS_STAT# 4 STP_AGP#
R120 C125
17 C3_STAT# 2
CLK_VCH 1 2 1 2
3

@33 @15PF @7SH08FU

1 2

R544 0
A A

Compal Electronics, inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 58 of 87
5 4 3 2 1
A B C D E

TV_OUT CONN.
DAN217 DAN217 DAN217
D11 D10 D9

1
R559 For CH7011
1 2 +3VS
R559 @0

3
1 1 2 +5VS 1
L17
R560 0 R560 For CH7007
15 TV_SYNC 1 2
@FBM-11-160808-121 L21 JP2
1 2 1
15 LUMA FBM-11-160808-121
2
L20 3
15 CRMA 1 2 4
FBM-11-160808-121
L22 5
6
15 COMPS 1 2 7
FBM-11-160808-121
S CONN._SUYIN
1

1
R220 R218 R219 C293 C291 C292 C261 C270 C269
C262
75 75
75 47PF 47PF 47PF 47PF 47PF 47PF 47PF
2

2
2

TV_GND

In AGP mode: No stuff C326,R245,C318,R231,C325,R230.


2 In VCH mode: Stuff C326,R245,C318,R231,C325,R230 2

C326 .1UF *
1 2

R245 37.5_1% *
10 DAC_RED# 1 2

C318 .1UF *
1 2
R231 37.5_1% *
10 DAC_GREEN# 1 2

C325 .1UF *
1 2
R230 37.5_1% *
10 DAC_BLUE# 1 2

+5VS

+5VS +5VS
CRT Connector
1

R_CRT_VCC CRT_VCC
3 R86 D8 F1 3
1

1
D7 D6 D5 2 1 1 2
10K

1
In AGP mode: No stuff R6,R8,R10,R12,R14. Stuff R9,R11,R13,R549,R550 FUSE_1A
RB491D
2

In VCH mode: Stuff R6,R8,R10,R12,R14. No stuff R9,R11,R13,R549,R550


C5

2
DAN217 DAN217 DAN217 .1UF JP3
15 DDC_MD2
2

3
CRT-15P
In AGP mode: Stuff R16,R15,R7. No stuff R553,R554,R555.
15,18 M_SEN#
L10 6 In VCH mode: Stuff R553,R554,R555. No stuff R16,R15,R7
R14 1 2 0 11 CRT_VCC
10 DAC_RED R13 CRT_VCC
15 AGP_R 1 2 @0 1 2 1
FCM2012C80_0805 7 +12VS +3VS +5VS +5VS
R12 1 2 0 L11 12
10 DAC_GREEN R11
15 AGP_G 1 2 @0 1 2 2

1
FCM2012C80_0805 8

1
R10 1 2 0 L12 13 R16
10 DAC_BLUE R9
15 AGP_B 1 2 @0 1 2 3 R553 R554 R555
FCM2012C80_0805 CRT_VCC 9 2.2K 2.2K 100K @2.2K R15 R7
2

C264 14 @2.2K @2.2K

2
1

C265 R200 R201 C266 C256 C255 C254 4

2
R199 18PF 10
2

75 18PF 75 75 18PF 15PF 15PF 15PF 15


2

C253 5
1

2
100PF
AGP_DDCDATA 10,15
2

@0 L1
R549 3 1 1 2 5VDDCDA 1 3
15 AGP_HSYNC1

2
Q18 CHB1608B121 Q1
2N7002 5VDDCCL 2N7002
4 4
FROM AGP CONN. L2 1 3 AGP_DDCCLK 10,15
2

R550 @0 C2
15 AGP_VSYNC1 3 1 1 2
CHB1608B121 220PF C252 Q3
1

Q17 220PF 2N7002


2

R202 100K 2N7002 C3 C4 C250


Compal Electronics, inc.
2

68PF 68PF 100PF


+12VS
2

*10PF *10PF
R6 0 Title
10 DAC_HSYNC 1
*
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
FROM GMCH 1 2 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
10 DAC_VSYNC R8 0 R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 59 of 87
A B C D E
A B C D

RP15
1 8 ICH_PID0
36 ICH_VGATE LPC_AD0 25,33
ECSMI# 2 7 ICH_PID1
19 ECSMI# 5,19 PM_CPUPERF# LPC_AD1 25,33
ECSCI# 3 6 ICH_PID2

IAC_SDATAO
19 ECSCI# 7,43 PM_GMUXSEL LPC_AD2 25,33 +3VS
LID# 4 5 ICH_PID3
19 LID# 33 ATF_INT# LPC_AD3 25,33

IAC_SYNC
IDE_PATADET
20 IDE_PATADET 15,21,25,35 SUS_STAT# LPC_DRQ#0 19,33

0
R60 0 8P4R_4.7K
12 PM_STPPCI# LPC_DRQ#1 19,25
5,23,24,29 RTCCLK 2 1 PM_SUSCLK 12 PM_STPCPU#
C60
LPC_FRAME# 25,33

PIDEPWR
R65 @10K
33 PM_SLP_S5#
IAC_BITCLK GNTA# 1 2
15,31 IAC_BITCLK 12,33 PM_SLP_S3# SM_SEL0 14 +3VS

1
10K
IAC_RST# GPIO_25 1 2
15,31 IAC_RST# 12,33 PM_SLP_S1# SIDEPWR 20 +3V

2 47
2 47
IAC_SDATAI0 PM_RSMRST# R72 R54 10K
31 IAC_SDATAI0 36 PM_RSMRST# CLK_ICHAPIC 12 Place closely to ICH3-M
IAC_SDATAI1 1 2
15 IAC_SDATAI1 19 ICH_RI# H_PICD0 5
1 IAC_SDATAO 0 R37 CLK_ICHAPIC 1
15,31 IAC_SDATAO 36 SYS_PWROK H_PICD1 5
I AC_SYNC

CLK_ICHAPIC
IAC_BITCLK 2
15,31 IAC_SYNC 19 PBTN#

2
IAC_SDATAI0
IAC_SDATAI1

IDE_PATADET
PM_SUSCLK
7,43 PM_DPRSLPVR R342

ICH_PID0
ICH_PID1
ICH_PID2
ICH_PID3
IAC_RST#
INT_IRQ14 19,20

H_PICD0
H_PICD1
19,22,23,25,28,29,33 PM_CLKRUN# @33_0402

PIRQC#
PIRQD#
PIRQA#
PIRQB#
INT_IRQ15 19,30

1
1
15 C3_STAT#

ECSCI#
ECSMI#

GPIO_25
33 PM_BATLOW# INT_SERIRQ 19,23,25,33
PM_LANPWROK

LID#

1
R70
R69
10,15 AGP_BUSY#
C540

AB21

AB14
PIRQA# @10PF

W20

W19
AC2
AB3

AB1
AA6
AA1
AA7

AA5
AA2

AA4
AB4
U21

U20

D11

C11

H22
V21

Y20
V19

B11
PIRQA# 15,19,22,23

J19
J20
J21
W2

W3
W4
U5

C7

U3

U2

U4
U1

C1

C5
PIRQB#

V4
Y5

V5

B7

A7

V1

V2

Y4
Y2

Y3

B1

B2
A2
A6
B5

A5
T3

T2
U33A PIRQC# PIRQB# 19,21,23
21,22,23,28,29 PCI_AD[0..31] PIRQD# PIRQC# 19,28,29

INT_APICCLK
PM_AUXPWROK

PM_PWROK

PM_SUS_CLK

AC_BITCLK
PM_AGPBUSY#/GPIO6

PM_BATLOW#

PM_GMUXSEL/GPIO23

AC_SDATAOUT

GPIO_7
GPIO_8
GPIO_12
GPIO_13
GPIO_25
GPIO_27
GPIO_28

INT_APICD0
INT_APICD1
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
INT_PIRQE#/GPIO2
INT_PIRQF#/GPIO3
INT_PIRQG#/GPIO4
PM_C3_STAT#/GPIO21
PM_CLKRUN#/GPIO24

PM_PWRBTN#

PM_RSMRST#
PM_RI#

PM_SLP_S1#/GPIO19
PM_SLP_S3#
PM_SLP_S5#
PM_STPCPU#/GPIO20
PM_STPPCI#/GPIO18

PM_SUS_STAT#
PM_THRM#

PM_CPUPREF#/GPIO22
PM_VGATE/VRMPWRGD

AC_RST#
AC_SDATAIN0
AC_SDATAIN1

AC_SYNC

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_FRAME#
LPC_DRQ#0
LPC_DRQ#1

INT_PIRQH#/GPIO5
INT_IRQ14
INT_IRQ15
INT_SERIRQ
PM_DPRSLPVR
PIRQD# 19,28,29
CLK_ICHPCI

1
PCI_AD0 J2 T5 CLK_ICHPCI R66
PCI_AD0 PCI_CLK CLK_ICHPCI 12
PCI_AD1 K1 M3
PCI_AD1 PCI_DEVSEL# PCI_DEVSEL# 19,21,22,23,28,29
PCI_AD2 J4 F1 @10
PCI_AD2 PCI_FRAME# PCI_FRAME# 19,21,22,23,28,29
PCI_AD3 K3 C4 PCI_REQA# 19

1 2
PCI_AD4 PCI_AD3 PCI_GPIO0/REQA#
H5 PCI_AD4 PCI_GPIO1/REQB#/REQ5# D4 PCI_REQB# 19
PCI_AD5 K4 AC'97 LPC unMUX Interrupt B6 GNTA# C42
PCI_AD6 PCI_AD5 PCI_GPIO16/GNTA#
H3 PCI_AD6 Power Management Geyserville Interface Interface GPIO Interface PCI_GPIO17/GNTB#/GNT5# B3
PCI_AD7 L1 N3 @15PF
PCI_IRDY# 19,21,22,23,28,29

2
PCI_AD8 PCI_AD7 PCI_IRDY#
L2 PCI_AD8 PCI_PAR G5 PCI_PAR 19,21,22,23,28,29
PCI_AD9 G2 M2
PCI_AD9 PCI_PERR# PCI_PERR# 19,21,22,23,28
PCI_AD10 L4 M1
PCI_AD10 PCI_LOCK# PCI_LOCK# 19
PCI_AD11 H4 PCI W1
PCI_AD11 PCI_PME# ICH_WAKE_UP# 33
2 PCI_AD12 M4 Interface Y1 2
PCI_AD13 PCI_AD12 PCI_RST# PCIRST# 8,15,19,20,21,22,23,24,25,28,29,35
J3 PCI_AD13 PCI_SERR# L5 PCI_SERR# 19,21,22,23,28
PCI_AD14 M5 H2
PCI_AD14 STOP# PCI_STOP# 19,21,22,23,28,29
PCI_AD15 J1 H1
PCI_AD15 PCI_TRDY# PCI_TRDY# 19,21,22,23,28,29
PCI_AD16 F5
PCI_AD17 PCI_AD16 +1.5VS
N2 PCI_AD17
PCI_AD18 G4 Y6
PCI_AD18 SM_INTRUDER# SM_INTRUDER# 19
PCI_AD19 P2 AC3
PCI_AD19 SMLINK0 SMLINK0 19
PCI_AD20 G1 AB2
PCI_AD20 System SMLINK1 SMLINK1 19

1
PCI_AD21 P1 Managment SMB_CLK AC4
Place closely to ICH3-M PCI_AD21 SMB_CLK 7,12,14
PCI_AD22 F2 AB5 R327 (for use if CPU unable
PCI_AD23 PCI_AD22 Interface SMB_DATA SMB_DATA 7,12,14
@10K to support DPSLP#)
P3 PCI_AD23 SMB_ALERT#/GPIO11 AC5 SMB_ALERT# 19
CLK_ICH14 PCI_AD24 F3 PCI
PCI_AD25 R1
PCI_AD24
Interface
ICH3-M (1/2)

2
PCI_AD25
1

PCI_AD26 E2 Y22
PCI_AD26 CPU_A20GATE GATEA20 33
R337 PCI_AD27 N4 V23
PCI_AD27 CPU_A20M# H_A20M# 5
PCI_AD28 D1 AB22 1 2
@10 PCI_AD29 PCI_AD28 CPU_DPSLP# H_DPSLP# 5,43
P4 PCI_AD29 CPU_FERR# J22 H_FERR# 5
PCI_AD30 E1 AA21 R332 0
H_IGNNE# 5
1 2

PCI_AD31 PCI_AD30 CPU_IGNNE#


P5 PCI_AD31 CPU_INIT# AB23 H_INIT# 5
C541 CPU AA23
CPU_INTR H_INTR 5
Interface CPU_NMI Y21 H_NMI 5
@15PF K2 W23
21,22,23,28,29 PCI_C/BE#0 H_PW RGD 5
2

PCI_C/BE#0 CPU_PWRGOOD
21,22,23,28,29 PCI_C/BE#1 K5 PCI_C/BE#1 CPU_RCIN# U22 RC# 33
21,22,23,28,29 PCI_C/BE#2 N1 PCI_C/BE#2 CPU_SLP# W21
21,22,23,28,29 PCI_C/BE#3 R2 PCI_C/BE#3 CPU_SMI# Y23 H_SMI# 5
CLK_ICH48 U23
STPCLK# H_STPCLK# 5
1

19,22 PCI_GNT#0 A4 PCI_GNT#0


3 R340 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL HUB_PD0 3
19,28 PCI_GNT#1 E3 PCI_GNT#1 HUB_PD0 L22
D2 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF M21 HUB_PD1 H_PICD0
19,23 PCI_GNT#2 PCI_GNT#2 R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS HUB_PD1
@10 D5 M23 HUB_PD2 H_PICD1
19,21 PCI_GNT#3 PCI_GNT#3 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. HUB_PD2
B4 N20 HUB_PD3
1 2

19,28 PCI_GNT#4 PCI_GNT#4 HUB_PD3

1
P21 HUB_PD4
C534 HUB_PD4 HUB_PD5
HUB_PD5 R22
D3 R20 HUB_PD6 R338 R339
19,22 PCI_REQ#0 PCI_REQ#0 HUB_PD6
@15PF F4 VSS Clocks LAN EEPROM HubLink T23 HUB_PD7 1K 1K
19,28 PCI_REQ#1
2

PCI_REQ#1 HUB_PD7 HUB_PD8


19,23 PCI_REQ#2 A3 Interface Interface Interface M19

2
PCI_REQ#2 HUB_PD8 HUB_PD9
19,21 PCI_REQ#3 R4 PCI_REQ#3 HUB_PD9 P19
E4 N19 HUB_PD10
19,28 PCI_REQ#4 PCI_REQ#4 HUB_PD10

LAN_RSTSYNC

HUB_VSWING

HUB_PSTRB#
HUB_RCOMP
CLK_RTEST#

HUB_PSTRB
HUB_PD[0..10]

EEP_SHCLK
CLK_RTCX1
CLK_RTCX2
CLK_VBIAS

EEP_DOUT

HUB_VREF
LAN_RXD2
LAN_RXD1
LAN_RXD0
HUB_PD[0..10] 8

LAN_TXD2
LAN_TXD1
LAN_TXD0
LAN_JCLK

HUB_PAR
HUB_CLK
EEP_DIN
EEP_CS
CLK_14
CLK_48
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34

CLK_ICHHUB
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9

+VS_HUBREF

2
+VS_HUBVSWING R344
ICH3-M
A1
A13
A16
A17
A20
A23
B8
B10
B13
B14
B15
B18
B19
B20
B22
C3
C6
F19
C14
C15
C16
C17
C18
C19
C20
C21
C22
D9
D13
D16
D17
D20
D21
D22
E5

J23
F20
RTC_RST# Y7
RTC_X1 AC7
RTC_X2 AC6
AB7

D7
C9
A10
C10
B9
A9
A8
C8

D10
E8
D8
E9

L19
L20
K19
P23
N22
R19
T19
10
RTC_VBIAS

CLK_ICHHUB
CLK_ICHHUB 12

1
CLK_ICH14 HUB_PSTRB 8 C543
12 CLK_ICH14 HUB_PSTRB# 8
CLK_ICH48 HUB_ICH_RCOMP 1 2 5PF
12 CLK_ICH48
1

R287 1K 1 2 R346
+RTCVCC
1 2 1 2 RTC_VBIAS R77 36.5_1%
+RTCVCC

1
C426 .047UF R286 15K @0
1

4 4
RTC_X1 C530 C529
C416 J1
1 2 1 2 1 2 RTC_X2 .01UF .01UF
JOPEN
2

2
R521 22M 1UF_10V_0603
2

Close to ICH3-M.
R295 10M R294 10M
1

X2 PM_LANPWROK
R522 R278 100K
1K R59 C44 Compal Electronics, inc.
1

2.4M C461 32.768KHZ C444 1 2 1 2 Title


+3V
SCHEMATIC, M/B LA-1371
2

12PF 12PF
2

R67 10K .1UF Size Document Number Rev


PM_RSMRST# 1 Custom 1B
2 401208
Date: 星期一, 四月 07, 2003 Sheet 60 of 87
A B C D
A B C D E

CLOSE TO ICH3-M(< 1 inch)


C508 @5PF +3V
+5VS +3VS
1 2
USB_D_PP1
27 USB_PP1

1
USB_D_PN1
27 USB_PN1
USB_D_PP0 R73 D26 R305
27 USB_PP0
USB_D_PN0 1K 1SS355 0
27 USB_PN0
+V5S_ICHREF

2
1 2
1 1
C509 @5PF VCC5REF

1
1

1
C91 @5PF C492
1 2 C58 C455 .1UF

2
.1UF 1UF_10V_0603

VCC5REFSUS
USB_D_PP3
27 USB_PP3
USB_D_PN3 +1.8V
27 USB_PN3
USB_D_PP2 +3V
27 USB_PP2 +1.8V +V1.8_ICHLAN
USB_D_PN2 +1.5VS
27 USB_PN2

1
L33
R320 +RTCVCC
1 2 1 2

1
1 2 0_0805 R341
CHB2012U170 0_0805 +3VS +1.8VS
C197 @5PF R298 +1.8VA_ICH

2
0_0805
C86 @5PF

2
1 2

M10

M14
G18
AB6

C13

U18

C23

H18

R18
E13

K12
P10

K10

P14

V22

B23

A21
A22

P12
V15
V16
V17
V18

E11

K18

P18
V10
V14
F14

F15
F16

F10

T21

T18
J18
W8

W5

G6
D6

C2

H6

R6

U6
USB_D_PP4

V6
V7

E6

E7

K6

P6
F7
F8

F9

T1

F6

T6
J6
USB_PP4 U33B
USB_D_PN4
USB_PN4

VCC_SUS0
VCC_SUS1
VCC_SUS2
VCC_SUS3
VCC_SUS4
VCC_SUS5

VCC_USB0/VCC_SUS6
VCC_USB1/VCC_SUS7

VCC_AUX0/VCCLAN1_8
VCC_AUX1/VCCLAN1_8
VCC_AUX2/VCCLAN1_8

VCC5REF1
VCC5REF2

VCC5REFSUS1
VCC5REFSUS2

N/C0
N/C1
N/C2
N/C3
N/C4

VSS102
VSS103

VCCPPCI0
VCCPPCI1
VCCPPCI2
VCCPPCI3
VCCPPCI4
VCCPPCI5
VCCPPCI6
VCCPPCI7

VCCP0
VCCP1

VCCPIDE0
VCCPIDE1
VCCPIDE2
VCCPIDE3
VCCPIDE4

VCCPHL0
VCCPHL1
VCCPHL2
VCCPHL3

VCCCORE0
VCCCORE1
VCCCORE2
VCCCORE3
VCCCORE4
VCCCORE5
VCCCORE6
VCC_RTC

VCCPAUX0/VCCLAN3_3
VCCPAUX1/VCCLAN3_3

VCCPCPU0
VCCPCPU1
VCCPCPU2

VCCUSBBG/VCC_SUS8

VCCUSBPLL/VCC_SUS9
IDE_PDCS1# AC15 IDE_PDCS1# 20
+3V RP19 AB15
8P4R_10K USB_D_PP0 IDE_PDCS3# IDE_PDCS3# 20
D19 USB_PP0 IDE_SDCS1# AC21 IDE_SDCS1# 30
2 USB_D_PP1 A19 AC22 2
USB_OC#2 USB_D_PP2 USB_PP1 IDE_SDCS3# IDE_SDCS3# 30
1 8 E17 USB_PP2
2 7 USB_D_PP3 B17 AA14
USB_OC#4 USB_D_PP4 USB_PP3 IDE_PDA0 IDE_PDA0 20
3 6 D15 USB_PP4 Power IDE_PDA1 AC14 IDE_PDA1 20
4 5 USB_OC#5 USB_PP5 A15 AA15
USB_D_PN0 USB_PP5 IDE_PDA2 IDE_PDA2 20
D18 USB_PN#0 IDE_SDA0 AC20 IDE_SDA0 30
USB_D_PN1 A18 AA19
USB_D_PN2 USB_PN#1 IDE_SDA1 IDE_SDA1 30
E16 USB_PN#2 IDE_SDA2 AB20 IDE_SDA2 30
USB_D_PN3 B16 USB_PN#3 IDE_PDD[0..15] 20
USB_D_PN4 D14 W12 IDE_PDD0
USB_PN5 USB_PN#4 IDE_PDD0 IDE_PDD1
A14 USB_PN#5 IDE_PDD1 AB11
AA10 IDE_PDD2
IDE_PDD2 IDE_PDD3
IDE_PDD3 AC10
USB_OC#0 E12 W11 IDE_PDD4
27 USB_OC#0 USB_OC#0 IDE_PDD4
USB_OC#1 D12 Y9 IDE_PDD5
27 USB_OC#1 USB_OC#1 IDE_PDD5
USB_OC#2 C12 AB9 IDE_PDD6
USB_OC#3 USB_OC#2 IDE_PDD6 IDE_PDD7
27 USB_OC#3 B12 USB_OC#3 IDE_PDD7 AA9
USB_OC#4 A12 USB AC9 IDE_PDD8
USB_OC#5 USB_OC#4 IDE_PDD8 IDE_PDD9
A11 USB_OC#5 Interface IDE_PDD9 Y10
W9 IDE_PDD10
IDE_PDD10 IDE_PDD11
IDE_PDD11 Y11
H20 AB10 IDE_PDD12
20 ICH_IDE_PRST# USB_LEDA#0/GPIO32 IDE_PDD12
G22 AC11 IDE_PDD13
20 ICH_IDE_SRST# USB_LEDA#1/GPIO33 IDE_PDD13
F21 AA11 IDE_PDD14
USB_LEDA#2/GPIO34 IDE_PDD14 IDE_PDD15
G19 AC12

ICH3-M (2/2)
USB_LEDA#3/GPIO35 IDE_PDD15 IDE_SDD[0..15] 30
R98 @0 E22 IDE
USB_LEDA#4/GPIO36 IDE_SDD0
1 2 E21 USB_LEDA#5/GPIO37 Interface IDE_SDD0 Y17
H21 W17 IDE_SDD1
USB_LEDG#0/GPIO38 IDE_SDD1 IDE_SDD2
19 FWH_WP# G23 USB_LEDG#1/GPIO39 IDE_SDD2 AC17
3 IDE_SDD3 3
19 FWH_TBL# F23 USB_LEDG#2/GPIO40 IDE_SDD3 AB16
G21 W16 IDE_SDD4
34 EC_FLASH# ICH_ACIN USB_LEDG#3/GPIO41 IDE_SDD4 IDE_SDD5
D23 USB_LEDG#4/GPIO42 IDE_SDD5 Y14
E23 AA13 IDE_SDD6
15,16 M_SEN# USB_LEDG#5/GPIO43 IDE_SDD6
W15 IDE_SDD7
IDE_SDD7 IDE_SDD8
IDE_SDD8 W13
USB_RBIAS B21 Y16 IDE_SDD9
USB_RBIAS IDE_SDD9 IDE_SDD10
IDE_SDD10 Y15
1

AC16 IDE_SDD11
R314 ICH_SPKR IDE_SDD11 IDE_SDD12
32 ICH_SPKR H23 SPKR Misc IDE_SDD12 AB17
18.2_1% AA17 IDE_SDD13
IDE_SDD13 IDE_SDD14
IDE_SDD14 Y18
U19 AC18 IDE_SDD15
2

+1.8VS VCCA IDE_SDD15


Power
IDE_PDDACK# Y13 IDE_PDDACK# 20
R309
+3V 1 2 F17 VCCPSUS3/VCCPUSB0 IDE_SDDACK# Y19 IDE_SDDACK# 30
0_0805 F18 VCCPSUS4/VCCPUSB1 IDE_PDDREQ AB12 IDE_PDDREQ 20
K14 VCCPSUS5/VCCPUSB2 IDE_SDDREQ AB18 IDE_SDDREQ 30
IDE_PDIOR# AC13 IDE_PDIOR# 20
VSS IDE_SDIOR# AC19 IDE_SDIOR# 30
Disable Timeout Feature E10 Y12
+V3A_ICH VCCPSUS0 IDE_PDIOW# IDE_PDIOW# 20
V8 VCCPSUS1 IDE_SDIOW# AA18 IDE_SDIOW# 30
1 2 ICH_SPKR V9 AB13
+3VS VCCPSUS2 IDE_PIORDY IDE_PIORDY 20
IDE_SIORDY AB19 IDE_SIORDY 30
R343

VSS100
VSS101
@1K
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
4 +3VS 4
ICH3-M
E14
E15
E18
E19
E20
F22
G3
G20
H19
AA22
J5
K11
K13
K20
K21
K22
K23
L3
L10
L11
L12
L13
L14
L21
L23
M11
M12
M13
M20
M22
N5
N10
N11
N12
N13
N14
N21
N23
P11
P13
P20
P22
R3
R5
R21
R23
T4
T20
T22
V3
AC23
V20
W6
W7
W10
W14
W18
W22
Y8
AA3
AA8
AA12
AA16
AA20
AB8
AC1
AC8
1

R326

100K
Title
Compal Electronics, inc.
2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
1 2 ICH_ACIN AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
33,35,38,41 ACIN D32 RB751V R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 61 of 87
A B C D E
A B C D E

+3VS +3VS

RP13
17,21,22,23,28,29 PCI_FRAME# 1 10
17,21,22,23,28,29 PCI_IRDY# 2 9 PCI_SERR# 17,21,22,23,28
17,21,22,23,28,29 PCI_TRDY# 3 8 PCI_DEVSEL# 17,21,22,23,28,29
17,21,22,23,28,29 PCI_STOP# 4 7 PCI_PERR# 17,21,22,23,28
5 6 PCI_LOCK# 17
10P8R_8.2K
1 1

+3VS +3VS +3VS

RP18 RP24
1 10 1 8 R71 1 2 @100
17 PCI_REQA# 18 FWH_WP# 17,21,22,23,28,29 PCI_PAR
17 PCI_REQB# 2 9 PCI_REQ#2 17,23 18 FWH_TBL# 2 7
17,22 PCI_REQ#0 3 8 PCI_REQ#3 17,21 17,22,23,25,28,29,33 PM_CLKRUN# 3 6
17,28 PCI_REQ#1 4 7 PCI_REQ#4 17,28 4 5
5 6 INT_SERIRQ 17,23,25,33
8P4R_10K
10P8R_8.2K
+3V
+3VS +3VS

RP14
17,28 PCI_GNT#1 1 10
2 9 R289 1 2 10K
17,23 PCI_GNT#2 INT_IRQ15 17,30 17 SMB_ALERT#
17,28,29 PIRQD# 3 8 PIRQA# 15,17,22,23
17,20 INT_IRQ14 4 7 PIRQB# 17,21,23
+V5S_ICHREF +1.5VS
5 6 PIRQC# 17,28,29
10P8R_8.2K
+3VS +3VS

1
1

1
1 2 R45 1 2 10K + +
17,22 PCI_GNT#0 17,33 LPC_DRQ#0
R57 8.2K C75 C49 C64 C84 C102 C110
1 2 1UF_10V_0603 .1UF .1UF 1UF_10V_0603 .1UF .1UF
17,21 PCI_GNT#3

2
2 R63 8.2K R56 1 2 10K 2
17,25 LPC_DRQ#1

17,28 PCI_GNT#4 1 2

R58 8.2K
+3V

+3VS
8,15,17,20,21,22,23,24,25,28,29,35 PCIRST# 1 2
R39 @8.2K
17 SMLINK0 1 2
R515 4.7K

1
17 SMLINK1 1 2

1
R516 4.7K + + C46 C56 C77 C89 C162
C362 C385 C51 C47 C50 C55 C57 C65 C93 C94 C87 C100 C103 C161 C73
22UF_16V_1206 22UF_16V_1206 .1UF .1UF 47PF .1UF .1UF 47PF .1UF .1UF 47PF .1UF .1UF .1UF 47PF .1UF .1UF 47PF .1UF .1UF

2
+RTCVCC

17 SM_INTRUDER# 1 2
R282 100K +3V
+V1.8_ICHLAN
R300 @10K
5,17 PM_CPUPERF# 1 2 +VTT
1

1
+ C487 C69 C63 C54
C341 C486 C485 C488
22UF_16V_1206 .1UF .1UF .1UF 47PF .1UF .1UF .1UF
2

2
3 PBTN# 3
33 PBTN_OUT# 1 2 PBTN# 17
D14 RB751V +1.8VS

33,35 ON/OFF 1 2
D15 @RB751V
1

1
+3V 1 2 +
R38 10K C317 C85 C52 C95 C96 C76 C98 C99
1 2 ICH_RI# 150UF_6.3V_D2 .1UF 47PF .1UF .1UF 47PF .1UF .1UF
33 EC_RIOUT# ICH_RI# 17
2

2
D13 RB751V

+3V 1 2
R47 10K +1.8VA_ICH
1 2 ECSMI#
33 EC_SMI# ECSMI# 17
D16 RB751V
+3V 1 2
1

R42 10K
1

1 2 ECSCI# +
33 EC_SCI# ECSCI# 17
D17 RB751V C527 C531 C532 C533
22UF_16V_1206 .1UF .1UF .1UF
2

+3V 1 2
R40 10K
1 2 LID# +V3A_ICH
33 EC_LID_OUT# LID# 17
D18 RB751V

C92 C82 C61 C66 C104 C68

.1UF .1UF .1UF .1UF .01UF .01UF


4 4

Title
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS Custom 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 62 of 87
A B C D E
+5VS
IDE,CD-ROM Module CONN.

+5VS HDD Manual ATA Type Selection:


C107

1
C109 C114
C518 ATA33 : populate R43, de-populate R46.
1000PF 10UF_16V_1206
1UF_25V_0805 .1UF ATA66/100 : populate R46, de-populate R43.

1
IDE_PDD[0..15] R43
18 IDE_PDD[0..15] Place component's closely IDE CONN. +5VCD Q9 +5VMOD
@10K SI3456DV
6

2
5 4
JP7
IDE_PATADET 17 2

1
PIDE_RST# 1
IDE_PDD7 1 2 IDE_PDD8 C174 R161
+
3 4

1
IDE_PDD6 IDE_PDD9 4.7UF_16V_1206

3
IDE_PDD5 5 6 IDE_PDD10 R46 <1st Part Field> 1K

2
IDE_PDD4 7 8 IDE_PDD11 +12VALW

2
IDE_PDD3 9 10 IDE_PDD12 10K
IDE_PDD2 11 12 IDE_PDD13

D2
R165

2
IDE_PDD1 13 14 IDE_PDD14
15 16 2 1

3
IDE_PDD0 IDE_PDD15 Q39
17 18

1
100K DTC144EKA 5 EXTIDE_EN#
IDE_PDDREQ 19 20
G2
18 IDE_PDDREQ 21 22

4
18 IDE_PDIOW# 23 24 47K Q41B
18 IDE_PDIOR# 25 26 34 EXTIDEPWR# 2

S2
IDE_PIORDY PCSEL 1 2 R412 1K SI1906DL
18 IDE_PIORDY 27 28 R84 470 C176

D1
18 IDE_PDDACK# INT_IRQ14 29 30 .01UF
17,19 INT_IRQ14 47K

2
31 32

6
18 IDE_PDA1 33 34 1 2
R556 @0 2
18 IDE_PDA0 IDE_PDA2 18 17 SIDEPWR

3
35 36 G1 Q41A
18 IDE_PDCS1# 37 38 IDE_PDCS3# 18
SI1906DL
34 PHDD_LED#

1
39 40
+5VS 41 42 +5VS

S1
+5VS 1 2 43 44
R95 100K
SI3456DV: N CHANNEL
VGS: 4.5V, RDS: 65 mOHM
1 2 SHDD_LED# HDD 44P SUYIN 20225A-44G5-A R75 10K R82 5.6K Id(MAX): 5.1A
+5VMOD
R167 100K 1 2 IDE_PDD7 1 2 IDE_PDDREQ VGS,+-20V
R152 5.6K
CDD[0..15] R429 10K 1 2 CD_DREQ
30 CDD[0..15]
1 2 CDD7

JP17 R88 1K
1 2 IDE_PIORDY
31 INT_CD_L 1 2 INT_CD_R 31 +3VS
CD_AGND CD_AGND
31 CD_AGND 3 4
CD_RSTDRV# CD D8 R428 1K
30 CD_RSTDRV# 5 6
CD D7 CD D9 1 2 CD_SIORDY
CD D6 7 8 CDD10 +5VMOD
CD D5 9 10 CDD11
CD D4 11 12 CDD12
CD D3 13 14 CDD13
CD D2 15 16 CDD14
CD D1 17 18 CDD15 +5VS
CD D0 19 20 CD_DREQ C140
21 22 CD_DREQ 30
23 24 CD_SIOR# 30 1 2
30 CD_SIOW# 25 26 CD_DACK# 30
CD _SIORDY .1UF U12
30 CD_SIORDY 27 28 CD_SBA2 30

5
CD_IRQ
30 CD_IRQ 29 30 CD_SCS3# 30
EXTID0 PCIRST# 1
30 CD_SBA1 31 32 EXTID0 34 8,15,17,19,21,22,23,24,25,28,29,35 PCIRST#
EXTID1 4 PIDE_RST#
30 CD_SBA0 33 34 EXTID1 34
EXTID2 2
30 CD_SCS1# 35 36 EXTID2 34 18 ICH_IDE_PRST#
SHDD_LED# HDSEL#
34 SHDD_LED# 37 38 HDSEL# 25
EXTCSEL

3
39 40 WGATE# 7SH08FU
41 42 WGATE# 25
RDATA# 43 44
25 RDATA# 45 46
WP#
25 WP# 47 48
TRACK0# FDD IR#
25 TRACK0# 49 50 FDDIR# 25
WDATA# 3MODE#
25 WDATA# 51 52 3MODE# 25
STEP#
25 STEP# 53 54 +5VS
MTR0#
25 MTR0# 55 56
DSKCHG# INDEX#
25 DSKCHG# 57 58 INDEX# 25
DRV0#
25,34 DRV0# 59 60 +5VMOD C139
HEADER 2X30 1 2
.1UF
+5VS +3VALW U13

5
RP2 RP3
8 1 DSKCHG# 1 8 EXTID0 PCIRST#1
7 2 INDEX# 2 7 EXTID1 4 SIDE_RST# 30
6 3 WP# 3 6 EXTID2 2
TRACK0# 18 ICH_IDE_SRST#
5 4 4 5

3
8P4R_1K 8P4R_100K 7SH08FU

1 2 DRV0#
R253 1K
RP1
WDATA# 6 5 +5VS
WGATE# 7 4 STEP#
HDSEL# 8 3 MTR0#
FDD IR# 9 2 RDATA# W=80mils
+5VMOD
+5VS 10 1
1

C186 C182 C185

10P8R_1K 1000PF
C183
1UF_25V_0805 .1UF
10UF_16V_1206
Compal Electronics, inc.
2

Title
1 2 EXTCSEL SCHEMATIC, M/B LA-1371
R166 470 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Place component's closely CD-ROM CONN. AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 63 of 87
5 4 3 2 1

LAN_IDSEL +3V

AVDD-1 1 2
1 L28 @4.7UH
R271
AVDD-2 1 2
@100K L27 @4.7UH
2

AVDD-3 1 2
L25 @4.7UH

D C288 D
33 LAN_PME#

1
LAN_RD- C295 C306 C304 @4.7UF_10V_1206
LAN_RD+
3

*BOM 16.9K_1% @.1UF @.1UF @.1UF

2
2 Q24 LAN_TD-
34 EN_LAN#
LAN_TD+
@2N7002
1

1
R241 LAN_X1
15,17,25,35 SUS_STAT#
1 2 Y2
+12VALW R217 LAN_X2 @25 MHz
@470K @1.69K_1% LAN_X1 LAN_X2
2

ACTIVITY#
LINK10_100#
+3VS 1 2

1
+2.5VLAN C312 C311

1
PCI_AD17 1 3 LAN_IDSEL R227 @1K +3VLAN +3V
@18PF @18PF R52

2
Q23 R222 +3V For 3V LAN only 1 2
@FDV301 @15K
@0_1206

1
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
U6 R224
+3VLAN

ISOLATEB

PMEB
TXD+
LED0
LED1

LED2

RXIN+

RTSET
AVDD25

AVDD25

RTT2
RTT3

X1
X2

AVDD25

VCTRL

VDD25
NC

AVDD

GND

TXD-
AVDD

RXIN-
GND

GND

AVDD

GND

NC
NC
NC
@5.6K
17,19,23 PIRQB# @0 1 2 R484 +3V

2
8,15,17,19,20,22,23,24,25,28,29,35 PCIRST# @0 1
15,22,23,24,28,29 CBRST# 2 R485
81 INTAB AUX 50 AUX U5

1
82 49 LAN_EECS 1 8 C348 C347 C367 C369 C332
CLK_PCI_LAN RSTB EECS LAN_EECLK CS VCC
12 CLK_PCI_LAN 83 CLK EESK 48 2 SK NC 7

1
C 84 47 LAN_EEDI 3 6 C21 .1UF 1000PF .1UF 1000PF .1UF C
17,19 PCI_GNT#3

2
GNTB EEDI LAN_EEDO DI NC
17,19 PCI_REQ#3 85 REQB EEDO 46 4 DO GND 5
PCI_AD31 86 45 PCI_AD0 @.1UF

2
PCI_AD30 AD31 AD0 PCI_AD1 @9346
87 AD30 AD1 44
+3VLAN 88 43 +2.5VLAN +2.5VLAN
PCI_AD29 GND GND PCI_AD2 +3VLAN
89 AD29 AD2 42
90 41 PCI_AD3
PCI_AD28 VDD AD3
91 AD28 VDD25 40

1
PCI_AD27 92 39 C368 C351 C371 C329 C349
PCI_AD26 AD27 VDD PCI_AD4
93 AD26 AD4 38
+2.5VLAN PCI_AD25 94 37 PCI_AD5 .1UF 1000PF .1UF 1000PF .1UF

2
PCI_AD24 AD25 AD5 PCI_AD6
95 AD24 AD6 36
96 VDD25 VDD25 35
97 VDD VDD 34
98 33 PCI_AD7
17,22,23,28,29 PCI_C/BE#3 CBE3B AD7
R2701 2 @100 99 32
IDSEL CBE0B PCI_C/BE#0 17,22,23,28,29
1

LAN_IDSEL PCI_AD23 R187

DEVSELB
100 31

FRAMEB
C370 AD23 GND @510_0603 JP5

PERRB
SERRB
TRDYB

STOPB
CBE2B

CBE1B
VDD25

IRDYB

1
C29
AD22

AD21
AD20
AD19

AD18
AD17
AD16

AD15
AD14
AD13
AD12
AD11
AD10
1 2 12
GND

GND
VDD

VDD
PAR
2

AD9
AD8
@.1UF C333 Amber LED+
@.1UF @4.7UF_10V_1206 11

2
Amber LED-
16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
SHLD4

1
@RTL8100-L 8
Q20 PR4-
C SHLD3 15
10K
@DTA114YKA 7 PR4+
PCI_FRAME#

ACTIVITY# 2
PCI_AD22

PCI_AD21
PCI_AD20
PCI_AD19

PCI_AD18
PCI_AD17
PCI_AD16

PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_C/BE#2

PCI_TRDY#

PCI_PERR#
PCI_SERR#
PCI_DEVSEL#
PCI_IRDY#

PCI_STOP#

PCI_AD9
PCI_AD8
RJ45_RX- 6 PR2-
PCI_PAR B
47K
PCI_AD[0..31] E
5
B 17,22,23,28,29 PCI_AD[0..31] PR3- B
+2.5VLAN
4

3
PR3+
RJ45_RX+ 3
+3V PR2+
CLK_PCI_LAN RJ45_TX- 2 PR1-
17,22,23,28,29 PCI_C/BE#2 +3VLAN SHLD2 14
1

RJ45_TX+ 1
17,19,22,23,28,29 PCI_FRAME# PR1+
1

R238 13
17,19,22,23,28,29 PCI_IRDY# SHLD1
C352 10
17,19,22,23,28,29 PCI_TRDY# Green LED-
@22 R186
17,19,22,23,28,29 PCI_DEVSEL#
2

@.1UF 1 2 9
17,19,22,23,28,29 PCI_STOP#
1 2

Green LED+
17,19,22,23,28 PCI_PERR# Layout Note

1
C324 H0013 pls close to @510_0603 AMP RJ45/RJ11 with LED
17,19,22,23,28 PCI_SERR#
Q21
17,19,22,23,28,29 PCI_PAR conn. C
@10PF
17,22,23,28,29 PCI_C/BE#1
2

10K
@DTA114YKA

1
U23 LINK10_100# 2
R184
B @75
LAN_RD+ 1 16 RJ45_RX+ 47K R185
LAN_RD- RD+ RX+ RJ45_RX-
E
@75
2 RD- RX- 15
C248
3 14

2
CT CT LAN_GND LANGND
4 13

3
NC NC
1

5 NC NC 12

1
R22 R21 6 11 @1000P_2KV_1206 C249 C257
LAN_TD+ CT CT RJ45_TX+ +3V
7 TD+ TX+ 10
@50 @50 LAN_TD- 8 9 RJ45_TX- @.1UF

2
TD- TX- @4.7UF_10V_0805
2

1
1

@Pulse H0013
A A
1

R25 R24 R17 R18 Termination plane should be copled to chassis ground
C12 @50 @50 +3V @75 @75
1

@.1UF
2

C19 C18
2

1 2 @.1UF @.1UF LAN_GND


Compal Electronics, inc.
2

C11 .1UF
Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 64 of 87
5 4 3 2 1
A B C D E

+3V

@8P4R_4.7K RP31 +3V


1 8
2 7
3 6

1
4 5 C614 C640 C649 C645 C631 C642 C609 C651 C632

PCI_AD[0..31] .01UF .01UF .01UF .01UF .01UF .1UF .1UF .1UF .1UF

2
17,21,23,28,29 PCI_AD[0..31] +3V

1 1

U48
@TSB43AB22

20
35
48
62
78

87

86
96
10
11
VDDP
VDDP
VDDP
VDDP
VDDP

CYCLEOUT
TEST7
TEST17
TEST16
CYCLEIN
DVDD 15 +3V
PCI_AD31 22 27
PCI_AD30 PCI_AD31 DVDD
24 PCI_AD30 DVDD 39
PCI_AD29 25 51
PCI_AD28 PCI_AD29 DVDD
26 PCI_AD28 DVDD 59
PCI_AD27 28 72
PCI_AD26 PCI_AD27 DVDD
29 PCI_AD26 DVDD 88
PCI_AD25 L45
31 PCI_AD25 DVDD 100
PCI_AD24 32 7 PLLVDD 1 2
PCI_AD23 37
PCI_AD24
PCI_AD23
TSB43AB22 PLLVDD
AVDD 1 +3V
0_0805 +3V

1
PCI_AD22 38 2
PCI_AD21 PCI_AD22 AVDD C652 C653
40 PCI_AD21 AVDD 107
PCI_AD20 41 108

2
PCI_AD19 PCI_AD20 AVDD .01UF 4.7UF_10V_0805
42 PCI_AD19 AVDD 120
PCI_AD18 43 PCI_AD18
PCI_AD17 45 PCI_AD17
PCI BUS INTERFACE
PCI_AD16 46 106 1 2
PCI_AD15 PCI_AD16 CPS R434 @1K
61 PCI_AD15
PCI_AD14 63
PCI_AD13 PCI_AD14
65 PCI_AD13 PHY PORT 2 TPBIAS1 125 1 2
PCI_AD12 66 124 C646 @.1UF
PCI_AD11 PCI_AD12 TPA1+ R459 @1K
67 PCI_AD11 TPA1- 123
PCI_AD10 69 122 1 2
2 PCI_AD9 PCI_AD10 TPB1+ 2
70 PCI_AD9 TPB1- 121 1 2
PCI_AD8 71 R458 @1K
PCI_AD7 PCI_AD8
74 PCI_AD7 BIAS CURRENT R0 118
PCI_AD6 76 R453
PCI_AD5 PCI_AD6 @6.34K_1%
77 PCI_AD5
PCI_AD4 79
PCI_AD3 PCI_AD4
80 PCI_AD3
PCI_AD16 1 C656
2 1394_IDSEL PCI_AD2 81 PCI_AD2 R1 119
R475 @100 PCI_AD1 82 1 2
PCI_AD0 PCI_AD1
84 PCI_AD0 OSCILLATOR X0 6
PCI_C/BE#3 34 @15PF
17,21,23,28,29 PCI_C/BE#3 PCI_C/BE#2 PCI_C/BE3 Y4
17,21,23,28,29 PCI_C/BE#2 47 PCI_C/BE2
PCI_C/BE#1 60
17,21,23,28,29 PCI_C/BE#1 PCI_C/BE#0 PCI_C/BE1 @24.576MHz C655
17,21,23,28,29 PCI_C/BE#0 73 PCI_C/BE0 X1 5
CLK_PCI_1394 16 1 2
12 CLK_PCI_1394 PCI_CLK
17,19 PCI_GNT#0 18 PCI_GNT
19 3 1 2 @15PF
17,19 PCI_REQ#0 1394_IDSEL 36 PCI_REQ FILTER FILTER0 C650 @.1UF
PCI_IDSEL
17,19,21,23,28,29 PCI_FRAME# 49 PCI_FRAME FILTER1 4 JP12
17,19,21,23,28,29 PCI_IRDY# 50 PCI_IRDY
52 92 1 2 TPB0- 1
17,19,21,23,28,29 PCI_TRDY# PCI_TRDY EEPROM 2 WIRE BUS SDA R424 @220 TPB0+ 1
17,19,21,23,28,29 PCI_DEVSEL# 53 PCI_DEVSEL 2 2
54 91 1 2 TPA0- 3
17,19,21,23,28,29 PCI_STOP# PCI_STOP SCL R425 @220 TPA0+ 3
17,19,21,23,28 PCI_PERR# 56 PCI_PERR 4 4
15,17,19,23 PIRQA# 13 PCI_INTA POWER CLASS PC0 99

1
1394_PME# 21 98 R394 @56.2_1% C590
33 1394_PME# PCI_PME PC1
PCI_SERR# 57 97 @Molex SD-54030-0411
17,19,21,23,28 PCI_SERR# PCI_PAR PCI_SERR PC2 @.33UF
58

2
17,19,21,23,28,29 PCI_PAR PCI_PAR TPBIAS0 R399
17,19,23,25,28,29,33 PM_CLKRUN# 12 PCI_CLKRUN PHY PORT 1 TPBIAS0 116
3 PCIRST# @56.2_1% TPA0+ 3
8,15,17,19,20,21,23,24,25,28,29,35 PCIRST# 85 PCI_RST TPA0+ 115
114 TPA0-
TPA0- TPB0+
TPB0 + 113
112 TPB0-
TPB0 -

94 R423 1 2 @220
TEST9 R422 1
TEST8 95 2 @220 R400 R387
14 @56.2_1% @5.11K_1%
15,21,23,24,28,29 CBRST# G_RST
101 R437 1 2 @220
TEST3 R439 @220
PLLGND1
PLLGND2

89 GPIO3 TEST2 102 1 2


90 104 R441 1 2 @220 R395 C585 @220PF
GPIO2 TEST1
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND

105 R442 1 2 @220 @56.2_1%


TEST0
2

8
9
109
110
111
117
126
127
128
17
23
30
33
44
55
64
68
75
83
93
103

R411 R410

@220 @220
1

CLK_PCI_1394 For TSB43AA22


C657 C605
C657,C605
1

@.1UF @.1UF
1

4 4
R462 change to 0
@22 ohm to short
to GND
2

TSB43AB22 USE
C654
Compal Electronics, inc.
Title
@10PF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 65 of 87
A B C D E
A B C D E

24 SLATCH
15,17,24,29 RTCCLK PCM_SPK# 32
24 SLDATA
17,19 PCI_GNT#2 +3V CARDBUS +3V

17,19 PCI_REQ#2
17,21,22,28,29 PCI_C/BE#3
PCI1420

1
17,21,22,28,29 PCI_C/BE#2 C667 C668 C669 C666
17,21,22,28,29 PCI_C/BE#1 .1UF .1UF .1UF .1UF

2
17,21,22,28,29 PCI_C/BE#0
12 CLK_PCI_CB 1 2
C664 .1UF

1
R473 S2_VCC
17,19,21,22,28,29 PCI_FRAME# +3V
17,19,21,22,28,29 PCI_DEVSEL#
1 R478 8,15,17,19,20,21,22,24,25,28,29,35 PCIRST# S1_VCC 1
33
+12VS 1 2 17,19,21,22,28,29 PCI_TRDY#
1 2

1 2
17,19,21,22,28,29 PCI_IRDY#

1
100K +3V +3V C681 .1UF
17,19,21,22,28,29 PCI_STOP# C695 C691 C693
17,19,21,22,28 PCI_PERR# CBRST# .1UF .1UF
3 1 CBRST# 15,21,22,24,28,29

2
17,19,21,22,28 PCI_SERR# 10PF

2
Q60 2N7002 17,19,21,22,28,29 PCI_PAR
S1_D[0..15]

W12

M17
G15

G19
C13

N15
24 S1_D[0..15]

A14

A10

A15

B13

E19

E11

B14

A11
F14

F17

F18

M5
S1_A[0..25]

C6

C7

C8

D1

U7

C9
+3V

B6
A6

A7
B7

E2
A5

E7
F7

F8

F3
U51

L3
24 S1_A[0..25] S2_D[0..15]
24 S2_D[0..15] S2_A[0..25]

PCLK

DATA
CLOCK

VCCI

VCCP
VCCP

VCCB

VCCA
SPKOUT
SERR#
PERR#
STOP#
IRDY#
TRDY#
RSTIN#
DEVSEL#
FRAME#

C/BE0#
C/BE1#
C/BE2#
C/BE3#

REQ#

GRST#
PAR

GNT#

LATCH

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
24 S2_A[0..25] +3V

1
S2_D0 W10 H14 S1_D0
S2_D1 B_D0/CAD27 A_D0/CAD27 S1_D1 C687 C688
U10 B_D1/CAD29 A_D1/CAD29 G18
S2_D2 P10 G14 S1_D2 1000PF 1000PF

2
B_D2/RSVD A_D2/RSVD

1
S2_D3 H2 U11 S1_D3
S2_D4 B_D3/CAD0 A_D3/CAD0 S1_D4 C692 C690
J1 R11
S2_D5 J3
B_D4/CAD1 Power A_D4/CAD1
U12 S1_D5 1000PF 1000PF

2
S2_D6 B_D5/CAD3 A_D5/CAD3 S1_D6
K1 B_D6/CAD5 A_D6/CAD5 R12
S2_D7 K3 V13 S1_D7
S2_D8 B_D7/CAD7 A_D7/CAD7 S1_D8
V10 B_D8/CAD28 A_D8/CAD28 H15
S2_D9 R10 G17 S1_D9
S2_D10 B_D9/CAD30 A_D9/CAD30 S1_D10
W11 B_D10/CAD31 A_D10/CAD31 F19
S2_D11 H1 P11 S1_D11
S2_D12 B_D11/CAD2 A_D11/CAD2 S1_D12
J2 B_D12/CAD4 A_D12/CAD4 V12
S2_D13 J6 P12 S1_D13
S2_D14 B_D13/CAD6 A_D13/CAD6 S1_D14
K2 B_D14/RSVD A_D14/RSVD W13
S2_D15 K5 U13 S1_D15
2
B_D15/CAD8 A_D15/CAD8 2
S2_A0 R8 B_A0/CAD26
PCI A_A0/CAD26 J19 S1_A0
S2_A1 W7 K14 S1_A1
S2_A2 B_A1/CAD25 A_A1/CAD25 S1_A2
V7 B_A2/CAD24 A_A2/CAD24 K15
S2_A3 W6 K19 S1_A3
S2_A4 B_A3/CAD23 A_A3/CAD23 S1_A4
V6 L15
S2_A5 U6
B_A4/CAD22
B_A5/CAD21
Interface A_A4/CAD22
A_A5/CAD21 L17 S1_A5
S2_A6 V5 L19 S1_A6
S2_A7 B_A6/CAD20 A_A6/CAD20 S1_A7
U5 B_A7/CAD18 A_A7/CAD18 M15
S2_A8 N1 W16 S1_A8
S2_A9 B_A8/CC/BE1# A_A8/CC/BE1# S1_A9 S1_A23
M3 B_A9/CAD14 A_A9/CAD14 R14 S1_VCC
S2_A10 L1 W14 S1_A10 R468 22K
S2_A11 M1
B_A10/CAD9 Slot A_A10/CAD9
P14 S1_A11 S1_WP 1 2
S2_A12 T1
B_A11/CAD12
B_A12/CC/BE2#
Slot A_A11/CAD12
A_A12/CC/BE2# N18 S1_A12 R470 22K
S1_VCC
S2_A13 N3 R17 S1_A13
S2_A14 B_A13/CPAR A_A13/CPAR S1_A14
P1 B_A14/CPERR# A_A14/CPERR# N14
R463 S2_A15 P5 M14 S1_A15 R466
S2_A16 1 2 SB_A16 P6
B_A15/CIRDY#
B_A16/CCLK
B A A_A15/CIRDY#
A_A16/CCLK P18 SA_A16 1 2 S1_A16
S2_A17 M6 U15 S1_A17
S2_A18 B_A17/CAD16 A_A17/CAD16 S1_A18
47 N2 T19 47
S2_A19 B_A18/RSVD A_A18/RSVD S1_A19
Placement near N6 B_A19/CBLOCK# A_A19/CBLOCK# P15 Placement near
to PCMCIA S2_A20 N5 R18 S1_A20 to PCMCIA
S2_A21 B_A20/CSTOP# A_A20/CSTOP# S1_A21
controller R1 B_A21/CDEVSEL# A_A21/CDEVSEL# P17 controller
S2_A22 R2 P19 S1_A22
S2_A23 B_A22/CTRDY# A_A22/TRDY# S1_A23
R3 B_A23/CFRAME# A_A23/CFRAME# N17
S2_A24 W4 N19 S1_A24
S2_A25 B_A24/CAD17 A_A24/CAD17 S1_A25
R6 B_A25/CAD19 A_A25/CAD19 M18
S2_BVD1 V9 H19 S1_BVD1
3 24 S2_BVD1 B_BVD1/CSTSCHG A_BVD1/CSTSCHG S1_BVD1 24 3
S2_BVD2 W9 J15 S1_BVD2
24 S2_BVD2 B_BVD2/CAUDIO A_BVD2/CAUDIO S1_BVD2 24
S2_CD1# H3 V11 S1_CD1#
24 S2_CD1# B_CD1#/CCD1# A_CD1#/CCD1# S1_CD1# 24
S2_CD2# R9 H17 S1_CD2#
24 S2_CD2# B_CD2#/CCD2# A_CD2#/CCD2# S1_CD2# 24
S2_RDY# V8 J17 S1_RDY#
24 S2_RDY# S2_WAIT# B_READY/CINT# A_READY/CINT# S1_WAIT# S1_RDY# 24
24 S2_WAIT# W8 B_WAIT#/CSERR# A_WAIT#/CSERR# J14 S1_WAIT# 24
S2_WP U9 H18 S1_WP
24 S2_WP B_WP/CCLKRUN# A_WP/CCLKRUN# S1_WP 24
S2_INPACK# R7 L14 S1_INPACK#
24 S2_INPACK# B_INPACK/CREQ# A_INPACK/CREQ# S1_INPACK# 24

24 S2_CE1# K6 B_CE1#/CC/BE0# A_CE1#/CC/BE0# P13 S1_CE1# 24


24 S2_CE2# L2 B_CE2#/CAD10 A_CE2#/CAD10 R13 S1_CE2# 24
24 S2_WE# P3 B_WE#/CGNT# A_WE#/CGNT# R19 S1_WE# 24
24 S2_IORD# L5 W15 S1_IORD# 24
24 S2_IOWR# M2
B_IORD#/CAD13
B_IOWR#/CAD15
IRQ/DMA A_IORD#/CAD13
A_IOWR#/CAD15 V15 S1_IOWR# 24
24 S2_OE# L6 B_OE#/CAD11 A_OE#/CAD11 U14 S1_OE# 24
S2_VS1 U8 J18 S1_VS1
24 S2_VS1 B_VS1#/CVS1 A_VS1#/CVS1 S1_VS1 24
S2_VS2 P7 M19 S1_VS2
24 S2_VS2 B_VS2#/CVS2 A_VS2#/CVS2 S1_VS2 24
DMAREQ#/MFUNC2

DMAGNT#/MFUNC5
CLKRUN#/MFUNC6
24 S2_REG# P8 B_REG#/CC/BE3# A_REG#/CC/BE3# K17 S1_REG# 24
IRQSER/MFUNC3

S2_RST W5 L18 S1_RST


LOCK#/MFUNC4

24 S2_RST B_RESET/CRST# A_RESET/CRST# S1_RST 24 +3V


INTA#/MFUNC0
INTB#/MFUNC1

RIOUT#/PME#
SUSPEND#

GND R477
R472
22K
22K
IDSEL
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9

D41
PCM_INTA# 1 2
PCI1420-GHK PIRQA# 15,17,19,22
H5
G1
G3
H6
F1
G5
F2
E1
G6
F5
E3
C12
A4
E6
B5
F6
B8
A8
E9
F9
B9
A9
F10
E10
F11
E13
C11
B11
A12
B12
E12
A13

C10

F15
E17
D19
A16
C15
E14
F13
B15

C14

G2
J5
P2
P9
V14
K18
E18
F12
B10
E8
C5
RB751V
PCI_AD29
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28

PCI_AD30
PCI_AD31
PCI_AD0
PCI_AD1
PCI_AD2

PCI_AD6

PCI_AD9

D40
PCI_AD3
PCI_AD4
PCI_AD5

PCI_AD7
PCI_AD8

PCM_INTA#
PCM_INTB#

4 4
1

PCM_INTB# 1 2
R474 PIRQB# 17,19,21
100 PCM_PME# RB751V
PCM_PME# 33
S2_WP 1 2 S2_VCC PM_CLKRUN# 17,19,22,25,28,29,33
R435 22K PCM1_LED
PCM1_LED 34
Compal Electronics, inc.
2

S2_A23
PCI_AD20

S2_VCC PCM_RI# 29
R177 22K INT_SERIRQ 17,19,25,33
PCI_AD[0..31] PCM2_LED Title
17,21,22,28,29 PCI_AD[0..31] PCM2_LED 34
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL R307 22K
+3V SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF 2 1 Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS PCM_SUSP# 33 B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. D27
RB751V
401208
Date: 星期一, 四月 07, 2003 Sheet 66 of 87
A B C D E
PCMCIA POWER CTRL.
CARDBUS
+5V_CBS
+3V +12V S1_VPP

W=40mils
S1_VPP

S1_VCC
SOCKET
U19 JP19

1
25 VCC_5V AVPP 8 A77 a68 b68 B77
9 C240 A76 B76
C231 AVCC S1_CD2# a34 b34 S2_CD2#
7 10 A75 B75

2
12V AVCC 23 S1_CD2# a67 b67 S2_CD2# 23
1 2 1UF_25V_0805 24 12V AVCC 11 4.7UF_10V_0805
23 S1_WP
S1_WP A74 a33 b33 B74 S2_WP
S2_WP 23
A73 GND GND B73
1 2 C226 1 5V BVPP 23 S2_VPP S2_VPP S1_D10 A72 a66 b66 B72 S2_D10
.1UF 2 20 S1_D2 A71 B71 S2_D2
5V BVCC a32 b32
1 2 C225 30 5V BVCC 21 W=40mils S2_VCC S1_D9 A70 a65 b65 B70 S2_D9
.1UF 22 S1_D1 A69 B69 S2_D1
BVCC a31 b31

1
1 2 C227 15 3.3V
S1_D8 A68 a64 b64 B68 S2_D8
.1UF 16 6 C237 S1_D0 A67 B67 S2_D0
3.3V RESET a30 b30
1 2 C660 17 14 S1_BVD1 A66 B66 S2_BVD1

2
.1UF 3.3V RESET# 4.7UF_10V_0805 23 S1_BVD1 a63 b63 S2_BVD1 23
A65 GND GND B65
1 2 C638 23 SLDATA 3 DATA NC 26 S1_A0 A64 a29 b29 B64 S2_A0
.1UF 5 27 S1_BVD2 A63 B63 S2_BVD2
23 SLATCH LATCH NC 23 S1_BVD2 a62 b62 S2_BVD2 23
1 2 C641 15,17,23,29 RTCCLK 4 CLOCK NC 28 S1_A1 A62 a28 b28 B62 S2_A1
.1UF 29 CBRST# S1_REG# A61 B61 S2_REG# S2_REG# 23
NC 23 S1_REG# S1_A2 a61 b61 S2_A2
13 APWR_GOOD# A60 a27 b27 B60
19 S1_INPACK# A59 B59 S2_INPACK#
BPWR_GOOD# 23 S1_INPACK# S1_A3 a60 b60 S2_A3 S2_INPACK# 23
34 OCCB# 18 OC# GND 12 A58 a26 b26 B58
A57 GND GND B57
+3V 1 2 S1_WAIT# A56 B56 S2_WAIT#
23 S1_WAIT# S1_A4 a59 b59 S2_A4 S2_WAIT# 23
TPS2206AI/TPS2216 A55 B55
R455 S1_RST a25 b25 S2_RST
23 S1_RST A54 a58 b58 B54 S2_RST 23
100K S1_A5 A53 B53 S2_A5
S1_VS2 a24 b24 S2_VS2
23 S1_VS2 A52 a57 b57 B52 S2_VS2 23
S1_A6 A51 B51 S2_A6
S1_A25 a23 b23 S2_A25
A50 a56 b56 B50
A49 GND GND B49
S1_A7 A48 B48 S2_A7
+3V S1_A24 a22 b22 S2_A24
A47 a55 b55 B47
S1_A12 A46 B46 S2_A12
S1_A23 a21 b21 S2_A23
A45 a54 b54 B45
S1_A15 A44 B44 S2_A15
a20 b20
1
C116 S1_A22 A43 B43 S2_A22
PCMRST# 34 a53 b53
A42 GND GND B42
.1UF U37A S1_A16 S2_A16

14
A41 B41
2
a19 b19

1
74LVC125 A40 B40
S1_VPP a52 b52 S2_VPP
A39 a18 b18 B39
2 3 1 2 CBRST# A38 B38
8,15,17,19,20,21,22,23,25,28,29,35 PCIRST# CBRST# 15,21,22,23,28,29 S1_VCC a51 b51 S2_VCC
R348 0 A37 B37
a17 b17

1
S1_A21 A36 B36 S2_A21
+3V POWER R354 S1_RDY# a50 b50 S2_RDY#
A35 B35
7
S1_A[0..25] 23 S1_RDY# S1_A20 a16 b16 S2_A20 S2_RDY# 23
23 S1_A[0..25] A34 a49 b49 B34
S1_D[0..15] 10K S1_WE# A33 B33 S2_WE#
23 S1_D[0..15] S2_A[0..25] 23 S1_WE# S1_A19 a15 b15 S2_A19 S2_WE# 23
23 S2_A[0..25] A32 B32

2
S2_D[0..15] S1_A14 a48 b48 S2_A14
23 S2_D[0..15] A31 a14 b14 B31
S1_A18 A30 B30 S2_A18
+3V S1_A13 a47 b47 S2_A13
33 G_RST# 1 2 A29 a13 b13 B29
R349 @0 A28 B28
S1_A17 GND GND S2_A17
A27 a46 b46 B27
S1_A8 A26 B26 S2_A8
S1_IOWR# a12 b12 S2_IOWR#
23 S1_IOWR# A25 a45 b45 B25 S2_IOWR# 23
S2_VPP W=30mils +5V +5V_CBS S1_A9 A24 B24 S2_A9
S1_IORD# a11 b11 S2_IORD#
23 S1_IORD# A23 a44 b44 B23 S2_IORD# 23
1

JP29
A22 GND GND B22
C233 C659 80 mils 1 2 80 mils S1_A11 A21 B21 S2_A11
S1_VS1 a10 b10 S2_VS1
A20 B20 S2_VS1 23
2

.01UF 1UF_25V_0805 PAD-OPEN 4x4m 23 S1_VS1 S1_OE# a43 b43 S2_OE#


23 S1_OE# A19 a9 b9 B19 S2_OE# 23
S1_CE2# A18 B18 S2_CE2#
23 S1_CE2# S1_A10 a42 b42 S2_A10 S2_CE2# 23
A17 a8 b8 B17
U58 A16 B16
4.926V S1_D15 GND GND S2_D15
1 IN OUT 8 A15 a41 b41 B15
S1_CE1# A14 B14 S2_CE1#
W=30mils 23 S1_CE1# S1_D14 a7 b7 S2_D14 S2_CE1# 23
S1_VPP 2 IN OUT 7 A13 a40 b40 B13
1

S1_D7 A12 B12 S2_D7


a6 b6
1

1
C718 3 6 S1_D13 A11 B11 S2_D13
RST# SET a39 b39
2

C229 C228 @1UF_10V_0603 R531 C719 S1_D6 A10 B10 S2_D6


2

@100K_1% @2.2UF_0805 a5 b5
4 5 A9 B9
2

2
.01UF 1UF_25V_0805 SHDN# GND S1_D12 GND GND S2_D12
A8 a38 b38 B8
@MAX1857 S1_D5 A7 B7 S2_D5
S1_D11 a4 b4 S2_D11
A6 B6
1

S1_D4 a37 b37 S2_D4


A5 a3 b3 B5
S1_CD1# A4 B4 S2_CD1# S2_CD1# 23
S1_VCC 1.25V 23 S1_CD1# S1_D3 a36 b36 S2_D3
A3 a2 b2 B3
A2 a35 b35 B2
U59 A1 B1
a1 b1
1 IN OUT 8
2

C670
1

C663 C661 C662 R532 S1_CD1# 1 PCMC154PIN


2 IN OUT 7 2
C671 R533 @10K @34K_1%_0603 @1000PF
10UF_16V_1206 56PF .1UF 1000PF 1 2 3 6
2

RST# SET C686


1

1 2 4 5 S1_CD2# 1 2
SHDN# GND @1000PF
R534 @MAX1857 C689
@10K S2_CD1# 1 2
S2_VCC @1000PF
C665
S2_CD2# 1
1000PF
2 Compal Electronics, inc.
1

C234 C673 C674 Title


C678
10UF_16V_1206 56PF .1UF 1000PF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
2

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 67 of 87
A B C D E

.1UF
C713
1 2 U55
1 2 +3VS
5 6 LPCRST R518 10K
+3V VCC Y1

8,15,17,19,20,21,22,23,24,28,29,35 PCIRST# 1 A1
4 1 2 LPC_RST#
SUPER I/O SMsC FDC47N227 LPCRST1 2 3 A2
Y2

GND 2 D45
LPC_RST# 33

1
R524 C714 RB751V
10K NC7WZ14
1 .1UF 1

2
LPC_AD[0..3]
17,33 LPC_AD[0..3]
U29
LPC_AD0 20 68 LPD0
LPC_AD1 LAD0 PD0/INDEX# LPD1
21 LAD1 PD1/TRK0 69
LPC_AD2 22 70 LPD2 LPD[0..7]
LAD2 PD2/WRTPRT# LPD[0..7] 26
LPC_AD3 23 71 LPD3
LAD3 PD3/RDATA# LPD4
PD4/DSKCHG# 72
24 73 LPD5
17,33 LPC_FRAME# LFRAME# PD5 LPD6
17,19 LPC_DRQ#1 25 LDRQ# PD6/MTR0# 74
75 LPD7
LPC_RST# PD7
26 PCIRST#
27 79 LPTBUSY
15,17,21,35 SUS_STAT# LPCPD# BUSY/MTR1# LPTBUSY 26
78 LPTPE
PE/WDATA# LPTSLCT LPTPE 26
+3VS 1 2 50 GPIO12/IO_SMI# SLCT/WGATE# 77 LPTSLCT 26
R209 10K 1 2 17 81 LPTERR#
R248 10K IO_PME# ERROR#/HDSEL# LPTACK# LPTERR# 26
17,19,23,33 INT_SERIRQ 30 SIRQ ACK#/DS1# 80 LPTACK# 26
17,19,22,23,28,29,33 PM_CLKRUN# 28 CLKRUN# INIT#/DIR# 66 INIT# 26
CLK_LPC_SIO 29 82 RP10 +3VS RP11 +3VS
12 CLK_LPC_SIO PCICLK AUTOFD#/DRVDEN0# LPTAFD# 26
STROBE#/DS0# 83 LPTSTB# 26
CLK_SIO14 19 67 DCD#1 1 8 CTS#2 1 8
12 CLK_SIO14 CLK14 SLCTIN#/STEP# SLCTIN# 26
RI#1 2 7 DSR#2 2 7
48 100 CTS#1 3 6 DCD#2 3 6
15 PID0 GPIO10 DTR2#
54 99 CTS#2 DSR#1 4 5 RI#2 4 5
15 PID1 GPIO15 CTS2#
2 55 98 2
15 PID2 GPIO16 RTS2#
56 97 DSR#2 8P4R_4.7K 8P4R_4.7K
15 PID3 GPIO17 DSR2#
27 BT_DET# 57 GPIO20 TXD2 96
58 GPIO21 RXD2 95 1 2
59 94 DCD#2 R223 1K +5V
GPIO22 DCD2# RI#2
+3VS 1 2 6 GPIO24 RI2# 92
R520 10K 32 JP24
GPIO30 DTR#1
33 GPIO31 DTR1# 89
34 88 CTS#1 1
GPIO32 CTS1# RTS#1 1
35 GPIO33 RTS1# 87 2 2
36 86 DSR#1 RXD1 3
GPIO34 DSR1# TXD1 29 RXD1 TXD1 3
37 GPIO35 TXD1 85 29 TXD1 4 4
38 84 RXD1 1 2 DSR#1 5
GPIO36 RXD1 DCD#1 R213 1K 29 DSR#1 RTS#1 5
39 GPIO37 DCD1# 91 29 RTS#1 6 6
40 90 RI#1 CTS#1 7
GPIO40 RI1# 29 CTS#1 DTR#1 7
41 GPIO41 29 DTR#1 8 8
42 63 RI#1 9
GPIO42 IRMODE/IRRX3 IRMODE 26 29 RI#1 9
43 61 DCD#1 10
GPIO43 IRRX2 IRRX 26 29 DCD#1 10
44 GPIO44 IRTX2 62 IRTXOUT 26
45 GPIO45
46 16 RDATA# @96212-1011S
GPIO46 RDATA# RDATA# 20
47 10 WDATA#
GPIO47 WDATA# WDATA# 20
11 WGATE#
WGATE# WGATE# 20
1 2 51 12 HDSEL#
GPIO13/IRQIN1 HDSEL# HDSEL# 20
R195 10K 52 8 FDD IR#
GPIO14/IRQIN2 DIR# FDDIR# 20
1 2 64 9 STEP#
GPIO23/FDC_PP STEP# STEP# 20
R196 10K 5 DRV0#
DS0# DRV0# 20,34
18 13 INDEX#
+3VS VTR INDEX# INDEX# 20
CLK_SIO14 CLK_LPC_SIO 4 DSKCHG#
3 DSKCHG# DSKCHG# 20 3
53 15 WP#
VCC WRTPRT# WP# 20
2

65 14 TRACK0#
VCC TRK0# TRACK0# 20
R249 R228 93 3 MTR0#
VCC MTR0# MTR0# 20
@33 DRVDEN0 1 3MODE# 20
1

10 C278 C294 C338 C276 7 VSS


31 2 2 1 +5VS
2 1

2 1

4.7UF_10V_0805 .1UF .1UF .1UF VSS DRVDEN1 R247 10K


60
2

10V VSS
76 VSS GPIO11/SYSOPT 49 1 2
C339 C307 R208 1K
1

15PF @22PF
SMsC LPC47N227 Base I/O Address
* 0 = 02Eh
1 = 04Eh

4 4

Compal Electronics, inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 68 of 87
A B C D E
FIR Module +3VS

1
+3VS
R2 R5
W=40mils
@4.7_1206 @4.7_1206

1
FIR_VCC

1
1/4W + C259

2
U1

1
C7 + C1
1 10 W=40mils @68UF_4V_B2

2
@68UF_4V_B2 @.47UF VCC LEDA

2
7 GND AGND 2

1 2 4 9 IRTXOUT
MODE0 TXD IRTXOUT 25
R4 @10K
1 2 5 8 IRRX
MODE1 RXD IRRX 25
R3 @10K

1
3 FIR_SEL N.C 6
R561
10K
IRMODE (R561 For VCH ONLY)
25 IRMODE
@HSDL-3600

2
The component's most place
cloely IRDA MODULE.

+5V_PRN

LPTSLCT
LPTPE
PARALLEL PORT
LPTBUSY
LPTACK#

+5V_PRN
10
9
8
7
6

CP2
RP7 AFD#/3M# 1 8
10P8R_2.7K D4 LPTERR# 2 7
2 1 LPTINIT# 3 6
+5VS LPTSLCTIN# 4 5
RB420D
R192 8P4C_220PF
2.2K C251 CP1
1
2
3
4
5

220PF LPTSLCT 4 5
+5V_PRN R191 LPTPE 3 6
LPTSTB# LPTBUSY 2 7
AFD#/3M# 25 LPTSTB# LPTACK# 1 8
LPTERR# AFD#/3M# 33
LPTINIT# 8P4C_220PF
LPTSLCTIN# R190 1 CP3
R189 14 F D0 1 8
25 LPTAFD# F D0 F D1
33 33 2 2 7
1 2 LPTINIT# LPTERR# 15 F D2 3 6
25 INIT# 25 LPTERR# F D1 F D3
3 4 5
+5V_PRN R188 LPTINIT# 16
1 33 2 LPTSLCTIN# F D2 4 8P4C_220PF
F D4 25 SLCTIN# LPTSLCTIN# 17 CP4
F D5 F D3 5 F D4 1 8
F D6 18 F D5 2 7
F D7 F D4 6 F D6 3 6
RP6 F D7
19 4 5
LPD0 1 8 F D0 F D5 7
LPD1 F D1 8P4C_220PF
10

2 7 20
9
8
7
6

LPD2 3 6 F D2 F D6 8
RP8 LPD3 4 5 F D3 21 JP4
10P8R_2.7K F D7 9 LPTCN-25
22
8P4R_68 LPTACK# 10
RP5 25 LPTACK#
23
LPD7 1 8 F D7 LPTBUSY 11
25 LPTBUSY
LPD6 2 7 F D6 24
1
2
3
4
5

LPD5 3 6 F D5 LPTPE 12
LPD4 F D4 25 LPTPE
+5V_PRN 4 5 25
LPTSLCT 13
F D3 25 LPTSLCT
F D2 8P4R_68
F D1
F D0
LPD[0..7]
25 LPD[0..7]
Compal Electronics, inc.
Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 69 of 87
USB PORT
USB_VCCA USB_VCCC
F4 F3

+5VS +5VS

1
C208 + C263 +
POLYSWITCH_0.75A POLYSWITCH_0.75A

1
C153 C267
R353 .1UF 150UF_E R194 .1UF 150UF_E

2
470K USB_AGND 470K USB_CGND

2
18 USB_OC#0 18 USB_OC#3

1
C560 R355 C279 R197

2
1000PF 560K 1000PF 560K

2
JP9
L36 L19
0_0603 1 0_0603
USB0_D- 1 2 USB3_D- 1 2
18 USB_PN0 2 18 USB_PN3
USB0_D+ 1 2 USB3_D+ 1 2
18 USB_PP0 3 18 USB_PP3
L34 L18
4

1
0_0603 C720 C721 0_0603
SUYIN USB Connector 2569A-04G3T-B
47PF 47PF

1
1

1
L35 L13
CHB4516G750_1806 C535 CHB4516G750_1806 C271

1
4516 4516 C722 C723

2
.1UF .1UF
47PF 47PF

2
+5VALW +3VALW USB_VCCB

1
F2
Bluetooth R171
+5VS
2

1
R163 C172 @100K C272 +
POLYSWITCH_0.75A

1
@100K JP15 C281

2
@ .1UF R203 .1UF 150UF_E
34 BT_DETACH
2

2
1 2
3

34 BT_WAKE_UP
1

3 4 470K USB_BGND
2 5 6
USB2_D+
18 USB_PP2 BT_DET# 25

2
Q10 USB2_D- 7 8
18 USB_PN2 18 USB_OC#1
1

9 10
1

C171 @SI2301DS
11 12

1
BT_VCC 34 BT_RESET# 13 14
@ .1UF C273 R204 JP1
2

15 16
BT_VCC

2
17 18 1
1

2 22K C201 1000PF 560K


34,35 RFOFF# 19 20 2

1
+ C198

2
Q40 3
22K @ 4.7UF_10V_1206 @ .1UF L16 4
@DTC124EK 0_0603
2

2
@ HRS DF15-08-20DS-065V USB1_D- 5
18 USB_PN1 1 2
3

USB1_D+ 6
18 USB_PP1 1 2 7
L15
0_0603 8
SUYIN 2553A-0BG5T-A

1
C724 C725

1
47PF 47PF

2
L14 C275
CHB4516G750_1806

2
.1UF

2
4516

Compal Electronics, inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 70 of 87
Q54
+5VS_MINIPCI
+3VALW @SI2301DS +3.3VAUX
R385

1
S

D
3 1 1 2 C175 C236
+3V
0 C173 C178
@.1UF @.1UF @10UF_16V_1206

2
1

1
@1000PF

G
2
C629 C592
@1UF_25V_0805 @1UF_25V_0805 1 2 PCIRST#
PCIRST# 8,15,17,19,20,21,22,23,24,25,29,35
2

2
R168 0
MINI_RST# 1 2 CBRST# 15,21,22,23,24,29
R164 @0
R454 +3VS_MINIPCI

33 EN_WOL# 1 2 +5VALW

1
C224
@100K +3V C177
.1UF 10UF_16V_1206

2
C728
1 2
U61

5
.1UF
34 WL_OFF# 1
4 JP18
2 TIP 1 2 RING
34,35 KILL_SW 1 2
KEY KEY
3 4

3
7SH08FU 3 4
5 5 6 6
7 7 8 8
LAN RESERVED 9 10 LAN RESERVED
9 10
11 11 12 12
+3VS_MINIPCI 13 13 14 14
15 15 16 16
L9 PIRQD# 17 18 W=30mils +5VS_MINIPCI
W=40mils 17,19,29 PIRQD# 17 18 PIRQC#
+3V 1 2 19 19 20 20 PIRQC# 17,19,29
PCI_REQ#4 21 22
17,19 PCI_REQ#4 21 22 PCI_GNT#4 17,19 +3VS_MINIPCI
1

CHB1608B121 C232 C191 23 24 W=40mils +3.3VAUX


0603 CLK_MINIPCI 23 24 MINI_RST# L8
12 CLK_MINIPCI 25 25 26 26
.1UF .1UF 27 28 W=40mils 1 2
2

PCI_REQ#1 27 28 +3V
17,19 PCI_REQ#1 29 29 30 30 PCI_GNT#1 17,19

1
31 32 C181 C200 CHB1608B121
PCI_AD31 31 32 0603
17,21,22,23,29 PCI_AD31 33 33 34 34 WLANPME# 33
PCI_AD29 35 36 .1UF .1UF
17,21,22,23,29 PCI_AD29

2
35 36 PCI_AD30
37 37 38 38 PCI_AD30 17,21,22,23,29
PCI_AD27 39 40
17,21,22,23,29 PCI_AD27 39 40
PCI_AD25 41 42 PCI_AD28
17,21,22,23,29 PCI_AD25 41 42 PCI_AD28 17,21,22,23,29
43 44 PCI_AD26
PCI_C/BE#3 43 44 PCI_AD24 PCI_AD26 17,21,22,23,29
17,21,22,23,29 PCI_C/BE#3 45 45 46 46 PCI_AD24 17,21,22,23,29
PCI_AD23 47 48 MINI_IDSEL 1 2 PCI_AD18
17,21,22,23,29 PCI_AD23 47 48
CLK_MINIPCI 49 50 R48 100
PCI_AD21 49 50 PCI_AD22
17,21,22,23,29 PCI_AD21 51 51 52 52 PCI_AD22 17,21,22,23,29
1

PCI_AD19 53 54 PCI_AD20
17,21,22,23,29 PCI_AD19 53 54 PCI_AD20 17,21,22,23,29
R169 55 56 PCI_PAR
@10 PCI_AD17 55 56 PCI_AD18 PCI_PAR 17,19,21,22,23,29
17,21,22,23,29 PCI_AD17 57 57 58 58 PCI_AD18 17,21,22,23,29
PCI_C/BE#2 59 60 PCI_AD16
17,21,22,23,29 PCI_C/BE#2 59 60 PCI_AD16 17,21,22,23,29
P CI_IRDY# 61 62
17,19,21,22,23,29 PCI_IRDY#
1 2

61 62 PCI_FRAME#
63 63 64 64 PCI_FRAME# 17,19,21,22,23,29
PM_CLKRUN# 65 66 PCI_TRDY#
17,19,22,23,25,29,33 PM_CLKRUN# 65 66 PCI_TRDY# 17,19,21,22,23,29
C180 PCI_SERR# 67 68 PCI_STOP#
17,19,21,22,23 PCI_SERR# 67 68 PCI_STOP# 17,19,21,22,23,29
@33PF 69 70
2

PCI_PERR# 69 70 PCI_DEVSEL#
17,19,21,22,23 PCI_PERR# 71 71 72 72 PCI_DEVSEL# 17,19,21,22,23,29
PCI_C/BE#1 73 74
17,21,22,23,29 PCI_C/BE#1 73 74
PCI_AD14 75 76 PCI_AD15
17,21,22,23,29 PCI_AD14 75 76 PCI_AD15 17,21,22,23,29
77 78 PCI_AD13
77 78 PCI_AD13 17,21,22,23,29
PCI_AD12 79 80 PCI_AD11
17,21,22,23,29 PCI_AD12 79 80 PCI_AD11 17,21,22,23,29
PCI_AD10 81 82
17,21,22,23,29 PCI_AD10 81 82
83 84 PCI_AD9
83 84 PCI_AD9 17,21,22,23,29
PCI_AD8 85 86 PCI_C/BE#0
17,21,22,23,29 PCI_AD8 85 86 PCI_C/BE#0 17,21,22,23,29
PCI_AD7 87 88
17,21,22,23,29 PCI_AD7 87 88
89 90 PCI_AD6
89 90 PCI_AD6 17,21,22,23,29
PCI_AD5 91 92 PCI_AD4
17,21,22,23,29 PCI_AD5 91 92 PCI_AD4 17,21,22,23,29
93 94 PCI_AD2
93 94 PCI_AD2 17,21,22,23,29
PCI_AD3 95 96 PCI_AD0
17,21,22,23,29 PCI_AD3 95 96 PCI_AD0 17,21,22,23,29
W=30mils 97 98
+5VS_MINIPCI PCI_AD1 97 98
17,21,22,23,29 PCI_AD1 99 99 100 100
101 101 102 102
103 103 104 104
105 105 106 106
107 107 108 108
109 109 110 110
111 111 112 112
113 113 114 114
115 115 116 116
117 117 118 118
119 119 120 120
121 121 122 122
1 2 W=30mils 123 124 W=20mils +3.3VAUX
+5VS 123 124
L7 0_0603
1

C179
0603 Mini-PCI SLOT
.1UF
2

+5VS_MINIPCI

Compal Electronics, inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 71 of 87
R486 @1M
+3V +3V 1 2 +3V SMC_VCC
@.1UF
U52
C729 U62

1
C698 C699 C700 C701 C702 C703 C704 C705 C706 C707 1 2 2 4 SM_LED 3 1
INPUT OUTPUT SM_LED 35 VIN VOUT
SMVC3EN 4 5
VIN/CE VOUT

1
.1UF 1000PF .1UF 1000PF .1UF .1UF 1000PF .1UF 1000PF .1UF +3V C708 C709

1
5 2 C717 R535
SMC_VCC VCC R545 GND @.1UF @1000PF@10UF_16V_1206
3 1

2
GND NC @1K
@1K @RT9701-CB

2
2
@NC7S14

103
113
124
SMC_VCC C726 @1000PF

17
28
39
49
60
70
81
92
U53

6
1 2 JP14

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
@100K 12
SMCD# VCC
+3V 1 2 11 PCD#
PCI_AD[0..31] R487 SMD4 13
17,21,22,23,28 PCI_AD[0..31] I/O4
10 VSS
Power SMD5 14
SMCD# 1 I/O5
2 SMEJSW# SMD3 9 I/O3
R523 @0 SMD6 15
PCI_AD0 SMD0 SMD2 I/O6
53 AD0 SMD0 86 8 I/O2
PCI_AD1 52 90 SMD1 SMD7 16
PCI_AD2 AD1 SMD1 SMD2 SMD1 I/O7
51 AD2 SMD2 93 7 I/O1
PCI_AD3 50 95 SMD3 SM_LVD 17
PCI_AD4 AD3 SMD3 SMD4 SMD0 LVD
48 AD4 SMD4 99 6 I/O0
PCI_AD5 47 96 SMD5 18
PCI_AD6 AD5 SMD5 SMD6 SM_WP# GND
46 AD6 SMD6 94 5 WP#
PCI_AD7 45 91 SMD7 SM_R/B# 19

SmartMedia I/F
PCI_AD8 AD7 SMD7 SM_CLE SMWE# RDY
42 AD8 SMCLE 75 4 WE#
PCI_AD9 41 78 SM_ALE SM_RE# 20
PCI_AD10 AD9 SMALE SM_CE# SM_ALE RD#
40 AD10 SMCE# 77 3 ALE
PCI_AD11 38 80 SMWE# SM_CE# 21
PCI_AD12 AD11 SMWE# SM_RE# SM_CLE CE#
37 AD12 SMRE# 79 2 CLE
PCI_AD13 36 84 SM_WP# 22
PCI_AD14 AD13 SMWP# SM_R/B# SMC_VCC VCC
35 AD14 SMRB# 82 1 VSS
PCI_AD15 34 100 SMCD# 23
PCI_AD16 AD15 SMCD# SM_LVD GND
22 AD16 SMLVD 88 +3V 1 2 SMWPD# 24 WPRO#
PCI_AD17 21 73 SMWPD# R488 @10K
PCI_AD18 AD17 SMWPD# SMEJSW#
20 AD18 SMEJSW# 74
PCI_AD19 19 107 R490 1 2 @100K +3V @SmartMedia Slot
AD19 SMLED#

PCI I/F
PCI_AD20 18 109 R491 1 2 @100K +3V
PCI_AD21 AD20 SMLOCK# R492 1
16 AD21 SMEJCT# 106 2 @100K +3V
PCI_AD22 15 72 SMVC3EN
PCI_AD23 AD22 SMVC3EN C716 @.1UF
14 AD23 SMVC5EN 71
PCI_AD24 10 PWRST# 2 1
PCI_AD25 AD24
9 AD25
PCI_AD26 8 1 2
PCI_AD27 AD26 R525 @10K +3V
7 AD27
C711 PCI_AD28 5 AD28
CLK_PCI_SD/SM 1 2 PCI_AD29 4
R511 @22 PCI_AD30 AD29
3 59

System I/F
AD30 CLK32 RTCCLK 15,17,23,24
PCI_AD31 2 56 PWRST# FCMODE 1 2
@10PF PCI_C/BE#0 AD31 PWRST# R493 @10K +3V
17,21,22,23,28 PCI_C/BE#0 43 CBE0# SUSPEND# 57 SUSP# 30,33,37,41
PCI_C/BE#1 32 58 FCMODE
17,21,22,23,28 PCI_C/BE#1 PCI_C/BE#2 CBE1# FCMODE
17,21,22,23,28 PCI_C/BE#2 31 CBE2# ROM_CS 68
PCI_C/BE#3 11 67 1 2
17,21,22,23,28 PCI_C/BE#3 CBE3# ROM_SK R526 @0
17,19,21,22,23,28 PCI_PAR 30 PAR ROM_D 66 1 2 +3V
24 R498 @100K
17,19,21,22,23,28 PCI_FRAME# FRAME#
17,19,21,22,23,28 PCI_IRDY# 25 IRDY#
17,19,21,22,23,28 PCI_TRDY# 26 TRDY#
1 2 IDSEL0 17,19,21,22,23,28 PCI_STOP# 29 STOP#
RP34
R536 @0 SMD0 1 8
PCI_AD22 R496 1 @100 2 IDSEL0 13 110 R499 1 2 @100K SMD1 2 7
PCI_AD22 IDSEL1 IDSEL0 GPIO0 R500 @100K +3V SMD2
1 2 120 IDSEL1 GPIO1 111 1 2 +3V 3 6
+3V 1 2 IDSEL1 R497 @100
GPIO2 112 R501 1 2 @100K When the serial SMD3 4 5
R514 @100K 55 114 R502 1 2 @100K ROM interface is

GPIO I/F
17,19,22,23,25,28,33 PM_CLKRUN# CLKRUN# GPIO3 R503 @100K +3V not applied need @8P4R_100K
17,19,21,22,23,28 PCI_DEVSEL# 27 DEVSEL# GPIO4 115 1 2
CLK_PCI_SD/SM 125 116 R504 1 2 @100K pull up. RP35
12 CLK_PCI_SD/SM PCICLK GPIO5 R505 @100K SMD4
15,21,22,23,24,28 CBRST# 1 2 123 PCIRST# GPIO6 117 1 2 1 8
R546 @0 121 119 R506 1 2 @100K SMD5 2 7
17,19,28 PIRQC# INTA# GPIO7 SMD6
17,19,28 PIRQD# 122 INTB# 3 6
PCTRST#1 2 128 SMD7 4 5
8,15,17,19,20,21,22,23,24,25,28,35 PCIRST# 33 SM/SD_PME# PME#
R547 @0 126
NC @8P4R_100K
NC 127
SD CARD I/F

RP36
R537 1 2 @100K SDCD0 101 SM_CLE 1 8
R538 @100K SDCD1 SDCD0 SM_ALE
+3V 1 2 102 SDCD1 2 7
R539 1 2 @100K SDCD2 83 SM_WP# 3 6
Test Pins

R540 @100K SDCD3 SDCD2 SM_LVD


1 2 85 SDCD3 4 5
R541 1 2 @100K SDCMD 89 61
SDCMD TEST0 @8P4R_100K
98 SDCLK TEST1 62 1 2
1 2 104 63 R508 @0
R542 @0 SDCD# TEST2
SD Transfer Conn. 105
69
SDWP TEST3 64
SDPWR SMC_VCC
JP28
SDCD0 SDCD1 RP37
SDCD2 1 2 SDCD3 SM_CE#
3 4 GND 1 8
SDCMD SDCLK SMWE# 2 7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

SDCD# 5 6 SDWP SM_RE#


7 8 3 6
SDPWR SDLED 4 5
9 10
1
12
23
33
44
54
65
76
87
97
108
118

RXD1 11 12 +3V @TC6371AF @8P4R_100K


25 RXD1 DSR#1 13 14
25 DSR#1 CTS#1 15 16 TXD1 +3V +3V SM_R/B#
25 CTS#1 17 18 TXD1 25 1 2
DTR#1 RTS#1
25 DTR#1 DCD#1 19 20 RI#1 RTS#1 25 R494 @10K
25 DCD#1 21 22 RI#1 25
2

COM_RI#
30,33,37,41 SUSP# 23 24 R509 R510
25 26 @10K @10K
+5V 27 28
29 30 D43
1

@SD/COM 2 1 RING# 33
23 PCM_RI#
@RB751V
Compal Electronics, inc.
1

D
COM_RI# 2 Q62 Title
G @2N7002
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL S
SCHEMATIC, M/B LA-1371
3

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星 薑@, 四月 07, 2003 Sheet 72 of 87
CHB1608U301
+5VOZ 1 2
L42
34,35 STOPBTN# 1 2 1 2 +5VCD
R357 0 L43
CHB1608U301
D34 +5VOZ C575 C561 C607 C562
1 2 OZ_STOPBTN# .1UF .1UF .1UF .1UF
34 CD_STOPBTN#

@RB751V

CDD[0..15]
CDD[0..15] 20
U43

44

58
9
OZ168
IDE_SDD[0..15]

VDD

VDD

VDD
IDE_SDD[0..15] 18
IDE_SDD0 76 77 CD D0
IDE_SDD1 HDD0 CDD0 CD D1
78 HDD1 CDD1 79
IDE_SDD2 81 82 CD D2
IDE_SDD3 HDD2 CDD2 CD D3
83 HDD3 CDD3 84
IDE_SDD4 86 87 CD D4
IDE_SDD5 HDD4 CDD4 CD D5
90 HDD5 CDD5 91
IDE_SDD6 95 96 CD D6
IDE_SDD7 HDD6 CDD6 CD D7
97 HDD7 CDD7 98
IDE_SDD8 2 1 CD D8
IDE_SDD9 HDD8 CDD8 CD D9
4 HDD9 CDD9 3
IDE_SDD10 8 7 CDD10
IDE_SDD11 HDD10 CDD10 CDD11
11 HDD11 CDD11 10
IDE_SDD12 15 14 CDD12
IDE_SDD13 HDD12 CDD12 CDD13
18 HDD13 CDD13 17
IDE_SDD14 20 19 CDD14
IDE_SDD15 HDD14 CDD14 CDD15
22 HDD15 CDD15 21
+5VCD

IDE_SDA0 68 69 CD_SBA0 RP29


18 IDE_SDA0 HDA0 CDA0 CD_SBA0 20
IDE_SDA1 70 71 CD_SBA1 ISCDROM 1 8
18 IDE_SDA1 HDA1 CDA1 CD_SBA1 20
IDE_SDA2 66 67 CD_SBA2 CD_IRQ 2 7
18 IDE_SDA2 HDA2 CDA2 CD_SBA2 20
CDASPN 3 6
IDE_SDCS1# 63 64 CD_SCS1# MODE1 4 5
18 IDE_SDCS1# HCS0 CCS0 CD_SCS1# 20
IDE_SDCS3# 61 62 CD_SCS3#
18 IDE_SDCS3# HCS1 CCS1 CD_SCS3# 20
8P4R_10K

IDE_SDIOR# 99 100 CD_SIOR# RP26


18 IDE_SDIOR# HDIOR# CDIOR# CD_SIOR# 20
IDE_SDIOW# 6 5 CD_SIOW# GPIO_0 1 8
18 IDE_SDIOW# HDIOW# CDIOW# CD_SIOW# 20
72 73 CIOCS16# GPIO_1 2 7
HIOCS16# CIOCS16# CD _SIORDY INTN
18 IDE_SIORDY 93 HIORDY CIORDY 94 CD_SIORDY 20 3 6
4 5

74 75 CD_IRQ 8P4R_10K
X3 17,19 INT_IRQ15 HINTRQ CHINTRQ CD_IRQ 20
IDE_SDDREQ 12 13 CD_DREQ
18 IDE_SDDREQ HDMARQ CDMARQ CD_DREQ 20
OSC1 OSC2 IDE_SDDACK# 88 89 CD_DACK# RP25
18 IDE_SDDACK# HDMACK# CHDMACK# CD_DACK# 20
PLAYBTN# 1 8
REVBTN# 2 7
8MHZ
24 23 CD_RSTDRV# FRDBTN# 3 6
R364 20 SIDE_RST# HRESET# CRESET# CD_RSTDRV# 20
59 60 CDASPN STOPBTN# 4 5
HDASPN CDASPN
48 47 @8P4R_10K
HSYNC SSYNC
1M 53 HBIT_CLK SBIT_CLK 52
55 54 RP33
HDATA_OUT SDATA_OUT CD D3
50 HDATA_IN SDATA_IN 49 1 16
C546 C547 46 45 CD D1 2 15
HACRSTN SACRSTN CD D2
10PF 10PF 1 2 +5VCD 3 14
DM_ON 28 R366 @10K CD D0 4 13
PLAYBTN# PAV_EN CD D4
35 PLAYBTN# 36 PLAY/PAUSE PWR_CTL 51 1 2 5 12
FRDBTN# 35 R372 10K R414 0 CD D6 6 11
35 FRDBTN# FFORWARD
REVBTN# 34 1 2 CD D5 7 10
35 REVBTN# REWIND MEDIA_DETECT 34
OZ_STOPBTN# 37 80 1 2 ISCDROM CD D7 8 9
STOP/EJECT ISCDROM
10UF_16V_1206 39 GPIO_1 R413 @0 @16P8R_4.7K
C542 DM_ON GPIO[1]/VOL_UP GPIO_0
29 PCSYSTEM_OFF GPIO[0]/VOL_DN 40 ** No stuff R414 When stuff OZ163
R358 10K INTN 25 ** No stuff R413 and R375 when stuff OZ168 RP27
34 CD_INTA# INTN R375 @1K CD D8
+5VCD 1 2 30 RESET# 8 9
56 1 2 CD D9 7 10
D36 MODE0 MODE1 CDD10
D1 S1 MODE1 57 6 11
1 2 6 1 26 CDD11 5 12
5,33,40 EC_SMD2 SDATA
Q32A CDD12 4 13
SI1906DL 38 1 2 CDD13 3 14
RB751V PAVMODE CDD14
27 R359 10K Select SM BUS ADDRESS 2 15
2

SCLK CDD15
CSN 41 PULL-HIGH SMBus ID = B4h 1 16
G1

D2 S2 INCN 42 1 2 +5VCD PULL-Low SMBus ID = 34h


3 4 OSC1 31 43 R483 @10K @16P8R_4.7K
5,33,40 EC_SMC2 OSCI UDN
OSC2 32 OSCO
1

Q32B +5VCD CIOCS16# 1 2


GND
GND
GND
GND
GND

SI1906DL +5VCD R367 47K +5VMOD


5
G2

+5VALW R361 R128


16
33
65
85
92

200K 200K R360


2

1 2 R139 100K
+5VCD +5VCD
100K
R519 100K +5VCD
C554 C558 DM_ON
DM_ON 31
1UF_25V_0805 U38 DM_ON#
DM_ON# 31
10UF_16V_1206

D1
+5VALW 1 S D 8
C550 C134

D2
2 S D 7

6
R123 240K 3 6 .1UF
S D
+5VALW 1 2 4 G D 5 10UF_16V_1206 3 SUSP# 2 Q7A
DM_ON 5 Q7B G1
SI4425DY SI1906DL
G2

1
C553 SI1906DL
4

S1
1 2
S2
1

1UF_25V_0805 R117 10K

SUSP# 22K 22K CD_PLAY


Compal Electronics, inc.
29,33,37,41 SUSP# 2 2
CD_PLAY 34 Title
22K 22K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
Q27 Q25 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
3

DTC124EK DTC124EK R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 73 of 87
AC97 Codec
+5VS +5VS C627
U40 R_INT_CD_L 3 1 1 3 LEFT
20 INT_CD_L
4 VIN VOUT 5 VDDA 1UF_25V_0805 Q37 Q38

1
C580 C577 2 6 2N7002 2N7002

2
DELAY SENSE

1
C552
4.7UF_10V_0805 .1UF 7 1 input to AMPLIFY

2
ERROR CNOISE 4.7UF_10V_0805

2
8 3 C635
ON/OFF# GND

1
C564 R_INT_CD_R 3 1 1 3 RIGHT
20 INT_CD_R
SI9182
.1UF 1UF_25V_0805 Q45 Q46

2
2N7002 2N7002

2
DM_ON
30 DM_ON

+5VAMP_PU
R449 R450
22K 10K
1 2 2 1 R_INT_CD_L 3 1 1 3 CDROM_L
+3VS

1
Q48 Q49
R445 2N7002 2N7002

2
@10K
C634
10UF_10V_1206 input to CS 4297A

2
R451
AVDD_AC97 10K
L37 R_INT_CD_R CDROM_R
+5VAMP_PU 2 1 3 1 1 3
VDDA 1 2

1
VDDC Q51 Q50
CHB2012U170 R124 R452 2N7002 2N7002

2
1 2 +3VS @10K

1
C565 C599 C579 0_0603

2
1

1
4.7UF_10V_0805
.1UF C568
.1UF
2

2
4.7UF_10V_0805

2
DM_ON#
30 DM_ON#

25

38

9
U41 C571
2 1 1000PF

AVCC

AVCC

VCC

VCC
C573
2 1 AUD_VREF 1 2 1000PF
R418 6.8K C567
2 1 14 35 LINEL 1 2 4.7UF_10V_0805 LEFT
AUX_L LINE_OUT_L LEFT 32
R402 6.8K C566
15 36 LINER 1 2 4.7UF_10V_0805 RIGHT
AUX_R LINE_OUT_R RIGHT 32
2 1 C557
32 LINE_IN_L
R417 6.8K 16 37 1 2 1UF_25V_0805
VIDEO_L MONO_OUT MD_MIC 15
2 1 C559
32 LINE_IN_R
R403 6.8K 17 39 2 1 1000PF
VIDEO_R HP_OUT_L
2 1
R405 6.8K 1 2 23 41
C597 1UF_25V_0805 LIN_IN_L HP_OUT_R
2 1 IAC_BITCLK 15,17
R408 6.8K 1 2 24 R374 22
C598 1UF_25V_0805 LIN_IN_R R81 10K
BIT_CLK 6 1 2
CDROM_L 2 1 CD_L_R 1 2 18 R377 1 2
R406 20K C595 1UF_25V_0805 CD_L
SDATA_IN 8 1 2 22 IAC_SDATAI0 17
CDROM_R 2 1 CD_R_R 1 2 20
R407 20K C596 1UF_25V_0805 CD_R C570
XTL_IN 2
CD_GNA 1 2 19 22PF
C602 1UF_25V_0805 CD_GNA Y3 NPO
MIC 1 2 21
32 MIC MIC1 24.576MHz
C603 1UF_25V_0805
1 2 2 1 AUD_VREF 22 MIC2 XTL_OUT 3
C606 1000PF R404 2.4K C572
1 2 2 1 1 2 13 29 1 2 22PF
15 MD_SPK PHONE AFLT1
C604 1UF_25V_0805 R393 10K C600 1UF_25V_0805 C589 1000PF NPO
12 30 NPO 1 2
32 MONO_IN PC_BEEP AFLT2 C583 1000PF
28 NPO 1 2
VREFOUT AUD_VREF
2 1 11 R396 0
15,17 IAC_RST# RESET#
R379 100 27
REFFLT
15,17 IAC_SYNC 10 SYNC
FLT3D 32
15,17 IAC_SDATAO 5 SDATA_OUT

1
1
45 ID0# BPCFG 31
46 33 C591 C584

2
ID1# FLTI

1
34 .1UF 1UF_25V_0805

2
FLTO C581 C574
32 EAPD 47 EAPD# NC 43
44 R380 .01UF AUD_VREF

2
NC C576 @100K 1UF_25V_0805 L44 CHB2012U170
48 S/PDIF_OUT
1

40 1 2
1
NC
4 GND AGND 26
7 42 1000PF L40 CHB2012U170
2

GND AGND NPO 1 2

1
C593
CS4299A L38 CHB2012U170 C594
1 2 .1UF 4.7UF_10V_0805

2
2 1 CD_GNA
20 CD_AGND
R416
3.3K
1

R427 R415
Title
Compal Electronics, inc.
0 3.3K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
2

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 74 of 87
A B C D E

+5VCD
+5VCD
AMP & Audio Jack

1
U56 D39

2
LM7111 +5VCD R401 2 Q42 3 3
+ 3 VOL_AMP 33 100K

1
VOL_OP 1 W=40Mil 2SB1188 1
Q53 DTC314TK R430 +5VCD
4

1
10K
- SHUTDOWN# 1 2 2

1
C601 C612 2.2K

1
C712 R512 Q30 INTSPK_R1 1 R420 2.2K
2 1 3

1 2
1
4 @1000PF 1.65K .1UF 4.7UF_10V_0805 2 DAN217 4
EAPD 31

2
1 2 R444 33 R419 C620
4.7K

3
2

10K
2N7002 Q52 DTC314TK 10UF_16V_1206

2
R513

2
INTSPK_R2 1 2 1 3
10K
U46 R443 33

1
7 PVDD SHUTDOWN# 22

1
18 15 NBA_PLUG 2 1
PVDD SE/BTL# +5VCD

2
19 14 C637 1 2 R448 100K C626
R432 100K VDD PC-BEEP .1UF Q43 DTC314TK 4.7UF_10V_0805
11

2
BYPASS

10K
1 2 2 9 INTSPK_L2
VOL_OP PC-ENABLE LOUT- INTSPK_R2
3 VOLUME ROUT- 16
INTSPK_L1 4 10 INTSPK_L1 1 2 1 3
INTSPK_R1 LOUT+ LIN
21 ROUT+ RIN 8

2
1 2 U3-5 5 R446 33
31 LEFT C615 .47UF U3-23 LLINEIN
23 RLINEIN GND 1

10K
1 2 U3-6 6 12 C618 C625 C622 Q44 DTC314TK
31 RIGHT U3-20 LHPIN GND
20 RHPIN GND 13
C644 .47UF 24 .47UF .47UF .47UF INTSPK_L2 1 2 1 3

2
C610 .47UF GND
17 CLK
1 2 R447 33
C630 JP20

1
1 2 TPA0132 5

C643 .47UF .047UF_0805 4

2
1
C613 FBM-11-160808-700T
31 LINE_IN_R 1 2 3 LINE_IN JACK
3 @.1UF L46 6 3

2
31 LINE_IN_L 1 2 2
JP16 L47 1
INTSPK_R1 FBM-11-160808-700T
1

1
INTSPK_R2 C685 C680
INTSPK_L1 2 PHONEJACK
INTSPK_L2 3 330PF 330PF

2
4
ACES 85205-0400

JP23
1 2 5
R479 1K
C633 NBA_PLUG 4
150UF_6.3V_D2 L49 SPEAKER OUT

+ +
+3V +3V INTSPK_R1 1 2 1 2 1 2 INTSPK_R1-3 3
R480 47 FBM-11-160808-700T 6 JACK
33 BEEP#
VDDA INTSPK_L1 1 2 1 2 1 2 INTSPK_L1-3 2
1

C551 R481 47 L50 1


R345 1 2 C623 FBM-11-160808-700T
1

1
100K 150UF_6.3V_D2 C697 C696
U37B .1UF R392 PHONEJACK
74LVC125 10K 330PF 330PF
14
2

2
4

U36A
C528 R333
2

5 6 1 2 1 2 1 2 1 2
R350 8.2K
560
1

2 74LVC14 1UF_10V_0603 C611 2


1

+3V POWER C539 +3V POWER R397


7

10K 10UF_16V_1206
2

.22UF
2

AVDD_AC97
2

C588
1 2 MONO_IN R457
MONO_IN 31

1
18K_1%
1

C586 R390 1UF_10V_0603 1 2 2 Q47


AVDD_AC97
2

1 2 1 2 2 2SC2411K
23 PCM_SPK#

1
Q34 R409 1 2

3
1UF_10V_0603 560

1
2SC2411K 2.4K R456 18K_1% C648
3

1
1

2
1UF_10V_0603 R476

2
+3V R464
100K_1% 2.2K JP21
5

2
14

4
U36B EXT.
C587 R391 3 MICPHONE
3 4 1 2 1 2 6
18 ICH_SPKR MIC 1 2 2 JACK
560 31 MIC
74LVC14 1UF_10V_0603 L48 1
+3V POWER FBM-11-160808-700T
7

1
R389 C694 PHONEJACK
10K D33 220PF

2
1 1
RB751V
2

Title
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 75 of 87
A B C D E
5 4 3 2 1

+3VALW 1 2
+3VALW R79 0 +3VALW EC_AVCC +RTCVCC KBA[0..18]
34 KBA[0..18] +3V 1 2
1 2 51VDD ADB[0..7] R258 10K
+3VS 34 ADB[0..7] KSI[0..7]
R74 @0
15 KSI[0..7]
1

1
C374 C378 C430 C108 C90 C377 C53 KSO[0..15] MMO_ON 1 2
15 KSO[0..15] VR_ON 43

123
136
157
166

161
.1UF .1UF .1UF .1UF 1000PF 1000PF .1UF D22 RB751V

16

34
45

95
2

2
U34
2 1

VBAT
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VDD

AVCC
KBA0 +3VS R283 10K
IOPH0/A0/ENV0 124
INVT_PWM 32 125 KBA1
EC_AVCC +3VALW 15 INVT_PWM IOPA0/PWM0 IOPH1/A1/ENV1 KBA2 ATFOUT# 1
32 BEEP# 33 IOPA1/PWM1 IOPH2/A2/BADDR0 126 2 ATF_INT# 17
+RTCVCC L31 For PWM 36 127 KBA3
EN_DFAN IOPA2/PWM2 IOPH3/A3/BADDR1 KBA4 D23 RB751V
D 1 2 39 ACOFF 37 IOPA3/PWM3 IOPH4/A4/TRIS 128 D
CHB1608U800 38 131 KBA5
17 PM_BATLOW# IOPA4/PWM4 IOPH5/A5/SHBM
1

C375 C510 39 132 KBA6


35 51ON IOPA5/PWM5 IOPH6/A6
40 133 KBA7
19 EC_LID_OUT# IOPA6/PWM6 IOPH7/A7
.1UF .1UF 43
23 PCM_SUSP#
2

ECAGND IOPA7/PWM7 KBA8


IOPK0/A8 143
KSO16 EC_URXD 153 142 KBA9
KSO17 EC_UTXD IOPB0/URXD IOPK1/A9 KBA10
154 IOPB1/UTXD IOPK2/A10 135
EC_USCLK 162 134 KBA11
28 EN_WOL# IOPB2/USCLK IOPK3/A11
EC_SMC1 163 130 KBA12
34,40 EC_SMC1 IOPB3/SCL1 IOPK4/A12
EC_SMD1 164 129 KBA13
34,40 EC_SMD1 IOPB4/SDA1 IOPK5/A13/BE0
165 121 KBA14
+3VS 25 LPC_RST# IOPB7/RING#/PFAIL# IOPK6/A14/BE1 KBA15
IOPK7/A15/CBRD 120
19 PBTN_OUT# 168 IOPC0
EC_SMC2 169 113 KBA16
5,30,40 EC_SMC2 IOPC1/SCL2 IOPL0/A16
EC_SMD2 170 112 KBA17
5,30,40 EC_SMD2 IOPC2/SDA2 IOPL1/A17
2

171 104 KBA18


35 FAN_SPEED IOPC3/TA1 IOPL2/A18
R292 R285 PCI_PME# 172 103 KBA19
10K 10K ATFOUT# IOPC4/TB1/EXWINT22 IOPL3/A19
175 IOPC5/TA2 IOPL4/WR1# 48 FSTCHG 39,40
35 MP3# 176 IOPC6/TB2/EXWINT23
D25 PC7 1 138 ADB0
35 PC7
1

G20 IOPC7/CLKOUT IOPI0/D0 ADB1


17 GATEA20 2 1 IOPI1/D1 139
AC IN 26 140 ADB2
18,35,38,41 ACIN IOPD0/RI1#/EXWINT20 IOPI2/D2
RB751V RING# 29 141 ADB3
29 RING# IOPD1/RI2#/EXWINT21 IOPI3/D3
D24 30 144 ADB4
RCL# 12,17 PM_SLP_S3# SCR_LED# 41 IOPD2/EXWINT24 IOPI4/D4 ADB5
17 RC# 2 1 IOPD4 IOPI5/D5 145
42 146 ADB6
35 NUM_LED# IOPD5 IOPI6/D6
RB751V 54 147 ADB7
35 CAPS_LED# IOPD6 IOPI7/D7
35 ARROW_LED# 55 IOPD7
C 150 FR D# C
IOPJ0/RD# FRD# 34
19 EC_SMI# 62 IOPJ2/BST0 IOPJ1/WR0# 151 FWR# 34
VGA_SUSP# 63 IOPJ3/BST1 SELIO#
24 G_RST# 69 IOPJ4/BST2 SELIO# 152 SELIO# 34
19 EC_RIOUT# 70 IOPJ5/PFS#
D19 RB751V 75 173 FSEL#
40 A/B#USE IOPJ6/PLI SEL0# FSEL# 34
29 SM/SD_PME# 1 2 1 2 +3VALW 12,17 PM_SLP_S1# 76 IOPJ7/BRKL_RSTO# SEL1# 174

D20 R265 10K BATT_TEMPA 81 148 SYSON


40 BATT_TEMPA AD0 IOPM0/D8 SYSON 37
1 BATT_TEMPB 82 149 SUSP#
22 1394_PME# 40 BATT_TEMPB AD1 IOPM1/D9 SUSP# 29,30,37,41
3 VBATTA 83 155 MMO_ON
VBATTB AD2 IOPM2/D10
23 PCM_PME# 2 84 AD3 IOPM3/D11 156 TRICKLE 40
VTT_ON +3VALW
IOPM4/D12 3 VTT_ON 44
RB717F 87 4 VTT_PWRGD#
40 ALI/MH# IOPE0AD4 IOPM5/D13 VTT_PWRGD# 5,12
D21 88 27 ENVEE
40 BLI/MH# IOPE1/AD5 IOPM6/D14 ENVEE 15
1 BATT_CHGI 89 28 ENBKL
28 WLANPME# IOPE2/AD6 IOPM7/D15 ENBKL 15
3 ADP_I 90 KBA0 1 2
IOPE3/AD7 KBD_CLK R129 @1K
21 LAN_PME# 2 19,35 ON/OFF 2 IOPE4/SWIN PSCLK1/IOPF0 110
44 111 KBD_DATA KBA1 1 2
17 PM_SLP_S5# IOPE5/EXWINT40 PSDAT1/IOPF1 PS2_CLK R130 1K
RB717F 114
OEM PSCLK2/IOPF2 PS2_DATA KBA2
93 DP/AD8 PSDAT2/IOPF3 115
D44 RB751V OEM 94 116 TP_CLK R131 @1K
DN/AD9 PSCLK3/IOPF4 TP_CLK 15
1 2 PCI_PME# 117 TP_DATA KBA3 1 2
17 ICH_WAKE_UP# PSDAT3/IOPF5 TP_DATA 15
99 118 R132 1K
15 DAC_BRIG DA0 PSCLK4/IOPF6 LID_SW# 35
100 119 KBA4
32 VOL_AMP DA1 PSDAT4/IOPF7 CDON#/MP3 35
101 R133 @1K
39 IREF DA2
102 71 KSI0 KBA5 1 2
35 EN_DFAN DA3 KBSIN0
ECAGND 1 2 BATT_TEMPA 72 KSI1 R134 1K
C521 .01UF EC_TINIT# KBSIN1 KSI2
105 TINT# KBSIN2 73
B BATT_TEMPB EC_TCK KSI3 B
1 2 106 TCK KBSIN3 74
C522 .01UF EC_TDO 107 77 KSI4
+3VALW EC_TDI TDO KBSIN4 KSI5
108 TDI KBSIN5 78
RP16 EC_TMS 109 79 KSI6
G_RST# TMS KBSIN6 KSI7
1 8 KBSIN7 80
2 7 FR D#
3 6 SELIO# LPC_AD[0..3] 49 KSO0
FSEL# 17,25 LPC_AD[0..3] LPC_AD0 KBSOUT0 KSO1
4 5 15 LAD0 KBSOUT1 50 I/O Address
LPC_AD1 14 51 KSO2
LPC_AD2 LAD1 KBSOUT2 KSO3
8P4R_10K 13 LAD2 KBSOUT3 52 BADDR1(KBA3) BADDR0(KBA2) Index Data
LPC_AD3 10 53 KSO4
LAD3 KBSOUT4 KSO5
KBSOUT5 56 0 0 2E 2F
9 57 KSO6
17,25 LPC_FRAME# LFRAME# KBSOUT6 KSO7
17,19 LPC_DRQ#0 1 2 8 LDRQ# KBSOUT7 58 0 1 4E 4F
+5VALW R293 @0 7 59 KSO8
17,19,23,25 INT_SERIRQ SERIRQ KBSOUT8 KSO9
KBSOUT9 60 * 1 0 (HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1
51RST# 19 61 KSO10
EC_SMC2 35 EC_RST# LREST# KBSOUT10 KSO11
1 2 22 SMI# KBSOUT11 64 1 1 Reserved
R237 4.7K 23 65 KSO12
EC_SMD2 PWUREQ# KBSOUT12 KSO13
1 2 35 LPCPD# 24 IOPE6/LPCPD#/EXWIN45 KBSOUT13 66
R236 4.7K KSO14 R266
17,19,22,23,25,28,29 PM_CLKRUN# 25 IOPE7/CLKRUN#/EXWINT46 KBSOUT14 67
68 KSO15 C RY1 1 2 C RY2 ENV0 (KBA0) ENV1 (KBA1) TRIS (KBA4)
KBSOUT15
19 EC_SCI# 31 IOPD3/ECSCI#

2
JP25 G20 C RY1 20M IRE 0 0 0
5 GA20/IOPB5 32KX1/32KCLKOUT 158
1 RCL# 6 R267 * OBD 0 1 0
1 +3VALW KBRST#/IOPB6
2 EC_TINIT# 160 C RY2 120K DEV 1 0 0
2 EC_TCK 32KX2
3 3 12 CLK_LPC_EC 18 LCLK
PROG 1 1 0
AGND
GND1
GND2
GND3
GND4
GND5
GND6
GND7

NC10

4 EC_TDO 47 X1
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9

1
4 EC_TDI CLK
A 5 5 SHBM(KBA5)=1: Enable shared memory with host BIOS A
6 EC_TMS TRIS(KBA4)=1: While in IRE and OBD, float all the
6

1
7 1 2 1 2 PC87591VPC 32.768KHZ signals for clip-on ISE use
17
35
46
122
137
159
167

96

11
12
20
21
85
86
91
92
97
98

7 EC_URXD C478 @22PFR304 @33 C376 C346


8 8
9 EC_UTXD 2 10PF 12PF

2
9 EC_USCLK L32
10
10 ECAGND 1 2
CHB1608U800
Compal Electronics, inc.
@96212-1011S Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 76 of 87
5 4 3 2 1
+3VALW
C315 +5VALW .1UF
C289
1 2
1 2
.1UF

20
U31

20
2 18 ADB0 U27

VCC
35 BUTTON1# 1A1 1Y1
4 16 ADB1 +3VALW ADB0 3 2

VCC
35 INTERNET# 1A2 1Y2 D0 Q0 EXTIDEPWR# 20
6 14 ADB2 RP12 +3VALW ADB1 4 5
30 CD_INTA# 1A3 1Y3 C284 D1 Q1 MDC_DN# 15
PCM_LED 8 12 ADB3 ADB2 7 6
1A4 1Y4 D2 Q2 BT_DETACH 27
11 9 ADB4 DD 1 8 1 2 ADB3 8 9 1 2
20 SHDD_LED# 2A1 2Y1 D3 Q3 RFOFF# 27,35
13 7 ADB5 AA 2 7 ADB4 13 12 R221 0
20 PHDD_LED# 2A2 2Y2 D4 Q4 BT_RESET# 27
15 5 ADB6 BB 3 6 ADB5 14 15
20,25 DRV0# 2A3 2Y3 U25A D5 Q5 CD_PLAY 30
ADB7 CC .1UF ADB6

14
24 OCCB# 17 2A4 2Y4 3 4 5 17 D6 Q6 16 HDD_LED# 35
74LVC32 ADB7 18 D7 Q7 19 2ND_CHGI_CD_FDD_LED# 35
+3VALW 1 8P4R_100K KBA2 1

GND
1G AA
19 3 11

GND
U25B 2G SELIO# LARST# CLK

14
2 1 CLR
74LVC32 74LVC244

10
KBA1 4 74HCT273

10
6 CC
SELIO# 5
33 SELIO# R268 C342

+5VALW 1 2 1 2

7
20K 1UF_25V_0805
1

R243

100K
D12 +5VALW
2

C243
23 PCM1_LED 1
3 PCM_LED +3VALW 1 2
C316
23 PCM2_LED 2
1 2 .1UF

20
DAN202U .1UF U26

20
U32 ADB0 3 2

VCC
D0 Q0 PWR_LED# 35
2 18 ADB0 ADB1 4 5

VCC
20 EXTID0 1A1 1Y1 D1 Q1 2nd_BATT_LOW_LED# 35
4 16 ADB1 ADB2 7 6
20 EXTID1 1A2 1Y2 D2 Q2 BATT_LOW_LED# 35
6 14 ADB2 ADB3 8 9
20 EXTID2 1A3 1Y3 D3 Q3 BATT_CHGI_LED# 35
8 12 ADB3 +3VALW ADB4 13 12
27 BT_WAKE_UP 1A4 1Y4 D4 Q4 WL_OFF# 28
11 9 ADB4 ADB5 14 15
30 MEDIA_DETECT 2A1 2Y1 U25C D5 Q5 CD_STOPBTN# 30
ADB5 ADB6

14
35 VOL_UP# 13 2A2 2Y2 7 17 D6 Q6 16 PCMRST# 24
ADB6 74LVC32 ADB7
35 VOL_DW# 15 2A3 2Y3 5 18 D7 Q7 19 EN_LAN# 21
17 3 ADB7 KBA4 9
28,35 KILL_SW 2A4 2Y4 BB
8 11

GND
+3VALW SELIO# LARST# CLK
1 10 1
GND

1G CLR
U25D 19 2G 74HCT273
14

10
74LVC32 74LVC244
10

KBA3 12
11 DD
SELIO# 13
7

+5VALW
+3VALW +3VALW +3VALW
C290 +5VALW +5VALW +5VALW

1
C280
1 2

1
R433
1 2 1 2 R205

1
.1UF C608 .1UF R398
20

1 2 +12VS 100K
U24 100K R206 R214 .1UF
100K

2
MP3_STOPBTN# ADB0 U21

G
2 18
VCC

35 MP3_STOPBTN#

2
1A1 1Y1

5
MP3_PLAYBTN# 4 16 ADB1 Q36 4.7K 4.7K 8 1
35 MP3_PLAYBTN#

2
MP3_FRDBTN# 1A2 1Y2 ADB2 VCC A0
35 MP3_FRDBTN# 6 14 2 1 3 7 2

2
+3VALW MP3_REVBTN# 1A3 1Y3 ADB3 FWE# EC_FLASH# 18 WC A1
8 12 4 6 3

S
C331 35 MP3_REVBTN# 1A4 1Y4 33,40 EC_SMC1 SCL A2
11 9 ADB4 1 2N7002 5 4
30,35 STOPBTN# 2A1 2Y1 FWR# 33 33,40 EC_SMD1 SDA GND
1 2 1 R26 2 100K 13 2A2 2Y2 7 ADB5 U44
1 2 100K 15 5 ADB6 7SH32FU NM24C16

3
.1UF R28 B ID 2A3 2Y3 ADB7
1 2 17 2A4 2Y4 3
5

R29 @100K

1
KBA5 2 U30 1 R27 2 1
GND

100K 1G
4 19 2G
SELIO# 1 2 R557 1 @100K R198
+3VALW 74LVC244 100K
2 1
10

R558 @100K
3

2
7SH32FU
1 2 +5VALW
R159 @0 1 2
C158 .1UF U16
1 2 +3VALW
C151 R156 0 U14
1 2 FLASH_VCC KBA11 1 32 FR D#
U15 KBA18 KBA9 A11 OE# KBA10
1 NC VCC 32 FLASH_VCC 2 A9 A10 31
.1UF KBA16 2 31 FWE# KBA8 3 30 FSEL#
KBA11 FR D# KBA15 A16 WE* KBA17 KBA13 A8 CE# ADB7
1 A11 OE# 32 FRD# 33 3 A15 A17 30 4 A13 DQ7 29
KBA9 2 31 KBA10 KBA12 4 29 KBA14 KBA14 5 28 ADB6
KBA8 A9 A10 FSEL# KBA7 A12 A14 KBA13 KBA17 A14 DQ6 ADB5
3 A8 CE# 30 FSEL# 33 5 A7 A13 28 6 A17 DQ5 27
KBA13 4 29 ADB7 KBA6 6 27 KBA8 FWE# 7 26 ADB4
KBA14 A13 DQ7 ADB6 KBA5 A6 A8 KBA9 WE# DQ4 ADB3
5 A14 DQ6 28 7 A5 A9 26 FLASH_VCC 8 VCC DQ3 25
KBA17 6 27 ADB5 KBA4 8 25 KBA11 KBA18 9 24
FWE# A17 DQ5 ADB4 KBA3 A4 A11 FR D# KBA16 A18 VSS ADB2
7 WE# DQ4 26 9 A3 OE* 24 10 A16 DQ2 23
8 25 ADB3 KBA2 10 23 KBA10 KBA15 11 22 ADB1
KBA18 VCC DQ3 KBA1 A2 A10 FSEL# KBA12 A15 DQ1 ADB0
9 A18 VSS 24 11 A1 CE* 22 12 A12 DQ0 21
KBA16 10 23 ADB2 KBA0 12 21 ADB7 KBA7 13 20 KBA0
KBA15 A16 DQ2 ADB1 ADB0 A0 DQ7 ADB6 KBA6 A7 A0 KBA1
11 A15 DQ1 22 13 DQ0 DQ6 20 14 A6 A1 19
KBA12 12 21 ADB0 ADB1 14 19 ADB5 KBA5 15 18 KBA2
KBA7 A12 DQ0 KBA0 ADB2 DQ1 DQ5 ADB4 KBA4 A5 A2 KBA3
13 A7 A0 20 15 DQ2 DQ4 18 16 A4 A3 17
KBA6 14 19 KBA1 16 17 ADB3
KBA5
KBA4
15
A6
A5
A1
A2 18 KBA2
KBA3
VSS DQ3
@29F040_TSOP
Compal Electronics, inc.
16 A4 A3 17
29F040/SST39VF040_PLCC Title

@SST39VF040_TSOP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
KBA[0..18] AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
33 KBA[0..18] R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
ADB[0..7] B 1B
33 ADB[0..7] MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 77 of 87
5 4 3 2 1

+3VS RP9

1 8 MP3_STOPBTN#
2 7 MP3_PLAYBTN#
+3VALW 3 6 MP3_FRDBTN#
4 5 MP3_REVBTN#

1
+3VALW 8P4R_10K
R85
MP3_FRDBTN# 2 1 FRDBTN#
34 MP3_FRDBTN#

1
470K D29 RB751V
R273

2
EC_RST# MP3_REVBTN# 2 1 REVBTN#
EC_RST# 33 34 MP3_REVBTN#
D 470K D28 RB751V D

1
Q26 MP3_STOPBTN# 2 1 STOPBTN#
34 MP3_STOPBTN#
2 D30 RB751V
33 PC7
2N7002
MP3_PLAYBTN# 2 1 PLAYBTN#
34 MP3_PLAYBTN#

3
D31 RB751V

JP6
19,33 ON/OFF 1 2 51ON# 38
33 51ON 3 4 LID_SW# 33
34 2nd_BATT_LOW_LED# 5 6 MP3# 33
1 2 SMLED
27,34 RFOFF# 7 8 SM_LED 29
R19 @0
28,34 KILL_SW 9 10 CAPS_LED# 33
33 ARROW_LED# 11 12 NUM_LED# 33
34 INTERNET# 13 14 BUTTON1# 34
34 VOL_DW# 15 16 VOL_UP# 34
18,33,38,41 ACIN 17 18 PWR_LED# 34
34 BATT_LOW_LED# 19 20 BATT_CHGI_LED# 34
+3VALW 34 HDD_LED# 21 22 2ND_CHGI_CD_FDD_LED# 34
33 CDON#/MP3 23 24
FRDBTN# REVBTN#
30 FRDBTN# 25 26 REVBTN# 30
1 2 STOPBTN# PLAYBTN#
30,34 STOPBTN# 27 28 PLAYBTN# 30
C321 .1UF
C U28 29 30 C
31 32
5

33 34
8,15,17,19,20,21,22,23,24,25,28,29 PCIRST# 1 +5VALW 35 36 +3VALW
4 LPCPD#
LPCPD# 33 37 38
15,17,21,25 SUS_STAT# 2 +3V 39 40 +3VS
SUYIN-80065A-040G2T
3

LPCPD# 7SH08FU
R233 @0

For PC87591 REV 0.A Only

FAN CONN.
+12V

+5V

1
R160

3.6K

1
B C C569 B

2
2 Q29 D38
B FMMT619 @10UF_16V_1206

2
1

1
+5V E

3
C548 D37 C157 1SS355

2
1 2 FAN1

2
D46 .1UF C556 .1UF 1N4148 .1UF JP10

1
1 2 2 1

1
+5VS 1

5
Q64 VCC U39 D35
2
1

@DTC114YKA R543 @110 EN_DFAN 1 1N4148


@HSMB-C110 BLUE 33 EN_DFAN 3
4 Q33
1 2 3 2SA1036K 53398-0310-FAN

2
10K R113
SMLED 2 13K_1% VEE LMV321_SOT23-5

2
+3V

47K

1
1 2
3

FOR SM LED R347 R369


7.32K_1%
10K

2
33 FAN_SPEED

A A

Compal Electronics, inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 78 of 87
5 4 3 2 1
A B C D E

+3V

RTC Batt. Connector +3V +3V


R105
+RTCVCC BATT1 +RTC_BATT 47K

14

14
C141 U36C U36D
2 1 1 2 R101
5 6 9 8 PM_RSMRST#
PM_RSMRST# 17
.1UF
- +

1
330K 74LVC14 74LVC14
RTCBATT C526

7
1 .22UF +3V POWER +3V POWER 1

2
1 2 1 2 CHGRTC
W=30mils W=30mils
D3 D1
RB751V RB751V +5V +3V
C111
1

1 2

1
C131 +3V
.1UF R106 U35
2

5
Place near ICH3-M .1UF

14
47K U36E 2
R102
4

2
1 2 11 10 1

1
330K 74LVC14

3
C113 7SH32FU

7
2
.1UF

H30 H31 H32 H33 H35 H37 H38 H39

+3VS
2 C136 .1UF 2
+5VS 1 2
1

1
U11 U37C

10
EMI FINGER EMI FINGER EMI FINGER EMI FINGER EMI FINGER EMI FINGER EMI FINGER EMI FINGER R126 MAX6342 74LVC125

1
100K 5 6 9 8

VCC
MR# RST# SYS_PWROK 17

2
ST1 H18 H2 H8 ST2 ST3 ST4
3 PFI

1
1
4 +3V POWER R103

GND
PFO#

1
R127 C137 C138
10K

2
240K .01UF .1UF
1

2
Screw Boss 070 Stand-Off 090 Stand-Off 115 Stand-Off 053 Stand-Off 053 Stand-Off 053 Stand-Off 090

+3V
H12 H27 H10 H9

1
R97

100K
U37D

13
1

2
74LVC125
3 3
J CPU Thermal Plane Screw Hold J CPU Thermal Plane Screw Hold J CPU Thermal Plane Screw Hold J CPU Thermal Plane Screw Hold 12 11 1 2
43 VGATE ICH_VGATE 17
R107 @0

+3V POWER
H3 H28 H23 H1 H4 H29 H20 H5 H22

CF11 CF18 CF15 CF13 CF16 CF2 CF4 CF1 CF9


SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80
1

I Fixed Position Hold F Fixed Position Hold M Fixed Position Hold


A Screw Hold C Screw Hold D Screw Hold F Screw Hold G Screw Hold I Screw Hold

1
H11 H24 H14 H13 H7 H17 H21 H19 H26 CF10 CF6 CF7 CF8 CF3 CF5 CF19 CF20 CF17 CF12
SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80

1
1

FD2 FD1 FD3 FD5 FD4 FD6


L Screw Hold M Screw Hold N Screw Hold O Screw Hold O Screw Hold O Screw Hold O Screw Hold O Screw Hold O Screw Hold FIDUCAL FIDUCAL FIDUCAL FIDUCAL FIDUCAL FIDUCAL
4 4

1
H25 H16 H15 H6

Compal Electronics, inc.


Title
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
E HDD Frame Hold E HDD Frame Hold E HDD Frame Hold E HDD Frame Hold AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 79 of 87
A B C D E
A B C D

Vin Detector

High 18.764 17.901 17.063


VIN
PF1
PL1
CHC4532U800_1812
Low 17.745 16.903 16.038
5A 32V UL/CSA FAST
PCN1 1 2 PR2
1 1M_1% VS

1
1 1 1 2 1

PR1 VIN

1
3 @10_1206
2
3 PD1

12

1
2 BYS10-45

1
PC1 PC2 PC3 PC4 PR3

2
2DC-S026B201 2.5D 5P 1000PF_50V 100PF_50V 1000PF_50V 100PF_50V PZD1 PR4 PR5
@RLZ24B 84.5K_1% 10K 1K
1 2

2
PR6 ACIN 18,33,35,41
PJP1

8
1 2 1 2 22K
1 2 3 +
3MM PL2 1
CHC4532U800_1812 PACIN 39,40
2 -

1
1

1
PC5 PR7 PC6 PU1A

4
1000PF_50V 20K_1% 0.1UF_50V PZD2 PR8
LM393M RLZ3.6B 10K

2
2

2
RTCVREF
PH1 under CPU botten side : 2 1
PR11
CPU thermal protection at 82 degree C 10K 3.3V
Recovery at 50(51) degree C
2
VL 2

VS VIN
1

PR10
PR9 PC7 47K_1%

2
2.15K_1% 0.1UF_50V PD3
2

RB751V PD2
2 1 RLS4148
40 VMBA
PR12
8

16.9K_1%

1
5 PD4
+
7 MAINPWON RB751V
MAINPWON 41,42
TM_REF1 6 2 1
- 40 VMBB
PR15
VS
10K_1%_0805

PU1B
4

33_1206
LM393M PQ1
0.22UF_0805_16V

PZD3
1000PF_50V

RLZ6.2C TP0610T
PH1

CHGRTCP 2 1 3 1
RTCVREF
PC8

PU2 PR18

1
VL

2
200_0805

1
PC9

S-81233SGUP (SOT-89)
PR13 PR16 PC10 PC11
100K_1% 3.3V 100K 0.22UF_1206_25V 0.1UF_0805_25V

2
CHGRTC 1 2 3 2

2
3 2

1
PR14
3 100K_1% PR19 1 2 3
35 51ON#

1
200 PC12 PZD4
PC13 1UF_0805_25V RLZ16B PR17

1
10UF_1206_10V 22K

2
PJP2 PJP5
+12VALWP 2 1 +12VALW (120mA,20mils ,Via NO.= 1) +1_5VP 2 1 +1.5V (1.5A,60mils ,Via NO.= 3)
JOPEN/+12V 3MMA/CPU_IO

PJP6
PJP3
+1_8VP 2 1 +1.8V (3A,120mils ,Via NO.= 6)
+5VALWP 1 2 +5VALW (5A,200mils ,Via NO.= 10)
3MMA/CPU_IO
PAD-OPEN 4x4m

4
PJP4 PJP7 4

+3VALWP 1 2 +3VALW (5A,200mils ,Via NO.= 10) +VTTP 1 2 +VTT (6A,240mils ,Via NO.= 12)
PAD-OPEN 4x4m PAD-OPEN 4x4m

Compal Electronics, inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 81 of 87
A B C D
A B C D

1 1

Iadp=0~2.9A
P2 P3 B+ B++
PQ2 PQ3 PR20 PL3 PQ4
SI4835DY SI4835DY 0.02_2512_1% FBM-L11-453215-900LMAT_1812 SI4835DY
VIN 8 1 1 8 2 1 1 2 1 8
7 2 2 7 2 7

1
6 3 3 6 PC14 PC15 PC16 PC17 3 6
5 5 5
1

1
4.7UF_1210_25V 4.7UF_1210_25V 0.1UF_0805_25V @1000PF

2
4

4
PR21 PR22
10K 200K
2

ACOFF# 1 2 1 2 VIN

1
PR25 PR23 10K PR24 47K
1

PU3 0
PD5 PR26 MB3878
1SS355 150K 1 24

2
-INC2 +INC2

3
2
1
ACOFF# 1 2
2

1
2 2 1 2 23 PC18 2
OUTC2 GND 220PF_50V 4
PR28 PR27
1

10K D PQ7 10K PQ5


3 +INE2 CS 22 1 2 100K
1 2 2 2N7002 FDS4435 2
38,40 PACIN ACOFF 33
G
S 1 4 21 1 2
3

-INE2 VCC(o)
1

PR29 100K PQ6

5
6
7
8
1

24.9K_1% PC19 DTC115EK

3
PC20 PR30 1 2 1 2 5 20 0.1UF_0805_25V
40 ACON FB2 OUT
0.1UF_16V 10K_1% PC22
2

PC21 PR31 0.1UF_50V


2

4700PF_50V 10K 6 19 1 2 LXCHRG


VREF VH PC25
1

0.1UF_0805_25V
PC23 1 2 1 2 7 18 1 2
0.1UF_16V FB1 VCC
2

PC24 PR32
2200PF_50V 10K 8 17 1 2
FSTCHG 33,40 CC=0~2.52A
PR36 -INE1 RT
162K_1% PR34 CV=16.84V(8 CELLS)

2
1 2 9 16 68K PL4
33 IREF +INE1 -INE3 22UH_SPC-1205P-220A BATT+
PR37 10K PD6 1 2 1 2
2 1 10 15 1 2 1 2 1SS355
OUTC1 FB3
1

PC30 PR35
*

100UF_EC_25V

4.7UF_1210_25V

4.7UF_1210_25V
PR39 0.1UF_16V PR38 PC27 0.02_2512_1%
IREF=1.31*Icharge

1
100K_1% 11 14 47K 1500PF_50V
2

OUTD CTL

1
PC26

PC28

PC29
+
IREF=0.73 ~ 3.3V

1
3 PD8 3
2

12 13 PR40 RB051L-40

2
-INC1 +INC1 47K

2
2
2 1 2 1
PR41 PR42
47.5K_1% 143K_1%

4 4

Compal Electronics, inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B 401208
Date: 星期一, 四月 07, 2003 Sheet 82 of 87
A B C D
A B C D

VMBA
38 VMBA VMBB 38

1
PC31 PC32
1000PF_50V BATT+ @1000PF_50V
P5 P4
PQ9 PQ11

2
PF2 PL5 PQ8 PQ10 PL6 PF3
PJP8 7A 24V UL/CSA FAST BLM41P600S_1806 FDS4435 FDS4435 @FDS4435 @FDS4435 @BLM41P600S_1806 @5A 125V UL/CSA SLOW PJP9

1 2 1 8 1 1 8 8 1 1 8 2 1 1
ALI/NIMH# 7 2 2 7 7 2 2 7 BLI/NIMH#
2 AB/I BB/I 2
3 6 3 3 6 6 3 3 6 3
1 TSA 5 5 5 5 TSB 1
4 4

1
5 5

1
PR43 PR44

4
6 6

1
1K PC33 PC34 @1K
7 7

1
0.01UF_50V PR45 PR46 @0.01UF_50V

2
PR47 PR48 39K @39K PR49 PR50
@SUYIN 25063A-07G1-E 7P P2.5

2
SUYIN 25063A-07G1-E 7P P2.5 100 100 @100 @100

2
2

2
1 2
EC_SMD1 1 2 EC_SMD2
EC_SMD1 33,34 5,30,33 EC_SMD2
PR51 22K

1
EC_SMC1 PR52 @22K
EC_SMC1 33,34

1
2 EC_SMC2
5,30,33 EC_SMC2
2
PQ12 PQ13

3
1

1
HMBT2222A @HMBT2222A

3
2
PD9 PD10

1
@BAS40-04 @BAS40-04
PD12
PR53 PD11 PR54 PD13 PD14
10K RLS4148 @10K @RLS4148 @BAS40-04 @BAS40-04
3

1
2 1 2 1

3
1

1
+5VALWP 100K 100K
GA 2 GB 2
2
42 GA 42 GB 2

PQ14 PQ15 +5VALWP

2
100K DTC115EK 100K @DTC115EK
PR55 PR56

3
@10K
10K
1

1
+3VALWP

PR59
25.5K_1%
1 2 TSA

1
VS

1
PU4 VMBB PR61
7

74HC253 VL @47K PR63


PD15 PD16 1K
1Y

2Y

GND

1
PC35 PR66 3 3

2
1

16 0.01UF_50V PR57 @1K


VL

2
VCC PR58 @1M_0.5% ALI/NIMH#2 1 1 1

2
100K PU5A PR60
1EN
2EN
1

8
1C0
1C1
1C2
1C3

2C0
2C1
2C2
2C3

LM393M 100K_1% 2 2
S0
S1

39 ACON

2
PC36 + 3 1 2 33 BATT_TEMPA
33 ALI/MH#
2
1

0.1UF_50V 1 2 1 @BAS40-04 @BAS40-04


2

6
5
4
3

10
11
12
13

14
2
1
15

1
PR64 - 2

1
270K PR62 4.7K
PR65 PC37
4

499K_1% @100PF_50V
2

2
2
3 3

S1 1 2

PR67 5.6M
PQ16 PR68 VL RTCVREF 3.3V 8 CELLS BATTERY UVP
1

DTC115EK 100K VMBA


H 10.68V L 9.518V
1

1 2

1
PR69
1

10K PR70
100K PR71 PU5B 1M_0.5%
33,39 FSTCHG 2 PR74
1 2 LM393M
2

100K 100K_1%
2

100K PR73 5 2 1
+
2

100K S0 1 2 7 +3VALWP PR72


3

- 6 @25.5K_1%

1
PR76 4.7K 1 2 TSB
PR78 PC38

1
499K_1% 100PF_50V
2
1

1
1 2 PR75
2

@47K PR77
PR80 PC39 PD17 PD18 @1K
2

5.6M 1000PF_50V PR79 3 3

2
100K @1K
33 A/B#USE 2

2
BLI/NIMH# 2 1 1 1
1

PQ17 100K 2 2
DTC115EK 33 BATT_TEMPB
33 BLI/MH#
3

@BAS40-04 @BAS40-04
PQ18 100K
2 2 1 PACIN 38,39
4 DTC115EK 4

PR81
100K 47K
3

2 1 TRICKLE 33

PD19
Compal Electronics, inc.
RLS4148 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 83 of 87
A B C D
A B C D

+5VALWP VS
DAP202U
B++ PD20 B++

3
PC43 PC45
VL

0.1UF_0805_25V

0.1UF_0805_25V
2200PF_50V 4.7UF_1210_25V PC40 PC41 PC42

8
7
6
5

5
6
7
8
4.7UF_1210_25V 0.1UF_0805_25V 4.7UF_1210_25V

PC47

PC48
PC49 PC44 PR82 PR83

D
D
D
D

D
D
D
D
2
1 470PF_0805_100V 4.7UF_1210_25V PQ19 PC50 PC46 15K_1% 15K_1% PQ20 1

SI4800 4.7UF_1206_16V 2.2UF_0805_16V SI4800

G
S
S
S

S
S
S
PR84
22_1206

1
2
3
4

4
3
2
1
PC52

22

21

25

24

23
PR85 0 0.1UF_0805_25V PL7
1 2 4 1 30 16 2 1

TRIP1

TRIP2
VREF5

REG5V_IN

VCC
LH1 LH2
PD21 EC11FS2 PC51 0.1UF_0805_25V PR86 0 10UH_SPC_1205P_100
29 OUT1_U OUT2_U 17
1

8
7
6
5

5
6
7
8
2 3
PZD5 PR87 0 PR88 0

D
D
D
D

D
D
D
D
RLZ16B PQ21 28 PU6 18
SI4810DY LL1 LL2 PQ22
PC53 PT1 TPS5120 SI4810DY
2

G
S
S
S

S
S
S
2.2UF_1206_25V 10UH_SDT-1205P-100-118 27 19
OUT1_D OUT2_D

1
2
3
4

4
3
2
1
SKIP/PWM #
26 20 PC54

5V_STBY
OUTGND1 OUTGND2 @1000PF_50V

SOFT1

SOFT2
STBY1

STBY2

PGOD
PU7 PC55

GND
INV1

INV2
SCP
REF
3

FB1

FB2
AMS2906 @1000PF_50V

CT
PRA1
Vin

@0_0402

10

11

12

13

PC56 0.01UF_50V 14

15
2 A Type AMS2906 PR89 PR90
Vout
ADJ

0.1UF_16V
2 PRB1
B Type XC6202 57.6K_1% 33.2K_1% 2

47P_50V
0_0402 +5VALWP
1

SCP
PR91 PR92
PR93 430 330 330 PC60 4700PF_50V PC66
150UF_D_6.3V
+3VALWP

PC59
1

1
PC58
PC57 PC61 PR94
PRB2 + + 3300P_50V PC64 2200PF_50V 220

PC69 0.01UF_50V
0_0402 PD22 PZD6 PC62 PC63 2200PF_50V + + PZD7 PD23
BYS10-45 RLZ6.2C 150UF_D_6.3V 150UF_D_6.3V PC65 RLZ4.3B BYS10-45
0.85VREF +3VALWP @150UF_D_6.3V
2

2
VL PC67
VL 10PF_50V PR96
PR97 11.5K_1%
11.5K_1%
PR99
PRA2 PR100 @100K
@0_0402
+5V : Ipeak = 6.66A ~ 10A 47K PR101
47K
+12VALWP
+3.3V : Ipeak = 6.66A ~10A
1
MAINPWON
MAINPWON 38,42
5V_STBY
VS
PR95 PR102 150K
75_1% 100K
29,30,33,37 SUSP# 2
4.7UF_1206_16V

PC70
PQ23 100K 0.047U_16V
PC68

3 DTC115EK 3
3

1
PR202

1
PR98 PR103 100K
649_1% PC71 100K 2 PQ44

2
0.01UF_50V FMMT3904

3
PC121 PR203
1

1UF_0805_25V 47K
2 PQ24
18,33,35,38 ACIN
2N7002
3

PR207 PZD8
2K RLZ10C
5V_STBY
VIN VS

1
PR204

1
100K
1

2 PQ45
PC72 FMMT3904

2
3
2

3
SCP 0.1UF_0805_25V
22K PC122 PR205
PQ25 1UF_0805_25V 47K
3

TP0610T 2
B++
2 1 2 VL 47K

PR104 10K
1

4 PQ43 4

DTA144WKA
1

PR105

330
Compal Electronics, inc.
2

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 84 of 87
A B C D
A B C D

+1_8VP
PQ26
PH2 near main Battery CONN :
SI3442DV +1.5V+-5% BAT. thermal protection at 73 degree C

D
6 Recovery at 50(51) degree C

S
1 1

5 4 +1_5VP
2
1 VL
+5VALWP VS
4.7UF_1206_25V

2
3 + PC73

PR107
5.1K
PR106
PC74

1
0.1UF_50V
47UF_D_6.3V PR170 PC117 PR171
2.37K_1% 0.1UF_50V 47K_1%

1
1

220PF_50V
PC75

2
PC76
2
PR172
10K_1%
PU8A 5 +
8

7 MAINPWON
LM358A MAINPWON 38,41
+ 3 2 1 TM_REF2 6 -
VL
1 PU9B
- 2 PR108 LM393M
69.8K_1%

0.22UF_0805_16V
4

0.01UF_50V

PC118 1000PF_50V
PR109

1
30.1K_1%

PC77
PC78

PC119
10K_1%_0805
68PF_50V VL
100K SYSON# PR173 100K_1%
1 2 2 1 2 SYSON# 37

PH2
2 PR110 0 2

PR111 5.1K
100K PR174
PQ27 100K_1%

3
DTC115EK

+1.8V+-5%
PQ28
SI3445DV PL8 +1_8VP
+5VALWP 5UH-SPC-06704-5R0

D
LX18

S
6 1 2
8 Cells Charger OVP : 18.059V 4 5
VIN 2
40 GA

1
1
1

1
PR112

G
2 PD25 191K_1% + PC79

3
1

1
3
BATT+ PD24 PQ30 RB051L-40 150UF_D_4V_FP 3

PQ29 PC80 RB751V HMBT2222A


3

2
1
2N7002 PR113 4.7UF_1206_25V PR114

2
36K VS 1 2 2 10K

1
2
PR116 PR115 PR117

3
1
1M_0.5% 1K 162K_1%
PC81
PU9A 2200PF_50V

2
LM393M +5VALWP
40 GB
8

PR119 PR118 0
1

309K 1% + 3
2 1

8
- 2 0.85VREF

3
PQ31 + 3
3

@2N7002 PR120 PQ32 2 1


4

100K 2SA1036K - 2 1 2 0.85VREF


PR121 PR122 PU13A

1
PR124 PC82 100K_0.5% 97.6K_1% LM393M PR123 10K

1
100K 1UF_1206_25V PC83 PC84
1000PF_50V 1UF_0805_16V

100K SYSON#
2 SYSON# 37

1
PC85
0.01UF_50V 100K

2
PQ33

3
DTC115EK
4 4

Compal Electronics, inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 85 of 87
A B C D
A B C D

PC91 PC93 B++


4.7UF_1210_25V 4.7UF_1210_25V

PC95
2200PF_50V
+3V
2 1
1 PC92 PC94 1

PR125 4.7UF_1210_25V 4.7UF_1210_25V


2

2
0 GL2
PR126 PR127 PR128 PR129 PR130
10K 10K 10K 10K 10K +5VALWP
BL1
1

2
PC86 PC87 PC89
@4700PF_50V @4700PF_50V @4700PF_50V

5
6
7
8

5
6
7
8

5
6
7
8
PC88 PC90 PR131 PR139
@4700PF_50V @4700PF_50V 0_0805 0.002_21515_1%(2W)
7 CPU_VID4

1
4 4 4 LC 2 1 +VCC_H_CORE
7 CPU_VID3

0
1 2

2
PQ34 PQ35 PQ36 + +
7 CPU_VID2

2
PR133
PR132 10 PD27 SI4894DY SI4894DY SI4894DY

0
1SS355 PL9 PC97 PC98
7 CPU_VID1
2

0
PR135 0.7UF HK-RM136-22A0R7 220UF_D_4V 220UF_D_4V

3
2
1

3
2
1

3
2
1
PR136
20
7 CPU_VID0

1
2

PU10 MAX1718

1
PR137
1 21 27 BL2
D4 LX
0

1
2

PR138

22 D3 DH 28

1
+3V
1
PR140

23 26 1 2 PQ38 PQ39 +5VALWP


D2 BST
1

5
6
7
8

5
6
7
8
PC96 SI4404DY SI4404DY PQ40 PD28

5
6
7
8
2 PR143 24 16 PR141 0 0.1UF_0805_25V SI4404DY EC10QS04 2
1

@10K D1 DL

2
0.1UF_0805_25V
25 D0 V+ 1 4 4
36 VGATE 4 PC120
2

PC101 4.7UF_1206_16V

@0.01UF_50V
1 2 1 2 14 9 0.1UF_0805_25V PR177
VGATE VCC

5
499_1%
PR144 PR206 @1K 2 1 3 4 + 3 2 1
@0 TIME FB
1 2 1 2 1
PC123 PR145 51K 2 13 - 4 2 1

3
2
1

3
2
1
@0.01UF_50V SDN/SKIP POS PR146 PR142 0 PU14

3
2
1

1
PC102 4.7UF_1206_16V 17 5 100 MAX4322 PR178

2
VDD NEG

PC99

PC100
1K_1%

PC104 470PF_50V
6 CC ZMODE 19
GL3 PC103
1000PF_50V
*
PR148
0
2 1
20 18

2
OVP SUS PR176
1 2 PC105 1UF_0805_16V 11 8 1K_1%
33 VR_ON REF S1
PR147 12 7
ILIM S0
1

150K COM
15 GND TON 10
PR175 1 10 1 2
180K NO2 V+ +3VALWP
*

2
2 9 PR149 CPU_COREP OUTPUT_ MODE VOLTS
*
2

NO3 COM

2
@0
3 8 PR151 PR153
PR200 0 NO1 NO0 @10K @0 D3 D2 D1 D0 D4 = 1 D4 = 0
4 7

1
INH ADDA

1
3 5 6 2 1 0 0 0 0 0.975 1.75 3
GND ADDB PM_GMUXSEL 7,17 0 0 0 1 1.70
PR201 0
*
PU11
* PR156 @0 0.950
2

@MAX4524
PR152 0 0 1 0 0.925 1.65
0 2 1
PM_DPRSLPVR 7,17 0 0 1 1 0.900 1.60

1
PR150 PR157 0
1

249K_1% 0 1 0 0 0.875 1.55


2

* *
2
0 1 0 1 0.850 1.50
PR159 PR161 100K
2 2 1
@604K_1% @61.9K_1% H_DPSLP# 5,17 0 1 1 0 0.825 1.45
PR155 PR154 PR162 @0
*
1

150K_1% 0 100K 0 1 1 1 0.800 1.40

*
1

PQ41

3
@DTC115EK 1 0 0 0 0.775 1.35

1 0 0 1 0.750 1.30
2

*
PR158
@19.6K_1%
*
PR160
@16.2K_1%
1

1
0

0
1

1
0

1
0.725

0.700
1.25

1.20
CPU CONTROL MODE
1

1 1 0 0 0.675 1.15
MODE OFFSET RBOTTOM Vout(0A) ADDA ADDB
DEEPER SLEEP 0mV X 0.850 X X 1 1 0 1 0.650 1.10
BATTEY SLEEP -56mV 16.2K 1.094 1 0
PERFORMANCE SLEEP -51mV 19.6K 1.199 1 1 1 1 1 0 0.625 1.05
4 BATTERY MODE -16mV 61.9K 1.134 0 0 4

PERFORMANCE MODE -1.8mV 604K 1.248 0 1 1 1 1 1 0.600 1.00

Compal Electronics, inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 86 of 87
A B C D
5 4 3 2 1

D D

+5VALWP

2
PR163
0_0805

1
PC107
4.7UF_1210_25V

B++
PC106 PC108
PC109 0.1UF_0805_25V 4.7UF_1210_25V

2
PR164 10 PD29 4.7UF_1206_16V
1SS355 4 5
PU12
PC110 PL10
4.7UF_1206_16V
15 VCC VDD 14 3 6
10UH_SPC-1205P-100
(+1.25V : I_peak = 6A)

1
18 19 IO_BST 2 7
SKIP BST PC111 +VTTP
17 1 IO_GL4 0.1UF_0805_25V 1 8
V+ DH PR165
10 20 IO_LX 2.49K_1%
5 VTT_PWRGD PGOOD LX

1
PD30
C IO_GL5 PQ42 EC10QS04 + C
33 VTT_ON 3 SHDN DL 13
SI4834DY
PR166 0 6 12 PC112
ILIM PGND 150UF_D_6.3V PR167

2
2 11 10K_1%
N/C N/C
1 2
Vref 2.0V 7 9
REF N/C
1

PR168 16 5
PR169 15K_1% TON OUT
84.5K_1% 8 4 IO_FB
AGND FB
MAX1714A
FB 1.0V
2

PC113
0.1UF_16V

PC115
PC114 @0.1UF
@150PF_50V

B B

A A

Title
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1371
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Document Number Rev
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS B 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401208
Date: 星期一, 四月 07, 2003 Sheet 87 of 87
5 4 3 2 1
www.s-manuals.com

You might also like