Acer Aspire E5-432 E5-432G Intel Braswell-MD + N16X Robin - BA - MB - LA-C371P R10-1

A B C D E
Model Name : A4WAL

File Name : LA-C371P
1 1
Compal Confidential
2 2
A4WAL M/B Schematics Document

Intel Braswell-M/D + N16X
2015-03-04
3 3
REV:1.0
4 4
PCB@
DAX PCB 1BW LA-C371P REV0 MB 1
Part Number Description
DA6001BJ000 PCB 1BW LA-C371P REV0 MB 1
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/03/19 Deciphered Date 2015/03/18 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A4WAL_Braswell-M/D_LA-C371P
Date: Wednesday, March 04, 2015 Sheet 1 of 55
A B C D E
A B C D E
CRT Conn.
P.27
eDP Conn.
Nvidia N16V-GL
with DDR3 x8
1 DP to VGA page 15~23 204pin DDR3L-SO-DIMM X1 1
P.13
Realtek RTD2168P.26 PCIe 2.0 x 2
5GT/s
P.24
port 0/1
port 1 port 2 Memory BUS 204pin DDR3L-SO-DIMM X1
port 0 Dual Channel P.14
1.35V DDR3L 1600
P.25 DDI x3
P.25 USB2.0 x4 port 0 port 1 port 2 port 3 port 4
PCIE 2.0 x1
HDMI Conn.
port 3 Touch Panel
Conn. USB HUB
RJ45 Conn. Braswell-M/D HD Camera P.24 GL850G
LAN(GbE) / Card Reader Conn. P.24 P.31
RTL8411B P.28 USB 3.0 USB 3.0
2 2
Conn P.33 Conn P.33

Card Reader
2 in 1(SD) P.29
SOC Port1 Port2
USB Charger
SLG55594
FCBGA 1170 Pin USB3.0 x2
USB 2.0
port 0 port 1
NGFF Conn P.33
SATA 3.0 x2 PCIE 2.0 x1
WLAN/BT
port 1 port 0 P.30
P.32 P.32
page 05~12 HD Audio HDA Codec

ALC283/255
P.36
I2C BUS LPC BUS SPI
3 SATA ODD Conn. 3
SPI ROM Speaker Int. MIC UAJ

EC 1.8V (8MB)
ENE KB9022 P.07
P.36 P.36 on Sub/B P.33
RTC CKT. SATA HDD Conn.

P.34
P.08
P.35 P.35
DC/DC Interface CKT.
P.38
Sub Board
Power Circuit DC/DC LS_XXXXP USB/Audio Touch Pad Int.KBD
P.33
P.39~P.52 PS2/I2C
4 LED/Power On/Off 4
P.35
Fan Control Security Classification Compal Secret Data Compal Electronics, Inc.
2014/03/19 2015/03/18 Title
P.37
Issued Date Deciphered Date Block Diagrams
WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
A B C D E
A B C D E
Voltage Rails Board ID / SKU ID Table for AD channel

Power Plane Description S0 S3 S4/S5 BOARD ID Table_LA-C371P
+19V_VIN 19V Adapter power supply ON ON ON
Board ID PCB Revision
BATT+ 12V Battery power supply ON ON ON
01 EVT_LA-C371PR01
+19VB AC or battery power rail for power circuit. (19V/12V) ON ON ON
02 DVT_LA-C371PR02
+RTCVCC RTC Battery Power ON ON ON
03 PVT_LA-C371PR10
1
+1.05VALW +1.05v Always power rail ON ON ON 1
+1.15VALW +1.15v Always power rail ON ON ON

+3VALW +3.3v Always power rail ON ON ON
+5VALW +5.0v Always power rail ON ON ON
+1.35V +1.35V power rail for DDR3L ON ON OFF
+3V_PTP +3.3V power rail for PTP ON ON OFF
+SOC_VCC Core voltage for SOC ON OFF OFF
+SOC_VGG GFX voltage for SOC ON OFF OFF
+0.675VS +0.675V power rail for DDR3L Terminator ON OFF OFF
+1.8VS +1.8v system power rail ON OFF OFF
+3VS +3.3v system power rail ON OFF OFF
+5VS +5.0v system power rail ON OFF OFF
43 level BOM table
+3VSDGPU +3.3V dGPU power rail ON** OFF OFF
+VGA_CORE Core voltage for dGPU ON** OFF OFF 43 Level Description BOM Structure
2
+1.5VSDGPU +1.5V dGPU power rail ON** OFF OFF 4319X5BOL01 SMT MB AC371 A4WAL UMA HDMI 1DMIC@/255@/EMC@/HDD@/HUB@/NBYOC@/KB@/PCB@/LPC3V@/TSI@/UMA@/QHAX@ 2
+1.05VSDGPU +1.05V dGPU power rail ON** OFF OFF 4319X5BOL02 SMT MB AC371 A4WAL DIS N16V-GM HDMI 1DMIC@/255@/EMC@/NGC6@/HDD@/HUB@/NBYOC@/KB@/PCB@/VGM@/LPC3V@/TSI@/VGA@/QHAW@
4319X5BOL03 SMT MB AC371 A4WAL DIS N16S-GT HDMI 1DMIC@/255@/EMC@/GC6@/HDD@/HUB@/NBYOC@/KB@/PCB@/SGT@/LPC3V@/TSI@/VGA@/QHAW@
4319X5BOL04 SMT MB AC371 A4WAL DIS N16V-GM 4G HDMI 1DMIC@/255@/EMC@/NGC6@/HDD@/HUB@/NBYOC@/KB@/PCB@/VGM@/LPC3V@/TSI@/VGA@/DR@/QHAW@
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF. 4319X5BOL05 SMT MB AC371 A4WAL DIS N16S-GT 4G HDMI 1DMIC@/255@/EMC@/GC6@/HDD@/HUB@/NBYOC@/KB@/PCB@/SGT@/LPC3V@/TSI@/VGA@/DR@/QHAW@
Note : ON** dGPU optimus on 4319X5BOL06 SMT MB AC371 A4WAL UMA QHAW HDMI 1DMIC@/255@/EMC@/HDD@/HUB@/NBYOC@/KB@/PCB@/LPC3V@/TSI@/UMA@/QHAW@
4319X5BOL07 SMT MB AC371 A4WAL DIS GM2G QHAX HDMI 1DMIC@/255@/EMC@/NGC6@/HDD@/HUB@/NBYOC@/KB@/PCB@/VGM@/LPC3V@/TSI@/VGA@/QHAX@
4319X5BOL08 SMT MB AC371 A4WAL DIS GM4G QHAX HDMI 1DMIC@/255@/EMC@/NGC6@/HDD@/HUB@/NBYOC@/KB@/PCB@/VGM@/LPC3V@/TSI@/VGA@/DR@/QHAX@
EC SMBUS Routing Table

EC Power BAT CHGR SOC DGPU
EC_SMB_CK1 BOM Option Table BOM Option Table
+3VALW V V X X
EC_SMB_DA1
Item BOM Structure Item BOM Structure
EC_SMB_CK2
+3VS X X V V Unpop @ X76 VRAM X76@
EC_SMB_DA2
Connector CONN@ with BYOC BYOC@
EMC requirement EMC@ without BYOC NBYOC@
3 3
SOC SMBUS Routing Table EMC requirement depop @EMC@ EA Serial HDD HDD@
Touch Screen I2C TSI@ BA Serial HDD BA@
SOC Power DIMM1 DIMM2 NGFF XDP EC DGPU RTD2168 KB BL KB@ non USB HUB NHUB@
TPM TPM@ USB HUB HUB@
SMB Address
NTPM NTPM@ Dual Rank DR@
SOC_SMBCLK Power Button DBG@ G-sensor GSEN@
+1.8VALW V V V X V V V
SOC_SMBDATA to +3VS dGPU VGA@ CPU QHAX QHAX@
N16S-GT SKU SGT@ CPU QHAW QHAW@
N16V-GM SKU VGM@
I2C Map CODEC(ALC255) 255@
CODEC(ALC283) 283@
Power Touch PAD Touch Panel
Non GPU CG6 Function NGC6@
I2C Address 0xXX 0xXX GPU CG6 Function GC6@
I2C Port2 +1.8VALW to +TS_PWR X V
V X
I2C Port5 +1.8VALW to +3V_PTP
4 4

2014/03/19 2015/03/18 Title
Issued Date Deciphered Date Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
A B C D E
A B C D E
VR_ON NCP81201MNTXG 7000mA

+SOC_VCC
(PU901)
11000mA
NCP81201MNTXG +SOC_VGG
(PU902)
1
EC_EN_1.05VALW SY8288RAC 5400mA VGA_PWROK EM5209VF 1060mA 1
(PU601) +1.05VALWP +1.05VSDGPU

(U60)
ADAPTER
SYSON RT8207MZQW 5900mA SUSP#
(PU501) +1.35VP +0.675VSP
PJ501
+1.35V
CHARGER +19VB
3V_EN SY8286BRAC
(PU401) +3VALWP
SUSP# SY8003DFC 700mA PJ701

+1.15VALWP +1.15VALW
(PU701)
+1.24VALW_PWRGD SY8032ABC 597mA EM5209VF 110mA
BATTERY +1.8VALWP +1.8VS
2 (PU702) (U59) 2
+1.05VALW_PWRGD G971ADJF11U 550mA PJ802 0 ohm

+1.24VALWP +1.24_1.35VALW +1.24_1.35VALW_ICLK
(PU801)
0 ohm
+1.24_1.35VALW_USBVDDQ
SUSP# EM5209VF 3135mA JP8
+3VS +3VS_WLAN
(U11)
ENVDD G5243AT11U
+LCDVDD
LAN_PWR_EN 1400mA
(U8)
SY6288C20AAC
+3V_LAN
(U67) DGPU_PWR_EN G5243T11U
+3VSDGPU_AON
(U12)
3VSDGPU_MAIN_EN G5243T11U
+3VSDGPU_MAIN
(U14)
3 3
EC_ON
SY8286CRAC SUSP# EM5209VF 4868mA J1
+5VALWP +5VS +VDDA
(PU402) (U11)
0 ohm
+5VS_HDD
ODD_EN G5243AT11U
+5VS_ODD
(U13)
USB_PWR_EN SY6288C20AAC
+USB3_VCCA
(U25)
+3VSDGPU_AON
RT8812AGQW 26000mA USB_CHARGE_2A SY6288C20AAC
+VGA_CORE +USB3_VCCB
(PU1201) (U25)
4 4
1.5VS_DGPU_PWR_EN
SY8288RAC 10000mA
+1.5VSDGPU
(PU1101)

2014/03/19 2015/03/18 Title
Issued Date Deciphered Date Power Rail
A B C D E
5 4 3 2 1
DDR_A_D[0..63] <13> DDR_B_D[0..63] <14>
DDR_A_DQS[0..7] <13> DDR_B_DQS[0..7] <14>
DDR_A_DQS#[0..7] <13> DDR_B_DQS#[0..7] <14>

CHV_MCP_EDS CHV_MCP_EDS
USOC1A USOC1B
<13> DDR_A_MA[0..15] DDR_A_MA15 BD49 DDR0 <14> DDR_B_MA[0..15] DDR_B_MA15 BD5 DDR1
DDR_A_MA14 BD47 DDR3_M0_MA_15 BG33 DDR_A_D63 DDR_B_MA14 BD7 DDR3_M1_MA_15 BG21 DDR_B_D63
DDR_A_MA13 BF44 DDR3_M0_MA_14 DDR3_M0_DQ_63 BH28 DDR_A_D62 DDR_B_MA13 BF10 DDR3_M1_MA_14 DDR3_M1_DQ_63 BH26 DDR_B_D62
DDR_A_MA12 BF48 DDR3_M0_MA_13 DDR3_M0_DQ_62 BJ29 DDR_A_D61 DDR_B_MA12 BF6 DDR3_M1_MA_13 DDR3_M1_DQ_62 BJ25 DDR_B_D61
D DDR_A_MA11 BB49 DDR3_M0_MA_12 DDR3_M0_DQ_61 BG28 DDR_A_D60 DDR_B_MA11 BB5 DDR3_M1_MA_12 DDR3_M1_DQ_61 BG26 DDR_B_D60 D
DDR_A_MA10 BJ45 DDR3_M0_MA_11 DDR3_M0_DQ_60 BG32 DDR_A_D59 DDR_B_MA10 BJ9 DDR3_M1_MA_11 DDR3_M1_DQ_60 BG22 DDR_B_D59
DDR_A_MA9 BE52 DDR3_M0_MA_10 DDR3_M0_DQ_59 BH34 DDR_A_D58 DDR_B_MA9 BE2 DDR3_M1_MA_10 DDR3_M1_DQ_59 BH20 DDR_B_D58
DDR_A_MA8 BD44 DDR3_M0_MA_9 DDR3_M0_DQ_58 BG29 DDR_A_D57 DDR_B_MA8 BD10 DDR3_M1_MA_9 DDR3_M1_DQ_58 BG25 DDR_B_D57
DDR_A_MA7 BE46 DDR3_M0_MA_8 DDR3_M0_DQ_57 BJ33 DDR_A_D56 DDR_B_MA7 BE8 DDR3_M1_MA_8 DDR3_M1_DQ_57 BJ21 DDR_B_D56
DDR_A_MA6 BB46 DDR3_M0_MA_7 DDR3_M0_DQ_56 DDR_B_MA6 BB8 DDR3_M1_MA_7 DDR3_M1_DQ_56
DDR_A_MA5 BH48 DDR3_M0_MA_6 BD28 DDR_A_D55 DDR_B_MA5 BH6 DDR3_M1_MA_6 BD26 DDR_B_D55
DDR_A_MA4 BD42 DDR3_M0_MA_5 DDR3_M0_DQ_55 BF30 DDR_A_D54 DDR_B_MA4 BD12 DDR3_M1_MA_5 DDR3_M1_DQ_55 BF24 DDR_B_D54
DDR_A_MA3 BH47 DDR3_M0_MA_4 DDR3_M0_DQ_54 BA34 DDR_A_D53 DDR_B_MA3 BH7 DDR3_M1_MA_4 DDR3_M1_DQ_54 BA20 DDR_B_D53
DDR_A_MA2 BJ48 DDR3_M0_MA_3 DDR3_M0_DQ_53 BD34 DDR_A_D52 DDR_B_MA2 BJ6 DDR3_M1_MA_3 DDR3_M1_DQ_53 BD20 DDR_B_D52
DDR_A_MA1 BC42 DDR3_M0_MA_2 DDR3_M0_DQ_52 BD30 DDR_A_D51 DDR_B_MA1 BC12 DDR3_M1_MA_2 DDR3_M1_DQ_52 BD24 DDR_B_D51
DDR_A_MA0 BB47 DDR3_M0_MA_1 DDR3_M0_DQ_51 BA32 DDR_A_D50 DDR_B_MA0 BB7 DDR3_M1_MA_1 DDR3_M1_DQ_51 BA22 DDR_B_D50
DDR3_M0_MA_0 DDR3_M0_DQ_50 BC34 DDR_A_D49 DDR3_M1_MA_0 DDR3_M1_DQ_50 BC20 DDR_B_D49
BF52 DDR3_M0_DQ_49 BF34 DDR_A_D48 BF2 DDR3_M1_DQ_49 BF20 DDR_B_D48
<13> DDR_A_BS2 AY40 DDR3_M0_BS_2 DDR3_M0_DQ_48 <14> DDR_B_BS2 AY14 DDR3_M1_BS_2 DDR3_M1_DQ_48
<13> DDR_A_BS1 BH46 DDR3_M0_BS_1 AV32 DDR_A_D47 <14> DDR_B_BS1 BH8 DDR3_M1_BS_1 AV22 DDR_B_D47
<13> DDR_A_BS0 DDR3_M0_BS_0 DDR3_M0_DQ_47 AV34 DDR_A_D46 <14> DDR_B_BS0 DDR3_M1_BS_0 DDR3_M1_DQ_47 AV20 DDR_B_D46
BG45 DDR3_M0_DQ_46 BD36 DDR_A_D45 BG9 DDR3_M1_DQ_46 BD18 DDR_B_D45
<13> DDR_A_CAS# BA40 DDR3_M0_CASB DDR3_M0_DQ_45 BF36 <14> DDR_B_CAS# BA14 DDR3_M1_CASB DDR3_M1_DQ_45 BF18
DDR_A_D44 DDR_B_D44
<13> DDR_A_RAS# BH44 DDR3_M0_RASB DDR3_M0_DQ_44 AU32 DDR_A_D43 <14> DDR_B_RAS# BH10 DDR3_M1_RASB DDR3_M1_DQ_44 AU22 DDR_B_D43
<13> DDR_A_WE# AU38 DDR3_M0_WEB DDR3_M0_DQ_43 AU34 DDR_A_D42 <14> DDR_B_WE# AU16 DDR3_M1_WEB DDR3_M1_DQ_43 AU20 DDR_B_D42
<13> DDR_A_CS1# AY38 DDR3_M0_CSB_1 DDR3_M0_DQ_42 BA36 DDR_A_D41 <14> DDR_B_CS1# AY16 DDR3_M1_CSB_1 DDR3_M1_DQ_42 BA18 DDR_B_D41
<13> DDR_A_CS0# DDR3_M0_CSB_0 DDR3_M0_DQ_41 BC36 DDR_A_D40 <14> DDR_B_CS0# DDR3_M1_CSB_0 DDR3_M1_DQ_41 BC18 DDR_B_D40
BD38 DDR3_M0_DQ_40 BD16 DDR3_M1_DQ_40
<13> DDR_A_CLK1 BF38 DDR3_M0_CK_1 BH38 DDR_A_D39 <14> DDR_B_CLK1 BF16 DDR3_M1_CK_1 BH16 DDR_B_D39
<13> DDR_A_CLK1# AY42 DDR3_M0_CKB_1 DDR3_M0_DQ_39 BH36 <14> DDR_B_CLK1# AY12 DDR3_M1_CKB_1 DDR3_M1_DQ_39 BH18
DDR_A_D38 DDR_B_D38
<13> DDR_A_CKE1 DDR3_M0_CKE_1 DDR3_M0_DQ_38 BJ41 DDR_A_D37 <14> DDR_B_CKE1 DDR3_M1_CKE_1 DDR3_M1_DQ_38 BJ13 DDR_B_D37
BD40 DDR3_M0_DQ_37 BH42 DDR_A_D36 BD14 DDR3_M1_DQ_37 BH12 DDR_B_D36
<13> DDR_A_CLK0 BF40 DDR3_M0_CK_0 DDR3_M0_DQ_36 BJ37 DDR_A_D35 <14> DDR_B_CLK0 BF14 DDR3_M1_CK_0 DDR3_M1_DQ_36 BJ17 DDR_B_D35
<13> DDR_A_CLK0# BB44 DDR3_M0_CKB_0 DDR3_M0_DQ_35 BG37 DDR_A_D34 <14> DDR_B_CLK0# BB10 DDR3_M1_CKB_0 DDR3_M1_DQ_35 BG17 DDR_B_D34
<13> DDR_A_CKE0 DDR3_M0_CKE_0 DDR3_M0_DQ_34 BG43 <14> DDR_B_CKE0 DDR3_M1_CKE_0 DDR3_M1_DQ_34 BG11
DDR_A_D33 DDR_B_D33
AT30 DDR3_M0_DQ_33 BG42 DDR_A_D32 AT24 DDR3_M1_DQ_33 BG12 DDR_B_D32
C AU30 RSVD1 DDR3_M0_DQ_32 AU24 RSVD1 DDR3_M1_DQ_32 C
RSVD2 BB51 DDR_A_D31 RSVD2 BB3 DDR_B_D31
AV36 DDR3_M0_DQ_31 AW53 DDR_A_D30 AV18 DDR3_M1_DQ_31 AW1 DDR_B_D30
<13> DDR_A_ODT0 BA38 DDR3_M0_ODT_0 DDR3_M0_DQ_30 BC52 DDR_A_D29 <14> DDR_B_ODT0 BA16 DDR3_M1_ODT_0 DDR3_M1_DQ_30 BC2 DDR_B_D29
<13> DDR_A_ODT1 DDR3_M0_ODT_1 DDR3_M0_DQ_29 AW51 DDR_A_D28 <14> DDR_B_ODT1 DDR3_M1_ODT_1 DDR3_M1_DQ_29 AW3 DDR_B_D28
AT28 DDR3_M0_DQ_28 AV51 DDR_A_D27 AT26 DDR3_M1_DQ_28 AV3 DDR_B_D27
+DDRA_SOC_VREFCA DDR3_M0_OCAVREF DDR3_M0_DQ_27 +DDRB_SOC_VREFCA DDR3_M1_OCAVREF DDR3_M1_DQ_27
AU28 BC53 DDR_A_D26 AU26 BC1 DDR_B_D26
+DDRA_SOC_VREFDQ DDR3_M0_ODQVREF DDR3_M0_DQ_26 +DDRB_SOC_VREFDQ DDR3_M1_ODQVREF DDR3_M1_DQ_26
AV52 DDR_A_D25 AV2 DDR_B_D25
BA42 DDR3_M0_DQ_25 BD52 DDR_A_D24 BA12 DDR3_M1_DQ_25 BD2 DDR_B_D24
<13> DDR_A_RST# AV28 DDR3_M0_DRAMRSTB DDR3_M0_DQ_24 <14> DDR_B_RST# AV26 DDR3_M1_DRAMRSTB DDR3_M1_DQ_24
<43> DDR_PWROK DDR3_DRAM_PWROK AV42 DDR_A_D23 <9> DDR_CORE_PWROK DDR3_VCCA_PWROK AV12 DDR_B_D23
DDRA_RCOMP BA28 DDR3_M0_DQ_23 AP41 DDR_A_D22 DDRB_RCOMP BA26 DDR3_M1_DQ_23 AP13 DDR_B_D22
DDR3_M0_RCOMPPD DDR3_M0_DQ_22 AV41 DDR_A_D21 DDR3_M1_RCOMPPD DDR3_M1_DQ_22 AV13 DDR_B_D21
<13> DDR_A_DM[0..7] BH30 DDR3_M0_DQ_21 AT44 <14> DDR_B_DM[0..7] BH24 DDR3_M1_DQ_21 AT10
DDR_A_DM7 DDR_A_D20 DDR_B_DM7 DDR_B_D20
DDR_A_DM6 BD32 DDR3_M0_DM_7 DDR3_M0_DQ_20 AP40 DDR_A_D19 DDR_B_DM6 BD22 DDR3_M1_DM_7 DDR3_M1_DQ_20 AP14 DDR_B_D19
DDR_A_DM5 AY36 DDR3_M0_DM_6 DDR3_M0_DQ_19 AT38 DDR_A_D18 DDR_B_DM5 AY18 DDR3_M1_DM_6 DDR3_M1_DQ_19 AT16 DDR_B_D18
DDR_A_DM4 BG41 DDR3_M0_DM_5 DDR3_M0_DQ_18 AP42 DDR_A_D17 DDR_B_DM4 BG13 DDR3_M1_DM_5 DDR3_M1_DQ_18 AP12 DDR_B_D17
DDR_A_DM3 BA53 DDR3_M0_DM_4 DDR3_M0_DQ_17 AT40 DDR_A_D16 DDR_B_DM3 BA1 DDR3_M1_DM_4 DDR3_M1_DQ_17 AT14 DDR_B_D16
DDR_A_DM2 AP44 DDR3_M0_DM_3 DDR3_M0_DQ_16 DDR_B_DM2 AP10 DDR3_M1_DM_3 DDR3_M1_DQ_16
DDR_A_DM1 AT48 DDR3_M0_DM_2 AV45 DDR_A_D15 DDR_B_DM1 AT6 DDR3_M1_DM_2 AV9 DDR_B_D15
DDR_A_DM0 AP52 DDR3_M0_DM_1 DDR3_M0_DQ_15 AY50 DDR_A_D14 DDR_B_DM0 AP2 DDR3_M1_DM_1 DDR3_M1_DQ_15 AY4 DDR_B_D14
DDR3_M0_DM_0 DDR3_M0_DQ_14 AT50 DDR_A_D13 DDR3_M1_DM_0 DDR3_M1_DQ_14 AT4 DDR_B_D13
DDR_A_DQS7 BH32 DDR3_M0_DQ_13 AP47 DDR_A_D12 DDR_B_DQS7 BH22 DDR3_M1_DQ_13 AP7 DDR_B_D12
DDR_A_DQS#7 BG31 DDR3_M0_DQS_7 DDR3_M0_DQ_12 AV50 DDR_A_D11 DDR_B_DQS#7 BG23 DDR3_M1_DQS_7 DDR3_M1_DQ_12 AV4 DDR_B_D11
DDR_A_DQS6 BC30 DDR3_M0_DQSB_7 DDR3_M0_DQ_11 AY48 DDR_A_D10 DDR_B_DQS6 BC24 DDR3_M1_DQSB_7 DDR3_M1_DQ_11 AY6 DDR_B_D10
DDR_A_DQS#6 BC32 DDR3_M0_DQS_6 DDR3_M0_DQ_10 AT47 DDR_A_D9 DDR_B_DQS#6 BC22 DDR3_M1_DQS_6 DDR3_M1_DQ_10 AT7 DDR_B_D9
DDR_A_DQS5 AT32 DDR3_M0_DQSB_6 DDR3_M0_DQ_9 AP48 DDR_A_D8 DDR_B_DQS5 AT22 DDR3_M1_DQSB_6 DDR3_M1_DQ_9 AP6 DDR_B_D8
DDR_A_DQS#5 AT34 DDR3_M0_DQS_5 DDR3_M0_DQ_8 DDR_B_DQS#5 AT20 DDR3_M1_DQS_5 DDR3_M1_DQ_8
DDR_A_DQS4 BH40 DDR3_M0_DQSB_5 AP51 DDR_A_D7 DDR_B_DQS4 BH14 DDR3_M1_DQSB_5 AP3 DDR_B_D7
DDR_A_DQS#4 BG39 DDR3_M0_DQS_4 DDR3_M0_DQ_7 AR53 DDR_A_D6 DDR_B_DQS#4 BG15 DDR3_M1_DQS_4 DDR3_M1_DQ_7 AR1 DDR_B_D6
DDR_A_DQS3 AY52 DDR3_M0_DQSB_4 DDR3_M0_DQ_6 AK52 DDR_A_D5 DDR_B_DQS3 AY2 DDR3_M1_DQSB_4 DDR3_M1_DQ_6 AK2 DDR_B_D5
DDR_A_DQS#3 BA51 DDR3_M0_DQS_3 DDR3_M0_DQ_5 AL53 DDR_A_D4 DDR_B_DQS#3 BA3 DDR3_M1_DQS_3 DDR3_M1_DQ_5 AL1 DDR_B_D4
B DDR_A_DQS2 AT42 DDR3_M0_DQSB_3 DDR3_M0_DQ_4 AR51 DDR_A_D3 DDR_B_DQS2 AT12 DDR3_M1_DQSB_3 DDR3_M1_DQ_4 AR3 DDR_B_D3 B
DDR_A_DQS#2 AT41 DDR3_M0_DQS_2 DDR3_M0_DQ_3 AT52 DDR_A_D2 DDR_B_DQS#2 AT13 DDR3_M1_DQS_2 DDR3_M1_DQ_3 AT2 DDR_B_D2
DDR_A_DQS1 AV47 DDR3_M0_DQSB_2 DDR3_M0_DQ_2 AL51 DDR_A_D1 DDR_B_DQS1 AV7 DDR3_M1_DQSB_2 DDR3_M1_DQ_2 AL3 DDR_B_D1
DDR_A_DQS#1 AV48 DDR3_M0_DQS_1 DDR3_M0_DQ_1 AK51 DDR_A_D0 DDR_B_DQS#1 AV6 DDR3_M1_DQS_1 DDR3_M1_DQ_1 AK3 DDR_B_D0
DDR_A_DQS0 AM52 DDR3_M0_DQSB_1 DDR3_M0_DQ_0 DDR_B_DQS0 AM2 DDR3_M1_DQSB_1 DDR3_M1_DQ_0
DDR_A_DQS#0 AM51 DDR3_M0_DQS_0 DDR_B_DQS#0 AM3 DDR3_M1_DQS_0
DDR3_M0_DQSB_0 1 OF 13 DDR3_M1_DQSB_0
BSW-MCP-EDS_FCBGA1170 2 OF 13
BSW-MCP-EDS_FCBGA1170
close to SOC pin
Close To SOC Pin Close To SOC Pin
182_0402_1% 1 2 R963 DDRA_RCOMP
182_0402_1% 1 2 R964 DDRB_RCOMP
+1.35V_SOC V0.2 modify +DDRA_SOC_VREFCA +1.35V_SOC V0.2 modify +DDRB_SOC_VREFCA
@
1 @ 2 1 2
R980 1 R1064 1
4.7K_0402_1% @ 4.7K_0402_1% @
C1136 @ C1138
EMC@ 1 @ 2 .1U_0402_16V7K 1 2 .1U_0402_16V7K
1 2 DDR_CORE_PWROK R974 2 R979 2
C1159 .1U_0402_16V7K 4.7K_0402_1% 4.7K_0402_1%
ESD request 0211
+1.35V_SOC +DDRA_SOC_VREFDQ +1.35V_SOC +DDRB_SOC_VREFDQ

@
1 @ 2 1 2
USOC1 R965 1 R971 1
QHAX@ 4.7K_0402_1% @ 4.7K_0402_1% @
C1132 @ C1137
A 1 @ 2 1 2 A
.1U_0402_16V7K .1U_0402_16V7K
S IC FH8066501715905 QHAX B1 1.36G FCBGA15 1380 R966 2 R967 2
SA00008GO00 4.7K_0402_1% 4.7K_0402_1%
USOC1
QHAW@
2014/03/19 2015/03/18 Title
S IC FH8066501715905 QHAW B1 1.36G FCBGA15 1380
Issued Date Deciphered Date VLV-M SOC Memory DDR3L
SA00008GO10
5 4 3 2 1
5 4 3 2 1
+1.8VALW
eDP
5
U61
CHV_MCP_EDS 1
USOC1C
P
NC 4 ENBKL
DDI1_ENBKL 2 Y ENBKL <34>
A
G
D NL17SZ07DFT2G_SC70-5 +3VS D
3
M44 SA00004BV00
RSVD15 K44 @ ENBKL 1 @ 2
RSVD12 4.7K_0402_5% R1159
K48 R1142 2 @ 1 0_0402_5%
D50 RSVD14 K47
<25> HDMI_TX2+ C51 DDI0_TXP_0 RSVD13
<25> HDMI_TX2- DDI0_TXN_0 1.35V
T44
MCSI_1_CLKP
MCSI and Camera interface

H49 T45 INVT_PWM_SOC 1 2
<25> HDMI_TX1+ H50 DDI0_TXP_1 MCSI_1_CLKN
1.35V 4.7K_0402_5% R1161
<25> HDMI_TX1- DDI0_TXN_1 Y47
F53 DDI0 MCSI_1_DP_0 Y48
<25> HDMI_TX0+ F52 DDI0_TXP_2 MCSI_1_DN_0 V45
HDMI <25> HDMI_TX0- DDI0_TXN_2 1.35V MCSI_1_DP_1
MCSI_1_DN_1
V47 RP41
G53 V50 +1.8VALW DDI1_ENBKL 8 1
<25> HDMI_CLK+ G52 DDI0_TXP_3 MCSI_1_DP_2 V48 ENVDD 7 2
<25> HDMI_CLK- DDI0_TXN_3 1.35V MCSI_1_DN_2 T41 DDI1_PWM 6 3
MCSI_1_DP_3
5
H47 1.24V T42 U64 5 4
H46 DDI0_AUXP MCSI_1_DN_3 1
1.35V
P
DDI0_AUXN P50 NC 4 INVT_PWM_SOC 100K_0804_8P4R_5%
W51 MCSI_2_CLKP P48 DDI1_PWM 2 Y INVT_PWM_SOC <24>
<25> HDMI_HPD# HV_DDI0_HPD MCSI_2_CLKN A
G
1.8V
Y51 P47 NL17SZ07DFT2G_SC70-5
<25> HDMI_DDCCLK
3
Y52 HV_DDI0_DDC_SCL MCSI_2_DP_0 P45 SA00004BV00
<25> HDMI_DDCDATA HV_DDI0_DDC_SDA 1.8V MCSI_2_DN_0 M48
V52 MCSI_2_DP_1 M47
V51 PANEL0_BKLTEN 1.8V MCSI_2_DN_1
W53 PANEL0_BKLTCTL 1.8V T50 +1.8VALW
1 R968 2 DDI0_RCOMPP F38 PANEL0_VDDEN 1.8V RSVD17 T48
402_0402_1% DDI0_RCOMPN G38 DDI0_PLLOBS_P RSVD16 DP to VGA
DDI0_PLLOBS 1.35V
P44 R1003 1 2 150_0402_1%
MCSI_COMP
1
J51
C <24> EDP_TXP0 H51 DDI1_TXP_0 AB41 C
1.35V R637
<24> EDP_TXN0 DDI1_TXN_0 GP_CAMERASB00 AB45 EC_KBRST# <34>
10K_0402_5%
K51 GP_CAMERASB01 AB44 DGPU_PRSNT#
<24> EDP_TXP1 K52 DDI1_TXP_1 GP_CAMERASB02 AC53 DGPU_PWR_EN1
<24> EDP_TXN1 1.35V DGPU_PWR_EN1 <38>
2
DDI1_TXN_1 DDI1 GP_CAMERASB03 AB51 DGPU_HOLD_RST#_SOC1.8V SOC_DDI2_HPD#
L53 GP_CAMERASB04 AB52 VGA_SELECT1 DGPU_HOLD_RST#_SOC1.8V <31>
L51 DDI1_TXP_2 1.8V GP_CAMERASB05 AA51 VGA_SELECT2
DDI1_TXN_2 1.35V GP_CAMERASB06
1
AB40 VGA_SELECT3 D
M52 GP_CAMERASB07 Y44 GP_CAMERASB08 Q79 2
eDP Panel M51 DDI1_TXP_3
DDI1_TXN_3 1.35V
GP_CAMERASB08 L2N7002LT1G_SOT23-3 G
DDI2_HPD <26>
Y42 GP_CAMERASB09 S
3
M42 GP_CAMERASB09 Y41 TP_INT#
<24> EDP_AUXP DDI1_AUXP GP_CAMERASB10 TP_INT# <31>
K42 1.35V V40
<24> EDP_AUXN DDI1_AUXN GP_CAMERASB11
R51
<31> EDP_HPD# HV_DDI1_HPD 1.8V
DDI1_ENBKL P51
DDI1_PWM P52 PANEL1_BKLTEN 1.8V M7
ENVDD R53 PANEL1_BKLTCTL 1.8V SDMMC1_CLK P6
<24> ENVDD 1 R986 2 DDI1_RCOMPP F47 PANEL1_VDDEN SDMMC1_CMD
DDI1_PLLOBS_P
1.8V
402_0402_1% DDI1_RCOMPN F49 1.35V M6
DDI1_PLLOBS SDMMC1_D0 M4 +1.8VALW
SDMMC1_D1
DGPU_PRSNT#
F40 P9 V0.2 modify
<26> SOC_DDI2_TXP0 G40 DDI2_TXP_0 SDMMC1_D2 P7 +1.8VALW
<26> SOC_DDI2_TXN0 DDI2_TXN_0 1.35V 1.8V SDMMC1
SDMMC1_D3_CD_B
UMA H
T6
J40 MMC1_D4_SD_WE T7 R641 1 210K_0402_5% GP_CAMERASB08
<26> SOC_DDI2_TXP1 DDI2_TXP_1 MMC1_D5
@ DIS L*
1
K40 DDI2 T10 R642 1 @ 210K_0402_5% GP_CAMERASB09 UMA@
<26> SOC_DDI2_TXN1 DDI2_TXN_1 1.35V MMC1_D6 T12 R1046
F42 MMC1_D7 T13 10K_0402_5%
G42 DDI2_TXP_2 MMC1_RCLK P13 R970 1 2 100_0402_1%
DP to CRT DDI2_TXN_2 1.35V SDMMC1_RCOMP
2
D44 DGPU_PRSNT#
B Translater F44 DDI2_TXP_3
1.35V K10
MMC1_RCOMP If unused, terminate 100 ? ±1% resistor near to SoC.
Braswell PDG_0p95 P.200 B
DDI2_TXN_3 SDMMC2_CLK
1
K9 VGA@
D48 SDMMC2_CMD R1045
<26> SOC_DDI2_AUXP DDI2_AUXP
C49 1.35V M12 10K_0402_5%
<26> SOC_DDI2_AUXN DDI2_AUXN SDMMC2_D0 M10
SOC_DDI2_HPD# U51 SDMMC2_D1 K7 G_INT_R <31>
2
HV_DDI2_HPD 1.8V SDMMC2_D2 K6
1.8V SDMMC2
SDMMC2_D3_CD_B EC_LID_OUT# <34>
T51
T52 HV_DDI2_DDC_SCL F2
HV_DDI2_DDC_SDA 1.8V SDMMC3_CLK D2
B53 SDMMC3_CMD K3
RSVD6 1.8V/3.3V SDMMC3_CD_B
A52
E52 RSVD3 NC's J1 VRAM RANK GPIO N16S-GT GPIO
D52 RSVD9 SDMMC3_D0 J3
B50 RSVD8 SDMMC3_D1 H3
RSVD5 1.8V/3.3V SDMMC3_D2 VGA_SELECT2 +1.8VALW VGA_SELECT1 +1.8VALW
B49 G2
E53 RSVD4 SDMMC3_D3
C53 RSVD10 K2
RSVD7
SDMMC3
1.8V SDMMC3_1P8_EN Dual Rank H N16S-GT H
1
A51 L3
VGA GPIO reserve A49 RSVD2 1.8V SDMMC3_PWR_EN_B P12 R992 R1036
G44 RSVD1 1.8V/3.3V SDMMC3_RCOMP 1K_0402_5% 1K_0402_5%
RSVD11 Single Rank L N16V-GM L
1
VGA_SELECT3 DR@ SGT@

+1.8VALW R969
2
80.6_0402_1% VGA_SELECT2 V0.2 modify VGA_SELECT1
H 3 OF 13
1
1
2
R1033 BSW-MCP-EDS_FCBGA1170 R1008 R1037

L 1K_0402_5% 20K_0402_5% 10K_0402_5%
@ @ VGM@
Checklist R0.95 Page 194
2
2
VGA_SELECT3 V0.2 modify RCOMP=80ohm_1% (not exist in ISPD)
2
A A
R1035
20K_0402_5%
@
1

2014/03/19 2015/03/18 Title
Issued Date Deciphered Date VLV-M SOC Display
5 4 3 2 1
5 4 3 2 1
Follow DVR1044_ACER_HSIO Mapping Design Guide_V1p0
D D
USOC1D CHV_MCP_EDS
VGA@ CC17 1 2 .1U_0402_16V7K PEG_HTX_GRX_P0 C24 C31

<15> PEG_HTX_C_GRX_P0 PCIE_TXP0 SATA_TXP0 SATA_PTX_DRX_P0 <32>
VGA@ CC21 1 2 .1U_0402_16V7K PEG_HTX_GRX_N0 B24 B30
<15> PEG_HTX_C_GRX_N0 PEG_GTX_C_HRX_P0 G20 PCIE_TXN0 SATA_TXN0 N28 SATA_PTX_DRX_N0 <32>
<15> PEG_GTX_C_HRX_P0 PCIE_RXP0 SATA_RXP0 SATA_PRX_DTX_P0 <32> HDD
PEG_GTX_C_HRX_N0 J20 M28
dGPU <15> PEG_GTX_C_HRX_N0 PCIE_RXN0 SATA_RXN0 C29 SATA_PRX_DTX_N0 <32>
3.3V SATA_TXP1 SATA_PTX_DRX_P1 <32>
VGA@ CC18 1 2 .1U_0402_16V7K PEG_HTX_GRX_P1 A25 A29
<15> PEG_HTX_C_GRX_P1 PCIE_TXP1 SATA_TXN1 SATA_PTX_DRX_N1 <32>
VGA@ CC19 1 2 .1U_0402_16V7K PEG_HTX_GRX_N1 C25 J28 ODD
<15> PEG_HTX_C_GRX_N1 PEG_GTX_C_HRX_P1 D20 PCIE_TXN1 SATA_RXP1 K28 SATA_PRX_DTX_P1 <32>
<15> PEG_GTX_C_HRX_P1 PEG_GTX_C_HRX_N1 F20 PCIE_RXP1 SATA_RXN1 SATA_PRX_DTX_N1 <32>
<15> PEG_GTX_C_HRX_N1 PCIE_RXN1 AH3 R639 1 @ 2 10K_0402_5%
+1.8VS
Checklist P.24 requset
C1135 1 2 .1U_0402_16V7K PCIE_PTX_DRX_P2 B26 SATA_LEDN AH2
<30> PCIE_PTX_C_DRX_P2 PCIE_TXP2 SATA_GP0
C1000 1 2 .1U_0402_16V7K PCIE_PTX_DRX_N2 C26 AG3
<30> PCIE_PTX_C_DRX_N2 PCIE_PRX_DTX_P2 D22 PCIE_TXN2 PCIe SATA SATA_GP1 AG1 DEVSLP0_SOC TS_INT_R# <31>
WLAN <30> PCIE_PRX_DTX_P2 PCIE_RXP2 1.8V SATA_GP2 T188 @
PCIE_PRX_DTX_N2 F22 1.05V AF3 DEVSLP1_SOC
<30> PCIE_PRX_DTX_N2 PCIE_RXN2 SATA_GP3 T192 @
C1133 1 2 .1U_0402_16V7K PCIE_PTX_DRX_P3 A27 N30 SATA_RCOMPP 2 R972 1
<28> PCIE_PTX_C_DRX_P3 PCIE_TXP3 SATA_OBSP
C1134 1 2 .1U_0402_16V7K PCIE_PTX_DRX_N3 C27 M30 SATA_RCOMPN 402_0402_1%
<28> PCIE_PTX_C_DRX_N3 PCIE_PRX_DTX_P3 G24 PCIE_TXN3 SATA_OBSN
PCIE LAN <28> PCIE_PRX_DTX_P3
PCIE_PRX_DTX_N3 J24 PCIE_RXP3 W3 SOC_SPI_CLK
<28> PCIE_PRX_DTX_N3 PCIE_RXN3 FST_SPI_CLK
C VGA_CLKREQ# AM10 V4 SOC_SPI_CS0# C
<31> VGA_CLKREQ# PCIE_CLKREQ_1# AM12 PCIE_CLKREQ0B FST_SPI_CS0_B V6 SOC_SPI_CS1# T193@
PCIE_CLKREQ1B FST_SPI_CS1_B +1.8VALW
<30> WLAN_CLKREQ#
WLAN_CLKREQ# AK14
PCIE_CLKREQ2B
1.8V FST_SPI_CS2_B
V7
LAN_CLKREQ# AM14 RP40
<28> LAN_CLKREQ# PCIE_CLKREQ3B V2 SOC_SPI_MOSI VGA_CLKREQ# 1 8
A21 FST_SPI_D0 V3 SOC_SPI_MISO PCIE_CLKREQ_1# 2 7
<15> CLK_PEG_VGA C21 CLK_DIFF_P_0 FAST SPI FST_SPI_D1 U1 SOC_SPI_WP# WLAN_CLKREQ# 3 6
dGPU <15> CLK_PEG_VGA# CLK_DIFF_N_0 FST_SPI_D2
C19
CLK_DIFF_P_1
1.8V FST_SPI_D3
U3 SOC_SPI_HOLD# LAN_CLKREQ# 4 5
B20
C18 CLK_DIFF_N_1 AF13 HDA_RST# 10K_0804_8P4R_5%
<30> CLK_PCIE_WLAN CLK_DIFF_P_2 1.05V MF_HDA_RSTB
WLAN B18 AD6 @
<30> CLK_PCIE_WLAN# C17 CLK_DIFF_N_2 MF_HDA_SDI1 AD9 T189
HDA_BIT_CLK
<28> CLK_PCIE_LAN A17 CLK_DIFF_P_3 MF_HDA_CLK AD7 RP55
LAN HDA_SDIN0
<28> CLK_PCIE_LAN#
CLK_DIFF_P_4 C16 CLK_DIFF_N_3 1.8V/ MF_HDA_SDI0 AF12 HDA_SYNC
HDA_SDIN0 <36>
HDA_SYNC 1 8
CLK_DIFF_P_4 1.5V MF_HDA_SYNC HDA_SYNC_AUDIO <36>
1 @ 2 CLK_DIFF_P_4 CLK_DIFF_N_4 B16 AF14 HDA_SDOUT HDA_SDOUT 2 7
CLK_DIFF_N_4 MF_HDA_SDO HDA_SDOUT_AUDIO <36>
R991 402_0402_1% AB9 @ HDA_BIT_CLK 3 6
MF_HDA_DOCKENB T191 HDA_BITCLK_AUDIO <36>
CLK_DIFF_N_4 2 R975 1 PCIE_RCOMPP D26 AB7 HDA_RST# 4 5
PCIE_OBSP MF_HDA_DOCKRSTB HDA_RST_AUDIO# <36>
402_0402_1% PCIE_RCOMPN F26
PCIE_OBSN H4 SOC_SPKR
V14 AUDIO
1.8V SPKR SOC_SPKR <36> 75_0804_8P4R_1%
Y13 SPI1_CLK AK9
Y12 SPI1_CS0_B SPI
GP_SSP_2_CLK AK10
V13 SPI1_CS1_B GP_SSP_2_FS AK12
SPI1_MISO 1.8V 1.8V GP_SSP_2_TXD
V12 AK13
SPI1_MOSI GP_SSP_2_RXD
4 OF 13
B B
Checklist suggest PU 100K
Follow VC(V0.1)
+BIOS_SPI
+BIOS_SPI +1.8VALW
R999 1 2 3.3K_0402_5% SPI_CS0#
R998 1 @ 2 0_0402_5%
R1001 1 2 20K_0402_5% SPI_WP#
C1013 2 1 .1U_0402_16V7K
R1000 1 2 20K_0402_5% SPI_HOLD#
From CPU
SPI ROMU56( 8MByte ) 1.8V
SOC_SPI_CS0# 1 EMC@ 2 SPI_CS0#
R2581 33_0402_5%
SOC_SPI_WP# 1 EMC@ 2 SPI_WP# +BIOS_SPI
R2580 10_0402_5% SPI_CS0# 1 8
SPI_MISO 2 CS# VCC 7 SPI_HOLD#
RP37 SPI_WP# 3 DO(IO1) HOLD#(IO3) 6 SPI_CLK
SOC_SPI_HOLD# 4 5 SPI_HOLD# 4 WP#(IO2) CLK 5 SPI_MOSI
SOC_SPI_MOSI 3 6 SPI_MOSI GND DI(IO0)
SOC_SPI_MISO 2 7 SPI_MISO W25Q64DWSSIG_SO8
SOC_SPI_CLK 1 8 SPI_CLK U56 change to SA00006ZV10 for Quad-I/O
A 10_0804_8P4R_5% A
EMC@
Reserve for EMI(Near SPI ROM)

SPI_CLK 1 2 2 1
@EMC@ R1002 @EMC@ C1014 Security Classification Compal Secret Data Compal Electronics, Inc.
33_0402_5% 10P_0402_50V8J 2014/03/19 2015/03/18 Title
Issued Date Deciphered Date VLV-M SOC SATA/PCI-E/HDA
5 4 3 2 1
5 4 3 2 1
USOC1E CHV_MCP_EDS
XTAL_19.2M_IN1 2 XTAL_19.2M_OUT
R1004 200K_0402_5%
XTAL_19.2M_IN P24
XTAL_19.2M_OUT M22 OSCIN C11
OSCOUT 1.05V RSVD3
Y7 B10
J26 RSVD2 F12
N26 RSVD13 RSVD9 F10
V0.2 modify RSVD17 RSVD8
15P_0402_50V8J
1 3 ICLK_ICOMP P20
1 3 ICLK_RCOMP N20 ICLKICOMP iCLK RESERVED D12
ICLKRCOMP RSVD5
1
1
C1023 P26 E8
RSVD18 RSVD7
C1005
K26 C7
15P_0402_50V8J M26 RSVD14 RSVD4 D6
2
2
2 4 AH45 RSVD16 RSVD6
D GND GND RSVD1 J12 D
A9 RSVD11 F7
PLTFM CLK's
C9 MF_PLT_CLK0 RSVD10 J14
B8 MF_PLT_CLK1 RSVD12 L13
19.2MHZ_10PF_7M19200019 B7 MF_PLT_CLK2 1.8V RSVD15
B5 MF_PLT_CLK3 AK6
B4 MF_PLT_CLK4 I2C0_SCL AH7
Change P/N to SJ10000N700 MF_PLT_CLK5 I2C0_SDA
19.2MHz_12pF AF6
AM40 I2C1_SCL AH6
AM41 GPIO_DFX0 I2C1_SDA
GPIO_DFX
AM44 GPIO_DFX1 AF9 SOC_I2C2_CLK
R984 1 2 2.49K_0402_1% ICLK_ICOMP AM45 GPIO_DFX2 I2C2_SCL AF7 SOC_I2C2_DATA
R985 1 2 49.9_0402_1% ICLK_RCOMP AM47 GPIO_DFX3 I2C I2C2_SDA
SOC_GPIO_DFX5 AK48 GPIO_DFX4 1.8V 1.8V AE4
SOC_GPIO_DFX6 AM48 GPIO_DFX5 I2C3_SCL AD2
49.9_1% for RCOMP GPIO_DFX6 I2C3_SDA
2.49K_1% for ICOMP AK41
AK42 GPIO_DFX7 AC1
GPIO_DFX8 I2C4_SCL AD3
DDI0_ENABLE AD51 I2C4_SDA
DDI1_ENABLE AD52 GPIO_SUS0 AB2 SOC_I2C5_CLK
+1.8VALW SOC_GPIO_SUS2 AH50 GPIO_SUS1 I2C5_SCL AC3 SOC_I2C5_DATA
R1175 V1.0 modify GPIO_SUS2 I2C5_SDA
GPIO_SUS
4.7K_0402_5% AH48
1 2 DDI0_ENABLE R959 SOC_GPIO_SUS4 AH51 GPIO_SUS3 AA1
1 2 DDI1_ENABLE SOC_GPIO_SUS5 AH52 GPIO_SUS4 1.8V I2C6_SCL AB3
0_0402_5%
R1176 EC_SCI# 1 @ 2 SOC_GPIO_SUS6 AG51 GPIO_SUS5 I2C6_SDA
<34> EC_SCI# EC_SMI# AG53 GPIO_SUS6 AA3 I2C_NFC_SCL
4.7K_0402_5% T213@
<34> EC_SMI# SOC_GPIO_SUS9 AF52 GPIO_SUS7 I2C_NFC_SCL Y2 I2C_NFC_SDA +1.8VALW
T214@
SOC_GPIO_SUS8 AF51 SEC_GPIO_SUS9 I2C_NFC_SDA
V0.2 modify SEC_GPIO_SUS8
AE51 AM6 PCU_SMB_CLK R1155 2 @ 1 1K_0402_5%
AC51 SEC_GPIO_SUS10 SMBUS
MF_SMB_CLK AM7 PCU_SMB_DATA R1180 2 @ 1 1K_0402_5%
GPIO_RCOMP AH40 SEC_GPIO_SUS11 MF_SMB_DATA AM9 PCU_SMB_ALERT# R1181 2 @ 1 1K_0402_5%
C +1.8VALW Y3 GPIO0_RCOMP 1.8V MF_SMB_ALERTB C
GPIO_ALERT
1
R995 V0.2 modify
R1016 1 @ 2 20K_0402_5% SOC_GPIO_DFX5 100_0402_1% 5 OF 13
R1022 1 @ 2 20K_0402_5% SOC_GPIO_DFX6 BSW-MCP-EDS_FCBGA1170
2
SOC_GPIO_SUS4: For Touch Screen
BIOS Boot Selection Spec & CRB is reserve. VC pop (v0.1)
0 = LPC +1.8VALW
1 = SPI (internal PU) SOC_GPIO_SUS8: 1K_0402_5% 2 @ 1 R1143 SOC_I2C2_DATA
ICLK, USB 2.0, 1K_0402_5% 2 @ 1 R1144 SOC_I2C2_CLK
+1.8VALW DDI SFR supply
select : +1.8VALW +TS_PWR
R977 1 2 100K_0402_5% SOC_GPIO_SUS4
0 = Supply is 1.25V
1 = Supply is 1.35V +TS_PWR
R981 1 2 4.7K_0402_1% SOC_GPIO_SUS6 2 TSI@ 1 I2C2_SCL_PNL
5
V1.0 modify 2.2K_0402_5% R1147
SOC_GPIO_SUS8 1 2 2 TSI@ 1 I2C2_SDA_PNL
G
G
R1040 1 @ 2 10K_0402_5% SOC_GPIO_SUS9 R1048 2.2K_0402_5% R1150 SOC_I2C2_CLK 4 3 SOC_I2C2_CLK_L 3 4 I2C2_SCL_PNL
I2C2_SCL_PNL <24>
S
S
D
V0.2 modify 4.7K_0402_5% TSI@Q2512A TSI@ Q2511A
2
+3VALW PJT138KA 2N SOT363-6 DMN63D8LDW-7_SOT363-6
SOC_GPIO_SUS6:
V0.2 modify SB000016K00 SB000013K00
G
G
Halt Boot Strap: 2.2K_0402_5% 2 TSI@ 1R2566 SOC_I2C2_CLK_L SOC_I2C2_DATA 1 6 SOC_I2C2_DATA_L 6 1 I2C2_SDA_PNL
I2C2_SDA_PNL <24>
1= Normal Operation
S
2.2K_0402_5% 2 TSI@ 1R2565
D
SOC_I2C2_DATA_L TSI@Q2512B TSI@ Q2511B
PJT138KA 2N SOT363-6 DMN63D8LDW-7_SOT363-6
SB000016K00 SB000013K00
V0.2 modify
For Touch Pad
B B
Spec & CRB is reserve. VC pop (v0.1)

SOC_GPIO_SUS5: +1.8VALW
Security Flash Descriptors
BIOS/EFI Top Swap 0 = Override 1K_0402_5% 2 @ 1 R1153 SOC_I2C5_DATA
1 = Normal Operation (Internal PU) 1K_0402_5% 2 @ 1 R1152 SOC_I2C5_CLK
+1.8VALW +3V_PTP
+1.8VALW
+1.8VALW +3V_PTP
1
5
1
2 1 I2C5_SCL_TP
G
G
R1006 EC programing : 2.2K_0402_5% R1156 SOC_I2C5_CLK 4 3 SOC_I2C5_CLK_L 3 4 I2C5_SCL_TP
I2C5_SCL_TP <35>
S
2 1
D
10K_0402_5% R978 "High"for Flash BIOS I2C5_SDA_TP Q2509A Q2508A
2
10K_0402_5% 2.2K_0402_5% R1157 For BOM PJT138KA 2N SOT363-6 DMN63D8LDW-7_SOT363-6
2
SOC_GPIO_SUS2 @ V1.0 modify SB000016K00 SB000013K00
G
G
2
SOC_GPIO_SUS5 1 2 +3VALW SOC_I2C5_DATA 1 6 SOC_I2C5_DATA_L 6 1 I2C5_SDA_TP

I2C5_SDA_TP <35>
1
S
S
D
R1051 Q2509B Q2508B
1
@ D 0_0402_5% 2.2K_0402_5%2 1R2564 SOC_I2C5_CLK_L PJT138KA 2N SOT363-6 DMN63D8LDW-7_SOT363-6

R1011 2 2.2K_0402_5%2 1R2563 SOC_I2C5_DATA_L SB000016K00 SB000013K00
TXE_DBG <34>
10K_0402_5% G
S Q62 V0.2 modify
2
L2N7002LT1G_SOT23-3
+3VALW +1.8VALW +3VS
SOC_GPIO_SUS2: Top Swap( A16 Override ) 2.2K_0402_5%2 1R2562 PCU_SMB_CLK_L

2.2K_0402_5%2 1R2561 PCU_SMB_DATA_L
0 = Change Boot Loader address
5
1 = Normal Operation V0.2 modify
G
G
+3VS PCU_SMB_CLK 4 3 PCU_SMB_CLK_L 3 4
Reference checklist 0.92 P.37 DDR_SMB_CK <13,14>
S
S
D
Q2502A Q2507A
2
A 2.2K_0402_5%2 1R2570 DDR_SMB_CK PJT138KA 2N SOT363-6 DMN63D8LDW-7_SOT363-6 A
2.2K_0402_5%2 1R2569 DDR_SMB_DA SB000016K00 SB000013K00
G
G
+RTCBATT +CHGRTC W=20mils PCU_SMB_DATA 1 6 PCU_SMB_DATA_L 6 1
DDR_SMB_DA <13,14>
S
S
D
D22 Q2502B Q2507B
2 +RTCVCC PJT138KA 2N SOT363-6 DMN63D8LDW-7_SOT363-6 DDR<13,14>
W=10mil SB000016K00 SB000013K00 V0.2 modify
1
W=20mils Security Classification Compal Secret Data Compal Electronics, Inc.
3
2014/03/19 2015/03/18 Title
BAS40-04_SOT23-3
1 Issued Date Deciphered Date VLV-M SOC CLK/PMU/SPI
C151
.1U_0402_16V7K Size Document Number
WWW.AliSaler.Com
2 Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5 4 3 2 1
5 4 3 2 1
USOC1F CHV_MCP_EDS
+1.8VALW
+3VS
PLT_RST# Buffer
B48 USB_OTG_ID @
B32 USB_OTG_ID C42 T190
<33> PCH_USB3_TX0_P USB3_TXP0 USB_DP0 USB20_P0 <33>
1
C32 B42 USB3.0 Port
<33> PCH_USB3_TX0_N F28 USB3_TXN0 USB_DN0 USB20_N0 <33>
USB3 Port 0 <33> PCH_USB3_RX0_P R2024 @
D28 USB3_RXP0 C43 1K_0402_5% R982
<33> PCH_USB3_RX0_N USB3_RXN0 USB_DP1 USB20_P1 <33>
5
B44 USB3.0 Port U53 4.7K_0402_5%
A33 USB_DN1 USB20_N1 <33> 1
1.8V 3.3V
P
<33> PCH_USB3_TX1_P
2
C33 USB3_TXP1 C41 NC 4
<33> PCH_USB3_TX1_N F30 USB3_TXN1 USB_DP2 A41 USB20_P2 <24> PMC_PLTRST# 2 Y PLT_RST_BUF# <15,28,30,34,35>
USB3 Port 1 <33> PCH_USB3_RX1_P USB3_RXP1 USB_DN2 USB20_N2 <24> Camera A
G
D30
<33> PCH_USB3_RX1_N USB3_RXN1 C45 NL17SZ07DFT2G_SC70-5
USB20_P3 <24>
3
C34 USB_DP3 A45 +5VALW SA00004BV00
D +1.8VALW B34 USB3_TXP2 USB_DN3 USB20_N3 <24> Touch screen D
G32 USB3_TXN2 B40
USB3_RXP2 1.05V 1.8V USB_DP4 USB20_P4 <31>
2
J32 C40 +1.8VALW
USB2.0 Hub
USB3.0
USB2.0
USB3_RXN2 USB_DN4 USB20_N4 <31>
1
@ R2057 RP39
TO DGPU R1151 C35 P16 USB_OC1# 40.2K_0402_1% PMC_PCIE_WAKE# 1 8
A35 USB3_TXP3 USB_OC1_B P14 USB_OC1# <33> 2 7
10K_0402_5% USB_OC0# @ PMC_BATLOW#
G34 USB3_TXN3 USB_OC0_B USB_OC0# <33> USB_OC0# 3 6
1
J34 USB3_RXP3 B46 USB2_OBSP USB_OC1# 4 5
2
GPU_EVENT# USB3_RXN3 RSVD3 B47 USB_VBUSSNS
<15> GPU_EVENT# 2 USB_VBUSSNS
R987 1 USB3_RCOMPP D34 A48 USB2_RCOMP 2 R988 1 10K_0804_8P4R_5%
USB3_OBSP USB_RCOMP
1
402_0402_1% USB3_RCOMPN F34 113_0402_1% 1 2 PMC_RSTBTN# 1 2
+1.8VALW USB3_OBSN M36 R1032 R2047 R2025 1K_0402_5%
C37 USB_HSIC_0_STROBE N36 0_0402_5% @
Sch. chelist PU 1k 1 2
+3V_SOC A37 RSVD4 USB_HSIC_0_DATA 10K_0402_1% R485 100K_0402_5%
HSIC
RSVD1 1.24V
1
GC6@ F36 K38 Change 45.3_1% for Intel request @EMC@
2
RSVD7 USB_HSIC_1_STROBE
RESERVED
R1009 D36 M38 PMC_CORE_PWROK C1007 1 2 0.047U_0402_25V7K
GC6@ M34 RSVD6 USB_HSIC_1_DATA N38 HSIC_RCOMP 1 2
10K_0402_5% RSVD11 USB_HSIC_RCOMP
5
U2515 M32 R1012 45.3_0402_1% EMC@

1 RSVD10 AD10 DBG_UART_TXD DDR_CORE_PWROK C1158 1 2 .1U_0402_16V7K
P
2
NC 4 GC6_FB_EN_R C38 UART1_TXD AD12 DBG_UART_RXD
GC6_FB_EN 2 Y B38 RSVD5 UART1_RXD AD13 DBG_UART_CTS# T209@ @EMC@
<15> GC6_FB_EN A RSVD2 UART1_CTS_B
G
UART
G36 AD14 DBG_UART_RTS# T211@ PMC_PLTRST# C1006 1 2 22P_0402_50V8J
NL17SZ07DFT2G_SC70-5 J36 RSVD8 UART1_RTS_B USB2_OBSP
3
SA00004BV00 RSVD9 1.8V Y6 GPU_EVENT#

N34 UART2_TXD Y7 EC_RSMRST# R990 1 2 100K_0402_5%
V1.0 modify RSVD12 UART2_RXD
2
P34 V9 GC6_FB_EN_R @
RSVD13 UART2_CTS_B V10 DGPU_PWR_EN2 R1015 @EMC@
UART2_RTS_B DGPU_PWR_EN2 <38>
49.9_0402_1% C1155 1 2 22P_0402_50V8J
6 OF 13
1
Refer PDG 0.92 Page 268 BSW-MCP-EDS_FCBGA1170 V0.2 modify
C +1.8VALW LPC1P8V@ C
RP52 SOC_SERIRQ R1021 2 1 0_0402_5% EC_SERIRQ
4 5 CHV_MCP_EDS EC_SERIRQ <34,35>
SOC_H_TDI USOC1G
3 6 SOC_H_TDO PMC_SLP_S3# R1025 2 @ 1 0_0402_5% EC_SLP_S3#
2 7 SOC_H_TMS
1 8 SOC_H_PREQ_BUF# SOC_H_TCK AF42 M18 ILB_RTC_X1 R1042 1 @ 2 0_0402_5%
TCK BRTCX1_PAD EC_SLP_S3#_1P8 <34>
JTAG/ITP
SOC_H_TDI AD47 K18 ILB_RTC_X2
SOC_H_TDO AF40 TDI 1.8V BRTCX2_PAD F16 ILB_RTC_EXTPAD 1 2
51_0804_8P4R_5%
TDO BVCCRTC_EXTPAD V1.0 modify
SOC_H_TMS AD48 C1008 .1U_0402_16V7K @ C1016 +1.8VALW +3VALW_EC @ C1017
R989 1 2 51_0402_5% SOC_H_TCK SOC_H_TRST# AB48 TMS D18 RTC_RST# .1U_0402_16V7K .1U_0402_16V7K
RTC
R1026 1 2 51_0402_5% SOC_H_TRST# TRST_B SRTCRST_B G16 PMC_CORE_PWROK 1 2 1 2
COREPWROK F18 EC_RSMRST#
3.3V RSMRST_B EC_RSMRST# <34> V1.0 modify +1.8VALW
@T208 SOC_H_PRDY# AD45 J16 RTC_TEST# U71 LPC3V@
SOC_H_PREQ_BUF#AF41 CX_PRDY_B RTEST_B G18 2 1 1 6
V0.2 modify CX_PREQ_B RSVD_VSS VCCA VCCB
M13 R1052 10K_0402_5% 2 5
RSVD5 AE3 SOC_SERIRQ 3 GND EO 4 EC_SERIRQ
SUSPWRDNACK PMC_SUSPWRDNACK <34> A4 B4
0_0402_5%1 @ 2 R1014 LPC_CLK_0 P2 D14 PMC_SUS_STAT# T207@
<34> LPC_CLK_EC MF_LPC_CLKOUT0 SUS_STAT_B
0_0402_5%1 @ 2 R1017 LPC_CLK_1 R3 C15 PMC_SUSCLK T212@ G2129TL1U_SC70-6
<35> LPC_CLK_TPM T3 MF_LPC_CLKOUT1 PMU_SUSCLK C12 EC_SLP_S4#
<35> LPC_CLKRUN# P3 LPC_CLKRUNB PMU_SLP_S4_B B14 PMC_SLP_S3# EC_SLP_S4# <34>
<34,35> LPC_FRAME# LPC_FRAMEB PMU_SLP_S3_B
PMU
AF2 PMC_RSTBTN# +1.8VALW +3V_SOC
LPC
M3 PMU_RESETBUTTON_B F14 PMC_PLTRST#
<34,35> LPC_AD0 MF_LPC_AD0 PMU_PLTRST_B
<34,35> LPC_AD1
M2
MF_LPC_AD1 3.3V/ 1.8V PMU_BATLOW_B C14 PMC_BATLOW#
N3 1.8V C13 PMC_ACIN
<34,35> LPC_AD2 MF_LPC_AD2 PMU_AC_PRESENT
2
N1 A13 PMC_SLP_S0# T195@
<34,35> LPC_AD3 MF_LPC_AD3 PMU_SLP_S0IX_B B12 R1034 R1038
2 R1013 LPC_RCOMP T4 PMU_SLP_LAN_B N16 PMC_PCIE_WAKE#
LPC-25MHz 100_0402_1%1
LPC_HVT_RCOMP PMU_WAKE_B
10K_0402_5% 10K_0402_5%
2
G
SOC_SERIRQ T2 M16 PBTN_OUT# @ @
ILB_SERIRQ PMU_PWRBTN_B P18 PBTN_OUT# <34>
1
ILB_RTC_X1 H5 PMU_WAKE_LAN_B PMC_SLP_S3# 3 1
PWM
ILB_RTC_X2 H7 PWM0 AD42 EC_SLP_S3# <34>
D
VR_SVID_CLK <47,48>
SVID
1 2 PWM1 SVID0_CLK AD41 @ Q83
B 1.8V SVID0_DATA AD40 VR_SVID_DATA <47,48> B
R994 V1.0 modify SVID0_ALERT_B VR_SVID_ALERT# <47,48>
MESS138W-G_SOT323-3
10M_0402_5% V1.0 modify
P28 Voltage sense
32.768KHZ_12.5PF_Q13FC135000040 R1023 P30 RSVD6 AG32 VCC0_SENSE R1073 1 @ 2 0_0402_5%
RSVD7 CORE_VCC0_SENSE VCC_SENSE <47> For UART
Reserved
Y8 1 2 20K_0402_1% AF50 AJ32 VSS0_SENSE R1074 1 @ 2 0_0402_5%

RSVD4 CORE_VSS0_SENSE
V0.2 modify +1.8VALW
1 2 AF48
AF44 RSVD3 CORE_VCC1_SENSE
AD29
AF27
VCC1_SENSE
VSS1_SENSE
R1075 1
R1076 1
@
@
2
2
0_0402_5%
0_0402_5%
debug +1.8VALW
RSVD1 CORE_VSS1_SENSE VSS_SENSE <47>

1
C1009 C1010 AF45 AD24 VGG_SENSEP DBG_UART_TXD R1189 1 2 1K_0402_5%

AD50 RSVD2 DDI_VGG_SENSE AD22 VGG_SENSEN VGG_SENSEP <48> DBG_UART_RXD R1188 1 2 1K_0402_5%
<15,34> H_PROCHOT# PROCHOT_B 1.8V UNCORE_VSS_SENSE2 VGG_SENSEN <48>
15P_0402_50V8J 15P_0402_50V8J Internal PD 2K AC27 VNN_SENSE
VNN_SENSE <44>
2
UNCORE_VSS_SENSE1 +3VS_WLAN
2
@EMC@ 7 OF 13 V1.0 modify
Y8 change P/N to SJ10000LV00 for ESR<50k ohm C1002 For BOM UART_TXD_NGFF R1183 2 @ 1 2.2K_0402_5%
10P_0402_50V8J BSW-MCP-EDS_FCBGA1170 +SOC_VCC UART_RXD_NGFFR1160 2 @ 1 2.2K_0402_5%
1
+3VS_WLAN
VCC_SENSE R1077 1 2 100_0402_1%
+RTCVCC ESD request 0926 VSS_SENSE R1078 1 2 100_0402_1% +3V_UART_LS 2 @ 1
R2576
R996 +1.8VALW @ 200K_0402_5%
8
20K_0402_1% U2509
RTC_TEST# 2 1 +1.35V_SOC
EN
+SOC_VGG
1
RTC_RST# 2 1 +3VALW 2 7
VREF1 VREF2
2 1 R997 20K_0402_1% R993
10K_0402_5% VGG_SENSEP R1019 1 2 100_0402_1% DBG_UART_TXD 3 6
SCL1 SCL2 UART_TXD_NGFF <30>
5
C1011 C1012 U55 VGG_SENSEN R1020 1 2 100_0402_1%

1U_0402_6.3V6K 1U_0402_6.3V6K 3.3V 1 1.35V DBG_UART_RXD 4 5
P
UART_RXD_NGFF <30>
2
1 2 NC 4 SDA1 SDA2
GND
Y DDR_CORE_PWROK <5>
PMC_CORE_PWROK 2
<34> PMC_CORE_PWROK A
G
NL17SZ07DFT2G_SC70-5 +1.05VALW
3
1
A SA00004BV00 A
RTC_TEST# 1 @ 2 CLR_CMOS# CLR_CMOS# <34>
0_0402_5% R1088 VNN_SENSE R1031 1 2 100_0402_1% V0.2 modify G3401A91G ADFN3X2 8P
RTC_RST# 2 @ 1 SA00006YA00
1
0_0402_5% R1089 R2583 1 @ 2 0_0402_5%

Clear CMOS R2584 1 @ 2 0_0402_5%
1
@ Close to RAM door R983 2 1 2.2K_0402_5% +1.8VALW

@ V1.0 modify JCMOS1 D40
J9 0_0603_5% RB751V-40_SOD323-2
2
0_0603_5% PMC_ACIN 2 1 2014/03/19 2015/03/18 Title

ACIN <34,41> Issued Date Deciphered Date VLV-M SOC USB/LPC/SMBus
2
V0.2 modify DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
5 4 3 2 1
5 4 3 2 1
D D
USOC1H CHV_MCP_EDS
+SOC_VCC 3.5A (can merge with V1P05A) +1.05VALW

6400mA AA18
AF36 UNCORE_VNN_S41 AA19
AG33 CORE_VCC1_S0IX3 UNCORE_VNN_S42 AA21
CORE_VCC1_S0IX9 UNCORE_VNN_S45 V0.2 modify
AG38 AA25
AJ33 CORE_VCC1_S0IX10 UNCORE_VNN_S46 AC18
CORE_VCC1_S0IX16 UNCORE_VNN_S49 AC22
AF30 UNCORE_VNN_S410 AC24
AG27 CORE_VCC1_S0IX2 UNCORE_VNN_S411 AC25
AG29 CORE_VCC1_S0IX4 UNCORE_VNN_S412 AD25
AG30 CORE_VCC1_S0IX5 UNCORE_VNN_S413 AD27 +1.05VALW
AJ27 CORE_VCC1_S0IX6 UNCORE_VNN_S414
AJ29 CORE_VCC1_S0IX11 AA30
CORE_VCC1_S0IX12 RSVD1
1900mA Confirmd with Intel , these pin use +1.05V power
AJ30 V33
C AF29 CORE_VCC1_S0IX13 UNCORE_V1P15_S0IX6 AA32 C
+SOC_VGG CORE_VCC1_S0IX1 UNCORE_V1P15_S0IX1 AA33 C1042 1 2 1U_0402_6.3V6K
UNCORE_V1P15_S0IX2 AA35 1 2
11A UNCORE_V1P15_S0IX3
C1043 1U_0402_6.3V6K UNCORE_V1P15_S0ix -
AD16 AA36 C1044 1 2 1U_0402_6.3V6K Back side : 1uF *3
AD18 DDI_VGG_S0IX1 UNCORE_V1P15_S0IX4 AC32 C1050 1 2 1U_0402_6.3V6K
DDI_VGG_S0IX2 UNCORE_V1P15_S0IX5 Package edge : 1uF *2
AD19 Y30 C1049 1 2 1U_0402_6.3V6K
AF16 DDI_VGG_S0IX3 UNCORE_V1P15_S0IX7 Y32
AF18 DDI_VGG_S0IX4 UNCORE_V1P15_S0IX8 Y33
AF19 DDI_VGG_S0IX5 UNCORE_V1P15_S0IX9 Y35 R1178 1 @ 2 0_0805_5%
DDI_VGG_S0IX6 UNCORE_V1P15_S0IX10 +1.05VALW
AF21
AF22 DDI_VGG_S0IX7 V19 +1.05VALW_ICLK_GND_OFF C1059 1 2 1U_0402_6.3V6K
iCLK
AJ19 DDI_VGG_S0IX8 ICLK_GND_OFF2 V18 1 2 1U_0402_6.3V6K
DDI_VGG_S0IX15 ICLK_GND_OFF1
@ C1109 ICLK_GND_OFF - Back side : 1uF *1
AG16
AG18 DDI_VGG_S0IX9 AM21
DDI_VGG_S0IX10 DDR_V1P05A_G31 +1.05VALW
AG19 AM33
AG21 DDI_VGG_S0IX11 DDR_V1P05A_G34 AM22 1 2 22U_0603_6.3V6M
C1080 1900mA
DDR
+1.15VALW AG22 DDI_VGG_S0IX12 DDR_V1P05A_G32 AN22 1 2 22U_0603_6.3V6M
DDI_VGG_S0IX13 DDR_V1P05A_G35
C1054 DDR_V1P05A_G3 - Back side : 1uF *1
700mA AG24 AN32 C1053 1 2 1U_0402_6.3V6K Package edge : 22uF *2
AJ21 DDI_VGG_S0IX14 DDR_V1P05A_G36 AM32
AJ22 DDI_VGG_S0IX16 DDR_V1P05A_G33
AJ24 DDI_VGG_S0IX17 V22 1 2 1U_0402_6.3V6K
C1055 PCIE_V1P05A_G3 - Back side : 1uF *1
PCIe
1 2 AK24 DDI_VGG_S0IX18 PCIE_V1P05A_G31 V24
CORE_V1P15_S0ix - C1028 1U_0402_6.3V6K
DDI_VGG_S0IX19 PCIE_V1P05A_G32
Back side : 1uF *4 C1029 1 2 1U_0402_6.3V6K
Package edge : 1uF *2 C1030 1 2 1U_0402_6.3V6K AK30
1 2 AK35 CORE_V1P15_S0IX1 U24 1 2 1U_0402_6.3V6K
C1031 1U_0402_6.3V6K C1056 SATA_V1P05A_G3 - Back side : 1uF *1
SATA
C1032 1 2 1U_0402_6.3V6K AK36 CORE_V1P15_S0IX2 SATA_V1P05A_G32 U22
C1033 1 2 1U_0402_6.3V6K AM29 CORE_V1P15_S0IX3 SATA_V1P05A_G31
CORE_V1P15_S0IX4 1 2 1U_0402_6.3V6K
C1057 USB3_V1P05A_G3 - Back side : 1uF *1
V27
USB
AK33 USB3_V1P05A_G32 U27 C1089 1 2 1U_0402_6.3V6K
AJ35 FUSE_V1P15_S0IX2 USB3_V1P05A_G31 V29 1 2 1U_0402_6.3V6K
FUSE_V1P15_S0IX1 USBSSIC_V1P05A_G3
C1090 USBSSIC_V1P05A_G3 - Back side : 1uF *1
Package edge : 1uF *1
FUSE
B AM19 N18 B
1 2 1U_0402_6.3V6K AK21 DDI_V1P15_S0IX2 FUSE3_V1P05A_G5 U19 1 2 1U_0402_6.3V6K
DDI_V1P15_S0ix - C1034
DDI_V1P15_S0IX1 FUSE_V1P05A_G3
C1103
Back side : 1uF *1 C1035 1 2 1U_0402_6.3V6K FUSE_V1P05A_G5 - Package edge : 1uF *1
Package edge : 1uF *2 8 OF 13 C1104 1 2 1U_0402_6.3V6K
C1105 1 2 1U_0402_6.3V6K
BSW-MCP-EDS_FCBGA1170 FUSE_V1P05A_G3 - Back side : 1uF *2
A A

2014/03/19 2015/03/18 Title
Issued Date Deciphered Date VLV-M SOC Power
5 4 3 2 1
5 4 3 2 1
(pin_AN27)DDR_VDDQ_G_S4 -
Back side : 1uF *1
Package edge : 22uF *1
+1.35V_SOC
+1.24VALW_ICLK +1.24VALW
R1158 1 @ 2 0_0805_5% +1.35V_DDRSFR_VDDQ R1179
1 0_0805_5%
C1075 1 2 22U_0603_6.3V6M 1 @ 2
@ C1107 C1051 1 2 1U_0402_6.3V6K +1.24VALW
1U_0402_6.3V6K
2
550mA 1 1 V1.0 modify
C1060 @ C1110
+1.35V_SOC USOC1I CHV_MCP_EDS 1U_0402_6.3V6K 1U_0402_6.3V6K
2 2
D R1177 1 @ 2 0_0805_5% +1.35V_DDR_VDDQ D
1 AN27 V36 V1.0 modify C1058 1 2 1U_0402_6.3V6K DDI_VDDQ_G3 - Back side : 1uF *1
1 2 22U_0603_6.3V6M AM25 DDRSFR_VDDQ_G_S4 DDI_VDDQ_G31 Y36
C1079
DDR_VDDQ_G_S42 DDI_VDDQ_G32
@ ICLK_VSFR_G3 - Back side : 1uF *1
@ C1108 C1052 1 2 1U_0402_6.3V6K C1085 1 2 1U_0402_6.3V6K
1U_0402_6.3V6K BE1 T40 +1.24V_SOC @ MIPI_V1P24A_G3 - Back side : 1uF *1
2 BE53 DDR_VDDQ_G_S416 MIPI_V1P2A_G32 P40 C1086 1 2 1U_0402_6.3V6K
DDR_VDDQ_G_S419 MIPI_V1P2A_G31 Package edge : 1uF *1
BJ2 +1.24VALW_USBVDDQ +1.24VALW
BJ3 DDR_VDDQ_G_S426 Y27 +1.24VALW_ICLK
(pin_AM25)DDRSFR_VDDQ_G_S4 - DDR_VDDQ_G_S427 ICLK_VSFR_G32
+1.35V +1.35V_SOC Back side : 1uF *1 BJ49 Y25
BJ5 DDR_VDDQ_G_S428 ICLK_VSFR_G31 R1209 1 @ 2 0_0805_5%
Package edge : 22uF *1 DDR_VDDQ_G_S429
@EMC@ L61 BH50 P38
2 1 BH5 DDR_VDDQ_G_S425 CORE_VSFR_G35 V30 1 2 1U_0402_6.3V6K
DDR_VDDQ_G_S424 CORE_VSFR_G36
C1047 1 1 V1.0 modify
DDR
HCB2012KF-121T50_2P BH49 AC30 C1048 1 2 1U_0402_6.3V6K CORE_VSFR_G3 - Back side : 1uF *2
BH4 DDR_VDDQ_G_S423 PCIE_V1P05A_G31 C1081 @ C1111
@EMC@ L62 BE3 DDR_VDDQ_G_S422 1U_0402_6.3V6K 1U_0402_6.3V6K
2 1 BG51 DDR_VDDQ_G_S417 AF35 1 2 1U_0402_6.3V6K 2 2
C1046 CORE_VSFR_G3 - Back side : 1uF *1
HCB2012KF-121T50_2P BG3 AD35
BJ51 DDR_VDDQ_G_S420 CORE_VSFR_G32 AD38
USB_VDDQ_G3 -
@EMC@ L63 BJ52 AC36 V1.0 modify @ pin_H44 - Back side : 1uF *1
2 1 AY10 DDR_VDDQ_G_S431 CORE_VSFR_G31 1 2 1U_0402_6.3V6K
DDR_VDDQ_G_S414
C1087 USBHSIC_V1P24A_G3 - Back side : 1uF *1
HCB2012KF-121T50_2P AY44
JP3 JP@ AV44 DDR_VDDQ_G_S415 M41 +1.24V_SOC C1061 1 2 1U_0402_6.3V6K
AV10 DDR_VDDQ_G_S413 USBHSIC_V1P2A_G3 U35 1 2 1U_0402_6.3V6K
DDR_VDDQ_G_S410 USB_VDDQ_G32
C1062 USB_VDDQ_G3 - pin_U35,V35 - Back side : 1uF *2
BE51 V35 +1.24VALW_USBVDDQ
USB
JUMP_43X118 AV38 DDR_VDDQ_G_S418 USB_VDDQ_G33 H44 @
AV16 DDR_VDDQ_G_S412 USB_VDDQ_G31 P41 1 2 1U_0402_6.3V6K
JP4 JP@ 1900mA DDR_VDDQ_G_S411 USBSSIC_V1P2A_G3
C1088 USBSSIC_1P24A_G3 - Package edge : 1uF *1
AU36
AU18 DDR_VDDQ_G_S49 AA29
JUMP_43X118 AN36 DDR_VDDQ_G_S48 USB_V1P8A_G3
DDR_VDDQ_G_S47 +1.8VALW
C1069 1 2 22U_0603_6.3V6M AN35 C23
JP3,JP4 short 1 2 AN19 DDR_VDDQ_G_S46 USB_V3P3A_G32 B22
C1071 22U_0603_6.3V6M
DDR_VDDQ_G_S45 USB_V3P3A_G31 +3V_SOC 1 1 USB_V1P8A_G3 - Back side : 1uF *1
1U_0402_6.3V6K
C1083
1U_0402_6.3V6K
C1082
C1072 1 2 22U_0603_6.3V6M AN18 Package edge : 1uF *1
C 1 2 AM36 DDR_VDDQ_G_S44 C5 C
DDR_VDDQ_G_S4 - C1074 22U_0603_6.3V6M
DDR_VDDQ_G_S43 RTC_V3P3RTC_G52 +RTCVCC 1
1U_0402_6.3V6K
C1084
Package edge : 22uF *4 AM18 B6
@ DDR_VDDQ_G_S41 RTC_V3P3RTC_G51 D4 2 2
RTC
RTC_V3P3A_G51 +3V_SOC 1
1U_0402_6.3V6K
C1100
E1 E3 USB_V3P3A_G3 - Package edge : 1uF *1
+VDD_SD3 SDIO_V3P3A_V1P8A_G31 RTC_V3P3A_G52 2
E2 1
SDIO_V3P3A_V1P8A_G32
1U_0402_6.3V6K
C1101
G1 RTC_V3P3RTC_G5 - Package edge side : 1uF *1
+VDD_LPC SDIO_V3P3A_V1P8A_G33 2
AH4 U16
+VDD_AUDIO UNCORE_V1P8A_G32 FUSE_V1P8A_G3 +1.8VALW
AF4 RTC_V3P3A_G5 - Package edge side : 1uF *1
Y18 UNCORE_V1P8A_G31 H10 2
FUSE
+1.8VALW GPIO_V1P8A_G35 FUSE1_V1P05A_G4 +1.05VALW 1
1U_0402_6.3V6K
C1102
AD33 G10
AK18 GPIO_V1P8A_G31 FUSE0_V1P05A_G3 A3
550mA GPIO_V1P8A_G33 RSVD_VSS 1 FUSE_V1P8A_G3 - Back side : 1uF *1
1U_0402_6.3V6K
C1106
C1091 1 2 1U_0402_6.3V6K AF33 K20
1 2 AK19 GPIO_V1P8A_G32 RSVD1 M20 2
GPIO_V1P8A_G3 - C1092 1U_0402_6.3V6K
GPIO_V1P8A_G34 RSVD2
FUSE_V1P05A_G4 - Package edge : 1uF *1
pin_Y18 - Back side*1 C1093 1 2 1U_0402_6.3V6K
C1094 1 2 1U_0402_6.3V6K 2
other pin - Package edge*2
C1095 1 2 1U_0402_6.3V6K 9 OF 13
Confirm with VC Team already(V0.1) V1.0 modify
+1.24VALW
V0.2 modify +VDD_SD3
+VDD_LPC +VDD_AUDIO
2
LPC1P8V@ 148mA R1211 R1218 @
+1.8VALW R1207 1 2 0_0603_5%
+1.8VS
1 @ 2 0_0603_5%
+1.8VALW
1 @ 2 0_0603_5% R1212
0_0603_5%
+3V_SOC R1208 1 LPC3V@2 0_0603_5% 1 +1.8VALW R1210 1 @ 2 0_0603_5% 1
1U_0402_6.3V6K
C1097
1U_0402_6.3V6K
C1096
1 1
1
@
1U_0402_6.3V6K
C1099
1U_0402_6.3V6K
C1098
@
+1.24V_SOC
SDIO_V3P3A_V1P8A_G3 - UNCORE_V1P8A_G3 - Back side : 1uF *1
2
2 2 SDIO_V3P3A_V1P8A_G3 -
pin_G1 - Back side : 1uF *1 2 2
B
V0.2 modify pin_E1,E2 - Back side : 1uF *2 R1213
B
0_0603_5%
1
A A

VLV-M SOC Power
5 4 3 2 1
5 4 3 2 1
D D
ball_B52 :
if connect to GND , layout side need use 3mil-core and will cost up ,
so left NC pin_B52 (Intel CRB also left NC)
C CHV_MCP_EDS CHV_MCP_EDS CHV_MCP_EDS C

USOC1J USOC1K USOC1L
CHV_MCP_EDS USOC1M
Power-VSS Power-VSS Power-VSS Power-VSS
F1 W1
AN3 AF38 AN21 AY9 AN33 Y24 C1 VSS18 VSS57 V44
AN29 VSS98 VSS51 AF32 BG30 VSS5 VSS61 AY28 P32 VSS2 VSS102 G30 BH53 VSS17 VSS56 V42
AN16 VSS95 VSS48 AE9 BG20 VSS99 VSS50 AY22 P19 VSS97 VSS51 G22 BH1 VSS14 VSS53
AN14 VSS94 VSS47 AE8 BG19 VSS98 VSS49 AY20 AF24 VSS96 VSS50 G14 BG53 VSS13 V32
AN12 VSS93 VSS46 AE6 BG18 VSS97 VSS48 AW35 N53 VSS1 VSS49 G12 BG1 VSS12 VSS52 V21
AN11 VSS92 VSS45 AE53 BG16 VSS96 VSS47 AW27 N51 VSS95 VSS48 F5 B52 VSS10 VSS51 V16
AN1 VSS91 VSS44 AE50 BG14 VSS95 VSS46 AW19 N32 VSS94 VSS47 F35 B2 VSS5 VSS50 U9
AM50 VSS90 VSS43 AE48 BF42 VSS94 VSS45 AM13 N24 VSS93 VSS46 F32 VSS4 VSS49 U8
AM42 VSS89 VSS42 AE46 BF32 VSS93 VSS4 AK29 N22 VSS92 VSS45 F27 A6 VSS48 U6
AM4 VSS88 VSS41 AE45 BF28 VSS92 VSS3 AK22 M9 VSS91 VSS44 F24 A5 VSS2 VSS47 U53
AM38 VSS87 VSS40 AE43 BF27 VSS91 VSS2 AV40 VSS90 VSS43 F19 VSS1 VSS46 U5
AM35 VSS86 VSS39 AE42 BF26 VSS90 VSS44 AV35 K45 VSS42 E51 M24 VSS45 U49
AH44 VSS85 VSS38 AE40 BF22 VSS89 VSS43 AV30 M40 VSS77 VSS41 E35 A7 VSSA VSS44 U48
AM30 VSS60 VSS37 AE14 BF12 VSS88 VSS42 AV27 M35 VSS87 VSS39 E19 BF50 VSS3 VSS43 U46
AM27 VSS84 VSS36 AE12 BE35 VSS87 VSS41 AV24 M27 VSS86 VSS38 D42 BF4 VSS9 VSS42 U45
U25 VSS83 VSS35 AE11 BE19 VSS86 VSS40 AV19 AW13 VSS85 VSS37 D40 BB50 VSS8 VSS41 U43
P10 VSS100 VSS34 AE1 C20 VSS85 VSS39 AV14 M19 VSS3 VSS36 D38 VSS7 VSS40 U42
AM16 VSS99 VSS33 AD44 BD53 VSS103 VSS38 AJ18 M14 VSS84 VSS35 D32 BB4 VSS39 U40
AD4 VSS81 VSS32 AD36 BG7 VSS84 VSS1 AU53 L35 VSS83 VSS34 D27 VSS6 VSS38 U38
AK7 VSS31 VSS30 AC29 BD35 VSS102 VSS37 AU51 L27 VSS82 VSS33 D24 BG47 VSS37
AK50 VSS80 VSS23 AD32 BD27 VSS83 VSS36 AU3 L19 VSS81 VSS32 D16 Y9 VSS11 U33
AK47 VSS79 VSS29 AD30 BD19 VSS82 VSS35 AU1 L1 VSS80 VSS31 D10 Y50 VSS70 VSS35 U32
AK45 VSS78 VSS28 AD21 BD1 VSS81 VSS34 AT9 K50 VSS79 VSS30 J42 Y45 VSS69 VSS34 U30
AK44 VSS77 VSS27 AC38 BC44 VSS80 VSS33 AT51 T47 VSS78 VSS65 C47 Y40 VSS68 VSS33 U29
AK40 VSS76 VSS26 AC35 BC40 VSS79 VSS32 AT45 K4 VSS100 VSS29 C39 Y4 VSS67 VSS32
AK4 VSS75 VSS25 AC33 BC38 VSS78 VSS31 AT36 K36 VSS76 VSS28 C36 Y38 VSS66 U21
AK38 VSS74 VSS24 AC16 BC28 VSS77 VSS30 AT35 K34 VSS75 VSS27 C30 Y29 VSS65 VSS31 U18
B AK32 VSS73 VSS22 AB6 BC26 VSS76 VSS29 AT3 K32 VSS74 VSS26 C3 Y22 VSS64 VSS30 U36 B
AK27 VSS72 VSS21 AB50 BC16 VSS75 VSS28 AT27 K30 VSS73 VSS25 C28 Y21 VSS63 VSS36 U14
AK25 VSS71 VSS20 AB47 BC14 VSS74 VSS27 AT19 K24 VSS72 VSS24 C22 Y19 VSS62 VSS29 U12
AM24 VSS70 VSS19 AB42 BC10 VSS73 VSS26 AT18 K22 VSS71 VSS23 AW41 Y16 VSS61 VSS28 U11
AK16 VSS82 VSS18 AB4 BB35 VSS72 VSS25 AP9 K16 VSS70 VSS4 BJ7 Y14 VSS60 VSS27 T9
AJ53 VSS69 VSS17 AB14 BB27 VSS71 VSS24 AP50 K14 VSS69 VSS22 BJ47 Y10 VSS59 VSS26 P42
AJ51 VSS68 VSS16 AB13 BB19 VSS70 VSS23 AP45 K12 VSS68 VSS21 BJ43 VSS58 VSS23 T14
AJ3 VSS67 VSS15 AB12 BA35 VSS69 VSS22 AP4 J53 VSS67 VSS20 BJ39 P4 VSS25 R1
AJ25 VSS66 VSS14 AB10 BA30 VSS68 VSS21 AN9 M45 VSS66 VSS19 BJ35 L41 VSS22 VSS24
AJ16 VSS65 VSS13 AA53 BA27 VSS67 VSS20 AN8 J38 VSS88 VSS18 BJ31 P36 VSS19 P35
AJ1 VSS64 VSS12 AA38 BA24 VSS66 VSS19 AN6 J35 VSS64 VSS17 BJ27 VSS21 13 OF 13 VSS20
AH9 VSS63 VSS11 AA27 BA19 VSS65 VSS18 AN53 J30 VSS63 VSS16 BJ23 BSW-MCP-EDS_FCBGA1170
AH47 VSS62 VSS10 AA16 B36 VSS64 VSS17 AN51 J27 VSS62 VSS15 BJ19
AH42 VSS61 VSS9 A47 B28 VSS63 VSS16 AN5 J22 VSS61 VSS14 BJ15
AH41 VSS59 VSS8 A43 AY7 VSS62 VSS15 AN49 J19 VSS60 VSS13 BJ11
AH14 VSS58 VSS7 A39 AY51 VSS60 VSS14 AN48 J18 VSS59 VSS12 BG5
AH13 VSS57 VSS6 A31 AY47 VSS59 VSS13 AN46 H8 VSS58 VSS11 BG49
AH12 VSS56 VSS5 A23 AY34 VSS58 VSS12 AN45 E46 VSS57 VSS10 BG40
AH10 VSS55 VSS4 A19 AY32 VSS56 VSS11 AN43 H35 VSS40 VSS9 BG38
AG25 VSS54 VSS3 A15 AY30 VSS55 VSS10 AN42 H27 VSS56 VSS8 BG36
AF47 VSS53 VSS2 A11 AY3 VSS54 VSS9 AN40 H19 VSS55 VSS7 BG35
VSS52 VSS1 AN30 VSS53 VSS8 AN38 M50 VSS54 VSS6 BG34
10 OF 13 AY45 VSS6 VSS7 V25 VSS89 VSS5
BSW-MCP-EDS_FCBGA1170 VSS57 VSS101
11 OF 13 12 OF 13
BSW-MCP-EDS_FCBGA1170 BSW-MCP-EDS_FCBGA1170
A A

2014/03/19 2015/03/18 Title
Issued Date Deciphered Date VLV-M SOC GND
5 4 3 2 1
A B C D E
+DDR_A_VREF_DQ +1.35V CONN@ +1.35V

JDIMM1
1 2
3 VREF_DQ VSS 4 DDR_A_D7
5 VSS DQ4 6 DDR_A_DQS#[0..7] <5>
DDR_A_D0 DDR_A_D3
DDR_A_D1 7 DQ0 DQ5 8
9 DQ1 VSS 10 DDR_A_DQS#0 DDR_A_DQS[0..7] <5>
DDR_A_DM0 11 VSS DQS0# 12 DDR_A_DQS0
13 DM0 DQS0 14 DDR_A_D[0..63] <5>
DDR_A_D2 15 VSS VSS 16 DDR_A_D6
DDR_A_D5 17 DQ2 DQ6 18 DDR_A_D4 DDR_A_MA[0..15] <5>
19 DQ3 DQ7 20
DDR_A_D13 21 VSS VSS 22 DDR_A_D9 DDR_A_DM[0..7] <5>
DDR_A_D12 23 DQ8 DQ12 24 DDR_A_D8
1 25 DQ9 DQ13 26 1
DDR_A_DQS#1 27 VSS VSS 28 DDR_A_DM1
DDR_A_DQS1 29 DQS1# DM1 30
DQS1 RESET# DDR_A_RST# <5>
31 32
37 DQ11 DQ15 38 EMC@
DDR_A_D22 39 VSS VSS 40 DDR_A_D16 DDR_A_RST# C1077 1 2 .1U_0402_16V7K
43 DQ17 DQ21 44
DDR_A_DQS#2 45 VSS VSS 46 DDR_A_DM2 ESD request 0211
49 DQS2 VSS 50 DDR_A_D20
DDR_A_D23 51 VSS DQ22 52 DDR_A_D21
DDR_A_D18 53 DQ18 DQ23 54
55 DQ19 VSS 56 DDR_A_D27
All VREF traces should DDR_A_D28 57 VSS DQ28 58 DDR_A_D25
have 10 mil trace width DDR_A_D30 59 DQ24 DQ29 60
61 DQ25 VSS 62 DDR_A_DQS#3
65 DM3 DQS3 66
DQ26 DQ30 Signal voltage level = 0.675 V
DDR_A_D24 69 70 DDR_A_D31
71 DQ27 DQ31 72 PLACE TWO 4.7K RESISTORS CLOSE TO
VSS VSS DIMMS ON DIMM_VREF_CA / DIMM_VREF_DQ
Decoupling caps are needed; one 0.1 µF placed close to VREF pins of each DDR3 SODIMM.
73 74
<5> DDR_A_CKE0 CKE0 CKE1 DDR_A_CKE1 <5>
75 76
77 VDD VDD 78 DDR_A_MA15
79 NC A15 80 DDR_A_MA14
<5> DDR_A_BS2 BA2 A14 +1.35V +DDR_A_VREF_DQ
81 82
DDR_A_MA12 83 VDD VDD 84 DDR_A_MA11
2 DDR_A_MA9 85 A12/BC# A11 86 DDR_A_MA7 1 2 2
87 A9 A7 88 R1027
DDR_A_MA8 89 VDD VDD 90 DDR_A_MA6 4.7K_0402_1%
A8 A6 1
DDR_A_MA5 91 92 DDR_A_MA4 1 2
93 A5 A4 94 R1028 C1076
DDR_A_MA3 95 VDD VDD 96 DDR_A_MA2 4.7K_0402_1%
A3 A2 .1U_0402_16V7K
DDR_A_MA1 97 98 DDR_A_MA0 2
99 A1 A0 100
101 VDD VDD 102
<5> DDR_A_CLK0 CK0 CK1 DDR_A_CLK1 <5>
103 104
<5> DDR_A_CLK0# CK0# CK1# DDR_A_CLK1# <5>
105 106
DDR_A_MA10 107 VDD VDD 108 +1.35V +DDR_A_VREF_CA
A10/AP BA1 DDR_A_BS1 <5>
109 110
<5> DDR_A_BS0 BA0 RAS# DDR_A_RAS# <5>
111 112 1 2
113 VDD VDD 114 R1029
<5> DDR_A_WE# WE# S0# DDR_A_CS0# <5>
115 116 4.7K_0402_1% 1
<5> DDR_A_CAS# CAS# ODT0 DDR_A_ODT0 <5>
117 118 1 2
DDR_A_MA13 119 VDD VDD 120 R1030 C1078
121 A13 ODT1 122 DDR_A_ODT1 <5>
<5> DDR_A_CS1# 4.7K_0402_1% .1U_0402_16V7K
123 S1# NC 124 2
125 VDD VDD 126
TEST VREF_CA +DDR_A_VREF_CA
127 128
DDR_A_D49 131 DQ32 DQ36 132 DDR_A_D53
133 DQ33 DQ37 134
DDR_A_DQS#6 135 VSS VSS 136 DDR_A_DM6
139 DQS4 VSS 140 DDR_A_D54
Layout Note:
DDR_A_D50 141 VSS DQ38 142 DDR_A_D55 Place near JDIMM1
DDR_A_D51 143 DQ34 DQ39 144
DQ35 VSS
For EMI request 2/5
145 146 DDR_A_D32 V1.0 modify
DDR_A_D36 147 VSS DQ44 148 DDR_A_D33 +1.35V
DQ40 DQ45
Follow KV_50
3 DDR_A_D37 149 150 +1.35V 3
DDR_A_DM4 153 VSS DQS5# 154 DDR_A_DQS4 +1.35V 1 2
Swap D4->D5,D5->D6,D6->D4 DM5 DQS5
C111 10U_0603_6.3V6M 1
155 156 C112 1 2 10U_0603_6.3V6M @
DDR_A_D38 157 VSS VSS 158 DDR_A_D34 C113 1 2 10U_0603_6.3V6M + C185
DDR_A_D39 159 DQ42 DQ46 160 DDR_A_D35 EMC@ C120 1 2 .1U_0402_16V7K C114 1 2 10U_0603_6.3V6M 330U_2.5V_M
161 DQ43 DQ47 162 EMC@ C127 1 2 .1U_0402_16V7K
DDR_A_D44 163 VSS VSS 164 DDR_A_D40 EMC@ C121 1 2 .1U_0402_16V7K 2
DDR_A_D45 165 DQ48 DQ52 166 DDR_A_D41 EMC@ C126 1 2 .1U_0402_16V7K C110 1 2 .1U_0402_16V7K
167 DQ49 DQ53 168 EMC@ C118 1 2 .1U_0402_16V7K C109 1 2 .1U_0402_16V7K
DDR_A_DQS#5 169 VSS VSS 170 DDR_A_DM5 EMC@ C119 1 2 .1U_0402_16V7K C108 1 2 .1U_0402_16V7K
DDR_A_DQS5 171 DQS6# DM6 172 1 2 1 2
SF000002Z00
EMC@ C148 .1U_0402_16V7K C107 .1U_0402_16V7K
173 DQS6 VSS 174 DDR_A_D42 EMC@ C149 1 2 .1U_0402_16V7K C115 1 2 .1U_0402_16V7K 330U 2.5V H4.2
VSS DQ54
DDR_A_D46 175
DQ50 DQ55
176 DDR_A_D43 EMC@ C150 1 2 .1U_0402_16V7K C116 1 2 .1U_0402_16V7K 17mohm OSCON
DDR_A_D47 177 178 C117 1 2 .1U_0402_16V7K
179 DQ51 VSS 180 DDR_A_D63
DDR_A_D56 181 VSS DQ60 182 DDR_A_D58
DDR_A_D59 183 DQ56 DQ61 184
189 DM7 DQS7 190
DDR_A_D60 193 DQ58 DQ62 194 DDR_A_D57 +0.675VS
195 DQ59 DQ63 196
197 VSS VSS 198 C123 1 2 10U_0603_6.3V6M
199 SA0 EVENT# 200
+3VS VDDSPD SDA DDR_SMB_DA <8,14>
201 202
203 SA1 SCL 204 DDR_SMB_CK <8,14>
+0.675VS +0.675VS C124 1 2 1U_0402_6.3V6K
VTT VTT C122 1 2 1U_0402_6.3V6K
205 206 V0.2 modify
GND1 GND2
2
1 @ @ 207 208
R211 R212 BOSS1 BOSS2
Channel A
0_0402_5%
4 C125 4
0_0402_5%
.1U_0402_16V7K LCN_DAN06-K4406-0100
2
Part Number = SP07000N300 Layout Note:
1
LCN_DAN06-K4406-0100_204P Place near JDIMM1.203,204
<Address: SA1:SA0=00 (A0H)> Security Classification Compal Secret Data Compal Electronics, Inc.
2014/08/21 2015/08/21 Title
Issued Date Deciphered Date DDR3L DIMMA
DIMM_1 STD H:4mm THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
A B C D E
A B C D E
+DDR_B_VREF_DQ +1.35V +1.35V

CONN@
JDIMM2
1 2
3 VREF_DQ VSS 4 DDR_B_DQS#[0..7] <5>
DDR_B_D4
DDR_B_D0 5 VSS DQ4 6 DDR_B_D5
DDR_B_D1 7 DQ0 DQ5 8 DDR_B_DQS[0..7] <5>
9 DQ1 VSS 10 DDR_B_DQS#0
DDR_B_DM0 11 VSS DQS0# 12 DDR_B_DQS0 DDR_B_D[0..63] <5>
13 DM0 DQS0 14
DDR_B_D2 15 VSS VSS 16 DDR_B_D6 DDR_B_MA[0..15] <5>
DDR_B_D3 17 DQ2 DQ6 18 DDR_B_D7
19 DQ3 DQ7 20 DDR_B_DM[0..7] <5>
DDR_B_D8 21 VSS VSS 22 DDR_B_D12
1 DDR_B_D9 23 DQ8 DQ12 24 DDR_B_D13 1
25 DQ9 DQ13 26
DDR_B_DQS#1 27 VSS VSS 28 DDR_B_DM1
DDR_B_DQS1 29 DQS1# DM1 30
DQS1 RESET# DDR_B_RST# <5>
31 32
DDR_B_D11 35 DQ10 DQ14 36 DDR_B_D15 EMC@
37 DQ11 DQ15 38 DDR_B_RST# C84 1 2 .1U_0402_16V7K
DDR_B_D17 41 DQ16 DQ20 42 DDR_B_D16
43 DQ17 DQ21 44
DDR_B_DQS#2 45 VSS VSS 46 DDR_B_DM2 FOR EMI/ESD Require 0926
49 DQS2 VSS 50 DDR_B_D20
DDR_B_D23 53 DQ18 DQ23 54
55 DQ19 VSS 56 DDR_B_D25 +1.35V +DDR_B_VREF_DQ
All VREF traces should DDR_B_D28 57 VSS DQ28 58 DDR_B_D27
have 10 mil trace width DDR_B_D30 59 DQ24 DQ29 60 1 2
61 DQ25 VSS 62 DDR_B_DQS#3 R1069
DDR_B_DM3 63 VSS DQS3# 64 DDR_B_DQS3 4.7K_0402_1%
DM3 DQS3 1
65 66 1 2
DDR_B_D24 67 VSS VSS 68 DDR_B_D31 R1067 C128
DDR_B_D26 69 DQ26 DQ30 70 DDR_B_D29 4.7K_0402_1%
DQ27 DQ31 .1U_0402_16V7K
71 72 2
VSS VSS
73 74
<5> DDR_B_CKE0 CKE0 CKE1 DDR_B_CKE1 <5>
75 76
77 VDD VDD 78 DDR_B_MA15 +1.35V +DDR_B_VREF_CA
79 NC A15 80 DDR_B_MA14
<5> DDR_B_BS2 BA2 A14
81 82 1 2
2 DDR_B_MA12 83 VDD VDD 84 DDR_B_MA11 R1070 2
DDR_B_MA9 85 A12/BC# A11 86 DDR_B_MA7 4.7K_0402_1%
A9 A7 1
87 88 1 2
DDR_B_MA8 89 VDD VDD 90 DDR_B_MA6 R1068 C142
DDR_B_MA5 91 A8 A6 92 DDR_B_MA4 4.7K_0402_1%
A5 A4 .1U_0402_16V7K
93 94 2
DDR_B_MA3 95 VDD VDD 96 DDR_B_MA2
DDR_B_MA1 97 A3 A2 98 DDR_B_MA0
99 A1 A0 100
101 VDD VDD 102
<5> DDR_B_CLK0 CK0 CK1 DDR_B_CLK1 <5>
103 104
<5> DDR_B_CLK0# CK0# CK1# DDR_B_CLK1# <5> +1.35V
105 106
DDR_B_MA10 107 VDD VDD 108
A10/AP BA1 DDR_B_BS1 <5>
109 110 C133 1 2 10U_0603_6.3V6M
<5> DDR_B_BS0 BA0 RAS# DDR_B_RAS# <5>
111 112 C134 1 2 10U_0603_6.3V6M
113 VDD VDD 114 C135 1 2 10U_0603_6.3V6M
<5> DDR_B_WE# WE# S0# DDR_B_CS0# <5>
115 116 C136 1 2 10U_0603_6.3V6M
<5> DDR_B_CAS# CAS# ODT0 DDR_B_ODT0 <5>
117 118
DDR_B_MA13 119 VDD VDD 120
A13 ODT1 DDR_B_ODT1 <5>
121 122 C129 1 2 .1U_0402_16V7K
<5> DDR_B_CS1# S1# NC
123 124 C130 1 2 .1U_0402_16V7K
125 VDD VDD 126 C131 1 2 .1U_0402_16V7K
TEST VREF_CA +DDR_B_VREF_CA
127 128 C132 1 2 .1U_0402_16V7K
DDR_B_D48 129 VSS VSS 130 DDR_B_D52 C137 1 2 .1U_0402_16V7K
DDR_B_D49 131 DQ32 DQ36 132 DDR_B_D53 C138 1 2 .1U_0402_16V7K
133 DQ33 DQ37 134 C139 1 2 .1U_0402_16V7K
DDR_B_DQS#6 135 VSS VSS 136 DDR_B_DM6
DDR_B_D51 143 DQ34 DQ39 144
145 DQ35 VSS 146 DDR_B_D32
3 DDR_B_D36 147 VSS DQ44 148 DDR_B_D33
Layout Note: 3
DDR_B_D37 149 DQ40 DQ45 150 Place near JDIMM2
151 DQ41 VSS 152 DDR_B_DQS#4
DDR_B_DM4 153 VSS DQS5# 154 DDR_B_DQS4
Swap D4->D5,D5->D6,D6->D4 DM5 DQS5
155 156
DDR_B_D38 157 VSS VSS 158 DDR_B_D34 +0.675VS
DDR_B_D39 159 DQ42 DQ46 160 DDR_B_D35
161 DQ43 DQ47 162
DDR_B_D44 163 VSS VSS 164 DDR_B_D40 C143 1 2 10U_0603_6.3V6M
DDR_B_D45 165 DQ48 DQ52 166 DDR_B_D41
167 DQ49 DQ53 168
DDR_B_DQS#5 169 VSS VSS 170 DDR_B_DM5 C145 1 2 1U_0402_6.3V6K
DDR_B_DQS5 171 DQS6# DM6 172 C146 1 2 1U_0402_6.3V6K
DDR_B_D47 177 DQ50 DQ55 178
179 DQ51 VSS 180 DDR_B_D63
+3VS DDR_B_D56 181 VSS DQ60 182 DDR_B_D58
DDR_B_D59 183 DQ56 DQ61 184
DQ57 VSS Layout Note:
2
185 186 DDR_B_DQS#7

R229 DDR_B_DM7 187 VSS DQS7# 188 DDR_B_DQS7 Place near JDIMM2.203,204
10K_0402_5% 189 DM7 DQS7 190
DDR_B_D57 193 DQ58 DQ62 194 DDR_B_D60
1
195 DQ59 DQ63 196

197 VSS VSS 198
199 SA0 EVENT# 200
+3VS VDDSPD SDA DDR_SMB_DA <8,13>
201 202
203 SA1 SCL 204 DDR_SMB_CK <8,13>
+0.675VS VTT VTT +0.675VS
205 206 V0.2 modify
GND1 GND2
2
1 207 208
4
C147
.1U_0402_16V7K
R231
0_0402_5%
BOSS1 BOSS2
LCN_DAN06-K4406-0100
Channel B 4
2 @
Part Number = SP07000N300
1
LCN_DAN06-K4406-0100_204P
<Address: SA0:SA1=10 (A2H)> Security Classification Compal Secret Data Compal Electronics, Inc.
SA0/SA1 Follow INTEL demo board 2014/08/21 2015/08/21 Title
Issued Date Deciphered Date DDR3L DIMMB
DIMM_2 STD H:4mm THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
A B C D E
A B C D E
UGPU1A
GPIO I/O USAGE
Part 1 of 6 +3VSDGPU_AON
AG6 C6 GC6_FB_EN GC6_FB_EN <9> RP2000
GPIO0 O GC6_FB_EN
<7> PEG_HTX_C_GRX_P0 PEX_RX0 GPIO0 +1.8VALW
<7> PEG_HTX_C_GRX_N0 AG7 B2 10K_0804_8P4R_5%
AF7 PEX_RX0_N GPIO1 D6 GPIO8_OVERT 8 1
<7> PEG_HTX_C_GRX_P1
AE7 PEX_RX1 GPIO2 C7 GPIO9_ALERT 7 2
GPIO1 O MEM_VDD_CTL
<7> PEG_HTX_C_GRX_N1 PEX_RX1_N GPIO3
AE9 F9 6 3
AF9 PEX_RX2 GPIO4 A3 3VSDGPU_MAIN_EN 3VSDGPU_MAIN_EN <38,51> ACIN_BUF 5 4
AG9 PEX_RX2_N GPIO5 A4 GPU_EVENT#_1 GC6@
GPIO2 O LCD_BL_PWM
5
AG10 PEX_RX3 GPIO6 B6 U2514 VGA@
AF10 PEX_RX3_N GPIO7 A6 GPIO8_OVERT 1 GPIO3 O LCD_VCC
P
AE10 NC OVERT F8 GPIO9_ALERT NC 4 GPU_EVENT#_1
AE12 NC GPIO9 C5 2 Y +3VSDGPU_AON
1 NC GPIO10 <9> GPU_EVENT# A 1
G
AF12 E7 DGPU_VID RP2001 GPIO4 O LCD_BL_EN
AG12 NC GPIO11 D7 ACIN_BUF DGPU_VID <51> NL17SZ07DFT2G_SC70-5 10K_0804_8P4R_5%
3
AG13 NC GPIO12 B4 PSI SA00004BV00 GPU_EVENT#_1 8 1
GPIO
AF13 NC GPIO13 B3 PSI <51> 3VSDGPU_MAIN_EN 7 2
AE13 NC GPIO14 C3 GPU_PEX_RST_HOLD# 6 3
GPIO5 O 3V3_MAIN_EN
NC GPIO15 V1.0 modify
AE15 D5 GC6_FB_EN 5 4
AF15 NC GPIO16 D4
AG15 NC GPIO17 C2 GC6@
GPIO6 I GPU_EVENT#
AG16 NC GPIO18 F7
AF16 NC GPIO19 E6 ACIN_BUF 2 1
AE16 NC GPIO20 C4 GPU_PEX_RST_HOLD# D2000 DGPU_AC_DETECT <34> GPIO7 O 3D Vision
AE18 NC GPIO21 RB751V-40_SOD323-2 +3VSDGPU_AON
AF18 NC AB6 VGA@
AG18 NC PEX_WAKE_NC GPIO8 I SYS_PEX_RST_MON#
AG19 NC SYS_PEX_RST_MON# R2056 2 @ 1 10K_0402_5%
AF19 NC
AE19 NC +1.8VALW I2CS_SDA R2000 1 VGA@ 2 1.8K_0402_1%
GPIO9 I/O ALERT
AE21 NC AG3
AF21 NC NC AF4 I2CS_SCL R2001 1 VGA@ 2 1.8K_0402_1%
AG21 NC NC AF3
GPIO10 O MEM_VREF_CTL
AG22 NC NC @
5
NC U2513 PSI R2052 2 VGA@ 1 10K_0402_5%
1 GPIO11 O PWM_VID
P
VGA@ CV11 1 2 .1U_0402_16V7K PEG_GTX_HRX_P0 AC9 AE3 ACIN_BUF 4 NC
<7> PEG_GTX_C_HRX_P0
DACs
VGA@ CV12 1 2 .1U_0402_16V7K PEG_GTX_HRX_N0 AB9 PEX_TX0 NC AE4 Y 2
<7> PEG_GTX_C_HRX_N0 PEX_TX0_N NC A H_PROCHOT# <9,34>
G
<7> PEG_GTX_C_HRX_P1 VGA@ CV13 1 2 .1U_0402_16V7K PEG_GTX_HRX_P1 AB10
VGA@ CV14 1 2 .1U_0402_16V7K PEG_GTX_HRX_N1 AC10 PEX_TX1 NL17SZ07DFT2G_SC70-5
<7> PEG_GTX_C_HRX_N1 GPIO12 I PWR_LEVEL
3
AD11 PEX_TX1_N SA00004BV00
PCI EXPRESS
AC11 PEX_TX2 W5 PLTRST_VGA#
AC12 PEX_TX2_N NC AE2
PEX_TX3 TSEN_VREF V0.2 modify GPIO13 O PSI
AB12 AF2
AB13 PEX_TX3_N NC
NC
2
AC13 GPIO14 I HPD_A
2 AD14 NC 2
AC14 NC GPIO8_OVERT 1 6
NC GPU_OVERT <34>
AC15 VGA@ GPIO15 I HPD_C
AB15 NC DMN66D0LDW-7_SOT363-6
AB16 NC B7 R2003 1 VGA@ 2 1.8K_0402_1%
NC I2CA_SCL Q2000A
AC16 A7 R2004 1 VGA@ 2 1.8K_0402_1% GPIO16 I FRAME_LOCK#
AD17 NC I2CA_SDA
NC V1.0 modify
AC17 C9 R2005 1 VGA@ 2 1.8K_0402_1% PLTRST_VGA#
AC18 NC I2CB_SCL C8 R2006 1 VGA@ 2 1.8K_0402_1%
NC I2CB_SDA GPIO17 I HPD_D
I2C
AB18
NC
5
AB19 A9 R2007 1 VGA@ 2 1.8K_0402_1%
AC19 NC I2CC_SCL B9 R2008 1 VGA@ 2 1.8K_0402_1%
AD20 NC I2CC_SDA GPIO9_ALERT 4 3
GPIO18 I HPD_E
NC GPU_ALERT <34>
AC20 D9 I2CS_SCL VGA@
AC21 NC I2CS_SCL D8 I2CS_SDA DMN66D0LDW-7_SOT363-6
AB21 NC I2CS_SDA GPIO19 I HPD_F or HPD_B
Q2000B
AD23 NC
AE23 NC Place Under L6
NC V1.0 modify GPIO20 Reserved
AF24 C2000 PLTRST_VGA# 0_0402_5% 1 @ 2R1164
AE24 NC L6 +PLLVDD 1 2 .1U_0402_16V7K
AG24 NC PLLVDD M6 VGA@
AG25 NC SP_PLLVDD 1 @ 2
GPIO21 O GPU_PEX_RST_HOLD#
NC +3VSDGPU_AON
N6 C2001 R1165 0_0402_5%
2
NC +GPU_PLLVDD 1 2 .1U_0402_16V7K
VGA@
GPIO22
+3VSDGPU_AON 1 VGA@ 2 AE8 I2CS_SCL 1 6
<7> CLK_PEG_VGA PEX_REFCLK EC_SMB_CK2 <26,30,34,37>
R2009 10K_0402_5% AD8 VGA@ GPIO23
<7> CLK_PEG_VGA# PEX_REFCLK_N
PEG_CLKREQ# AC6 Place Under M6 DMN66D0LDW-7_SOT363-6
<31> PEG_CLKREQ# PEX_CLKREQ_N
Q2001A
PEX_TSTCLK_OUT+ AF22
CLK
2 @ 1 PEX_TSTCLK_OUT- AE22 PEX_TSTCLK_OUT C11 XTALIN

GPIO24
PEX_TSTCLK_OUT_N XTAL_IN V1.0 modify
R2010 200_0402_1% B10 XTALOUT PLTRST_VGA# 0_0402_5% 1 @ 2R1174
XTAL_OUT
3 PLTRST_VGA# AC7 A10 XTAL_SSIN R2012 1 VGA@ 2 10K_0402_5% 3
2 VGA@ 1 PEX_TREMP AF25 PEX_RST_N XTAL_SSIN C10 XTAL_OUTBUFF R2013 1 VGA@ 2 10K_0402_5% 1 @ 2
PEX_TERMP XTAL_OUTBUFF +3VSDGPU_AON
R2011 2.49K_0402_1% R1168 0_0402_5%
5
GM108-ES-S-A1_FCBGA595
@ I2CS_SDA 4 3
EC_SMB_DA2 <26,30,34,37>
VGA@
DMN66D0LDW-7_SOT363-6
Q2001B
SM010019400 3000ma 33ohm@100mhz DCR 0.05

38mA +1.05VSDGPU
GC6 2.0 function D2001 VGA@
GC6_FB_EN 2 +PLLVDD 1 2 27MHZ_10PF_7V27000023
1 1.5VS_DGPU_PWR_EN 1.5VS_DGPU_PWR_EN <38,50> L2000 CHILISIN PBY160808T-330Y-N
3 GC6@ 1 XTALOUT 3 1 XTALIN
C2003 3 1
PLL_VDD
1
BAV70W_SOT323-3 GC6@ VGA@ GND GND
10P_0402_50V8J
10P_0402_50V8J
0.1Ux1, 22Ux1 1 1
R2014 22U_0603_6.3V6M VGA@ VGA@ X2000 VGA@
R2016 200K_0402_5%
30ohm(ESR0.05)x1 2 4 2
0_0402_5% Near GPU C2004 C2005
1 NGC6@ 2 2 2
<31,38,51> VGA_PWROK
2
SM01000AG00 2A 300ohm@100mhz DCR 0.1

V0.2 modify 17mA
Crystals must have a max ESR of 80 ohm
+3VSDGPU_AON VGA@
U2001 +GPU_PLLVDD 1 2
5
VGA@ L2001 HCB1608KF-301T20_2P

PLT_RST_BUF# 2 1
P
<9,28,30,34,35> PLT_RST_BUF# B
1
4SYS_PEX_RST_MON# C2007
Y SYS_PEX_RST_MON# <17>
DGPU_HOLD_RST# 1 C2006 VGA@
<31> DGPU_HOLD_RST#
2
A
G
4 10U_0603_6.3V6M 47U_0805_6.3V6M 4
2
MC74VHC1G08DFT2G_SC70-5 +3VSDGPU_AON R2019 R2017 +3VSDGPU_AON VGA@ 2

3
0_0402_5% 10K_0402_5% SP_PLLVDD+VID_PLLVDD Near GPU

check NGC6@ VGA@ U2002 0.1Ux2, 10Ux1,47Ux1
1
GC6@ 300ohm(ESR0.2)x1
1
R2055 SYS_PEX_RST_MON# 2
P
D2002 B 4 PLTRST_VGA#
10K_0402_5%
SYS_PEX_RST_MON# 2 GPU_PEX_RST_HOLD# 1 Y
@ A
1
G

2
1 PLTRST_VGA# MC74VHC1G08DFT2G_SC70-5 R2018

3
10K_0402_5% 2014/08/28 2016/08/28 Title

GPU_PEX_RST_HOLD# 3 GC6@
Issued Date Deciphered Date
N16X PEG 1/9
2
BAT54A-7-F_SOT23-3 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
@ Custom 1.0
Reserved from NV suggest
A B C D E
A B C D E
VRAM Interface
+1.5VSDGPU
RP33
CMDA23 1 8
A5MUB exchange 2 7
CMDA21 3 6 +1.5VSDGPU +1.5VSDGPU
4 5
UGPU1B VGA@ 2 2
100_0804_8P4R_5%
1 1
C2084 C2083
MDA[15..0] RP42 .1U_0402_16V7K .1U_0402_16V7K
<20,21> MDA[15..0] 1 1
UGPU1 Part 2 of 6 CMDA24 1 8 @ @
MDA[31..16] CMDA[31..0] <20,21,22,23> A5MUB exchange 2 7
<20,21> MDA[31..16]
MDA0 E18 C27 CMDA0 CMDA26 3 6
MDA[47..32] MDA1 F18 FBA_D00 FBA_CMD0 C26 CMDA1 4 5 +1.5VSDGPU +1.5VSDGPU
<22,23> MDA[47..32] FBA_D01 FBA_CMD1
MDA2 E16 E24 CMDA2 VGA@
MDA[63..48] MDA3 F17 FBA_D02 FBA_CMD2 F24 CMDA3 100_0804_8P4R_5%
<22,23> MDA[63..48] FBA_D03 FBA_CMD3 2 2
N16S-GT MDA4 D20 D27 CMDA4
SGT@ MDA5 D21 FBA_D04 FBA_CMD4 D26 CMDA5 RP43 C2086 C2085
F20 FBA_D05 FBA_CMD5 F25 1 8
SA000087F00 MDA6
FBA_D06 FBA_CMD6
CMDA6 CMDA10 .1U_0402_16V7K .1U_0402_16V7K
MDA7 E21 F26 CMDA7 A5MUB exchange 2 7 1 1
FBA_D07 FBA_CMD7 @ @
MDA8 E15 F23 CMDA8 CMDA22 3 6
UGPU1 MDA9 D15 FBA_D08 FBA_CMD8 G22 CMDA9 4 5
MDA10 F15 FBA_D09 FBA_CMD9 G23 CMDA10 VGA@ +1.5VSDGPU +1.5VSDGPU
MDA11 F13 FBA_D10 FBA_CMD10 G24 CMDA11 100_0804_8P4R_5%
MDA12 C13 FBA_D11 FBA_CMD11 F27 CMDA12
FBA_D12 FBA_CMD12 2 2
MDA13 B13 G25 CMDA13 RP44
MDA14 E13 FBA_D13 FBA_CMD13 G27 CMDA14 CMDA4 1 8 C2088 C2087
N16V-GM MDA15 D13 FBA_D14 FBA_CMD14 G26 CMDA15 A5MUB exchange 2 7 .1U_0402_16V7K .1U_0402_16V7K
VGM@ MDA16 B15 FBA_D15 FBA_CMD15 M24 CMDA16 CMDA12 3 6 1 1
FBA_D16 FBA_CMD16 @ @
SA000088R00 MDA17 C16 M23 CMDA17 4 5
MDA18 A13 FBA_D17 FBA_CMD17 K24 CMDA18 VGA@
MDA19 A15 FBA_D18 FBA_CMD18 K23 CMDA19 100_0804_8P4R_5%
MDA20 B18 FBA_D19 FBA_CMD19 M27 CMDA20
MDA21 A18 FBA_D20 FBA_CMD20 M26 CMDA21 RP45
MDA22 A19 FBA_D21 FBA_CMD21 M25 CMDA22 CMDA8 1 8
MDA23 C19 FBA_D22 FBA_CMD22 K26 CMDA23 A5MUB exchange 2 7
MDA24 B24 FBA_D23 FBA_CMD23 K22 CMDA24 CMDA14 3 6
MDA25 C23 FBA_D24 FBA_CMD24 J23 CMDA25 4 5
MDA26 A25 FBA_D25 FBA_CMD25 J25 CMDA26 VGA@
MDA27 A24 FBA_D26 FBA_CMD26 J24 CMDA27 100_0804_8P4R_5%
MDA28 A21 FBA_D27 FBA_CMD27 K27 CMDA28 PVT modify 01/13
2 MDA29 B21 FBA_D28 FBA_CMD28 K25 CMDA29 DQSA, DQSA# reverse RP46 2
MDA30 C20 FBA_D29 FBA_CMD29 J27 CMDA30 CMDA9 1 8
MDA31 C21 FBA_D30 FBA_CMD30 J26 CMDA31 2 7
MDA32 R22 FBA_D31 FBA_CMD31 A5MUB exchange CMDA29 3 6 +1.5VSDGPU +1.5VSDGPU
FBA_D32 DQMA[3..0] <20,21>
MDA33 R24 D19 DQMA0 4 5
INTERFACE A
MDA34 T22 FBA_D33 FBA_DQM0 D14 DQMA1 VGA@
FBA_D34 FBA_DQM1 2 2
MDA35 R23 C17 DQMA2 100_0804_8P4R_5%
MDA36 N25 FBA_D35 FBA_DQM2 C22 DQMA3 C2090 C2089
FBA_D36 FBA_DQM3 DQMA[7..4] <22,23>
MDA37 N26 P24 DQMA4 RP47
MEMORY
.1U_0402_16V7K .1U_0402_16V7K
MDA38 N23 FBA_D37 FBA_DQM4 W24 DQMA5 CMDA5 1 8 1 1
FBA_D38 FBA_DQM5 @ @
MDA39 N24 AA25 DQMA6 A5MUB exchange 2 7
NV 15x DG-06803-V03 MDA40
MDA41
V23
V22
FBA_D39
FBA_D40
FBA_DQM6
FBA_DQM7
U25 DQMA7 CMDA13 3
4
6
5 +1.5VSDGPU +1.5VSDGPU
DQSA#[3..0] <20,21>
NV 16x DG-07158-V04 MDA42
MDA43
T23
U22
FBA_D41
FBA_D42 FBA_DQS_RN0
F19
C14
DQSA#0
DQSA#1
VGA@
100_0804_8P4R_5%
FBA_D43 FBA_DQS_RN1 2 2
MDA44 Y24 A16 DQSA#2
MDA45 AA24 FBA_D44 FBA_DQS_RN2 A22 DQSA#3 RP48 C2091 C2092
FBA_D45 FBA_DQS_RN3 DQSA#[7..4] <22,23>
MDA46 Y22 P25 DQSA#4 CMDA6 1 8 .1U_0402_16V7K .1U_0402_16V7K
MDA47 AA23 FBA_D46 FBA_DQS_RN4 W22 DQSA#5 A5MUB exchange 2 7 1 1
FBA_D47 FBA_DQS_RN5 @ @
MDA48 AD27 AB27 DQSA#6 CMDA7 3 6
MDA49 AB25 FBA_D48 FBA_DQS_RN6 T27 DQSA#7 4 5
MDA50 AD26 FBA_D49 FBA_DQS_RN7 VGA@ +1.5VSDGPU
FBA_D50 DQSA[3..0] <20,21>
MDA51 AC25 E19 DQSA0 100_0804_8P4R_5%
MDA52 AA27 FBA_D51 FBA_DQS_WP0 C15 DQSA1
FBA_D52 FBA_DQS_WP1 2
MDA53 AA26 B16 DQSA2 RP49
MDA54 W26 FBA_D53 FBA_DQS_WP2 B22 DQSA3 CMDA27 1 8 C2093
FBA_D54 FBA_DQS_WP3 DQSA[7..4] <22,23>
SM010019400 3000ma 33ohm@100mhz DCR 0.05 MDA55 Y25 R25 DQSA4 2 7 .1U_0402_16V7K
MDA56 R26 FBA_D55 FBA_DQS_WP4 W23 DQSA5 CMDA30 3 6 1
FBA_D56 FBA_DQS_WP5 @
MDA57 T25 AB26 DQSA6 4 5
MDA58 N27 FBA_D57 FBA_DQS_WP6 T26 DQSA7 VGA@
+1.05VSDGPU MDA59 R27 FBA_D58 FBA_DQS_WP7 100_0804_8P4R_5%
MDA60 V26 FBA_D59
VGA@
15+55mA MDA61 V27 FBA_D60 RP50
3 2 1 L2002 +FB_PLLAVDD MDA62 W27 FBA_D61 CMDA28 1 8 3
CHILISIN PBY160808T-330Y-N MDA63 W25 FBA_D62 A5MUB exchange 2 7
22U_0603_6.3V6M
VGA@ VGA@ VGA@ FBA_D63 D24 CMDA25 3 6

.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
FBA_CLK0 CLKA0 <20,21>

1 1 1 1 F16 D25 4 5
FB_PLLAVDD_1 FBA_CLK0_N CLKA0# <20,21>
P22 VGA@
C2008 FB_PLLAVDD_2 N22 100_0804_8P4R_5%
FBA_CLK1 CLKA1 <22,23>
C2011
C2010
C2009
VGA@ T97 @ D23 M22

2 2 2 2 FB_VREF_PROBE FBA_CLK1_N CLKA1# <22,23>
RP51
D18 CMDA15 1 8
H22 FBA_WCK01 C18 A5MUB exchange 2 7
FB_DLLAVDD FBA_WCK01_N D17 CMDA11 3 6
Place Near GPU Place Under F16 P22 H22 1 VGA@ 2 FB_CLAMP F3 FBA_WCK23 D16 4 5
10K_0402_5% R2028 FB_CLAMP FBA_WCK23_N T24 VGA@
FBA_WCK45 U24 100_0804_8P4R_5%
60.4_0402_1% 1 @ 2 R2020FBA_CMD34 F22 FBA_WCK45_N V24
60.4_0402_1% 1 @ 2 R2022FBA_CMD35 J22 FBA_CMD34 FBA_WCK67 V25
change to 1.35VSDGPU +1.5VSDGPU FBA_CMD35 FBA_WCK67_N
@
4 4

N16X VRAM 2/9
WWW.AliSaler.Com AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
A B C D E
A B C D E
UGPU1C MULTI LEVEL STRAPS

Part 3 of 6 F11
AC3 NC AD10 +3VSDGPU_AON +3VSDGPU_MAIN
AC4 NC NC AD7
Y4 NC NC B19 strap0 strap1 strap2 strap3 strap4
Y3 NC FBA_CMD32 V5
1
AA3 NC NC V6
AA2 NC NC G1 R2029 R2030 R2031 R2032 R2033 R2035 R2036 R2037
AB1 NC NC G2 SGT@ @ VGM@ @ @ X76@ VGM@ VGM@
NC NC
NC
AA1 G3 49.9K_0402_1% 4.99K_0402_1% 10K_0402_1% 4.99K_0402_1% 10K_0402_1% 30K_0402_1% 4.99K_0402_1% 4.99K_0402_1%
AA4 NC NC G4
2
AA5 NC NC G5
1 NC NC 1
G6
NC G7 STRAP0
AB5 NC V1 STRAP1 ROM_SI
AB4 NC NC V2 STRAP2 ROM_SO
AB3 NC NC W1 STRAP3 ROM_SCLK
AB2 NC NC W2 STRAP4
AD3 NC NC W3
AD2 NC NC W4
NC NC
1
AE1
AD1 NC R2038 R2039 R2040 R2041 R2042 R2044 R2045 R2046
AD4 NC @ VGM@ @ VGM@ VGM@ X76@ SGT@ SGT@
NC For GC62.0 use
AD5 D11 R2050 1 @ 2 10K_0402_5% N14x for CEC ,NC 4.99K_0402_1% 45.3K_0402_1% 15K_0402_1% 4.99K_0402_1% 45.3K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1%
NC BUFRST_N
N15x for GPIO8
2
D10
T2 NC
T3 NC E9 SYS_PEX_RST_MON#
NC GPIO8 SYS_PEX_RST_MON# <15>
T1
R1 NC E10
R2 NC NC
GENERAL
NC
LVDS/TMDS
R3 F10
N2 NC NC
N3 NC
NC D1 STRAP0
STRAP0 D2 STRAP1
V3 STRAP1 E4 STRAP2
V4 NC STRAP2 E3 STRAP3
U3 NC STRAP3 D3 STRAP4
NC STRAP4 N16VGM Option Component
U4 C1
T4 NC NC
T5 NC STRAP0 ---> R2029 2 VGM@1 45.3K_0402_1% SD034453280
R4 NC F6 MULTI_STRAP_REF0_GND 1 VGA@ 2
R5 NC MULTI_STRAP_REF0_GND F4 R2051 40.2K_0402_1%
NC NC F5
2 NC 2
N1
M1 NC
M2 NC F12
M3 NC THERMDP
K2 NC E12
K3 NC THERMDN
K1 NC
J1 NC
NC
M4 F2 VCCSENSE_VGA
M5 NC VDD_SENSE VCCSENSE_VGA <51>
L3 NC
L4 NC
K4 NC
NC
K5
J4 NC F1 VSSSENSE_VGA
For N16S-GT Binary strap table Decive ID : 0x1347
NC GND_SENSE VSSSENSE_VGA <51>
GPU VRAM RANK X76 Freq Memory Size Memory Config strap0 strap1 strap2 strap3 strap4 ROM_SI ROM_SO ROM_SCLK
Voltage
X76615BOL13 0xC (SA00008DN10) Hynix H5TC4G63CFR-N0C
J5 PU 24.9K
N4 NC 1GHz 256Mx16x8
NC TEST X76615BOL12 0x1 (SA000077K20) Micron MT41J256M16HA-093G:E
N5 +1.5V Dual 4G PD 10K
NC
N16S-GT X76615BOL05 0x2 (SA000076P20) Samsung K4W4G1646D-BC1A
P3 AD9 TESTMODE R2054 1 VGA@ 2 10K_0402_5% PU 49.9K NC NC NC NC PD 15K PD 4.99K PD 4.99K
P4 NC TESTMODE AE5 PAD @ T24
NC JTAG_TCK
JTAG_TCK_VGA X76615BOL03 0x5 (SA00008DN10) Hynix H5TC4G63CFR-N0C
AE6 JTAG_TDI PAD @ T1 PD 30.1K
JTAG_TDI AF6 PAD @ T186 1GHz 256Mx16x4
JTAG_TDO
JTAG_TDO X76615BOL11 0x1 (SA000077K20) Micron MT41J256M16HA-093G:E
J2 AD6 JTAG_TMS PAD @ T3 +1.5V Single 2G PD 10K
J3 NC JTAG_TMS AG4 JTAG_RST R2053 1 VGA@ 210K_0402_5%
NC JTAG_TRST_N X76615BOL04 0x2 (SA000076P20) Samsung K4W4G1646D-BC1A PD 15K
3 3
H3
H4 NC
NC SERIAL
D12
For N16V-GM Binary strap table Decive ID : 0x1299
ROM_CS_N B12 ROM_SI GPU VRAM RANK X76 Freq Memory Size Memory Config strap0 strap1 strap2 strap3 strap4 ROM_SI ROM_SO ROM_SCLK
ROM_SI A12 ROM_SO Voltage
ROM_SO C12 ROM_SCLK
ROM_SCLK X76615BOL09 0xA (SA00008DN10) Hynix H5TC4G63CFR-N0C PU 15K
X76615BOL08 0xD (SA000077K20) Micron MT41J256M16HA-093G:E
GM108-ES-S-A1_FCBGA595 +1.35V Dual 900MHz 256Mx16x8 PU 30.1K
@ X76615BOL10 4G
N16V-GM 0xC (SA000076P20) Samsung K4W4G1646D-BC1A PU 24.9K
VGA Power Sequence X76615BOL01 PU 45.3K PD 45.3K PU 10K PD 4.99K PD 45.3K PU 4.99K PU 4.99K
0x9 (SA00008DN10) Hynix H5TC4G63CFR-N0C PU 10K
X76615BOL07 0x1 (SA000077K20) Micron MT41J256M16HA-093G:E
+1.5V Single 1GHz 256Mx16x4 PD 10K
X76615BOL02 2G
0x4 (SA000076P20) Samsung K4W4G1646D-BC1A PD 24.9K
4 4

N16X LVDS 3/9
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
A B C D E
A B C D E
NV 15x DG-06803-V03
NV 16x DG-07158-V04
1 1
UGPU1D +1.05VSDGPU
+1.5VSDGPU 3.24A 1.275A
Part 4 of 6
B26 AA10
.1U_0402_16V7K
.1U_0402_16V7K
4.7U_0603_6.3V6K
C25 FBVDDQ_01 PEX_IOVDDQ_1 AA12
10U_0603_6.3V6M
22U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
C2039 FBVDDQ_02 PEX_IOVDDQ_2
C2040
C2032
C2033
C2021
C2022
C2013
C2014
C2016
C2017
1 1 1 1 2 2 E23 AA13 1 1 1 1
E26 FBVDDQ_03 PEX_IOVDDQ_3 AA16
F14 FBVDDQ_04 PEX_IOVDDQ_4 AA18
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ F21 FBVDDQ_05 PEX_IOVDDQ_5 AA19 VGA@ VGA@ VGA@ VGA@
2 2 2 2 1 1 G13 FBVDDQ_06 PEX_IOVDDQ_6 AA20 2 2 2 2
G14 FBVDDQ_07 PEX_IOVDDQ_7 AA21
G15 FBVDDQ_08 PEX_IOVDDQ_8 AB22
Under GPU G16 FBVDDQ_09 PEX_IOVDDQ_9 AC23
G18 FBVDDQ_10 PEX_IOVDDQ_10 AD24
G19 FBVDDQ_11 PEX_IOVDDQ_11 AE25
10U_0603_6.3V6M
FBVDDQ_12 PEX_IOVDDQ_12 Under GPU Near GPU
C2045
C2047
G20 AF26
22U_0603_6.3V6M
1 1 FBVDDQ_13 PEX_IOVDDQ_13 Midway GPU & Power supply
G21 AF27
H24 FBVDDQ_14 PEX_IOVDDQ_14
VGA@ VGA@ H26 FBVDDQ_AON
2 2 J21 FBVDDQ_AON AA22
K21 FBVDDQ_AON PEX_IOVDD_1 AB23
L22 FBVDDQ_AON PEX_IOVDD_2 AC24
L24 FBVDDQ_19 PEX_IOVDD_3 AD25
Near GPU
POWER
L26 FBVDDQ_20 PEX_IOVDD_4 AE26
M21 FBVDDQ_21 PEX_IOVDD_5 AE27
2 N21 FBVDDQ_22 PEX_IOVDD_6 2
R21 FBVDDQ_23
T21 FBVDDQ_24
V21 FBVDDQ_25 +3VSDGPU_AON
W21 FBVDDQ_26
FBVDDQ_27 G10
3V3_AON G12
.1U_0402_16V7K
1U_0402_6.3V6K
56mA
4.7U_0603_6.3V6K
3V3_AON
C2048
C2049
C2050
G8 2 1 1
VDD33_3 G9
VDD33_4
VGA@ VGA@ VGA@
V7 1 2 2
W7 NC +1.5VSDGPU
AA6 NC
W6 NC D22 FB_CAL_PD_VDDQ 1 VGA@ 2
NC FB_CAL_PD_VDDQ Under GPU Near GPU
Y6 40.2_0402_1% R2078 +3VSDGPU_MAIN
NC
C24 FB_CAL_PU_GND 1 VGA@ 2
FB_CAL_PU_GND 42.2_0402_1% R2079
.1U_0402_16V7K
.1U_0402_16V7K
1U_0402_6.3V6K
4.7U_0603_6.3V6K
C2051
C2052
C2053
C2054
M7 B25 FB_CAL_TERM_GND1 VGA@ 2 2 2 1 1
N7 NC FB_CAL_TERM_GND 51.1_0402_1% R2080
T6 NC
P6 NC VGA@ VGA@ VGA@ VGA@
NC 1 1 2 2
T7 Under GPU Near GPU

R7 IFPD_PLLVDD_2 +3VSDGPU_AON
U6 NC
R6 IFPD_RSET AA8
286mA
NC PEX_PLL_HVDD_1 AA9
PEX_PLL_HVDD_2
.1U_0402_16V7K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
AB8
C2034
C2035
C2036
3 3
PEX_SVDD_3V3 2 1 1
J7 VGA@ VGA@ VGA@

K7 NC 1 2 2
K6 NC AA14
H6 NC PEX_PLLVDD_1 AA15
J6 NC PEX_PLLVDD_2
NC Near GPU +1.05VSDGPU
130mA R2075
+PEX_PLLVDD 1 @ 2 0_0603_5%
C2041
C2042
C2043
.1U_0402_16V7K
1U_0402_6.3V6K
4.7U_0603_6.3V6K
2 1 1
@
VGA@ VGA@ VGA@
1 2 2
Under GPU Near GPU
4 4

N16X POWER & GND 4/9
Custom 1.0
A B C D E
A B C D E
UGPU1F
UGPU1E +VGA_CORE +VGA_CORE
A2 Part 5 of 6 K11
Part 6 of 6 NV 15x DG-06803-V03
A26
AB11
GND_001
GND_002
GND_057
GND_058
K13
K15
K10
K12 VDD_001 VDD_041
V18
V16
NV 16x DG-07158-V04
1 GND_003 GND_059 VDD_002 VDD_040 1
AB14 K17 K14 V14
AB17 GND_004 GND_060 L10 K16 VDD_003 VDD_039 V12
AB20 GND_005 GND_061 L12 K18 VDD_004 VDD_038 V10
AB24 GND_006 GND_062 L14 L11 VDD_005 VDD_037 U17
GND_007 GND_063 VDD_006 VDD_036
POWER
AC2 L16 L13 U15
AC22 GND_008 GND_064 L18 L15 VDD_007 VDD_035 U13
AC26 GND_009 GND_065 L2 L17 VDD_008 VDD_034 U11
AC5 GND_010 GND_066 L23 M10 VDD_009 VDD_033 T18
AC8 GND_011 GND_067 L25 M12 VDD_010 VDD_032 T16
AD12 GND_012 GND_068 L5 M14 VDD_011 VDD_031 T14
AD13 GND_013 GND_069 M11 M16 VDD_012 VDD_030 T12
AD15 GND_014 GND_070 M13 M18 VDD_013 VDD_029 T10
AD16 GND_015 GND_071 M15 N11 VDD_014 VDD_028 R17
AD18 GND_016 GND_072 M17 N13 VDD_015 VDD_027 R15
AD19 GND_017 GND_073 N10 N15 VDD_016 VDD_026 R13
AD21 GND_018 GND_074 N12 N17 VDD_017 VDD_025 R11
AD22
AE11
GND_019
GND_020
GND_075
GND_076
N14
N16
P10
P12
VDD_018
VDD_019
VDD_024
VDD_023
P18
P16
DA-07312-V02
AE14 GND_021 GND_077 N18 VDD_020 VDD_022 P14
AE17 GND_022 GND_078 P11 VDD_021
AE20 GND_023 GND_079 P13
AF1 GND_024 GND_080 P15
AF11 GND_025 GND_081 P17
GND
AF14 GND_026 GND_082 P2
AF17 GND_027 GND_083 P23
AF20 GND_028 GND_084 P26
AF23 GND_029 GND_085 P5
AF5 GND_030 GND_086 R10
AF8 GND_031 GND_087 R12 GM108-ES-S-A1_FCBGA595
AG2 GND_032 GND_088 R14 @
AG26 GND_033 GND_089 R16
B1 GND_034 GND_090 R18
B11 GND_035 GND_091 T11
2 B14 GND_036 GND_092 T13 2
B17 GND_037 GND_093 T15
B20 GND_038 GND_094 T17
B23 GND_039 GND_095 U10
B27 GND_040 GND_096 U12
B5 GND_041 GND_097 U14
B8 GND_042 GND_098 U16
E11 GND_043 GND_099 U18
E14 GND_044 GND_100 U2
E17 GND_045 GND_101 U23
E2 GND_046 GND_102 U26
E20 GND_047 GND_103 U5
E22 GND_048 GND_104 V11
E25 GND_049 GND_105 V13
E5 GND_050 GND_106 V15
E8 GND_051 GND_107 V17
H2 GND_052 GND_108 Y2
H23 GND_053 GND_109 Y23
H25 GND_054 GND_110 Y26
H5 GND_055 GND_111 Y5
GND_056 GND_112
DA-07314-V02
AA7
GND AB7
GND
@
3 3
4 4

N16X POWER & GND 5/9
Custom 1.0
A B C D E
A B C D E
VRAM DDR3 chips <16,21,22,23> DQSA[7..0]

DQSA[7..0]
DQSA#[7..0]
<16,21,22,23> DQSA#[7..0]
DQMA[7..0]
<16,21,22,23> DQMA[7..0]
MDA[63..0]
<16,21,22,23> MDA[63..0]
CMDA[30..0]
<16,21,22,23> CMDA[30..0]
Lower Rank 0 BOT SIDE Rank0 Rank1

Mode E
X76 Address 0..31 32..63 0..31 32..63
1 1
CMD0 ODT ODT

U2004 X76@ U2005 X76@ CMD1 CS1*
+MEM_VREFCA0 M8 E3 MDA20 +MEM_VREFCA0 M8 E3 MDA25 CMD2 CS0*
+MEM_VREFDQ0 H1 VREFCA DQL0 F7 MDA16 +MEM_VREFDQ0 H1 VREFCA DQL0 F7 MDA30
VREFDQ DQL1 F2 VREFDQ DQL1 F2
DQL2
MDA21
DQL2
MDA24 CMD3 CKE CKE
CMDA7 N3 F8 MDA19 CMDA7 N3 F8 MDA28
CMDA10 P7 A0 DQL3 H3 MDA23 Group2 CMDA10 P7 A0 DQL3 H3 MDA27 Group3
A1 DQL4 A1 DQL4 CMD4 A9 A9 A11 A11
CMDA24 P3 H8 MDA18 CMDA24 P3 H8 MDA31
CMDA6 N2 A2 DQL5 G2 MDA22 CMDA6 N2 A2 DQL5 G2 MDA26
CMDA22 P8 H7 MDA17 CMDA22 P8 H7 MDA29
P2 A4 DQL7 P2 A4 DQL7
CMDA26
A5
CMDA26
A5 CMD6 A3 A3 BA1 BA1
CMDA5 R8 V0.2 modify CMDA5 R8
R2 A6 D7 R2 A6 D7
CMDA21
A7 DQU0
MDA12 CMDA21
A7 DQU0
MDA6 CMD7 A0 A0 A12 A12
CMDA8 T8 C3 MDA9 CMDA8 T8 C3 MDA1
R3 A8 DQU1 C8 R3 A8 DQU1 C8
CMDA4
A9 DQU2
MDA14 CMDA4
A9 DQU2
CMDA25 L7 C2 MDA11 CMDA25 L7 C2 MDA2
CMDA23 R7 A10/AP DQU3 A7 MDA13 Group1 CMDA23 R7 A10/AP DQU3 A7 MDA5 Group0
A11 DQU4 A11 DQU4 CMD9 A12 A12 A0 A0
CMDA9 N7 A2 MDA10 CMDA9 N7 A2 MDA0
CMDA12 T3 A12 DQU5 B8 MDA15 CMDA12 T3 A12 DQU5 B8 MDA7
CMDA14 T7 A3 MDA8 CMDA14 T7 A3 MDA3
M7 A14 DQU7 M7 A14 DQU7
A15/BA3 +1.5VSDGPU A15/BA3 +1.5VSDGPU
CMD11 RAS* RAS* RAS* RAS*
CMD12 A13 A13 A14 A14
CMDA29 M2 B2 CMDA29 M2 B2
N8 BA0 VDD D9 N8 BA0 VDD D9
CMDA13
BA1 VDD
CMDA13
BA1 VDD CMD13 BA1 BA1 A3 A3
CMDA27 M3 G7 CMDA27 M3 G7
BA2 VDD K2 BA2 VDD K2
VDD VDD CMD14 A14 A14 A13 A13
K8 K8
VDD N1 VDD N1
VDD VDD CMD15 CAS* CAS* CAS* CAS*
CLKA0 J7 N9 CLKA0 J7 N9
2 K7 CK VDD R1 K7 CK VDD R1 2
CLKA0#
CK VDD
CLKA0#
CK VDD CMD16 ODT ODT
CMDA3 K9 R9 CMDA3 K9 R9
CKE/CKE0 VDD +1.5VSDGPU CKE/CKE0 VDD +1.5VSDGPU CMD17 CS1*
CMDA0 K1 A1 CMDA0 K1 A1 CMD18 CS0*
CMDA2 L2 ODT/ODT0 VDDQ A8 CMDA2 L2 ODT/ODT0 VDDQ A8
CMDA11 J3 CS/CS0 VDDQ C1 CMDA11 J3 CS/CS0 VDDQ C1
RAS VDDQ RAS VDDQ CMD19 CKE CKE
CMDA15 K3 C9 CMDA15 K3 C9
CMDA28 L3 CAS VDDQ D2 CMDA28 L3 CAS VDDQ D2
WE VDDQ WE VDDQ CMD20 RST RST RST RST
310mAVDDQ E9 E9
F1 VDDQ F1
VDDQ 310mAVDDQ CMD21 A7 A7 A6 A6
DQSA2 F3 H2 DQSA3 F3 H2
C7 DQSL VDDQ H9 C7 DQSL VDDQ H9
DQSA1
DQSU VDDQ
DQSA0
DQSU VDDQ CMD22 A4 A4 A5 A5
CMD23 A11 A11 A9 A9
DQMA2 E7 A9 DQMA3 E7 A9
DQMA1 D3 DML VSS B3 DQMA0 D3 DML VSS B3
DMU VSS DMU VSS CMD24 A2 A2 A1 A1
E1 E1
VSS G8 VSS G8
VSS VSS CMD25 A10 A10 WE* WE*
DQSA#2 G3 J2 DQSA#3 G3 J2
B7 DQSL VSS J8 B7 DQSL VSS J8
DQSA#1
DQSU VSS
DQSA#0
DQSU VSS CMD26 A5 A5 A4 A4
M1 M1
VSS M9 VSS M9
VSS VSS CMD27 BA2 BA2
P1 P1
T2 VSS P9 T2 VSS P9
CMDA20
RESET VSS
CMDA20
RESET VSS CMD28 WE* WE* A10 A10
T1 T1
ZQ0 L8 VSS T9 ZQ1 L8 VSS T9
ZQ/ZQ0 VSS ZQ/ZQ0 VSS CMD29 BA0 BA0 BA0 BA0
1
1
CMD30 BA2 BA2
J1 B1 J1 B1
R2081 VGA@ L1 NC/ODT1 VSSQ B9 R2082 VGA@ L1 NC/ODT1 VSSQ B9
NC/CS1 VSSQ NC/CS1 VSSQ Not Available
243_0402_1% J9 D1 243_0402_1% J9 D1
L9 NC/CE1 VSSQ D8 L9 NC/CE1 VSSQ D8
2
2
3 NCZQ1 VSSQ E2 NCZQ1 VSSQ E2 3
VSSQ E8 VSSQ E8
VSSQ F9 VSSQ F9
VSSQ G1 VSSQ G1
VSSQ VSSQ Command Bit Default Pull-down
G9 G9
VSSQ VSSQ
ODTx 10k
96-BALL 96-BALL
SDRAM DDR3 SDRAM DDR3 DDR3 CKEx 10k
H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96 RST 10k
CS* No Termination
CLKA0
<16,21> CLKA0
1
VGA@
R2087
162_0402_1% +1.5VSDGPU +1.5VSDGPU
2
CLKA0#
<16,21> CLKA0#
R2085 R2086
VGA@ VGA@
1.33K_0402_1% 1.33K_0402_1%
+MEM_VREFCA0 +MEM_VREFCA0 <21> +MEM_VREFDQ0 +MEM_VREFDQ0 <21>
1 1
CMDA0 R2093 1 VGA@ 2 10K_0402_5% R2091 R2092
CMDA3 R2094 1 VGA@ 2 10K_0402_5% VGA@ C2055 VGA@ C2056
+1.5VSDGPU CMDA16 R2095 1 VGA@ 2 10K_0402_5% 1.33K_0402_1% .1U_0402_16V7K 1.33K_0402_1% .1U_0402_16V7K
CMDA19 R2098 1 VGA@ 2 10K_0402_5% 2 2
VGA@ VGA@
4 CMDA20 R2099 1 VGA@ 2 10K_0402_5% 4
C2079
C2080
C2081
C2082
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
C2071
C2072
C2073
C2074
C2075
C2076
C2077
C2078
1 1 1 1 1 1 1 1 1 1 1 1
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
2 2 2 2 2 2 2 2 2 2 2 2

N16X Upper Rank0 6/9
Custom 1.0
A B C D E
A B C D E

DQSA[7..0]
DQSA#[7..0]
<16,20,22,23> DQSA#[7..0]
DQMA[7..0]
<16,20,22,23> DQMA[7..0]
MDA[63..0]
<16,20,22,23> MDA[63..0]
CMDA[30..0]
<16,20,22,23> CMDA[30..0]
Lower Rank 1 TOP SIDE
1 1
Rank0 Rank1
Mode E
Address 0..31 32..63 0..31 32..63
U2007 X76@ CMD0 ODT ODT
U2006 X76@
+MEM_VREFCA0 M8 E3 MDA30 CMD1 CS1*
+MEM_VREFCA0 M8 E3 MDA16 +MEM_VREFDQ0 H1 VREFCA DQL0 F7 MDA25
<20> +MEM_VREFCA0 VREFCA DQL0 VREFDQ DQL1
+MEM_VREFDQ0 H1 F7 MDA20 F2 MDA28 CMD2 CS0*
<20> +MEM_VREFDQ0 VREFDQ DQL1 DQL2
F2 MDA19 CMDA9 N3 F8 MDA24
CMDA9 N3 DQL2 F8 MDA21 CMDA24 P7 A0 DQL3 H3 MDA29 Group3
A0 DQL3 A1 DQL4 CMD3 CKE CKE
CMDA24 P7 H3 MDA17 Group2 CMDA10 P3 H8 MDA26
P3 A1 DQL4 H8 N2 A2 DQL5 G2
CMDA10
A2 DQL5
MDA22 CMDA13
A3 DQL6
CMDA13 N2 G2 MDA18 CMDA26 P8 H7 MDA27
P8 A3 DQL6 H7 P2 A4 DQL7
CMDA26
A4 DQL7
MDA23 CMDA22
A5 CMD5 A6 A6 A7 A7
CMDA22 P2 CMDA21 R8
R8 A5 R2 A6 D7
CMDA21
A6 V0.2 modify CMDA5
A7 DQU0
MDA1 CMD6 A3 A3 BA1 BA1
CMDA5 R2 D7 MDA9 CMDA8 T8 C3 MDA6
CMDA8 T8 A7 DQU0 C3 MDA12 CMDA23 R3 A8 DQU1 C8 MDA2
CMDA23 R3 C8 MDA11 CMDA28 L7 C2 MDA4
CMDA28 L7 A9 DQU2 C2 MDA14 CMDA4 R7 A10/AP DQU3 A7 MDA3 Group0
A10/AP DQU3 A11 DQU4 CMD8 A8 A8 A8 A8
CMDA4 R7 A7 MDA8 Group1 CMDA7 N7 A2 MDA7
N7 A11 DQU4 A2 T3 A12 DQU5 B8
CMDA7
A12 DQU5
MDA15 CMDA14
A13 DQU6
CMDA14 T3 B8 MDA10 CMDA12 T7 A3 MDA5
T7 A13 DQU6 A3 M7 A14 DQU7
CMDA12
A14 DQU7
MDA13
A15/BA3 +1.5VSDGPU
CMD10 A1 A1 A2 A2
M7
A15/BA3 +1.5VSDGPU CMD11 RAS* RAS* RAS* RAS*
CMDA29 M2 B2
CMDA29 M2 B2 CMDA6 N8 BA0 VDD D9
BA0 VDD BA1 VDD CMD12 A13 A13 A14 A14
CMDA6 N8 D9 CMDA30 M3 G7
CMDA30 M3 BA1 VDD G7 BA2 VDD K2
BA2 VDD VDD CMD13 BA1 BA1 A3 A3
K2 K8
2 VDD K8 VDD N1 2
N1 CLKA0 J7 N9
J7 VDD N9 K7 CK VDD R1
<16,20> CLKA0
CLKA0
CK VDD
CLKA0#
CK VDD CMD15 CAS* CAS* CAS* CAS*
CLKA0# K7 R1 CMDA3 K9 R9
<16,20> CLKA0# CK VDD CKE/CKE0 VDD +1.5VSDGPU
CMDA3 K9 R9 CMD16 ODT ODT
CKE/CKE0 VDD +1.5VSDGPU
CMDA0 K1 A1 CMD17 CS1*
CMDA0 K1 A1 CMDA1 L2 ODT/ODT0 VDDQ A8
CMDA1 L2 ODT/ODT0 VDDQ A8 CMDA11 J3 CS/CS0 VDDQ C1
CS/CS0 VDDQ RAS VDDQ CMD18 CS0*
CMDA11 J3 C1 CMDA15 K3 C9
K3 RAS VDDQ C9 L3 CAS VDDQ D2
CMDA15
CAS VDDQ
CMDA25
WE VDDQ CMD19 CKE CKE
CMDA25 L3 D2 310mAVDDQ E9
WE VDDQ E9 F1
310mAVDDQ VDDQ CMD20 RST RST RST RST
F1 DQSA3 F3 H2
F3 VDDQ H2 C7 DQSL VDDQ H9
DQSA2
DQSL VDDQ
DQSA0
DQSU VDDQ CMD21 A7 A7 A6 A6
DQSA1 C7 H9
DQSU VDDQ
CMD22 A4 A4 A5 A5
DQMA3 E7 A9
DQMA2 E7 A9 DQMA0 D3 DML VSS B3
DML VSS DMU VSS CMD23 A11 A11 A9 A9
DQMA1 D3 B3 E1
DMU VSS E1 VSS G8
VSS VSS CMD24 A2 A2 A1 A1
G8 DQSA#3 G3 J2
G3 VSS J2 B7 DQSL VSS J8
DQSA#2
DQSL VSS
DQSA#0
DQSU VSS CMD25 A10 A10 WE* WE*
DQSA#1 B7 J8 M1
DQSU VSS M1 VSS M9
M9 P1
VSS P1 CMDA20 T2 VSS P9
VSS RESET VSS CMD27 BA2 BA2
CMDA20 T2 P9 T1
RESET VSS T1 ZQ3 L8 VSS T9
VSS ZQ/ZQ0 VSS CMD28 WE* WE* A10 A10
ZQ2 L8 T9
ZQ/ZQ0 VSS
1
DR@ CMD29 BA0 BA0 BA0 BA0
1
R2101 J1 B1
DR@ J1 B1 243_0402_1% L1 NC/ODT1 VSSQ B9
NC/ODT1 VSSQ NC/CS1 VSSQ CMD30 BA2 BA2
3 R2100 L1 B9 J9 D1 3
243_0402_1% J9 NC/CS1 VSSQ D1 L9 NC/CE1 VSSQ D8 Not Available
2
L9 NC/CE1 VSSQ D8 NCZQ1 VSSQ E2
2
NCZQ1 VSSQ E2 VSSQ E8

VSSQ E8 VSSQ F9
VSSQ F9 VSSQ G1
VSSQ G1 VSSQ G9
VSSQ G9 VSSQ
VSSQ Command Bit Default Pull-down
96-BALL
96-BALL SDRAM DDR3 ODTx 10k
SDRAM DDR3 H5TQ2G63BFR-11C_FBGA96
H5TQ2G63BFR-11C_FBGA96 DDR3 CKEx 10k
RST 10k
CS* No Termination
+1.5VSDGPU
C2067
C2068
C2069
C2070
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
C2059
C2060
C2061
C2062
C2063
C2064
C2065
C2066
1 1 1 1 1 1 1 1 1 1 1 1
4
2 2 2 2 2 2 2 2 2 2 2 2 4
DR@ DR@ DR@ DR@ DR@ DR@ DR@ DR@ DR@ DR@ DR@ DR@

N16X Upper Rank1 7/9
Custom 1.0
A B C D E
A B C D E

DQSA[7..0]
DQSA#[7..0]
<16,20,21,23> DQSA#[7..0]
DQMA[7..0]
<16,20,21,23> DQMA[7..0]
<16,20,21,23> MDA[63..0]
MDA[63..0]
CMDA[30..0]
Upper Rank 0 BOT SIDE
<16,20,21,23> CMDA[30..0]
1 Rank0 Rank1 1
Mode E
Address 0..31 32..63 0..31 32..63
U2008 X76@ U2009 X76@
CMD0 ODT ODT
+MEM_VREFCA1 M8 E3 MDA33 +MEM_VREFCA1 M8 E3 MDA50
+MEM_VREFDQ1 H1 VREFCA DQL0 F7 H1 VREFCA DQL0 F7
VREFDQ DQL1
MDA39 +MEM_VREFDQ1
VREFDQ DQL1
MDA52 CMD1 CS1*
F2 MDA32 F2 MDA49
N3 DQL2 F8 N3 DQL2 F8
CMDA7
A0 DQL3
MDA36 CMDA7
A0 DQL3
MDA53 CMD2 CS0*
CMDA10 P7 H3 MDA35 Group4 CMDA10 P7 H3 MDA48 Group6
CMDA24 P3 A1 DQL4 H8 MDA37 CMDA24 P3 A1 DQL4 H8 MDA55
CMDA6 N2 G2 MDA34 CMDA6 N2 G2 MDA51
CMDA22 P8 A3 DQL6 H7 MDA38 CMDA22 P8 A3 DQL6 H7 MDA54
CMDA26 P2 CMDA26 P2
R8 A5 R8 A5
CMDA5
A6 CMD5 A6 A6 A7 A7
CMDA21 R2 D7 MDA56 CMDA21 R2 D7 MDA41
T8 A7 DQU0 C3 T8 A7 DQU0 C3
CMDA8
A8 DQU1
MDA59 CMDA8
A8 DQU1
MDA44 CMD6 A3 A3 BA1 BA1
CMDA4 R3 C8 MDA58 CMDA4 R3 C8 MDA40
L7 A9 DQU2 C2 L7 A9 DQU2 C2
CMDA25
A10/AP DQU3
MDA62 CMDA25
A10/AP DQU3
CMDA23 R7 A7 MDA57 Group7 CMDA23 R7 A7 MDA43 Group5
CMDA9 N7 A11 DQU4 A2 MDA61 CMDA9 N7 A11 DQU4 A2 MDA47
CMDA12 T3 B8 MDA60 CMDA12 T3 B8 MDA42
CMDA14 T7 A13 DQU6 A3 MDA63 CMDA14 T7 A13 DQU6 A3 MDA45
M7 M7
A15/BA3 +1.5VSDGPU A15/BA3 +1.5VSDGPU CMD10 A1 A1 A2 A2
CMDA29 M2 B2 CMDA29 M2 B2 CMD11 RAS* RAS* RAS* RAS*
CMDA13 N8 BA0 VDD D9 CMDA13 N8 BA0 VDD D9
M3 BA1 VDD G7 M3 BA1 VDD G7
CMDA27
BA2 VDD
CMDA27
BA2 VDD CMD12 A13 A13 A14 A14
K2 K2
VDD K8 VDD K8
VDD VDD CMD13 BA1 BA1 A3 A3
N1 N1
CLKA1 J7 VDD N9 CLKA1 J7 VDD N9
CK VDD CK VDD CMD14 A14 A14 A13 A13
CLKA1# K7 R1 CLKA1# K7 R1
2 K9 CK VDD R9 K9 CK VDD R9 2
CMDA19
CMDA19
CMD15 CAS* CAS* CAS* CAS*
CMD16 ODT ODT
CMDA16 K1 A1 CMDA16 K1 A1
L2 ODT/ODT0 VDDQ A8 L2 ODT/ODT0 VDDQ A8
CMDA18
CS/CS0 VDDQ
CMDA18
CS/CS0 VDDQ CMD17 CS1*
CMDA11 J3 C1 CMDA11 J3 C1
CMDA15 K3 RAS VDDQ C9 CMDA15 K3 RAS VDDQ C9
CAS VDDQ CAS VDDQ CMD18 CS0*
CMDA28 L3 D2 CMDA28 L3 D2
WE VDDQ E9 WE VDDQ E9
VDDQ 310mAVDDQ CMD19 CKE CKE
310mAVDDQ F1 F1
F3 H2 F3 VDDQ H2
DQSA4
DQSL VDDQ
DQSA6
DQSL VDDQ CMD20 RST RST RST RST
DQSA7 C7 H9 DQSA5 C7 H9
DQSU VDDQ DQSU VDDQ
CMD21 A7 A7 A6 A6
DQMA4 E7 A9 DQMA6 E7 A9 CMD22 A4 A4 A5 A5
DMU VSS E1 DMU VSS E1
G8 G8
DQSA#4 G3 VSS J2 DQSA#6 G3 VSS J2
DQSL VSS DQSL VSS CMD24 A2 A2 A1 A1
DQSA#7 B7 J8 DQSA#5 B7 J8
DQSU VSS M1 DQSU VSS M1
VSS VSS CMD25 A10 A10 WE* WE*
M9 M9
VSS P1 VSS P1
CMDA20 T2 P9 CMDA20 T2 P9
RESET VSS T1 RESET VSS T1
ZQ5 L8 T9 ZQ4 L8 T9
ZQ/ZQ0 VSS ZQ/ZQ0 VSS
CMD28 WE* WE* A10 A10
1
1
J1 B1 J1 B1 CMD29 BA0 BA0 BA0 BA0
R2083 VGA@ L1 NC/ODT1 VSSQ B9 R2084 VGA@ L1 NC/ODT1 VSSQ B9
243_0402_1% J9 NC/CS1 VSSQ D1 243_0402_1% J9 NC/CS1 VSSQ D1
NC/CE1 VSSQ NC/CE1 VSSQ CMD30 BA2 BA2
L9 D8 L9 D8
2
2
NCZQ1 VSSQ E2 NCZQ1 VSSQ E2
VSSQ VSSQ Not Available
3 E8 E8 3
VSSQ F9 VSSQ F9
VSSQ G1 VSSQ G1
VSSQ G9 VSSQ G9
VSSQ VSSQ
96-BALL 96-BALL
Command Bit Default Pull-down
SDRAM DDR3 SDRAM DDR3
H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96 ODTx 10k
DDR3 CKEx 10k

RST 10k
CS* No Termination
+1.5VSDGPU +1.5VSDGPU
+1.5VSDGPU
R2088 R2089
VGA@ VGA@
1.33K_0402_1% 1.33K_0402_1%
C2102
C2101
C2099
C2105
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
C2098
C2104
C2094
C2103
C2095
C2097
C2100
C2096
1 1 1 1 1 1 1 1 1 1 1 1 CLKA1
<16,23> CLKA1
+MEM_VREFCA1 +MEM_VREFCA1 <23> +MEM_VREFDQ1 +MEM_VREFDQ1 <23>
1
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ 1 1 VGA@
2 2 2 2 2 2 2 2 2 2 2 2 R2096 R2097 R2103
VGA@ C2057 VGA@ C2058 162_0402_1%
1.33K_0402_1% .1U_0402_16V7K 1.33K_0402_1% .1U_0402_16V7K
2
4
2 2 CLKA1# 4
VGA@ VGA@ <16,23> CLKA1#

N16X Lower Rank0 8/9
Custom 1.0
A B C D E
A B C D E

DQSA[7..0]
DQSA#[7..0]
<16,20,21,22> DQSA#[7..0]
DQMA[7..0]
<16,20,21,22> DQMA[7..0]
MDA[63..0]
<16,20,21,22> MDA[63..0]
CMDA[30..0]
<16,20,21,22> CMDA[30..0]
Upper Rank 1 TOP SIDE

1 1
Rank0 Rank1
Mode E
Address 0..31 32..63 0..31 32..63
CMD0 ODT ODT
U2010 X76@ U2011 X76@
CMD1 CS1*
+MEM_VREFCA1 M8 E3 MDA39 +MEM_VREFCA1 M8 E3 MDA52
<22> +MEM_VREFCA1 VREFCA DQL0 VREFCA DQL0
+MEM_VREFDQ1 H1 F7 MDA33 +MEM_VREFDQ1 H1 F7 MDA50 CMD2 CS0*
<22> +MEM_VREFDQ1 VREFDQ DQL1 VREFDQ DQL1
F2 MDA36 F2 MDA53
CMDA9 N3 DQL2 F8 MDA32 CMDA9 N3 DQL2 F8 MDA49
CMDA24 P7 H3 MDA38 Group4 CMDA24 P7 H3 MDA54 Group6
P3 A1 DQL4 H8 P3 A1 DQL4 H8
CMDA10
A2 DQL5
MDA34 CMDA10
A2 DQL5
CMDA13 N2 G2 MDA37 CMDA13 N2 G2 MDA55
P8 A3 DQL6 H7 P8 A3 DQL6 H7
CMDA26
A4 DQL7
MDA35 CMDA26
A4 DQL7
CMDA22 P2 CMDA22 P2
R8 A5 R8 A5
CMDA21
A6 CMD6 A3 A3 BA1 BA1
CMDA5 R2 D7 MDA59 CMDA5 R2 D7 MDA44
CMDA8 T8 A7 DQU0 C3 MDA56 CMDA8 T8 A7 DQU0 C3 MDA41
CMDA23 R3 C8 MDA62 CMDA23 R3 C8 MDA46
CMDA28 L7 A9 DQU2 C2 MDA58 CMDA28 L7 A9 DQU2 C2 MDA40
A10/AP DQU3 A10/AP DQU3 CMD8 A8 A8 A8 A8
CMDA4 R7 A7 MDA63 Group7 CMDA4 R7 A7 MDA45 Group5 A5MUB SWAP
N7 A11 DQU4 A2 N7 A11 DQU4 A2
CMDA7
A12 DQU5
MDA60 CMDA7
A12 DQU5
CMDA14 T3 B8 MDA61 CMDA14 T3 B8 MDA47
T7 A13 DQU6 A3 T7 A13 DQU6 A3
CMDA12
A14 DQU7
MDA57 CMDA12
A14 DQU7
M7 M7
A15/BA3 +1.5VSDGPU A15/BA3 +1.5VSDGPU CMD11 RAS* RAS* RAS* RAS*
CMDA29 M2 B2 CMDA29 M2 B2 CMD12 A13 A13 A14 A14
CMDA6 N8 BA0 VDD D9 CMDA6 N8 BA0 VDD D9
CMDA30 M3 BA1 VDD G7 CMDA30 M3 BA1 VDD G7
BA2 VDD BA2 VDD CMD13 BA1 BA1 A3 A3
K2 K2
2 VDD K8 VDD K8 2
N1 N1
J7 VDD N9 J7 VDD N9
<16,22> CLKA1
CLKA1
CK VDD
CLKA1
CK VDD CMD15 CAS* CAS* CAS* CAS*
CLKA1# K7 R1 CLKA1# K7 R1
<16,22> CLKA1# CK VDD CK VDD
CMDA19 K9 R9 CMDA19 K9 R9 CMD16 ODT ODT
CKE/CKE0 VDD +1.5VSDGPU CKE/CKE0 VDD +1.5VSDGPU
CMD17 CS1*
CMDA16 K1 A1 CMDA16 K1 A1
CMDA17 L2 ODT/ODT0 VDDQ A8 CMDA17 L2 ODT/ODT0 VDDQ A8
CS/CS0 VDDQ CS/CS0 VDDQ CMD18 CS0*
CMDA11 J3 C1 CMDA11 J3 C1
K3 RAS VDDQ C9 K3 RAS VDDQ C9
CMDA15
CAS VDDQ
CMDA15
CAS VDDQ CMD19 CKE CKE
CMDA25 L3 D2 CMDA25 L3 D2
WE VDDQ E9 WE VDDQ E9
310mAVDDQ 310mAVDDQ CMD20 RST RST RST RST
F1 F1
F3 VDDQ H2 F3 VDDQ H2
DQSA4
DQSL VDDQ
DQSA6
DQSL VDDQ CMD21 A7 A7 A6 A6
DQSA7 C7 H9 DQSA5 C7 H9
DQSU VDDQ DQSU VDDQ
CMD22 A4 A4 A5 A5
DQMA4 E7 A9 DQMA6 E7 A9 CMD23 A11 A11 A9 A9
DMU VSS E1 DMU VSS E1
G8 G8
G3 VSS J2 G3 VSS J2
DQSA#4
DQSL VSS
DQSA#6
DQSL VSS CMD25 A10 A10 WE* WE*
DQSA#7 B7 J8 DQSA#5 B7 J8
DQSU VSS M1 DQSU VSS M1
M9 M9
VSS P1 VSS P1
CMDA20 T2 P9 CMDA20 T2 P9
RESET VSS T1 RESET VSS T1
VSS VSS CMD28 WE* WE* A10 A10
ZQ6 L8 T9 ZQ7 L8 T9
ZQ/ZQ0 VSS ZQ/ZQ0 VSS
CMD29 BA0 BA0 BA0 BA0
1
1
J1 B1 J1 B1 CMD30 BA2 BA2
3 R2090 L1 NC/ODT1 VSSQ B9 R2102 L1 NC/ODT1 VSSQ B9 3
243_0402_1% J9 NC/CS1 VSSQ D1 243_0402_1% J9 NC/CS1 VSSQ D1
NC/CE1 VSSQ NC/CE1 VSSQ Not Available
DR@ L9 D8 DR@ L9 D8
2
2
NCZQ1 VSSQ E2 NCZQ1 VSSQ E2
VSSQ E8 VSSQ E8
VSSQ F9 VSSQ F9
VSSQ G1 VSSQ G1
VSSQ G9 VSSQ G9
VSSQ VSSQ Command Bit Default Pull-down
96-BALL 96-BALL ODTx 10k
SDRAM DDR3 SDRAM DDR3
H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96 DDR3 CKEx 10k
RST 10k
CS* No Termination
+1.5VSDGPU
C2146
C2109
C2108
C2106
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
C2110
C2151
C2147
C2150
C2148
C2149
C2107
C2152
1 1 1 1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2 2 2 2
DR@ DR@ DR@ DR@ DR@ DR@ DR@ DR@ DR@ DR@ DR@ DR@
4 4

N16X Lower Rank1 9/9
Custom 1.0
A B C D E
A B C D E
Place closed to JEDP1

+LCDVDD
+3VS
LCD POWER CIRCUIT 1 1

LCD/ LED PANEL Conn.
SM010014520 3000ma
220ohm@100mhz C376 C419
+3VS +LCDVDD .1U_0402_16V7K .1U_0402_16V7K
DCR 0.04 2 2
U8 W=60mils EMC@ @
5 1 EMC@
1 IN OUT +19VB L11 +INVPWR_B+ 1
2 HCB2012KF-221T30_2P
1 GND 1 W=60mils 1 2
W=60mils JEDP1
4 3
W=60mils 1
C140 C367 +INVPWR_B+
1U_0402_6.3V6K EN OC 4.7U_0603_6.3V6K 2 1 41
2 2 1 1 2 G1
SY6288C20AAC_SOT23-5 @EMC@ @EMC@ 3 42
C365 C364 4 3 G2 43
68P_0402_50V8J 1000P_0402_50V7K 5 4 G3 44
2 2 INVT_PWM_SOC 6 5 G4 45
EC_BKOFF# 7 6 G5 46
<6> ENVDD 8 7 G6
<31> EDP_HPD_CONN 9 8
+LCDVDD 9
10
11 10
12 11
EDP_AUXN_C 13 12
EDP_AUXP_C 14 13
15 14
EDP_TXP0_C 16 15
EDP_TXN0_C 17 16
EC_BKOFF# R280 1 @ 2 10K_0402_5% 18 17
<34> EC_BKOFF# EDP_TXP1_C 19 18
@EMC@ EDP_TXN1_C 20 19
C529 1 2 220P_0402_50V7K 21 20
22 21
23 22
INVT_PWM_SOC R393 1 @ 2100K_0402_5% 24 23
<6> INVT_PWM_SOC 25 24
@EMC@ 26 25
eDP C550 1 2 220P_0402_50V7K
+TS_PWR
27 26
27
28
TS_EN 29 28
2 <34> TS_EN 29 2
C375 1 2 0.1U_0402_16V7K EDP_TXN0_C 30
<6> EDP_TXN0 <9> USB20_P3 30
C409 1 2 0.1U_0402_16V7K EDP_TXP0_C USB TS 31
<6> EDP_TXP0 <9> USB20_N3 32 31
I2C2_SCL_PNL
<8> I2C2_SCL_PNL I2C2_SDA_PNL 33 32
<8> I2C2_SDA_PNL TS_RST# 34 33
<34> TS_RST# TS_INT# 35 34
<31> TS_INT# 35
C387 1 2 0.1U_0402_16V7K EDP_TXN1_C 36
<6> EDP_TXN1 36
C390 1 2 0.1U_0402_16V7K EDP_TXP1_C +3VS
1 @ 2 +3VS_Camcra 37
<6> EDP_TXP1 38 37
0_0402_5% R1162 USB20_P2_CAMERA
USB20_N2_CAMERA 39 38
+3VS 40 39
40
V1.0 modify
<6> EDP_AUXN C369 1 2 0.1U_0402_16V7K EDP_AUXN_C R613 2 @ 1 100K_0402_5% E-T_0871K-F40N-00L
<6> EDP_AUXP C370 1 2 0.1U_0402_16V7K EDP_AUXP_C R614 2 @ 1 100K_0402_5% SP010011Z00
CONN@
For Touch Panel For Camera

V1.0 modify
+5VS +TS_PWR R427 1 @ 2 0_0402_5%
R428 1 @ 2 0_0402_5%
3 R1145 3
1 @ 2 0_0603_5%
SM070003Y00
USB20_P2 3 4 USB20_P2_CAMERA
<9> USB20_P2 3 4
+3VS
USB20_N2 2 1 USB20_N2_CAMERA
<9> USB20_N2 2 1
1 @ 2 DLW21HN900HQ2L_4P
R1146 L27 @EMC@
0_0603_5%
V0.2 modify
4 4

eDP CONN.
A B C D E
A B C D E
+5VS W=40mils +HDMI_5V_OUT
U52 HDMI_C_CLK- R368 2 @ 1 0_0402_5% HDMI_R_CK-
3
OUT HDMI_C_CLK+ R369 2 @ 1 0_0402_5% HDMI_R_CK+
1
1
IN C378
2 .1U_0402_16V7K
1 GND 2 1
AP2330W-7_SC59-3 HDMI_C_TX0- R370 2 @ 1 0_0402_5% HDMI_R_D0-
HDMI_C_TX0+ R371 2 @ 1 0_0402_5% HDMI_R_D0+
HDMI_C_TX1- R372 2 @ 1 0_0402_5% HDMI_R_D1-

<6> HDMI_TX2+ C380 2 1 .1U_0402_16V7K HDMI_C_TX2+
<6> HDMI_TX2- C379 2 1 .1U_0402_16V7K HDMI_C_TX2-
HDMI_C_TX1+ R373 2 @ 1 0_0402_5% HDMI_R_D1+

<6> HDMI_CLK+ C386 2 1 .1U_0402_16V7K HDMI_C_CLK+

<6> HDMI_CLK- C385 2 1 .1U_0402_16V7K HDMI_C_CLK- HDMI_C_TX2- R374 2 @ 1 0_0402_5% HDMI_R_D2-
HDMI_C_TX2+ R375 2 @ 1 0_0402_5% HDMI_R_D2+
2 +1.8VALW
V0.2 modify 2
RP15
HDMI_DDCDATA 5 4 +HDMI_5V_OUT
HDMI_DDCCLK 6 3
HDMI_SDATA 7 2
HDMI_SCLK 8 1
2.2K_0804_8P4R_5%
+5VALW
HDMI_DDCDATA_L R2568 2 @ 1 2.2K_0402_5% V0.2 modify

HDMI_DDCCLK_L R2567 2 @ 1 2.2K_0402_5%
RP17
470_8P4R_5%
HDMI_C_TX1- 4 5
HDMI_C_TX1+ 3 6
+HDMI_5V_OUT HDMI_C_TX2- 2 7
Level Shifter (Other BOM) HDMI_C_TX2+ 1 8
2 1
HDMI_GND
R2574 200K_0402_5%
HDMI_C_TX0- 4 5
HDMI_C_TX0+ 3 6
+1.8VALW HDMI_C_CLK- 2 7
HDMI_C_CLK+ 1 8
8
U2507
RP18
EN
470_8P4R_5%
3
2 7
VREF1 VREF2 5 G
D
Q14A
+3VS
HDMI_DDCCLK 3 6 HDMI_SCLK S DMN66D0LDW-7_SOT363-6
<6> HDMI_DDCCLK SCL1 SCL2
4
3 4 5 HDMI_SDATA 3
<6> HDMI_DDCDATA SDA1 SDA2
HDMI_DDCDATA
GND
Intel Sugesstion
G3401A91G ADFN3X2 8P
1
SA00006YA00 R1060 1 @ 2 20K_0402_5%
V1.0 modify HDMI connector

JHDMI1
+1.8VALW +5VS HDMI_HPD 19
18 HP_DET
+HDMI_5V_OUT +5V
17
HDMI_SDATA 16 DDC/CEC_GND
SDA
5
@ HDMI_SCLK 15
@ 14 SCL
G
G
Reserved
2
4 3 HDMI_DDCCLK_L 4 3 13
CEC
D
12
S
Q2514A Q2513A HDMI_R_CK-

CK-
2
PJT138KA 2N SOT363-6 DMN63D8LDW-7_SOT363-6 11

SB000016K00 @ @ SB000013K00 HDMI_R_CK+ 10 CK_shield
G
G
1 6 HDMI_DDCDATA_L 6 1 HDMI_R_D0- 9 CK+

D0-
D
8
S
Q2514B Q2513B
PJT138KA 2N SOT363-6 DMN63D8LDW-7_SOT363-6 D2 HDMI_R_D0+ 7 D0_shield
SB000016K00 SB000013K00 @EMC@ HDMI_R_D1- 6 D0+
YSLC05CH_SOT23-3 5 D1-
1
+1.8VALW HDMI_R_D1+ 4 D1_shield 20
HDMI_R_D2- 3 D1+ GND 21 ZZZ1
2 D2- GND 22
D2_shield GND
1
Reserved for ESD HDMI_R_D2+ 1 23

R376 D2+ GND
10K_0402_5% ACON_HMRB4-AK120C
CONN@
HDMI_ROYALTY
DC232004400
2
4 ROYALTY HDMI W/LOGO+HDCP 4

<6> HDMI_HPD#
RO0000003HM
6
45@
2
D
Q14B G HDMI_HPD
DMN66D0LDW-7_SOT363-6 S
1
1
R121
100K_0402_5% Security Classification Compal Secret Data Compal Electronics, Inc.
2
HDMI CONN.
A B C D E
A B C D E
+3VS +HDMI_5V_OUT
L3
FBMA-L11-160808-800LMT_0603 close to pin 9
1 2 +3VS_CRT
.1U_0402_16V7K
1
.1U_0402_16V7K
1
.1U_0402_16V7K
1 1
1 <6> DDI2_HPD 1
C4
2
10U_0603_6.3V6M
C1
C2
C3
2.2K_0402_5%
2.2K_0402_5%
1
2 2 2 2
R2530 @
100K_0402_5%
R16
R17
1
1
2
20
U1
9
DVCC_33
DVCC_33
VDD_DAC_33
DP_HPD 1
HPD
<6> SOC_DDI2_AUXN C6 1 2 0.1U_0402_16V7K DDI2_AUX_C_DN 27 6 CRT_DATA CRT_DATA <27>

C5 1 2 0.1U_0402_16V7K DDI2_AUX_C_DP 26 AUX_N VGA_SDA 4 CRT_CLK
<6> SOC_DDI2_AUXP AUX_P VGA_SCL CRT_CLK <27>
8 HSYNC HSYNC <27>
C36 1 2 0.1U_0402_16V7K SOC_DDI2_C_P0 29 HSYNC 7 VSYNC
<6> SOC_DDI2_TXP0 LANE0P VSYNC VSYNC <27>
<6> SOC_DDI2_TXN0 C37 1 2 0.1U_0402_16V7K SOC_DDI2_C_N0 30
LANE0N 15 CRT_R
RED_P CRT_R <27>
<6> SOC_DDI2_TXP1 C38 1 2 0.1U_0402_16V7K SOC_DDI2_C_P1 31
C39 1 2 0.1U_0402_16V7K SOC_DDI2_C_N1 32 LANE1P 12 CRT_G
<6> SOC_DDI2_TXN1 LANE1N GREEN_P CRT_G <27>
10 CRT_B
+3VS BLUE_P CRT_B <27>
22 POL1_SDA
POL1_SDA
4
3
2
1
C9 2 1 2.2U_0402_6.3V6M 23 POL2_SCL
POL2_SCL 75_0804_8P4R_1%
C10 2 1 .1U_0402_16V7K VCCK_12 19 2 CRT_SMB_CLK R18 1 @ 2 0_0402_5% RP24
VCCK_12 SMB_SCL 3 CRT_SMB_SDA R19 1 @ 2 0_0402_5%
C11 2 1 .1U_0402_16V7K 24 SMB_SDA
2 2
5
6
7
8
AVCC_33
C12 2 1 .1U_0402_16V7K VCCK_12 25
AVCC_12 21 LDO_EN
R9 1 2 12K_0402_1% 28 LDO_EN
RRX
18
11 XO
13 BLUE_N 17
14 GREEN_N XI/CKIN
16 GND_DAC
33 RED_N EC_SMB_CK2
EPAD_GND EC_SMB_CK2 <15,30,34,37>
EC_SMB_DA2
EC_SMB_DA2 <15,30,34,37>
RTD2168-CG_QFN32_5X5
10U_0603_6.3V6M
2 Address:(layout guide P.11)
Please reserve slave address of
C15
0x64/0x65 and 0x68/0x69 for RTD2168’s use
1
+3VS +3VS +3VS

4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
3 3
1
1
R11 @
R10
R12
POL_SDA
2
0 1 LDO_EN:
POL2_SCL POL1_SDA LDO_EN
0 X EP *1: Internal 1.2V
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
0: External 1.2V
1
1
R15 @
POL_SCL
R13
R14
1 *ROM EEPROM
@
ROM: Internal ROM

2
EP: Programmed external EC

EEPROM: External ROM
4 4

Realtek RTD2168
WWW.AliSaler.Com
Date: W ednesday, March 04, 2015 Sheet 26 of 55
A B C D E
A B C D E
CRT conn. W=40mils

+HDMI_5V_OUT
1 1
SM01000LU00 ( S SUPPRE_ MURATA BLM15BA220SN1D 0402)

CRT Connector
L2503 EMC@
BLM15BA220SN1D_2P
1 2 CRT_R_2 JCRT1
<26> CRT_R
L2505 EMC@ 6
BLM15BA220SN1D_2P T99 @ 11
1 2 CRT_G_2 1
<26> CRT_G
L2504 EMC@ 7
BLM15BA220SN1D_2P 12
1 2 CRT_B_2 2
<26> CRT_B
8
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
13
1 1 1 V0.2 modify 1 1 1 3
9
C2529
C2530
C2531
C2532
C2533
C2534
14
T109 @ 4
2 2 2 2 2 2 10 16
G
15 G 17
5
C-H_13-12201536CP
CONN@
@ R2524 DC060005700
+HDMI_5V_OUT C2535 1 @ 2 0_0603_5% CRT_HSYNC_2
2 2
U2502 .1U_0402_16V7K
1 5 2 1 R2525 CRT_CLK <26>
R2526 OE Vcc 1 @ 2 0_0603_5% CRT_VSYNC_2
CRT_DATA <26>
0_0402_5% 1 1
2 @ 1 CRT_HSYNC 2 @ @
<26> HSYNC IN A PVT modify 12/31 C2536 C2537
form +5VS_6513 change to +HDMI_5V_OUT 10P_0402_50V8J 10P_0402_50V8J
3 4 CRT_HSYNC_1 2 2
GND OUT Y
M74VHC1GT125DF2G_SC70-5
R2528 +HDMI_5V_OUT
0_0402_5% U2503
2 @ 1 1 5
OE Vcc
2 @ 1 CRT_VSYNC 2
<26> VSYNC IN A
R2529
0_0402_5%
3 4 CRT_VSYNC_1
GND OUT Y
M74VHC1GT125DF2G_SC70-5
3 3
4 4

CRT Connector
A B C D E
5 4 3 2 1
+3VALW
V0.2 modify +3V_LAN
@ 12/10: P/N change to SH00000RT00

R2551 2 1 0_0805_5% W=60mil
( S COIL 2.2UH +-20% +LAN_VDD +3V_LAN
60mil 60mil W=60mil W=60mil
HPC252012NF-2R2M 1.3A) 300mA 1.4A
U67 L52
5 1 +REGOUT 1 2
IN OUT 2.2UH_HPC252012NF-2R2M_20%
2
4.7U_0603_6.3V6K
C1215
.1U_0402_16V7K
C1216
.1U_0402_16V7K
C1217
.1U_0402_16V7K
C1218
.1U_0402_16V7K
C1219
.1U_0402_16V7K
C1220
.1U_0402_16V7K
C1221
1U_0402_6.3V6K
C1222
.1U_0402_16V7K
C1223
4.7U_0603_6.3V6K
C1224
.1U_0402_16V7K
C1225
.1U_0402_16V7K
C1226
.1U_0402_16V7K
C1227
2
C1214 GND
IDC=1200mA 1 1 1 1 1 1 1 1 1 1 1 1 1
1U_0402_6.3V6K 4 3
1 EN OC
SY6288C20AAC_SOT23-5
D 2 2 2 2 2 2 2 2 2 2 2 2 2 D
LAN_PWR_EN <34>
Using for Switch mode

From EC Place near Pin 3,8,33,46 Place near Pin 20 Using for Switch mode Place near Pin 11,32,48
The trace length from Lx to
PIN36 (REGOUT) and from C to Lx The trace length
High active. from C to
EN threshold voltage min:1.2V typ:1.6V max:2.0V must < 200mils.
Current limit threshold 1.5~2.8A PIN35(VDDREG)
+3V_LAN
must < 200mils.
+3V_LAN Rising time must >0.5ms and <100ms
1
R1140
10K_0402_5%
U68
2
Power Manahement/Isolation
ISOLATEB 31
Internal pull high
R1124 1 @ 2 0_0402_5% LAN_PME# 39 ISOLATEBPIN
<34> EC_PME# LANWAKEB Card Reader
15 SD_D0 R2534 1 @ 2 0_0402_5% SD_D0_R
SD_D0/MS_D1 14 SD_D0_R <29>
PCI-Express SD_D1 R2537 1 @ 2 0_0402_5% SD_D1_R
23 SD_D1 16 SD_D1_R <29>
<7> CLK_PCIE_LAN CLK_PCIE_LAN SD_CLK R2538 1 EMC@ 2 10_0402_5% SD_CLK_R SD_CLK_R <29>
CLK_PCIE_LAN# 24 REFCLK_P SD_CLK/MS_D0 17 SD_CMD R2539 1 @ 2 0_0402_5% SD_CMD_R
<7> CLK_PCIE_LAN# REFCLK_N SD_CMD/MS_D2 SD_CMD_R <29>
18 SD_D3 R2535 1 @ 2 0_0402_5% SD_D3_R
30 SD_D3/MS_D3 19 SD_D3_R <29>
PLT_RST_BUF# SD_D2 R2536 1 @ 2 0_0402_5% SD_D2_R 1
<9,15,30,34,35> PLT_RST_BUF# LAN_CLKREQ# 29 PERSTBPIN SD_D2/MS_CLK 28 SD_WP SD_D2_R <29>
<7> LAN_CLKREQ# CLKREQBPIN MS_BS/SD_WP# SD_WP <29>
C1229
C1228,C1230 C1228 1 2 .1U_0402_16V7K PCIE_PRX_C_DTX_P3 25 5P_0402_50V8C
C <7> PCIE_PRX_DTX_P3 HSOP 2 C
C1230 1 2 .1U_0402_16V7K PCIE_PRX_C_DTX_N3 26
Place near Pin 25,26 <7> PCIE_PRX_DTX_N3 21 HSON 42 SD_CD#
@EMC@
<7> PCIE_PTX_C_DRX_P3 HSIP SD_CD# SD_CD# <29>
22 43
<7> PCIE_PTX_C_DRX_N3 HSIN MS_CD#
close to pin17
Transceiver Interface
LAN_MIDI0+ 1
<29> LAN_MIDI0+ LAN_MIDI0- 2 MDIP0
<29> LAN_MIDI0- 4 MDIN0
LAN_MIDI1+
<29> LAN_MIDI1+ LAN_MIDI1- 5 MDIP1 48 +3V_LAN
<29> LAN_MIDI1- LAN_MIDI2+ 6 MDIN1 HV_GIGA 11
<29> LAN_MIDI2+ LAN_MIDI2- 7 MDIP2 HV_GIGA 12
<29> LAN_MIDI2- MDIN2 VDD33
1400mA
LAN_MIDI3+ 9 32
+3VS <29> LAN_MIDI3+ 10 MDIP3 VDD33
LAN_MIDI3-
<29> LAN_MIDI3- MDIN3
Write protect Write protect
1
V1.0 modify Card Detect

R1131
XTLO 1 2
XTLI
XTLO_R
44
45 CKXTAL1 Clock VDD10
33
3
+LAN_VDD (Lock) (Unlock)
1K_0402_5% @
CKXTAL2 AVDD10
300mA
0_0402_5% R2552 8
AVDD10 Without Card Open Open Open
2
ISOLATEB Regulator and Reference

+REGOUT 36 20 Card Inserted Open Close Close
35 REG_OUT VDDTX
40mil +3V_LAN VDDREG
2
SWR mode 34 800mA

R1132 46 ENSWREG 13
+LAN_VDD LV_GEN CARD_3V3 +CARD_3V3
15K_0402_5%
R1133 2 1 2.49K_0402_1% LAN_RST 47
RSET 27 +VDD33_18
10mil
1
DV33/18
.1U_0402_16V7K
C1231
4.7U_0603_6.3V6K
C1232
.1U_0402_16V7K
C1233
41
@ T198 LED0
GPO 38 1 1 1
37 LED1/GPO LEDs
@ T199 40 LED2
B @ T200 LED_CR 49 @ B
E_PAD 2 2 2
+3V_LAN
1 @ 2 Place near Pin 27

R1135
10K_0402_5% RTL8411B-CGT_QFN48_6X6
1 @ 2 GPO
<34> LAN_PHY_EN
R1197
0_0402_5%
Y10
25MHZ_10PF_7V25000014
XTLI 1 3 XTLO
1 3
GND GND
1 1
10P_0402_50V8J
10P_0402_50V8J 2 4 C1237
C1236
2 2
A A

LAN RTL8411B-CG
5 4 3 2 1
A B C D E
LAN Connector
T210
LAN_TERMAL1 24
LAN_MIDI0+ 2 TCT1 MCT1 23 RJ45_MIDI0+ JRJ45
<28> LAN_MIDI0+ TD1+ MX1+
<28> LAN_MIDI0- LAN_MIDI0- 3 22 RJ45_MIDI0- RJ45_MIDI0+ 1
TD1- MX1- PR1+
1 1
4 21 RJ45_MIDI0- 2
LAN_MIDI1+ 5 TCT2 MCT2 20 RJ45_MIDI1+ PR1-
<28> LAN_MIDI1- LAN_MIDI1- 6 19 RJ45_MIDI1- RJ45_MIDI1+ 3
TD2- MX2- PR2+
7 18 RJ45_MIDI2+ 4
LAN_MIDI2+ 8 TCT3 MCT3 17 RJ45_MIDI2+ PR3+
<28> LAN_MIDI2- LAN_MIDI2- 9 16 RJ45_MIDI2- RJ45_MIDI2- 5
TD3- MX3- PR3-
10 15 RJ45_MIDI1- 6
LAN_MIDI3+ 11 TCT4 MCT4 14 RJ45_MIDI3+ PR2-
<28> LAN_MIDI3- LAN_MIDI3- 12 13 RJ45_MIDI3- RJ45_MIDI3+ 7 9
TD4- MX4- PR4+ GND 10
RJ45_MIDI3- 8 GND
PR4-
4
3
2
1
GST5009-E SANTA_130456-291
SP050006B10 75_0804_8P4R_1% CONN@
1 RP23 DC234005310
C1238
40mil
5
6
7
8
.1U_0402_16V7K RJ45_GND 1 2 LANGND
2 C1239
Place close to TCT pin 40mil 10P_0402_50V8J
1
LANGND
3
MESC5V02BD03_SOT23-3
JP@
D47
RJ45_GND JUMP_43X118 JP42
JP41 @EMC@
B88069X9231T203_4P5X3P2-2
EMC@
2 2
2
1
Card Reader Connector
3 3
JREAD1
<28> SD_D3_R 1
CD/DAT3
+CARD_3V3 <28> SD_CMD_R 2
CMD
3
VSS1
Close to Card Reader CONN
4
VDD
4.7U_0603_6.3V6K
C1234
.1U_0402_16V7K
C1235
<28> SD_CLK_R 5
CLK
1 1
6
VSS2
<28> SD_D0_R 7
2 2 DAT0
<28> SD_D1_R 8 12
DAT1 G1
<28> SD_D2_R 9 13
DAT2 G2
10 14
<28> SD_CD# CD G3
11 15
<28> SD_W P WP G4
TAITW _PSDAT4-11GLBS1NN4H2
CONN@
R156 SP07000ZC00
SD_CLK_R 1 @EMC@2 0_0402_5% 1 2
C2566 @EMC@
4 10P_0402_50V8J 4
Close to JREAD1 for EMI

LAN RJ45/CR SD Connector
A B C D E
A B C D E
For Wireless LAN

NGFF WL+BT (KEY E)
+3VS
60mil +3VS_WLAN
R213
1 2 0_0805_5%
2 NBYOC@ 1 1
@
C441 C458 C459 JNGFF1
470P_0402_50V7K 4.7U_0603_6.3V6K .1U_0402_16V7K 1 2
1 1 2 2 GND_1 3.3VAUX_2 +3VS_WLAN 1
3 4
EMC@ <31> USB20_Hub_P1 USB_D+ 3.3VAUX_4
5 6
<31> USB20_Hub_N1 USB_D- LED1# @ T3801
7 8
9 GND_7 PCM_CLK 10
+3VALW
V0.2 modify +3VS_WLAN SDIO_CLK PCM_SYNC
11 12
@ 13 SDIO_CMD PCM_OUT 14
2 1 0_0805_5% 15 SDIO_DAT0 PCM_IN 16
R2553
SDIO_DAT1 LED2# @ T3802 V0.2 modify
17 18
19 SDIO_DAT2 GND_18 20
U9 21 SDIO_DAT3 UART_WAKE 22
5 1 23 SDIO_WAKE UART_TX UART_RXD_NGFF <9>
IN OUT W=60mils SDIO_RST
2 24
GND UART_RX UART_TXD_NGFF <9>
1U_0402_6.3V6K
25 26
GND_33 UART_RTS
C165
C460
4 3 27 28
EN OC <7> PCIE_PTX_C_DRX_P2 29 PET_RX_P0 UART_CTS 30 E51TXD_P80DATA_R
1 1 <7> PCIE_PTX_C_DRX_N2 PET_RX_N0 CLink_RST
SY6288C20AAC_SOT23-5 31 32 1 @ 2 E51RXD_P80CLK_R
@ BYOC@ 33 GND_39 CLink_DATA 34 R433 0_0402_5%
<7> PCIE_PRX_DTX_P2 PER_TX_P0 CLink_CLK
.1U_0402_16V7K
35 36
2 2 <7> PCIE_PRX_DTX_N2 PER_TX_N0 COEX3 @ T3803
37 38 V1.0 modify
GND_45 COEX2 @ T3804
39 40
WLAN_ON <34> <7> CLK_PCIE_WLAN REFCLK_P0 COEX1 @ T3805
41 42
<7> CLK_PCIE_WLAN# REFCLK_N0 SUSCLK(32KHz) @ T3806
43 44
+3VS_WLAN 45 GND_51 PERST0# 46 E51RXD_P80CLK_R PLT_RST_BUF# <9,15,28,34,35>
<7> WLAN_CLKREQ# CLKREQ0# W_DISABLE2#
47 48
<34> WLAN_PME# PEWAKE0# W_DISABLE1# WL_OFF# <34>
49 50 MINI1_SMBDATA R434 1 @ 2 0_0402_5%
GND_57 I2C_DAT EC_SMB_DA2 <15,26,34,37>
51 52 MINI1_SMBCLK R432 1 @ 2 0_0402_5%
RSVD/PCIE_RX_P1 I2C_CLK EC_SMB_CK2 <15,26,34,37>
2 1 WLAN_PME# 53 54
R429 4.7K_0402_5% 55 RSVD/PCIE_RX_N1 I2C_IRQ 56
57 GND_63 RSVD_64 58
59 RSVD/PCIE_TX_P1 RSVD_66 60
61 RSVD/PCIE_TX_N1 RSVD_68 62
2 63 GND_69 RSVD_70 64 2
RSVD_71 3.3VAUX_72 +3VS_WLAN
65 66
67 RSVD_73 3.3VAUX_74
GND_75 68
69 GND1
GND2
R1079 0_0402_5% 1 @ 2 E51TXD_P80DATA_R BELLW_80152-3221
<34> E51TXD_P80DATA 1 2
R1080 0_0402_5% @ E51RXD_P80CLK_R CONN@
<34> E51RXD_P80CLK
BT_ON# use RX to work.
SP070013E00
1
R437
100K_0402_5%
2
3 3
4 4

NGFF WLAN
A B C D E
5 4 3 2 1
USB HUB\ GL850

V1.0 modify
+3VALW +3V_SOC
2
R269 R270
0_0603_5% 0_0402_5% +3V_HUB
+3V_HUB
@ @
HUB@
1
1
D 1 2 D
C288 .1U_0402_16V7K C279 close to U73 pin5
HUB@
10U_0603_6.3V6M C280 close to U73 pin9
.1U_0402_16V7K
1 1 1 2 V1.0 modify
C294
HUB@
C283 close to U73 pin14
C293
HUB@
C289 .1U_0402_16V7K
HUB@ C284 close to U73 pin21
1 2 +3V_HUB +3V_HUB
2 2 C291 .1U_0402_16V7K
HUB@
2
1 2 HUB@ U73
C290 .1U_0402_16V7K R1053 5 1 USB20_N4
9 AVDD DM0 2 USB20_P4 USB20_N4 <9>
0_0402_5%
14 AVDD DP0 USB20_P4 <9>
+3V_HUB 21 AVDD 3 USB20_Hub_N1
USB20_Hub_N1 <30>
1
27 DVDD DM1 4 USB20_Hub_P1
28 V5 DP1 USB20_Hub_P1 <30> BT
V33
1
HUB@ 6 USB20_Hub_N2
+3V_HUB DM2 7 USB20_Hub_P2 USB20_Hub_N2 <33>
R272 USB2.0 SUB/B
18 DP2 USB20_Hub_P2 <33>
R976 10K_0402_5%
1 HUB@ 2 PSELF 0_0402_5% 26 TEST/SCL 12
R266 100K_0402_5% PWREN1#/SDA DM3 13
Port3 disable.
2
1 @ 2 RESET# 17 DP3
1 HUB@ 2 OVCUR2# <34,38,43> SYSON RESET# 15
2 DM4
R268 10K_0402_5% HUB@ HUB_XIN 10 16
Port2 is removable. C292 HUB_XOUT 11 X1 DP4 Port4 disable.
X2 25
1U_0402_6.3V6K OVCUR1#/SMC
1 PSELF 22 24 OVCUR2#
1 HUB@ 2 PGANG PGANG 23 PSELF OVCUR2#/SMD 20
Port2 is removable.
R271 100K_0402_5% PGANG OVCUR3# 19
OVCUR4#
29 8 RREF 2 HUB@ 1
GND RREF R267 680_0402_1%
C C
GL850G-OHY32_QFN28_5X5
HUB@
V0.2 modify SA000066320, S IC GL850G-OHY32 QFN 28P USB2.0 HUB

Y11
HUB_XIN 1 4 1
1 C296
C295 33P_0402_50V8J
33P_0402_50V8J HUB@
HUB@ 2 3 2 HUB_XOUT need apply footprint
2
12MHZ_18PF_7V12000001
V0.2 modify HUB@
eDP Level Shifter (Other for BOM) TP_INT Level Shifter+1.8VALW

(Other for BOM)
+1.8VALW
DGPU Level Shifter (Other for BOM)

1
1
+3V_PTP
R383 R1166
10K_0402_5% 2.2K_0402_5%
5
+3VSDGPU_AON U2510
VGA_PWROK <15,38,51>
2
P
<6> EDP_HPD#
2
TP_INT# 4 NC
<6> TP_INT# Y
1
B +3VS 2 B
A TP_INT#_EC <34,35>
G
1
D R1043 R1044
Q13 2 EDP_HPD_CONN 10K_0402_5% 0_0402_5% NL17SZ07DFT2G_SC70-5
EDP_HPD_CONN <24>
3
L2N7002LT1G_SOT23-3 G @ VGA@ SA00004BV00
1
1
S
3
R2015 PH +1.8VS at SOC

R364 10K_0402_5%
5
100K_0402_5% VGA@ U57 SOC/1.8V
2
G
GPU/3.3V 1
P
2
2 NC 4
3 1 PEG_CLKREQ_D# 2 Y VGA_CLKREQ# <7>
<15> PEG_CLKREQ# A
G
S
NL17SZ07DFT2G_SC70-5
3
SA00004BV00
Q36
L2N7002LT1G_SOT23-3
VGA@ V1.0 modify G sensor Level Shifter (Other for BOM)
VGA@ +1.8VALW
+3VSDGPU_AON +3VS
@
+1.8VALW
2
+1.8VALW
diff. with A4QAS(V0.1)
1 2 C297
TS Level Shifter (Other for BOM) R1050 0_0402_5% .1U_0402_16V7K
2
1
1 R2043 R638
1
+TS_PWR R2034 10K_0402_5% 10K_0402_5%
5
+1.8VALW
diff. with A4QAS(V0.1) 1K_0402_5% @ U58 VGA@ GPU/3.3V GSEN@ R640 GSEN@
SOC/1.8V 1 10K_0402_5% GSEN@
P
1
NC
5
4 U2512
DGPU_HOLD_RST# <15>
2
Y
2
DGPU_HOLD_RST#_SOC1.8V 2 1
P
<6> DGPU_HOLD_RST#_SOC1.8V
2
A NC
G
R635 G_INT_R 4
<6> G_INT_R Y
1
10K_0402_5% NL17SZ07DFT2G_SC70-5 2 G_INT

G_INT <37>
3
G
TSI@ R634 TSI@ SA00004BV00
10K_0402_5% TSI@ VGA@ NL17SZ07DFT2G_SC70-5
1
3
5
A U2511 SA00004BV00 A
1
P
2
TS_INT_R# 4 NC
<7> TS_INT_R# Y 2 TS_INT#
A TS_INT# <24>
G
NL17SZ07DFT2G_SC70-5
3
SA00004BV00
Issued Date 2013./02/04 Deciphered Date 2015/03/18 Title
USB Hub GL850G& Reset Button
Custom 1.0
5 4 3 2 1
A B C D E
SATA HDD1 Conn. SATA ODD Conn.

JHDD1
JODD1
1
HDD@ C392 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P0 2 GND 1
<7> SATA_PTX_DRX_P0 A+ GND
<7> SATA_PTX_DRX_N0 HDD@ C393 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N0 3
<7> SATA_PTX_DRX_P1 C401 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P1 2
4 A- C402 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N1 3 A+
1 GND <7> SATA_PTX_DRX_N1 A- 1
HDD@ C391 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N0 5 4
<7> SATA_PRX_DTX_N0 B- GND
HDD@ C394 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P0 6 C403 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N1 5
<7> SATA_PRX_DTX_P0 7 B+ <7> SATA_PRX_DTX_N1 B-
C405 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P1 6
+3VS GND <7> SATA_PRX_DTX_P1 7 B+
GND
8 +5VS
9 V33 8
10 V33 R1154 1 2 0_0805_5%
80mils +5VS_ODD 9 DP
11 V33 10 +5V
+5VS GND +5V
10U_0603_6.3V6M
.1U_0402_16V7K
12 NBYOC@ 1 1 ODD_MD 11
GND MD
C404
C407
J8 13 T185 @ 12 14
1 2 +5VS_HDD 14 GND 13 GND GND 15
V5 V0.2 modify GND GND
15
JUMP_43X118 16 V5 2 2
@ 17 V5 SANTA_201501-2
18 GND CONN@
<37> G_INT2_R Reserved
19 23
+3VS +5VS_HDD 20 GND GND 24 SP01001MV00
21 V12 GND +5VS
22 V12 +5VS_ODD
100mils V12
U69
.1U_0402_16V7K
10U_0603_6.3V6M
.1U_0402_16V7K
1 1 1 SANTA_192602-1 5 1
IN OUT
C408
@
HDD@
C420
C397
@
CONN@ V0.2 modify
2
GND
2 2 2 1
BYOC@ 4 3 ODD_OC# @ T187
C144 EN OC
1U_0402_6.3V6K SY6288C20AAC_SOT23-5
2 BYOC@ V0.2 modify
2 ODD_EN <34> 2
SATA HDD Conn.

JHDD2
12
11 GND
GND
3 10 3
SATA_PTX_DRX_P0 BA@ C410 2 1 SATA_PTX_C_DRX_P0_10.01U_0402_16V7K 9 GND
SATA_PTX_DRX_N0 BA@ C411 2 1 SATA_PTX_C_DRX_N0_10.01U_0402_16V7K 8 TXP
7 TXN
SATA_PRX_DTX_N0 BA@ C413 2 1 SATA_PRX_C_DTX_N0_10.01U_0402_16V7K 6 GND
SATA_PRX_DTX_P0 BA@ C412 2 1 SATA_PRX_C_DTX_P0_10.01U_0402_16V7K 5 RXN
4 RXP
3 GND
+5VS 5V
2
1 5V
5V
ACES_51625-01001-001
+5VS CONN@
DC021407091
100mils
10U_0603_6.3V6M
C426
1
1
.1U_0402_16V7K
C414
BA@
2
2
BA@
4 4

HDD/ODD/FAN
A B C D E
A B C D E
USB3.0 Port 0 R458 1 @EMC@2 0_0402_5% +USB3_VCCA

D5 EMC@
L26 EMC@ 6 3 USB20_P0_L W=100mils
DLW21HN900HQ2L_4P I/O4 I/O2
USB3.0 Conn.
150U_D2_6.3VY_R17M
USB20_P0 2 1 USB20_P0_L +USB3_VCCA
<9> USB20_P0 2 1
.1U_0402_16V7K
C487 EMC@
5 2 1 1 JUSB1
VDD GND
C486
USB20_N0 3 4 USB20_N0_L 1
<9> USB20_N0 3 4 + VBUS
USB20_N0_L 2
SM070003Y00 USB20_P0_L 3 D-
V0.2 modify 2 D+
4 1 USB20_N0_L 4
I/O3 I/O1 2 U3RXDN0 5 GND
R459 1 @EMC@2 0_0402_5% AZC099-04S.R7G_SOT23-6 U3RXDP0 6 StdA-SSRX- 10
1 StdA-SSRX+ GND 1
V0.2 modify 7 11
For RF request D15 EMC@ U3TXDN0 8 GND-DRAIN GND 12
SM070003Y00 U3TXDP0 9 StdA-SSTX- GND 13
2 1 PCH_USB3_TX0_P_C 3 4 1 1 StdA-SSTX+ GND
<9> PCH_USB3_TX0_P U3TXDP0 U3TXDP0 10 9 U3TXDP0
C484 .1U_0402_16V7K 3 4 LOTES_AUSB0015-P001A
U3TXDN0 2 2 9 8 U3TXDN0 CONN@
2 1 PCH_USB3_TX0_N_C 2 1 U3TXDN0
<9> PCH_USB3_TX0_N
C482 .1U_0402_16V7K 2 1 U3RXDP0 4 4 7 7 U3RXDP0 +5VALW DC23300AI00
DLW21HN900HQ2L_4P +USB3_VCCA
L24 @EMC@ U3RXDN0 5 5 6 6 U3RXDN0 C483
R463 2 @ 1 0_0402_5% .1U_0402_16V7K U25
3 3 1 2 5 1 W=60mils
R473 2 @ 1 0_0402_5% IN OUT
8 2
GND
V0.2 modify L05ESDL5V0NA-4_SLP2510P8-10-9 V0.2 modify USB_PWR_EN 4 3 R454 1 @ 2 0_0402_5%
SM070003Y00 EN OC USB_OC0# <9>
PCH_USB3_RX0_P 3 4 U3RXDP0 SY6288C20AAC_SOT23-5 1
<9> PCH_USB3_RX0_P 3 4
C612
PCH_USB3_RX0_N 2 1 U3RXDN0 .1U_0402_16V7K
<9> PCH_USB3_RX0_N 2 1 2
DLW21HN900HQ2L_4P
For ESD request @
L25 @EMC@
R474 2 @ 1 0_0402_5%
R475 2 @ 1 0_0402_5%
2
USB3.0 Port 1 2
D4 EMC@ +USB3_VCCB
6 3 USB20_P1_L
I/O4 I/O2
+USB3_VCCB W=100mils
150U_D2_6.3VY_R17M
5 2
VDD GND
.1U_0402_16V7K
C490
JUSB2
10
8
6
1 1 1
VBUS
C489
USB20_N1_L 2
10
8
6
2 1 PCH_USB3_TX1_N_C 3 1 U3TXDN1 4 1 USB20_N1_L + USB20_P1_L 3 D-

<9> PCH_USB3_TX1_N 3 1 I/O3 I/O1 D+
C485 .1U_0402_16V7K 4
2 GND
EMC@
AZC099-04S.R7G_SOT23-6 U3RXDN1 5
2 1 PCH_USB3_TX1_P_C 4 2 U3TXDP1 2 U3RXDP1 6 StdA-SSRX- 10
<9> PCH_USB3_TX1_P 4 2 StdA-SSRX+ GND
C488 .1U_0402_16V7K 7 11
12
11
GND-DRAIN GND
7
5
L28 U3TXDN1 8 12
INTEL_CMC-6L-L1L4 U3TXDP1 9 StdA-SSTX- GND 13
12
7
5
11
StdA-SSTX+ GND
LOTES_AUSB0015-P001A
CONN@
D16 EMC@
+5VALW DC23300AI00
U3TXDP1 1 1 10 9 U3TXDP1 +USB3_VCCB
C493
U3TXDN1 2 2 9 8 U3TXDN1 .1U_0402_16V7K U26
1 2 5 1 W=60mils
4 4 IN OUT
U3RXDP1 7 7 U3RXDP1
V0.2 modify 2
10
GND
8
6
U3RXDN1 5 5 6 6 U3RXDN1
USB_CHARGE_2A 4 3 R469 1 @ 2 0_0402_5%
10
8
6
<34> USB_CHARGE_2A EN OC USB_OC1# <9>

PCH_USB3_RX1_N 3 1 U3RXDN1 3 3
<9> PCH_USB3_RX1_N 3 1
3 SY6288C20AAC_SOT23-5 1 3
8
PCH_USB3_RX1_P 4 2 U3RXDP1 C614
<9> PCH_USB3_RX1_P 4 2 L05ESDL5V0NA-4_SLP2510P8-10-9 .1U_0402_16V7K
12
11
2
7
5
L29 @
INTEL_CMC-6L-L1L4 For ESD request
12
7
5
11
R468 1 @EMC@2 0_0402_5% USB Host Charger

L30 EMC@ CB SELCDP
DLW21HN900HQ2L_4P
U2DP1 2 1 USB20_P1_L 0 X DCP(Dedicated Charging Port)
2 1
autodetect with mouse/keyboard wakeup
USB/B Conn. U2DN1 3
3 4
4 USB20_N1_L 1 0 S0 charging with SDP(Standard Downstream Port) only V0.2 modify +3VLP +3VALW
(USB2 x1 + audio jack) SM070003Y00 V0.2 modify 1 1 S0 charging with CDP(Charging Downstream Port) or
SP010021H00 SDP only
1
CONN@ R467 1 @EMC@2 0_0402_5% R462 R461
ACES_51524-0140N-001 10K_0402_5% 10K_0402_5%
<36> HPOUT_L_1 HPOUT_L_1 1 @
HPOUT_R_1 2 1
<36> HPOUT_R_1
2
SLEEVE 3 2
<36> SLEEVE 3 V1.0 modify
<36> RING2 RING2 4 V1.0 modify U46
HP_PLUG# 5 4 R460 2 @ 1 0_0402_5% 8 1 USB_CEN
<36> HP_PLUG# 5 <34> USB_CHARGE_CB CB CEN 2 USB_CEN <34>
GNDA 6 7 U2DN1
6 <9> USB20_N1 TDM DM 3
Pin8,Pin9 reserve for Audio codec 7 6 U2DP1
(confirm with Realtek) 7 <9> USB20_P1 TDP DP 4
8 +5VALW 5 1 2 +5VALW
USB20_Hub_P2 9 8 VDD SELCDP 9 R464 10K_0402_5%
<31> USB20_Hub_P2 9 1 Thermal Pad
4 USB20_Hub_N2 10 4
<31> USB20_Hub_N2 10
<34> USB_PWR_EN USB_PWR_EN 11 C635 SLG55594AVTR_TDFN8_2X2
12 11 .1U_0402_16V7K
13 12 15 2
14 13 GND 16
+5VALW 14 GND
JUSB3

USB Conn
Custom 1.0
A B C D E
A B C D E
+1.8VALW_EC +3VALW_EC
1
R1090 R1091
0_0603_5% 0_0603_5%
LPC1P8V@ LPC3V@
2
For abnormal shutdown +3VLP +3VALW_EC L31 +EC_VCCA
BLM15AG121SN1D_L0402_2P V0.2 modify
D25 1 @ 2 1 2 +EC_VCCA +VCC_LPC
RB751V-40_SOD323-2 +1.8VALW +1.8VALW_EC
1
.1U_0402_16V7K
C502
.1U_0402_16V7K
C503
1000P_0402_50V7K
C504
1000P_0402_50V7K
C505
SPOK 1 2 EC_RSMRST# R236 1 1 2 2 .1U_0402_16V7K2 1 C506
+VCC_LPC
0_0805_5% C508
.1U_0402_16V7K 1 @ 2 .1U_0402_16V7K2 1 C507
1 2 1
V0.2 modify 2 2
@ V1.0 modify
@1 @1 R237
ECAGND <40> +3VALW_EC
0_0805_5%
V1.0 modify
111
125
LID_SW# R476 1 2 47K_0402_5%
22
33
96
67
9
+1.8VALW_EC U28
R4905 +3VS
EC_VDD0
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/AVCC
100K_0402_1% 1 2 SEN_DET# V0.2 modify
EC_MUTE# R481 1 @ 2 10K_0402_5%
1 21
+3VALW_EC <9> EC_SLP_S3#_1P8 EC_KBRST# 2 GATEA20/GPIO00 GPIO0F 23 BEEP# BATT_4S <41>
<6> EC_KBRST# 3 KBRST#/GPIO01 BEEP#/GPIO10 26 BEEP# <36> Reserve EC_CLR_CMOS for clear CMOS
<9,35> EC_SERIRQ 4 SERIRQ GPIO12 27 EC_CLR_CMOS EC_SUSPWRDNACK <38>
<9,35> LPC_FRAME# LPC_FRAME# ACOFF/GPIO13 CLR_CMOS# <9>
R484 1 @ 2 100K_0402_5% EC_PME# 5
<9,35> LPC_AD3 7 LPC_AD3
PWM Output C510 2 1 100P_0402_50V8J ECAGND
<9,35> LPC_AD2 LPC_AD2
R496 1 @ 2 10K_0402_5% EC_SLP_S3# 8 63 BATT_TEMP
<9,35> LPC_AD1 LPC_AD1 BATT_TEMP/AD0/GPIO38 BATT_TEMP <40>
1
10 64 VCIN1_BATT_DROP D
V0.2 modify <9,35> LPC_AD0 LPC_AD0LPC & MISC AD1/GPIO39 VCIN1_BATT_DROP <40>
65 ADP_I EC_CLR_CMOS 2 Q51
+3VALW_EC LPC_CLK_EC 12 ADP_I/AD2/GPIO3A 66 AD_BID0 ADP_I <40,41>
<9> LPC_CLK_EC CLK_PCI_EC AD Input AD3/GPIO3B
G L2N7002LT1G_SOT23-3
2
RP12 13 75 S @
<9,15,28,30,35> PLT_RST_BUF# USB_CHARGE_CB <33>
3
1 8 EC_SMB_CK1 37 PCIRST#/GPIO05 AD4/GPIO42 76 VGG_IMON
<37> EC_RST# EC_RST# IMON/AD5/GPIO43 VGG_IMON <48> V1.0 modify R483
2 7 EC_SMB_DA1 20 10K_0402_5%
3 6 EC_SMB_CK2 <8> EC_SCI# 38 EC_SCII#/GPIO0E
<30> WLAN_ON GPIO1D @
4 5 EC_SMB_DA2
+3VS
1
68 LAN_PWR_EN
DAC_BRIG/GPIO3C 70 EN_DFAN1 LAN_PWR_EN <28>
+1.8VALW_EC
2.2K_0804_8P4R_5% DA Output EN_DFAN1/GPIO3D EN_DFAN1 <37>
KSI0 55 71 TP_EN
KSI0/GPIO30 IREF/GPIO3E TP_EN <35>
KSI1 56 72 KBL_EN
KSI2 57 KSI1/GPIO31 CHGVADJ/GPIO3F KBL_EN <35> LID_SW2#_R R1173 1 2 0_0402_5%
@
1 2 58 KSI2/GPIO32 83 LID_SW2# <35>
R488 10K_0402_5% EC_SMI# KSI3 EC_MUTE#
R492 1 @ 2 10K_0402_5% EC_SCI# KSI4 59 KSI3/GPIO33 EC_MUTE#/GPIO4A 84 USB_PWR_EN EC_MUTE# <36>
2 R494 1 2 10K_0402_5% EC_LID_OUT# KSI5 60 KSI4/GPIO34 USB_EN#/GPIO4B 85 USB_PWR_EN <33> 2
1 2 EC_KBRST# KSI6 61 KSI5/GPIO35 CAP_INT#/GPIO4C 86 LID_SW2#_R USB_CEN <33>
R493 @ 10K_0402_5%
KSI6/GPIO36 PS2 Interface EAPD/GPIO4D
KSI7 62 87 TP_CLK
KSO0 39 KSI7/GPIO37 TP_CLK/GPIO4E 88 TP_DATA TP_CLK <35> H_PROCHOT#_EC R1169 1 2 0_0402_5%
V0.2 modify KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <35>
1 1 @EMC@2 LPC_CLK_EC KSO1 40
C1015 R149 33_0402_5% KSO2 41 KSO1/GPIO21
10P_0402_50V8J KSI[0..7] KSO3 42 KSO2/GPIO22 97 ENBKL R482 1 @ 2 0_0402_5%
<35> KSI[0..7] KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 ENBKL <6> <47,48> VR_HOT# H_PROCHOT# <9,15>
@EMC@ KSO4 43 98
2 KSO[0..17] KSO5 44 KSO4/GPIO24 WOL_EN/GPXIOA01 99 TP_PWR_EN <35>
<35> KSO[0..17] KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 TXE_DBG <8> V1.0 modify
KSO6 45 109 VCIN0_PH Latest design guide suggest change to
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 VCIN0_PH <40>
KSO7/GPIO27 SPI Device Interface 74LVC1G06.
KSO8 47
KSO9 48 KSO8/GPIO28 119
KSO10 49 KSO9/GPIO29 SPIDI/GPIO5B 120
ESD request 0926 KSO10/GPIO2A SPIDO/GPIO5C
KSO11 50 SPI Flash ROM 126
@EMC@ KSO12 51 KSO11/GPIO2B SPICLK/GPIO58 128 PMC_SUSPWRDNACK_R 1 @ 2
KSO12/GPIO2C SPICS#/GPIO5A PMC_SUSPWRDNACK <9>
C511 1 2 0.01U_0402_16V7K PLT_RST_BUF# KSO13 52 R489 0_0402_5%
KSO13/GPIO2D
2
KSO14 53
1 @ 2 KSO15 54 KSO14/GPIO2E 73 GPU_ALERT @ R491 1 @ 210K_0402_5%
KSO15/GPIO2F ENBKL/AD6/GPIO40 GPU_ALERT <15> R1054 +1.8VALW
R490 100K_0402_5% KSO16 81 74 TP_INT#_EC
KSO17 82 KSO16/GPIO48 PECI_KB930/AD7/GPIO41 89 GPU_OVERT TP_INT#_EC <31,35>
100K_0402_5%
KSO17/GPIO49 FSTCHG/GPIO50 90 GPU_OVERT <15>
BATT_BLUE_LED#
BATT_BLUE_LED# <35>
1
BATT_CHG_LED#/GPIO52 91 WLAN_PME#
CAPS_LED#/GPIO53 WLAN_PME# <30> V1.0 modify
ESD request 0926 77 GPIO 92 PWR_LED
<40,41> EC_SMB_CK1 EC_SMB_CK1/GPIO44 PWR_LED#/GPIO54 PWR_LED <35>
EMC@ 78 93 BATT_AMB_LED#
2 1 0.047U_0402_25V7K PMC_CORE_PWROK <40,41> EC_SMB_DA1 79 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 95 SYSON BATT_AMB_LED# <35>
C1157
<15,26,30,37> EC_SMB_CK2 SM
EC_SMB_CK2/GPIO46 Bus SYSON/GPIO56 SYSON <31,38,43>
80 121 VR_ON For Thermal Portect Shutdown
<15,26,30,37> EC_SMB_DA2 EC_SMB_DA2/GPIO47 VR_ON/GPIO57 127 VR_ON <48>
PMC_SUSPWRDNACK_R D23
PM_SLP_S4#/GPIO59
Charger and BATT RB751V-40_SOD323-2
MAINPWON 1 2 3V_EN
6 100 EC_RSMRST# 3V_EN <42>
<9> EC_SLP_S3# 14 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 101 EC_RSMRST# <9>
To SOC EC_LID_OUT# R497
3 <28> EC_PME# 15 PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 102 EC_LID_OUT# <6> 1 2 3
VCIN1_PROCHOT 3V_EN_R R4901 1 2
<8> EC_SMI# 16 EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 103 H_PROCHOT#_EC VCIN1_PROCHOT <40>
V0.2 modify TSI@
<24> TS_RST# GPIO0A H_PROCHOT#_EC/GPXIOA06
1M_0402_5%
1 2 TS_RST# 17 104 MAINPWON 1K_0402_5%
<24> TS_EN GPIO0B VCOUT0_PH/GPXIOA07 MAINPWON <37,40,42>
R636 18 GPO 105 EC_BKOFF#
<30> WL_OFF# 19 GPIO0C BKOFF#/GPXIOA08 106 EC_BKOFF# <24>
100K_0402_5% SEN_DET# GPIO LAN_PHY_EN
<35> SEN_DET# 25 GPIO0D PBTN_OUT#/GPXIOA09 107 DGPU_AC_DETECT LAN_PHY_EN <28>
<38,42,44,45,46> SPOK 28 EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10 108 DGPU_AC_DETECT <15>
3V_EN_R
<37> FAN_SPEED1 29 FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11
V0.2 modify <44> EC_EN_1.05VALW EC_PME#/GPIO15
30 R509 1 @ 2 0_0402_5%
<30> E51TXD_P80DATA EC_TX/GPIO16 ACIN <9,41>
31 110 EC_ACIN
+3VS <30> E51RXD_P80CLK 32 EC_RX/GPIO17 AC_IN/GPXIOD01 112 EC_ON
EC contorl <9> PMC_CORE_PWROK PCH_PWROK/GPIO18 EC_ON/GPXIOD02 EC_ON <42>
EMC@
34 114 ON/OFFBTN# EC_ACIN C512 2 1 100P_0402_50V8J
<35> PWR_SUSP_LED# 36 SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 115 LID_SW# ON/OFFBTN# <35>
<32> ODD_EN NUM_LED#/GPIO1A GPI LID_SW#/GPXIOD04 LID_SW# <35>
R486 1 @ 2 10K_0402_5% GPU_ALERT 116 SUSP#
SUSP#/GPXIOD05 117 SUSP# <38,41,43,45>
VGATE
1 @ 2 10K_0402_5% GPXIOD06 118 VGATE <47> +1.8VALW_EC
R487 GPU_OVERT
PECI_KB9012/GPXIOD07 USB_CHARGE_2A <33> +3VALW_EC
AGND/AGND
122
<9> PBTN_OUT# 123 XCLKI/GPIO5D 124 +V18R R1092 1 @ 2 0_0603_5%
GND/GND
GND/GND
GND/GND
GND/GND
<9> EC_SLP_S4# XCLKO/GPIO5E V18R

1
GND0
For 9022 +V18R, +EC_VCCLPC can be

@ C509 changed to 1.8V if supports 1.8V I/F
2
.1U_0402_16V7K
2
KB9022QD_LQFP128_14X14 V1.0 modify @ @
11
24
35
94
113
69
Part Number = SA000075S30 20mil R696 R697

10K_0402_5% 10K_0402_5%
ECAGND 1 2
1
L32 VCIN0_PH
BLM15AG121SN1D_L0402_2P VCIN1_PROCHOT
+3VALW_EC
Board ID
Analog Board ID definition, @EMC@
2
EC_RSMRST# C1156 1 2 22P_0402_50V8J

4 Please see page 3. 4
Ra R503 For ESD request

100K_0402_1% Phase Revision BID0
1
AD_BID0
EVT 0.1 01
1
R506
1
@
DVT 0.2 02
Rb C517 PVT 1.0 03
20K_0402_1% .1U_0402_16V7K Issued Date 2014/03/19 2015/03/18 Title
2 Deciphered Date
EC ENE KB9012/KB9022
2
WWW.AliSaler.Com
V1.0 modify DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
A B C D E
A B C D E
+3VALW
+3V_PTP
U10 W=20mils
5 1
IN OUT
Lid Switch 2 (reserve for 15") GND

2 1
4 3 C368
C141
1 EN
SY6288C20AAC_SOT23-5
OC
2
4.7U_0603_6.3V6K Lid Switch
1U_0402_6.3V6K +3VLP
2 (Hall Effect Switch)
1 +3VLP TP_PWR_EN <34> 1
JLID1 U3
1 +3V_PTP 3
1 <34> LID_SW# OUT
LID_SW2# 2 2
<34> LID_SW2# 2 VDD
SEN_DET# 3 1
<34> SEN_DET# 4 3 GND
R1170 1 @ 2 0_0402_5%
+3VALW 1
5 4
BATT_AMB_LED# 6 5
6
TP module Conn. R1171 1 @ 2 0_0402_5%
+3VS @ C8
1
C7
BATT_BLUE_LED# 7 YB8251ST23_TSOT-23-3 .1U_0402_16V7K
8 7 JTP1 2
PWR_SUSP_LED# 10P_0402_50V8J
+3VALW PWR_LED# 9 8 1 C663 1 2 .1U_0402_16V7K 2
9 1 V0.2 modify
10 2 TP_CLK
10 2 3 TP_DATA
3 4
11 4 5 +3V_PTP
12 GND1 5 6 I2C5_SDA_TP <8>
GND2 6 I2C5_SCL_TP <8> SA00008K800, S IC APX8132AI-TRG SOT-23 3P HALL SENSOR
7 TP_INT#_EC
7 8 TP_EN TP_INT#_EC <31,34>
8 TP_EN <34>
ACES_50506-01041-P01 9
CONN@ GND 10
GND
SP01001FR00
2
R478 R479 +3VALW +5VALW
ACES_51524-00801-001
CONN@
4.7K_0402_5% 4.7K_0402_5% LED
SP01001A910 V1.0 modify
1
+3V_PTP TP_CLK
TP_CLK <34>
0_0402_5%
TP_DATA
TP_DATA <34>
R1049 1
V0.2 modify R1047 @
1 1 0_0402_5%
@EMC@ @EMC@ LED1 @
2 TP_INT#_EC 2 1 C551 C553 2
2
O
R633 10K_0402_5% 100P_0402_50V8J 100P_0402_50V8J BATT_AMB_LED# 2 1 3
2 2 <34> BATT_AMB_LED#
R699 560_0402_1%
BATT_BLUE_LED# 2 1 2 1
<34> BATT_BLUE_LED# B
R698 430_0402_1%
LTST-S115KFTBKT-CA_AMBER-BLUE
+3VALW
LED2
KB BackLight Conn. Reserve

KB Conn.
O
PWR_SUSP_LED# 2 1 3
<34> PWR_SUSP_LED#
R700 560_0402_1%
+5VS
JBL1 PWR_LED# 2 1 2 1
B
U15 1 R701 430_0402_1%
5 1 +5VS_BL 2 1
IN OUT 3 2 LTST-S115KFTBKT-CA_AMBER-BLUE
2 4 3
JKB1 GND 4 R453
30 4 3 5 0_0402_5%
29 GND2 EN OC 6 GND 1 @ 2 PWR_LED#
28 GND1 SY6288C20AAC_SOT23-5 GND
ON/OFFBTN# 27 28 KB@ ACES_51524-0040N-001
27
1
KSO0 26 CONN@ D Q17
KSO1 25 26 2 @ 1 2 L2N7002LT1G_SOT23-3
KSO2 24 25 R592
KBL_EN <34> 1 SP010022M00 <34> PWR_LED
G
24
2
KSO3 23 0_0402_5% C524 S
3
KSO4 22 23 R452
22 .1U_0402_16V7K
KSO5 21 2
21 @ 100K_0402_5%
3 KSO6 20 3
KSO7 19 20
1
KSO8 18 19
KSO9 17 18
KSO10 16 17
KSI[0..7] KSO11 15 16
KSI[0..7] <34> 14 15
KSO12
KSO[0..17] KSO13 13 14
KSO[0..17] <34> KSO14 12 13 +3VALW +3VALW_TPM
KSO15 11 12
11
TPM Reserve +3VALW_TPM
+3VALW_TPM +3VS_TPM
KSO16 10 R1203 U70 TPM@
KSO17 9 10 1 @ 2 0_0603_5% 5
KSI0 8 9 1 VSB 10
8 GPIO0/XOR_OUT VDD
1
10U_0603_6.3V6M
.1U_0402_16V7K
KSI1 7 2 19
7 GPIO1 VDD
C421 TPM@
C398 TPM@
KSI2 6 1 1 R517 6 24
KSI3 5 6 @ 0_0402_5% 1 @ 2 R1172 TPM_BADD 9 GPIO2/GPX VDD
5 10K_0402_5% GPIO3/BADD
KSI4 4 15 8
4 <9> LPC_CLKRUN# GPIO4/CLKRUN# TEST
KSI5 3
2
KSI6 2 3 +3VALW 2 2 LPC_CLKRUN# 26
KSI7 1 2 <9,34> LPC_AD0 23 LAD0/MISO
1 V0.2 modify near Pin5 <9,34> LPC_AD1 LAD1/MOSI
20 3
<9,34> LPC_AD2 17 LAD2/SPI_IRQ# NC 12
ACES_85201-2805 1 <9,34> LPC_AD3 LAD3 NC
TPM@2 13
CONN@ R1149 NC 14
Internal PU NC
+3VS 0_0603_5% +3VS_TPM Internal PU 28
SP01000GO00 BADD SELECTION 21 LPCPD#
<9> LPC_CLK_TPM 22 LCLK/SCLK
1 2 <9,34> LPC_FRAME# 16 LRFAME#/SCS# 4
@ 0 EEh - EFh <9,15,28,30,34> PLT_RST_BUF#
R1204 27 LRSET#/SPI_RST# GND 11
ON/OFF BTN <9,34> EC_SERIRQ SERIRQ GND
10U_0603_6.3V6M
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
0_0603_5% 7 18
* 1 7Eh - 7Fh PP GND
C422 TPM@
C399 TPM@
C400 TPM@
C406 TPM@
25
4
Test only 1 1 1 1 GND
4
NPCT650AA0WX_TSSOP28
2 2 2 2 @EMC@ @EMC@ SA00007IO00
R534
near Pin10,19,24 LPC_CLK_TPM R148 1 2 33_0402_5% C175 1 2 22P_0402_50V8J
2 1
+3VLP
SW1
EVQPLDA15_4P
1 3 100K_0402_5%
2 4 ON/OFFBTN# 2014/03/19 2015/03/18 Title
ON/OFFBTN# <34> Issued Date Deciphered Date
DBG@ KB/TP/LED/TPM/Screw Hole
6
5
A B C D E
A B C D E
HD Audio Codec +5VS +VDDA Int. Speaker Conn.

J1 40mil
SM01000EJ00 3000ma 220ohm@100mhz DCR 0.04 40mil
+PVDD_HDA 40mil 1 2 40mil JSPK1
1 SPKR+ EMC@ R1094 1 2 PBY160808T-121Y-N_2P SPK_R+ 1
L51 2 1 JUMP_43X118 1 2 2 1
+VDDA 4.75V SPKR- EMC@ R1095 PBY160808T-121Y-N_2P SPK_R-
2
HCB2012KF-221T30_2P C1185 @ SPKL+ EMC@ R1096 1 2 PBY160808T-121Y-N_2P SPK_L+ 3 5
3 G1
10U_0603_6.3V6M
.1U_0402_16V7K SPKL- EMC@ R1097 1 2 PBY160808T-121Y-N_2P SPK_L- 4 6
1 1 (output = 300 mA) 4 G2
1
2
C1186
.1U_0402_16V7K
C1187
.1U_0402_16V7K
C1188
@
ACES_88266-04001
3
SP02000K200 GND
2
2 2
@ GND CONN@
D41 @EMC@
D42 @EMC@
+AVDD1_HDA
1 Place near Pin41 Place near Pin46 20mil 1

GND R1093 1 @ 2
+VDDA
1 1
1
1
.1U_0402_16V7K
C1189
.1U_0402_16V7K
C1190
10U_0603_6.3V6M
C1191
Pin9 need to matching with SOC HDA GND 0_0603_5%
interface.
C1192 1 2 .1U_0402_16V7K
GND
2
2 @ 2 @ GND GND
C1197 1 2 10U_0603_6.3V6M
+1.8VS R471 2 @ 1 0_0402_5% Place near Pin 9 +1.8VS_DVDDIO

+3VS_DVDD
Place near Pin26 GNDA
V0.2 modify
+1.8VS_VDDA R472 2 @ 1 0_0402_5%
R470 2 @ 1 0_0402_5% 20mil 1
+1.8VS
+3VS
1
.1U_0402_16V7K
C1193
10U_0603_6.3V6M
C1194
10U_0603_6.3V6M
1 C1195 1
.1U_0402_16V7K
C1196
2
2 @
2 2
GNDA
For RF Place near Pin 1 GND Place near Pin40 Digital MIC Dual-MIC
41
46
26
40
1
9
U66
MIC BOM upload by Audio Team
DVDD
DVDD-IO
PVDD1
PVDD2
AVDD1
AVDD2
10P_0402_50V8J 2 1 C2689 DMIC_CLK +3VS
U66 @EMC@
LINE1-L 22 MIC2 @
LINE1-R 21 LINE1-L(PORT-C-L) 43 SPKL- +3VS 6 5 DMIC_DATA
LINE1-R(PORT-C-R) SPK-OUT-L- 42 SPKL+ MIC1 @ VDD DATA
24 SPK-OUT-L+ 6 5 DMIC_DATA_S 2 4 DMIC_CLK
23 LINE2-L(PORT-E-L) 45 SPKR+ VDD DATA R466 CS CLK
ALC255-CG_MQFN48_6X6 LINE2-R(PORT-E-R) SPK-OUT-R+ 44 SPKR- 2 4 DMIC_CLK 2 2DMIC@ 1 1 3
2
255@ RING2 17 SPK-OUT-R- CS CLK ENHANCE GND 2
MIC2-L(PORT-F-L) /RING2
3
SA000082700 Combo MIC 40mil SLEEVE 18 1 3 0_0402_5% S MIC ST MP45DT02TR
MIC2-R(PORT-F-R) /SLEEVE ENHANCE GND
1
32 HP_LEFT
HPOUT-L(PORT-I-L)
1
R1103 +MICBIAS +MICBIAS 31 33 HP_RIGHT S MIC ST MP45DT02TR 2 R465
30 LINE1-VREFO-L HPOUT-R(PORT-I-R)
0_0402_5%
.1U_0402_16V7K
LINE1-VREFO-R 10 HDA_SYNC_AUDIO R477 @
SYNC HDA_SYNC_AUDIO <7> @
DMIC_DATA 2 6 HDA_BITCLK_AUDIO D58 0_0402_5%
HDA_BITCLK_AUDIO <7>
2
DMIC_CLK 3 GPIO0/DMIC-DATA BCLK MESC5V02BD03_SOT23-3 @ 1 D2009
C2141
2
GPIO1/DMIC-CLK 1 @EMC@ 2 1 2 C1001 @EMC@ @EMC@ MESC5V02BD03_SOT23-3
GND
200K_0402_1% R1018 0_0402_5% 22P_0402_50V8J @EMC@
1
255@ EC_MUTE# 47 5 HDA_SDOUT_AUDIO
SD034200380 EMC@ HDA_RST_AUDIO# 11 PDB ALC283-CG SDATA-OUT 8 HDA_SDIN0_AUDIO 1 R2127 2
HDA_SDOUT_AUDIO
HDA_SDIN0 <7>
<7>
1
C2144 1 2 100P_0402_50V8J RESETB SDATA-IN 75_0402_1% V1.0 modify
10mil 48
SPDIF-OUT/GPIO2 +MIC2_VREFO
MONO_IN 12
PCBEEP 16
Close codec MONO-OUT
<33> HP_PLUG# HP_PLUG# R1103 2 283@ 1 39.2K_0402_1% SENSE_A 13
R2684 2 255@ 1 100K_0402_1% 14 SENSE A LDO3_CAP C1198 2 1 10U_0603_6.3V6M
+3VS SENSE B GND
1 29
37 MIC2-VREFO +MIC2_VREFO
C1199 35 CBP 7 LDO2_CAP C1200 2 1 10U_0603_6.3V6M
CBN LDO3-CAP GNDA
Pin20 2.2U_0402_6.3V6M 39
ALC283 : NC 2 LDO2-CAP 27 LDO1_CAP C1201 2 1 10U_0603_6.3V6M
LDO1-CAP GNDA
1
ALC255/256 : Power for combo jack depop 36
circuit at system shutdown mode +3VS_DVDD CPVDD R1104 1 2 100K_0402_5% 10mil R1107 R1108
28 CODEC_VREF 2.2K_0402_5% 2.2K_0402_5%
0_0402_5% 2 @ 1 R2131 CPVREF 20 VREF
V1.0 modify +3VALW CPVREF 1 1 1
.1U_0402_16V7K
C1203
2.2U_0402_6.3V6M
C1204
10U_0603_6.3V6M
C1205
15 JDREF 20K_0402_1% 1 283@ 2 R1106 GNDA
2
10U_0603_6.3V6M 2 1 C1202 MIC_CAP 19 JDREF 34 CPVEE SLEEVE
GNDA MIC-CAP CPVEE SLEEVE <33>
Close codec 2 2 2
1 @ RING2 RING2 <33>
@
0_0402_5% 2 283@ 1 R2683 4
Realtek add request 49 DVSS 25 C1206
Pin4 Thermal PAD AVSS1 38 2.2U_0402_6.3V6M
ALC283 : DVSS AVSS2 2 HP_LEFT R1109 1 2 0_0603_5% HPOUT_L_1
3 HPOUT_L_1 <33> 3
ALC255/256 : DC DET (For Japen customer only) 283@
GND ALC283-CG_MQFN48_6X6 Place next pin27
R1111 C1207 GND
12K_0402_5% 1U_0402_6.3V6K
2 @ 1 BEEP#_R 1 2 MONO_IN GNDA GNDA HP_RIGHT R1112 1 2 0_0603_5% HPOUT_R_1 HPOUT_R_1 <33>
<34> BEEP#
2
100P_0402_50V8J
R1114 1 Pin15
C1208 @EMC@
4.7K_0402_5%
12K_0402_5% ALC283 : Ref. Resistor for Jack Detect LINE1-L C1209 1 2 4.7U_0603_6.3V6K
ALC255/256 : Jack Detect for SPDIF-OUT and SPK-OUT port
R1115
2 1
<7> SOC_SPKR LINE1-R C1210 1 2 4.7U_0603_6.3V6K
2
1
+3VS +3VS +3VLP +MICBIAS D44

2 R1120 2 1 4.7K_0402_5%
V1.0 modify 1
2
@ RING2 3 R1121 2 1 4.7K_0402_5%

2
GND R2142 @ R2144

100K_0402_5% R2143 283@ BAT54A-7-F_SOT23-3
J10 J11 100K_0402_5% 100K_0402_5%
JUMP_43X39 JUMP_43X39
1
1 2 1 2
1
@ 1 2 @ 1 2 D
5 G
J2 J3 S Q2003A
JUMP_43X39 JUMP_43X39 283@
4
1 2 1 2 10K_0402_5%
@ 1 2 @ 1 2 DMN66D0LDW-7_SOT363-6
6
J4 J5 R2147 2 @ 1 Q2003B
<34> EC_MUTE# D
JUMP_43X39 JUMP_43X39 2 G
1 2 1 2 R2148 2 283@ 1 S
<7> HDA_RST_AUDIO#
@ 1 2 @ 1 2 283@ GNDA
1
J6 J7 10K_0402_5%
JUMP_43X39 JUMP_43X39 1 2
4 4
1 2 1 2
@ 1 2 @ 1 2 @ C2139 GND
1U_0402_6.3V6K
GND
GND GNDA GND GNDA
To solve the background noise while combo jack
connecting to an active
speaker and system entry into S3/S4/S5 without analog
power Security Classification Compal Secret Data Compal Electronics, Inc.
HD Audio Codec_ALC283/255 colay
A4WAL_Braswell-M/D_LA-C371P
WWW.AliSaler.Com
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A B C D E
FAN1 Conn Screw Hole
+5VS C632 V1.0 modify

4.7U_0603_10V6K
1 2
H3 H4 H5 H6 H9 H10 H11 H21 H22 H24 H17 FD1 FD2
H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P3
U31 H_3P3
1 8 @ @
1
2 EN GND 7
1
+VCC_FAN1 3 VIN GND 6 FIDUCIAL_C40M80 FIDUCIAL_C40M80
1
2 @ 1 4 VOUT GND 5
<34> EN_DFAN1 VSET GND FD3 FD4
R515 NCT3942S SOP 8P @ @ @ @ @ @ @ @ @ @
1 @
0_0402_5%
C626 H13 H14 H15 H16 H20 V0.2 modify @ @
1
.1U_0402_16V7K H_4P0 H_4P0 H_4P0 H_4P0 H_4P0
2 FIDUCIAL_C40M80 FIDUCIAL_C40M80
@EMC@
1
C627
4.7U_0603_10V6K
+3VS 1 2 @ @ @ @ @
@ C631
1
1000P_0402_50V7K
R516 1 2
10K_0402_5%
40mil
JFAN1
2
+VCC_FAN1 1
2 1 4
<34> FAN_SPEED1 3 2 GND 5
3 GND H12 H18
1
C630 H_3P7X3P2N H_6P0N
1000P_0402_50V7K ACES_88231-03041 H23 H25 H_3P7X3P2N H_6P0N
@ CONN@ H_3P5X3P0N H_3P0N
2
SP020020710
@ @ @ @
1
G-Sensor reserved for BA serial +3VS
Reset Circuit
+3VLP
R2632 1 @ 2 0_0402_5%
MAINPWON <34,40,42>
2
1
R349 R2631 1 2 0_0402_5%

+3VS EC_RST# <34>
R521 10K_0402_5%
10K_0402_5%
GSEN@ U2 GSEN@
6
1 C633 1 2 10U_0603_6.3V6M V1.0 modify
2
8 Vdd_IO GSEN@ BI_GATE# 2 G

D
4 CS 14 C628 1 2 0.1U_0402_16V4Z Q2005B

<15,26,30,34> EC_SMB_CK2 6 SCLSPC Vdd BI_GATE PH to +RTCVCC at PWR side S
<15,26,30,34> EC_SMB_DA2
1
SDA/SDI/SDO
3
7 1
R519 1 @ 2 10K_0402_5% SDO/SA0 11 G_INT BI_GATE 5 G
D
+3VS INT1 G_INT <31> <40> BI_GATE

R520 1 GSEN@ 2 10K_0402_5% 16 9 G_INT2 1 2 S C347
ADC1 INT2 G_INT2_R <32>
15 R1167 Q2005A .1U_0402_16V7K
4
13 ADC2 10 0_0402_5% DMN66D0LDW-7_SOT363-6 2
ADC3 RES
@
2
3 NC 5
NC GND 12
GND
LIS3DHTR_LGA16_3X3
GSEN@
LIS3DH
SA0 ->0, Address is 0011 000 (0x30h)
SA0 ->1, Address is 0011 001 (0x32h)
Debug SW
BI SW
Reset Button SW4
1 BI_GATE
1
Reset Button
2
SW2 2
3
1 2 BI_GATE 3
4
GND 5
SKPMAME010_2P GND 6
GND 7
GND
MSS312-Q-T-R(913)_3P
V0.2 modify

FAN & Screw Hole & Sensor/B
A B C D E
C983
@ .1U_0402_16V7K
VIH=1.2~5.5V 1 2 Rise Time:
3.3V@100k/0.1uF=3.538ms 3.3V@330pF = 889.68us
3.3V@120k/0.1uF=4.272ms
1
U11
14 +3VS_OUT
JP36JP@ 5.0V@330pF = 1348us Power-off sequencing schematic Q2509,Q2510,Q2511
V0.2 modify +3VALW VIN1 VOUT1 +3VS
2
VIN1 VOUT1
13
C976 JUMP_43X118
+3VS_OUT Change to SB00000I200
1
SUSP# R927 120_0402_5%@ 3VS_ON 3
ON1 CT1
12 2 1 470P_0402_50V7K C981 Vgs = 0.49V~1V
@ .1U_0402_16V7K
C980 2 1 +5VALW 4 11
.1U_0402_16V7K VBIAS GND 2
1 @ 2 5VS_ON 5 10 2 1 470P_0402_50V7K
1 R926 0_0402_5% ON2 CT2 C967 EC_SUSPWRDNACK 1
<34> EC_SUSPWRDNACK
0701 update @ +5VALW 6 9 JP37JP@ +5VS_OUT
1 2 7 VIN2 VOUT2 8 +5VS_OUT
VIN2 VOUT2 +5VS 1
C979 C982
.1U_0402_16V7K 1 2 15 JUMP_43X118 .1U_0402_16V7K
GPAD SPOK
C984 @ EM5209VF_DFN14_3X2 2
1
.1U_0402_16V7K D Q20
+1.05VALW_OFF 2 L2N7002LT1G_SOT23-3
G @
U11,U59,U60 change to SA00007PM00 - EM5209VF V0.2 modify S
3
C989 @ Rise Time:
VIH=1.2~5.5V 1 2 .1U_0402_16V7K 1.8V@330pF = 485.28us +1.05VALW_PWRGD <44,46>
3.3V@82k/0.1uF=3.042ms 1.35V@330pF = 363.96us
1
U59 JP38JP@ D Q21
3.3V@47k/0.1uF=1.893ms
V0.2 modify +1.8VALW 1 14 +1.8VS_OUT +1.8VS +1.24VALW_OFF 2 L2N7002LT1G_SOT23-3
2 VIN1 VOUT1 13 @
VIN1 VOUT1
G V0.2 modify
JUMP_43X79 +1.8VS_OUT S
3
SUSP# R1055 1 @ 2 0_0402_5% 1.8VS_ON 3 12 1 2 C1123 1
@ ON1 CT1 1000P_0402_50V7K C985
C1125 1 2 +5VALW 4 11 .1U_0402_16V7K
VBIAS GND +1.24VALW_PWRGD <45,46>
.1U_0402_16V7K
1
1 @ 2 +3V_SOC_ON 5 10 2 1 470P_0402_50V7K 2 D Q22
<45> +1.8VALW_PWRGD ON2 CT2
R1056 0_0402_5% C1127 +1.8VALW_OFF 2 L2N7002LT1G_SOT23-3
@ +3VALW 6 9 JP39JP@ G @
1 2 7 VIN2 VOUT2 8 +3V_SOC_OUT +3V_SOC_OUT
+3V_SOC S
3
C1128 VIN2 VOUT2
1
.1U_0402_16V7K 1 2 15 JUMP_43X79 C987
GPAD .1U_0402_16V7K +1.8VALW_PWRGD
2 @ 1 +3V_SOC_ON C990 @ EM5209VF_DFN14_3X2
<34,42,44,45,46> SPOK
1
R1061 47K_0402_5% .1U_0402_16V7K 2 D Q23
+3V_SOC_OFF 2 L2N7002LT1G_SOT23-3
G @
S
3
2 2
VIH=1.2~5.5V C991 @
3.3V@82k/0.1uF=3.042ms R1059 VGA@ .1U_0402_16V7K
3.3V@47k/0.1uF=1.893ms 1K_0402_5%
2 1 1 2 Rise Time:
<9> DGPU_PWR_EN2
3.3V@330pF = us
R1010 1 VGA@ 2 100K_0402_5% 1.05@1000pF = us
U60 JP43JP@
+3VS 1 14 +3VSDGPU_AON_OUT +3VSDGPU_AON
R1024 1 @ 2 100K_0402_5% 2 VIN1 VOUT1 13
VIN1 VOUT1 VGA@ C1124 JUMP_43X79 +3VSDGPU_AON_OUT
R1058 2 @ 11K_0402_5% +3VSDGPU_AON_ON 3 12 2 1 470P_0402_50V7K 1
<6> DGPU_PWR_EN1 ON1 CT1
@ C986
C1126 1 2 +5VALW 4 11 V0.2 modify .1U_0402_16V7K
.1U_0402_16V7K VBIAS GND VGA@ VGA@
1 @ 2 +1.05VSDGPU_ON 5 10 2 1 470P_0402_50V7K 2
<15,31,51> VGA_PWROK ON2 CT2
R1062 0_0402_5% C2538
@ +1.05VALW 6 9 JP44JP@
1 2 7 VIN2 VOUT2 8 +1.05VSDGPU_OUT +1.05VSDGPU_OUT
VIN2 VOUT2 +1.05VSDGPU
C1130 1
.1U_0402_16V7K 15 JUMP_43X79 C988
1 2 GPAD .1U_0402_16V7K
EM5209VF_DFN14_3X2 VGA@
C992 @ VGA@ 2
.1U_0402_16V7K
+5VALW +1.35V
+3VS to +3VSDGPU_MAIN for GC6-2.0
2
2
R554 R573
100K_0402_5% 470_0603_5%
+3VS +3VSDGPU_AON R2633 +3VSDGPU_MAIN @ @
+3VSDGPU_MAIN 0_0603_5%
1
U14 1 2
1
3 5 1 SYSON# +1.35V_R 3
IN OUT NGC6@
100mil(1.5A)
6
2 2
GND
2 4 3 C625 V0.2 modify
C624 EN OC GC6@ SYSON 5 2 SYSON#
1 4.7U_0603_6.3V6K <31,34,43> SYSON
GC6@ SY6288C20AAC_SOT23-5 Q2515B Q2515A
1U_0402_6.3V6K GC6@ DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6
1
1 @ @
3VSDGPU_MAIN_EN <15,51>
3VSDGPU_MAIN_EN From GPU

+5VALW +0.675VS
1
+5VALW +1.5VSDGPU
R552 R566
100K_0402_5% @ @ 470_0603_5%
2
@
+5VALW +VGA_CORE R1007 R571
2
100K_0402_5% 47_0603_5% +0.675VS_R
@ SUSP
<43> SUSP
2
@
1
3
R1039 R572
100K_0402_5% 47_0603_5% 1.5VS_DGPU_PWR_EN# +1.5VSDGPU_R
@
3
2 5 SUSP
<34,41,43,45> SUSP#
1
DGPU_PWR_EN_SOC1.8V# Q2006B
+VGA_CORE_R 1 Q2006A @
4
4 4
1.5VS_DGPU_PWR_EN 5 2 1.5VS_DGPU_PWR_EN# R555 @ DMN66D0LDW-7_SOT363-6
<15,50> 1.5VS_DGPU_PWR_EN
3
Q45A 10K_0402_5%
2
@ @ Q45B DMN66D0LDW-7_SOT363-6 @
4
R1005 DMN66D0LDW-7_SOT363-6 @ DMN66D0LDW-7_SOT363-6

2
DGPU_PWR_EN_SOC1.8V 5 2 DGPU_PWR_EN_SOC1.8V# 100K_0402_5% @

Q2007A
2
Q2007B DMN66D0LDW-7_SOT363-6
4
R1041 DMN66D0LDW-7_SOT363-6 @
@
100K_0402_5% Security Classification Compal Secret Data Compal Electronics, Inc.
1
DC INTERFACE
WWW.AliSaler.Com
A B C D E
A B C D
1 1
+19V_VIN
@ PJP101
ACES_50305-00441-001_4P
+19V_ADPIN 5A_Z120_25M_0805_2P
+19V_ADPIN 1 2
1
2 EMI@ PL101
3
4
GND
1
GND
1
EMI@ PC102
100P_0603_50V8 EMI@ PC103
2
1000P_0603_50V7K
2
2 2
@ PR111
0_0402_5%
1 2
+3VLP +CHGRTC
- PBJ101 @ + PR112
560_0603_5%
PR113
560_0603_5%
2 1 1 2 1 2 +RTCBATT
ML1220T13RE
3 3
4 4

DCIN / RTC
Custom
A4WAL_Braswell-M/D_LA-C371P 1.0

A B C D
A B C D
+3VLP
PR208 100_0402_1%
1 2
EC_SMB_DA1 <34,41>
PR210 100_0402_1%
1 2
EC_SMB_CK1 <34,41>
1
@ PC202
0.1U_0603_25V7K
1
1 1
@ PJP201 PR211 @ PR204 @ PR205

1 6.49K_0402_1% 10K_0402_1% 10K_0402_1%
1 2 1 2
+3VLP
2
2 3
1
EC_SMB_DA1-1 @ PU201
3 4 EC_SMB_CK1-1 @ PR206 1 8
4 5 BATT_TS 1 2 100K_0402_1% VCC TMSNS1
5 6 BATT_B/I PR209
BATT_TEMP <34> 2 7 2 1
6 7 1K_0402_1% GND RHYST1
2
7 8 MAINPWON 3 6 @ PR207
8 9 +RTCVCC <34,37,42> MAINPWON OT1 TMSNS2
1
47K_0402_1%
GND 10 4 5
GND OT2 RHYST2 @ PH201
CVILU_CI9908M2HR0-NH G718TM1U_SOT23-8 100K_0402_1%_NCP15WF104F03RC
2
PR212
100K_0402_5% Close to fan
1
D
2 PQ201
<37> BI_GATE G BSS138LT1G_SOT23-3
S
3
+17.4V_BATT+ 5A_Z120_25M_0805_2P
1 2
EMI@ PL202
1 2
+17.4V_BATT
EMI@ PL201
EMI@
1
1
2
5A_Z120_25M_0805_2P @EMI@ For KB9022 Need confirm the setting 2
PC201 PC204
1000P_0603_50V7K 0.01U_0603_50V7K
OTP
℃
2
2
For KB9022
sense 20mΩ Active Recovery PR202
92 1.0V
56℃
65W 69.55W,0.73V 55.9W,0.59V 10KΩ
2.0V
45W 48.15W,0.73V 38.7W,0.59V 3.83KΩ
PR216 16.9K ohm
+EC_VCCA
PR202=PW/19*20*0.02*PR202(10K+PR202)
ADP_I <34,41>
3 3
1
PR216 45W@ PR202
16.9K_0402_1% 65W@ PR202 3.83K_0402_1%
10K_0402_1%
2
<34> VCIN0_PH
+19VB_5V
VCIN1_PROCHOT <34>
1
@ PR230
80.6K_0402_1%
@ PR231
2
0_0402_5%
1
1 2
VCIN1_BATT_DROP <34> PH202
100K_0402_1%_NCP15WF104F03RC
1
2
@ PC203
2
1
PR203
0.1U_0402_25V6 @ PR229 10K_0402_1%
1
Close to CPU
2
10K_0402_1%
COMMON PART
2
4 4
<34> ECAGND

BATTERY CONN / OTP
Custom 1.0
WWW.AliSaler.Com
A B C D
A B C D
Protection for reverse input
Vgs = 20V
1
PQ301 D
2
Vds = 60V +19VB
G Id = 250mA
S 2N7002KW _SOT323-3
3
PR302
PR301 max Power loss 0.22W for 90W;0.12W for 65W system
1 2 1 2 Rds(on) typ = 15.8mohm max Rds(on) = 15.8mohm max
CSR rating: 1W
1
1M_0402_5% 3M_0402_5%
Vgs = 20V VACP-VACN spec < 80.64mV Vgs = 20V 1
Need check the SOA for inrush Vds = 30V Vds = 30V
ID = 10.5A (Ta=70C) ID = 10.5A (Ta=70C)
+19V_VIN MDU1512RH_POW ERDFN56-8-5
+19V_P1 +19V_P2
1 1 PR303 PL301 1UH_2.8A_30%_4X4X2_F +19VB_CHG
2 2 0.02_1206_1% EMI@ 1
5 3 3 5 1 4 1 2 2
Isat: 4A 5 3
2200P_0402_25V7K
10U_0805_25V6K
10U_0805_25V6K
2 3
2200P_0402_50V7K
0.1U_0402_25V6
DCR: 27mohm
0.1U_0402_25V6
PQ302
4
@EMI@ PC306
1
1
PC303
PC304
EMI@ PC305
0_0402_5% PQ303
0.01U_0402_50V7K
PC301
@ PR304
4
1
1
AON7506_DFN33-8-5 +19V_VIN PQ304
PC302
PC307
AON7506_DFN33-8-5
2
2
VF = 0.5V
2
2
3
2
PD301
ACDRV_CHG_R BAS40CW _SOT323-3
0.1U_0402_25V6
BATDRV_CHG 1 2BATDRV_CHG_R
0.1U_0402_25V6
1
1
PC308
PR305
PC310
1 1
1 2
10_1206_1%
PC311 4.12K_0603_1%
0.047U_0402_25V7K
PR306
2
PC309 1 2 BST_CHG_R
0.1U_0402_25V6 VF = 0.37V
5
2.2_0603_5%
AON7408L_DFN8-5
PR307
PD302
2
RB751V-40_SOD323-2
PQ305
PR308 Power loss: 0.32W for 3.5A
ACP_CHG
0_0603_5% 7X7X3 CSR rating: 1W
VCC_CHG
2
2
UG_CHG 1 2UG_CHG_R
4 2
Isat: 3.8A VSRP-VSRN spec < 81.28mV
4.12K_0603_1%
4.12K_0603_1%
1
REGN_CHG
PC312 +17.4V_BATT
BST_CHG
PR309
PR310
UG_CHG
1 2 PL302
LX_CHG
10UH_3.5A_20%_7X7X3_M PR311
3
2
1
1U_0603_25V6K 1 2 0.01_1206_1%
ACN_CHG
LX_CHG 1 2 CHG 1 4
2
PC313
SRN_CHG_R
SRP_CHG_R
5
@EMI@ PR312
1U_0603_25V6K 2 3
4.7_1206_5%
20
19
18
17
16
AON7406L_DFN8-5
PQ306
PU301
1
VCC
PHASE
HIDRV
BTST
REGN
10U_0805_25V6K
10U_0805_25V6K
21
PAD
0.1U_0402_25V6
0.1U_0402_25V6
PC314
PC315
1
1
1 15 LG_CHG 4
ACN LODRV
PC316
PC317
2
2
2 14
680P_0402_50V7K
ACP GND
@EMI@ PC319
PR313
3
2
1
2
1
BQ24725ARGRR_QFN20_3P5X3P5 10_0603_1%
CMSRC_CHG 3 13 1
SRP_CHG 2 SRP_CHG_R
CMSRC SRP
1
PR314
2
6.8_0603_1%
ACDRV_CHG 4 12 1
SRN_CHG 2 SRN_CHG_R
2
ACDRV SRN PC318
0.1U_0603_16V7K
For 4S per cell 4.35V battery 1 2 5 11 BATDRV_CHG
+3VLP ACOK BATDRV
PR315 100K_0402_1%
ACDET
IOUT
SDA
SCL
ILIM
ACDET_CHG 1 2
@ PR321 +3VLP
<9,34> ACIN
316K_0402_1%
6
10
1
3 3
+3VALW
PR328 ILIM_CHG 1 2
2M_0402_1% PR316
100K_0402_1%
316K_0402_1%
0.01U_0402_25V7K
ACDET_CHG
1
IOUT_CHG
PC320
PR317
2
1
PR318
422K_0402_1%
1
1 2
+19V_VIN
2
@ PR329
2
0_0402_5%
PR329(PVT R-short)
1 2
PQ307
PR330 LTC015EUBFS8TL_UMT3F
<34> BATT_4S
100K_0402_1%
0.22U_0402_16V7K
66.5K_0402_1%
1 2 2
EC_SMB_CK1 <34,40>
100P_0402_50V8J
1
1
PC321
1
PC322
PR319
3
EC_SMB_DA1 <34,40>
1
PQ308 D
2
2
<34,38,43,45> SUSP#
2
G
1 2
PR320
S 2N7002KW _SOT323-3 0_0402_5% ADP_I <34,40>
3
@ PC323
100P_0402_50V8J
2
Vin Dectector
4
Close EC chip 4
Min. Typ Max.

L-->H 17.16V 17.63V 18.12V
H-->L 16.76V 17.22V 17.70V
VILIM = 20*ILIM*Rsr
ILIM = 3.3*100/(100+316)/20/0.01
= 3.966 A Security Classification Compal Secret Data Compal Electronics, Inc.
ILIM*0.01*20(IC Current sense amplifier gain)= Charger
VPR311*20=+3VALW*100(PR317)/(100+316) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
A B C D
A B C D E
Module model information

SY8208B_V2.mdd
SY8208C_V2.mdd
1 1
PR402
499K_0402_1%
+19VB ENLDO_3V5V 1 2
5A_Z120_25M_0805_2P PU401 +19VB
SY8286BRAC_QFN20_3X3
1
150K_0402_1%
1 2 +19VB_3V BST_3V1 2
PR401 1 2 PC403
PR404
@ 0_0603_5%
EMI@ PL401 0.1U_0402_25V6
2200P_0402_50V7K
2
10U_0805_25V6K
@EMI@ PC401
EMI@ PC404
0.1U_0402_25V6
BS
IN
IN
IN
IN
1
1
PC405
LX_3V 6 20 PL402
LX LX
2
2
7 19 LX_3V 1 2
GND LX +3VALWP
@EMI@ PR405
8 18 1.5UH_PCMB053T-1R5MS_6A_20%
GND GND
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
4.7_1206_5%
1
9 17
PG LDO +3VLP
PC407
PC408
PC409
PC410
1
10 16
2
NC NC PC411
OUT
EN2
EN1
21
NC
4.7U_0603_6.3V6M
FF
2
GND
1 3V_SN 2
PR412
11
12
13
14
15
680P_0603_50V7K
100K_0402_5% 3.3V LDO 150mA~300mA
@EMI@ PC412
1 2
2 +3VALWP 2
ENLDO_3V5V
Vout is 3.234V~3.366V Ipeak=7A
Imax=4.9A
2
<34,38,44,45,46> SPOK Iocp=10A
Check pull up resistor of
SPOK at HW side @ PJ401
PC402 PR403 +3VALWP 1 2 +3VALW
1000P_0402_25V8J 1K_0402_5% 1 2
<34> 3V_EN 3V_FB 1 2 1 2 JUMP_43X118
+19VB @ PJ402
5A_Z120_25M_0805_2P +19VB_5V +5VALWP 1 2 +5VALW
@ 1 2
1 2 +19VB_5V BST_5V 1 2
PR407 1 2 PC416 JUMP_43X118
0_0603_5% 0.1U_0402_25V6
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
EMI@ PL403 PU402 SY8286CRAC_QFN20_3X3

1
1
PC414
PC415
EMI@ PC417
@EMI@ PC418
BS
IN
IN
IN
IN
5*5*3
2
LX_5V 6 20
@ LX LX PL404
7 19 LX_5V 1 2 +5VALWP
GND LX
3 8 18 1.5UH_PCMB053T-1R5MS_6A_20% 3
GND GND
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
680P_0603_50V7K 4.7_1206_5%
PR408
PC419
1
@EMI@
SPOK 1 2 9 17 1 2
PG VCC
PC420
PC421
PC422
PC423
@ PC428
@ PC427
@ PR413 10 16
2
NC NC 4.7U_0603_6.3V6M
1 5V_SN
0_0402_5%
OUT
LDO
2
EN2
EN1
21
FF
GND
11
12
13
14
15
PC425
VL
@EMI@
2
Vout is 4.998V~5.202V
ENLDO_3V5V
PR409 5V LDO 150mA~300mA

2.2K_0402_5%
1
5V_EN
PC424
4.7U_0603_6.3V6M
1 2
<34> EC_ON @ PR410
Ipeak=7A
0_0402_5% Imax=4.9A
2
1 2
<34,37,40> MAINPWON Iocp=10A
5V_EN
1M_0402_1%
4.7U_0402_6.3V6M
1
PC413 PR406
1
PR411
PC426
1000P_0402_25V8J 1K_0402_5%
5V_FB 1 2 1 2
2
2
EC VDD0 is +3VL, PC426 UNPOP

4 EC VDD0 is +3VALW, PC426 POP 4

3VALW/5VALW
A B C D E
5 4 3 2 1
D D
Pin19 need pull separate from +1.35VP.

If you have +1.35V and +0.675V sequence question, 0.675Volt +/- 5%
5A_Z120_25M_0805_2P you can change from +1.35VP to +1.35VS. TDC 0.84A
+19VB 1 2 +19VB_1.35V PR501 Peak Current 1.2A
2.2_0603_5%
EMI@ PL501 BST_1.35V_R 1 2 BST_1.35V
+1.35VP
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
1
1
@EMI@ PC502 UG_1.35V +0.675VSP
EMI@ PC503
PC504
PC505
2
1
PC501 LX_1.35V
10U_0805_6.3V6K
10U_0805_6.3V6K
0.1U_0603_25V7K
1
PC506
PC507
16
17
18
19
20
5
PU501
C C
VLDOIN
PHASE
UGATE
BOOT
VTT
2
21
PAD
PQ501 LG_1.35V 15 1
AON7408L_DFN8-5 4 LGATE VTTGND
14 2
PR502 PGND VTTSNS
PL502 9.1K_0402_1%
1
2
3
1.5UH_PCMC063T-1R5MN_9A_20% 1 2 CS_1.35V 13 3
1 2 PC508 CS RT8207MZQW _W QFN20_3X3 GND
+1.35VP +5VALW 1U_0603_10V6K
1
1 2 12 4 VTTREF_1.35V
2 1 VDDP VTTREF
5
@EMI@ PR503 PR504 PR511
1
1 4.7_1206_5% PQ502 5.1_0603_5% 2.2_0402_5% 11 5
+1.35VP
330U_2.5V_ESR17M_6.3X4.5
VDD VDDQ
PGOOD
1 2 VDD_1.35V PC510
+5VALW
1 2
+ 0.033U_0402_16V7K
PC509
TON
2
FB
S5
S3
1
@EMI@ PC512 4
2 680P_0402_50V7K PC513
2
10
6
1U_0603_10V6K PR505
2
1 2
SI7716ADN-T1-GE3_POW ERPAK8-5 +1.35VP 100K_0402_1%
1
2
3
S3_0.675VSP
FB_1.35V
S5_1.35V
PR506
TON_1.35V
8.2K_0402_1%
<5> DDR_PW ROK 2 1 +1.35VP
PR507
B 887K_0402_1% B
+19VB_1.35V 1 2 Output 1.35*1.01 more 1%
1
@ PR509 PR508
0_0402_5% 10K_0402_1%
1 2
<31,34,38> SYSON
2
1
@ PC514
0.1U_0402_16V7K
2
1 2
PR510 @ PJ501
Mode Level +0.675VSP VTTREF_1.35V <34,38,41,45> SUSP# 0_0402_5% +1.35VP 1 2 +1.35V
1 2
S5 L off off
1
JUMP_43X118
S3 L off on D
1
@ PC515 @ PJ502
S0 H on on 2 0.1U_0402_16V7K 1 2
2
<38> SUSP G 1 2
JUMP_43X118
Note: S3 - sleep ; S5 - power off @ PQ503 S
3
2N7002KW _SOT323-3 @ PJ503
1 2
+0.675VSP 1 2 +0.675VS
A
JUMP_43X39 A

1.35VP/0.675VSP
5 4 3 2 1
5 4 3 2 1
D D
@ PR611
1 2
+3VALW 10K_0402_5%
EN pin don't floating

If have pull down resistor at HW side, pls delete PR2
+1.05VALW_PWRGD <38,46>
5A_Z120_25M_0805_2P
+19VB PU601
1 2 +19VB_1.05V 2 9 PC605 @EMI@ PR603 @EMI@ PC602
IN PG 4.7_1206_5% 680P_0603_50V7K
10U_0805_25V6K
EMI@ PL602 3 1 BST_1.05V 1 2
PR604 1 2 1 2SNB_1.05V 1 2
0.1U_0402_25V6
2200P_0402_50V7K
IN BS
1
@ 0_0603_5%
@EMI@ PC604
PC607
4 6 0.1U_0402_25V6 TDC 8A
EMI@ PC603
IN LX
2
5 19
IN LX PL601 1.062V 1.01%
<34> EC_EN_1.05VALW
@ PR610
0_0402_5%
7
GND LX
20 LX_1.05V 1 2
+1.05VALWP
1 2 8 14 FB_1.05V PCMB063T-1R0MS 12A
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
GND FB
1
@ PR601 18 17 LDO_3V FB = 0.6V PL602 from SH00000PJ00
330P_0402_50V7K
1_0402_5% GND VCC
PC609
PC610
PC611
PC612
PC615
PC616
change to common part (R1)
1
<34,38,42,45,46> SPOK 1 2 11 10
PC608
2
EN NC PC613 SH00000YE00 2013/10/23
PR601(PVT R-short) ILMT_1.05V 13 12 2.2U_0402_6.3V6M PR606 @ @
2
ILMT NC 15.4K_0402_1%
1
15 16
+3VALW
2
BYP NC
1
PR602 @ PC601
1M_0402_1% 0.22U_0402_10V6K 21 PC609, PC610 from 47U_0603_6.3V6M change to
PAD
1
PC614
2
1U_0402_6.3V6K SY8288RAC_QFN20_3X3
22U_0603_6.3V6M 2013/10/23
2
2
C 1 2 VNN_SENSE <9> C
VFB=0.6V @ PR609
1
Vout=0.6V* (1+R1/R2) 10_0402_5%
Vout=1.062V PR608
20K_0402_1%
2
(R2) @ PJ601
+1.05VALWP 1 2 +1.05VALW
1 2
LDO_3V JUMP_43X118
1
@ PJ602 +1.05VALW
+1.05VALWP 1 2
@ PR605 1 2
0_0402_5% JUMP_43X118
2
ILMT_1.05V
PR606 part count reduce
1
@ PR607
0_0402_5%
2
SY8208D_V1.mdd
The current limit is set to 8A, 12A or 16A when this pin
is pull low, floating or pull high
B B
A A

+1.05VALW
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DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.0
5 4 3 2 1
5 4 3 2 1
5A_Z120_25M_0805_2P
1 2 VIN_1.15VALW
+3VALW
22U_0603_6.3V6M
@ PL701
0.1U_0402_10V7K
1
1
PC701
PC715
1 2
1 2
@ PJ704
2
JUMP_43X79 @
@ PJ701
D
+1.8VALW +1.15VALW D
PU701 +1.15VALWP 1 2
1 2
1
4 5 PL702 JUMP_43X118
@PR717 PGND NC 1UH_2.8A_30%_4X4X2_F
<48> +1.15VALW_PWRGD 10K_0402_5% 3 6 LX_1.15VALW 1 2
IN LX +1.15VALWP
2 7
68P_0402_50V8J
EN_1.15VALW
2
PG EN
1
@EMI@ PC703 @EMI@ PR702
1
1
PC702
1 8
4.7_0603_5%
FB SGND 9 PR703
PGND 39.2K_0402_1%
Rup
1
22U_0603_6.3V6M
22U_0603_6.3V6M
2
PC704
PC705
SY8003DFC_DFN8_2X2
2
1
680P_0402_50V7K
2
@ PR704 1K_0402_5%
<34,38,42,44,45,46> SPOK 1 2 EN_1.15VALW FB_1.15VALW
1
PR705 1M_0402_5%
0.1U_0402_10V7K
2
VFB=0.6V
PC706
PR706 Rdown
<34,38,41,43> SUSP# 1 2
PR712 42.2K_0402_1%
C
0_0402_5%
Vout=0.6V* (1+Rup/Rdown) C
2
PR712(PVT R-short) @
1
@
5A_Z120_25M_0805_2P
1 2
@ PL704
1 2 VIN_1.8VALW
+3VALW 1 2
22U_0603_6.3V6M
@ PJ702
JUMP_43X79
1
@ PJ703
+3VALW
PC708
+1.8VALWP 1 2 +1.8VALW
2
1 2
1
JUMP_43X79
PU702
PL703
PR715 1UH_2.8A_30%_4X4X2_F
100K_0402_5% 4
IN LX
3 LX_1.8VALW 1 2
+1.8VALWP
2
<38> +1.8VALW_PWRGD 5 2
22U_0603_6.3V6M
22U_0603_6.3V6M
PG GND
20K_0402_1%
@EMI@ PR716
1
1
6 1
68P_0402_50V8J
FB_1.8VALW
4.7_0603_5%
FB EN
1
PR708
PC710
PC711
B B
PC709
Rup
2
SY8032ABC_SOT23-6
2
2
2
FB_1.8VALW
10K_0402_1%
@EMI@ PC713
680P_0402_50V7K
<38,46> +1.24VALW_PWRGD 1 2
PR714
1
0_0402_5%
PR709
@
2
1 2 EN_1.8VALW
Rdown
<34,38,42,44,45,46> SPOK
2
0.22U_0402_10V6K
@ PR710
1
1
1M_0402_1%
0_0402_5%
PC712
PR711
2
@ @
2
VFB=0.6V
Vout=0.6V* (1+Rup/Rdown)
A A

+1.15VALW/1.8VALW
Custom 1.0
5 4 3 2 1
5 4 3 2 1
D D
+3VALW
+3VALW
1
1
PJ801 @
JUMP_43X79
1U_0402_6.3V6K
1
2
PC801
2
2
PC802
1
4.7U_0603_6.3V6K
6
PU801
5VIN_1.24VALW
VPP
2
7 VIN
<38,45> +1.24VALW_PWRGD @ PR809 POK 9
0_0402_5% TPAD
<38,44> +1.05VALW_PWRGD 1 2 3
VO
2
PR810 PR801 EN_1.24VALW 8 4 +1.24VALWP
0.01U_0402_25V7K
VEN VO
1
100K_0402_5% @ 100K_0402_5%
11K_0402_1%
GND
1
<34,38,42,44,45> SPOK 1 2 2
ADJ
PR802
PC803
0.1U_0402_16V7K
1
PC804
Rup
1
PR803 PC805
2
+3VALW 1M_0402_5% 22U_0603_6.3V6M
@ FB_1.24VALW
2
G971ADJF11U_SO8
C C
1
PR804
20K_0402_1%
Rdown
2
@ PJ802
Vout=0.8V* (1+Rup/Rdown) +1.24VALWP 1 2 +1.24VALW
1 2
JUMP_43X79
B B
A A

1.24VALW
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5 4 3 2 1
5 4 3 2 1
+1.05VALW
1
200_0402_1%
200_0402_1%
301_0402_1%
D D
1
1
1
PC901
PR903
PR902
PR904
0.1U_0402_25V6
2
2
2
2
PR955
20_0402_1%
<9,48> VR_SVID_DATA 1 2
PR956
49.9_0402_1%
<9,48> VR_SVID_ALERT# 1 2
PR957
200_0402_1%
<9,48> VR_SVID_CLK 1 2
+19VB_VCC
+1.8VALW VGATE <34> @EMI@ PL905
5A_Z120_25M_0805_2P
PR905 1 2
1
@ 10K_0402_1%
PR901 1 2
56.2_0402_1% +1.8VALW
+19VB_VCC 1 2
+19VB
ALERT_VCC
SCLK_VCC
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
SDIO_VCC
2
2200P_0402_50V7K
0.1U_0402_25V6
<34,48> VR_HOT# EMI@ PL901
@EMI@ PC906
EMI@ PC907
5A_Z120_25M_0805_2P
1
PC903
PC904
PC905
C PR907 C
1
VRMP_VCC
@ PC902 @ PR906 1K_0402_1%
47P_0402_50V8J <48> VGG_PWRGD 1 2 ENABLE_VCC 1 2 +19VB_VCC
2
2
5
0_0402_5%
PC909 PQ904
PU901 0.01U_0402_25V7K
2
1
2
3
4
5
6
7
NCP81201MNTXG_QFN28_4X4 PR908
ENABLE 0_0603_5%
VR_HOT
SDIO
ALERT
SCLK
VR_RDY
VRMP
1 2UG_VCC_R 4
PR909 29
AGND
PR910 PC910 +SOC_VCC
2.2_0603_5% 2.2_0603_5% 0.22U_0603_25V7K
1 2 VCC_VCC 28 8 BST_VCC 1 2 BST_VCC_R 1 2 PL902
+5VALW VSP_VCC 27 VCC BST 9 UG_VCC AON7518_DFN8-5
3
2
1
VSP HG
1
VSN_VCC 26 10 LX_VCC 1 4
PC911 DIFFOUT_VCC 25 VSN SW 11 0.36UH_PDME064T-R36MS_24A_20%
DIFFOUT PGND
1
1U_0603_10V6K FB_VCC 24 12 LG_VCC SWN1_VCC 2 3 CSN1_VCC
2
FB LG
100K_0402_1%_TSM0B104F4251RZ
COMP_VCC 23 13 TSNS_VCC
ROSC_VCC 22 COMP TSENSE 14 VBOOT/ADDR_VCC @EMI@ PR911
ROSC VBOOT/ADDR
1
@ PR912 4.7_1206_5%
CSCOMP
1
0_0402_5% PR913
CSSUM
Close to MOSFET
CSREF
1SNUB_VCC_12
1
PVCC
1 2 16.2K_0402_1% PR914
IMAX
IOUT
<9> VCC_SENSE
ILIM
1
0_0402_5% PR916 PR917
5
PH902
78.7K_0603_1% 10_0402_5%
2
PC912 PR915 PQ905

21
20
19
18
17
16
15
2
1
AON6554_DFN5X6-8-5
PC913 .01U_0402_16V7K 13K_0402_1%
2
1000P_0402_50V7K
2
IMAX_VCC
CSSUM_VCC
CSREF_VCC
+5VALW
CSCOMP_VCC
ILIM_VCC
2
4 @EMI@ PC914
CSSUM_VCC
CSREF_VCC
@ PR918 680P_0603_50V7K
2
B 0_0402_5% @ B
<9> VSS_SENSE 1 2 1 2
PR919
0_0402_5%
3
2
1
@ PC915
2200P_0402_50V7K
1
1 2
PC916 PR920
1000P_0402_50V7K 165K_0402_1%
2
PR921 2 1
1
49.9_0402_1% PC917
75K_0402_1%
47P_0402_50V8J
1 2 1 2 PC918 2.2U_0603_10V6K
2
1
470P_0402_50V7K PR922
1
PR923
PC920
PR924 21.5K_0402_1% PH901
1K_0402_1% 220K_0402_5%_ERTJ0EV224J PC919
2
1 2 820PF_0402_50V7K
Close to choke
2
PR925 @
2
6.04K_0402_1%
1
ILIM_VCC 1 2 CSCOMP_VCC
1
FB_VCC 1 2 PC922 PC921 PR926

100P_0402_50V8J
PC923 PR927 470P_0402_50V7K
Close to IC side
43.2K_0402_1%
2
1.3K_0402_1%
2
1 2 1 2
0.015U_0402_25V7K
A A

+SOC_VCC
A4WAL_Braswell-M/D_LA-C371P 1.0
5 4 3 2 1
5 4 3 2 1
+1.05VALW
200_0402_1%
301_0402_1%
D D
0.1U_0402_25V6
1
PC924
PR961
PR930
2
2
2
PR958
20_0402_1%
<9,47> VR_SVID_DATA 1 2
PR959
49.9_0402_1%
<9,47> VR_SVID_ALERT# 1 2
PR960
200_0402_1%
<9,47> VR_SVID_CLK 1 2
+1.8VALW
VGG_PWRGD <47>
PR932 +19VB_VGG
1
10K_0402_1%
@ PR931 1 2 5A_Z120_25M_0805_2P
56.2_0402_1% +1.8VALW
+19VB_VGG 1 2
+19VB
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K
1
2
0.1U_0402_25V6
<34,47> VR_HOT# EMI@ PL903
+
@EMI@ PC929
@ PC931
EMI@ PC930
ALERT_VGG
1
SCLK_VGG
PC926
PC927
PC928
C C
SDIO_VGG
PR934 33U_25V_M
VRMP_VGG
1
@ PC925 PR933 0_0402_5% 1K_0402_1% PQ902

47P_0402_50V8J 1 2 ENABLE_VGG 1 2 +19VB_VGG 2
<34> VR_ON
2
AON6552_DFN5X6-8-5
@ PR962 PR935
2
1
0_0402_5% 0_0603_5%
1 2 PC932 1 2UG_VGG_R
4 Height 4.5 mm
<45> +1.15VALW_PWRGD
0.01U_0402_25V7K
2
1
2
3
4
5
6
7
PU902
NCP81201MNTXG_QFN28_4X4
0.22uH (DCR 0.98 +-5%)
ENABLE
VR_HOT
SDIO
ALERT
SCLK
VR_RDY
VRMP
+SOC_VGG
3
2
1
PR936 29 PR937 PC933
2.2_0603_5% AGND 2.2_0603_5% 0.22U_0603_25V7K PL904
1 2 VCC_VGG 28 8 BST_VGG 1 2 BST_VGG_R 1 2 S COIL 0.22UH +-20% 24A 7X7X4 MOLDING
+5VALW VSP_VGG 27 VCC
VSP
BST
HG
9 UG_VGG
1
VSN_VGG 26 10 LX_VGG 1 4
PC934 DIFFOUT_VGG 25 VSN SW 11
DIFFOUT PGND
1
1U_0603_10V6K FB_VGG 24 12 LG_VGG SWN1_VGG 2 3 CSN1_VGG
2
COMP_VGG 23 FB LG 13 TSENSE_VGG
22 COMP TSENSE 14 VBOOT/ADDR_VGG
100K_0402_1%_TSM0B104F4251RZ
ROSC_VGG PR938 @EMI@
ROSC VBOOT/ADDR
1
5
@ PR939 4.7_1206_5%
CSCOMP
1
0_0402_5% PR940 PQ903
CSSUM
Close to MOSFET
CSREF
1SNUB_VGG_12
1
PVCC
1 2 14.7K_0402_1% PR941
IMAX
IOUT
<9> VGG_SENSEP
ILIM
1
47K_0402_5% PR943 PR944
PH903
54.9K_0603_1% 10_0402_5%
2
AON6554_DFN5X6-8-5
PC935 PR942
21
20
19
18
17
16
15
2
1
PC936 .01U_0402_16V7K 13K_0402_1%
2
2
2
CSSUM_VGG
IMAX_VGG
1000P_0402_50V7K
CSREF_VGG
CSCOMP_VGG
ILIM_VGG
2
CSSUM_VGG
PC937 @EMI@
CSREF_VGG
3
2
1
@ PR945 680P_0603_50V7K
2
B 0_0402_5% @ B
<9> VGG_SENSEN 1 2 1 2
PR946 +5VALW
0_0402_5%
@ PC938
2200P_0402_50V7K
1
1 2
PC939 PR947
1000P_0402_50V7K 165K_0402_1%
2
PR948 PC940 2 1
1
49.9_0402_1%
75K_0402_1%
47P_0402_50V8J
1 2 1 2 PC941 2.2U_0603_10V6K
2
1
470P_0402_50V7K PR949
1
PR950
PC943
PR951 <34> VGG_IMON 53.6K_0402_1% PH904
1K_0402_1% 220K_0402_5%_ERTJ0EV224J PC942
2
1 2 820PF_0402_50V7K
Close to choke
2
PR952
2
10K_0402_1% @
1
ILIM_VGG 1 2 CSCOMP_VGG
1
FB_VGG 1 2 PC945 PC944 PR953

100P_0402_50V8J
PC946 PR954 470P_0402_50V7K
Close to IC side
29.4K_0402_1%
2
1.3K_0402_1%
2
1 2 1 2
0.015U_0402_25V7K
A A

+SOC_VGG
1.0
WWW.AliSaler.Com A4WAL_Braswell-M/D_LA-C371P
5 4 3 2 1
4
3
2
1
A
A
+SOC_VCC
4.7U_0402 *5
4.7U_0402_6.3V6M PC1049 22U_0603_6.3V6M PC1029 22U_0603_6.3V6M PC1001

2 1
2
1
2
1
22U_0603_6.3V6M PC1030 22U_0603_6.3V6M PC1002

4.7U_0402_6.3V6M PC1050
2
1
2
1
2 1
22U_0603_6.3V6M PC1023 22U_0603_6.3V6M PC1028
@
2
1
2
1
4.7U_0402_6.3V6M PC1051
2 1 22U_0603_6.3V6M PC1024 22U_0603_6.3V6M PC1027
2
1
2
1
4.7U_0402_6.3V6M PC1052 22U_0603_6.3V6M PC1025 22U_0603_6.3V6M PC1005

2 1
2
1
2
1
22U_0603_6.3V6M PC1026 22U_0603_6.3V6M PC1006

4.7U_0402_6.3V6M PC1053
2
1
2
1
2 1
@ 22U_0603_6.3V6M PC1004 22U_0603_6.3V6M PC1007
2
1
2
1
4.7U_0402_6.3V6M PC1054
2 1 @ 22U_0603_6.3V6M PC1003 22U_0603_6.3V6M PC1008
+22U_0603 * 16 + 4 reserved
B
B
2
1
2
1
@ 22U_0603_6.3V6M PC1021 22U_0603_6.3V6M PC1009

2
1
2
1
@ 22U_0603_6.3V6M PC1022 22U_0603_6.3V6M PC1010

2
1
2
1
+SOC_VGG
22U_0603_6.3V6M PC1059 22U_0603_6.3V6M PC1041 22U_0603_6.3V6M PC1031 22U_0603_6.3V6M PC1011
Issued Date
2
1
2
1
2
1
2
1
C
C
22U_0603_6.3V6M PC1042 22U_0603_6.3V6M PC1032 22U_0603_6.3V6M PC1076
Security Classification
22U_0603_6.3V6M PC1055
2
1
2
1
2
1
2
1
22U_0603_6.3V6M PC1043 22U_0603_6.3V6M PC1033 @ 22U_0603_6.3V6M PC1016

2
1
2
1
2
1
22U_0603_6.3V6M PC1056
2
1
2
1
2
1
2
1

2
1
2
1
2
1
22U_0603_6.3V6M PC1036 @ 22U_0603_6.3V6M PC1019
2011/07/08
22U_0603_6.3V6M PC1058
2
1
2
1
2
1
22U_0603_6.3V6M PC1037 22U_0603_6.3V6M PC1077

2
1
2
1
22U_0603 * 24 + 5 reserved
22U_0603_6.3V6M PC1038 @ 22U_0603_6.3V6M PC1015

2
1
2
1
22U_0603_6.3V6M PC1039 @ 22U_0603_6.3V6M PC1020

2
1
2
1
@ 22U_0603_6.3V6M PC1040 22U_0603_6.3V6M PC1045

2
1
2
1
Compal Secret Data

Deciphered Date
D
D
+1.05VALW
2015/07/08
@ 22U_0603_6.3V6M PC1062
2 1
2
1
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
PC1073 @ 22U_0603_6.3V6M PC1047

Title
Date:
1U_0402 * 5+
1U_0402_6.3V6K
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
2
1
2 1
@ 22U_0603_6.3V6M PC1061
PC1074
2
1
1U_0402_6.3V6K
2 1 @ 22U_0603_6.3V6M PC1046
2
1
PC1075
1U_0402_6.3V6K @ 22U_0603_6.3V6M PC1065

2 1
2
1
PC1072 @ 22U_0603_6.3V6M PC1060

22U_0603*6
1U_0402_6.3V6K
2
1
2 1
Wednesday, March 04, 2015
PC1071
1U_0402_6.3V6K
E
E
Sheet
reserved
49
PROCESSOR DECOUPLING
Compal Electronics, Inc.
of
55
Rev
1.0
4
3
2
1
5 4 3 2 1
EN pin don't floating

If have pull down resistor at HW side, pls delete PR2
D D
VGA_EMI@ PL1101
+19VB 5A_Z120_25M_0805_2P PU1101 VGA@ @VGA_EMI@ @VGA_EMI@
1 2 +19VB_1.5VSDGPUP 2 9 @VGA@ PR1105 0_0603_5% PR1104 PC1103
IN PG 4.7_1206_5% 680P_0603_50V7K
10U_0805_25V6K
3 1 1 2 1 2 PC1105 1 2 SNB_1.5VSDGPUP 1 2
VGA_EMI@ PC1101
@VGA_EMI@ PC1104
BST_1.5VSDGPUP
2200P_0402_50V7K
0.1U_0402_25V6
IN BS
1
0.1U_0402_25V6
VGA@ PC1106
4 6 VGA@ TDC 8A
IN LX
2
5
IN LX
19 VGA@ PL1102
1.527V 1.018% +1.5VSDGPUP
7 20 LX_1.5VSDGPUP 1 2
GND LX
8 14 FB_1.5VSDGPUP PCMB063T-1R0MS 12A
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
GND FB
1
VGA@ PR1102 18 17 LDO_3V_1.5VSDGPUP PL1002 from SH00000PJ00
GND VCC
VGA@ PC1109
VGA@ PC1110
VGA@ PC1111
VGA@ PC1112
@VGA@ PC1115
@VGA@ PC1116
15K_0402_5%
330P_0402_50V7K
change to common part (R1)
1
<15,38> 1.5VS_DGPU_PWR_EN 1 2 11 10 VGA@
2
EN NC SH00000YE00 2013/10/23
VGA@ PC1108
PC1113 GT@
ILMT_1.5VSDGPUP 13 12 2.2U_0402_6.3V6M GM4G@ PR1106 GM2G@ PR1106 PR1106
2
ILMT NC 25.5K_0402_1% 30.9K_0402_1% 30.9K_0402_1%
1
@VGA@ 15 16
+3VALW
2
BYP NC
1
VGA@ PC1114
VGA@
1U_0402_6.3V6K
1M_0402_1% PC1102 21
PAD
1
PR1103 0.1U_0402_16V7K GM4G need 1.35V
2
SY8288RAC_QFN20_3X3
GT/GM2G need 1.5V
2
2
C LDO_3V_1.5VSDGPUP FB = 0.6V C
@
PJ1101
VFB=0.6V
1
1
+1.5VSDGPUP 1 2 +1.5VSDGPU
@VGA@ VGA@ 1 2
PR1101
Vout=0.6V* (1+R1/R2) PR1108 JUMP_43X118
@
20K_0402_1% PJ1102
0_0402_5% Rup=25.5K Vout=1.365V 1 2
2
2
1 2
ILMT_1.5VSDGPUP Rup=30.9K Vout=1.527V (R2) JUMP_43X118
1
@VGA@
PR1107
0_0402_5%
2

SY8208D_V1.mdd
The current limit is set to 8A, 12A or 16A when this pin
is pull low, floating or pull high
B B
A A

1.5VSDGPUP
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1
Sheet 50 of 55
A B C D E
PSI :
1 phase with DCM 0V to 0.8V
1 phase with CCM 1.2V to 1.8V
2 phase with CCM 2.4V to 5.5V
unmount PRV5 for 2 phase select +19VB_GPU

PSI <15>
EN High Threshold = 1.6V VGA_EMI@ PL1201
5A_Z120_25M_0805_2P
+3VSDGPU_AON +19VB_GPU 1 2
+19VB
<15>
DGPU_VID
+3VS
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
1 NGC6@ PR1202 1
@VGA@ PR1204 0_0402_5%
2200P_0402_50V7K
VGA@ PC1202
VGA@ PC1203
VGA@ PC1204
VGA@ PC1207
@VGA_EMI@ PC1205
0.1U_0402_25V6
10K_0402_1%
VGA_EMI@ PC1208
VGA_EN 1 2
10K_0402_5%
10K_0402_5%
@VGA@ PC1209
.1U_0402_16V7K
2
2
2
VGA@ PR1208 GC6@ PR1206 GC6 for GT
2
1
@VGA@ PR1205
@VGA@ PR1203
20K_0402_1% 30K_0402_1% NGC6 for GM
AON6552_DFN5X6-8-5
VREF_VGA2 1 1 2
3VSDGPU_MAIN_EN <15,38>
5
2
VGA@ PQ1201
1
1
1
PR1207
UG1_VGA 1 2 UG1_VGA_R 4
VGA@ PR1211 VGA@ PR1209
2K_0402_1% 20K_0402_1% 0_0603_5%
2 1 2 1REFADJ @VGA@
PR1201
3
2
1
BST1_VGA1 2 BST1_VGA_R
1
1
VGA@ PL1202
PR1210 VGA@ PC1210 VGA@ 0_0603_5% 0.36UH_PDME064T-R36MS1R405_24A_20% +VGA_CORE
1
5
1
18K_0402_1% 2700P_0402_50V7K @VGA@ VGA@ PC1201 LX1_VGA 1 2
UGATE1
BOOT1
VID
PSI
EN
@VGA_EMI@
AON6554_DFN5X6-8-5
680P_0402_50V7K 4.7_1206_5%
0.1U_0603_25V7K
2
2
VGA@ PQ1202
PR1212
6 20 LX1_VGA
REFADJ PHASE1
1
1 1
560U_2.5V_M
560U_2.5V_M
PR1224
1SNUB_VGA1 1
VGA@ PC1212
VGA@ PC1211
0_0402_5% REFIN_VGA 7 19 LG1_VGA 4 + +
@VGA@ REFIN LGATE1 @VGA@ PR1213
VGA@ PR1214
VGA@ PC1213 0_0402_5%
2
1
2 2
@VGA_EMI@
13K_0402_1%
NVVDD_GND_SENSE_R 1 2 VREF_VGA 8 18 PVCC_VGA 1 2
VREF VGA@ PU1201 PVCC +5VS
3
2
1
1
PC1215
1U_0402_6.3V6K RT8812AGQW_WQFN20_3X3 VGA@ PC1214
PR1215 TON_VGA 9 17 LG2_VGA +19VB_GPU
TON LGATE2 1U_0603_10V6K
2
+19VB_GPU 2 1
+19VB_GPU
2
10 16
RGND PHASE2
UGATE2
PGOOD
VGA@ 499K_0402_1%
BOOT2
VSNS
GND
AON6552_DFN5X6-8-5
SS
5
VGA@ PR1216 LX2_VGA
VGA@ PQ1203
2 100_0402_1% 2
21
11
12
13
14
15
1 2
1
VGA@ PC1216
@VGA@ PR1218 0.1U_0603_25V7K UG2_VGA_R 4
0_0402_5%
2
1 2 NVVDD_GND_SENSE_R @VGA@ PR1217 0_0603_5%
<17> VSSSENSE_VGA
BST2_VGA 1 2 BST2_VGA_R PR1214: OCP setting
1
from 50A to 25A
3
2
1
1
@VGA@ PC1217 @VGA@ PC1218 VGA@ PL1203

.1U_0402_16V7K @VGA@ PR1219 0_0603_5% 0.36UH_PDME064T-R36MS1R405_24A_20% +VGA_CORE
2
@VGA@ PR1220 1000P_0402_50V7K UG2_VGA 1 2 UG2_VGA_R LX2_VGA 1 2

2
0_0402_5%
@VGA_EMI@
4.7_1206_5%
1 2 NVVDD_SENSE_R
<17> VCCSENSE_VGA
AON6554_DFN5X6-8-5
PR1222
VGA_PWROK <15,31,38>
VGA@ PQ1204
VGA@ PR1221 H/L side Rds(on): 12.2mohm(Typ), 15mohm(Max)
100_0402_1% VGA@ PR1223 Idsm: 11A@Ta=25C, 14A@Ta=70C
1SNUB_VGA2 1
1 2 10K_0402_5%
+VGA_CORE 2 1 +3VS LG2_VGA 4
CHOKE:0.36uH, DCR 1.4m ohm, L/2 over 36A
680P_0402_50V7K
@VGA_EMI@
FSW = 245.55KHz
PC1219
Iripple = 12.74A
3
2
1
OCP = 50A
OVP=Vout*(145%~155%)
2
PWM-VID Spec and component Values
Remove GPU OTP circuit for HW request
PWM-VID Spec Config B Config C Config D
Vmin 0.6V 0.65V 0.9V
Vmax 1.2V 1.15V 1.15V
3 3
Vboot 0.9V 0.9V 1.028V
Voltage step 6.25mV 25mV 12.5mV
N of Voltage level 96 20 20
Rrefadj PR 20K 39K 27K
Rref1 PR 20K 30K 7.5K
Rboot PR 2K 3K 0
Rref2=PR1209 PR 18K 24K 6.2K
+PR1212
PR 0 3K 1.74K
C PC 2.7nf 1.8nf 5.6nf
N16S-GT N15V-GL N15V-GM
N16V-GM
4 4

+VGA_CORE
A B C D E
5 4 3 2 1
D D
+VGA_CORE
+VGA_CORE
Under GPU Core +VGA_CORE
4.7U_0603_6.3V6M Near GPU Core
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
VGA@ PC1320
VGA@ PC1321
VGA@ PC1322
VGA@ PC1323
VGA@ PC1324
VGA@ PC1325
VGA@ PC1326
VGA@ PC1327
VGA@ PC1328
VGA@ PC1329
PC1330
PC1331
PC1332
PC1333
47U_0805_6.3V6M
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
1
PC1338
VGA@ PC1339
VGA@ PC1340
VGA@ PC1341
VGA@ PC1342
VGA@ PC1343
VGA@ PC1344
VGA@ PC1345
22U_0603_6.3V6M
1
1
2
2
@VGA_EMI@
@VGA_EMI@
@VGA_EMI@
@VGA_EMI@
2
VGA@
C 1U_0402_10V7 C
VGA@ PC1337
1U_0402_10V7
1U_0402_10V7
1U_0402_10V7
VGA@ PC1334
VGA@ PC1335
VGA@ PC1336
1
1
2
2
B B
A A

VGA_CORE CAP
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Date: Wednesday, March 04, 2015
1
Sheet 52 of 55
5 4 3 2 1
Version change list (P.I.R. List) Page 1 of 2

for PWR
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase
SE075562K80 change SE074272K00 PC1210
SD034270280 change SD034200280 PR1209
D SD034750180 change SD034200280 PR1208 D
N16-GM & N16-GT circuit SD034000080 change SD034200180 PR1211
P.51 11/20 DVT
1 Design update SD00000GM80 change SD000000580 PR1210
need to use Config B SD034174180 change SD028000080 PR1224
SD034113280 change SD034130280 PR1214
2 Design update 3.3V/5V Circuit modify for IC update P.42 ADD SE00000M000 PC427 PC428 & PU401,PU402 11/28 DVT
3 Design update P.41 ADD PL301, Remove PJ301 12/04 DVT
4 Design update 1.05V Circuit modify for IC change P.44 12/04 DVT
5 Design update VRAM Circuit modify for IC change P.50 12/04 DVT
6 Design update 1.24V IC Change P.46 PU801 SA000034S00 change to SA00001HW80 12/04 DVT
7 Design update SOC_VCC output MLCC adjust P.49 PC1023 BOM structure change to @ 12/15 DVT
8 Design update Prefer for EC_EN_1.05VALW (turn on SOC suspend)
P.44 ADD EC_EN_1.05VALW Link to circuit 12/15 DVT
9 Design update ADD PR610 for EC controll P.44 ADD PR610 12/15 DVT
C C
remove PC509.PC511.PC516~PC519, ADDPC509
8207P have spike on S5, so change
Design update use ic return to 8207M P.43 change RT8207P to RT8207M 12/16 DVT
10 change PR507 to 887K ohm for frequency
11 Design update common part change all bead change to SM01000P200 12/16 DVT
12 Design update P.46 PR809 change to R-short 12/25 DVT
1.24V Enable pin need bigger voltage PC804 change to "@"
PR803 change to 1M and "@"
13 Design update Combine +1.05VALW and +SOC_VNN to +1.05VALWP.44 & P.49 All SOC_VNN change to 1.05VALW 12/26 DVT
1.05VALW PG enable 1.24V
14 Design update HW sequency change no pull high 12/26 DVT
Let efficiency better P.44
P.46 PU801 pin6 connect 3VALW
15 Design update HW sequency change P.45 +1.15VALW EN change to SUP#, 12/26 DVT
16 Design update PJP201 PCB pad is too short P.40 Part number change to SP020017H00 12/27 DVT
B
17 Design update Let spok signal has rail to discharge P.44 PR602 Delete"@" 12/27 DVT B
PR1224,PR1204,PR1207,PR1201,PR1217,PR1219
18 Design update Reduce DIS use 0hm pcs P.51
change to R-short 12/27 DVT
PR601,PR712,PR329 change to 1ohm
19 Design update Reduce UMA use 0hm pcs,PVT back to R-short PR933,PR906 change to R-short 12/27 DVT
12/29 DVT
20 Design update Follow HW command P.50 PR1102 change to 10K
PC403,PC416,PC605,PC1105 change to
21 Design update Follow FAE command 0.1U_0603_25V7K 12/31 DVT
22 1/7 PVT
Design update Design for HW sequency need P.41 Add PR321 (BOM Structure :@) link to +3VLP
23 Design update Design for sourcer need P.43 Change PQ502 to AON7702 1/8 DVT
24 Design update Follow HW command PR610 instead PR601 1/8 DVT
PR509 PR510 change to 1 ohm
PC515 change to @
PR1102 change to 15k
25 Design update Follow HW command-1.24V P.46 POP PR803 1/12 DVT
26 Design update Change for 1.35V Power budget current limit P.43 Change PR502 to 9.1K 2/3 PVT
A A
27 Design update Change PR329.PR509.PR510.PR610.PR712 to 0 ohm 2/6
Change all 1 ohm to 0 ohm for PVT PVT
28 Design update Follow HW command P.47 PR901 unplug & 1.05V PG pull high resistor"@" 2/10
P.44 PVT
3V & 5V IC Pin 16 connect Pin17
PWR_PIR
5 4 3 2 1
5 4 3 2 1
Version change list (P.I.R. List) Page 1 of 2

for PWR
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase
改改
然將然然然的多多串多串多串改
1.PR5090,PR610 R short
2.1.15VALW PG pin ,net name +1.15VALW_PWRGD,
PU 10K ohm 1.8VALW.
D
1 Design update Follow HW command P.42 然然串接的

@, 同同將
3. +1.15VALW_PWRGD
VGG ENABLE,
0ohm
PR933 R short 的改改改改 2/12 PVT D
2 Design update
3 Design update
4 Design update
5 Design update
6 Design update
7 Design update
8 Design update
9 Design update
C C
Design update
10
11 Design update
12 Design update
13 Design update
14 Design update
15 Design update
16 Design update
17 Design update
B
18 Design update B
19 Design update
20 Design update
21 Design update
22 Design update
23 Design update
24 Design update
25 Design update
26 Design update
27 Design update
A
28 Design update A
PVT

PWR_PIR
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5 4 3 2 1
5 4 3 2 1
A4WAL Power UP Sequence

2015-02-06 S5->S0 S0->S3 S3->S0 S0->S5 DC mode
EC V011T05 Plug in
SOC ACIN
+3VLP
0ms +3VLP
ACIN
201.8us EC_ON
EC_ON
D -> 2.016ms +5VALW D
+5VALW
-> 59.97ms -> 8.648s +3V_EN
3V_EN
-> 60.68s -> 772.8us +3VALW
+3VALW
-> 61.47ms -> 19.82us SPOK
SPOK
32.33us
-> <- -> 8.667s
EC_EN_1.05VALW EC_EN_1.05VALW
-> 610.9us -> 1.040ms
+1.05VALW(VNN) +1.05VALW(VNN)
-> 1.408ms -> 974.5us
+1.24VALW +1.24VALW
-> 2.679ms -> 1.192ms
+1.8VALW +1.8VALW
-> 3.264ms -> 709.7us
+3V_SOC +3V_SOC
192.2ms
ON/OFF
ON/OFF
C -> 25.3ms
->
-> -> 5.34ms EC_RSMRST# C
EC_RSMRST# 110.4ms
-> 2.727ms -> 5.34ms PBTN_OUT#
PBTN_OUT#
-> 22.9ms EC_SLP_S4#
EC_SLP_S4#
-> 22.9ms EC_SLP_S3#
EC_SLP_S3#_1P8
-> 241.3ms -> 152.9ms SYSON
SYSON
-> 531.5us -> 2.88ms +1.35V
+1.35V
-> 3.939ms -> 0s DDR_PWROK
DDR_PWROK
-> 272ms -> 10.77ms -> 23.44ms -> 6.852ms VR_ON
VR_ON
-> 1.56ms -> 30.56ms -> 1.55ms -> 24.35ms +SOC_VGG
+SOC_VGG
-> 3.27ms -> 38.77ms -> 3.25ms -> 24.91ms +SOC_VCC0/2
+SOC_VCC0/1
-> 3.448ms -> 0s -> 3.40ms -> 0s VGATE
VGATE
-> 261.9ms -> 30.80ms -> 13.32ms -> 26.72ms SUSP#
SUSP#
B -> 1.180ms -> 1.062ms -> 1.165ms -> 1.028ms +1.15VALW B
+1.15VALW
-> 414.3us -> 1.768ms -> 385.7us -> 1.685ms +1.8VS
+1.8VS
0.2 modify
-> 379.7us -> 654.9us -> 357.6us -> 611us +3VS
+3VS
-> 561.9us -> 845.9us -> 584.8us -> 837.9us +5VS
+5VS
-> 6.619us -> 1.305ms -> 5.090us -> 1.309ms +0.675VS
+0.675VS
-> 292.26ms KBRST#
KBRST#
-> 382.9ms -> 10.77ms -> 136.7ms -> 6.850ms PMC_CORE_PWROK
PMC_CORE_PWROK
0.2 modify <- -> DDR_CORE_PWROK
DDR_CORE_PWROK
120.9ms
-> 397.8ms -> 31.88ms -> 134.7ms -> 25.71ms PMC_PLTRST#
PMC_PLTRST#
DGPU_PWR_EN
DGPU_PWR_EN
VGA +3VSDGPU
VGA_CORE
+3VSDGPU
VGA_CORE
VGA_PWROK
A
VGA not ready VGA_PWROK A
+1.05VSDGPU
+1.05VSDGPU
+1.5VSDGPU
+1.5VSDGPU
PLTRST_VGA#
PLTRST_VGA#
Power Sequence
5 4 3 2 1

Acer Aspire E5-432 E5-432G Intel Braswell-MD + N16X Robin - BA - MB - LA-C371P R10-1

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Acer Aspire E5-432 E5-432G Intel Braswell-MD + N16X Robin - BA - MB - LA-C371P R10-1

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A B C D E

Model Name : A4WAL

A4WAL M/B Schematics Document

Conn P.33 Conn P.33

page 05~12 HD Audio HDA Codec

3 SATA ODD Conn. 3

SPI ROM Speaker Int. MIC UAJ

RTC CKT. SATA HDD Conn.

Voltage Rails Board ID / SKU ID Table for AD channel

+1.15VALW +1.15v Always power rail ON ON ON

EC SMBUS Routing Table

Security Classification Compal Secret Data Compal Electronics, Inc.

VR_ON NCP81201MNTXG 7000mA

(PU601) +1.05VALWP +1.05VSDGPU

SUSP# SY8003DFC 700mA PJ701

+1.05VALW_PWRGD G971ADJF11U 550mA PJ802 0 ohm

Security Classification Compal Secret Data Compal Electronics, Inc.

DDR_A_D[0..63] <13> DDR_B_D[0..63] <14>

DDR_A_DQS[0..7] <13> DDR_B_DQS[0..7] <14>

DDR_A_DQS#[0..7] <13> DDR_B_DQS#[0..7] <14>

ESD request 0211

+1.35V_SOC +DDRA_SOC_VREFDQ +1.35V_SOC +DDRB_SOC_VREFDQ

MCSI and Camera interface

VGA_SELECT3 DR@ SGT@

R1033 BSW-MCP-EDS_FCBGA1170 R1008 R1037

Security Classification Compal Secret Data Compal Electronics, Inc.

Follow DVR1044_ACER_HSIO Mapping Design Guide_V1p0

VGA@ CC17 1 2 .1U_0402_16V7K PEG_HTX_GRX_P0 C24 C31

Reserve for EMI(Near SPI ROM)

Spec & CRB is reserve. VC pop (v0.1)

SOC_GPIO_SUS2 @ V1.0 modify SB000016K00 SB000013K00

SOC_GPIO_SUS5 1 2 +3VALW SOC_I2C5_DATA 1 6 SOC_I2C5_DATA_L 6 1 I2C5_SDA_TP

@ D 0_0402_5% 2.2K_0402_5%2 1R2564 SOC_I2C5_CLK_L PJT138KA 2N SOT363-6 DMN63D8LDW-7_SOT363-6

SOC_GPIO_SUS2: Top Swap( A16 Override ) 2.2K_0402_5%2 1R2562 PCU_SMB_CLK_L

U2515 M32 R1012 45.3_0402_1% EMC@

SA00004BV00 RSVD9 1.8V Y6 GPU_EVENT#

Y8 1 2 20K_0402_1% AF50 AJ32 VSS0_SENSE R1074 1 @ 2 0_0402_5%

RSVD1 CORE_VSS1_SENSE VSS_SENSE <47>

C1009 C1010 AF45 AD24 VGG_SENSEP DBG_UART_TXD R1189 1 2 1K_0402_5%

C1011 C1012 U55 VGG_SENSEN R1020 1 2 100_0402_1%

0_0402_5% R1089 R2583 1 @ 2 0_0402_5%

@ Close to RAM door R983 2 1 2.2K_0402_5% +1.8VALW

0_0603_5% PMC_ACIN 2 1 2014/03/19 2015/03/18 Title

+SOC_VCC 3.5A (can merge with V1P05A) +1.05VALW

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data Compal Electronics, Inc.

C CHV_MCP_EDS CHV_MCP_EDS CHV_MCP_EDS C

Security Classification Compal Secret Data Compal Electronics, Inc.

+DDR_A_VREF_DQ +1.35V CONN@ +1.35V

LCN_DAN06-K4406-0100_204P Place near JDIMM1.203,204

+DDR_B_VREF_DQ +1.35V +1.35V

185 186 DDR_B_DQS#7

195 DQ59 DQ63 196

2 @ 1 PEX_TSTCLK_OUT- AE22 PEX_TSTCLK_OUT C11 XTALIN

SM010019400 3000ma 33ohm@100mhz DCR 0.05

BAV70W_SOT323-3 GC6@ VGA@ GND GND

SM01000AG00 2A 300ohm@100mhz DCR 0.1

VGA@ L2001 HCB1608KF-301T20_2P

MC74VHC1G08DFT2G_SC70-5 +3VSDGPU_AON R2019 R2017 +3VSDGPU_AON VGA@ 2

0_0402_5% 10K_0402_5% SP_PLLVDD+VID_PLLVDD Near GPU

Security Classification Compal Secret Data Compal Electronics, Inc.

1 PLTRST_VGA# MC74VHC1G08DFT2G_SC70-5 R2018

10K_0402_5% 2014/08/28 2016/08/28 Title