DSD lab Manuals LAB13

DESIGN AND TESTING ONBOARD SWITCHES AND LED’S IN FPGA.

OBJECTIVES

To simulate and test onboard switches and LED’s using Verilog code and to
implementthe same in FPGA.

INTRODUCTION

XC3S200 is an array of Configurable Logic Blocks (CLB’s) and is embedded within a

set of horizontal and vertical channels that contain Routing that can be personalized
to interconnect CLB’s. The configuration of interconnect is achieved by turning ON
‘n’ channel pass transistors. The state that determines a given interconnect pattern
is held in the Static RAM cells distributed across the chip close to the controlled
elements. The CLB’s and routing channels are surrounded by a set of
programmable Inputs / Outputs.

Verilog Code:

module buffer(a, y);

input [7:0] a;
output [7:0] y;
reg [7:0]y;
always@(a)
begin
y=a;
end
endmodule

UCF file(User constraint file):

NET "a[0]" LOC = "p83" ;

NET "a[1]" LOC = "p80" ;
NET "a[2]" LOC = "p82" ;
NET "a[3]" LOC = "p78" ;
NET "a[4]" LOC = "p79" ;
NET "a[5]" LOC = "p77" ;
NET "a[6]" LOC = "p76" ;

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NET "a[7]" LOC = "p74" ;
NET "y[0]" LOC = "p96" ;
NET "y[1]" LOC = "p92" ;
NET "y[2]" LOC = "p90" ;
NET "y[3]" LOC = "p89" ;
NET "y[4]" LOC = "p87" ;
NET "y[5]" LOC = "p86" ;
NET "y[6]" LOC = "p85" ;
NET "y[7]" LOC = "p84" ;

PROCEDURE:

Software part:

11. Click on the Xilinx ISE9.1i or Xilinx Project navigator icon on the desktop of PC.
12. Write the Verilog code, check syntax, view RTL schematic and note the device
utilization summary by double clicking on the synthesis in the process window.
13. Open a new UCF file and lock the pins of the design with FPGA I/O pins.
14. Implement the design by double clicking on the implementation tool selection.
15. Create programming file (i.e., bit file) for downloading into the device.

Hardware part:

- Connect the power supply cable to the FPGA kit using power supply adapter.
- Connect the FPGA kit to the parallel port of the PC through the cable
provided along with the kit.
- Run the program on the fpga board.

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RTL Schematic:

RESULT:

Thus the onboard switches and LEDs were designed using Verilog HDL and it was
simulated and tested in the FPGA device

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Observations/Comments/Explanation of Results