Power System Analysis

EE432

Chapter: 6
Power system representation and solution

IGEE, Dept. of Power & Control

Spring Semester
Dr. Kheldoun A.
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Ch6: Power system representation and
solution

Review:

Single line diagram

Per-unit representation

Advantages of per-unit system

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 Ch6: Power system representation and
solution
Part 2 investigates power systems solution in which the following
points are discussed

1. Node Elimination

2. Source equivalence

3. Nodal analysis

4. The bus admittance and the impedance matrix

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 Ch6: Power system representation and
solution
1. Introdution

• Once the per-phase, per-unit equivalent circuit of a

power system is created, it can be used to find the voltages,
currents, and powers present at various points in a power
system.
• Two techniques are used for this purpose:
1) loop analysis
2) Nodal analysis
The most common technique used is nodal analysis.
• In nodal analysis, we use KCL equations to determine
the voltages at bus (node) and then calculate the currents
and power flows at various points in the system. 4
 Ch6: Power system representation and
solution
2. Node elimination by star-mesh transformation

In cases where the voltage at a particular node is

unimportant, the node can be eliminated to reduce the
number of equations required for solution.
If only three elements are terminate at this node and none is
a source, the node is eliminated by a Y- transformation

a Y- transformation a
Za
Zca Zab
Zc Zb
c b c Zbc b
- Y transformation 5
 Ch6: Power system representation and
solution
2. Node elimination by star-mesh transformation
Z a .Z b Z b .Z c Z c .Z a
Z ab
Zc
Y- transformation Z a . Z b Z b . Z c Z c .Z a
Z bc
Za
Z a .Z b Z b .Z c Z c .Z a
Z ca
Zb

Z ab .Z ca
Za
Z ab Z bc Z ca
- Y transformation Z ab .Z bc
Zb
Z ab Z bc Z ca
Z ca .Z bc
Zc
Z ab Z bc Z ca 6
 Ch6: Power system representation and
solution
d
2. Node elimination: example 1 A a b
B
If the internal emfs are the following:
EA=1.5 0°, generator
EB=1.5 15°, generator c

EC=1.5 -36.9°, Syn. Motor

One-line diagram &
C
Find the pu power outputs from stations A, B Its reactance diagram
and pu power input to station C?
j0.3 j0.3
a d b
j0.1 j0.05
First we simplify the network by j0.1
Eliminating unimportant nodes c
j0.3 j0.1 j0.3
j1.0 j0.9
j0.9
EA EC EB
 Ch6: Power system representation and
solution
d
2. Node elimination: example 1 A a b
B

Equivalent reactance diagram c

j0.3 j0.3 One-line diagram
a d b
j0.1 j0.05
C
j0.1

j0.3
c a ?
j0.1 j0.3 b
j1.0 j0.9 j0.1 j0.05
? ?
j0.9
EA EC EB c
j0.3 j0.3
j0.1
j1.0 j0.9
j0.9
EA EC EB
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 Ch6: Power system representation and
solution
2. Node elimination: example 1
a j1.5 b
j0.1 j0.05
j0.5 j0.5

c j0.3
j0.3
j0.1
j 0 .3 . j 0 .1 j 0 .1 . j 3 j 0 .3 . j 3 j1.0 j0.9
Z ab j0.9
j 0 .1
EA EC EB

0 .15
Z ab j1 .5
j 0 .1 Parallel reactances
j 0 .3 . j 0 .1 j 0 .1 . j 3 j 0 .3 . j 3 0 .15
Z bc j 0 .5 Series reactances
j 0 .3 j 0 .3

j 0 .3 . j 0 .1 j 0 .1 . j 3 j 0 .3 . j 3 0 .15
Z ca j 0 .5
j 0 .3 j 0 .3 9
 Ch6: Power system representation and
solution
2. Node elimination: example 1 a j1.5
b
j0.5 j0.5

j0.3 c j0.3
j 0 .5 . j 0 .3
Z a 'c ' j 0 .1875 j1.1 j0.95
j 0 .8 j1.0
EA EC EB

a’ j1.5 b’

j0.1875 j0.1875
j1.1 c’ j0.95
j1.0 j 0 .5 . j 0 .3
Z b 'c ' j 0 .1875
EA EB j 0 .8
EC
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 Ch6: Power system representation and
solution
a’ j1.5 b’
2. Node elimination: example 1

Z a 'b ' .Z c ' a ' j0.1875 j0.1875

Z a' j1.1 c’ j0.95
Z a 'b ' Z b ' c ' Z c ' a ' j1.0

j1 .5 . j 0 .1875 EA EC EB
Z a'
j1 .5 j 0 .1875 j 0 .1875
Z a' j 0 .15
a’ j0.15 j0.15 b’
Z a 'b ' .Z b ' c '
Z b' j 0 .15
Z a 'b ' Z b ' c ' Z c ' a ' j0.02

j1.1 c’ j0.95
j 0 .1875 . j 0 .1875 j1.0
Z c'
j1 .5 j 0 .1875 j 0 .1875 E EB
A EC
Z c' j 0 .02
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 Ch6: Power system representation and
solution
2. Node elimination: example 1
a j3.7 b

j1.25 j1.1 j3.43 j3.02

a j1.02 b c
c
EA EB EA EC EB
EC

j1 .25 . j1 .02 j1 .1 . j1 .02 j1 .1 . j1 .25

Z ab j 3 .70
j1 .02
j1 .25 . j1 .02 j1 .1 . j1 .02 j1 .1 . j1 .25
Z bc j 3 .02
j1 .25
j1 .25 . j1 .02 j1 .1 . j1 .02 j1 .1 . j1 .25
Z ca j 3 .34
j1 .1
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 Ch6: Power system representation and
solution
2. Node elimination: example 1
Ia a j3.7 Ic Ib
b
The currents in the Delta network are
j3.43 j3.02
c
EA EC EB

E A EB 1 .5(1 0 1 15 )
I ab - 0.1049 - 0.0138j
Z ab j 3 .7
E B EC 1 .5 (1 15 1 36 .9 )
I bc 0.4268 - 0.0826j
Z bc j 3 .02
EC E A 1 .5( 1 0 1 36 .9 )
I ca - 0.2633 + 0.0879j
Z ca j 3 .42

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 Ch6: Power system representation and
solution
2. Node elimination: example 1
Ia a j3.7 Ib
b
The currents in the Delta network are
EA=1.5 0°, generator j3.43 j3.02
EB=1.5 15°, generator c Ic
EA EC EB
EC=1.5 -36.9°, Syn. Motor

Ia I ab I ca 0.1882 - 32.6924 Pa 1 .5 .0 .1882 cos( 32 .6924 ) 0.2376

Ib I bc I ab 0.5361 - 7.3682 Pb 1 .5 .0 .536 cos( 15 7 .37 ) 0.7436

Ic I bc I ca 0.7108 - 13.8719 Pc 1 .5 .0 .7108 cos( 36 .9 13 .87 ) 0.9812

Active power generated by Stations A and B is 0.2376 + 0.7437 =0.9813 pu

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Which is the active power drawn by Motor C
 Ch6: Power system representation and
solution
3. Loop analysis j0.3 j0.3
d
The disadvantage of network a b
I1 j0.1 I2
reduction is time consuming task
and cannot be automated using c
j0.3 j0.3
computers.
j1.1 j0.95
I4 j1.0 I3
Loop analysis consists in applying EA EC EB
the general expression of the
algebraic sum of the emfs
around loop k of a the network
having N independent loops.
N
Ek z kn .I n
n 1

The most common technique used to solve such circuits is nodal analysis.
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However this method requires to convert voltage sources to current sources
 Ch6: Power system representation and
solution
4. Equivalence of sources
IL IS IL

ZS VL ZL IS VL ZL
ZP

EA

Voltage source is converted into equivalent current source by using the

Norton’s theorem.
ZP ZS
Voc EA
Is
Z th ZS 16
 Ch6: Power system representation and
solution
5. Node analysis

The objective of nodal analysis is to determine the matrix equation that

relates the nodal voltages to the currents flowing into and out of a
network using the admittance values of circuit branches.

I inj Ybus .V node

Nodes represent substation or bus bars

Branches represent transmission lines and transformers

Injected currents are the flows from generators and loads

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 Ch6: Power system representation and
solution
5. Node analysis

To apply nodal analysis, the following must be completed

The first step: voltage sources are converted to their equivalent current
sources

The second step: all impedances are converted to admittances.

1 1
y ij Vk
z ij rij jx ij Ik
.. Network
Finally, form the nodal solution based upon
KCL

Ik y k 0 .V k y k 1 .(V k V1 ) y k 2 .(V k V 2 ) ... y kn .(V k Vn ) 18

 Ch6: Power system representation and
solution
5. Node analysis : example 2

j0.3 2 j0.3
2 1
j0.1 3 j0.05
1 3 j0.1
A B
j0.3 4 j0.1 j0.3
j1.0 j0.9
4 j0.9
EA EC EB

The one line diagram The reactance diagram

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 Ch6: Power system representation and
solution
5. Node analysis
The reactance diagram The admittance diagram
-j3.33 -j3.33
j0.3 j0.3 1 2
1 2 3
3 -j10
j0.1
-j3.33 4 -j3.33
j0.3 4 j0.3
j1.1 -j0.91 -j1.05
j0.95 I1 -j1.0
j1.0 I4 I3
EA EC EB

1 1 1 1
y 10 j 0 . 91 y 12 j 3 . 33
zA j1 . 1 z 12 j 0 .3
1 1
y 40 j1 . 0 y 14 y 24 y 34 y 12
zC j1 . 0
1 1 1 1
y 30 j1 . 05 y 24 j10 20
zB j 0 . 95 z 24 j 0 .1
 Ch6: Power system representation and
solution
5. Node analysis
The reactance diagram The admittance diagram
-j3.33 -j3.33
j0.3 j0.3 1 2 3
1 2 3
-j10
j0.1
4 -j3.33 4 -j3.33
j0.3 j0.3
j1.1 -j0.91 -j1.05
j0.95 I1 -j1.0
j1.0 I4 I3
EA EC EB

EA 1 .5 0 EB 1 .5 15
I1 j1 .36 I3 0 .41 j1 .52
Z1 j1 .1 Z3 j 0 .95
E2 EC 1 .5 36 .9
I2 0 I4 0 .9 j1 .2
Z2 Z4 j1 .0 21
 Ch6: Power system representation and
solution
5. Node analysis The admittance diagram
-j3.33 -j3.33
1 2 3
Node 0 (which is the ground) is taken as -j10
reference
-j3.33 4 -j3.33
Now, applying KCL to the independent nodes 1
-j0.91 -j1.05
through 4 results in: I1 -j1.0
I4 I3

I1 y10 .V1 y12 .(V1 V 2 ) y14 .(V1 V 4 ) 0

I2 y 21 .(V 2 V1 ) y 23 .(V 2 V3 ) y 24 .(V 2 V4 )

I3 y 30 .V3 y 32 .(V3 V2 ) y 34 .(V3 V 4 )

I4 y 40 .V 4 y 41 .(V 4 V1 ) y 42 .(V 4 V 2 ) y 43 .(V 4 V3 )

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 Ch6: Power system representation and
solution
5. Node analysis
I1 y10 .V1 y12 .(V1 V 2 ) y14 .(V1 V 4 )
I2 y 21 .(V 2 V1 ) y 23 .(V 2 V3 ) y 24 .(V 2 V4 )
I3 y 30 .V3 y 32 .(V3 V 2 ) y 34 .(V3 V 4 )
I4 y 40 .V 4 y 41 .(V 4 V1 ) y 42 .(V 4 V 2 ) y 43 .(V 4 V3 )
Rearranging these equations yields
I1 ( y10 y13 y14 )V1 y12V2 y14V 4
I2 y 21 .V1 ( y 21 y 23 y 24 )V 2 y 23V3 y 24V 4
I3 y 32 .V 2 ( y 30 y 32 y 34 )V3 y 34V 4
I4 y 41V1 y 42V 2 y 43V3 ( y 40 y 41 y 42 y 43 )V 4
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 Ch6: Power system representation and
solution
5. Node analysis
Let’s introduce the following admittances
Y11 y10 y12 y14 , Y12 Y21 y12 , Y14 Y41 y14
Y22 y 21 y 23 y 24 , Y23 Y32 y 23 , Y24 Y42 y 24 ,
Y33 y 30 y 32 y 34 , Y34 Y43 y 34 ,
Y44 y 40 y 41 y 42 y 43 ,
The previous node equation reduces to
I1 Y11V1 Y12V 2 Y13V3 Y14V 4
I2 Y21V 2 Y22V 2 Y23V3 Y24V4 In the above network, there is no
connection between bus 1 and 3,
I3 Y31V1 Y32V 2 Y33V3 Y34V 4 Y13=Y31=0
I4 Y41V1 Y42V 2 Y43V3 Y44V 4 24
 Ch6: Power system representation and
solution
5. Node analysis
Extending the above relation to an n bus system, the node-voltage equation in
matrix form is

I1 Y11 Y12 .. Y1 j .. Y1n V1

I2 Y21 Y22 .. Y2 j .. Y2 n V2
: : : : : : : :
.
Ik Yk 1 Yk 2 .. Ykj .. Ykn V k
: : : : : : : :
In Yn 1 Yn 2 .. Ynj : Ynn V n
Or
I bus Ybus .Vbus
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 Ch6: Power system representation and
solution
5. Node analysis
I inj Ybus .V node
Where Iinj is the vector of injected bus currents (external current sources). Vbus
is the vector of bus voltages measured from the reference (node voltages). Ybus
is known as the bus admittance matrix.
The diagonal element of each node is the sum of admittances connected to it
(known as self-admittance or driving point admittance), i.e.,
n
Yii y ij
i 0
The off-diagonal element is equal to the negative of the admittance between
nodes (known as mutual admittance or transfer admittance),i.e.,

Yij Y ji y ij
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 Ch6: Power system representation and
solution
5. Node analysis
n
Yii y ij
I inj Ybus .V node i 0

Yij Y ji y ij
When the bus currents are known, the previous equation can be solved for n
bus voltages.

V node Ybus1 .I inj

The inverse of the bus admittance matrix is known as the bus impedance
matrix, Zbus.

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 Ch6: Power system representation and
solution
5. Node analysis The admittance diagram
-j3.33 -j3.33
1 2
3
-j10
Based on the previous analysis,
the bus admittance matrix for the -j3.33 4 -j3.33
network of example 2 -j0.91 -j1.05
I1 -j1.0
I4 I3

j7.57 j3.33 0 j3.33 j1 .36

j3.33 j16.66 j3.33 j10 0
Ybus I
0 j3.33 j7.71 j3.33 0 .41 j1 .52
j3.33 j10 j3.33 j17.66 0 .9 j1 .2
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 Ch6: Power system representation and
solution
5. Node analysis

j7.57 j3.33 0 j3.33 j1 .36

j3.33 j16.66 j3.33 j10 0
Ybus I
0 j3.33 j7.71 j3.33 0 .41 j1 .52
j3.33 j10 j3.33 j17.66 0 .9 j1 .2

V node Ybus1 .I inj

0 + 0.4199i 0 + 0.3332i 0 + 0.2826i 0 + 0.3211i
1 0 + 0.3332i 0 + 0.4041i 0 + 0.3271i 0 + 0.3533i
Y
bus 0 + 0.2826i 0 + 0.3271i 0 + 0.4072i 0 + 0.3153i
0 + 0.3211i 0 + 0.3533i 0 + 0.3153i 0 + 0.3767i
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 Ch6: Power system representation and
solution
5. Node analysis
j1.36
0 + 0.4199i 0 + 0.3332i 0 + 0.2826i 0 + 0.3211i
0 + 0.3332i 0 + 0.4041i 0 + 0.3271i 0 + 0.3533i 0
V node 0 + 0.2826i 0 + 0.3271i 0 + 0.4072i 0 + 0.3153i
0.41 j1.52
0 + 0.3211i 0 + 0.3533i 0 + 0.3153i 0 + 0.3767i
0.9 j1.2
1.3860 - 0.1732i
1.3743 - 0.1839i
V node 1.3816 - 0.1168i
1.3680 - 0.2098i
PA
0.2355 + 1.8850i
0
S V .I * 0.7440 + 2.0521i PB
-0.9795 + 1.8304i

PC <0 (as it is motor) =PA+PB

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 1 2

T2 G2
G1 T1

2
Load

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