Lab Report: Digital Logic Design EEE241

Lab Report: Digital Logic Design EEE241
Name: Muhammad Souban Javaid

Roll no: FA20-BEE-146
Section: 2C
Instructor’s name: Sir Tahir Khan
Dated: 09-03-2021
LAB No. 02: Boolean Function Implementation using Universal Gates
Objectives:
• This lab is devised to simulate and implement any logic function by using universals
gates (NAND/NOR).
• To build the understanding of how to construct any combinational logic function using
NAND or NOR gates only.
Pre-Lab:
Background concept:
Digital circuits are more often constructed with universal gates. The NAND and NOR gates are
called universal gates. Any Boolean logic function can only be implemented using NAND or
NOR gates. NAND and NOR gates are easier to manufacture with electronic components than
basic gates. Due to the prominence of universal gates in the design of digital circuits, rules and
procedures for converting from the Boolean function to the AND, OR and NOT equivalent
NAND and NOR logic diagrams have been developed.
Read the universal gates and understand them. List the truth tables of the gates AND, OR, NOT,
NAND, NOR and XOR. Identify NAND and NOR ICs and their specification for the families of
CMOS and TTL.
Apparatus required:
• KL-31001 Digital Logic Lab
• Logic gates ICs
• Proteus 8 Professional (Circuit simulation software)
In Lab:
There are two parts to this lab. In the first part, simulation and implementation of any logical
expression is done using only NAND gates. In the second part, the same procedure is performed
by using the NOR gates only.
Part 1 - Implementing any logic expression by using only NAND gates

If we can show that the logical operations AND, OR, and NOT can be implemented with NAND
gates, then it can be implied that any Boolean function can be implemented with NAND gates.
Procedure:
• First of all, simulate the NOT, AND, OR, XOR and XNOR gates in Proteus software,
using only the NAND gates. Verify the truth of their tables.
• Now, mount the given ICs on the trainer’s breadboard.
• Use one or more of the NAND gates of the IC for this experiment.
• One or more Trainer Logic Switches (S1 to S9) can be used for input to the NAND gate.
• For indication of the output, connect the output pin of the circuit to any of the LEDs of
the trainer (L0 to L15).
In-Lab Tasks-Part-1
In-Lab Task 1.1: Verification of NOT function

• Connect the circuit as shown in Figure 2.1 given below.
• Make connection between +5V to pin 14 (Vcc) and Ground to pin 7 (GND) of the IC.
• By setting the switches to 1 and 0, check that the output (F) of the circuit conforms to the
output of the NOT gate. Please record your observations in Table 2.1 below.
Figure 2.1: NOT gate using NAND gate

Observation Table for NOT gate
In-Lab Task 1.2: Verification of AND function (F=AB)

• Connect the circuit as shown in Figure 2.2.
• By setting the switches to 1 and 0, check that the output (F) of the circuit conforms to the output
of the AND gate. Record your observations in Table 2.2 below.
Figure 2.2: AND gate using NAND gates
Observation table for AND gate using NAND
In-Lab Task 1.3: Verification of OR function (F=A+B)

• By setting the switches to 1 and 0, check that the output (F) of the circuits proves the
truth table of the OR gate. Record your observations in the table below.
Figure 2.3: OR gate using NAND gates
Observation table for OR gate using NAND
In-Lab Task 1.4: Verification of XOR function (F=A’B+AB’)

• By setting the switches to 1 and 0, check that the output (F) of the circuit confirms the
output of the XOR gate. Record your comments in the table below.
Figure 2.4: XOR gate using NAND gates

Observation Table for XOR gate using NAND
In-Lab Task 1.5: Verification of XNOR function

output of the XNOR gate. Please record your observations in Table 2.5 below.
Figure 2.5: XNOR gate using NAND gates
Observation Table for XNOR gate using NAND

In-Lab Task 1.6: Implementation of any Boolean function (2variables) using
only NAND gates: (𝐹 (𝐴, 𝐵) = AB+A’B+AB’)
• Connect the circuit correspondingly to the given Boolean function.
• By setting the switches to 1 and 0, check that the output (F) of the circuit confirms that of
the following function. Record your observations in the table below.
Observation table for the given Boolean function
Part 2 - Implementing any logic expression by using only NOR gates

If we can show that logical AND, OR, and NOT operations can be implemented with NOR
gates, then it can be implied that any Boolean function can be implemented with NOR gates.
Procedure:
• Simulate NOT, AND and OR gates in Proteus software, using only NOR gates. Verify
their truth tables.
• Now, mount the ICs on the trainer’s breadboard.
• Use one or more of the NOR gates of the IC for this experiment.
• For output indication, connect the output pin of the circuit to any one of the LEDs of the
trainer (L0 to L15).
In-Lab Tasks-Part-2
In-Lab Task 2.1: Verification of NOT function
output of the NOT gate. the Record your observations in Table below.
Figure 2.6: NOT gate using NOR gate
Observation Table for NOT gate using NOR
In-Lab Task 2.2: Verification of AND function

• Connect the circuit as shown in Figure 2.7
• By setting the switches to 1 and 0, verify that the output (F) of the circuit conforms to
that of an AND gate. Record your observations in the Table below.
Figure 2.7: AND gate using NOR gates

Observation Table for AND gate using NOR
In-Lab Task 2.3: Verification of OR function

• By setting the switches to 1 and 0, verify that the output (F) of the circuit conforms to
that of an OR gate. Record your observations in the Table below.
Figure 2.8: OR gate using NOR gates
Observation Table for OR gate using NOR

Post-Lab:
Task 01: Simulate NAND, XOR and XNOR gates in Proteus software, by using only NOR
gates. Verify their truth tables.
Critical Analysis/Conclusion:
• We have learned how to simulate and execute any logic function using universal gates
(NAND/NOR) practically.
• We have learned that Boolean Algebra expressions can be used to construct digital logic
truth tables for their respective functions.
• This lab has helped us cognize Boolean Algebra and how we can construct complex
logical functions using logic gates mounted on a breadboard.

Lab Report: Digital Logic Design EEE241

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Lab Report: Digital Logic Design EEE241

Name: Muhammad Souban Javaid

Part 1 - Implementing any logic expression by using only NAND gates

In-Lab Task 1.1: Verification of NOT function

Figure 2.1: NOT gate using NAND gate

In-Lab Task 1.2: Verification of AND function (F=AB)

Figure 2.2: AND gate using NAND gates

Observation table for AND gate using NAND

In-Lab Task 1.3: Verification of OR function (F=A+B)

Observation table for OR gate using NAND

In-Lab Task 1.4: Verification of XOR function (F=A’B+AB’)

Figure 2.4: XOR gate using NAND gates

In-Lab Task 1.5: Verification of XNOR function

Figure 2.5: XNOR gate using NAND gates

Observation Table for XNOR gate using NAND

Observation table for the given Boolean function

Part 2 - Implementing any logic expression by using only NOR gates

Figure 2.6: NOT gate using NOR gate

Observation Table for NOT gate using NOR

In-Lab Task 2.2: Verification of AND function

Figure 2.7: AND gate using NOR gates

In-Lab Task 2.3: Verification of OR function

Figure 2.8: OR gate using NOR gates

Observation Table for OR gate using NOR

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