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DR. B. C.

ROY ENGINEERING COLLEGE, DURGAPUR

DEPARTMENT OF COMPUTER SCIENCE & ENGINEERING / INFORMATION TECHNOLOGY

ANALOG & DIGITAL ELECTRONICS LABORATORY (ESC-391)

Experiment No. 4(A)

Realization of basic logic functions using Universal Logic Gates

Procedure :

1. Connect +5V to pin no. 14 & 0V to pin no. 07 for ICs 7402
2. Make the circuits for the realizations of NOT, OR, AND, NAND, XOR, XNOR using IC 7402
(NOR gate) as shown in the given circuit diagrams
3. Connect the inputs to the logic switches & outputs to the LEDs
4. Vary the inputs and observe the corresponding outputs
5. Verify the Truth Tables .
6. Repeat the above procedure for the IC -7400(NAND gate)
Report :

1. Objective
2. Apparatus & Components
3. Circuit Diagram
4. Truth Table
5. Pin Configuration of both the Universal Gate ICs
6. (a)Write down the required expressions to implement different 2 i/p logic gate using Universal
logic gates. (b). Realize the function f = ( A’ +B’)( C+D) using minimum nos. of 2 i/p NAND
gates.
Realization of all gates using 2 i/p NOR gate
Component Development System(CDS)

IC 7402

IC 7402 - Quad 2 i/p NOR (PIN DIAGRAM)


Bread Board

Trainer Kit Power Supply Section


Output LED Section

Power Supply Connection as well as Ground Connection


Pin No.14 Connect to +5V that means VCC(Power Supply)
Pin No.7 Connect to GND(Ground)
NOT Gate Realization Using NOR :

Input Connection(Step.1)
Input Connection(Step.2)

Output Connection(Step.3)
Logic Gate Symbols :
Logic Gates representation using the Truth Table :
NOT Gate Realization Truth Table

Truth Table Verification(Step.1)

Input 0, Output 1

Truth Table Verification(Step.2)

Input 1,Output 0

OR Gate Realization Using NOR


OR Gate (Circuit Connection)

Truth Table
Truth Table (Input 0,0) Truth Table (Input Cobination For 0,0 Output 0)

Truth Table (Input 0,1) Truth Table (Input Combination 0,1 Output 1)

Truth Table (Input 1,0) Truth Table (Input Combination For 1,0 Output 1)
Truth Table (Input 1,1) Truth Table (Input Combination For 1,1 Output 1)

AND Gate Realization Using NOR Truth Table


Input Combination For 0,0 Output 0 Input Combination For 0,1 Output 0)

Input Combination For 1,0 Output 0 Input Combination For 1,1 Output 1

NAND Gate Realization Using NOR Truth Table


Input Combination For 0,0 Output 1 Input Combination For 0,1 Output 1

Input Combination For 1,0 Output 1 Input Combination For 1,1 Output 0

X-OR Gate Realization Using NOR Truth Table


Input Combination For 0,0 Output 0 Input Combination For 0,1 Output 1

Input Combination For 1,0 Output 1 Input Combination For 1,1 Output 0

X-NOR Gate Realization Using NOR Truth Table


Input Combination For 0,0 Output 1 Input Combination For 0,1 Output 0

Input Combination For 1,0 Output 0 Input Combination For 1,1 Output 1

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