A Study On Transformerless On-Line UPS

( )
( )
2009
A Study on Transformerless On-line UPS
with High Performance
ABSTRACT
This thesis proposes hardware circuits and control algorithms of

transformerless on-line UPSs. The UPS is used for supplying very critical loads
such as computers, some medical equipment, communication system, factory,
and the like, as hedge against a substantial financial loss resulting from system
interruptions.
Three proposed UPSs are single- to single-phase UPS, three- to three-phase
UPS, and three- to three-phase UPS. Each UPS is composed of a rectifier, a
battery charger/discharger, and an inverter. The rectifier has the capability of
power factor collection and regulates a constant dc-link voltage. The battery
charger/discharger eliminates the need for the transformer and the increase of the
number of battery and supplies the power demanded by the load to the dc-link
capacitor in the event of the input power failure or abrupt decrease of the input
voltage. The inverter provides a regulated sinusoidal output voltage to the load
and limits the output current under an impulsive load. By utilizing the battery
charger/discharger and a transformerless type, the overall efficiency of the
system is improved and the size, weight, and cost of the system are significantly
reduced. New control algorithms of the rectifier, the charger/discharger, and the
inverter are proposed. The proposed adaptive gain control algorithms of the
rectifier and the charger/discharger improve dynamic performance at step load
change. To improve the transient response of the output voltage at outage of an
input source, mode change method of the charger/discharger is also proposed.
Additionally, a proposed current limit algorithm of the inverter can be
implemented without an additional hardware and it increases the reliability of
the UPS.
For each UPS, experimental results show the performances of the proposed
UPSs. Also, the experimental results show the systems have good transient and
good steady state performances under input and output disturbances.

Contents
1 Introduction 1
1.1 Background . 1
1.2 Organization 9
2 Transformerless Single- to Single-phase On-line UPS... 11
2.1 System description ........................................................ 14
2.2 System analysis ............................................................. 19

2.2.1 Rectifier control .................................................................... 19
2.2.2 Inverter control ..................................................................... 23
2.2.3 Battery charger/discharger control ....................................... 26
2.2.4 Dc-link voltage control . .. 31
2.3 Experimental results ............................................. 34
3 Transformerless Three- to Single-phase On-line UPS 44

3.1.1 Rectifier control .... 47
3.1.2 Adaptive gain control of the rectifier and the discharger.. 51
3.1.3 Inverter and charger/discharger control. 56
3.2 Experimental results .............................................. 60
4 Transformerless Three- to Three-phase On-line UPS 70

4.1.1 Inverter control ................................................ 75
4.1.2 Rectifier and charger/discharger control.. 81
4.2 Experimental results ............................................. 84
5 Conclusions 92
Summary (in Korean)... 94
References.. 96
List of Figure Captions
1.1 The operation of the typical off-line UPS
1.2 The operation of the typical on-line UPS
1.3 Conventional single- to single-phase on-line UPS
2.1 Configuration of the proposed transformerless on-line UPS

2.2 Operation modes of the proposed UPS
2.3 Control block diagram of the rectifier
2.4 Control block diagram of the inverter
2.5 Control algorithm of output current limiter
Operation modes and control block diagram of the battery
2.6
charger/discharger
2.7 Mode change method of the battery charger/discharger
2.8 Photographs of the prototype
2.9 Overall block diagram of the proposed UPS
2.10 Implementation algorithm of phased locked loop
2.11 Voltage and current waveforms at the loss of the input power
2.12 Input voltage and current waveforms of the proposed UPS
2.13 Compensated output voltage and current under impulsive load
2.14 Voltage and current waveforms according the load change
3.1 Proposed three-phase to single-phase on-line UPS

3.2 Control block diagram of the rectifier
3.3 Comparison of proportional gain and current reference with respect to
voltage error
3.4 Control block diagram of the inverter
3.5 Control diagram of the battery charger/discharger
3.6 Photograph of the prototype
3.7 Waveforms and current harmonics of the rectifier
3.8 Major waveforms the moment the input power is lost
3.9 Dc-link voltage response against load variations
3.10 Output voltage and current under impulsive load
4.1 Conventional three-phase on-line UPS

4.2 Overall block diagram of the proposed three-phase on-line UPS
4.3 Control scheme of the inverter
4.4 Test circuit of impulsive loading
4.5 Flowchart of the current-limiter of the inverter
4.6 Control scheme for the rectifier
4.7 Control scheme of the battery charger/discharger
4.8 Photographs of three-to three-phase on-line UPS
4.9 Major waveforms at the outage and sag of the input source
4.10 Experimental waveforms under step load change
4.11 Output voltage and current under impulsive load for vun
List of Tables
2.1 PARAMETERS OF DSPIC30F3011 PROCESSOR
2.2 SYSTEM PARAMETERS OF THE PROTOTYPE
3.1 PARAMETERS OF DSPIC30F6015 PROCESSOR
Chapter 1
Introduction
1.1 Background
An uninterrupted power supply (UPS), also known as a battery back-up,

provides emergency power and, depending on the topology, provides line
regulation as well to connected equipment by supplying power from a separate
source when utility power is not available. A UPS can be used to provide
uninterrupted power to equipment, typically for 5-15 minutes until a generator
can be turned on or utility power is restored.
Ideally, the voltage supplied by the utility system should be a perfect sine
wave without any harmonics at its nominal frequency of 60Hz and at its nominal
amplitude. For a three-phase system, the voltage should form a balanced set,
with each phase displacement by 120û with respect to the others. In practice,
however, the voltages can significantly depart from the ideal condition due to the
power line disturbances listed below:
1) Overvoltage: the voltage magnitude is substantially higher than its
nominal value from a sustained period of a few cycles.
2) Undervoltage (brownout): the voltage is substantially lower than its
nominal value for a few cycles.
3) Outage (blackout): the utility voltage collapsed for a few cycles or more.
4) Voltage spikes: these are superimposed on the normal 60Hz waveforms
and occur occasionally (not on a repetitive basis).
5) Chopped voltage waveform: this refers to a repetitive chopping of the
voltage waveform and the associated ringing.
6) Harmonics: a distorted voltage waveform contains harmonic voltage
components at harmonic frequencies (usually low-order multiples of the
line frequency). These harmonics exist on a sustained basis.
7) Electromagnetic interference: This refers to high-frequency noise, which
may be conducted on the power line or radiated from its source.
Sources that produce these disturbances are very diverse. Overvoltage may be
caused by sudden decreases in the system load. Undervoltage may be caused by
overload conditions, by start of induction motors, or for may other reasons.
Occasional large voltage spike may be a result of switching in or out of power
factor correction capacitors, power lines, or even such things as
pump/compressor motors in the vicinity. Chopping of the voltage waveform may
be caused by ac-to-dc line-frequency thyristor converters. The voltage
harmonics may be caused by a variety of sources. These include magnetic
saturation of power system transformers as well as the harmonic currents
injected by power electronic loads. These harmonic currents flowing through the
ac system impedances result in harmonic voltages. Electromagnetic interference
is produced by most power electronics equipment due to rapid switching of
voltages and currents.
For supplying very critical loads such as computers used for controlling
important processes, some medical equipment, and the like, it may be necessary
to use uninterrupted power supplies (UPSs). These are used to supply clean and
uninterrupted high quality power to critical loads. Generally, an UPS system
requires the regulated sinusoidal output voltage with low total-harmonic-
distortion (THD) that is independent from the changes in the input voltage or in
the load, low transient response time from on-line mode to back-up mode and
vice versa, low THD sinusoidal input current and unity power factor, high
reliability, high efficiency, low cost, low weight, and small size, etc.
In accordance with the topology or configuration, UPS can be classified as
off-line, line-interactive, and on-line UPS [1]-[29]. In an off-line UPS, the load
is powered directly by the input power and the backup power circuitry is only
invoked when the utility power fail. A line-interactive UPS maintains the
inverter in line and redirects the batterys dc current path from the normal
charging mode to supplying current when power is lost. An on-line UPS uses a
double conversion method of accepting ac input, rectifying to DC for passing
through the battery, then inverting back to ac for powering the protected
equipment.
Fig 1.1 shows the operation of the typical off-line UPS. Off-line UPS is now
the most commonly used technology for protecting PCs. In the normal mode, the
load is supplied by the power line as shown in Fig. 1.3. In the event of a power
problem (outage, voltage sags or spikes), the UPS transfers the load to the
batteries to supply stabilized power. Off-line UPS is very economical on account
of the small number of components used. However, off-line UPS is only used for
small power due to some disadvantage. One of them is transfer time. The typical
transfer time for an off-line UPS is 2-10 milliseconds. Therefore, the power
supply of the connected equipments can support longer hold time than 4
milliseconds. Another problem is in situations where there are frequent
disturbances. The principle of sequential operation (on main/on battery) behind
the off-line UPS makes it unsuitable for use in situations where there are
frequent disturbances. It is extremely likely that the UPS will keep switching to
the batteries without being able to recharge them. At the end of the battery
backup time, the UPS will shutdown and it will not be possible to start it again,
unless the disturbances cease.
The operational block diagram of the typical on-line UPS is shown in Fig. 1.2.
The on-line UPS is generally preferred due to the wide tolerance of the input
voltage variation, the precise regulation of output voltage, and high reliability of
the system [1]. As shown in Fig. 1.1, on-line UPS consist of a rectifier/charger,
an inverter, a battery bank, and so on. Fig. 1.2 shows the operation of the typical
on-line UPS. The rectifier/charger is connected to the main ac line and the
inverter is connected to the load. When the UPS operates on normal AC power,
the rectifier/charger provides the power to the inverter and acts a charger for the
battery. Under over/under voltage or power loss, the required power of the
inverter is provides from the battery. Due to the specifications limiting the
maximum harmonics that are allowed to be generated in the ac line, the recent
trend of the rectifier/charger is to incorporate a high power factor corrector to
minimize the generated line harmonics. For additional reliability, the power line
itself or the additional power source is used as a backup to the UPS, and a static
transfer switch transfers the load from the UPS to the power line as shown in
third figure of Fig. 1.2. By carrying continuous double conversion, the on-line
UPS significantly attenuates electrical disturbances, which might otherwise
damage connected equipments. This possibility is not available on off-line UPS,
which explains why on-line UPS always deliver better filtering capacity than
off-line UPS.
A conventional single-phase on-line UPS consists of a full-bridge rectifier, a
battery set, a full-bridge inverter, two transformers, and a bypass circuit, as
shown in Fig. 1.3. The rectifier converts the input voltage into the dc-link
voltage with pulse-width modulation (PWM) strategy and acts as a charger for
the battery. On the other hand, the inverter converts the dc-link voltage into the
output voltage with PWM strategy. Therefore, the regulated sinusoidal output
voltage can be achieved. The battery which is connected in parallel with the dc-
link capacitor is charged when the input voltage is in the normal condition and is
discharged when loss of the input power or abrupt decrease of the input voltage
occurs. For proper operation of the bypass circuit or ensuring the human safety,
an isolated transformer at the output side is necessary. Also, an isolated
transformer at the input side is employed to reduce the number of the battery
which is placed in parallel with the dc-link capacitor. However, since the
transformers are operated at line frequency, several drawbacks such as large size
and heavy weight exist. Recently, a three-leg-type converter has been proposed
to improve the performance of the UPS in the literature [7]-[13]. The most
outstanding feature is that the power losses can be reduced by using a common
leg for both the PWM rectifier and the PWM inverter. However, the drawbacks
caused by the transformer are still remained. An approach which is to add one
more phase leg in parallel with the dc-link capacitor is introduced in the
literature [14]-[16]. By using bidirectional dc-dc converter, the UPS can be
implemented without transformer. Hence, the UPS has the advantages such as
the improvement of the conversion efficiency, the reduction of volumetric size
and weight. However, the unbalance problem between the upper and lower dc-
link voltage can be occurred.
Line Running on normal AC power
Load
Rectifier/charger Inverter
Battery
Line Over/Under voltage, or power loss

Load
Battery
Fig. 1.1 The operation of the typical off-line UPS

Line Running on normal AC power,
small over/under voltage, or small distortion Load
Battery
Line
Over/Under voltage, or power loss Load
Battery
Line Internal malfunction or overload of inverter

Load
Battery
Fig. 1.2 The operation of the typical on-line UPS

1.2 Organization
This thesis is divided into three parts. One is a single- to single-phase on-line
UPS (chapter 2). Another is a three- to single-phase on-line UPS (chapter 3). The
third is a three- to three-phase on-line UPS (chapter 4).
In chapter 2, a high performance single-phase transformerless on-line UPS is
proposed. The proposed UPS is composed of a four-leg-type converter witch
operates as a rectifier, a battery charger/discharger, and an inverter. The rectifier
has the capability of power factor correction and regulates a constant dc-link
voltage. The battery charger/discharger eliminates the need for the transformer
and the increase of the number of battery and supplies the power demanded by
the load to the dc-link capacitor in the event of the input power failure or abrupt
decrease of the input voltage. The inverter provides a regulated sinusoidal output
voltage to the load and limits the output current under an impulsive load. The
control of the dc-link voltage enhances the transient response of the output
voltage and the utilization of the input power. By utilizing the battery
charger/discharger, the overall efficiency of the system is improved and the size,
weight, and cost of the system are significantly reduced. Experimental results
obtained with a 3kVA prototype show a normal efficiency of over 95.6% and an
input power factor of over 99.7%.
In chapter 3, a high performance three-phase to single-phase on-line UPS is
proposed. The proposed UPS is composed of five legs: three legs are a three-
phase rectifier, one leg is a battery charger/discharger, and the other is a single-
phase inverter. New control algorithms of the rectifier, the charger/discharger,
and the inverter are proposed. The proposed algorithms of the rectifier and the
charger/discharger improve dynamic performance at step load change.
Additionally, experimental results obtained with a 10kVA prototype verify the
performance.
In chapter 4, a transformerless three-phase on-line UPS is proposed. The
proposed UPS is composed of a three-phase rectifier, a three-phase inverter, and
a battery charger/discharger. Since both neutral lines of the input and output
voltages are connected at the center of the dc-link, the need for an isolation
transformer is eliminated and the size, weight, and cost of the system are
significantly reduced. Additionally, new control algorithms of the inverter are
proposed. Experimental results obtained with a 10kVA prototype verify the
performance.
In chapter 5, the conclusions are given.
Chapter 2
Transformerless Single- to
Single-Phase On-Line UPS
The proposed single-phase transformerless on-line UPS is shown in Fig. 2.1.

The common leg is switched at the line frequency synchronized to the input
voltage and the rectifier, the battery charger/discharger, and the inverter are
independently controlled as PWM strategy. By utilizing the battery
charger/discharger, the proposed UPS is implemented without transformer and
increasing the number of the battery. Hence, the efficiency of the system is
improved and the size, the weight, and the cost of the system are significantly
reduced. With normal dc-link voltage (typically 350V for 220V output voltage),
the battery charger/discharger is operated as a buck converter and the battery is
charged. When the input power failure or abrupt decrease of the input voltage
occurs, the dc-link voltage is instantaneously decreased and the battery
charger/discharger operates as a boost converter while discharging the battery.
Since the operation mode of the battery charger/discharger is changed by the dc-
link voltage, the transient effect of the output voltage can be minimized and the
utilization of the input power can be enhanced. When the impulsive loads such
as rectifier loads, no-load transformer, and electric motor are attached, an
excessive load current caused by low impedance during the transient status may
greatly endanger the systems [15]. To overcome this problem, a new technique
which is characterized by limiting the excessive current and quick recovery of
the output voltage is employed under the impulsive load.
Experimental results of a 3kVA prototype show the performance of the
proposed UPS. From the experimental results, the conversion efficiency and
input power factor are obtained as over 95.6% and 99.7%, respectively. Also, the
input and output characteristics have good steady-state and dynamic
performance. The main advantages of the proposed approach are as follows: 1)
the rectifier works as an active filter and thus eliminates harmonics created by
nonlinear loads. 2) the inverter regulates output voltage under any disturbance.
3) the control of the dc-link voltage enhances the dynamic performance of the
output voltage and the utilization of the input power. 4) the utilization of the
battery charger/discharger provides the features of high efficiency and low cost.
5) it possesses high power factor. 6) there is current-limiting capability for the
impulsive loads.
2.1 System Description
Fig. 2.1 shows the configuration of the single-phase transformerless on-line

UPS. The proposed UPS is composed of a four-leg-type converter which
operates as a rectifier, a battery charger/discharger, and an inverter. Since the
effective switching frequency of the output voltage waveform is doubled and the
ripple is reduced, the unipolar PWM switching scheme results in better output
voltage waveform and increased efficiency than those of the bipolar PWM
switching scheme. Hence, the unipolar switching scheme is used as the
switching scheme for the proposed UPS. The common leg is switched at the line
frequency which is synchronized to the input voltage to achieve low switching
losses and high efficiency. The rectifier leg and the common leg operate as a
PWM rectifier which converts the input voltage into the dc-link voltage. The
rectifier performing power factor correction provides high power factor while
maintaining a constant dc-link voltage. At the same time, the common leg and
the inverter leg operate as a PWM inverter which converts the dc-link voltage
into the output voltage. The output voltage is regulated to be in phase with the
input voltage. With normal dc-link voltage, the battery charger/discharger
operates as a buck converter which steps down the dc-link voltage to the battery
voltage. When the dc-link voltage is instantaneously decreased, the battery
charger/discharger operates as a boost converter which steps up the battery
voltage to the dc-link voltage. By utilizing the battery charger/discharger, the
proposed UPS is implemented without transformer and increasing the number of
the battery. Hence, the losses caused by the transformer which is operated at line
frequency are eliminated and high efficiency of the system can be obtained. Also,
the size, the weight, and the cost of the system can be reduced.
S1 S3 S5 S7
is ib io
Cd Vd
Ls Lb Lo
Vb
vs vo Co load
S2 S4 S6 S8
Mode 1a
S1 S3 S5 S7
is ib io
Cd Vd
Ls Lb Lo
Vb
vs vo Co load
S2 S4 S6 S8
Mode 2a
S1 S3 S5 S7
is ib io
Cd Vd
Ls Lb Lo
Vb
vs vo Co load
S2 S4 S6 S8
Mode 3a
S1 S3 S5 S7
is ib io
Cd Vd
Ls Lb Lo
Vb
vs vo Co load
S2 S4 S6 S8
Mode 4a
S1 S3 S5 S7
is ib io
Cd Vd
Ls Lb Lo
Vb
vs vo Co load
S2 S4 S6 S8
Mode 1b
S1 S3 S5 S7
is ib io
Cd Vd
Ls Lb Lo
Vb
vs vo Co load
S2 S4 S6 S8
Mode 2b
S1 S3 S5 S7
is ib io
Cd Vd
Ls Lb Lo
Vb
vs vo Co load
S2 S4 S6 S8
Mode 3b
S1 S3 S5 S7
is ib io
Cd Vd
Ls Lb Lo
Vb
vs vo Co load
S2 S4 S6 S8
Mode 4b
Fig. 2.2. Operation modes of the proposed UPS.

The operation of the proposed UPS can be divided into three modes: the on-
line mode, the back-up mode, and the bypass mode. When the dc-link voltage is
detected as a normal voltage, the on-line mode is started. The battery
charger/discharger operates as a buck converter while charging the battery, as
shown in Fig. 2.5(a). The upper switch S3 of the battery charging/discharging leg
is independently controlled by the PWM strategy. The lower switch S4 is
consistently turned off in this mode and the body diode of the switch S4 is
conducted for the inductor current ib to be freewheeling. The operation of the
rectifier and inverter in the on-line mode is divided into four modes, as shown in
Fig. 2.2. Mode 1 and Mode 2 show the current flow and switching states during
the positive half cycle of the input voltage. Mode 3 and Mode 4 occur during the
negative half cycle. Since the common leg is switched by the polarity of the
input voltage, the switch S6 is consistently turned on during the positive cycle of
the input voltage. On the contrary, the switch S5 is turned on during the negative
cycle of the input voltage. In Mode 1, the switches S2 and S6 are turned on. The
input voltage is applied to the inductor Ls. Thus, the inductor current is increases
in a positive direction and the magnetic energy is stored in Ls. In accordance
with the switching states of the unipolar PWM strategy in the inverter leg, Mode
1a and Mode 1b are determined. Since the switch S7 is turned on in the Mode 1a,
the dc-link voltage Vd is applied to the load and the output current io flows
through the load. On the other hand, the switch S8 is turned on in the Mode 1b.
Hence, a zero voltage is applied to the load and the output current is
freewheeling through S6 and S8. In Mode 2, the switch S2 is turned off and the
switch S1 is turned on. The stored energy in Ls is transferred to the dc-link
capacitor Cd. Since the positive voltage Vd is applied to the load, the dc-link
capacitor is discharged and the output current io flows through the load. In Mode
2b, zero voltage is applied to the load and the output current is freewheeling, as
in Mode 1b. Similarly, Mode 3 and Mode 4 show the operation modes during the
negative half cycle of the input voltage.
In case of the instantaneous decrease of the dc-link voltage due to the input
power failure or abrupt decrease of the input voltage, the back-up mode is
started. The battery charger/discharger operates as a boost converter and supplies
the power demanded by load to the dc-link capacitor Cd, as shown in Fig. 6(b).
The lower switch S4 of the battery charging/discharging leg is independently
controlled by the PWM strategy. The upper switch S3 is consistently turned off in
this mode and the body diode of the switch S3 is conducted to supply power to
the dc-link capacitor. The inverter leg is switched with the unipolar PWM
strategy, as in the on-line mode. The operation is straightforward. In the event of
an internal malfunction or overload, the bypass mode is started. The bypass
switch is turned on and the power demanded by the load is directly supplied
from the utility line.
2.2 System Analysis
2.2.1 Rectifier control
The rectifier performing unity power factor control is composed of a rectifier

leg and a common leg, as shown in Fig. 2.1. The common leg is switched at low
switching frequency depending on the polarity of the input voltage. It is assumed
that the current of the input inductor flows continuously. In case of positive half
cycle of the input voltage, when the switches S2 and S6 are turned on (Mode 1),
the inductor current is is increased and magnetic energy is stored in the inductor
Ls. Similarly, in the negative half cycle, the switches S1 and S5 are turned on
(Mode 3) and the inductor current is is increased in the opposite direction. Hence,
the voltage equation is obtained as follows:
dis
vs Ls 0 (2.1)
dt
where vs and is are the input voltage and current, respectively, and Ls is the
inductance of the input inductor. In the positive cycle of the input voltage, when
the switches S1 and S6 are turned on (Mode 2), the stored energy in the inductor
is transferred to the dc-link capacitor Cd. As in the same manner, in the negative
cycle, the switches S2 and S5 are turned on (Mode 4) to release the stored energy
to the dc-link capacitor Cd. Thus, the voltage equation is achieved as
dis
vs Ls Vd sgn(is ) 0 (2.2)
dt
where Vd is the dc-link voltage of the capacitor and sgn(·) denotes the sign of (·).
It is noted that sgn(vs) = sgn(is) under the unity power factor control. Depending
on the duty ratio D1 of the switch S1 and D2 of the switch S2, the average
inductor voltage over a switching period Ts gives the input current variation is
as follows:
is
vs D1 vs Vd 1 D1 Ls vs 0 (2.3)
Ts
is
vs D2 vs Vd 1 D2 Ls vs 0. (2.4)
Ts
The duty ratios D1 and D2 can be considered to be D in each half cycle.

Therefore, the duty ratio D is represented by
D Dn Dc (2.5)
which is composed of a nominal duty ratio Dn and a controlled duty ratio Dc.
Then, the nominal duty ratio Dn and the controlled duty ratio Dc can be
represented as
Vs
Dn 1 sin t (2.6)
Vd
Ls is
Dc (2.7)
Vd Ts
where Vs and are the maximum input voltage and angular frequency,
respectively. To force the current is of the rectifier to track its current command
is*, a proportional and integral (PI) current controller is utilized as follows:
Dc k p ie ki ie dt (2.8)
where kp and ki are the proportional and integral gains, respectively, and the
current error ier is given by
ie is * is . (2.9)
Fig. 2.3 shows the proposed unity power factor controller of the rectifier circuit.
To regulate the dc-link voltage, a PI-type voltage controller is used. The output
Dc of the current controller only generates the inductor voltage drop required to
maintain the sinusoidal input current. With the addition of the nominal Dn to the
rectifier, which is originally a nonlinear dynamic system, the relation between
the input Dc and output |is| of the rectifier becomes a first-order linear dynamic
system (2.7) with easy controllability. Thus, the addition of the nominal duty Dn
relaxes the burden of the current controller and improves the input current
waveform.
With loss of the input power, the magnetic contactor (MC) is opened and the
rectifier is disabled. The power demanded by the load is supplied from the
battery. The common leg is switched at the line frequency synchronized to the
input voltage. Upon the return of the input power, the rectifier performs back to
the unity power factor control. The output voltage is slowly adjusted to be in
phase with the line voltage using a phase-locked loop. Once synchronism is
achieved and the magnitude of the input voltage is in the working range, the
UPS starts to operate in the on-line mode while the MC connects the line to the
rectifier.
2.2.2 Inverter control
Fig. 2.4 shows the control block diagram of the inverter. The output voltage is
regulated through the PI-type voltage controller. According to the absolute value
of the output current |io|, the proposed current limiter consists of two modes: a
normal mode and a current limit mode. The reference value of the overcurrent
(OC) is greater than the reference value of the current limit (CL). When the
absolute value of the output current |io| is lower than the reference value of
current limit, the inverter operates in the normal mode. In this mode, the duty of
the inverter is determined as
D m sin_ ref (2.10)
where m is the output of the voltage controller and sin_ref is the sine reference
value obtained from the sine lookup table. Due to the sinusoidal reference
sin_ref, the inverter generates sinusoidal output voltage in the normal mode.
When the impulsive load such as a capacitive rectifier load is attached, the
inverter supplies excessive current to charge the load capacitor. This excessive
current may damage the switching devices in the inverter. If the inverter output
voltage is forced to have smaller amplitude, it is possible to limit the power
delivered to a load. Thus, the duty of the inverter leg in the current limit mode is
determined by modifying sin_ref to limit the amplitude of the output current in
the proposed UPS. When the detected output current |io| is higher than or equal
to the reference value of overcurrent, the inverter operates in a current limit
mode and sin_limit becomes zero. Hence, the output voltage is gradually
increased by the proportional gain after becoming almost zero. Until the polarity
of the output voltage is changed, the output current is controlled under the
reference value of the current limit and the capacitor of the load is charged to
some degree. When the output current |io| is detected between CL and OC, the
present value of sin_ref is stored to sin_limit. After one control period, sin_ref is
compared to the sin_limit according to the polarity of the output voltage. If
sin_ref is greater than sin_limit in the positive output voltage, sin_ref is adjusted
with proportional gain depending on the difference between |io| and CL. Then,
the capacitor of the load is charged to some degree without increasing the
current. The above process is repeated several times until sin_limit is greater
than sin_ref.
Similarly, when sin_ref is less than sin_limit in the negative output voltage,
sin_ref is adjusted with proportional gain until sin_limit is less than sin_ref.
When the capacitor is fully charged in some cycles, no further impulsive current
flows through the inverter, and the inverter operates in the normal mode. The
output voltage is recovered to its rated value. The detailed algorithm of the
current limiter is shown in Fig. 2.5. As the p-type controller is used, various
impulsive loads can be attached to the system. The system will recover its rated
output value immediately.
vs Vs sin t
io
sin t
D
Vo*
m m sin t
Vo
sin_ref = sin t
Yes sin_limit = 0
|io| OC
mode = current limit
No
Yes sin_limt = sin_ref

|i o| CL
No
Yes sin t > 0 and No sin t < 0 and No

current limit mode sin_limit sin_ref sin_limit sin_ref
No Yes Yes
sin_ref = sin_limit + Kp ×(CL-|io|) sin_ref = sin_limit - Kp ×(CL-|io|) mode = normal
D = m × sin_ref
Fig. 2.5. Control algorithm of output current limiter.

2.2.3 Battery charger/discharger control
The operation modes and control block diagrams of the battery

charger/discharger are shown in Fig. 2.6. In the charging mode, the dc-link
voltage is regulated to be a constant voltage and the battery charger/discharger
operates as a buck converter, which steps down the dc-link voltage to the battery
voltage, as shown in Fig. 2.6(a). The lower switch S4 of the battery
charging/discharging leg is consistently turned off in this mode. It is assumed
that the inductor current ib flows continuously. When the switch S3 is turned on,
the inductor current ib is increased and the voltage equation is obtained as
follows:
dib
Vd Lb Vb 0 (2.11)
dt
where Vb and ib are the battery voltage and current, respectively, and Lb is the
inductance of the battery inductor. On the other hand, when the switch S3 is
turned off, the inductor current ib is freewheeling through the body diode of the
switch S4. Thus, the voltage equation is achieved as
dib
Lb Vb 0. (2.12)
dt
Depending on the duty ratio D3 of the switch S3, the average inductor voltage
over a switching period Ts gives the battery current variation ib as follows:
ib
Vd Vb D3 Vb 1 D3 Lb . (2.13)
Ts
Hence, the duty ratio D3 is achieved as follows:
Vb Lb ib
D3 Dn Dc (2.14)
Vd Vd Ts
which is composed of a nominal duty ratio Dn and a controlled duty ratio Dc. To
force the current ib of the battery to track its current command ib*, a PI-type
current controller is utilized as follows:
Dc k p ie ki ie dt (2.15)
where kp and ki are the proportional and integral gains, respectively, and the
current error ie is given by
ie ib* ib . (2.16)
In the charging mode, the control block diagram of the battery

charger/discharger is shown in Fig. 2.6(a). When the output ib' of the voltage
controller is greater than the limited current Ib,limt, the battery is charged with a
constant current. By contrast, if ib' is less than Ib,limt, the battery
charger/discharger is charged with a constant voltage.
When the dc-link voltage is instantly decreased due to the loss of the input
power or abrupt decrease of the input voltage, the battery charger/discharger
operates as a boost converter, which steps up the battery voltage to the dc-link
voltage, as shown in Fig. 2.6(b). Similarly, it is assumed that the inductor current
ib flows continuously and the upper switch of the battery charging/discharging
leg is consistently turned off. When the switch S4 is turned on, the inductor
current ib is increased and the magnetic energy is stored in the inductor Lb. The
voltage equation is obtained as follows:
dib
Vb Lb 0. (2.17)
dt
On the other hand, when switch S4 is turned off, the stored energy in the inductor
Lb is supplied to the dc-link capacitor Cd through the body diode of the switch S3.
Thus, the voltage equation is achieved as
dib
Vb Lb Vd 0. (2.18)
dt
Depending on the duty ratio D4 of the switch S4, the average inductor voltage
over a switching period Ts gives the following battery current variation ib:
ib
Vb D4 Vb Vd 1 D4 Lb . (2.19)
Ts
Then, the duty ratio D4 is obtained as follows:
Vb Lb ib
D4 Dn Dc 1 (2.20)
Vd Vd Ts
which is composed of a nominal duty ratio Dn and a controlled duty ratio Dc. To
force the current ib of the battery to track its current command ib*, a PI-type
current controller is utilized as in (2.15). Fig. 2.6(b) shows the control block
diagram of the battery charger/discharger in the discharging mode.
2.2.4 Dc-link voltage control
In the event of abrupt decrease of the input voltage, the excessive current
flows through the rectifier. This excessive current may damage the switching
devices in the rectifier. Hence, the MC is opened and the power demanded by
the load is supplied from the battery in the conventional UPS. It results in the
low utilization of the input power and frequent use of the battery. In addition,
since the UPS must instantly compensate for the required dc-link voltage to
minimize the transient effect on the output voltage, the fast detection technique
of the input voltage is required. To overcome these problems, the control
technique of the dc-link voltage is employed in the proposed UPS. Fig. 2.7
shows the variation of the dc-link voltage according to the input power condition.
When the loss of the input power or abrupt decrease of the input voltage occurs,
the dc-link voltage is instantly decreased. If the dc-link voltage arrives at the
starting voltage of the discharging Vd_start, the battery charger/discharger operates
as the discharging mode which steps up the battery voltage to the dc-link voltage.
The dc-link voltage is regulated to be the output voltage of the discharging
Vd_dchg. The rectifier is disabled at the loss of the input power and supplies a
limited current, which is less than the rated current, at the abrupt decrease of the
input voltage. Upon the return of the input power, the rectifier performs back to
the normal unity power factor control and the battery charger/discharger operates
as the charging mode, which steps down the dc-link voltage to the battery
voltage, and the dc-link voltage is regulated to be the output voltage of the
rectifier Vd_pfc.
Since the operation mode of the battery charger/discharger is changed by the
dc-link voltage, the power demanded by the load is supplied by both the input
power and battery power in case of the abrupt decrease of the input voltage. In
addition, if the power demanded by the load is sustained as lower than the power
supplied from the rectifier with the limited current, the power demanded by the
load is supplied from the input power without using the battery power. Hence, by
utilizing the limited current of the rectifier which is lower than the rated current
in the abrupt decrease of the input voltage, the utilization of the input power is
enhanced and the use of the battery power is reduced. Moreover, since the dc-
link voltage is immediately compensated by changing the operation mode of the
battery charger/discharger, the transient effect of the output voltage is minimized
and uninterrupted power is supplied to the load irrespective of the line condition.
Vd
Vd _ pfc
Vd _ dchg
Vd _ start
2Vs
power
Fig. 2.7 Mode change method of the battery charger/discharger.

2.3 Experimental Results
In a microprocessor-based control system, software flexibility facilitates the

development and updating of the control technique and uses control theory to
obtain high performance. Moreover, a single-chip microcontroller can
implement the controller with lower cost and smaller size than the general-
purpose microprocessor with accompanying external circuits such as an A/D
converter and PWM generator. Fig. 2.8 is the photograph of the prototype and
the overall control block diagram of the single-phase on-line UPS is
implemented using a single-chip microcontroller dsPIC30F3011 (Microchip), as
shown in Fig. 2.9. The parameters of dsPIC30F3011 are listed in Table 2.1. The
switching times of each device are implemented in software and the PWM
pulses are generated through the pulse generator of the microcontroller. The
motor control PWM module, which can provide complementary operation for
three output pin pairs, generates the gate signal of the rectifier leg, the common
leg, and the inverter leg. The standard PWM generates the gate signal of the
battery charger/discharger leg. Voltage or current signals are measured by using
the 10-bit A/D converter in the microcontroller. The implementation of the
voltage or current controllers and PWM pulse generation is performed every
sample period Ts = 100 s. Due to the simplicity and high speed, modified zero
crossing method as shown in Fig. 2.10 is employed for PLL in the proposed UPS.
Fig. 2.9 shows the overall system of the proposed UPS. It is divided into two
parts: the controller and power circuit. The controller part includes the
microcontroller running the control algorithms and driver circuits. By utilizing
the battery charger/discharger, the power circuit is implemented without
transformer and increasing the number of the battery. The rating of the proposed
UPS is designed for up to 3kVA with 60Hz 220V nominal input/output voltages.
To handle this power rating, 50A/600V insulated gate bipolar transistors
(IGBTs) are selected as power semiconductor switches. These power
semiconductor switches are operated with a carrier frequency of 15kHz and a
dead time of 2 s. The system parameters of the prototype are given in Table 2.2.
Fig. 2.11 shows the voltage and current waveforms at the loss of the input
power. The dc-link voltage Vd is instantaneously decreased and the battery
charger/discharger operates as a boost converter while changing the operation
mode of the UPS from the on-line mode to the back-up mode. Since the dc-link
voltage is immediately compensated by changing the operation of the battery
charger/discharger, the transient effect of the output voltage is negligible and the
UPS transfers seamless power to the load.
Fig. 2.12 shows the input voltage vs and the input current is of the UPS under
a linear load. The input current is exactly in phase with the input voltage and
nearly sinusoidal. Thus, the input power factor approaches unity. The results
measured by the power meter show that the total efficiency of the UPS is 95.6%
and the power factor is 99.7%.
Fig. 2.13 shows the output voltage vo and the output current io, respectively,
when the UPS is affected by a capacitive rectifier load (C = 3500 F). From the
experimental waveforms, it is observed that the output voltage and current are
quickly compensated under the impulsive load. In addition, it can be seen that its
rated output voltage is recovered within 2-3 cycles of the fundamental line
period.
Fig. 2.14(a) and (b) show the voltage and current waveforms according to the
step variation of the load current io. It can be seen that the output voltage vo is
well regulated and the dc-link voltage is quickly compensated regardless of the
load change, as shown in Fig. 2.14.
(a)
(b)
Fig. 2.8..Photographs of the prototype.

bypass switch
battery charging/
rectifier leg common leg inverter leg
discharging leg
S1 S3 S5 S7
is ichrg io
Cd Vd
MC Ls Lb Lo
vb
vs battery Co vo
S2 S4 S6 S8
load
S1 S2 S3 S4 S5 S6 S7 S8
Gate driver
dsPIC30F3011
rectifier
Vd
control algorithm
vs
is PWM
battery charger/discharger
vb A/D converter pulse generator
control algorithm
ichrg
vo
inverter
io
control algorithm
Fig. 2.9. Overall block diagram of the proposed UPS.

100us timer
interrupt
va = Vssin( t)
Negative edge(170°) Yes Edge ? Yes Positive edge(10°)

(hysteresis)
No Store
Store
negative edge time tn positive edge time tp
No
90° < tn - tp < 220° ?
Yes
Obtain phase
Peak time = +
t90°[k] = tp + (tn - tp)/2
Phase error compensation

Period If ( terr > 0){
T' = t90°[k] - t90°[k-1] t = t +1
t90°[k-1] = t90°[k] terr = terr -1}
If ( terr < 0){

Period error compensation t = t -1
T = T + (T' T)/5 terr = terr +1}
Degree step
= 360° × Tctrl/T
Obtain phase error

=
Fig. 2.10. Implementation algorithm of phased locked loop.

Fig. 2.11. Voltage and current waveforms at the loss of the input power.
Fig. 2.12. Input voltage and current waveforms of the proposed UPS.
Fig. 2.13. Compensated output voltage and current under impulsive load.
Fig. 2.14. Voltage and current waveforms according the load change.
(a) Load step response from 0% to 100%.
(b) Load step response from 100% to 0%.
TABLE 2.1
PARAMETERS OF DSPIC30F3011 PROCESSOR
Parameters Value
Architecture 16-bit
CPU speed 30MIPS
Program Memory 24 kB
RAM 1024 bytes
I/O pins 30
Pin counts 40
A/D converters 10bits, 9 channels
Motor control PWM channels 6 channels
TABLE 2.2
SYSTEM PARAMETERS OF THE PROTOTYPE
Parameters Symbols Value

Input voltage Vs 220V
Output voltage Vo 220V
DC-link voltage Vd 350V
Battery voltage Vb 192V
Maximum output power Po,max 3kVA
Frequency f 60Hz
Input inductance Ls 1.5mH
Battery inductance Lb 1.5mH
Output inductance Lo 1.5mH
DC-link capacitance Cd 2×680 F
Output capacitance Co 30 F
Chapter 3
Transformerless Three- to
Single-Phase On-Line UPS
A three-phase to single-phase on-line UPS in Fig. 3.1 is proposed. The

proposed UPS has characteristics such as high power factor and good output
voltage regulation. This thesis proposes new control methods of the rectifier and
the charger/discharger. A proposed adaptive gain controller improves the
dynamic performance at step load change without adverse effects on steady-state
performance. Additionally, to minimize adverse effects of input and output
disturbance, a new mode change method of the charger/discharger is proposed.
This thesis also proposes a new current-limiting technique under the impulsive
load. Experimental results of a 10kVA prototype show the performance of the
proposed UPS. From the experimental results, the total harmonic distortions
(THD) of the input current and the output voltage in a nonlinear load are
obtained at 4.3% and 5.6%, respectively. Moreover, the input and output
characteristics have a good steady-state performance and a good transient
response at a temporary loss of the input power.
Fig. 3.1 shows the configuration of the proposed on-line UPS. The proposed
UPS is composed of a rectifier, a charger/discharger, an inverter, and transfer
switches as shown in Fig. 3.1. Three-phase normal ac sources ea, eb, and ec are
connected to the rectifier through a magnetic contactor and a neutral line N is
connected at a center of dc-link capacitors. A single-phase bypass ac source vbps
is connected to an output voltage vo through a bypass switch S11. The bypass ac
source is an independently reserved source of electric energy. In the event of an
internal malfunction of UPS or an overload of the inverter, the power demanded
by the load is directly supplied from the bypass ac source. Since a magnitude of
the output voltage is the same with a rated phase voltage of the normal ac source,
the inverter is designed as a half-bridge type and one side of the output voltage is
connected to the neutral line of the three-phase ac source. Therefore, if the
bypass ac source is unavailable, then the bypass ac source can be replaced with a
phase voltage of the normal ac source without an additional transformer and the
cost is reduced.
When the normal ac input voltage is within the preset tolerance, the UPS
operates in the normal mode. In the normal mode, the thyristor S11 is off-state
and S12 is on-state, respectively. The rectifier boosts the input voltage into the dc-
link voltage Vd with PFC function and the inverter converts Vd into the
sinusoidal output voltage. Since the inverter is the half-bridge type, Vd has to be
higher than a doubled peak value of vo. If the rectifier can provide enough power
to supply the output power, then the charger/discharger operates as a battery
charger. When voltage sag of the normal input source occurs, if the rectifier
cannot supply the output power alone, the charger/discharger operates as a
discharger. The output power is provided by both the rectifier and the discharger.
When the normal ac input source goes outside the preset tolerance, the back-up
mode starts. The rectifier is disabled and the MC is opened. The
charger/discharger operates as the discharger and the output power is totally
supplied from the battery set. In the event of the internal malfunction of UPS or
the overload of the inverter, the bypass mode starts. In the bypass mode, the
thyristor S11 is on-state and S12 is off-state, respectively. The power demanded by
the load is directly supplied from the bypass ac source.
3.1.1 Rectifier control
To save the energy stored in the battery set and to increase back-up time, the
rectifier has to operate not only in a very wide input voltage range but also in an
unbalanced input voltage condition. Therefore, each phase current is
independently controlled as shown in Fig. 3.2 and the rectifier with the three-
phase input can be considered as three single-phase half-bridge rectifiers
operating in parallel. The analysis for the a-phase voltage is described, since the
analyses for the others are analogous.
Two switches of each leg are complementarily driven with pulse width
modulation. While the switch S1 is on-state, the voltage equation of the boost
inductor L is obtained as
d Vd
L ia ea (3.1)
dt 2
where ia is an a-phase input current. Similarly, while S1 is off-state, the following

voltage equation is satisfied
d Vd
L ia ea . (3.2)
dt 2
Depending on a duty ratio DS1 of the switch S1, the average inductor voltage over
a switching period Ts gives input current variation ia as follows:
Vd Vd ia
ea DS1 ea 1 DS1 L . (3.3)
2 2 Ts
Therefore, the duty ratio DS1 is represented by
ea L
DS 1 0.5 ia
Vd Vd Ts (3.4)
Dn Dc
where the nominal duty Dn and the controlled duty Dc are represented as
Ea
Dn 0.5 sin t
Vd
(3.5)
L
Dc ia
Vd Ts
where Ea and are a peak voltage of ea and an angular frequency, respectively.

To force ia to track its current command ia*, a proportional and integral (PI)
current controller is utilized as follows:
Dc k p ia* ia ki ia* ia dt . (3.6)
The output Dc of the current controller only generates the inductor voltage drop
required to maintain the sinusoidal input current. With the addition of the
nominal duty Dn to the rectifier, which is originally a nonlinear dynamic system,
the relation between Dc and ia of the rectifier becomes a first-order linear
dynamic system (3.5) with easy controllability. Thus, the addition of Dn relaxes
the burden of the current controller and improves the input current waveform. As
shown in Fig. 3.2, the control strategy uses multiple control loops for each leg.
One is an outer voltage loop and the other is an inner current loop. The dc-link
voltage is regulated by the slow outer loop, whereas the inner loop that shapes
the input current is much faster producing a good input power factor.
3.1.2 Adaptive gain control of the rectifier and the discharger
The block diagram for the control of the rectifier is shown in Fig. 3.2. The dc-
link voltage is regulated by slow voltage controller whereas the current
controller that shapes the input current is much faster resulting in a good input
power factor. Under the real load conditions, the output currents are usually
neither sinusoidal nor balanced, and the dc-link capacitors may have voltage
ripples due to the input and output power difference of the UPS. Therefore, the
voltage controller of the rectifier has to be designed to ensure that the input
current command is not affected by this low frequency harmonic ripple. In a
conventional PI voltage controller, the voltage controller is designed slowly with
small proportional gain kp in order to minimize adverse effects on the input
current command. However, small kp usually results in unacceptable variation of
dc-link voltage at step load change from no load to full load or vice versa.
If three-phase input currents of the rectifier are sinusoidal and balanced, then
the input power of the rectifier is nearly dc as 3EaIa/2. However, the output
power of the UPS has a low frequency ripple component. In case of a resistive
load, the instantaneous output power po of the UPS is
po (t ) Vo sin tI o sin t
(3.7)
0.5Vo I o (1 cos 2 t )
where Vo and Io are the peak values of vo and io, respectively. Therefore, the
instantaneous current ic flowing through the dc-link capacitors is
Vo I o
ic (t ) cos 2 t. (3.8)
2Vd
The difference of input and output power of the UPS results in a dc-link voltage
ripple vd expressed as
2 Vo I o
vd (t ) ic (t ) cos 2 t. (3.9)
C d1 Vd Cd1
Therefore, the voltage controller has to be designed to ensure that the input
current command is not affected by vd. In the conventional PI voltage controller,
the controller is utilized as follows:
I a* k p Vd _ pfc Vd ki Vd _ pfc Vd dt (3.10)
where Vd_pfc is a voltage command of the rectifier. To minimize adverse effects

on the input current command, the outer voltage loop is controlled slowly with
the small proportional gain kp. The integral gain ki is usually much smaller than
kp. However, small kp usually results in an unacceptable variation of dc-link
voltage at the step load change from no load to full load or vice versa. When ki is
very small and can be neglected, (3.9) shows that the magnitude of dc-link
variation is about Ia,max/kp, where Ia,max is the peak input current at a full load. To
solve this problem, a fuzzy logic controller has been recently developed as the
voltage controller. Although the fuzzy logic controller shows good dynamic and
steady-state performances, its implementation requires deep knowledge and
experience of the power circuit and the control theory [33]-[35]. In this thesis, a
more simple control algorithm is proposed. To force Vd to track its command
Vd_pfc, an adaptive gain controller is utilized as follows:
I a* k p (Vd ) Vd _ pfc Vd ki (Vd ) Vd _ pfc Vd dt

a
k1 k2 Vd _ pfc Vd Vd _ pfc Vd (3.11)
ki (Vd ) Vd _ pfc Vd dt
where kp(Vd) and ki(Vd) are functions of Vd, and k1, k2, and a are constant values.
As shown in Fig. 3.3(a), when the voltage error (Vd_pfc - Vd) is small, the gain
kp(Vd) is small to improve steady-state performance, whereas when the voltage
error (Vd_pfc - Vd) is large, kp(Vd) is larger than the conventional one to improve
dynamic performance and to reduce voltage variation range. In a similar manner,
the adaptive gain controller can be applied to the integral gain to track dc-link
voltage command quickly. Experimental results show that the proposed adaptive
controller reduces the dc-link voltage variation by more than 50% without
adverse effects on input current command.
Although achieving steady-state and dynamic analyses of this controller are
difficult due to the nonlinearity of gains, its implementation is very simple and
does not require deep knowledge of the circuit and control theory. The practical
guide lines of the control parameters are described as follows. From (3.5), the
proportional gain of the PI current controller (3.6) is obtained as L/VdTs. To
obtain the control parameters of the adaptive gain controller, it may be required
to go through the following procedure. Firstly, the proportional gain in the
conventional PI voltage controller should be determined. Secondly, the
parameter k1 is determined less than the proportional gain in the conventional PI
controller. Thirdly, due to the performance limitation of the processor such as the
microcontroller, the parameter a can not be a floating point number. Therefore,
the parameter a is always selected as 1 due to simplification of calculation.
Finally, the maximum ripple voltage of dc-link Vd,ripple at the step load change is
roughly expected from (3.11) as follows:
I a*, peak k1 k2Vd ,ripple a Vd ,ripple (3.12)
where I*a,peak is the peak value of the input current at rated condition. Therefore,
from (3.12), the parameter k2 can be obtained. Since the integral gains are not
tightly related with performance of the UPS and too large integral gains
adversely affect the stability of the rectifier, the integral gains of the current and
voltage controller are set as very small numbers.
When the normal ac source goes outside the tolerance, MC is opened and the
battery set. Once magnitudes of the input voltages enter into the working range
and synchronism is achieved, MC is closed and the rectifier starts to perform
unity power factor control.
p gain
proposed adaptive
gain controller
kp(Vd)
at k1>0, k2>0, a=1
conventional
PI controller kp
k1
voltage error
(a)
Current
reference
proposed adaptive
gain controller
Ia,limit
conventional
PI controller
voltage error
-Ia,limit
(b)
Fig. 3.3. Comparison of proportional gain and current reference with respect to voltage error.
3.1.3 Inverter and charger/discharger control
Fig. 3.4 shows the control block diagram of the inverter with the current
limiter. The operation of the inverter is divided into two modes according to the
absolute value of an output current |io|. When |io| is lower than a current limit
value, the inverter operates in the normal mode. In the normal mode, the duty
ratio of inverter switch S9 is determined as
Vd _ pfc
DS 9 0.5 m sin_ ref (3.13)
Vd
where m is the output of the PI voltage controller and sin_ref is sin t obtained
from a sine look up table. S10 is driven complementarily with S9. If the bypass ac
source is within tolerance, then sin t is synchronized with the bypass ac input
voltage to transfer the power demanded by the load without a break when the
UPS enters the bypass mode. To compensate dc-link voltage variation quickly,
(3.13) includes the feed-forward term Vd. Since the feed-forward control of Vd is
faster than PI control of m, it improves the transient response of the output
voltage at the step load change. Since the current limiter of Fig. 3.5 has similar
operation with that of single- to single-phase on-line UPS, the description about
current-limiter is omitted in this chapter.
When the rectifier becomes unavailable or when the current required by the
load exceeds the output rating of the rectifier, the battery supplies the load power.
In the discharging mode, the switch S7 of the charger/discharger is consistently
turned off and the charger/discharger operates as a conventional boost converter.
To obtain the desired battery voltage and capacity, the battery set is made up
of some cells which are electrically connected in series or a combination of
series and parallel. To charge the battery set at a specific charging rate until the
battery voltage reaches a given end-of-charge voltage or a floating voltage, the
battery charger must be able to limit the charging current to a given rated battery
current Ichrg_limit. When the battery voltage is lower than the floating voltage, the
output of voltage controller is limited to the given rated battery current. Once the
battery voltage reaches the floating voltage, the battery current decreases slowly
and the battery voltage is controlled at the floating voltage.
The control block diagrams of battery charger/discharger are shown in Fig. 3.5.
More detail descriptions of battery charger/discharger are omitted in this chapter
since its operation is similar with that of single- to single-phase on-line UPS.
vbps Vbps sin t
PLL for
inverter
sin t
io Current
0.5
limiter
sin_ref
Voltage m DS 9
Vo *
controller
Vo Vd _ pfc
Vd
Fig. 3.4. Control block diagram of the inverter.
*
Voltage Current ichrg ie Current Dc DS 7
Vbat* controller limiter controller
( DS 8 0)
I chrg _ limit Dn
Vbat ichrg
Vbat
Vd
(a)
*
Voltage ibat ie Current Dc DS 8
Vd *_ dchg controller controller
( DS 7 0)
Dn
Vd ibat
Vbat
1
Vd
(b)
Fig. 3.5. Control diagrams of the battery charger/discharger.

(a) Control diagram in the charging mode.
(b) Control diagram in the discharging mode.

obtain high performance. Moreover, the single-chip microcontroller can
implement the controller with lower cost and smaller size than the general-
purpose microprocessor with accompanying external circuits such as an external
memory, an A/D converter, a D/A converter, and a PWM generator. The
hardware circuit of the proposed UPS in Fig. 3.1 was implemented using a
single-chip microcontroller. A photograph of the prototype is shown in Fig. 3.6.
It is divided into two parts: a controller circuit and a power circuit. The
controller part includes a single microcontroller dsPIC30F6015 (Microchip)
which is capable of executing up to 30 MIPS and running the control algorithms
and drive circuits in real time. The motor control PWM module, which can
provide a complementary operation for four output pin pairs, generates the gate
signals of the rectifier and the inverter. The standard PWM module generates the
gate signals of the battery charger/discharger. Voltage and current signals are
measured by using the 10-bit A/D converter in the microcontroller. The
implementation of the voltage or current controllers and PWM pulse generation
is performed at every sample period 100 s. The parameters of the controller are
listed in Table 3.1.
The major components and parameters of the hardware circuit used for
experiments are presented in Table 3.2. The UPS is tested over the 380V line-to-
line input voltage, and the switching frequencies of the rectifier, the
charger/discharger, and the inverter are selected as 15kHz. The output voltage
and output power of UPS are specified as 220V and 10kVA, respectively.
Fig. 3.7(a) shows the input voltage and current waveforms at 10kW in the
normal mode. The input voltage source is a commercial three-phase line. The
input current is in phase with the input voltage and its waveform is nearly
sinusoidal. The input current produces a power factor of 0.99, and its THD is
measured at 4.3%. Additionally, the harmonics of the input current are shown in
Fig. 3.7(b).
Fig. 3.8 shows major waveforms at failure of the input source. When the input
power is lost, Vd decreases. Once Vd reaches Vd_start, the mode of the
charger/discharger is changed from the charging mode to the discharging mode
immediately. Since the dc-link voltage ripple is rapidly compensated by the
feed-forward term of the inverter controller, and kept over the doubled peak
value of the output voltage, the adverse effect on the output voltage is minimized.
Fig. 3.9 shows the dc-link voltage response at the step load change from no
load to full load and vice versa. Both in the normal mode and in the back-up
mode, the variation of the dc-link voltage is about 30V. Since frequent mode
changes of the charger/discharger reduce the battery back-up time, the dc-link
voltage Vd has to be kept over Vd_start in the normal mode
Fig. 3.10 shows the output voltage and current waveforms under the impulsive
load. When the full-bridge rectifier with capacitive output filter (C = 5000 F) is
connected to the output voltage, the UPS can fulfill the impulsive loading
quickly. In addition, the output voltage is recovered to the rated voltage within 2
cycles of the fundamental line period. Since the proposed current limit algorithm
is fully implemented in software, the cost is reduced.
Fig. 3.6. Photograph of the prototype.
(a)
Fig. 3.7. Waveforms and current harmonics of the rectifier.

(a) Input current and voltage waveforms.
(b) Harmonic spectrum of the input current.
Vd
[100V/div.]
ia
[20A/div.]
ibat
[20A/div.]
vo
[500V/div.]
time[20ms/div.]
(a)
(b)
(c)
Vd
[100V/div.]
ibat
[50A/div.]
io
[50A/div.]
time[20ms/div.]
(d)
Fig. 3.9. Dc-link voltage responses against load variations.

(a) Output current step up in normal mode.
(b) Output current step down in normal mode.
(c) Output current step up in back-up mode.
(d) Output current step down in back-up mode.
Fig. 3.10. Output voltage and current under impulsive load.
TABLE 3.1
PARAMETERS OF DSPIC30F6015 PROCESSOR
Parameters Value
Architecture 16-bit
CPU speed 30MIPS
Program Memory 144 kB
RAM 8192 bytes
Pin counts 64
A/D converters 10bits, 16 channels
Standard PWM channels 8 channels
Motor control PWM channels 6 channels
TABLE 3.2
SYSTEM PARAMETERS OF THE PROTOTYPE
Chapter 4
Transformerless Three- to
Three-Phase On-Line UPS
A conventional three-phase on-line UPS consists of a rectifier/charger, a

battery set, an inverter, a transformer, and bypass switches, as shown in Fig. 4.1.
The rectifier performs PFC with pulse-width modulation (PWM) strategy and
acts as a charger for the battery. On the other hand, the inverter converts the dc-
link voltage into the output voltage with PWM strategy. Therefore, the regulated
sinusoidal output voltage can be achieved. The battery which is connected in
parallel with the dc-link capacitor is charged when the input voltage is in the
normal condition and is discharged when input power loss occurs. However, the
conventional UPS has several drawbacks. Firstly, the high voltage battery set has
the problem associated with space, cost, reliability, and safety. Secondly, since
the transformer is operated at line frequency, the transformer which weighs more
than several tens kilograms increases the size, weight, and cost of the UPS and
makes it difficult to move and install the UPS. To solve the above mentioned
problems, some kinds of the UPS have been presented in [5, 40, 42]. The
transformerless four-wire ac-dc-ac converter has been presented in [40]. Both
the neutral points of the input and output are connected at the center of dc-link
capacitors to eliminate a large and heavy transformer. In [42], the UPS employ
the separate charger/discharger to reduce the voltage of the battery set and the
number of batteries. However, the effort for performance improvement such as
increasing the back-up time and alleviating the adverse effect on the output
voltage is still necessary.
A three-phase on-line UPS in Fig. 4.2 is proposed in this thesis. By utilizing
the separate charger/discharger, the voltage of the battery set is lowered and the
number of batteries is reduced. Therefore, the problem associated with the size,
weight, and installation can be solved with a reasonable cost. To ensure the
proper operation of the UPS and to minimize adverse effects of the input and
output disturbance, new control algorithms of the rectifier, the charger/discharger,
and the inverter are proposed. A new adaptive gain controller decreases the dc-
link voltage variation at step load changes and an employed mode change
method increases the back-up time, respectively. When the impulsive loads such
as rectifier loads, no-load transformer, and electric motor are attached, an
excessive load current caused by low impedance during the transient status may
greatly endanger the systems [21]. To overcome this problem, a new technique
which is characterized by limiting the excessive current and quick recovery of
the output voltage is employed under the impulsive load. Experimental results of
a 10kVA prototype show the performance of the proposed UPS. The
experimental results indicate that the input and output characteristics have a
good steady-state performance and a good transient response under the
conditions such as the temporary loss of input power and the step load changes.
Fig. 4.2 shows the configuration of the proposed on-line UPS. The proposed
UPS is composed of a rectifier, a charger/discharger, an inverter, and transfer
switches. The UPS has three modes: normal mode, back-up mode, and bypass
mode. In the normal and back-up modes, the thyristor S15, S16, S17 are off-state
and S18, S19, S20 are on-state, respectively. Thus, the power can be transferred
through the inverter. In the event of an internal malfunction of the UPS or an
overload of the inverter, the bypass mode is started. In the bypass mode, the
thyristor S15, S16, S17 are on-state and S18, S19, S20 are off-state, respectively. The
power demanded by the load is directly supplied from the ac input source. Three
parts, which are the rectifier, the charger/discharger, and the inverter, are
independently controlled with PWM strategy. Three-phase ac input voltages vrn,
vsn, and vtn are connected to the rectifier through a magnetic contactor (MC). The
MC is closed while the rectifier is operating. The rectifier regulates the voltage
across the dc-link capacitors Cd1, Cd2 and performs PFC in the normal mode. In
the normal or back-up mode, the inverter provides three sinusoidal output
voltages vun, vvn, and vwn. In order to achieve no transition time at the moment of
mode change from normal to bypass, each inverter output voltage vun, vvn, and
vwn is synchronized with vrn, vsn, and vtn, respectively. With normal dc-link
voltage, the battery charger/discharger is operated as a buck converter which
supplies the energy into the battery set. When the dc-link voltage is
instantaneously decreased, the battery charger/discharger is operated as a boost
converter which steps up the battery voltage to the dc-link voltage.
4.1.1 Inverter control
The inverter with three-phase output can be considered as three single-phase

half-bridge inverters. The u-phase analysis is described, since the analyses for
the others are analogous. Fig. 4.3 shows the control scheme of the inverter. The
u-phase operation of the inverter is divided into two modes according to the
absolute value of an output current |iu|. When the absolute value of the output
current |iu| is lower than the current limit value, the inverter is operated in the
normal mode. In the normal mode, the duty ratio of the inverter switch S9 is
determined as
Vd _ pfc
DS 9 0.5 m sin_ ref (4.1)
Vd
where m is the output of the PI voltage controller and sin_ref is sin t obtained
from PLL. If the input ac source is within a preset tolerance, then sin t is
synchronized with its corresponding input voltage vrn in order to transfer power
to the load without a break when the UPS enters the bypass mode. To reduce
adverse effects from the dc-link voltage ripple, (4.1) includes the feed-forward
term Vd which can be immediately obtained by A/D conversion. Since the feed-
forward control of Vd is faster than PI control of m, it improves a transient
response of the output voltage for dc-link voltage variation occurred at step load
change or at outage of the input source.
Various loads such as linear, nonlinear, single-phase or three-phase loads, and
so on can be attached at the output of the inverter. The nonlinear load such as a
capacitive rectifier in Fig. 4.4 may be the worst case of the loads. When the
capacitive rectifier is attached to the inverter, the inverter of the UPS will deliver
excessive current because the large charging current will flow until the capacitor
of the load is fully charged. This high current is adverse to the switching devices
in the inverter. If the inverter output voltage is forced to have smaller amplitude,
then it is possible to limit the power delivered to the load. International
electrotechnical commission (IEC) has established a standard IEC 62040-3
concerning the method of specifying the performance and test requirements [23],
[39]. According to IEC 62040-3, the nonlinear load as shown in Fig. 4.4 is tested
for impulsive loading. The values of the filter capacitor Cf, the series line resistor
Rs, and the load resistor RL can be calculated according to the IEC 62040-3
guideline.
To comply with IEC 62040-3, a new inverter control technique for impulsive
loading is proposed. Similar to the normal mode of the inverter, the u-phase
analysis is described. Before the capacitive rectifier in Fig. 4.4 is attached to the
inverter, the voltage across Cf is zero. When the capacitive rectifier is attached to
the inverter, the initial short-circuit current can exceed the current-limit value,
since Rs is a very small value. A large transient current spike may occur due to
the stored energy in the output filter capacitor Co of the inverter. However, it is
not necessary to protect this peak short-circuit current, since the duration of the
initial transient is very short. Once the stored energy in Co is dissipated, the large
charging current will flow from the inverter until Cf is fully charged. This high
current adversely affects to the switching devices in the inverter. If the amplitude
of the output voltage is forced to be near the voltage of Cf, then it is possible to
limit the current flowing into the load. To limit this excessive current, the
inverter enters into a current limit mode when |iu| is greater than the current limit
level (CL). The duty of inverter switches in the current limit mode is determined
in a different way from the normal mode. The value of sin_ref is sin t in normal
mode. However, in the current limit mode, it is modified to limit the amplitude
of the output current under CL and the output waveform is deformed. The
detailed algorithm for the proposed current limiter is explained in the flowchart
shown in Fig. 4.5 When the capacitive load is attached, a large current spike
over the over current level (OC) is detected since the stored energy in Co is
dissipated. At the moment, the mode of the inverter goes into the current limit
mode and sin_limit becomes zero. Until the polarity of the output voltage is
changed, the output current is controlled near the current limit level. At some
degree of the next half period, the output current |io| is detected between CL and
OC and the present value of sin_ref is stored to sin_limit. Until sin_limit is
greater than sin_ref, the output current is controlled near CL and the capacitor of
the load is charged to some degree. The above process is repeated several half
periods. When the capacitor of load is fully charged in some cycles, no further
impulsive current flows through the inverter, and the inverter is operated in the
normal mode. The output voltage is recovered to its rated value. The advantage
of this scheme is that it can be implemented with a software program without an
additional hardware. In addition, it has an adjusting ability for different
nonlinear loads such as strong or weak, long or short impulsive loads.
vrn
sin t
iu 0.5
m DS 9
Vun*
Vun Vd _ pfc
Vd
DS11
DS13
vun Cf RL
Rs
vvn Cf RL
Rs
vwn Cf RL
Rs
Fig. 4.4 Test circuit of impulsive loading.

sin t
sin_ref = sin t
Yes sin_limit = 0
|iu| OC
No
Yes sin_limt = sin_ref

|iu| CL
No
Yes sin t > 0 and No sin t < 0 and No

current limit mode sin_limit sin_ref sin_limit sin_ref
No Yes Yes
sin_ref = sin_limit + kp ×(CL-|iu |) sin_ref = sin_limit - kp ×(CL-|iu|) mode = normal
sin_ref
Fig. 4.5 Flowchart of the current-limiter of the inverter.

4.1.2 Rectifier and charger/discharger control
The rectifier with the three-phase input in Fig. 4.1 can be considered as
three single-phase half-bridge rectifiers operating in parallel. When the input
source goes into the preset working range and the synchronism of phase locked
loop (PLL) is achieved, MC is closed and the rectifier starts to perform the unity
power factor control. When the input power is lost, MC is opened and the
battery set.
If the rectifier can provide power enough to supply the output power, then
the charger/discharger in Fig. 4.1 is operated in a charging mode, otherwise the
charger/discharger is operated in a discharging mode. In the charging mode, the
charger/discharger is operated as a conventional buck converter and the switch
S8 of the battery charger/discharger is consistently turned off. When the rectifier
becomes unavailable or the current required by the load exceeds the output
rating of the rectifier, the battery supplies the load power. In the discharging
mode, the switch S7 of the charger/discharger is consistently turned off and the
charger/discharger is operated as a conventional boost converter. Fig. 4.6 and 4.7
is the control block diagrams of the rectifier and the charger/discharger,
respectively. The detail descriptions of them are omitted in this chapter.
*
ichrg ie Dc DS 7
Vbat*
( DS 8 0)
I chrg _ limit ichrg Dn

Vbat
Vbat
Vd
*
ibat ie Dc DS 8
Vd *_ dchg
( DS 7 0)
Dn
Vd ibat
Vbat
1
Vd

obtain high performance. Moreover, the microcontroller can implement the
controller with lower cost and smaller size than a general-purpose
microprocessor with accompanying external circuits such as an external memory,
an A/D converter, a D/A converter, and a PWM generator. The hardware circuit
of the proposed UPS in Fig. 4.1 was implemented using a microcontroller and its
photographs are shown in Fig. 4.8. It is divided into two parts: a controller
circuit and a power circuit. The controller part includes a single microcontroller
dsPIC30F6015 (Microchip) which is capable of running the control algorithms
and driving the control circuits in real time. Voltage and current signals are
measured by using 10-bit A/D converter in the microcontroller. The
implementation of the voltage or current controllers and PWM pulse generation
is performed at every sample period 100 s.
The major components and parameters of the hardware circuit used for
experiments are presented in Table 4.1. The UPS are tested over the 380V line-
to-line input and output voltages and the switching frequencies of the rectifier,
the charger/discharger, and the inverter are selected as 15kHz. The output power
of the UPS is specified as 10kVA.
Fig. 4.9(a) shows major waveforms at the failure of the input source. As
shown in Fig. 4.9(a), the input current is in phase with the input voltage and its
waveform is nearly sinusoidal before the loss of the input power. The input
current produces a power factor of 0.99, and its THD is measured at 3.5%. When
the input power is lost, Vd is decreased. Once Vd reaches Vd_start, the mode of the
charger/discharger is immediately changed from the charging mode to the
discharging mode. Since the dc-link voltage ripple is rapidly compensated by the
feed-forward term of the inverter controller and the dc-link voltage is kept over
the doubled peak value of the output voltage, the transient effect of the output
voltage is negligible and the UPS transfers seamless power to the load. Fig.
4.9(b) shows major waveforms at the sag of the input source. As shown in Fig.
4.9(b), both the rectifier and the discharger provide the power to the load to
enhance the utilization of the input power. Therefore, the battery backup time is
effectively increased.
Fig. 4.10 shows the dc-link voltage responses at step load change from no
load to full load and vice versa. Since the frequent mode changes of the
charger/discharger reduce the battery back-up time, the dc-link voltage Vd has to
be kept over Vd_start in the normal mode when the output load changes from no
load to full load. Experimental results show that Vd is always higher than Vd_start
in the normal mode and the transient effect on the output voltage is negligible at
step load change. By employing the proposed adaptive gain controller in () of
the rectifier, the dc-link voltage variation is reduced over 50% compared with
that in the conventional PI controller.
Fig. 4.11 shows the output voltage and current waveforms under the impulsive
load. When the capacitive rectifier load (Cf=4700uF, Rs= 0.5 , RL=28 ) is
connected to the output voltage vun, the UPS can fulfill the impulsive loading
quickly. In addition, vun is recovered to the rated voltage within 2 cycles of the
fundamental line period. Since three outputs of the inverter are controlled
independently, the impulsive loading for vun does not affect the waveforms of vvn
and vwn. Since the proposed current limit algorithm is fully implemented in
software, the cost is reduced.
(a)
(b)
Fig. 4.8 Photographs of three- to three-phase on-line UPS.
(a) Front view.
(b) Side view.

(a)
(b)
Fig. 4.9 Major waveforms at the outage and sag of the input source.
(a) Waveforms at the outage.
(b) Waveforms at the sag.

(a)
(b)
Fig. 4.10 Experimental waveforms under step load change.
(a) Load step response from 100% to 0%.
(b) Load step response from 0% to 100%.

Fig. 4.11 Output voltage and current under impulsive load for vun.
TABLE 4.1: SYSTEM PARAMETERS OF THE PROTOTYPE
Parameters Symbol Value
Rated battery voltage Vbat 384V
Dc-link voltage reference of the rectifier Vd_pfc 700V
Dc-link voltage reference of the discharger Vd_dchg 693V
Starting voltage of the discharger Vd_start 655V
Output current limit level CL 50A
Line frequency f 60Hz
Boost inductor of the rectifier Li 0.8mH
Buck/boost inductor of the battery charger/discharger Lbat 1mH
Output filter inductor Lo 0.8mH
Dc-link capacitor Cd1,Cd2 4700 F
Output filter capacitor Co 50 F

Chapter 5
Conclusions
This thesis proposes hardware circuits and control algorithms of
transformerless on-line UPSs. The UPSs are used to improve power source
quality as well as to protect critical loads such as computers, industrial control
systems, communication system, medical equipment, etc, since interruptions of
those systems may result in a substantial financial loss. A conventional on-line
UPS consists of a full-bridge rectifier, a battery set, a full-bridge inverter, two
transformers, and a bypass circuit. For proper operation of the bypass circuit or
ensuring the human safety, an isolated transformer at the output side is necessary.
Also, an isolated transformer at the input side is employed to reduce the number
of the battery which is placed in parallel with the dc-link capacitor. However,
since the transformers are operated at line frequency, several drawbacks such as
large size and heavy weight exist.
This thesis presents three types of on-line UPSs. Three proposed UPSs are
single- to single-phase UPS, three- to three-phase UPS, and three- to three-phase
UPS. Each UPS is composed of a rectifier, a battery charger/discharger, and an
inverter. The rectifier has the capability of power factor collection and regulates
a constant dc-link voltage. The battery charger/discharger eliminates the need for
the transformer and the increase of the number of battery and supplies the power
demanded by the load to the dc-link capacitor in the event of the input power
failure or abrupt decrease of the input voltage. The inverter provides a regulated
sinusoidal output voltage to the load and limits the output current under an
impulsive load. By utilizing the battery charger/discharger and a transformerless
type, the overall efficiency of the system is improved and the size, weight, and
cost of the system are significantly reduced.
Also, this thesis presents new control algorithms for improving the
performance and reliability. New control algorithms of the rectifier, the
charger/discharger, and the inverter are proposed. The proposed adaptive gain
control algorithms of the rectifier and the charger/discharger improve dynamic
performance at step load change. To improve the transient response of the output
voltage at outage of an input source, mode change method of the
charger/discharger is also proposed. Additionally, a proposed current limit
algorithm of the inverter can be implemented without an additional hardware
and it increases the reliability of the UPS.
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A Study On Transformerless On-Line UPS

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A Study On Transformerless On-Line UPS

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This thesis proposes hardware circuits and control algorithms of

Three proposed UPSs are single- to single-phase UPS, three- to three-phase

UPS, and three- to three-phase UPS. Each UPS is composed of a rectifier, a

battery charger/discharger, and an inverter. The rectifier has the capability of

charger/discharger and a transformerless type, the overall efficiency of the

rectifier and the charger/discharger improve dynamic performance at step load

change. To improve the transient response of the output voltage at outage of an

input source, mode change method of the charger/discharger is also proposed.

Additionally, a proposed current limit algorithm of the inverter can be

implemented without an additional hardware and it increases the reliability of

good steady state performances under input and output disturbances.

1.1 Background . 1

1.2 Organization 9

2 Transformerless Single- to Single-phase On-line UPS ... 11

2.1 System description ........................................................ 14

2.2 System analysis ... .......................................................... 19

2.3 Experimental results ............................................. 34

3 Transformerless Three- to Single-phase On-line UPS 44

3.1 System description ........................................................ 46

3.2 Experimental results .............................................. 60

4 Transformerless Three- to Three-phase On-line UPS 70

4.1 System description ........................................................ 72

4.2 Experimental results ............................................. 84

Summary (in Korean) ... 94

2.1 Configuration of the proposed transformerless on-line UPS

3.1 Proposed three-phase to single-phase on-line UPS

4.1 Conventional three-phase on-line UPS

An uninterrupted power supply (UPS), also known as a battery back-up,

Line Over/Under voltage, or power loss

Fig. 1.1 The operation of the typical off-line UPS

Line Internal malfunction or overload of inverter

Fig. 1.2 The operation of the typical on-line UPS

The proposed single-phase transformerless on-line UPS is shown in Fig. 2.1.

Fig. 2.1 shows the configuration of the single-phase transformerless on-line

Fig. 2.2. Operation modes of the proposed UPS.

2.2.1 Rectifier control

The rectifier performing unity power factor control is composed of a rectifier

The duty ratios D1 and D2 can be considered to be D in each half cycle.

2.2.2 Inverter control

D m sin_ ref (2.10)

Yes sin_limt = sin_ref

Yes sin t > 0 and No sin t < 0 and No

sin_ref = sin_limit + Kp ×(CL-|io|) sin_ref = sin_limit - Kp ×(CL-|io|) mode = normal

Fig. 2.5. Control algorithm of output current limiter.

The operation modes and control block diagrams of the battery

Hence, the duty ratio D3 is achieved as follows:

In the charging mode, the control block diagram of the battery

Then, the duty ratio D4 is obtained as follows:

2.2.4 Dc-link voltage control

Fig. 2.7 Mode change method of the battery charger/discharger.

In a microprocessor-based control system, software flexibility facilitates the

Fig. 2.8..Photographs of the prototype.

Fig. 2.9. Overall block diagram of the proposed UPS.

Negative edge(170°) Yes Edge ? Yes Positive edge(10°)

Phase error compensation

If ( terr < 0){

Obtain phase error

Fig. 2.10. Implementation algorithm of phased locked loop.

Parameters Symbols Value

A three-phase to single-phase on-line UPS in Fig. 3.1 is proposed. The

3.1.1 Rectifier control

where ia is an a-phase input current. Similarly, while S1 is off-state, the following

2 Transformerless Single- to Single-phase On-line UPS... 11

2.2 System analysis ............................................................. 19

Summary (in Korean)... 94

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