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LTC2871 (0 + 0), (1 + 0), (1 + 1), (1 + 2), (0 + 1), (0 + 2) 38-Lead QFN, 38-Lead TSSOP
allowing programming or diagnos- The LTC2870 changes modes between used in a similar way but with inde-
tics. Signaling pins are shared between RS232 and RS485 via control of the pendent access to all signal pins.
the RS485 and the RS232 transceiv- 485/232 pin, which can be manipu- • Simultaneous operation. Some appli-
ers, with one transceiver active at any lated though processor control, cations require concurrent RS485 and
given time, as shown in Figure 4. manual jumper settings, or protocol- RS232 communication. For example,
specific cables that connect the pin in point-of-sale applications, a cash
to VL or ground. The LTC2871 can be register may communicate with a server
A A
RT485 RT485
RA 485 RO 485
120Ω 120Ω
B B
GND GND
DZ
DY Y
Y
RA A 5V/DIV
Z
DZ Z
RA
via RS485 but also accept input from an RB B RB
RS232-equipped keypad. The LTC2871,
1µs/DIV
with completely independent RS232 and
RS485 transceivers, enables separate ter-
VL
minals for each protocol with a single IC. b
LTC2870 RXEN
Another example of simultaneous usage DXEN
485/232
is translation between RS232 and RS485 DY
TE485
5V/DIV
protocols. Figure 5 shows the LTC2871
configured as an RS232 4000-foot “exten- Y
Y
sion cord” implemented by converting DY
120Ω 1V/DIV
to RS485 for the long cable run and Z
Table 2. Termination control in the LTC2870. The LTC2870 and LTC2871 seamlessly switch between termination schemes as needed, using internal components. The
RS485 120Ω termination resistor can be disabled in any mode by setting TE485 pin low, which is useful if the transceiver is not positioned at the end of the bus.
Y A
DI RO
120Ω 120Ω
Z B
ROUT1 DIN1
RXIN RIN1 DOUT1 RXOUT 5k
RS485 A
RS232 UP TO 4000 FT RS232 RS232
ROUT1 CAT5e CABLE RIN1 RT
DRIVER DRIVER 120Ω
OUT DIN1 ROUT1 IN 5k
A Y B
RO DI
120Ω 120Ω CONFLICT!
B Z
SLAVE SLAVE
LTC2870/ LTC2870/
LTC2871 LTC2871
SLAVE MASTER
LTC2870/LTC2871 LTC2870/LTC2871
120Ω 120Ω
120Ω 120Ω
VL VL
TE485 TE485
twice the one-way propagation delay in compared to the same cable terminated cable variation, stub reflections and
the cable. This small deviation from ideal with 100Ω. Although the internal ter- discontinuities have a far greater impact
is easily tolerated in most communications minator is not a perfect match for the on signal integrity. The figure also shows
systems, and can improve performance, 100Ω cable, there is almost no effect on the devastating effect of leaving the cable
which is why the PROFIBUS standard the overall signal other than a slight unterminated at the receiving end, where
specifies a similar termination mismatch. amplitude increase at the beginning of reflections degrade the signal substantially.
the received signal, which can improve
Figure 8 shows the results of using the INTERNAL RS232 SUPPLY ENOUGH
system performance via increased signal TO DRIVE TWO TRANSCEIVERS
LTC2871 internal 120Ω termination resis-
overdrive and noise margin. Normal RS232 signals are driven on a single wire
tor to terminate 100 feet of CAT5e cable
with respect to ground at levels that
must exceed 5V and –5V. A DC/DC boost
LTC2870/LTC2871 converter and capacitive inverter are
Y
DRIVER integrated into the LTC2870 and LTC2871
RT END
100Ω
120Ω (Y – Z) to produce both positive and negative
485
500kHz
voltages used to support these drive levels
Z 2V/DIV
100'
while operating on a single 3V–5.5V sup-
CAT5e
A CABLE RECEIVER ply. The only required external com-
END
RT
100Ω (A – B) ponents are one 10µ H inductor for the
120Ω
485 boost voltage and one 220nF cap for the
B 200ns/DIV
voltage inversion, as well as the bypass
RYZ = 100Ω ,RAB = ∞ caps on the generated VDD and VEE rails.
RYZ = RAB = 120Ω (TERMINATION ENABLED)
RYZ = RAB = 100Ω (EXTERNAL TERMINATION) Figure 9 shows the LTC2870 or LTC2871
configured in a typical application with
Figure 8. Driving signal on Cat5e cable with the LTC2871 and comparing effects of the termination resistance.
all of the required external components.
Scope traces on the top show the differential signal at the driven end of the cable (Y – Z) and the bottom set
of traces show the differential signal received after traversing the cable (A – B).
LOGIC SUPPLY PIN SUPPORTS 1.7V Figure 10. Running two LTC2870s or LTC2871s
2.2µF 2.2µF
TO 5.5V SUPPLIES from a single, shared DC/DC converter
A separate logic supply pin VL allows INDUCTOR: TAIYO YUDEN CBC2518T220M OR MURATA LQH32CN220K53
the LTC2870 and LTC2871 to interface
with any logic signals from 1.7V to 5.5V.
• Idle Bus. All drivers on the bus are Many modern RS485 receivers meet
All logic I/Os use VL as their high sup-
disabled with high impedance outputs. failsafe requirements by introducing
ply. Optionally, VL can be tied to VCC .
This condition is not actually a fault; it a negative offset into the differential
Figure 11 shows the LTC2870 or LTC2871
is a normal mode of operation in RS485. threshold. In this way, whenever the bus
used with a low voltage microprocessor.
Some receivers cannot support this by is shorted or undriven, but terminated,
RS485 BALANCED RECEIVER AND themselves but require a resistor net- the input to the receiver is zero, which is
FAILSAFE work to bias the differential signals on interpreted as a high level. The receiver
Failsafe operation is a term used to the bus in such a way that the receiver in this case is unbalanced, since the
describe how a receiver reacts to vari- senses it as a high input. The LTC2870 threshold is not symmetric around zero
ous conditions, most of which are faults. and LTC2871 support this function volts—the average of a differential signal.
Predictable fault handling is important without requiring a bus-biasing network,
for robust system design. LTC2870 and whether the bus is terminated or not.
LTC2871 receivers produce a high output, 3V TO 5.5V
• Disconnected Bus. This category of
called a failsafe condition, in response 1.7V TO VCC LTC2870/
failsafe operation refers to the case LTC2871
to all of the following conditions: VCC
where the receiver becomes discon- VL
nected from the bus. This is similar
CONTROL
3V TO 5.5V
10µH
220nF to the idle bus state but is truly a SIGNALS
GND VDD VEE • Shorted Bus. In this situation, the RB, ROUT2 B
1µF 1µF receiver inputs are shorted together.
Some receivers provide failsafe opera- GND
INDUCTOR: TAIYO YUDEN CBC2518T220M
OR MURATA LQH32CN220K53
tion for open, but not shorted, inputs.
Again, bus-biasing resistors are not
Figure 9. Typical supply connections with external effective for shorted bus conditions. Figure 11. The VL pin permits low voltage logic
components shown interface
Figure 12. (a) RS485 receiver input threshold characteristics for fast moving signals. (b) Measured 3Mbps The LTC2870 and LTC2872 also feature a
signal driven down 4000ft of CAT5e cable. Top Traces: receiver signals after transmission through cable; logic loopback feature that can be used
Middle Trace: math showing the differences of the top two signals; Bottom Trace: receiver output, exhibiting
excellent duty cycle.
for diagnostics and as a debug tool. The
loopback mode works for both the RS232
and RS485 transceivers, and provides a
The unbalanced receiver can introduce threshold drops down to –40mV to support
logic path from the driver input pin to
severe signal pulse-width and duty-cycle all modes of failsafe operation, as previ-
the corresponding receiver output pin.
distortion for weak signals that result ously described. The balanced receiver
The driver and receiver are not engaged
from transmission over long cables. architecture permits transmission over
in the loop; just logic buffers are used.
longer cables than an unbalanced receiver
The LTC2870 and LTC2871 use a bal- This allows diagnostic tests to be run
and offers the additional benefit of excel-
anced receiver with a rising threshold of
lent noise immunity due to the wide
65mV and a falling threshold of –65mV for
effective differential input signal hysteresis
signals transitioning through that window Figure 14. Logic loopback control in the LTC2871.
of 130mV for typical communications Loopback works whether or not the drivers are
in less than 2µs, as shown in Figure 12. If enabled.
the differential signal lingers within this Figure 12 highlights the performance of
window for more than 2µs, the positive the LTC2871 balanced receiver, where a VL
LTC2871
DX232 RX232
signal is driven through 4000 feet of CAT5e
DX485 RX485
cable at 3Mbps. Even though the differen- LB
Figure 13. RS485 full- and half-duplex control in the
LTC2870 tial signal peaks at just over ±100mV with Y
DI
slow edges, the output maintains nearly Z
LTC2870/LTC2871 a perfect signal and the receiver intro- A
RO
Y duces almost no duty cycle distortion.
DI, B
Z
DY DUPLEX AND LOOPBACK CONTROL DIN1 DOUT1
Figure 15. RS485 receiver LTC2870/LTC2871 When disabled, the driver and receiver
with multiplexed inputs.
SELECT H/F outputs are not driven and the receiver
INPUT2 INPUT1 RS485
Y INTERFACE input becomes high-Z. This allows these
INPUT1 pins to be connected to the same pins on
Z
RA,
another device whose CH2 pin is driven
RO with the complementary state of the first.
A
B
INPUT2 CONCLUSION
The LTC2870 and LTC2871 are flexible
3V to 5.5V multiprotocol transceivers
that communicate using RS485 and
without disturbing the bus. Optionally, Figure 15 shows an RS485 receiver
RS232 signaling on either shared I/O pins
the bus may be driven during loopback with multiplexed inputs making use
(LTC2870) or separate I/O pins (LTC2871).
by simply enabling the appropriate driver. of the half- and full-duplex control.
Integrated selectable termination and
Figure 14 shows loopback operation.
Figure 16 shows how to combine two duplex control allow easy configuration
MORE APPLICATIONS LTC2871 devices to make a triple RS232 with minimal external components. n
The rich feature sets of the LTC2870 transceiver with either a selectable line Notes
and LTC2871 make it possible to build or logic interface. This application makes 1 Formally, TIA/EIA-485 and TIA/EIA-232
applications that would otherwise be use of the CH2 pin, which selectively 2 “Rugged 3.3V RS485/RS422 Transceivers with Integrat-
ed Switchable Termination,” by S. Tanghe, R. Schuler, LT
challenging to produce. For example, disables the second RS232 transceiver. Magazine, March 2007.
a b
LTC2871 LTC2871
DIN1 DOUT1 DIN1 DOUT1
Figure 16. RS232 triple transceiver with PORT 1 PORT 1 PORT 1 PORT 1
selectable line interface (a), and logic LOGIC LINE LOGIC LINE
INTERFACE ROUT1 RIN1 INTERFACE INTERFACE ROUT1 RIN1 INTERFACE
interface (b)
LTC2871 LTC2871
SELECT LINE 2B
CH2 CH2
SELECT LINE 2B
DIN2 DOUT2 DIN2 DOUT2
PORT 2B PORT 2B
LINE LOGIC
ROUT2 RIN2 INTERFACE INTERFACE ROUT2 RIN2