1.1.

11 To explain binary arithmetic such as addition, subtraction,

DIGITAL ELECTRONICS multiplication and division with examples.
1.1.12 To explain binary subtraction using 1’s compliment and 2’s compliment
STUDY MATERIAL method.

1.2 To understand the simplification of Boolean expressions

1.2.1 To explain the operation of AND, OR, NOT, NAND, NOR, EXOR and
EXNOR with their symbols and truth tables.
1.2.2 To realize AND, OR, NOT, EXOR and EXNOR using universal gates.
1.2.3 To state Demorgans’ Theorems
1.2.4 To state the rules and laws of Boolean algebra.
1.2.5 To explain Sum Of Product (SOP) expression, Product Of Sum (POS)
expression , minterms and maxterms
1.2.6 To state the need for simplifying Boolean expression
by Vinod.K, Lr. in Electronics , GPC Thrikaripur 1.2.7 To simplify Boolean expressions with the help of logic rules and truth
tables
1.2.8 To state the basic principle of Karnaugh map
1.2.9 To explain two variables, three variables and four variables K-maps
Unit-1 : Number Systems & Logic Gates and their reductions with the help of suitable examples
1.2.10 To state Don’t care terms and their role in solving K-maps
Syllabus 1.2.11 To list the advantages and disadvantages of K-map

This study material is based upon your syllabus and prepared only
1.1 To understand various number sysetms exam oriented. You are strictly informed to read other text books for further
1.1.2 To state the need for binary number system in modern digital knowledge.
technology
1.1.3 To describe the features of binary number system with examples
1.1.4 To compare binary number system with decimal number system
1.1.5 To explain the conversion from decimal to binary and vice versa with
suitable examples. 1.1 Number Systems
1.1.6 To list the features of Hexadecimal number system with examples
1.1.7 To explain the conversion from hexadecimal into decimal and binary
The following number systems are the most commonly used.
and vice versa.
1.1.8 To state the need for binary codes.
• Decimal Number system
1.1.9 To describe BCD codes, excess-3 code, Gray code
• Binary Number system
1.1.10 To describe alphanumeric codes such as ASCII code and EBCDIC
• Octal Number system
• Hexadecimal Number system

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Binary Number System
To present numerical data in our daily life, we use the decimal number
systems. Unfortunately, computers can't do the same. Instead, computers
represent numbers by using the lowest base number system used by us, which
is two. ... For this reason, binary is measured as a two-state system i.e. ON or
OFF. All digital circuits and systems use this binary number system. The base or
radix of this number system is 2. So, the numbers 0 and 1 are used in this
number system.
Need for Binary number system:
• Binary number system simplifies the design of computers and related
technologies.
• Binary is extremely simple to implement. Any system that has an "on"
and "off" or "high" and "low" state can be used to encode and/or
manipulate data.
• Binary is the lowest "base" possible (base 2) and hence any higher
counting system can be easily encoded (e.g. decimal, octal, hexadecimal,
etc.)
• Binary data is extremely robust in transmission because of less noise.
Features of Binary Number System:
• Uses two digits, 0 and 1.
• Also called base 2 number system
• Each position in a binary number represents a 0 power of the base (2).
• In this number system, the successive positions to the left of the
binary point having weights of 20, 21, 22, 23 and so on. Similarly, the
successive positions to the right of the binary point having weights of
2-1, 2-2, 2-3 and so on. That means, each position has specific weight,
which is power of base 2.
Binary to Decimal conversion:
Consider the binary number 1101.011. Integer part of this number is 1101 and
fractional part of this number is 0.011. The digits 1, 0, 1 and 1 of integer part
have weights of 20, 21, 22, 23 respectively. Similarly, the digits 0, 1 and 1 of
study material on digital electronics | vinod k | lecturer in electronics | gptc thrikaripur
fractional part have weights of 2-1, 2-2, 2-3 respectively. Mathematically, we can
write it as
1101.011 = (1 × 23) + (1 × 22) + (0 × 21) + (1 × 20) + (0 × 2-1) + (1 × 2-2) + (1 × 2-3)
After simplifying the right hand side terms, we will get a decimal number,
which is an equivalent of binary number on left hand side.
Decimal to Binary conversion:
Repeated division by 2 method is discussed in class room and please go
through the problems in your notebook.
Hexadecimal Number System
The base or radix of Hexa-decimal number system is 16. So, the numbers
ranging from 0 to 9 and the letters from A to F are used in this number system.
The decimal equivalent of Hexa-decimal digits from A to F is 10 to 15.
In this number system, the successive positions to the left of the Hexa-decimal
point having weights of 160, 161, 162, 163 and so on. Similarly, the successive
positions to the right of the Hexa-decimal point having weights of 16-1, 16-2, 16-
3
etc.. That means, each position has specific weight, which is power of base
16.
Consider the Hexa-decimal number 1A05.2C4. The digits 5, 0, A and 1 have
weights of 160, 161, 162 and 163 respectively. Similarly, the digits 2, C and 4
have weights of 16-1, 16-2 and 16-3 respectively.
1A05.2C4 = (1 × 163) + (10 × 162) + (0 × 161) + (5 × 160) + (2 × 16-1) + (12 × 16-2)
+ (4 × 16-3)
After simplifying the right hand side terms, we will get a decimal number,
which is an equivalent of Hexa-decimal number on left hand side.
Eg : (58.25)10 = (72.2)8
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Binary Codes Excess 3 code

• This code doesn’t have any weights. So, it is an un-weighted code.

Decimal Excess 3
8421 Code Gray Code • We will get the Excess 3 code of a decimal number by adding three
Digit Code
(0011) to the binary equivalent of that decimal number. Hence, it is
0 0000 0011 0000 called as Excess 3 code.
• It is a self-complementing code.
1 0001 0100 0001

2 0010 0101 0011 Example: Let us find the Excess 3 equivalent of the decimal number 786. This
number has 3 decimal digits 7, 8 and 6. From the table, we can write the
3 0011 0110 0010 Excess 3 codes of 7, 8 and 6 are 1010, 1011 and 1001 respectively. Therefore,
the Excess 3 equivalent of the decimal number 786 is 101010111001.
4 0100 0111 0110
Gray Code
5 0101 1000 0111

6 0110 1001 0101 • This code doesn’t have any weights. So, it is an un-weighted code.
• In the above table, the successive Gray codes are differed in one bit
7 0111 1010 0100 position only. Hence, this code is called as unit distance code.
• Gray codes are used in rotary and optical encoders, Karnaugh maps, and
8 1000 1011 1100 error detection.
9 1001 1100 1101
[Students are advised to refer the numerical problems discussed in class room for
understanding the various conversion methods. ]
8 4 2 1 code
ASCII Code:
• The weights of this code are 8, 4, 2 and 1.
• This code has all positive weights. So, it is a positively weighted code. ASCII is an acronym for American Standard Code for Information Interchange.
• This code is also called as natural BCD (Binary Coded Decimal) code.
It is a code that uses numbers to represent characters. Each letter is assigned a
Example: Let us find the BCD equivalent of the decimal number 786. This number between 0 and 127. A upper and lower case character are assigned
number has 3 decimal digits 7, 8 and 6. From the table, we can write the BCD different numbers. For example the character A is assigned the decimal
(8421) codes of 7, 8 and 6 are 0111, 1000 and 0110 respectively. number 65, while a is assigned decimal 97 as shown below int the ASCII table.

∴ (786)10 = (011110000110)BCD When a computer sends data the keys you press or the text you send and
receive is sent as a bunch of numbers. These numbers represent the
There are 12 bits in BCD representation, since each BCD code of decimal digit characters you typed or generated. Because the range of standard ASCII is 0 to
has 4 bits. 127 it only requires 7 bits or 1 byte of data.

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EBCDIC : Binary Subtraction

Extended binary coded decimal interchange code (EBCDIC) is an 8-bit binary Subtraction and Borrow, these two words will be used very frequently for the
code for numeric and alphanumeric characters. It was developed and used by binary subtraction. There are four rules of binary subtraction.
IBM. It is a coding representation in which symbols, letters and numbers are
presented in binary language. The main difference between ASCII and EBCDIC
is that the ASCII uses seven bits to represent a character while the EBCDIC uses
eight bits to represent a character.

Binary Arithmetic

Binary arithmetic is essential part of all the digital computers and much other
digital system.
Example − Subtraction
Binary Addition

It is a key for binary subtraction, multiplication, division. There are four rules of
binary addition.

Binary Multiplication

Binary multiplication is similar to decimal multiplication. It is simpler than

decimal multiplication because only 0s and 1s are involved. There are four
rules of binary multiplication.
In fourth case, a binary addition is creating a sum of (1 + 1 = 10) i.e. 0 is written
in the given column and a carry of 1 over to the next column.

Example − Addition

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Example − Multiplication 1's complement

The 1's complement of a number is found by changing all 1's to 0's and all 0's
to 1's. This is called as taking complement or 1's complement. Example of 1's
Complement is as follows.

Binary Division 2's complement

Binary division is similar to decimal division. It is called as the long division The 2's complement of binary number is obtained by adding 1 to the Least
procedure. Significant Bit (LSB) of 1's complement of the number.

Example − Division 2's complement = 1's complement + 1

Example of 2's Complement is as follows.

1’s and 2’s Compliment

As the binary system has base r = 2. So the two types of complements for the
binary system are 2's complement and 1's complement.

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Subtraction using 1s complement • There is always a time delay between an input being applied and the
output responding.
For subtracting a smaller number from a larger number, the 1s complement
method is as follows: Digital systems are said to be constructed by using three basic logic gates.
These gates are the AND gate, OR gate and NOT gate. There also exists other
1. Determine the 1s complement of the smaller number.
logical gates, like the NAND, and the EOR gates. We will only be looking at the
2. Add the 1s complement to the larger number.
3. Remove the final carry and add it to the result. This is called the end- first three gates. The basic operations are described below.
around carry.

Subtracting using 2s complement

For subtracting a smaller number from a larger number, the 2s complement

method is as follows:

1. Determine the 2s complement of the smaller number.

2. Add the 2s complement to the larger number.
3. Discard the final carry (there is always one in this case)

Boolean Algebra

Boolean Algebra is an algebra, which deals with binary numbers & binary
variables. Hence, it is also called as Binary Algebra or logical Algebra. A
mathematician, named George Boole had developed this algebra in 1854. The
variables used in this algebra are also called as Boolean variables.

The range of voltages corresponding to Logic ‘High’ is represented with ‘1’ and
the range of voltages corresponding to logic ‘Low’ is represented with ‘0’.

Basic Logic Gates

Boolean functions may be practically implemented by using electronic gates.

The following points are important to understand.
• Electronic gates require a power supply.
• Gate INPUTS are driven by voltages having two nominal values, e.g. 0V
and 5V representing logic 0 and logic 1 respectively.
• The OUTPUT of a gate provides two nominal values of voltage only, e.g.
0V and 5V representing logic 0 and logic 1 respectively.

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Universal Property of NAND and NOR gates Universal Property of NOR gate:

“Both NAND and NOR gates are also called Universal gates because, it can be
used to produce all other gates. “

NAND as other gates:

NOT Gate: Shorting the inputs will make it a NOT gate.

NAND as NOR gate: NOR as XNOR

NAND as EXOR gate:

Demorgans’ Theorems

DeMorgan’s Theorem is mainly used to solve the various Boolean algebra

expressions. It is used for implementing the basic gate operation likes NAND
gate and NOR gate. There are two DeMorgan’s Theorems. They are described
below in detail.

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Theorem 1: 2. Identity Law – A term OR´ed with a “0” or AND´ed with a “1” will always
equal that term.
The compliment of the sum of two or more variables is equal to the product of A + 0 = A A variable OR’ed with 0 is always equal to the variable
the individual variables. A . 1 = A A variable AND’ed with 1 is always equal to the variable

3. Idempotent Law – An input that is AND´ed or OR´ed with itself is equal to

that input
A + A = A A variable OR’ed with itself is always equal to the variable
Theorem 2: A . A = A A variable AND’ed with itself is always equal to the variable

The compliment of the product of two or more variables is equal to the sum of 4. Complement Law – A term AND´ed with its complement equals “0” and a
the individual variables. term OR´ed with its complement equals “1”
A . A’ = 0 A variable AND’ed with its complement is always equal to 0
A + A’ = 1 A variable OR’ed with its complement is always equal to 1

5. Commutative Law – The order of application of two separate terms is not

Circuit implementation of Demorgan’s theorem: important.
A . B = B . A The order in which two variables are AND’ed makes no
difference
A + B = B + A The order in which two variables are OR’ed makes no
difference.

6. Double Negation Law – A term that is inverted twice is equal to the original
term
(A’)’= A Double complement of a variable is always equal to the variable.

Boolean Boolean Algebra

Expression Law or Rule
A+1=1 Annulment
A+0=A Identity
A.1=A Identity
Basic Laws of Boolean Algebra
A.0=0 Annulment
1. Annulment Law – A term AND´ed with a “0” equals 0 or OR´ed with a “1” A+A=A Idempotent
will equal 1.
A.A=A Idempotent
A . 0 = 0 A variable AND’ed with 0 is always equal to 0
A + 1 = 1 A variable OR’ed with 1 is always equal to 1 NOT A = A Double Negation

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 A+A=1 Complement A B F Minterm
A.A=0 Complement
0 0 0 A'B'
A+B = B+A Commutative
A.B = B.A Commutative 0 1 1 A'B

Canonical Expression 1 0 1 AB'

There are two forms of canonical expression. 1 1 1 AB

1. Sum of Products (SOP)

2. Product of Sums (POS)
To get the desired canonical SOP expression we will add the minterms
(product terms) for which the output is 1.
Sum of Products (SOP)
F = A’B + AB’ + AB
A Boolean expression consisting purely of Minterms (product terms) is said to
be in canonical sum of products form. Converting Sum of Products (SOP) to shorthand notation

Minterm and Maxterm:

From the previous example, we have F = A’B + AB’ + AB
A minterm l is a product (AND) of all variables in the function, in direct or
complemented form. A minterm has the property that it is equal to 1 on Now, lets say we want to express the SOP using shorthand notation.
exactly one row of the truth table.
First we need to denote the minterms in shorthand notation.
A maxterm is a sum (OR) of all the variables in the function, in direct or
complemented form. A maxterm has the property that it is equal to 0 on
A’B = (01) = m1
exactly one row of the truth table.
AB’ = (10) = m2
AB = (11) = m3
Example:
Lets say, we have a boolean function F defined on two variables A and B. So, A
We saw the conversion of SOP to shorthand notation. Lets check the
and B are the inputs for F.
conversion of shorthand notation to SOP.
Now we will create a column for the Minterm using the variables A and B. If
Converting shorthand notation to Sum of Products (SOP)
input is 0 we take the complement of the variable and if input is 1 we take the
variable as it is.
We have F = ∑(1, 2, 3)
Our task is to get the SOP.

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 F = ∑(1, 2, 3) = m1 + m2 + m3 = 01 + 10 + 11 F = (A+B) . (A’+B’)

Now, lets say we want to express the POS using shorthand notation.
To convert from shorthand notation to SOP we follow the given rules. If the
we have F = (A+B) . (A’+B’)
variable is 1 then it is taken "as is" and if the variable is 0 then we take its
First we need to denote the maxterms in shorthand notation.
"complement".
A+B = (00)2 = M0
F = ∑(1, 2, 3)
A’+B’ = (11)2 = M3
= A’B + AB’ + AB
Now we express F using shorthand notation.
This is the required SOP.
F = M0 . M3 . This can also be written as F = ∏(0, 3).
Product of Sums (POS) This is the conversion of POS to shorthand notation.

A Boolean expression consisting purely of Maxterms (sum terms) is said to be Converting shorthand notation to Product of Sums (POS)
in canonical product of sums form.
Lets say, we have a Boolean function F defined on two variables A and B so, A
Example: and B are the inputs for F and lets say, the maxterm are expressed as
Lets say, we have a boolean function F defined on two variables A and B. So, A shorthand notation given below.
and B are the inputs for F.
F = ∏(1, 2, 3)
Now we will create a column for the maxterm using the variables A and B. If
input is 1 we take the complement of the variable and if input is 0 we take the Our task is to get the POS.
variable as it is.
F has two input variables A and B and output of F = 0 for M1, M2 and M3 i.e.,
2nd, 3rd and 4th combination.
A B F Maxterm
We have, F = ∏(1, 2, 3) = M1 . M2 . M3 = 01 . 10 . 11
0 0 0 A+B
To convert from shorthand notation to POS we follow the given rules. If the
0 1 1 A + B' variable is 0 then it is taken as is and if the variable is 1 then we take its
complement.
1 0 1 A' + B
we have, F = ∏(1, 2, 3) = (A+B’) . (A’+B) . (A’+B’)
1 1 0 A' + B'
Thus we got the required POS.

To get the desired canonical POS expression we will multiply the maxterms
(sum terms) for which the output is 0.
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Simplification of Boolean expression Or, F(A,B,C)=A.A+A.C+B.A+B.C [Applying distributive Rule]
= A+A.C+B.A+B.C [Applying Idempotent Law]
• Simplification of Boolean expression will reduce the number of gates in
the circuit. =A(1+C)+B.A+B.C [Applying distributive Law]
• This will reduce the cost of circuit construction. =A+B.A+B.C [Applying dominance Law]
=(A+1).A+B.C [Applying distributive Law]
In this approach, one Boolean expression is minimized into an equivalent Or, F(A,B,C)=1.A+B.C [Applying dominance Law]
expression by applying Boolean identities.
Or, F(A,B,C)=A+B.C [Applying dominance Law]
Problem 1: So, F(A,B,C)=A+BC is the minimized form.
Minimize the following Boolean expression using Boolean identities −
F(A,B,C)=A′B+BC′+BC+AB′C′
Karnaugh Map (K Map)
Solution:
Given,F(A,B,C)=A′B+BC′+BC+AB′C′ Using Boolean algebra to simplify Boolean expressions can be difficult and may
lead to solutions which, though they appear minimal, are not. The Karnaugh
=A′B+(BC′+BC′)+BC+AB′C′ [By idempotent law, BC’ = BC’ + BC’]
map provides a simple and straight-forward method of minimising boolean
Or,F(A,B,C)=A′B+(BC′+BC)+(BC′+AB′C′) expressions which represent combinational logic circuits. A Karnaugh map is a
=A′B+B(C′+C)+C′(B+AB′) [By distributive laws] pictorial method of grouping together expressions with common factors and
Or,F(A,B,C)=A′B+B.1+C′(B+A) then eliminating unwanted variables.
[ (C' + C) = 1 and absorption law (B + AB')= (B + A)]
Or,F(A,B,C)=A′B+B+C′(B+A) [ B.1 = B ] A Karnaugh map is a two-dimensional truth-table. Note that the squares are
numbered so that the binary representations for the numbers of two adjacent
=B(A′+1)+C′(B+A)
squares differ in exactly one position.
=B.1+C′(B+A) [ (A' + 1) = 1 ]
=B+C′(B+A) [ As, B.1 = B ] Rules for Grouping together adjacent cells containing 1's
=B+BC′+AC′ =B(1+C′)+AC′
=B.1+AC′ [As, (1 + C') = 1] • Groups must contain 1, 2, 4, 8, 16 (2n) cells.
• Groups must contain only 1 (and X if don't care is allowed). „
=B+AC′ [As, B.1 = B]
• Groups may be horizontal or vertical, but not diagonal.
So,F(A,B,C)=B+AC′ is the minimized form. • Groups should be as large as possible.
• Each cell containing a 1 must be in at least one group.
Problem 2 • Groups may overlap.
Minimize the following Boolean expression using Boolean identities − • Groups may wrap around the table. The leftmost cell in a row may be
grouped with the rightmost cell and the top cell in a column may be
F(A,B,C)=(A+B)(A+C)
grouped with the bottom cell.
Solution: • There should be as few groups as possible.
Given, F(A,B,C)=(A+B)(A+C)

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Obtaining Product Terms 4 Variable K-Map

• If A is a variable that has value 0 in all of the squares in the grouping, The number of cells in 4 variable K-map is sixteen, since the number of
then the complemented form A is in the product term. „ variables is four. The following figure shows 4 variable K-Map.
• If A is a variable that has value 1 in all of the squares in the grouping,
then the true form A is in the product term.
• If A is a variable that has value 0 for some squares in the grouping and
value 1 for others, then it is not in the product term.

2 Variable K-Map

The number of cells in 2 variable K-map is four, since the number of variables
is two. The following figure shows 2 variable K-Map.

Problem:
Minimize the following Boolean expression using K-map −
F(A,B,C)=A′BC+A′BC′+AB′C′+AB′C
Solution
Each term is put into k-map and we get the following −

• There is only one possibility of grouping 4 adjacent min terms.

• The possible combinations of grouping 2 adjacent min terms are {(m0,
m1), (m2, m3), (m0, m2) and (m1, m3)}.

3 Variable K-Map

The number of cells in 3 variable K-map is eight, since the number of variables
Now we will group the cells of 1 according to the rules stated above −
is three. The following figure shows 3 variable K-Map.

We have got two groups which are termed as A′B

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and AB′. Hence, F(A,B,C)=A′B+AB′=A⊕B. It is the minimized form. • It is not suitable for computer reduction.
• It is not suitable when the number of variables involved exceed four.
• Care must be taken to field in every cell with the relevant entry, such
Don’t Care Condition
as a 0, 1 (or) don't care terms.
If any cell of a K map doesn’t assign any value, ie, neither 0 nor 1, then we can
[ Please refer class room works for problem solving using K Mapping and
assign it a variable ‘x’. We can assign 1 to x for grouping. This will help in
SOP forms]
reduction of expression.
******

Advantages and disadvantages of K-map

Advantages:

• Minimizes boolean expressions without the need using various

boolean theorems & computations.
• Minimizes number of Logical gates used.

Disadvantages:

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 MODULE 2

Logic Families and Combinational Logic Circuits
2.1.0 To comprehend the various logic families
2.1.1 To state various scales of Integration- SSI, MSI, LSI, VLSI and ULSI
2.1.2 To explain the circuit of TTL inverter
2.1.3 To define the terms VIL, VIH, VOL, VOH, Noise margin, noise immunity,
propagation delay, fan- in and fan-out
2.1.4 To explain the working principle of CMOS NAND gate
2.1.5 To list the features of CMOS logic family
2.1.6 To list the features of ECL logic family
2.1.7 To compare TTL, ECL and CMOS logic families with respect to current
sourcing and current sinking, fan in, fan-out and power dissipation
2.2.0 To understand the combinational logic circuits
2.2.1 To describe combinational logic circuits
2.2.2 To design half adder, full adder, half subtractor, and full subtractor
2.2.3 To explain parallel adder
2.2.4 To explain the operation of 4x1 Multiplexer and 1x4 De-multiplexer
2.2.5 To list the various applications of Multiplexers and De-multiplexers
2.2.6 To explain the operation of 3 bit encoder
2.2.7 To explain various decoders such as BCD to decimal, binary to gray code and
gray to binary.
1.3 Integrated Circuit(IC)
1.3.2 Categories of Integrated Circuits
1. SSI(Small Scale Integration Device)
It contains several independent gates in a single package. The
inputs and outputs of gates are connected directly to the pins in
the package. The number of gates is usually less than 10.
2. MSI(Medium Scale Integration Device)
It contains 10 to 200 gates in a single package. They perform
elementary digital functions such as decoders, adders, registers.
3. LSI(Large Scale Integration Device)
It contains gates between 200 to few thousand in a single
package. They include digital systems such as processors,
memory chips etc.
4. VLSI(Very Large Scale Integration Device)
It contains thousands of gates within a single package such as
microcomputer chip.
5. ULSI(Ultra Large Scale Integration Device)

Complex digital circuits are constructed with integrated circuits. IC is a It contains hundred of thousands of gates within a single package
small silicon semiconductor crystal, called a chip, containing the such as microcomputer chip.
electronic components for the digital gates. The various gates are
interconnected inside the chip to form the required circuit. The chip is
mounted in a ceramic or plastic container and the connections are welded
to the external pins to form an IC. The number of pins of IC vary from
14 to several thousand. Each pin is identified by a unique number printed
on its body.

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