Reymond John S.

Cerillo BSELT 3A-1

EY 35 Logic Design & Switching Theory

Edge-Triggered Flip-Flops

Exercises

1. using the input waveform of figure 4.10, determine the Q and Q output waveform for
the D flip-flop. Assume Q initially high.

Q
t
Output

Output
t
Reymond John S. Cerillo BSELT 3A-1

2. using the input waveform of figure 4.12, determine the Q and Q output waveform for
the JK flip-flop. Assume Q initially low.

Output
t
𝑄
t
Output