壓控振盪器設計

李健榮 助理教授
國立臺北科技大學電子工程系
Department of Electronic Engineering
National Taipei University of Technology
Outline
• Resonator
• Feedback, Two-port Reflection, and Negative Resistance
• Feedback Loop Analysis
• Amplifier Configurations
• Capacitor Ration with Colpitts Oscillators
• ADS Simulation Tips
• Phase Noise and Lesson’s Model
• Summary

2/60 Department of Electronic Engineering, NTUT

Introduction
• An oscillator is a circuit that generates a periodic waveform.
• Oscillators are used with applications in which a reference
tone is required. In most RF applications, sinusoidal references
with a high degree of spectral purity (low phase noise) are
required.

I t 
I t  Low Noise Amplifier
Antenna (LNA) LPF
sm  t 
Processor
Baseband

Processor
Baseband
cos c t cos c t
90o 90 o

Power Amplifier
(PA) LPF
Q t  Q t 

3/60 Department of Electronic Engineering, NTUT

LC Resonator
• An LC resonator determines the oscillation frequency and
often forms part of the feedback mechanism.

If ii (t)
t  =I pulsed  t  (is applied to the parallel
Ipulsed
resonator, the system time response:
L C R
t
2 I pulse e 2 RC   1 1  
vout  t   cos    2 2  t
C   LC 4 R C   vout  t 

Amplitude
1 1 1
osc   2 2 osc 
LC 4 R C R LC
i t 

Time

4/60 Department of Electronic Engineering, NTUT

Adding Negative Resistance Through Feedback

• In any practical circuit, oscillations will die away unless

feedback is added to generate a negative resistance in order to
sustain the oscillation.

Parallel RLC Resonator Series RLC Resonator

L C rs

L C Rp  Rn rn

feedback feedback
active device active device

5/60 Department of Electronic Engineering, NTUT

Design Method: Feedback System
• The oscillator can be seen as a linear feedback system.
• The gain of the system:
Vin  s  Vout  s 

G s
Vout  s  G s

Vin  s  1  G  s  H  s  
H s

• Barkhausen’s Criterion:
For sustained oscillation at constant amplitude, the poles must be on the jω axis

G  j  H  j   1 G  j  H  j   1 and G  j  H  j   2n

which states that the open-loop gain around the loop is 1 and the phase around the
loop is 0 or some multiple of 2π.

• To find the poles of the closed-loop system, one can equate this
expression to zero, as in 1  G  s  H  s   0 .

6/60 Department of Electronic Engineering, NTUT

Design Method: Two-port Reflection
• Two-port Reflection
G  S11'  1 Sine the resonator is passive, thus G  1

 L  S22
'
1

If the two-port network is oscillating at one port, it must be simultaneously

oscillating at the other port.

7/60 Department of Electronic Engineering, NTUT

Design Method: Negative Resistance
• One-port Negative Resistance:
R    RD    0

X    X D    0

Z  j   R    jX  

Z D  j   RD    jX D  

8/60 Department of Electronic Engineering, NTUT

Current Limiting
• If the overall resistance is negative, then the oscillation
amplitude will continue to grow indefinitely. In a practical
circuit, this is, of course, not possible.
• Current limiting (power rails, or nonlinearity) eventually limits
the oscillating magnitude to some finite value effect of the
negative resistance in the circuit until the losses are just
canceled, which is equivalent to reducing the loop gain to 1.
v

growth
limited

9/60 Department of Electronic Engineering, NTUT

Implementations of Feedback
• Feedback (or Gm ) is usually provided in one of three ways:
 Colpitts oscillator:
Using a tapped capacitor and amplifier to form a feedback loop
 Hartley oscillator:
Using a tapped inductor and amplifier to form a feedback loop
 Gm oscillator:
Using two amplifiers in a positive feedback configuration

buffer

G G
L
amplifier amplifier
G
amplifier

10/60 Department of Electronic Engineering, NTUT

Common Oscillator Configurations
C C

Colpitts L3 ic Hartley C3 ic
ib ib
B C2 B L2

C1 L1

E E

C C

Clapp Siler L3
L3 ic ic
ib ib
B C2 B C2

C1 C1

E E

11/60 Department of Electronic Engineering, NTUT

Amplifier Configuration (Colpitts or –Gm)

• The Gm oscillator has either

 A CC amplifier made up of Q2 , and Q1 forms feedback
 A CB amplifier consisting of Q1, and Q2 forms feedback

• Colpitts and Hartley oscillators can be made either CB or CC.

Q1
C L C1 Q1
C1 L
Q2 L
Q1 CC C2
C2
CB

Gm Oscillator CB Colpitts CC Colpitts

12/60 Department of Electronic Engineering, NTUT

Loop Analysis (I)
• Loop analysis gives information about the oscillator :
(1) Determine the frequency of oscillation
(2) The amount of gain required to start the oscillation
 1 1 
At the collector, vc    sC1   ve  sC1  g m   0  1 1
 R  sL  sC1  sC1  g m 

R 
 p sL    c   0
v
 p
   0
1 v
 1   sC1 sC1  sC2    e   
At the emitter, ve  sC1  sC2    vc sC1  0  re 
 re 

vc vc

C1 Q1 C1
ve L Rp L ve ic  g m ve
C2 C2 re

Common base

13/60 Department of Electronic Engineering, NTUT

Loop Analysis (II)
• The conditions for oscillation:
 1 1  1
   sC1   sC1  sC2    sC1  sC1  g m   0

 R p sL  re 

 L  C1  C2  LC1   L  1 Tells us what value of gm

s LC1C2  s 
3 2
  LC1 g m   s   C1  C2    0
  (and corresponding value
 Rp re   R p re  re of re) will result in
sustained oscillation. For
 C1  C2  1 1 Rp   C1  C2  a real oscillator gm would
    , QL  , and gm 
 C1C2  L re R p C1C2 L L QL have to be made larger
than this value to
02 L L 1 1
overcome any additional
   2
 0 1   0 1  losses not properly
re R p  C1  C2  R p  re  C1  C2  QL  conr
0

modeled.

where ωconr is the corner frequency of the HPF formed

by the capacitive feedback divider.

14/60 Department of Electronic Engineering, NTUT

Capacitor Ratios with Colpitts (I)
vc
• The capacitive divider (C1 ,
C1
C2 , and re) affects oscillation
L Rp ve
frequency and feedback gain,
C2 re
which acts like a HPF.
  
j
ve jreC1  C1   cor 
    Gain
vc 1  jre  C1  C2   C1  C2   1  j  
 cor  C1
  A0
C1  C2
C1 1
A0  cor 
C1  C2 re  C1  C2 
 
  tan 1   cor Frequency
2  c  Phase

If the frequency of operation is well 90o

above the corner frequency ωcor , the
gain is given by the capacitor ratio
0o
and the phase shift is zero.
cor Frequency

15/60 Department of Electronic Engineering, NTUT

Capacitor Ratios with Colpitts (II)
• re is transformed to a higher value through the capacitor
divider, which effectively prevents this low impedance from
reducing the Q of the LC resonator.
2
 C  (make C2 large and C1 small to get the maximum
re,tank  1  2  re
effect of the impedance transformation)
 C1 

• The resulting transformed circuit as seen by the tank

vc

C1 1 C1  C2
L Rp re,tank  
LCT LC1C2
C2

16/60 Department of Electronic Engineering, NTUT

Negative Resistance
• Negative resistance of CB Colpitts oscillator
v
ii  g m v  jC2v 
re
ii
1 i i  g m v
where gm ; , v  i , and vce  i
re jC2 jC1  
vce C1
 1  g mii 
vce    ii   
 jC1  jC2  vi  g m v
v C2 re
• Input impedance:  

vi v  vce 1 1 g
Zi      2 m
ii ii jC1 jC2  C1C2

This is just a negative resistor in series with the two capacitors.

gm
• A necessary condition for oscillation: rs 
 2C1C2
where rs is the equivalent series resistance on the resonator.

17/60 Department of Electronic Engineering, NTUT

Negative Resistance for Series/Parallel Circuits

• Since the resonance is actually a parallel one, the series

components need to be converted back to parallel ones.
• However, if the equivalent Q of the RC circuit is high, the
parallel capacitor Cp will be approximately equal to the series
capacitor Cs , and the above analysis is valid. Even for low Q,
these simple equations are useful for quick calculations.

vc rs Rneg
C1
Rp L vx L CT
g m vx
C2 re

18/60 Department of Electronic Engineering, NTUT

Example
• Assume L = 10 nH, Rp = 300 Ω, C1 = 2.5 pF, C2 = 10 pF, and
the transistor is operating at 1 mA, or re = 25 Ω and gm = 0.04.
Using negative resistance, determine the oscillator resonant
frequency and apparent frequency shift.
1 1
CT  2 pF    7.07 Grad/s f 0  1.1254 GHz
LCT 10 nH  2 pF
gm 0.04
rs     32  ( |negative resistance| > original resistance,
 C1C2  7.07107 Grad/s   2 pF 10 pF
2 2
the oscillator should start up successfully)
1 1
Q   2.2097
 rs CT 7.07107 Grad/s  32  2 pF

rpar  rs 1  Q 2   32 1  2.2097 2   188 

Cs 2 pF
Cpar    1.66 pF
1 1  1 2.2097 2 
1 2
Q This is a frequency of 1.2353 GHz, which is close
1 1
   7.7615 Grad/s to a 10% change in frequency. Further refinement
LCpar 10 nH 1.66 pF should come from a simulator.
19/60 Department of Electronic Engineering, NTUT
Negative Resistance of Gm Oscillator
• Assume that both transistors are biased identically, then gm1 =
gm2 , re1 = re2 , vπ1 = vπ2 , and solve for Zi = vi /ii .
vi
ii   g m1v 1  g m 2 v 2
re1  re 2 ii

• Input impedance: 
v 2 re 2

2 vi g m1v 1 g m 2 v 2
Zi  
gm v 1 re1
 
• Necessary condition for oscillation:
2
gm 
Rp
where Rp is the equivalent parallel resistance of the resonator.

20/60 Department of Electronic Engineering, NTUT

Minimum Current for Oscillation (I)
• Using a 5-nH inductor with Q = 5 and assuming no other
loading on the resonator, determine the minimum current
required to start the oscillations of 3 GHz if a Colpitts
oscillator is used or if a –Gm oscillator is used.
1 1 C1C2 C1Ctot
Ctot    562.9 fF Ctot  C2 
osc  2  3 GHz   5 nH C1  C2 C1  Ctot
2 2
L
gm gm gm
rneg   
 2C1C2  2C1Ctot  2C12

 To find the minimum current, we find the maximum rneg by taking the
derivative with respect to C1.
drneg  gm 2 gm
  0 C1  2Ctot
dC1  2C12Ctot  2C13

The maximum obtainable negative resistance is achieved when the two capacitors
are equal in value, C1 = C2 = 1.1258 pF, and twice the Ctot.

21/60 Department of Electronic Engineering, NTUT

Minimum Current for Oscillation (II)
 Now the loss in the resonator at 3 GHz is due to the finite Q of the inductor.
The series resistance of the inductor is

rs 
L

 2  3 GHz   5 nH  18.85 
Q 5

 Therefore, rneg = rs = 18.85 Ω. Noting that gm = Ic /vT ,

I C   2C1C2 vT rneg   2  3 GHz   1.1258 pF   25 mV 18.85   212.2  A

2 2

 In Gm oscillator, there is no capacitor ratio to consider. The parallel

resistance of the inductor is
R p   LQ   2  3 GHz   5 nH  5=471.2 

g m  I C vT I C  2vT R p  2  25 mV 471.2   106.1  A

A Gm oscillator can start with half as much collector current in each transistor as a Colpitts
oscillator under the same loading conditions.

22/60 Department of Electronic Engineering, NTUT

Basic Differential Topologies
• Take two single-ended oscillators and place them back to back.

VCC VCC
VCC VCC

L L
Q1 Q2
L C
C1 Q1 Q2 C1

Vbias C1 C1 Q1 Q2

C2 2 C2 2
I bias I bias I bias
I bias I bias

Copitts CB Copitts CC Gm

23/60 Department of Electronic Engineering, NTUT

Modified CC Colpitts with Buffering
• Oscillators are usually buffered (use emitter follower) in order
to drive a low impedance. Any load that is a significant
fraction of the Rp of the oscillator would lower the output
swing and increase the phase noise. V CC V CC

• CC oscillator is modified slightly by

RL RL
placing resistors in the collector.
The output is then taken from the Q1 Q2
collector. Since this is a high- L
impedance node, the resonator is C1 C1

isolated from the load. However, the

addition of these resistors will also C2 2
reduce the headroom available to I bias I bias

the oscillator.
24/60 Department of Electronic Engineering, NTUT
Several Refinements to the Gm Topology (I)

VCC

L
• Decouple the base from the collector with
C capacitors to get larger swings.
Ccp Ccp • The bases have to be biased separately.
Q1 Q2 • Rbias have to be made large to prevent loss
Rbias Rbias of signal at the base. However, these
Vbias Vbias resistors can be a substantial source of
noise.
I bias

25/60 Department of Electronic Engineering, NTUT

Several Refinements to the Gm Topology (II)

VCC
• Use a transformer to decouple the collectors
Lp from the bases.
• Since the bias can be applied through the
C
Ls
center tap, no need for the RF blocking.
Q1 Q2 • A turns ratio of greater than unity is chosen,
Vbias there is the added advantage that the swing
on the base can be much smaller than the
I bias swing on the collector to prevent transistor
saturation.

26/60 Department of Electronic Engineering, NTUT

Several Refinements to the Gm Topology (III)

VCC
• Since the tail resistor is not a high
impedance source, the bias current will
L
vary dynamically over the cycle of the
oscillation (highest when voltage peaks
C and lowest during the zero crossings).
Ccp Ccp
• Since the oscillator is most sensitive to
Q1 Q2 phase noise during the zero crossings, this
Rbias Rbias oscillator can often give very good phase
Vbias Vbias noise performance.
Amplitude
Rtail
ic1  t  ic 2  t 

I AVE
I dc
Time

27/60 Department of Electronic Engineering, NTUT

Several Refinements to the Gm Topology (IV)

VCC
• Using a noise filter in the tail can lead to a
very low-noise bias, thus low-phase-noise
C
designs.
Ccp Ccp • Another advantage is that, before startup,
Q1 Q2
the transistor Q3 can be biased in
saturation, because during startup the 2nd
Rbias Rbias
harmonic will cause a dc bias shift at Q3
Vbias Vbias collector, pulling it out of saturation and
into the active region.
Ltail
• Since 2nd harmonic cannot pass through
Ltail, there is no ‘‘ringing’’ at Q3 collector,
Vbias Q3 Ctail
further reducing its headroom requirement.

28/60 Department of Electronic Engineering, NTUT

The Effect of Parasitics on the Frequency

• The first task in designing an oscillator is to set the frequency

of oscillation and hence set the value of the total inductance
and capacitance in the circuit.
• To increase output swing, it is usually desirable to make the
inductance as large as possible (this will also make the
oscillator less sensitive to parasitic resistance). However, it
should be noted that large monolithic inductors suffer from
limited Q. In addition, as the capacitors become smaller, their
value will be more sensitive to parasitics.

29/60 Department of Electronic Engineering, NTUT

Oscillating Frequency Summary

CB CC Gm

Q1
C1 Q1 C
C1 L
L Q2
L
C2 Q1
C2

1 1 1
osc  osc  osc 
 C C  C1C   C C  C2C   C 
L 1 2  C  L 1 2  C  L  2C    C 
 C1  C2  C   C1  C2  C   2 

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Voltage Controlled Oscillator (VCO)
• VCO is an oscillator of which frequency is controlled by a
tuning voltage.
• VCO is a simple frequency modulator

sosc  t 

Vtune f vco Vtune

Vtune
Vtune

31/60 Department of Electronic Engineering, NTUT

Making the Oscillator Tunable
• Varactors in a bipolar process can be realized using either the
base-collector or the base-emitter junctions or else using a
MOS varactor in BiCMOS processes.

VCC VCC
VCC VCC
L R L I bias
L
VCC RL RL
RB1
C var Cvar Q1 Q2
C1 Q1 Q2 C1 Rcon
L
RB 2
Vcon C1 C1
Vcon
Tuning port Q1 Q2
Cvar C var
CB CB
C var Cvar
Subs Subs
I bias I bias

32/60 Department of Electronic Engineering, NTUT

VCO Sensitivity and Tuning Linearity
• Frequency Range
• Frequency tuning characteristics
 Tuning sensitivity (Hz/V) : KV  f V
 Linearity

f vco

f max Ideal (perfect)

Piecewise good
f Piecewise good
f0
v Poor

f min Vtune
Vt ,min Vt ,0 Vt ,max

33/60 Department of Electronic Engineering, NTUT

Important Figures
• Output power (50 Ohm)
• Frequency stability: frequency drifting
• Source pushing and load pulling figures
• Harmonics
• Phase noise in frequency-domain (or Jitter in time-domain)

34/60 Department of Electronic Engineering, NTUT

Small-Signal Simulation – Use OscTest

• It is based on small-signal operation and only for prediction.

• When the simulation fails, try to reduce the value of Z in the
OscTest simulator (do not use 1 or 0, there would be a problem of
convergence, lower impedance values usually seem to work better) or to
reverse OscTest direction.
OscTest is a controller base on S-parameter
simulation to determine if the circuit oscillates.

Resonator OscTest Active Part

(include load network)

Varactor: Voltage-controlled capacitor

35/60 Department of Electronic Engineering, NTUT

Small-Signal Simulation – Oscillating Condition

• S(1,1) is the predicted loop gain by OscTest. By showing it on

the polar plot, you can find that the locus goes beyond the
circle with radius of 1 (S11>1)。
• The blue point is (1+j0), which is the target when steady
oscillating occurs.
Setup the dataset named: osc_test, and data
display named: osc_basics.
Show S(1,1) on m1
a Polar-plot S11 > 1 freq= 1.410GHz
S(1,1)=1.172 / 0.975

When the x-axis value of

m1
1.0 is circled by the
S(1,1)

-1.4 -1.2 -1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4

trace(because S11 > 1), it

means that the circuit
oscillates. This is the
purpose of the OscTest
freq (500.0MHz to 4.000GHz)
component.

36/60 Department of Electronic Engineering, NTUT

Small-Signal Simulation – Oscillating Condition

• S(1,1)=1 25o @885 MHz

• S(1,1) > 1 above 885 MHz
Possibility!
• S(1,1)=1.1 0o @1.445 GHz
• S(1,1)=1.08 6.6o @1.8 GHz (Target frequency)
m2 m3 m4 m5
f req=885.0MHz f req=3.982GHz f req=1.445GHz f req=1.795GHz
mag(S(1,1))=1.013 mag(S(1,1))=1.009 phase(S(1,1))=0.005 phase(S(1,1))=-6.604
1.3 40

1.2 30

1.1
20
m2 m3

phase(S(1,1))
mag(S(1,1))

1.0
10
0.9 m4
0.8
S11 > 1 above 880 MHz 0
m5
0.7
The device is unstable and -10

0.6
has a chance to oscillate. -20

0.5 -30
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0

freq, GHz freq, GHz

Around 1.8 GHz (Marker m5), the phase is not 0o, but this is OK at
this time. The harmonic-balance simulation will be performed later.
37/60 Department of Electronic Engineering, NTUT
Large-Signal Simulation
• Harmonic-Balance (HB)
OscPort

Enable the oscillation analysis

with “Use Oscport” method.

Oscport HB simulation
attempts to find the correct
oscillating frequency using
loop gain and current
(Barkhausen’s Criteria).

38/60 Department of Electronic Engineering, NTUT

Setting Up the Parameters
• V:
It is the initial voltage. Leave it when you don’t know the initial value, the HB will
run AC analysis to get that.
• NumOctaves:
The frequency range in which you want to search the oscillating condition. In this
example, Freq[1] = 1 GHz, and NumOctaves = 2. This means that the frequency
range is from 0.5 GHz to 2 GHz.
• Steps:
It is set to show how many points you like to run the prediction with in the range per
octave. In this example, the simulator use 20 points from 0.5 GHz to 2 GHz to search
the condition. If you are designing a high-Q oscillator, the step should be finer.
• FundIndex
FundIndex = 1 means that the oscillating frequency Freq[1] is found by OscPort
prediction, but not as your preset Freq[1] = 1.0 GHz. You should tell OscPort that
which frequency to predict by using the frequency index.
• HB Simulator Settings:
Usually, we use the order of harmonicas equal to 3, 7, 15, 31. When the DC term is
included, the data memory would be 4, 8, 16, 32, that are numbers by 2N and they are
good for computation. StatusLevel = 3 to show more information when the
simulation is running, and turn on the OscMode while the OscPortName is assigned
to the OscPort name.

39/60 Department of Electronic Engineering, NTUT

Simulated Results
• freq[1] is the oscillating frequency, which is 1.806 GHz in the
example.
• Use dBm( ) function to show the spectral values.
Fundamental Frequency (oscillation frequency)

Eqn loop_current=real(ICC.i[0])

Eqn osc_freq=freq[1]
loop_current osc_freq
-0.011 1.806E9

m6
harmindex=1
dBm(Vout)=7.318 Eqn harm_power=dBm(Vout[0::1::7])
10
10 m6
harmindex freq harm_power
0 0.0000 Hz <invalid> 0
0 1 1.806 GHz 7.318
2 3.611 GHz -2.208
3 5.417 GHz -17.501

dBm(Vout)
-10
4 7.222 GHz -17.061
dBm(Vout)

-10
5 9.028 GHz -27.317
6 10.83 GHz -27.815
7 12.64 GHz -35.340 -20
-20

-30
-30

-40
-40
0 2 4 6 8 10 12 14
0 1 2 3 4 5 6 7
freq, GHz
harmindex

Use dBm( ) to show the signal power Use plot_vs( )to show the signal
(Note: x-axis is “harmonic index”) power versus frequency.
(Note: x-axis is now “frequency”)

40/60 Department of Electronic Engineering, NTUT

Simulated Results
• Use ts( ) function to show the time-domain waveform
-200

ts(Vres), mV
-300
-400
-500
-600
-700

400
ts(VB), mV

200
0
-200
-400
-600

-200
ts(VE), mV

-300
-400
-500
-600
-700

1.0
ts(Vout), V

0.5

0.0

-0.5

-1.0
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2

time, nsec

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 Tuning Sensitivity: KV (MHz/V)
We already know the
oscillating frequency
is around 1.8 GHz by
previous simulation.

“Osc1”

Sweep the tuning

voltage of the varactor.

Pass the variable “Tune_Step” to dataset Plot oscillating frequency v.s. Tuning voltage

42/60 Department of Electronic Engineering, NTUT

Simulated Results

Oscillating frequency v.s. Tuning voltage Calculate tuning sensitivity from

makers m7 and m8
m7 m8
indep(m7)= 4.000 indep(m8)= 6.500
plot_vs(freq[1], Vtune)=1.806E9 plot_vs(freq[1], Vtune)=1.903E9 Eqn Tuning_Sensitivity_band=(m8-m7)/(indep(m8)-indep(m7))
2.10 Tuning_Sensitivity_band m7 m8
3.904E7 1.806E9 1.903E9
2.05

2.00
freq[1], GHz

1.95

1.90
m8 Eqn Tuning_Sensitivity=diff(freq[1])/Tune_Step[0] Calculate sensitivity by using
Eqn osc_freq=freq[1]
1.85

1.80
m7
Eqn f_pts=sweep_size(osc_freq)
diff() function.
1.75
Note: Since no “padding” with diff(),
Eqn tune_pts=sweep_size(Tuning_Sensitivity)
1.70
f_pts tune_pts
there will be 1 point less than freq[1]
0 1 2 3 4 5 6 7 8 9 10

Vtune
41 40 points.
1.8E8 1.8E8

1.6E8 1.6E8

1.4E8 1.4E8
Tuning_Sensitivity

Tuning_Sensitivity

1.2E8 1.2E8

1.0E8 1.0E8

8.0E7 8.0E7

6.0E7 6.0E7

4.0E7 4.0E7
0 1 2 3 4 5 6 7 8 9 10 1.70E9 1.75E9 1.80E9 1.85E9 1.90E9 1.95E9 2.00E9 2.05E9
Vtune osc_freq[0::1::(tune_pts-1)]

Sensitivity v.s. Vtune Sensitivity v.s. Frequency

43/60 Department of Electronic Engineering, NTUT

Over-tuned : Varactor Breakdown

m7 m8
Sweep Vtune up to 18 V indep(m7)= 4.000 indep(m8)= 12.000
plot_vs(freq[1], Vtune)=1.806E9 plot_vs(freq[1], Vtune)=2.134E9
2.2
m8
Maximum oscillating
2.1
frequency is 2.13 GHz
2.0

freq[1], GHz
1.9

m7
1.8

1.7

1.6
0 2 4 6 8 10 12 14 16 18

Vtune
The diode is breakdown
Diode = Varactor above 12 V (acts like a
resistor), it no longer acts
like a variable capacitor.

44/60 Department of Electronic Engineering, NTUT

Source Pushing
• Sweep the supply voltage from 5 V to 20 V with a 0.25 V step.

Change the supply voltage

Sweep the supply voltage “Vbias” from 5 V to to a variable “Vbias”
20 V while Vtune is now held constantly at 4 V.
(In practice, Vtune is set to a voltage that oscillator oscillates
at “target” center frequency.)

45/60 Department of Electronic Engineering, NTUT

Simulated Results
• Source pushing is measured around the normal supply voltage
(12 V in this example). This example shows that the source
pushing figure is 21.77 MHz/V.
m10 m9
indep(m10)= 11.000 indep(m9)= 13.000
plot_vs(freq[1], Vbias)=1.781E9 plot_vs(freq[1], Vbias)=1.825E9
2.0
m10 m9
Plot freq[1] v.s. Vbias to
1.5 show the source pushing
results. Here, use makers
freq[1], GHz

1.0
and equations to calculate
the pushing figure around
0.5
Vbias = 12 V. As we can see,
0.0 this oscillator has the source
4 6 8 10 12

Vbias
14 16 18 20
pushing figure equals to
Eqn Source_pushing=(m9-m10)/(indep(m9)-indep(m10))
21.77 MHz/V.
Source_pushing
2.177E7

46/60 Department of Electronic Engineering, NTUT

Load Pulling
• Frequency pulling figure illustrates the frequency variation
subjection to load impedance (normally, the load impedance is
50 Ω).
Sweep load for different constant VSWR circles in Smith chart.

vw1: VSWR sweep start

vw2: VSWR sweep stop
nvw: num. of VSWR sweep

real part of load

sweep load
Image part of load

Save these variables in dataset

47/60 Department of Electronic Engineering, NTUT

 Load Pulling
• Move maker m12 to change VSWR. In this example, we
observed the frequency variation corresponding to VSWR=1.2.
• Find the peak frequency change to 1.806 GHz (df_peak).
Frequency variations
use @VSWR in the text to show the number
Frequency variation for VSWR = 1.20 Eqn refl=rload+j*iload
1.8400G Eqn vswr_k=(nvw[0,0]-1)*(indep(m12)-vw1[0,0])/(vw2[0,0]-vw1[0,0]) Write down these equations for load pulling figure measurement
Eqn VSWR=vswr_k*(vw2[0,0]-vw1[0,0])/(nvw[0,0]-1)+(vw1[0,0])
1.8300G
Eqn LoadRefl=mag(refl[::,1])
@certain VSWR value. (You can change VSWR by scrolling marker m12)
freq[vswr_k,::,1], Hz

1.8200G
Eqn df_peak=max(abs(freq[vswr_k,::,1]-1.806e9))
1.8100G Eqn refl=rload+j*iload
m12
indep(m12)= 1.200
1.8000G vs([0::sweep_size(VSWRval)-1],VSWRval)=2.000 Load Pulling Figure @ VSRW=1.200 Eqn vswr_k=(nvw[0,0]-1)*(indep(m12)-vw1[0,0])/(vw2[0,0]-vw1[0,0])
df_peak
1.7900G
m12 3.202E7
Eqn VSWR=vswr_k*(vw2[0,0]-vw1[0,0])/(nvw[0,0]-1)+(vw1[0,0])
1.7800G
1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0
1.7700G VSWR Eqn LoadRefl=mag(refl[::,1])
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
phi ( *pi radians) Eqn df_peak=max(abs(freq[vswr_k,::,1]-1.806e9)) Find peak frequency that deviates
from center frequency 1.086 GHz.
m12
0.90 indep(m12)=1.200
vs([0::sweep_size(VSWRval)-1],VSWRval)=2.000 Load Pulling Figure @ VSRW=1.200
0.85
df_peak
mag(Vout[vswr_k,::,1])

refl[vswr_k,::]

0.80 3.202E7
m12
0.75
1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0
0.70
VSWR
0.65

0.60
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
phi ( *pi radians) phi (0.000 to 2.000)

Vout amplitude variations Constant VSWR circle

48/60 Department of Electronic Engineering, NTUT

Oscillator Phase Noise
Time Domain Frequency Domain

Vf
v t  1
f1

f
f1

Vf
v t  1
f1
fm
t

f
f1
Jitter Phase noise

49/60 Department of Electronic Engineering, NTUT

Phase Disturbance Due to Thermal Noise (I)

• Modeling the noise with the phasor diagram

FkTB
Phasor Diagram
Pavs
Amplitude disturbance
Noise-free amplifier
VavsRMS  Pavs R Pn

Pavs
VavsRMS  Ps
R
Ps
FkTR FkTR
FkT FkT
VnRMS 2  1 Hz 1 Hz VnRMS 1  Phase disturbance
R R

f
f0 f0  fm

The input phase noise in a 1-Hz bandwidth at any frequency f0  fm

from the carrier produces a phase deviation.
50/60 Department of Electronic Engineering, NTUT
Phase Disturbance Due to Thermal Noise (II)

• RMS phase deviation

VnRMS1 FkT
 peak  
2VnRMS 1 VavsRMS Pavs

1 FkT
1RMS  (noise from  f m )
m 2 Pavs

1 FkT
 2 RMS  (noise from  f m )
2 Pavs
 peak
2VavsRMS FkT
 RMS total  12RMS   22RMS 
Pavs

(total phase deviation)

vosc  t   2VavsRMS cos 0t    t  

51/60 Department of Electronic Engineering, NTUT

Lesson’s Phase Noise Model (I)
• The spectral density of phase noise :
S  f m 
S  f m 
FkTB
Pavs
Phase modulator Noise-free amplifier
fm
fc

 Due to Thermal Noise

FkTB
S  f m    RMS
2
 (due to theoretical noise floor of the amplifier)
Pavs

kTB  174 dBm/Hz (B  1)

FkTB  f 
 Consider Flicker Noise (modeled) S ( f m )   1  c 
Pavs  fm 
(B  1)

noise floor flicker noise

52/60 Department of Electronic Engineering, NTUT

Lesson’s Phase Noise Model (II)
• The oscillator may be modeled as an amplifier with feedback
Output
S ,in  f m 
FkTB  f 
S ,in  f m    1  c 
Resonator Pavs  fm 

Phase Noise-free
 1 0 B
modulator amplifier L m   
 2Q   2QL 2
1 j  L m 
 0 
Feedback
out  f m 
 0 
out  f m    1    in  f m 
L m   j 2Q 
L m 

in  f m 

 1  f0  
2

Resonator S out  f m   1  2     S ,in  f m 

 f m  2QL  

equivalent low-pass

 0 
   in  f m 
 j 2QLm 
53/60 Department of Electronic Engineering, NTUT
Lesson’s Phase Noise Model (III)
• Lesson’s phase noise model:

Open-loop Closed-loop w/ Resonator

1 
2
FkTB  f  1  f 
S ,in  f m    1  c  L  f m   1  2  0    S in ( f m )
Pavs  fm  2 f m  2QL  


FkTB  1 f o 2 f c 1  f o  
2
fc
L  fm    3 2
 2    1
2 Pavs  f m 4QL f m  2Ql  fm 
 
Up-convert 1/f noise Thermal noise floor
Thermal FM noise
Flicker noise

54/60 Department of Electronic Engineering, NTUT

Lesson’s Phase Noise Model (IV)
High-Q oscillator Low-Q oscillator

Phase perturbation Phase perturbation

1 f m1
f m

fm fm
fc fc

Resulting phase noise Resulting phase noise

f m3 f m3

f m2
f m1 f m0
f m0

fm fm
f 0 2Q f c fc f 0 2Q

55/60 Department of Electronic Engineering, NTUT

Design Example of Phase Noise Limits (I)

• A 5-GHz receiver including an onchip phase-locked loop (PLL)

is argued to be implemented with the VCO requirements:
1.8V supply, <1 mW DC power, and phase noise performance of 105 dBc/Hz at
100-kHz offset. It is known that, in the technology to be used, the best inductor Q is
15 for a 3-nH device. Assume that capacitors or varactors will have a Q of 50.
 Assume a Gm topology will be used:
Parallel resistance due to the inductor: rp L   LQ  2  5 GHz  3 nH 15  1413.7 
Q 50
Parallel resistance due to the capacitor: rp C    4712.9 
Ctot  2  5 GHz   337.7 fF

Equivalent parallel resistance of the resonator is 1087.5 Ω

Required capacitance: Ctot  21  1
 337.7 fF
osc L  2  5 GHz   3 nH
2

Current limit: 1.8-V VCC and PDC< 1 mW: 555.5 μA

Peak voltage swing: Vtank  2 Ibias Rp  2  555.5  A  1087.5   0.384 V

 

56/60 Department of Electronic Engineering, NTUT

Design Example of Phase Noise Limits (II)
 0.384 V   67.8  W
2 2
Vtank
RF output power: PRF  
2 R p 2 1087.5  

Oscillator Q: Q  Rp Ctot  1087.5  337.7 fF  11.53

L 3 nH

 Assume all low-frequency upconverted noise is small and active devices

add no noise to the circuit (F=1), we can now estimate the phase noise.
dominant around carrier
~0 far from carrier
1
FkTB  1 f o f c 1  f o    1  1.38  10 J/K  298 K  1 Hz   1.12  2  5 GHz   2
2
2 23
fc
L 100 kHz    3  2    1      1.79  10
10

2  67.8  W   2  11.53  2  100 kHz  

2
2 Pavs  f m 4QL f m  2Ql  fm  
  1.4

 97.5 dBc Hz @100 kHz offset

98.5

This is 98.5 dBc/Hz at 100-kHz offset, which is 6.5 dB higher than the promised
performance. Thus, the specifications given to the customer are most likely very
difficult. This is an example of one of the most important principles in engineering.

57/60 Department of Electronic Engineering, NTUT

 Phase Noise Simulation

Phase Noise Simulation Setup

7 in most cases
Agilent suggests

Turn on
Turn on

Set noise (1) Set noise (2)

58/60 Department of Electronic Engineering, NTUT

Simulated Results
• Plot the “pnmx” (PSD of the phase noise).
• This oscillator has the phase noise = 78.39 dBc/Hz@10 kHz,
98.34 dBc/Hz@100 kHz, and 118.08 dBc/Hz@1 MHz。

20

0
m11
noisefreq=10.00kHz
-20 pnmx=-78.390
pnmx, dBc

-40

-60
m13
m11 noisefreq=100.0kHz
-80 pnmx=-98.340
m13
-100
m14 m14
-120
noisefreq=1.000MHz
-140
pnmx=-118.079
1 1E1 1E2 1E3 1E4 1E5 1E6 1E7

noisefreq, Hz

59/60 Department of Electronic Engineering, NTUT

Summary
• In this presentation, few kinds of popular oscillator topologies
were introduced. The CB and CC configurations are good for
high frequency operation while the CE is good for high power
application and has good buffering characteristics.
• The active device is configured as feedback loop to provide a
negative resistance for resonator.
• For a voltage-controlled frequency application, an oscillator is
usually designed with variable capacitors, or varactors, to
provide frequency-tuning capability.
• Lesson’s phase noise model gives an intuitive way to
understand the behavior of the phase noise generated from the
oscillator.

60/60 Department of Electronic Engineering, NTUT