APT4M120K

1200V, 5A, 3.80Ω Max

N-Channel MOSFET
Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. TO-220
A proprietary planar stripe design yields excellent reliability and manufacturability. Low
switching loss is achieved with low input capacitance and ultra low Crss "Miller" capaci-
tance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure
help control slew rates during switching, resulting in low EMI and reliable paralleling,
even when switching at very high frequency. Reliability in flyback, boost, forward, and D
APT4M120K
other circuits is enhanced by the high avalanche energy capability.
Single die MOSFET G

FEATURES TYPICAL APPLICATIONS

• Fast switching with low EMI/RFI • PFC and other boost converter
• Low RDS(on) • Buck converter
• Ultra low Crss for improved noise immunity • Two switch forward (asymmetrical bridge)
• Low gate charge • Single switch forward
• Avalanche energy rated • Flyback
• RoHS compliant • Inverters

Absolute Maximum Ratings

Symbol Parameter Ratings Unit
Continuous Drain Current @ TC = 25°C 5
ID
Continuous Drain Current @ TC = 100°C 3 A
IDM Pulsed Drain Current 1
15
VGS Gate-Source Voltage ±30 V
EAS Single Pulse Avalanche Energy 2 310 mJ
IAR Avalanche Current, Repetitive or Non-Repetitive 2 A

Thermal and Mechanical Characteristics

Symbol Characteristic Min Typ Max Unit
PD Total Power Dissipation @ TC = 25°C 225 W
RθJC Junction to Case Thermal Resistance 0.56
°C/W
RθCS Case to Sink Thermal Resistance, Flat, Greased Surface 0.11
TJ,TSTG Operating and Storage Junction Temperature Range -55 150
°C
TL Soldering Temperature for 10 Seconds (1.6mm from case) 300

0.07 1.2 oz
3-2014

WT Package Weight
1.2 g
Rev C

10 in·lbf
Torque Mounting Torque ( TO-220 Package), 4-40 or M3 screw
1.1 N·m
050-8103

Microsemi Website - http://www.microsemi.com

 Static Characteristics TJ = 25°C unless otherwise specified APT4M120K
Symbol Parameter Test Conditions Min Typ Max Unit
VBR(DSS) Drain-Source Breakdown Voltage VGS = 0V, ID = 250µA 1200 V
∆VBR(DSS)/∆TJ Breakdown Voltage Temperature Coefficient Reference to 25°C, ID = 250µA 1.41 V/°C
RDS(on) Drain-Source On Resistance 3 VGS = 10V, ID = 2A 3.12 3.8 Ω
VGS(th) Gate-Source Threshold Voltage 3 4 5 V
VGS = VDS, ID = 0.5mA
∆VGS(th)/∆TJ Threshold Voltage Temperature Coefficient -10 mV/°C
VDS = 1200V TJ = 25°C 100
IDSS Zero Gate Voltage Drain Current µA
VGS = 0V TJ = 125°C 500
IGSS Gate-Source Leakage Current VGS = ±30V ±100 nA

Dynamic Characteristics TJ = 25°C unless otherwise specified

Symbol Parameter Test Conditions Min Typ Max Unit
gfs Forward Transconductance VDS = 50V, ID = 2A 4.5 S
Ciss Input Capacitance 1385
VGS = 0V, VDS = 25V
Crss Reverse Transfer Capacitance 17
f = 1MHz
Coss Output Capacitance 100
pF
Co(cr) 4
Effective Output Capacitance, Charge Related 40
VGS = 0V, VDS = 0V to 800V
Co(er) 5
Effective Output Capacitance, Energy Related 20

Qg Total Gate Charge 43

VGS = 0 to 10V, ID = 2A,
Qgs Gate-Source Charge 7 nC
VDS = 600V
Qgd Gate-Drain Charge 20
td(on) Turn-On Delay Time Resistive Switching 7.4
tr Current Rise Time VDD = 800V, ID = 2A 4.4
ns
td(off) Turn-Off Delay Time RG = 4.7Ω 6 , VGG = 15V 24
tf Current Fall Time 6.9

Source-Drain Diode Characteristics

Symbol Parameter Test Conditions Min Typ Max Unit
Continuous Source Current MOSFET symbol D
IS 5
(Body Diode) showing the
integral reverse p-n G A
Pulsed Source Current junction diode
ISM (body diode) 15
(Body Diode) 1 S
VSD Diode Forward Voltage ISD = 2A, TJ = 25°C, VGS = 0V 1.3 V
trr Reverse Recovery Time ISD = 2A, VDD = 100V 3 1150 ns
Qrr Reverse Recovery Charge diSD/dt = 100A/µs, TJ = 25°C 16 µC
ISD ≤ 2A, di/dt ≤1000A/µs, VDD = 800V,
dv/dt Peak Recovery dv/dt 10 V/ns
TJ = 125°C

1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature.
2 Starting at TJ = 25°C, L = 155.0mH, RG = 25Ω, IAS = 2A.
3 Pulse test: Pulse Width < 380µs, duty cycle < 2%.
4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS.
5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of
VDS less than V(BR)DSS, use this equation: Co(er) = -6.30E-8/VDS^2 + 7.65E-9/VDS + 1.09E-11.
6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)
3-2014

Microsemi reserves the right to change, without notice, the specifications and information contained herein.
Rev C
050-8103
 APT4M120K
12 4.0
V = 10V T = 125°C
GS J
3.5
10 V
GS
= 6, 7, 8 & 9V
TJ = -55°C 3.0
ID, DRAIN CURRENT (A)

ID, DRIAN CURRENT (A)

8
2.5

6 2.0 5V
TJ = 25°C
1.5
4
1.0
2 4.5V
TJ = 125°C 0.5
TJ = 150°C
0 0
0 5 10 15 20 25 30 0 5 10 15 20 25 30
VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 1, Output Characteristics Figure 2, Output Characteristics
RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE

3.0 16
NORMALIZED TO VDS> ID(ON) x RDS(ON) MAX.
VGS = 10V @ 2A 250µSEC. PULSE TEST
14 @ <0.5 % DUTY CYCLE
2.5
12

ID, DRAIN CURRENT (A)

2.0
10
TJ = -55°C
1.5 8
TJ = 25°C
6
1.0 TJ = 125°C
4
0.5
2

0 0
-55 -25 0 25 50 75 100 125 150 0 1 2 3 4 5 6 7 8
TJ, JUNCTION TEMPERATURE (°C) VGS, GATE-TO-SOURCE VOLTAGE (V)
Figure 3, RDS(ON) vs Junction Temperature Figure 4, Transfer Characteristics
5 2,000
1,000 Ciss

4
gfs, TRANSCONDUCTANCE

TJ = -55°C
C, CAPACITANCE (pF)

TJ = 25°C
3 100
TJ = 125°C

2 Coss

10
1 Crss

0 1
0 0.5 1.0 1.5 2.0 0 200 400 600 800 1000 1200
ID, DRAIN CURRENT (A) VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 5, Gain vs Drain Current Figure 6, Capacitance vs Drain-to-Source Voltage
16 16
ID = 2A
VGS, GATE-TO-SOURCE VOLTAGE (V)

ISD, REVERSE DRAIN CURRENT (A)

14 14

12 12
VDS = 240V
10 10
VDS = 600V
8 8

TJ = 25°C
6 6
VDS = 960V TJ = 150°C
3-2014

4 4

2 2
Rev C

0 0
0 10 20 30 40 50 60 0.2 0
0.4 0.6 0.8 1.0 1.2
Qg, TOTAL GATE CHARGE (nC) VSD, SOURCE-TO-DRAIN VOLTAGE (V)
050-8103

Figure 7, Gate Charge vs Gate-to-Source Voltage Figure 8, Reverse Drain Current vs Source-to-Drain Voltage
 APT4M120K
20 20

10 10 IDM
IDM 13µs
ID, DRAIN CURRENT (A)

ID, DRAIN CURRENT (A)

Rds(on)

13µs 100µs
1 100µs 1 1ms
10ms
Rds(on) 1ms TJ = 150°C 100ms
10ms TC = 25°C DC line
Scaling for Different Case & Junction
TJ = 125°C 100ms Temperatures:

TC = 75°C DC line ID = ID(T = 25°C)*(TJ - TC)/125
C
0.1 0.1
1 10 100 1200 1 10 100 1200
VDS, DRAIN-TO-SOURCE VOLTAGE (V) VDS, DRAIN-TO-SOURCE VOLTAGE (V)

Figure 9, Forward Safe Operating Area Figure 10, Maximum Forward Safe Operating Area

0.60

D = 0.9
0.50
ZθJC, THERMAL IMPEDANCE (°C/W)

0.40 0.7

0.30 0.5 Note:

t1

P DM
0.20 0.3 t2
t1 = Pulse Duration
SINGLE PULSE t
0.10 Duty Factor D = 1 /t2
0.1 Peak T J = P DM x Z θJC + T C
0.05
0
10-5 10-4 10-3 10-2 10-1 1.0
RECTANGULAR PULSE DURATION (seconds)
Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration

TO-220 (K) Package Outline

e3 100% Sn Plated
10.66 (.420)
9.66 (.380)
1.39 (.055) 5.33 (.210)
0.51 (.020) Drain 4.83 (.190)

6.85 (.270)
5.85 (.230)
15.31 (.602) 3.42 (.135) 4.08 (.161) Dia
14.71 (.579) 2.54 (.100) 3.54 (.139)

3.683 (.145)
7.5° ± 1.0 MAX.
x3
14.73 (.580)
12.70 (.500) Gate
0.50 (.020)
0.41 (.016) Drain
Source
3-2014

2.92 (.115)
2.04 (.080) 1.01 (.040) 3-Plcs.
0.83 (.033) 1.77 (.070) 3-Plcs.
1.15 (.045)
4.82 (.190) 2.79 (.110)
3.56 (.140) 2.29 (.090)
Rev C

5.33 (.210)
4.83 (.190)
050-8103

Dimensions in Millimeters and (Inches)

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otherwise. Any license under such intellectual property rights must be approved by Microsemi in writing signed by an officer of Microsemi.

Microsemi reserves the right to change the configuration, functionality and performance of its products at anytime without any notice. This
product has been subject to limited testing and should not be used in conjunction with life-support or other mission-critical equipment or
applications. Microsemi assumes no liability whatsoever, and Microsemi disclaims any express or implied warranty, relating to sale and/or
use of Microsemi products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any
patent, copyright or other intellectual property right. Any performance specifications believed to be reliable but are not verified and customer or
3-2014

user must conduct and complete all performance and other testing of this product as well as any user or customers final application. User or
customer shall not rely on any data and performance specifications or parameters provided by Microsemi. It is the customer’s and user’s re-
Rev C

sponsibility to independently determine suitability of any Microsemi product and to test and verify the same. The information contained herein
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specifically disclaims any liability of any kind including for consequential, incidental and punitive damages as well as lost profit. The product is
050-8103

subject to other terms and conditions which can be located on the web at http://www.microsemi.com/legal/tnc.asp