1. Write the features of 82C55 PPI.

Draw the internal block diagram of 82C55A

programmable peripheral Interface.
• The 82C55A is an LSI peripheral designed to permit easy implementation of parallel I/O
in the 8088- and 8086-microcomputer system.
• Flexible parallel interface:
• Single-bit, 4-bit, and byte-wide input and output ports 
• Level sensitive inputs
• Latched outputs
• Strobed inputs or outputs
• Strobed bidirectional input/outputs.
• Timing of the data transfers to the 82C55A is controlled by the read/write control (RD
and WR) signals.
Features of 8255 PPI
The 82C55 is a popular interfacing component, that can interface any TTL-compatible I/O device
to the microprocessor.

• It is used to interface to the keyboard and a parallel printer port in PCs (usually as part
of an integrated chipset).
• Requires insertion of wait states if used with a microprocessor using higher that an 8
MHz clock.
• PPI has 24 pins for I/O that are programmable in groups of 12 pins and has three distinct
modes of operation.
• In the PC, an 82C55 or its equivalent is decoded at I/O ports 60H-63H.
 2. What are the control groups in 8255 PPI???
It has two group controls :Group A and Group B
Under Group A : PortA (PA0-PA7) and PortC Upper 4 bits (PC4-PC7)
Under Group B : Port B (PB0-PB7) and PORT C (PC0-PC3)
3.
The source or destination register within the 82C55A is selected by a 2-bit register select code
(A 1 A 0 ).  The chip-select (CS) input must be logic 0 during all read or write operations to the
82C55A.  The reset (RESET) is used to initialize the 82C55A.

4. Suppose an 8086 is connected to an 8255A. The address decoder to select the 8255A is
shown below. What are the addresses of port A, port B, port C and control register of
the 8255A?
To access port A, A1A0 = 00, A15 = A14 = 1, A13 = A12 = … = A2 = 0, which gives the port A
address as 1100 0000 0000 0000B = C000H
Similarly, it can be determined that the address of port B equals C001H, that of port C is
C002H, and the address of the control register is C003H.
5. Write Mode 0, Mode 1 and Mode 2 port pin functions of 8255 PPI.
 6. What is the mode and I/O configuration for ports A, B, and C of an 8255A after its
control register is loaded with 82H?
Expressing the control register contents in binary form, we get
D7D6D5D4D3D2D1D0 = 10000010B
Since D7 is 1, the modes of operation of the ports are selected by the control word.
D0 = 0 Lower four bits of port C are outputs.
D1 = 1 Port B is an input port.
D2 = 0 Mode 0 for both port B and the lower four bits of port C.
The next for bits configure the upper part of port C and port A:
D3 = 0 Upper four bits of port C are outputs.
D4 = 0 Port A is an output port.
D6,D5 = 00 Mode 0 for both port A and the upper four bits of port C

7. What control word must be written into the control register of the 82C55A such that
Port A is configured for bidirectional operation and port B is set up with mode 1
outputs?
• To configure the operating mode of the ports of the 82C55A, D7 must be 1.
• Port A is set up for bidirectional operation by making D6 logic 1.
o In this case, D5 through D3 are don’t-care states:
o D5D4D3 = XXX2
• Mode 1 is selected for port B by logic 1 in D2 and output operation by logic 0 in D1.
o D0 is a don’t-care state
• D7D6D5D4D3D2D1D0 = 11XXX10XB = 11000100B = C4H
8. Write the features of 8254 PIT.Also,8. Write the comparison between 8253 and 8254
PIT.
The features of 8254 PIT:

• Compatible with All Intel and Most other Microprocessors and Handles Inputs from DC
to 10 MHz
• 8 MHz 8254 and 10 MHz 8254-2
• The Intel 8254 is a counter/timer device designed to solve the common timing control
problems in microcomputer system design.
• It provides three independent 16-bit counters, each capable of handling clock inputs up to 10
MHz
• Binary or BCD counting
• Single a +5V Supply and Standard Temperature Range
• Six Programmable Counter Modes and All modes are software programmable. The 8254 is a
superset of the 8253.
• The 8254 uses HMOS technology and comes in a 24-pin plastic or CERDIP package.
• Used for controlling real-time events such as real-time clock, events counter, and motor
speed and direction control.
 9. What is the Comparison of 8253 and 8254:

8253
• 8253 can operate at frequency from dc to 2mhz
8254-ADVANCED VERSION OF 8253
• 8254 can operate with higher clock Frequency Range ( DC To 8 Mhz AND 10 Mhz
FOR 8254-2)
• Includes Status Read Back Command That Latches The Count And Status Of Counters
10. What are the advantages of 8254 PIT? Draw the internal block diagram of 8254 PIT.

Advantages of 8254 PIT:

• Accurate Time Delays

• Minimizes Load On microprocessor
• Real Time Clock
• Event Counter
• Digital One Shot
• Square Wave Generator
• Complex Waveform Generator

Figure: The internal block diagram of 8254 PIT

11. Draw the 8254 PIT block diagram:

12. Write the control word format of 8254 PIT.

The Control Word Format

• SC for Select Counter D7-D6 to Select Three counters and Read back command
• D5 D4 for Read /write logic
• M2M1M0 for mode selection
• Mode 0 tp Mode 5 total six modes of operation
• D3D2 D1 for Modes
• Do for counter type D0=0 for binary counter and D0=1 for BCD counter
 13. What are the modes of operation of 8254 PIT. Explain the mode 2 and 3 operation of
8254 programmable interval timer.
8254 Modes Of Operation
Mode 0: Interrupt On Terminal Count
Mode 1: Programmable Monoshot
Mode 2: Rate Generator
Mode 3: Square Wave Generator
Mode 4: Software Triggered Strobe
Mode 5: Hardware Triggered Strobe

Mode 2: Rate Generator / Divide by N Counter

• When N is loaded as count after N pulses OUT goes low for
only one clock cycle then, count N is reloaded OUT becomes
high for N clock pulses
• The number of clock pulses between the two low pulses is equal
to the count loaded
• Gate logic 0 no counting
• Gate logic 1 normal counting

Mode 3: Square Wave Rate Generator

• When count N loaded is even output remains HIGH for half the count and LOW for
the rest half of the count
• When count N loaded is odd output remains HIGH for (N+1)/2 and low for (N-1)/2.
• Repeated operation gives square wave
• Generates a continuous square-wave with G set to 1.
• If count is even, 50% duty cycle otherwise OUT is high 1 cycle longer.