EEE109 (Matthews) Midterm Exam II Solutions Fall 2009

Problem 1. a) Behold Figure S-1a. Recognize Q6, Q7, and Q8 as being a current
mirror with I C 8 being the reference current and I C 6 and I C 7 being the output currents.
Because VBE 6 = VBE 7 = VBE 8 , we know that I C 6 = I C 7 = I C 8 , under the assumption that
VA = ∞ . Therefore, find I C 8 . Note that the voltage across RB8 is 9.3V, so the current
through RB8 is 0.664mA. Hence, I C 6 and I C 7 are each equal to 0.664mA.. I C1 and I C 2
are therefore also equal to 0.664mA . Many students divided 0.664mA by two in order to
calculate I C1 and I C 2 . That is not correct. In this circuit, there are two sources of tail

VC1 = VC 2 = 10V − ( 0.664mA × 2kΩ ) = 8.67V

RC1 RC 2
IC 8 IC 8 10V
vC1 vC 2
100Ω

RY RY
RB8
vX IC 8 2 2 IC 8 9.3V
IC 8
100Ω RY
ro 6 ro 7
10V

vZ 0.7V

9.3V
IC 8 = = 0.664mA
14kΩ
Figure S-1a

current (Q6 and Q7) so each one provides the bias current for one transistor. Now the
voltages VC1 and VC1 can be calculated as shown in the figure.
b) Recognize that v X is a difference-mode input voltage, so this question involves the
difference-mode gain. The equation for difference-mode gain is
− g m RC I
ADM = . It is clear that g m = C1 = 26.6 ×10−3 AV and
1 + g m RE VT RC
vod
RC = 2kΩ . But what is RE ? Recall that RE is the resistance to
2
ground seen by the emitter. Refer to Figure S-1b, which is the vid
difference-mode half-circuit. In this circuit, the emitter of Q1 2 RY
“sees” two resistances to ground. The resistance to the middle of 2
RY is a resistance to ground, because the middle of RY crosses
ro 6
the axis of symmetry and hence is a signal ground in the
difference-mode case. The emitter of Q1 also sees the resistance
looking into the collector of Q6, which is ro 6 (also shown in
Figure S-1b
EEE109 (Matthews) Midterm Exam II Solutions Fall 2009

− g m RC
Figure S-1a). Hence, in the equation ADM = , the value to be used for RE is
1 + g m RE
RY V 100V R
ro 6 . Now, ro 6 = A = = 150kΩ , which is much greater than Y = 250Ω .
2 I C 0.664mA 2
Hence, we use 250Ω for RE in the equation and get
−26.6 ×10−3 × 2000 −53.2
ADM = −3
= = −6.95 VV . Now, note that the output is not the
1 + 26.6 × 10 × 250 1 + 6.65
output differential voltage, but is taken single-ended, so the requested gain is one-half of
ADM . Also note that the output is taken from vC 2 , where vod = vd 1 − vd 2 , so the negative
v
sign of ADM is reversed and we have C 2 = 3.48 VV . c) The common-mode half-circuit
vX
R
in this case is shown in Figure S-1c. Here the resistance Y carries
2
no current, because voltages are equal on opposite sides of the axis RC
of symmetry. Hence, the common-mode gain is given by voc
− g m RC − RC
ACM = . In this case, g m ro 6  1 and ACM ≈ = −0.013 . vic
1 + g m ro 6 ro 6 RY
− g m RC 2
The memorized equation ACM = could have been used,
1 + g m 2 REE
ro 6
with the proper substitution. That equation was derived for the
circuit on the left in Figure S-1d. In order to define an axis of
symmetry, it is necessary to redraw the figure on the left resulting in
the figure on the right. Note that when there is a current source
beneath each transistor, the resistance associated with each current Figure S-1c
source is 2 REE . That is the case for
the circuit of Figure S-1a, where the
output resistance of each transistor is
ro . Therefore, in the equation
− g m RC
ACM = , the value of ro 6 is
1 + g m 2 REE
substituted for 2 REE . I EE 2 REE I EE
I EE REE 2 2 REE 2

d) The requested range is the input

common-mode voltage range. The
common-mode input voltage must be
Figure S-1d
greater than -9.1 volts in order to keep
Q6 and Q7 in their forward active
regions. The input needs to be 0.9 volts above -10V because we need VCE > 0.2V to
keep Q6 and Q7 out of saturation, and we need VBE ≈ 0.7V to keep Q1 and Q2 forward
active. An answer of -9.3V for the lower limit was acceptable. The upper limit is
reached when Q1 and Q2 go into saturation. This happens when the base voltages go
EEE109 (Matthews) Midterm Exam II Solutions Fall 2009

above the collector voltages, so the upper limit is 8.67V.

e) When the resistor RY is removed, the resulting difference-
mode half-circuit is shown in Figure S-1e. We see that the RC
− g m RC vod
voltage gain is given by ADM = , where RE = ro 6 .
1 + g m RE vid 2
Problem 2. We use vOD = ADM × vID in order to find the 2

required vID . To find ADM = − g m RD , where g m = 2µ Cox WL I D .

ro 6
We have µ Cox = 50 ×10−6 A
V2
, W
L
= 10 , and 250 ×10−6 A .
We find ADM = −0.5 and the required vID = 0.2V = 200mV .
Problem 3. a) Recognize that the input voltage is applied
− g m RC Figure S-1e
common-mode. We know that ACM = , but we
1 + g m 2 REE
cannot calculate g m without knowing the collector currents. However, it is likely that
− g m RC − RC −10kΩ
g m 2 REE  1 , hence ACM ≈ = = = −1 VV . b) We know that
g m 2 REE 2 REE 2 × 5kΩ
rπ (1 + g m 2 REE ) rπ g m 2 REE
Ric = ≈ = β REE , so Ric = 500kΩ .
2 2
Problem 4. a) Recognize a BJT current mirror. The given condition VA = ∞ implies
that I C1 = I C 2 . The given condition β = ∞ implies that I C1 = 2mA , because the base
currents are zero and hence all of the current from the 2mA source must go into the
collector of Q1. Therefore, I C 2 = 2mA . With 2mA through the 2kΩ resistor, there is a
4V drop across it. Consider Figure S-4a. Here, the collector-emitter terminals of the
transistor have been replaced with
an ideal current source. This 2kΩ
replacement does not model the 2kΩ
output resistance of the transistor, VC 2 2mA VC 2
but in this part of the problem we 10V 10V
are assuming that VA = ∞ so the 2mA

ideal current source is an accurate

model. Write a loop equation
starting at ground and going
clockwise through the voltage Figure S-4a
source:
−10 + (2kΩ × 2mA) + VC 2 = 0 and
hence VC 2 = 6V . b) If VX = 3V , we start by assuming that I C 2 = 2mA . But this would
result in VC 2 = −1V , which is not possible. Once VC 2 is less than 0.7V, Q2 is in
saturation (not forward active) and there is no reason for I C1 = I C 2 .
EEE109 (Matthews) Midterm Exam II Solutions Fall 2009

For the transistor in saturation, a

well-known model is to set
2kΩ
VCE = 0.2V with an ideal voltage 2kΩ
source. In this case, VC 2 VC 2
3V − 0.2V 3V 3V
IC 2 = = 1.4mA . Note 0.2V
2kΩ
that in this case, the collector current
is not determined by the transistor,
but by the rest of the circuit. It was
considered alright to use
Figure S-4b
VCE = 0.7V also, because that is the
value of VCE at which the transistor “officially” transitions into saturation. But VCE must
be somewhat lower than 0.7V in order for the transistor to behave as if it is in saturation.
c) Given that β = 50 , the collector current of Q1 is given by
2mA 2mA ⎛ 2⎞
I C1 = 2mA − − = 2mA ⎜1 − ⎟ = 1.923mA . d) The intent of the problem was
β β ⎝ β⎠
to find the output resistance of the transistor when VA is finite. That solution is as
∆VCE 2 V 50 2V
follows: = ro 2 = A = = 25kΩ and ∆I C 2 = = 80µ A . The previous
∆I C 2 I C 2mA 25kΩ
assumes that the transistor was not in saturation. However, for the values of VX given,
the transistor is in saturation. I didn’t find any that seemed to acknowledge that the
transistor was in saturation for the voltages given. In an effort to be fair, no matter what
grade was awarded for this problem, the minimum counted in the exam score was 2
points.
(W L )2
Problem 5. a) I D 2 = I REF = 2 I REF = 200µ A .
(W L )1
∆I D 2 ∆I 1 µA
b) = D 2 = = λ I D = 20 . c) Because of the drain-to-gate connection of
∆VDS 2 ∆VX ro V
2I D
M1, we have VDS1 = VGS1 . Also, VGS1 = + Vt = 0.894 + 0.8 = 1.69V = VDS1 .
µ Cox WL