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Transmission Line Basics

Prof. Tzong-Lin Wu

NTUEE

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Outlines

Transmission Lines in Planar structure.


Key Parameters for Transmission Lines.
Transmission Line Equations.
Analysis Approach for Z0 and Td
Intuitive concept to determine Z0 and Td
Loss of Transmission Lines
Example: Rambus and RIMM Module design

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Transmission Lines in Planar structure

Homogeneous Inhomogeneous



Microstrip line
Coaxial Cable

 

Embedded Microstrip line


Stripline

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Key Parameters for Transmission Lines
1. Relation of V / I : Characteristic Impedance Z0
2. Velocity of Signal: Effective dielectric constant e
3. Attenuation: Conductor loss ac
Dielectric loss ad

Lossless case
L 1 Td
Z0 VpC
C C
1 c0 1
Vp e
LC Td

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Transmission Line Equations

Quasi-TEM assumption

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Transmission Line Equations

R0  resistance per unit length(Ohm / cm)


G0  conductance per unit length (mOhm / cm)
L0  inductance per unit length (H / cm)
C0  capacitance per unit length (F / cm)

dV
KVL :  ( R0  jwL0 ) I
dz Solve 2nd order D.E. for
dI V and I
KCL :   (G0  jwC0 )V
dz
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Transmission Line Equations
Two wave components with amplitudes
V+ and V- traveling in the direction of +z and -z
V  V e  rz  V e  rz
1
I (V e  rz  V e  rz )  I   I 
Z0
Where propagation constant and characteristic impedance are

r  ( R0  jwL0 )(G0  jwC0 )  a  j

V V R0  jwL0
Z0   
I I G0  jwC0

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Transmission Line Equations
a and  can be expressed in terms of (R0 , L0 , G0 , C0 )
a 2   2  R0 G0   2 L0 C0
2a   ( R0 C0  G0 L0 )

The actual voltage and current on transmission line:


V ( z, t )  Re[(V e az e  jz  V e az e jz )e jwt ]
1
I ( z, t )  Re[ (V e az e  jz  V e az e jz )e jwt ]
Z0

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Analysis approach for Z0 and Td (Wires in air)

C = ? (by Q=C V)

L = ? (by Ψ=L I)

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Analysis approach for Z0 and Td (Wires in air):
Ampere’s Law for H field

I I
H(r)= 
d 2 r
c

R2 0 I I R
2)  e   BT d s   dr  0 ln( 1 ) (in Wb)
S r  R1 2 r 2 R2

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Analysis approach for Z0 and Td (Wires in air):
Ampere’s Law for H field

0 I R2
e  ln( )
2 R1
L e / I

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The per-unit-length Parameters (E):
Gauss’s Law

1) from gauss law


 D  S
 ET d s  Qtotal
q  1m
 ET 
 0  ds
S

q

2 0 r
R1 q
2) V=  E T d    dr
C r  R2 2 0 r
q R2
 ln
2 0 R1

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The per-unit-length Parameters (E)

q R2
V ln( )
2 0 R1
C  Q /V
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c. For example Determine the L.C.G.R of the two-wire line.

(note:homogeneous medium)
S
Inductance:
e rw2
L= e  I
rw1 I
I
where
0 I s-rw2 0 I s-rw1 e
e  ln( )+ ln( )
2 rw1 2 rw2
0 I (s-rw2 )(s-rw1 ) ( 0 ,  0 )
= ln( )
2 rw1rw2
assume s rw1 , rw2
0 s2
 L= ln( )
2 rw1rw2
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Capacitance:
S
1) e c   0 0 - -
+ +
2 0 rw1
rw2
C  + + -
-
s2 + V
- -
ln ( ) q C/m -q C/m
rw1rw2
q s-rw2 q s-rw1
2) V= ln( )+ ln( )
2 0 rw1 2 0 rw2
q (s-rw2 )(s-rw1 )
= ln( )
2 0 rw1rw2
q s2
 ln( ) if s rw1 , rw2
2 0 rw1rw2
q 2 0
C=   the same with 1) approach
V s2
ln ( )
rw1rw2 15
The per-unit-length Parameters
Homogeneous structure

TEM wave structure is like the DC (static) field structure

LG  
LC  

So, if you can derive how to get the L, G and C can be


obtained by the above two relations.

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The per-unit-length Parameters (Above GND )

2C
Why?
L/2

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0 ,  0
d. How to determine L,C for microstrip-line.
1 , 1
1) This is inhomogeneous medium.
2) Nunerical method should be used to solve
the C of this structure, such as Finite element,
Finite Difference...
3) But e can be obtained by
 0 0
e C0  0 0  e 
C0
where C0 is the capacitance when 1 medium
is replaced by  0 medium.

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Analysis approach for Z0 and Td (Strip line)
Approximate electrostatic solution y


1.  b

x
-a/2 a/2

2. The fields in TEM mode must satisfy Laplace equation


 t ( x , y )  0
2

where  is the electric potential


The boundary conditions are
( x , y )  0 at x   a / 2
( x , y )  0 at y  0, b

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Analysis approach for Z0 and Td
3. Since the center conductor will contain the surface charge, so
 n x n y
 n A cos
a
sinh
a
for 0  y  b / 2
 odd
n 1

 ( x, y )   
 B cos n x sinh n (b  y )
 n for b / 2  y  b
n 1 a a
 odd
Why?
4. The unknowns An and Bn can be solved by two known conditions:

R|The potential at y  b / 2 must continuous


S|The surface charge distribution for the strip:   RS1 for x  W / 2
T s
T0 for x  W / 2

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Analysis approach for Z0 and Td

5. R|V   E ( x  0, y)dy   ( x, y) / y( x  0, y)dy


|S z z
b/2 b/2

||Q  z  ( x)dx  W (C / m)
0 0
w/ 2

T  w/ 2
s

Q W
6. C 
V 
2a sin(nW / 2a ) sinh(nb / 2a )

n 1 (n ) 2  0  r cosh(nb / 2a )
odd

1 r Answers!!
Z0  
v pC cC

7.
Td   r / c
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Analysis approach for Z0 and Td (Microstrip Line)
y

1. PEC
PEC
d W


x
-a/2 a/2
2. The fields in Quasi - TEM mode must satisfy Laplace equation
 t ( x , y )  0
2

where  is the electric potential


The boundary conditions are
( x , y )  0 at x   a / 2
( x , y )  0 at y  0, 

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Analysis approach for Z0 and Td (Microstrip Line)

3. Since the center conductor will contain the surface charge, so


R| A cos nx sinh ny

for 0  y  d
|
n
n 1 a a
( x , y )  S
odd

|| B cos nax e
n
 ny / a
for d  y  
T
n 1
odd

4. The unknowns An and Bn can be solved by two known conditions and


the orthogonality of cos function :

R|The potential at y  d must continuous


S|The surface charge distribution for the strip:   RS1 for x  W / 2
T s
T0 for x  W / 2

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Analysis approach for Z0 and Td (Microstrip Line)

R|V   E ( x  0, y)dy   ( x, y) / y( x  0, y)dy   A sinh nd


|S z z
5. b/2 b/2 

y n
0 0
an 1
odd

||Q  z  ( x)dx  W (C / m)
w/2

T  w/ 2
s

6.
Q W
C 
V 
4a sin(nW / 2a ) sinh(nd / 2a )

n 1 ( n ) W 0 [sinh( nd / a )   r cosh( nd / a )]
2

odd

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Analysis approach for Z0 and Td (Microstrip Line)
7.
To find the effective dielectric constant  e , we consider two cases of capacitance
1. C = capacitance per unit length of the microstrip line with the dielectric substrate  r  1
2. C 0 = capacitance per unit length of the microstrip line with the dielectric substrate  r  1

C
 e 
C0

8.
1 e
Z0  
v pC cC

Td   e / c
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Tables for Z0 and Td (Microstrip Line)

Z 0 ( ) 20 28 40 50 75 90 100

 eff 3.8 3.68 3.51 3.39 3.21 3.13 3.09

L0 0.119 0.183 0.246 0.320 0.468 0.538 0.591


( nH / mm)
C0 0.299 0.233 0.154 0.128 0.083 0.067 0.059
( pF / mm)
T0 6.54 6.41 6.25 6.17 5.99 5.92 5.88
( ps / mm)

Fr4 : dielectric constant = 4.5


Frequency: 1GHz

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Tables for Z0 and Td (Strip Line)

Z 0 ( ) 20 28 40 50 75 90 100

 eff 4.5 4.5 4.5 4.5 4.5 4.5 4.5

L0 0.141 0.198 0.282 0.353 0.53 0.636 0.707


( nH / mm)
C0 0.354 0.252 0.171 0.141 0.094 0.078 0.071
( pF / mm)
T0 7.09 7.09 7.09 7.09 7.09 7.09 7.09
( ps / mm)

Fr4 : dielectric constant = 4.5


Frequency: 1GHz

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Analysis approach for Z0 and Td (EDA/Simulation Tool)

1. HP Touch Stone (HP ADS)

2. Microwave Office

3. Software shop on Web:

4. APPCAD
(http://softwareshop.edtn.com/netsim/si/termination/term_article.html)

(http://www.agilent.com/view/rf or http://www.hp.woodshot.com )

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Concept Test for Planar Transmission Lines

• Please compare their Z0 and Vp


(a) (b)

 




 

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(a) (b) (c)

  

 

  

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(a) (b) (c)


  

 

 

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Loss of Transmission Lines
Typically, dielectric loss is quite small -> G0 = 0. Thus
R0  jwL0 L0
Z0   (1  jx ) 1/ 2
jwC0 C0
R0
r  ( R0  jwL0 )( jwC0 )  a  j w
L0

R Highly Lossy Near Lossless


where x 0
wL0 w

• Lossless case : x = 0
• Near Lossless: x << 1  w

• Highly Lossy: x >> 1

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Loss of Transmission Lines
•For Lossless case: • For Near Lossless case:

a 0 a
R0
   L0 C0 2 L0 / C0

L0
L xO
   L C M1  P
2

Z0 
C0
0
N 8Q
0

L F R I
Time delay T0  L0 C0 Z 
0 G
C H
0

0
1  j J
2 wL K
0

0

L0
C0

1
jwC
where C  2T0 / R0

Time delay T0  L0 C0

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Loss of Transmission Lines
• For highly loss case: (RC transmission line)

wR0 C0 1
a [1  ]
Nonlinear phase relationship with f
2 2x
introduces signal distortion
wR0 C0 1
 [1  ]
2 2x Example of RC transmission line:
AWG 24 telephone line in home
R0 1
Z0  [1  ] F R  iwL IJ
Z ( w)  G
1/ 2

 648(1  j )
2 wC0 2x 0
H jwC K
where
R  0.0042 / in
L  10nH / in
C  1 pF / in
That’s why telephone company terminate w  10,000rad / s(1600 Hz ) : voice band
the lines with 600 ohm

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Loss of Transmission Lines ( Dielectric Loss)

The loss of dielectric loss is described by the loss tangent


G
tan  D  FR4 PCB tan  D  0.035
wC
GZ 0
a D   ( wC tan  D Z 0 ) / 2  f tan  D LC
2

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Loss of Transmission Lines (Skin Effect)
• Skin Effect
DC resistance AC resistance

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Loss of Transmission Lines (Skin Effect)
1 2
s  
a w

1  length  w
R( w)   
  area  

NOTE: In the near lossless region ( R / wL  1),


the characteristic impedance Z 0 is not much
affected by the skin effect

 R(w)  w
 R( w) / wL  (1 / w )  1

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Loss of Transmission Lines (Skin Effect)

f (MHz) 100 200 400 800 1200 1600 2000

s 
1 6.6um 4.7um 3.3um 2.4um 1.9um 1.7um 1.5um
f
2.6m 3.7m 5.2m 7.4m 9.0m 10.8m 11.6m
R s () ohm ohm ohm ohm ohm ohm ohm
Trace 1.56 2.22 3.12 4.44 5.4 6.48 7.0
resistance
ohm ohm ohm ohm ohm ohm ohm

f
Skin depth resistance R s = ()

6mil  = 4  10 -7 H / m
Cu 17um
 (Cu) = 5.8  10 7 S / m
Length of trace = 20cm
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Loss Example: Gigabit differential transmission lines

For comparison: (Set Conditions)

1. Differential impedance = 100


2. Trace width fixed to 8mil
3. Coupling coefficient = 5%
4. Metal : 1 oz Copper

Question:

1. Which one has larger loss by skin effect?


2. Which one has larger loss of dielectric?

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Loss Example: Gigabit differential transmission lines

Skin effect loss

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Loss Example: Gigabit differential transmission lines

Skin effect loss

Why?

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Loss Example: Gigabit differential transmission lines

Look at the field distribution of the common-mode coupling

Coplanar structure has more surface for current flowing

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Loss Example: Gigabit differential transmission lines

How about the dielectric loss ? Which one is larger?

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Loss Example: Gigabit differential transmission lines

The answer is dual stripline has larger loss. Why ?

The field density in the dielectric between the trace and GND is
higher for dual stripline.

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Loss Example: Gigabit differential transmission lines

Which one has higher ability of rejecting common-mode noise ?

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Loss Example: Gigabit differential transmission lines

The answer is coplanar stripline. Why ?

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49
50
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Intuitive concept to determine Z0 and Td
•How physical dimensions affect impedance and delay
Sensitivity is defined as percent change in impedance
per percent change in line width, log-log plot shows sensitivity directly.

Z 0 is mostly influenced by w / h,
the sensitivity is about 100%.
It means 10% change in w / h will
cause 10% change of Z 0

The sensitivity of Z 0 to changes in  r


is about 40%

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Intuitive concept to determine Z0 and Td
•Striplines Delay
impedance

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Ground Perforation: BGA via and impedance

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Ground Perforation: Cross-talk (near end)

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Ground Perforation : Cross-talk (far end)

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Example(II): Transmission line on non-ideal GND

Reasons for splits or slits on GND planes

57
Example(II): Transmission line on non-ideal GND

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Example(II): Transmission line on non-ideal GND

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Example(II): Transmission line on non-ideal GND

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Example(II): Transmission line on non-ideal GND

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Example(II): Transmission line on non-ideal GND

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Example(II): Transmission line on non-ideal GND

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Input side

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Output side

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Example: Rambus RDRAM and RIMM Design
RDRAM Signal Routing

69
Example: Rambus RDRAM and RIMM Design

•Power:
VDD = 2.5V, Vterm = 1.8V, Vref = 1.4V

•Signal:
0.8V Swing: Logic 0 -> 1.8V, Logic 1 -> 1.0V
2x400MHz CLK: 1.25ns timing window, 200ps rise/fall time
Timing Skew: only allow 150ps - 200ps

•Rambus channel architecture:


(30 controlled impedance and matched transmission lines)

Two 9-bit data buses (DQA and DQB)


A 3-bit ROW bus
A 5-bit COL bus
CTM and CFM differential clock buses
70
Example: Rambus RDRAM and RIMM Design

RDRAM Channel is designed for 28 +/- 10%


Impedance mismatch causes signal reflections
Reflections reduce voltage and timing margins
PCB process variation -> Z0 variation -> Channel error

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Example: Rambus RDRAM and RIMM Design

• Intel suggested coplanar structure


Ground flood & Stitch

• Intel suggested strip structure

Ground flood & Stitch

72
Example: Rambus RDRAM and RIMM Design
PCB Parameter sensitivity:
• H tolerance is hardest to control
• W & T have less impact on Z0

73
Example: Rambus RDRAM and RIMM Design
• How to design Rambus channel in RIMM Module
with uniform Z0 = 28 ohm ??
• How to design Rambus channel in RIMM Module
with propagation delay variation in +/- 20ps ??

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Example: Rambus RDRAM and RIMM Design
Impedance Control: (Why?)
Loaded trace

Unloaded trace

Connector

75
Example: Rambus RDRAM and RIMM Design
Multi-drop Buses

Unloaded Z0

Stub Device input


Capacitance Cd

Electric pitch L
Equivalent loaded ZL A Multidrop Bus

L0 L0
ZL    28 (for Rambus design)
CT CL L
 02
L Z0
where C T is the per - unit - length equivalent capacitance at length L,
including the loading capacitance and the unloaded trace capacitance
C L is the loading capacitance including the device input capacitance C d ,
the stub trace capacitance, and the via effect.
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Example: Rambus RDRAM and RIMM Design

In typical RIMM module design


Device input capacitance
stub via

If C L  0.2 pF + 0.1pF + 2.2pF, and


If you design unloaded trace Z 0  56
the electric pitch L = 7.06mm to reach loaded Z L  28

 L0  Z 0  56  6.77 psec / mm = 379 pH / mm = 9.5 pH / mil


C L 2.5 pF 379 pH / mm
CT  L  02    0.475 pF / mm
L Z0 7.06mm 56 2
L0
 ZL   28.3
CT

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Example: Rambus RDRAM and RIMM Design

• Modulation trace
Device pitch = Device height +
Device space

Electrical pitch L is designed as


2
CL Z L
L

(Z0  Z L )
2 2

Z0

If device pitch > electric pitch, modulation


trace of 28ohm should be used.

Modulation trace length


= Device pitch – Electric pitch

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Example: Rambus RDRAM and RIMM Design

• Effect of PCB parameter variations on three key module


electric characteristics

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Example: Rambus RDRAM and RIMM Design

• Controlling propagation delay:


•Bend compensation
•Via Compensation
•Connector compensation

Bend Compensation

• Rule of thumb: 0.3ps faster delay of every bend


• Solving strategies:
1. Using same numbers of bends for those critical traces(difficult)
2. Compensate each bend by a 0.3ps delay line.

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Example: Rambus RDRAM and RIMM Design

Via Compensation (delay)


For a 8 layers PCB, a via with 50mil length can be modeled as
(L, C) = (0.485nH, 0.385pF).
 Delay T0  LC  13.7 psec
1
Impedance Z 0 =  38 Inductive
LC
Rule of thumb: delay of a specific via depth can be calculated by scaling
the inductance value which is proportional to via length.

30mil
 30mil via has delay  13.7   10.6 p sec
50mil
This delay difference can be compensated by adding a 1.566mm to the
unloaded trace (56)

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Example: Rambus RDRAM and RIMM Design

Via Compensation (impedance)

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Example: Rambus RDRAM and RIMM Design

Connector Compensation

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Example: EMI resulting from a trace near a PCB edge

Experiment setup and trace design

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Example: EMI resulting from a trace near a PCB edge

Measurement Setup

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Example: EMI resulting from a trace near a PCB edge

EMI caused by Common-mode current : magnetic coupling


Measured by current probe

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Example: EMI resulting from a trace near a PCB edge

EMI measured by the monopole : E field

Low effect at high frequency

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Example: EMI resulting from a trace near a PCB edge

Trace height effect on EMI

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Reference

1. Howard W. Johnson, “High-speed digital design”, Prentice-Hall, 1993


2. Ron K. Poon, “Computer Circuits Electrical Design”, Prentice-Hall, 1995
3. David M. Pozar, “Microwave Engineering”, John Wiley & Sons, 1998
4. William J. Dally, “Digital System Engineering”, Cambridge, 1998
5. Rambus, “Direct Rambus RIMM Module Design Guide, V. 0.9”, 1999

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