t and output resistance of 50Ω. Determine the

高雄科技大學電子系兼任副教授李謨中
5.1. An antenna modeled as a Thevenin equivalent having a voltage 15cos2π×103t and output resistance of 50Ω. Determine the
average power delivered to a load resistance of 15Ω.
Sol:
𝑉0 15 𝑉𝑟𝑚𝑠 10.61𝑉
𝑉𝑟𝑚𝑠 = = ≅ 10.61𝑉, 𝐼𝑟𝑚𝑠 = = ≅ 163.23𝑚𝐴
√2 √2 𝑅𝑂 + 𝑅𝐿 50Ω + 15Ω
2
𝑃𝐴𝑉 = 𝐼𝑟𝑚𝑠 𝑅𝐿 = (163.23𝑚𝐴)2 × 15Ω = 399.66mW
5.2. Determine the small-signal input resistance of the circuits shown in Fig. 5.96. Assume all diodes are forward-biased. (Recall
from Chapter 3 that each diode behaves as a linear resistance if the voltage and current changes are small.)
Sol:
(a)
𝑅𝑖𝑛 = 𝑟𝐷1 + 𝑅1
(b)
𝑅𝑖𝑛 = 𝑟𝐷1 + 𝑟𝐷2 ∥ 𝑅1
(c)
𝑅𝑖𝑛 = 2𝑟𝐷1 + 𝑟𝐷2 ∥ 𝑅1
5.3. Compute the input resistance of the circuits depicted in Fig. 5.97. Assume VA=∞.
Sol:
(a)
𝑉𝑋 = 𝑉𝜋
𝑉𝜋 𝑉𝜋
𝐼𝑋 = +
𝑟𝜋 𝑅1 ∥ 𝑅2
𝑉𝑋 𝑉𝑋
𝑅𝑖𝑛 = = = 𝑅1 ∥ 𝑅2 ∥ 𝑟𝜋
𝐼𝑋 𝑉𝜋 + 𝑉𝜋
𝑟𝜋 𝑅1 ∥ 𝑅2
(b)
𝑣𝜋 1
𝑣𝜋 + 𝑅𝐵 × 1 + 𝑅𝐵 × 𝑟𝜋 + 𝑅𝐵 𝑟𝜋 + 𝑅𝐵 1 𝑅𝐵
𝑟𝜋 𝑟𝜋
𝑅𝑖𝑛,𝐸 = 𝑣𝜋 = = = ≈ +
𝑔𝑚 𝑣𝜋 + 1 𝑔𝑚 𝑟𝜋 + 1 𝛽+1 𝑔𝑚 𝛽 + 1
𝑟𝜋 𝑔𝑚 +
𝑟𝜋
1 𝑅𝐵
𝑅𝑖𝑛 = 𝑅1 ∥ 𝑅𝑖𝑛,𝐸 = 𝑅1 ∥ ( + )
𝑔𝑚 1 + 𝛽
(c)
1 1
𝑅𝑖𝑛,𝑄2 = (𝑟𝜋2 ∥ ) + 𝑅1 , 𝑅𝑖𝑛,𝑄1 = 𝑟𝜋1 + (1 + 𝛽1 ) [(𝑟𝜋2 ∥ ) + 𝑅1 ]
𝑔𝑚2 𝑔𝑚2
(d)
𝑅𝑖𝑛 = 𝑅1 + 𝑅2 ∥ [𝑟𝜋1 + (1 + 𝛽)𝑟𝜋2 ]
1
5.4. Compute the output resistance of the circuits depicted in Fig. 5.98.
Sol:
(a)
𝑣𝜋 = −𝑖𝑋 (𝑟𝜋 ∥ 𝑅𝐸 ) , 𝑣𝑋 = (𝑖𝑥 − 𝑔𝑚 𝑣𝜋 )𝑟𝑂 − 𝑣𝜋 = [𝑖𝑥 + 𝑔𝑚 𝑖𝑋 (𝑟𝜋 ∥ 𝑅𝐸 )]𝑟𝑂 + 𝑖𝑋 (𝑟𝜋 ∥ 𝑅𝐸 )

𝑣𝑋
= [1 + 𝑔𝑚 (𝑟𝜋 ∥ 𝑅𝐸 )]𝑟𝑂 + (𝑟𝜋 ∥ 𝑅𝐸 ) = 𝑟𝑂 + (𝑔𝑚 𝑟𝑂 + 1)(𝑟𝜋 ∥ 𝑅𝐸 )
𝑖𝑋
𝑅𝑜𝑢𝑡 = 𝑅1 ∥ [𝑟𝑂 + (𝑔𝑚 𝑟𝑂 + 1)(𝑟𝜋 ∥ 𝑅𝐸 )]

(b)
𝑣𝜋 𝑖𝑥 𝑅𝐸 𝑖𝑥 𝑅𝐸
− = , 𝑣𝜋 = − ∙𝑟
𝑟𝜋 𝑅𝐸 + 𝑟𝜋 + 𝑅𝐵 𝑅𝐸 + 𝑟𝜋 + 𝑅𝐵 𝜋
𝑣𝑥 − 𝑖𝑥 [𝑅𝐸 ∥ (𝑟𝜋 + 𝑅𝐵 )] 𝑖𝑥 𝑅𝐸 𝑣𝑥 − 𝑖𝑥 [𝑅𝐸 ∥ (𝑟𝜋 + 𝑅𝐵 )]

𝑖𝑥 = 𝑔𝑚 𝑣𝜋 + = −𝑔𝑚 ∙ ∙ 𝑟𝜋 +
𝑟𝑂 𝑅𝐸 + 𝑟𝜋 + 𝑅𝐵 𝑟𝑂
𝑔𝑚 𝑟𝜋 𝑅𝐸 𝑅𝐸 ∥ (𝑟𝜋 + 𝑅𝐵 ) 𝑣𝑥
𝑖𝑥 [1 + + ]=
𝑅𝐸 + 𝑟𝜋 + 𝑅𝐵 𝑟𝑂 𝑟𝑂
𝑣𝑥 𝑔𝑚 𝑟𝜋 𝑅𝐸 𝑅𝐸 ∥ (𝑟𝜋 + 𝑅𝐵 )
𝑅𝑜𝑢𝑡 = = 𝑟𝑂 [1 + + ]
𝑖𝑥 𝑅𝐸 + 𝑟𝜋 + 𝑅𝐵 𝑟𝑂
(c)
1
𝑅𝑜𝑢𝑡,𝑄2 = (𝑟𝜋2 ∥ 𝑟𝑂2 ∥ ) + 𝑅𝐸
𝑔𝑚2
1
𝑅𝑜𝑢𝑡 = 𝑟𝑂1 + (𝑔𝑚1 𝑟𝑂1 + 1) {𝑟𝜋1 ∥ [(𝑟𝜋2 ∥ 𝑟𝑂2 ∥ ) + 𝑅𝐸 ]}
𝑔𝑚2
5.5. Determine the input impedance of the circuits depicted in Fig. 5.99. Assume VA =∞.
Sol:
(a)
𝑅𝑖𝑛 = 𝑅1 ∥ 𝑟𝜋
(b)
𝑣𝜋 𝑣𝑋 1 1
v𝜋 = −𝑣𝑋 , 𝑖𝑋 = − (𝑔𝑚 𝑣𝜋 + ) , 𝑅𝑖𝑛 = = = ∥𝑟
𝑟𝜋 𝑖𝑋 𝑔 + 1 𝑔𝑚 𝜋
𝑚 𝑟𝜋
2
(c)
1 1
𝑅𝑖𝑛,𝑄2 = ∥ 𝑟𝜋2 , 𝑅𝑖𝑛,𝑄1 = 𝑟𝜋1 + (1 + 𝛽1 ) ( ∥𝑟 )
𝑔𝑚2 𝑔𝑚2 𝜋2
(d)
1 1
𝑅𝑖𝑛,𝑄2 = ∥ 𝑟𝜋2 , 𝑅𝑖𝑛,𝑄1 = 𝑟𝜋1 + (1 + 𝛽1 ) ( ∥𝑟 )
(e)
𝑅𝑖𝑛 = 𝑟𝜋2
5.6. Compute the output impedance of the circuits shown in Fig. 5.100.
Sol:
(a)
𝑅𝑜𝑢𝑡 = 𝑅𝐶 ∥ 𝑟𝑂
(b)
Q2 small signal circuit.
𝑣𝑋 1
= 𝑟𝜋2 ∥ ∥𝑟
𝑖𝑋 𝑔𝑚2 𝑂2
RE is the input resistor of Q2.
𝑣𝑋
= [1 + 𝑔𝑚1 (𝑟𝜋1 ∥ 𝑅𝐸 )]𝑟𝑂1 + (𝑟𝜋1 ∥ 𝑅𝐸 ) = 𝑟𝑂1 + (𝑔𝑚1 𝑟𝑂1 + 1)(𝑟𝜋1 ∥ 𝑅𝐸 )
𝑖𝑋
1
𝑅𝑜𝑢𝑡 = 𝑟𝑂1 + (𝑔𝑚1 𝑟𝑂1 + 1) (𝑟𝜋1 ∥ 𝑟𝜋2 ∥ ∥𝑟 )
𝑔𝑚2 𝑂2
5.7. Compute the bias point of the circuits depicted in Fig. 5.101. Assume β = 100, IS = 6 × 10−16 A, and VA =∞.
Sol:
(a)
Assume Q1 is at active region.
𝑉𝐶𝐶 − 𝑉𝐵𝐸 𝐼𝐶
𝐼𝐶 = × 𝛽 , 𝑉𝐵𝐸 = 𝑉𝑇 ln
𝑅𝐵 𝐼𝑆
Assume 𝑉𝐵𝐸 = 800𝑚𝑉 , 𝐼𝐶 ≅ 1.7𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛

𝑉𝐵𝐸 ≅ 745.48𝑚𝑉 , 𝐼𝐶 ≅ 1.75𝑚𝐴
𝑉𝐵𝐸 ≅ 746.24𝑚𝑉 , 𝐼𝐶 ≅ 1.75𝑚𝐴
𝑉𝐵𝐸 = 746.24𝑚𝑉 , 𝐼𝐶 = 1.75𝑚𝐴 , 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 = 1.625𝑉 > 𝑉𝐵𝐸
Q1 is at active region.
3
(b)
Q2 is at the edge of active region, assume Q1 is at active region.
𝑉𝐶𝐶 − 𝑉𝐵𝐸1 − 𝑉𝐵𝐸2 𝐼𝐶1
𝐼𝐶1 = × 𝛽 , 𝑉𝐵𝐸1 = 𝑉𝑇 ln = 𝑉𝐵𝐸2
𝑅𝐵 𝐼𝑆
Assume 𝑉𝐵𝐸1 = 𝑉𝐵𝐸2 = 800𝑚𝑉 , 𝐼𝐶1 ≅ 900𝜇𝐴 = 𝐼𝐶2 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛

𝑉𝐵𝐸1 ≅ 728.95𝑚𝑉 = 𝑉𝐵𝐸2 , 𝐼𝐶1 ≅ 1.04𝑚𝐴 = 𝐼𝐶2
𝑉𝐵𝐸1 ≅ 732.71𝑚𝑉 = 𝑉𝐵𝐸2 , 𝐼𝐶1 ≅ 1.03𝑚𝐴 = 𝐼𝐶2
𝑉𝐵𝐸1 = 732.46𝑚𝑉 = 𝑉𝐵𝐸2 , 𝐼𝐶1 = 1.03𝑚𝐴 = 𝐼𝐶2 , 𝑉𝐶𝐸1 = 𝑉𝐶𝐶 − 𝐼𝐶1 𝑅𝐶 − 𝑉𝐵𝐸2 = 737.54𝑚𝑉 > 𝑉𝐵𝐸1
(c)
𝑉𝐶𝐶 − 𝑉𝐵𝐸 − 0.5𝑉 𝐼𝐶
𝑅𝐵 𝐼𝑆

𝑉𝐵𝐸 ≅ 736.43𝑚𝑉 , 𝐼𝐶 ≅ 1.26𝑚𝐴
𝑉𝐵𝐸 ≅ 737.70𝑚𝑉 , 𝐼𝐶 ≅ 1.26𝑚𝐴
𝑉𝐵𝐸 = 737.70𝑚𝑉 , 𝐼𝐶 = 1.26𝑚𝐴 , 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 0.5𝑉 = 0.74𝑉 > 𝑉𝐵𝐸
5.8. Construct the small-signal equivalent of each of the circuits in Problem 5.7.
Sol:
(a)
𝐼𝐶 1.75𝑚𝐴
𝑔𝑚 = = ≅ 67.31𝑚𝑆
𝑉𝑇 26𝑚𝑉
𝛽 100
𝑟𝜋 = = ≅ 1.49𝐾Ω
𝑔𝑚 67.31𝑚𝑆
(b)
𝐼𝐶1 1.03𝑚𝐴
𝑔𝑚1 = = ≅ 39.62𝑚𝑆 = 𝑔𝑚2
𝑉𝑇 26𝑚𝑉
𝛽 100
𝑟𝜋1 = = ≅ 2.52𝐾Ω = 𝑟𝜋2
𝑔𝑚1 39.62𝑚𝑆
(c)
𝑔𝑚 = = ≅ 48.46𝑚𝑆
𝑉𝑇 26𝑚𝑉
𝛽 100
𝑟𝜋 = = ≅ 2.06𝐾Ω
4
*5.9. Calculate the bias point of the circuits shown in Fig. 5.102. Assume β = 100, IS = 5 × 10−16 A, and VA =∞.
Sol:
(a)
16𝐾Ω
𝑉𝑡ℎ = 2.5𝑉 × = 0.8𝑉
34𝐾Ω + 16𝐾Ω
𝑅𝑡ℎ = 34𝐾Ω ∥ 16𝐾Ω = 10.88𝐾Ω
𝑉𝑡ℎ − 𝑉𝐵𝐸 𝐼𝐶
𝑅𝑡ℎ 𝐼𝑆
Assume 𝑉𝐵𝐸 = 700𝑚𝑉 , 𝐼𝐶 ≅ 919.12𝜇𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛

𝑉𝐵𝐸 ≅ 734.24𝑚𝑉 , 𝐼𝐶 ≅ 604.41𝜇𝐴 , 𝑉𝐵𝐸 ≅ 723.34𝑚𝑉 , 𝐼𝐶 ≅ 704.60𝜇𝐴 , 𝑉𝐵𝐸 ≅ 727.33𝑚𝑉 , 𝐼𝐶 ≅ 667.92𝜇𝐴
𝑉𝐵𝐸 = 726.32𝑚𝑉 , 𝐼𝐶 = 677.21𝜇𝐴 , 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 = 468.37𝑚𝑉 < 𝑉𝐵𝐸
𝑉𝐵𝐸 − 𝑉𝐶𝐸 = 257.95𝑚𝑉, 𝑖𝑛 𝑠𝑜𝑓𝑡 𝑠𝑎𝑡𝑢𝑟𝑎𝑡𝑒𝑑 𝑟𝑒𝑔𝑖𝑜𝑛, 𝑎𝑠𝑠𝑢𝑚𝑒 𝑠𝑡𝑖𝑙𝑙 𝑜𝑘.
(b)
16𝐾Ω
𝑉𝑡ℎ = 2.5𝑉 × = 1.6𝑉 , 𝑅𝑡ℎ = 9𝐾Ω ∥ 16𝐾Ω = 5.76𝐾Ω
9𝐾Ω + 16𝐾Ω
𝑉𝑡ℎ − 𝑉𝐵𝐸1 − 𝑉𝐵𝐸2 𝐼𝐶1 𝐼𝐶2
𝐼𝐶1 = × 𝛽 , 𝑉𝐵𝐸1 = 𝑉𝑇 ln , 𝐼𝐶2 = 𝐼𝐸1 , 𝑉𝐵𝐸2 = 𝑉𝑇 ln
𝑅𝑡ℎ 𝐼𝑆 𝐼𝑆
Assume 𝑉𝐵𝐸1 = 𝑉𝐵𝐸2 = 750𝑚𝑉 , 𝐼𝐶1 ≅ 1.74𝑚𝐴 , 𝐼𝐶2 ≅ 1.76𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛

𝑉𝐵𝐸1 ≅ 750.83𝑚𝑉 , 𝑉𝐵𝐸2 ≅ 751.13𝑚𝑉 , 𝐼𝐶1 ≅ 1.70𝑚𝐴 , 𝐼𝐶2 ≅ 1.72𝑚𝐴
𝑉𝐵𝐸1 = 750.45𝑚𝑉 , 𝑉𝐵𝐸2 = 750.75𝑚𝑉 , 𝐼𝐶1 = 1.715𝑚𝐴 , 𝐼𝐶2 = 1.732𝑚𝐴 , 𝑉𝐶𝐸1 = 𝑉𝐶𝐶 − 𝐼𝐶1 𝑅𝐶 − 𝑉𝐵𝐸2 = 891.75𝑚𝑉 > 𝑉𝐵𝐸1
(c)
13𝐾Ω
𝑉𝑡ℎ = 2.5𝑉 × = 1.3𝑉 , 𝑅𝑡ℎ = 12𝐾Ω ∥ 13𝐾Ω = 6.24𝐾Ω
12𝐾Ω + 13𝐾Ω
𝑉𝑡ℎ − 𝑉𝐵𝐸 − 0.5𝑉 𝐼𝐶

𝑉𝐵𝐸 = 736.775𝑚𝑉 , 𝐼𝐶 = 1013.22𝜇𝐴 , 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 0.5𝑉 = 986.78𝑚𝑉 > 𝑉𝐵𝐸
5
5.10. In the circuit of Fig. 5.103, β = 100, VA =∞. (a) If the collector current of Q1 is equal to 1 mA, calculate the value of IS. (b) If
Q1 is biased at the edge of saturation, calculate the value of IS.
Sol:
(a)
30𝐾Ω
𝑉𝑡ℎ = 2.5𝑉 × ≅ 1.07𝑉 , 𝑅𝑡ℎ = 40𝐾Ω ∥ 30𝐾Ω ≅ 17.14𝐾Ω
40𝐾Ω + 30𝐾Ω
𝑉𝑡ℎ = 𝐼𝐵 𝑅𝑡ℎ + 𝑉𝐵𝐸 + 𝐼𝐸 𝑅𝐸 , 1.07𝑉 = 10𝜇𝐴 × 17.14𝐾Ω + 𝑉𝐵𝐸 + 1.01𝑚𝐴 × 500Ω
𝐼𝐶
𝑉𝐵𝐸 = 393.6𝑚𝑉 , 𝐼𝑆 = 𝑉𝐵𝐸 ≅ 2.66 × 10−10 𝐴
𝑒 𝑉𝑇
𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝐼𝐸 𝑅𝐸 = 995𝑚𝑉 > 𝑉𝐵𝐸 , Q1 is at active region.
(b)
Q1 is biased at the edge of saturation, 𝑉𝐵 = 𝑉𝐶 .
𝑉𝑡ℎ − 𝐼𝐵 𝑅𝑡ℎ = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 , 𝐼𝐶 = 1.726𝑚𝐴 , 𝑉𝐵𝐸 = 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝐼𝐸 𝑅𝐸 = −97.63𝑚𝑉 , impossible!
Q1 can not biased at the edge of saturation. To avoid entering the deep saturation region, 𝑉𝐶𝐸 > 200𝑚𝑉
𝑉𝐶𝐶 −𝑉𝐶𝐸 2.5𝑉−200𝑚𝑉
By KVL: 𝑉𝐶𝐶 = 𝐼𝐶 𝑅𝐶 + 𝑉𝐶𝐸 + 𝐼𝐸 𝑅𝐸 , 𝐼𝐶 = 1+𝛽 , 𝐼𝐶 < 101 , 𝐼𝐶 < 1.53𝑚𝐴
𝑅𝐶 + 𝑅 1𝐾Ω+ ×500Ω
𝛽 𝐸 100
𝑅𝑡ℎ
𝑉𝐶𝐶 − 𝑉𝑡ℎ 𝑉𝐶𝐶 − 𝑉𝐶𝐶 × 𝑅1
𝑉𝑡ℎ − 𝐼𝐵 𝑅𝑡ℎ = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 , 𝐼𝑐 = = , 𝑅𝑡ℎ > 20.55𝐾Ω , 𝑅2 > 42.26𝐾Ω
𝑅 𝑅
𝑅𝐶 − 𝑡ℎ 𝑅𝐶 − 𝑡ℎ
𝛽 𝛽
R2 must be changed to 42.26𝐾Ω in order for Q1 to be biased at the edge of the saturation region.
We choose R2=43 𝐾Ω
43𝐾Ω
𝑉𝑡ℎ = 2.5𝑉 × ≅ 1.3𝑉 , 𝑅𝑡ℎ = 40𝐾Ω ∥ 43𝐾Ω ≅ 20.72𝐾Ω
40𝐾Ω + 43𝐾Ω
Q1 is biased at the edge of saturation, 𝑉𝐵 = 𝑉𝐶 .
𝑉𝑡ℎ − 𝐼𝐵 𝑅𝑡ℎ = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 , 𝐼𝐶 ≅ 1.51𝑚𝐴 , 𝑉𝐵𝐸 = 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝐼𝐸 𝑅𝐸 = 227.45𝑚𝑉
𝐼𝐶
𝐼𝑆 = 𝑉𝐵𝐸 ≅ 2.4 × 10−7 𝐴
𝑒 𝑉𝑇
5.11. Consider the circuit of Fig. 5.104, where β = 100, IS = 5 × 10−15 A and VA =∞. Calculate the value of IC and VCE.
Sol:
18𝐾Ω
𝑉𝑡ℎ = 2.5𝑉 × = 0.75𝑉 , 𝑅𝑡ℎ = 42𝐾Ω ∥ 18𝐾Ω = 12.6𝐾Ω
42𝐾Ω + 18𝐾Ω
𝑅𝑡ℎ + (1 + 𝛽)𝑅𝐸 𝐼𝑆

𝑉𝐵𝐸 = 632.79𝑚𝑉 , 𝐼𝐶 = 185.75𝜇𝐴 , 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝐼𝐸 𝑅𝐸 ≅ 2.22𝑉 > 𝑉𝐵𝐸 Q1 is at active region.
6
5.12. For the circuit of Fig. 5.105 where β = 100, IS = 5 × 10−15 A and VA =∞, what is the minimum value of RB that guarantees the
operation of Q1 in the active mode?
Sol:
Guarantees the operation of Q1 in the active mode, 𝑉𝐶𝐸 > 𝑉𝐵𝐸 .
At the edge of active region, 𝑉𝐶 = 𝑉𝐵 :
𝑉𝐶𝐶 − 𝑉𝐶𝐸 𝐼𝐶
𝐼𝐶 = , 𝑉𝐶𝐸 = 𝑉𝐵𝐸 = 𝑉𝑇 ln
𝑅𝐶 𝐼𝑆
Assume 𝑉𝐵𝐸 = 800𝑚𝑉 , 𝐼𝐶 ≅ 850𝜇𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛

𝑉𝐵 − 𝑉𝐵𝐸
𝑉𝐵𝐸 = 674.19𝑚𝑉 , 𝐼𝐶 = 912.91𝜇𝐴 , 𝑅𝐵 = ≅ 90.46𝐾Ω
𝐼𝐵
5.13. For the CE stage depicted in Fig. 5.106, where β = 100, IS = 5 × 10−16 A and VA =∞, determine the gain, input, and output
impedance.
Sol:
16𝐾Ω
𝑉𝑡ℎ = 2𝑉 × = 0.8𝑉 , 𝑅𝑡ℎ = 24𝐾Ω ∥ 16𝐾Ω = 9.6𝐾Ω
24𝐾Ω + 16𝐾Ω
𝑉𝑡ℎ = 𝐼𝐵 𝑅𝑡ℎ + 𝑉𝐵𝐸 , 𝐼𝐶 = × 𝛽 , 𝑉𝐵𝐸 = 𝑉𝑇 ln

𝑉𝐵𝐸 = 728.72𝑚𝑉 , 𝐼𝐶 = 742.5𝜇𝐴 , 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 ≅ 1.26𝑉 > 𝑉𝐵𝐸
𝐼𝐶 742.5𝜇𝐴 𝛽 100
𝑔𝑚 = = ≅ 28.56mS , 𝑟𝜋 = = ≅ 3.5𝐾Ω
𝑉𝑇 26𝑚𝑉 𝑔𝑚 28.56mS
𝐴𝑣 = −𝑔𝑚 𝑅𝐶 = −28.56𝑚𝑆 × 1𝐾Ω = −28.56 , 𝑅𝑖𝑛 = 𝑅1 ∥ 𝑅2 ∥ 𝑟𝜋 ≅ 2.56𝐾Ω , 𝑅𝑜𝑢𝑡 = 𝑅𝐶 = 1𝐾Ω

5.14. The circuit of Fig. 5.107 is designed for a collector current of 0.5 mA. Assume β = 100, IS = 5 × 10−15 A and VA =∞.
Determine the required value of RE.
Sol:
𝐼𝐶 = 0.5𝑚𝐴 , 𝑉𝐵𝐸 = 𝑉𝑇 ln = 26𝑚𝑉 ln ≅ 658.54𝑚𝑉
𝐼𝑆 5 × 10−15 𝐴
10𝐾Ω
𝑉𝑡ℎ = 3𝑉 × = 1𝑉 , 𝑅𝑡ℎ = 20𝐾Ω ∥ 10𝐾Ω = 6.67𝐾Ω
20𝐾Ω + 10𝐾Ω
𝑉𝑡ℎ = 𝐼𝐵 𝑅𝑡ℎ + 𝑉𝐵𝐸 + 𝐼𝐸 𝑅𝐸 , 1𝑉 = 5𝜇𝐴 × 6.67𝐾Ω + 658.54𝑚𝑉 + 505𝜇𝐴 × 𝑅𝐸
311.13𝑚𝑉
𝑅𝐸 = = 616.01Ω
505𝜇𝐴
7
5.15. In the circuit of Fig. 5.108, determine the value of R1 that guarantees operation of Q1 in the active mode. Assume β = 100, IS
= 10−16 A and VA =∞.
Sol:
Guarantees the operation of Q1 in the active mode, 𝑉𝐶𝐸 > 𝑉𝐵𝐸 .
At the edge of active region, 𝑉𝐶 = 𝑉𝐵 :
𝑉𝐶𝐶 − 𝑉𝐶𝐸 𝐼𝐶
𝐼𝐶 = , 𝑉𝐶𝐸 = 𝑉𝐵𝐸 = 𝑉𝑇 ln
𝑅𝐶 𝐼𝑆
Assume 𝑉𝐵𝐸 = 800𝑚𝑉 , 𝐼𝐶 ≅ 850𝜇𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛

𝑉𝐵𝐸 ≅ 774.05𝑚𝑉 , 𝐼𝐶 ≅ 862.98𝜇𝐴 , 𝑉𝐵𝐸 ≅ 774.44𝑚𝑉 , 𝐼𝐶 ≅ 862.78𝜇𝐴
𝑉𝐶𝐶 − 𝑉𝐵𝐸 𝑉𝐵𝐸 2.5𝑉 − 774.44𝑚𝑉 774.44𝑚𝑉
𝑉𝐵𝐸 = 774.44𝑚𝑉 , 𝐼𝐶 = 862.78𝜇𝐴 , = + 𝐼𝐵 , = + 8.63𝜇𝐴
𝑅1 𝑅2 30𝐾Ω 𝑅2
𝑅2 = 15.84𝐾Ω , Guarantees the operation of Q1 in the active mode, 𝑅2 < 15.84𝐾Ω

5.16. In the circuit of Fig. 5.109, β1 = β2 = 100, IS1 = IS2 = 4 × 10−15 A and VA= ∞. Determine the operating point of the transistor
and voltage gain.
Sol:
15𝐾Ω
𝑉𝑡ℎ = 2.5𝑉 × = 1.5𝑉 , 𝑅𝑡ℎ = 10𝐾Ω ∥ 15𝐾Ω = 6𝐾Ω
10𝐾Ω + 15𝐾Ω
𝑉𝑡ℎ − 𝑉𝐵𝐸1 − 𝑉𝐵𝐸2 𝐼𝐶1 𝛽 𝛽 𝐼𝐶2
𝐼𝐶1 = × 𝛽 , 𝑉𝐵𝐸1 = 𝑉𝑇 ln , 𝐼𝐶2 = × 𝐼𝐸2 = × 𝐼𝐸1 , 𝑉𝐵𝐸2 = 𝑉𝑇 ln
𝑅𝑡ℎ 𝐼𝑆 𝛽+1 𝛽+1 𝐼𝑆

𝑉𝐵𝐸1 = 696.84𝑚𝑉 , 𝑉𝐵𝐸2 = 697.28𝑚𝑉 , 𝐼𝐶1 = 1.76𝑚𝐴 , 𝐼𝐶2 = 1.78𝑚𝐴 , 𝑉𝐶𝐸1 = 𝑉𝐶𝐶 − 𝐼𝐶1 𝑅𝐶 − 𝑉𝐵𝐸2 = 1626.72𝑚𝑉 > 𝑉𝐵𝐸1
𝐼𝐶1 1.76𝑚𝐴 𝐼𝐶2 1.78𝑚𝐴
𝑔𝑚1 = = ≅ 67.69𝑚𝑆 , 𝑔𝑚2 = = ≅ 68.46𝑚𝑆
𝑉𝑇 26𝑚𝑉 𝑉𝑇 26𝑚𝑉
𝛽 100 𝛽 100
𝑟𝜋1 = = ≅ 1.48𝐾Ω , 𝑟𝜋2 = = ≅ 1.46𝐾Ω
𝑔𝑚1 67.69𝑚𝑆 𝑔𝑚2 68.46𝑚𝑆
1
Q2 is a resistance with a value of ∥ 𝑟𝜋2 .
𝑔𝑚2
𝑣𝜋1 1
𝑣𝑖𝑛 = 𝑣𝜋1 + 𝑣𝑟𝜋2 = 𝑣𝜋1 + ( + 𝑔𝑚1 𝑣𝜋1 ) ( ∥ 𝑟 ) , 𝑣𝑜𝑢𝑡 = −𝑔𝑚1 𝑣𝜋1 𝑅𝐶
𝑟𝜋1 𝑔𝑚2 𝜋2
𝑣𝑜𝑢𝑡 −𝑔𝑚1 𝑣𝜋1 𝑅𝐶 −𝑔𝑚1 𝑅𝐶 −𝑅𝐶
𝐴𝑣 = = = = ≅ −3.4
𝑣𝑖𝑛 𝑣 1 1 1 1 1
𝑣𝜋1 + ( 𝜋1 + 𝑔𝑚1 𝑣𝜋1 ) ( ∥ 𝑟𝜋2 ) 1 + ( + 𝑔𝑚1 ) ( ∥ 𝑟𝜋2 ) 𝑔 + 𝑔
𝑟𝜋1 𝑔𝑚2 𝑟𝜋1 𝑔𝑚2 𝑚1 𝑚2
8
5.17. Consider the circuit of Fig. 5.110, where IS1 = 2IS2 = 3IS3 = 5 × 10−15A, β1 = β2 = β3 = 100, and VA =∞. Determine collector
currents ofQ1, Q2 and Q3.
Sol:
12𝐾Ω
𝑉𝑡ℎ = 2.5𝑉 × = 1.2𝑉 , 𝑅𝑡ℎ = 13𝐾Ω ∥ 12𝐾Ω = 6.24𝐾Ω
13𝐾Ω + 12𝐾Ω
Q3 is at the edge of active region, assume Q1 and Q2 is at active region.
3 3.03 𝐼𝐸3
𝐼𝑆1 = 2𝐼𝑆2 ⟹ 𝐼𝐶1 = 2𝐼𝐶2 , 𝐼𝐸3 = 𝐼𝐸1 + 𝐼𝐸2 = 𝐼𝐸1 = 𝐼𝐶1 , 𝐼𝐶3 = = 1.5𝐼𝐶1
2 2 1.01
𝑉𝑡ℎ − 𝑉𝐵𝐸1 − 𝑉𝐵𝐸3 𝐼𝐶1 𝐼𝐶3

𝐼𝐶1 = × 𝛽 , 𝑉𝐵𝐸1 = 𝑉𝑇 ln , 𝑉𝐵𝐸3 = 𝑉𝑇 ln
𝑅𝑡ℎ 𝐼𝑆1 𝐼𝑆3

𝑉𝐵𝐸1 ≅ 688.78𝑚𝑉 , 𝑉𝐵𝐸3 ≅ 727.89𝑚𝑉 , 𝐼𝐶1 ≅ −3.47𝑚𝐴 , 𝐼𝐶3 ≅ −5.21𝑚𝐴
Q1 is not at active region.
Assume Q1 is at deep saturation region. VCE1=0.2V
𝑉𝐶𝐶 − 𝑉𝐶𝐸1 − 𝑉𝐵𝐸3 𝐼𝐶3
𝐼𝐶1 = , 𝑉𝐵𝐸3 = 𝑉𝑇 ln
𝑅𝐶 𝐼𝑆3
Assume 𝑉𝐵𝐸3 = 700𝑚𝑉 , 𝐼𝐶1 ≅ 1.60𝑚𝐴 , 𝐼𝐶3 ≅ 2.4𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛

𝑉𝐵𝐸3 ≅ 727.89𝑚𝑉 , 𝐼𝐶1 ≅ 1.57𝑚𝐴 , 𝐼𝐶3 ≅ 2.36𝑚𝐴 , 𝑉𝐵𝐸3 ≅ 727.45𝑚𝑉 , 𝐼𝐶1 ≅ 1.57𝑚𝐴 , 𝐼𝐶3 ≅ 2.36𝑚𝐴
𝑉𝐵𝐸3 = 727.45𝑚𝑉 , 𝐼𝐶1 = 1.57𝑚𝐴 , 𝐼𝐶3 = 2.36𝑚𝐴 , 𝐼𝐶2 = 785𝜇𝐴
𝑉𝐵𝐸1 ≅ 688.29𝑚𝑉 , 𝑉𝐵𝐸1 − 𝑉𝐶𝐸1 = 488.29𝑚𝑉 > 400𝑚𝑉 , 𝑉𝐵𝐸2 ≅ 688.29 , 𝑉𝐶𝐸2 = 𝑉𝐶𝐶 − 𝑉𝐵𝐸2 − 𝑉𝐵𝐸3 = 1084.26𝑚𝑉 > 𝑉𝐵𝐸2
Q1 is at deep saturation region, Q2 is at active region.
5.18. The circuit of Fig. 5.111 must be biased with a collector current of 0.5 mA. Compute the required value of RB if β = 100, IS =
5 × 10−15 A and VA =∞.
Sol:
𝐼𝐶 = 0.5𝑚𝐴 , 𝑉𝐵𝐸 = 𝑉𝑇 ln = 26𝑚𝑉 × ln ≅ 658.54𝑚𝑉
𝐼𝑆 5 × 10−15 𝐴
𝑉𝐶𝐶 − 𝑉𝐵𝐸 − 𝐼𝐸 𝑅𝐶 2.5𝑉 − 658.54𝑚𝑉 − 0.505𝑚𝐴 × 1𝐾Ω

𝑉𝐶𝐶 = 𝐼𝐸 𝑅𝐶 + 𝐼𝐵 𝑅𝐵 + 𝑉𝐵𝐸 , 𝑅𝐵 = = ≅ 267.29KΩ
𝐼𝐵 5𝜇𝐴
5.19. In the circuit of Fig. 5.112, if β = 100, IS = 5 × 10−15 A, determine VX and IC .

Sol:
𝑉𝐶𝐶 −𝑉𝐵𝐸 𝐼𝐶 X
By KVL: 𝑉𝐶𝐶 = 𝐼𝐸 𝑅𝐶 + 𝐼𝐵 𝑅𝐵 + 𝑉𝐵𝐸 , 𝐼𝐶 = × 𝛽 , 𝑉𝐵𝐸 = 𝑉𝑇 ln
𝑅𝐵 +(1+𝛽)𝑅𝐶 𝐼𝑆
Assume 𝑉𝐵𝐸 = 700𝑚𝑉 , 𝐼𝐶 ≅ 4.47𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛:

𝑉𝐵𝐸 ≅ 715.49𝑚𝑉 , 𝐼𝐶 ≅ 4.43𝑚𝐴 , 𝑉𝐵𝐸 ≅ 715.26𝑚𝑉 , 𝐼𝐶 ≅ 4.43𝑚𝐴 ,
𝑉𝐵𝐸 = 715.26𝑚𝑉 , 𝐼𝐶 = 4.43𝑚𝐴 , 𝑉𝑋 = 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 ≅ 1.17𝑉 > 𝑉𝐵𝐸 , Q1 is at active region.
9
5.20. Due to a manufacturing error, a parasitic resistor, RP, has appeared in series with the collector of Q1 in Fig. 5.113. What is
the minimum allowable value of RB if the base-collector forward bias must not exceed 200 mV? Assume IS = 3 × 10−16 A, β
= 100, and VA =∞.
Sol:
Base-collector forward bias must not exceed 200 mV, Q1 is at soft saturation region.
𝑉𝐶𝐶 −𝑉𝐵𝐸 +200𝑚𝑉 𝐼𝐶
By KVL: 𝑉𝐶𝐶 = 𝐼𝐸 𝑅𝐶 + 𝐼𝐶 𝑅𝑃 − 200𝑚𝑉 + 𝑉𝐵𝐸 , 𝐼𝐶 = 𝛽+1 , 𝑉𝐵𝐸 = 𝑉𝑇 ln
𝑅𝑃 + 𝑅 𝐼𝑆
𝛽 𝐶

𝑉𝐵𝐸 ≅ 756.73𝑚𝑉 , 𝐼𝐶 ≅ 1.30𝑚𝐴 , 𝑉𝐵𝐸 ≅ 756.53𝑚𝑉 , 𝐼𝐶 ≅ 1.30𝑚𝐴 ,
𝑉𝐵𝐸 = 756.53𝑚𝑉 , 𝐼𝐶 = 1.30𝑚𝐴 , 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐸 𝑅𝐶 − 𝐼𝐶 𝑅𝑃 ≅ 537𝑚𝑉 , 𝑉𝐵𝐸 − 𝑉𝐶𝐸 = 219.53𝑚𝑉
Q1 is at soft saturation region.
𝑉𝐵𝐶 < 200𝑚𝑉 , 𝑉𝐶𝐶 − 𝐼𝐸 𝑅𝐶 − 𝐼𝐵 𝑅𝐵 − 𝑉𝐶𝐸 < 200𝑚𝑉 , 𝑅𝐵 > 34.62𝐾Ω
5.21. Consider the circuit shown in Fig. 5.114, where IS = 6 × 10−16 A, β = 100, and VA =∞. Calculate the operating point of Q1.
Sol:
𝑉𝐶𝐶 −𝑉𝐵𝐸 𝐼𝐶
By KVL: 𝑉𝐶𝐶 = 𝐼𝐸 (𝑅𝐶 + 𝑅𝐸 ) + 𝐼𝐵 𝑅𝐵 + 𝑉𝐵𝐸 , 𝐼𝐶 = × 𝛽 , 𝑉𝐵𝐸 = 𝑉𝑇 ln
𝑅𝐵 +(1+𝛽)(𝑅𝐶 +𝑅𝐸 ) 𝐼𝑆

𝑉𝐵𝐸 ≅ 743.58𝑚𝑉 , 𝐼𝐶 ≅ 1.58𝑚𝐴 , 𝑉𝐵𝐸 = 743.58𝑚𝑉 , 𝐼𝐶 = 1.58𝑚𝐴 , 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐸 (𝑅𝐶 + 𝑅𝐸 ) ≅ 1.06𝑉 > 𝑉𝐵𝐸
5.22. In the circuit of Fig. 5.115, β = 100, IS = 5 × 10−15 A and of VA =∞. Determine the operating point of Q1.
Sol:
𝑉𝐶𝐶 −𝑉𝐵𝐸 𝐼𝐶
By KVL: 𝑉𝐶𝐶 = 𝐼𝐸 (𝑅𝐶 + 𝑅𝐸 ) + 𝐼𝐵 𝑅𝐵 + 𝑉𝐵𝐸 , 𝐼𝐶 = × 𝛽 , 𝑉𝐵𝐸 = 𝑉𝑇 ln
𝑅𝐵 +(1+𝛽)(𝑅𝐶 +𝑅𝐸 ) 𝐼𝑆

𝑉𝐵𝐸 ≅ 685.68𝑚𝑉 , 𝐼𝐶 ≅ 1.43𝑚𝐴 , 𝑉𝐵𝐸 ≅ 685.86𝑚𝑉 , 𝐼𝐶 ≅ 1.43𝑚𝐴
𝑉𝐵𝐸 = 685.86𝑚𝑉 , 𝐼𝐶 = 1.43𝑚𝐴 , 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐸 (𝑅𝐶 + 𝑅𝐸 ) ≅ 833.55𝑚𝑉 > 𝑉𝐵𝐸
5.23. In the circuit of Fig. 5.116, IS1 = IS2 = 4 × 10−16A, β1 = β2 = 100 and VA =∞. Calculate VB such that Q1 carries a collector
current of 1 mA.
Sol:
𝐼𝐶
𝐼𝐶 = 1𝑚𝐴 , 𝑉𝐵𝐸 = 𝑉𝑇 ln ≅ 742.23𝑚𝑉
𝐼𝑆
𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 2𝐼𝐸 𝑅𝐸 = 1.69𝑉 > 𝑉𝐵𝐸 , Q1 is at active region.

𝑉𝐵 = 𝑉𝐵𝐸 + 2𝐼𝐸 𝑅𝐸 = 742.23𝑚𝑉 + 2 × 1.01 × 1𝑚𝐴 × 500Ω ≅ 1.75𝑉
10
5.24. Determine the bias point of circuit shown in Fig. 5.117 given IS = 9 × 10−16A, β = 100 and VA =∞.
Sol:
𝑉𝐶𝐶 −𝑉𝐸𝐵 𝐼𝐶
By KVL: 𝑉𝐶𝐶 = 𝐼𝐸 𝑅𝐸 + 𝐼𝐵 𝑅𝐵 + 𝑉𝐸𝐵 , 𝐼𝐶 = × 𝛽 , 𝑉𝐸𝐵 = 𝑉𝑇 ln
𝑅𝐵 +(1+𝛽)𝑅𝐸 𝐼𝑆
Assume 𝑉𝐸𝐵 = 700𝑚𝑉 , 𝐼𝐶 ≅ 1.63𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛:

𝑉𝐸𝐵 ≅ 733.85𝑚𝑉 , 𝐼𝐶 ≅ 1.61𝑚𝐴 , 𝑉𝐸𝐵 ≅ 733.53𝑚𝑉 , 𝐼𝐶 ≅ 1.61𝑚𝐴
𝑉𝐸𝐵 = 733.53𝑚𝑉 , 𝐼𝐶 = 1.61𝑚𝐴 , 𝑉𝐸𝐶 = 𝑉𝐶𝐶 − 𝐼𝐸 𝑅𝐸 − 𝐼𝐶 𝑅𝐶 ≅ 1.05𝑉 > 𝑉𝐸𝐵
5.25. Calculate the bias point of the circuits shown in Fig. 5.118. Assume βnpn = 2βpnp = 100, IS = 9 × 10−16 A, and VA =∞.
Sol:
(a)
18𝐾Ω
𝑉𝑡ℎ = 2.5𝑉 × = 900𝑚𝑉 , 𝑅𝑡ℎ = 32𝐾Ω ∥ 18𝐾Ω = 11.52𝐾Ω
32𝐾Ω + 18𝐾Ω
𝑉𝐶𝐶 −𝑉𝐸𝐵 −𝑉𝑡ℎ 𝐼𝐶

By KVL: 𝑉𝐶𝐶 = 𝐼𝐵 𝑅𝑡ℎ + 𝑉𝐸𝐵 + 𝑉𝑡ℎ , 𝐼𝐶 = × 𝛽𝑝𝑛𝑝 , 𝑉𝐸𝐵 = 𝑉𝑇 ln

𝑉𝐸𝐵 = 754.95𝑚𝑉 , 𝐼𝐶 = 3.67𝑚𝐴 , 𝑉𝐸𝐶 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 ≅ 2.13𝑉 > 𝑉𝐸𝐵
(b)
18𝐾Ω
𝑉𝑡ℎ = 2.5𝑉 × = 900𝑚𝑉 , 𝑅𝑡ℎ = 32𝐾Ω ∥ 18𝐾Ω = 11.52𝐾Ω
32𝐾Ω + 18𝐾Ω
𝑉𝐶𝐶 −𝑉𝐵𝐸1 −𝑉𝐸𝐵2 −𝑉𝑡ℎ 100 100 51

By KVL: 𝑉𝐶𝐶 = 𝑉𝐵𝐸1 + 𝑉𝐸𝐵2 + 𝐼𝐵2 𝑅𝑡ℎ + 𝑉𝑡ℎ , 𝐼𝐶2 = × 𝛽𝑝𝑛𝑝 , 𝐼𝐸1 = 𝐼𝐸2 , 𝐼𝐶1 = 𝐼 = × 𝐼
𝑅𝑡ℎ 101 𝐸1 101 50 𝐶2
𝐼𝐶2 𝐼𝐶1
𝑉𝐸𝐵2 = 𝑉𝑇 ln , 𝑉𝐵𝐸1 = 𝑉𝑇 ln
𝐼𝑆 𝐼𝑆
Assume 𝑉𝐵𝐸1 = 𝑉𝐸𝐵2 = 700𝑚𝑉 , 𝐼𝐶2 ≅ 868.06𝜇𝐴 , 𝐼𝐶1 ≅ 876.65𝜇𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛:

𝑉𝐸𝐵2 ≅ 755.09𝑚𝑉 , 𝑉𝐵𝐸1 ≅ 717.47𝑚𝑉 , 𝐼𝐶2 ≅ 553.13𝜇𝐴 , 𝐼𝐶1 ≅ 558.61𝜇𝐴
𝑉𝐸𝐵2 ≅ 713.70𝑚𝑉 , 𝑉𝐵𝐸1 ≅ 713.95𝑚𝑉 , 𝐼𝐶2 ≅ 748.05𝜇𝐴 , 𝐼𝐶1 ≅ 755.45𝜇𝐴 , 𝑉𝐸𝐶2 = 𝑉𝐶𝐶 − 𝑉𝐵𝐸1 − 𝐼𝐶2 𝑅𝐶2 ≅ 1.03𝑉 > 𝑉𝐸𝐵
11
5.26. Calculate the value of RE in Fig. 5.119 such that Q1 sustains a reverse bias of 300 mV across its base-collector junction.
Assume β = 50, IS = 8 × 10−16 A, and VA =∞. What happens if the value of RE is halved?
Sol:
10𝐾Ω
𝑉𝑡ℎ = 2.5𝑉 × = 1.25𝑉 , 𝑅𝑡ℎ = 10𝐾Ω ∥ 10𝐾Ω = 5𝐾Ω
10𝐾Ω + 10𝐾Ω
A reverse bias of 300 mV across its base-collector junction, Q1 is at active region.
1.25𝑉 − 0.3𝑉
𝑉𝐵𝐶 = 𝑉𝑡ℎ + 𝐼𝐵 𝑅𝑡ℎ − 𝐼𝐶 𝑅𝐶 , 𝐼𝐶 = ≅ 193.88𝜇𝐴
5𝐾Ω
5𝐾Ω −
50
𝐼𝐶 193.88𝜇𝐴
𝑉𝐸𝐵 = 𝑉𝑇 ln = 26𝑚𝑉 × ln ≅ 681.55𝑚𝑉
𝐼𝑆 8 × 10−16 𝐴
2.5𝑉 − 681.55𝑚𝑉 − 3.88𝜇𝐴 × 5𝐾Ω − 1.25V

𝑉𝐶𝐶 = 𝐼𝐸 𝑅𝐸 + 𝑉𝐸𝐵 + 𝐼𝐵 𝑅𝑡ℎ + 𝑉𝑡ℎ , 𝑅𝐸 = ≅ 2.78𝐾Ω
197.76𝜇𝐴
If the value of RE is halved. 𝑅𝐸 = 1.39𝐾Ω. Assume Q1 is at active region.

𝑉𝐶𝐶 − 𝑉𝐸𝐵 − 𝑉𝑡ℎ 𝐼𝐶
𝑉𝐶𝐶 = 𝐼𝐸 𝑅𝐸 + 𝑉𝐸𝐵 + 𝐼𝐵 𝑅𝑡ℎ + 𝑉𝑡ℎ , 𝐼𝐶 = × 𝛽 , 𝑉𝐸𝐵 = 𝑉𝑇 ln
Assume 𝑉𝐸𝐵 = 700𝑚𝑉 , 𝐼𝐶 ≅ 269.87𝜇𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛:

𝑉𝐸𝐵 ≅ 690.15𝑚𝑉 , 𝐼𝐶 ≅ 368.86𝜇𝐴 , 𝑉𝐸𝐵 ≅ 698.28𝑚𝑉 , 𝐼𝐶 ≅ 363.50𝜇𝐴 , 𝑉𝐸𝐵 ≅ 697.90𝑚𝑉 , 𝐼𝐶 ≅ 363.75𝜇𝐴
𝑉𝐸𝐵 = 697.91𝑚𝑉 , 𝐼𝐶 = 363.74𝜇𝐴 , 𝑉𝐸𝐶 = 𝑉𝐶𝐶 − 𝐼𝐸 𝑅𝐸 − 𝐼𝐶 𝑅𝐶 ≅ 0.16𝑉
Q1 is not at active region; is at deep saturation region.
𝑉𝐶𝐶 − 𝑉𝐸𝐶,𝑠𝑎𝑡
𝑉𝐶𝐶 = 𝐼𝐸 𝑅𝐸 + 𝑉𝐸𝐶,𝑠𝑎𝑡 + 𝐼𝐶 𝑅𝐶 , 𝐼𝐶 = ≅ 358.38𝜇𝐴
1+𝛽
𝑅𝐸 + 𝑅𝐶
𝛽
𝐼𝐶 358.38𝜇𝐴
𝑉𝐸𝐵 = 𝑉𝑇 ln = 26𝑚𝑉 × ln ≅ 697.53𝑚𝑉 , 𝑉𝐸𝐵 − 𝑉𝐸𝐶,𝑠𝑎𝑡 = 497.53𝑚𝑉
𝐼𝑆 8 × 10−16 𝐴
Q1 is at deep saturation region.

If the value of RE is halved, will drive Q1 into deep saturation region.
5.27.We have chosen RB in Fig. 5.120 to place Q1 at the edge of saturation. But the actual value of this resistor can vary by ±5%.
Determine the forward or reverse bias across the base-collector junction at these two extremes. Assume β = 50, IS = 8 × 10−16
A, and VA =∞.
Sol:
Q1 is at the edge of saturation. 𝑉𝐵 = 𝑉𝐶
𝑉𝐶𝐶 −𝑉𝐸𝐵 𝐼𝐶
By KVL: 𝑉𝐶𝐶 = 𝑉𝐸𝐵 + 𝐼𝐶 𝑅𝐶 , 𝐼𝐶 = , 𝑉𝐸𝐵 = 𝑉𝑇 ln
𝑅𝐶 𝐼𝑆

𝑉𝐸𝐵 = 738.91𝑚𝑉 , 𝐼𝐶 = 1.76𝑚𝐴 , 𝑉𝐶 = 𝑉𝐵 = 1.76𝑉
𝑅𝑡ℎ 1.76𝑚𝐴
𝑉𝑡ℎ + 𝐼𝐵 𝑅𝑡ℎ = 𝑉𝐵 , 2.5𝑉 × + × 𝑅𝑡ℎ = 1.76𝑉 , 𝑅𝑡ℎ ≅ 3.29𝐾Ω
5𝐾Ω 50
𝑅1 × 𝑅2 5𝐾Ω × 𝑅𝐵
𝑅𝑡ℎ = 𝑅1 ∥ 𝑅2 = = , 𝑅 ≅ 9.62𝐾Ω
𝑅1 + 𝑅2 5𝐾Ω + 𝑅𝐵 𝐵
𝑅𝐵 𝑐ℎ𝑎𝑛𝑔𝑒 + 5% , 𝑅𝐵 ≅ 10.1𝐾Ω
10.1𝐾Ω
𝑉𝑡ℎ = 2.5𝑉 × ≅ 1.67𝑉 , 𝑅𝑡ℎ = 5𝐾Ω ∥ 10.1𝐾Ω ≅ 3.34𝐾Ω
5𝐾Ω + 10.1𝐾Ω
12

By KVL: 𝑉𝐶𝐶 = 𝑉𝐸𝐵 + 𝐼𝐵 𝑅𝑡ℎ + 𝑉𝑡ℎ , 𝐼𝐶 = × 𝛽 , 𝑉𝐸𝐵 = 𝑉𝑇 ln

𝑉𝐸𝐵 ≅ 728.95𝑚𝑉 , 𝐼𝐶 ≅ 1.51𝑚𝐴 , 𝑉𝐸𝐵 ≅ 734.92𝑚𝑉 , 𝐼𝐶 ≅ 1.42𝑚𝐴 , 𝑉𝐸𝐵 ≅ 733.33𝑚𝑉 , 𝐼𝐶 ≅ 1.45𝑚𝐴
𝑉𝐸𝐵 = 733.69𝑚𝑉 , 𝐼𝐶 = 1.44𝑚𝐴 , 𝑉𝐶 = 𝐼𝐶 𝑅𝐶 = 1.44𝑉 , 𝑉𝐵 = 𝑉𝐶𝐶 − 𝑉𝐸𝐵 ≅ 1.77𝑉 , 𝑉𝐵𝐶 = 0.33𝑉 , 𝑅𝑒𝑣𝑒𝑟𝑠𝑒 𝑏𝑖𝑎𝑠.
𝑅𝐵 𝑐ℎ𝑎𝑛𝑔𝑒 − 5% , 𝑅𝐵 ≅ 9.14𝐾Ω
9.14𝐾Ω
𝑉𝑡ℎ = 2.5𝑉 × ≅ 1.62𝑉 , 𝑅𝑡ℎ = 5𝐾Ω ∥ 9.14𝐾Ω ≅ 3.23𝐾Ω
5𝐾Ω + 9.14𝐾Ω

By KVL: 𝑉𝐶𝐶 = 𝑉𝐸𝐵 + 𝐼𝐵 𝑅𝑡ℎ + 𝑉𝑡ℎ , 𝐼𝐶 = × 𝛽 , 𝑉𝐸𝐵 = 𝑉𝑇 ln

𝑉𝐸𝐵 ≅ 742.36𝑚𝑉 , 𝐼𝐶 ≅ 2.13𝑚𝐴 , 𝑉𝐸𝐵 ≅ 743.88𝑚𝑉 , 𝐼𝐶 ≅ 2.11𝑚𝐴 , 𝑉𝐸𝐵 ≅ 743.62𝑚𝑉 , 𝐼𝐶 ≅ 2.11𝑚𝐴
𝑉𝐸𝐵 = 743.62𝑚𝑉 , 𝐼𝐶 = 2.11𝑚𝐴 , 𝑉𝐶 = 𝐼𝐶 𝑅𝐶 = 2.11𝑉 , 𝑉𝐵 = 𝑉𝐶𝐶 − 𝑉𝐸𝐵 ≅ 1.76𝑉 , 𝑉𝐵𝐶 = −0.35𝑉 , 𝐹𝑜𝑟𝑤𝑎𝑟𝑑 𝑏𝑖𝑎𝑠.
5.28. If β = 100 and VA =∞, what value of IS yields a collector current of 1 mA in Fig. 5.121?
Sol:
E
By KVL: 𝑉𝐶𝐶 = 𝐼𝐸 (𝑅𝐸 + 𝑅𝐶 ) + 𝑉𝐸𝐵 + 𝐼𝐵 𝑅𝐵
C
𝑉𝐸𝐵 = 3𝑉 − 1.01𝑚𝐴 × 2𝐾𝛺 − 10𝜇𝐴 × 25𝐾Ω , 𝑉𝐸𝐵 = 0.73𝑉
𝐼𝐶 1𝑚𝐴
𝐼𝑆 = 𝑉𝐸𝐵 = 730𝑚𝑉 ≅ 6.4 × 10−16 𝐴
𝑒 𝑉𝑇 𝑒 26𝑚𝑉
*5.29. The topology depicted in Fig. 5.122(a) is called a “VBE multiplier.” (The npn counterpart has a similar topology.)
Constructing the circuit shown in Fig. 5.122(b), determine the collector-emitter voltage of Q1 if the base current is
negligible. (The npn counterpart can also be used.)
Sol:
The base current is negligible. 𝐼𝐸 = 𝐼𝐶
𝑅1 𝑅1 + 𝑅2
𝑉𝐵𝐸 = 𝑉𝐶𝐸 × , 𝐿𝑒𝑡 𝐴 = , 𝑉𝐶𝐸 = 𝐴𝑉𝐵𝐸 , 𝑡ℎ𝑢𝑠 𝑉𝐵𝐸 𝑖𝑠 𝑚𝑢𝑙𝑡𝑖𝑝𝑙𝑖𝑒𝑟.
𝑅1 + 𝑅2 𝑅1
5.30. We wish to design the CE stage of Fig. 5.123 for a voltage gain of 20. What is the minimum allowable supply voltage if Q1
must remain in the active mode? Assume VA =∞ and VBE = 0.8V.
Sol:
𝐼𝐶 20
𝐴𝑣 = 20 , 𝑔𝑚 = = , 𝐼 = 10.4𝜇𝐴
𝑉𝑇 𝑅𝐶 𝐶
At the edge of active region, 𝑉𝐵 = 𝑉𝐶 , 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 = 𝑉𝐵𝐸 , 𝑉𝐶𝐶 = 10.4𝜇𝐴 × 50𝐾Ω + 0.8𝑉 = 1.32𝑉
𝑉𝐶𝐶 ≥ 1.32𝑉
5.31. The circuit of Fig. 5.124 must be designed for maximum gain while maintaining Q1 in the active mode. If VA = 10 V and VBE
= 0.8 V, calculate the required bias current.
Sol:
Be designed for maximum gain, Q1 is in the edge of active mode. We don’t have β, assume IC=IE.
3𝑉−0.8𝑉 𝐼𝐶
By KVL: 𝑉𝐶𝐶 = 𝐼𝐶 𝑅𝐶 + 𝑉𝐵𝐸 + 𝐼𝐸 𝑅𝐸 , 𝐼𝐶 = ≅ 1.47𝑚𝐴 , 𝐼𝐵 =
1.5𝐾Ω 𝛽
𝑣𝜋
𝑣𝑖𝑛 = 𝑣𝜋 + ( + 𝑔𝑚 𝑣𝜋 ) 𝑅𝐸 , 𝑣𝑜𝑢𝑡 = −𝑔𝑚 𝑣𝜋 × {𝑅𝐶 ∥ [𝑟𝑂 + (𝑅𝐸 ∥ 𝑟𝜋 ) + 𝑔𝑚 𝑟𝑂 (𝑅𝐸 ∥ 𝑟𝜋 )]}
𝑟𝜋
13
𝑣𝑜𝑢𝑡 −𝑔𝑚 𝑣𝜋 × {𝑅𝐶 ∥ [𝑟𝑂 + (𝑅𝐸 ∥ 𝑟𝜋 ) + 𝑔𝑚 𝑟𝑂 (𝑅𝐸 ∥ 𝑟𝜋 )]} −𝑔𝑚 × {𝑅𝐶 ∥ [𝑔𝑚 𝑟𝑂 (𝑅𝐸 ∥ 𝑟𝜋 )]}
𝐴𝑣 = = 𝑣 ≈
𝑣𝑖𝑛 𝜋
𝑣𝜋 + ( + 𝑔𝑚 𝑣𝜋 ) 𝑅𝐸 1 + 𝑔𝑚 𝑅𝐸
𝑟𝜋
𝐼𝐶 1.47𝑚𝐴 𝑉𝐴 10𝑉 𝑉𝑇
𝑔𝑚 = = ≅ 56.54𝑚𝑆 , 𝑟𝑂 = = ≅ 6.8𝐾Ω , 𝑟𝜋 = × 𝛽 ≅ 1.77𝐾Ω
𝑉𝑇 26𝑚𝑉 𝐼𝐶 1.47𝑚𝐴 𝐼𝐶
−56.54𝑚𝑆 × {1𝐾Ω ∥ [56.54𝑚𝑆 × 6.8𝐾Ω × (500Ω ∥ 1.77𝐾Ω )]}

𝐴𝑣 ≈ ≅ −1.92
1 + 56.54𝑚𝑆 × 500Ω
𝑉𝐵𝐸
5.32. Suppose the bipolar transistor in Fig. 5.125 exhibits the following hypothetical characteristic: 𝐼𝐶 = 𝐼𝑆 𝑒𝑥𝑝( ), and no
2𝑉𝑇
Early effect. Compute the voltage gain for a bias current of 1 mA.
Sol:
𝑉𝐵𝐸 𝜕𝐼𝐶 1 𝑉𝐵𝐸 𝐼𝐶

𝐼𝐶 = 𝐼𝑆 𝑒𝑥𝑝( ) , 𝑔𝑚 = = × 𝐼𝑆 𝑒𝑥𝑝 ( )=
2𝑉𝑇 𝜕𝑉𝐵𝐸 2𝑉𝑇 2𝑉𝑇 2𝑉𝑇
𝐼𝐶 1𝑚𝐴
𝐴𝑣 = −𝑔𝑚 𝑅𝐶 = − × 𝑅𝐶 = − × 1𝐾Ω ≅ −19.23
2𝑉𝑇 2 × 26𝑚𝑉
5.33. The CE stage of Fig. 5.126 employs an ideal current source as the load. If the voltage gain is equal to 50 and the output
impedance equal to 10 kΩ, determine the bias current of the transistor.
Sol:
𝐼𝐶
𝑅𝑜𝑢𝑡 = 10𝐾Ω , 𝐴𝑣 = −𝑔𝑚 𝑅𝑜𝑢𝑡 = − 𝑅 = −50 , 𝐼𝐶 = 130𝜇𝐴
𝑉𝑇 𝑜𝑢𝑡
**5.34. Determine the voltage gain and I/O impedances of the circuits shown in Fig. 5.127. Assume VA =∞. Transistor Q2 in Figs.
5.127(d) and (e) operates in soft saturation.
Sol:
(a)
1 1
𝑅𝑖𝑛 = 𝑟𝜋1 , 𝑅𝑜𝑢𝑡 = ∥ 𝑟𝜋2 , 𝐴𝑣 = −𝑔𝑚1 𝑅𝑜𝑢𝑡 = −𝑔𝑚1 ( ∥𝑟 )
(b)
1 1
𝑅𝑖𝑛 = 𝑟𝜋1 , 𝑅𝑜𝑢𝑡 = 𝑅1 + ∥ 𝑟𝜋2 , 𝐴𝑣 = −𝑔𝑚1 𝑅𝑜𝑢𝑡 = −𝑔𝑚1 (𝑅1 + ∥𝑟 )
(c)
1 1
𝑅𝑖𝑛 = 𝑟𝜋1 , 𝑅𝑜𝑢𝑡 = 𝑅𝐶 + ( ∥ 𝑟𝜋2 ) , 𝐴𝑣 = −𝑔𝑚1 𝑅𝑜𝑢𝑡 = −𝑔𝑚1 (𝑅𝐶 + ( ∥ 𝑟 ))
14
(d)
1 1
𝑅𝑖𝑛 = 𝑟𝜋1 , 𝑅𝑜𝑢𝑡 = ∥ 𝑟𝜋2 , 𝐴𝑣 = −𝑔𝑚1 𝑅𝑜𝑢𝑡 = −𝑔𝑚1 ( ∥𝑟 )
(e)
𝑣𝜋2
𝑣𝜋2 𝑣𝜋2 𝑣𝑋 𝑟𝜋2 (𝑅𝐶 + 𝑟𝜋2 ) 𝑅𝐶 + 𝑟𝜋2
𝑣𝑋 = (𝑅𝐶 + 𝑟𝜋2 ) , 𝑖𝑋 = + 𝑔𝑚2 𝑣𝜋2 , 𝑅𝑜𝑢𝑡 = = 𝑣 =
𝑟𝜋2 𝑟𝜋2 𝑖𝑋 𝜋2
+ 𝑔𝑚2 𝑣𝜋2 1 + 𝑔𝑚2 𝑟𝜋2
𝑟𝜋2
𝑅𝐶 + 𝑟𝜋2 𝑅𝐶 + 𝑟𝜋2
𝑅𝑖𝑛 = 𝑟𝜋1 , 𝑅𝑜𝑢𝑡 = , 𝐴𝑣 = −𝑔𝑚1 𝑅𝑜𝑢𝑡 = −𝑔𝑚1 ×
1 + 𝑔𝑚2 𝑟𝜋2 1 + 𝑔𝑚2 𝑟𝜋2
5.35. Calculate the voltage gain of the stage shown in Fig. 5.128, if the voltage drop across RC is 1 V, β = 100 and VA =∞.
Sol:
𝐼𝐶 𝛽 𝛽𝑉𝑇
𝑉𝑅𝐶 = 1𝑉 , 𝐼𝐶 = 1𝑚𝐴 , 𝑔𝑚 = , 𝑟𝜋 = = = 2.6𝐾Ω
𝑉𝑇 𝑔𝑚 𝐼𝐶
𝑣𝜋
𝑣𝑖𝑛 = 𝑣𝜋 + ( + 𝑔𝑚 𝑣𝜋 ) 𝑅𝐸 , 𝑣𝑜𝑢𝑡 = −𝑔𝑚 𝑣𝜋 𝑅𝐶
𝑟𝜋
𝑣𝑜𝑢𝑡 −𝑔𝑚 𝑣𝜋 𝑅𝐶 −𝑔𝑚 𝑅𝐶 −𝛽𝑅𝐶
𝐴𝑣 = = 𝑣 = = ≅ −1.36
𝑣𝑖𝑛 𝑣𝜋 + ( 𝜋 + 𝑔𝑚 𝑣𝜋 ) 𝑅𝐸 1 + ( 1 + 𝑔𝑚 ) 𝑅𝐸 𝑟𝜋 + (1 + 𝛽)𝑅𝐸
𝑟𝜋 𝑟𝜋
5.36. Design the degenerated stage of Fig. 5.129 for a voltage gain of 5. Calculate the bias currents and value of RE, if β = 100, IS
= 5 × 10−16 A and VA =∞. Calculate the input impedance of the circuit.
Sol:
𝛽 𝛽𝑉𝑇 −𝛽𝑅𝐶 −𝛽𝑅𝐶 −𝐼𝐶 𝑅𝐶 𝐼𝐶 𝑅𝐶
𝑟𝜋 = = , 𝐴𝑣 = = = = −5 , 𝐼𝐸 𝑅𝐸 = − 𝑉𝑇
𝑔𝑚 𝐼𝐶 𝑟𝜋 + (1 + 𝛽)𝑅𝐸 𝛽𝑉𝑇 (1 𝑉𝑇 + 𝐼𝐸 𝑅𝐸 5
+ + 𝛽)𝑅𝐸
𝐼𝐶
Assume Q1 is at the edge of active region. VB=VC
𝑉𝐶𝐶 −𝑉𝐵𝐸 +𝑉𝑇 𝐼𝐶
By KVL: 𝑉𝐶𝐶 = 𝐼𝐶 𝑅𝐶 + 𝑉𝐶𝐸 + 𝐼𝐸 𝑅𝐸 , 𝐼𝐶 = 6 , 𝑉𝐵𝐸 = 𝑉𝑇 ln
𝑅 𝐼𝑆
5 𝐶
Assume 𝑉𝐵𝐸 = 700𝑚𝑉 , 𝐼𝐶 = 1.52𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛:

𝑉𝐸
𝑉𝐵𝐸 = 746.62𝑚𝑉 , 𝐼𝐶 = 1.48𝑚𝐴 , 𝑉𝐶 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 = 1.02𝑉 = 𝑉𝐵 , 𝑉𝐸 = 𝑉𝐵 − 𝑉𝐵𝐸 ≅ 273.38𝑚𝑉 , 𝑅𝐸 = = 182.89Ω
𝐼𝐸
𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝐼𝐸 𝑅𝐸 = 746.62𝑚𝑉 = 𝑉𝐵𝐸 , Q1 is at the edge of active region.

𝛽 𝛽𝑉𝑇
𝑟𝜋 = = ≅ 1.76𝐾Ω , 𝑅𝑖𝑛 = 𝑟𝜋 + (1 + 𝛽)𝑅𝐸 = 1.76𝐾Ω + 101 × 182.89Ω ≅ 20.23KΩ
𝑔𝑚 𝐼𝐶
15
5.37. Construct the small-signal model of the CE stage shown in Fig. 5.43(a) and calculate the voltage gain. Assume VA =∞.
Sol:
𝑣𝜋 𝑣𝜋
𝑣𝑖𝑛 = × (𝑅𝐵 + 𝑟𝜋 ) + ( + 𝑔𝑚 𝑣𝜋 ) 𝑅𝐸 , 𝑣𝑜𝑢𝑡 = −𝑔𝑚 𝑣𝜋 𝑅𝐶
𝑟𝜋 𝑟𝜋
𝑣𝑜𝑢𝑡 −𝑔𝑚 𝑣𝜋 𝑅𝐶 −𝑔𝑚 𝑅𝐶
𝐴𝑣 = =𝑣 𝑣𝜋 =
𝑣𝑖𝑛 𝜋
× (𝑅𝐵 + 𝑟𝜋 ) + ( + 𝑔𝑚 𝑣𝜋 ) 𝑅𝐸 1 1
𝑟𝜋 𝑟𝜋 × (𝑅𝐵 + 𝑟𝜋 ) + ( + 𝑔𝑚 ) 𝑅𝐸
𝑟𝜋 𝑟𝜋
−𝑅𝐶 −𝑅𝐶
= ≈
1 1 𝑅𝐵 1
× (𝑅𝐵 + 𝑟𝜋 ) + ( + 1) 𝑅𝐸 1 + 𝛽 + 𝑔 + 𝑅𝐸
𝛽 𝛽 𝑚
**5.38. Determine the voltage gain and I/O impedances of the circuits shown in Fig. 5.130. Assume VA =∞.
Sol:
(a)
𝑣𝜋1 𝑣𝜋1
𝑣𝑖𝑛 = 𝑣𝜋1 + ( + 𝑔𝑚1 𝑣𝜋1 ) 𝑅𝐸 , 𝑖𝑖𝑛 =
𝑟𝜋1 𝑟𝜋1
𝑣𝜋1
𝑣𝑖𝑛 𝑣𝜋1 + ( 𝑟𝜋1 + 𝑔𝑚1 𝑣𝜋1 ) 𝑅𝐸
𝑅𝑖𝑛 = = 𝑣𝜋1 = 𝑟𝜋1 + (1 + 𝛽)𝑅𝐸
𝑖𝑖𝑛
𝑟𝜋1
1 1
𝑅𝑜𝑢𝑡 = 𝑅1 + (𝑟𝜋2 ∥ ) , 𝑣𝑜𝑢𝑡 = −𝑔𝑚1 𝑣𝜋1 × [𝑅1 + (𝑟𝜋2 ∥ )]
𝑔𝑚2 𝑔𝑚2
1 1
𝑣𝑜𝑢𝑡 −𝑔𝑚1 𝑣𝜋1 × [𝑅1 + (𝑟𝜋2 ∥ 𝑔𝑚2 )] −𝑔𝑚1 × [𝑅1 + (𝑟𝜋2 ∥ 𝑔𝑚2 )]
𝐴𝑣 = = 𝑣 =
𝑣𝑖𝑛 𝑣𝜋1 + ( 𝜋1 + 𝑔𝑚1 𝑣𝜋1 ) 𝑅𝐸 1
𝑟𝜋1 1+( + 𝑔𝑚1 ) 𝑅𝐸
𝑟𝜋1
(b)
1
𝑅𝑖𝑛 = 𝑟𝜋1 + (1 + 𝛽) (𝑟𝜋2 ∥ ) , 𝑅𝑜𝑢𝑡 = 𝑅𝐶
𝑔𝑚2
−𝑔𝑚1 𝑅𝐶
𝐴𝑣 =
1 1
1 + ( + 𝑔𝑚1 ) (𝑟𝜋2 ∥ )
𝑟𝜋1 𝑔𝑚2
(c)
1
𝑅𝑖𝑛 = 𝑟𝜋1 + (1 + 𝛽) (𝑟𝜋2 ∥ ) , 𝑅𝑜𝑢𝑡 = 𝑅𝐶
𝑔𝑚2
𝐴𝑣 =
1 1
1+( + 𝑔𝑚1 ) (𝑟𝜋2 ∥ )
𝑟𝜋1 𝑔𝑚2
(d)
1
𝑅𝑖𝑛 = 𝑅𝐵 + 𝑟𝜋1 + (1 + 𝛽) (𝑟𝜋2 ∥ ) , 𝑅𝑜𝑢𝑡 = 𝑅𝐶
𝑔𝑚2
𝐴𝑣 =
𝑅𝐵 1 1
+1+( + 𝑔𝑚1 ) (𝑟𝜋2 ∥ )
𝑟𝜋1 𝑟𝜋1 𝑔𝑚2
(e)
1
𝑅𝑖𝑛 = 𝑅𝐵 + 𝑟𝜋1 + (1 + 𝛽) (𝑟𝜋2 ∥ ) , 𝑅𝑜𝑢𝑡 = 𝑅𝐶
𝑔𝑚2
16
𝐴𝑣 =
𝑅𝐵 1 1
+1+( + 𝑔𝑚1 ) (𝑟𝜋2 ∥ )
𝑟𝜋1 𝑟𝜋1 𝑔𝑚2
**5.39. Compute the voltage gain the I/O impedances of the circuits depicted in Fig. 5.131. Assume VA =∞.
Sol:
(a)
1
𝑅𝑖𝑛 = 𝑟𝜋1 + (1 + 𝛽)𝑅𝐸 , 𝑅𝑜𝑢𝑡 = 𝑅1 + (𝑟𝜋2 ∥ )
𝑔𝑚2
1
−𝑔𝑚1 × [𝑅1 + (𝑟𝜋2 ∥ )]
𝑔𝑚2
𝐴𝑣 =
1
1+( + 𝑔𝑚1 ) 𝑅𝐸
𝑟𝜋1
(b)
1
𝑅𝑖𝑛 = 𝑟𝜋1 + (1 + 𝛽)𝑅𝐸 , 𝑅𝑜𝑢𝑡 = 𝑟𝜋2 ∥ , 𝑣𝑖𝑛 𝑔𝑟𝑜𝑢𝑛𝑒𝑑, 𝑣𝜋1 = 0
𝑔𝑚2
1
−𝑔𝑚1 × (𝑟𝜋2 ∥ )
𝑔𝑚2
𝐴𝑣 =
1
1+( + 𝑔𝑚1 ) 𝑅𝐸
𝑟𝜋1
(c)
1 1
𝑅𝑖𝑛 = 𝑟𝜋1 + (1 + 𝛽) (𝑟𝜋3 ∥ ) , 𝑅𝑜𝑢𝑡 = 𝑅𝐶 + (𝑟𝜋2 ∥ )
𝑔𝑚3 𝑔𝑚2
1
−𝑔𝑚1 × [𝑅𝐶 + (𝑟𝜋2 ∥ )]
𝑔𝑚2
𝐴𝑣 =
1 1
1+( + 𝑔𝑚1 ) (𝑟𝜋3 ∥ )
𝑟𝜋1 𝑔𝑚3
(d)
𝑅𝑖𝑛 = 𝑟𝜋1 + (1 + 𝛽)𝑅𝐸 , 𝑅𝑜𝑢𝑡 = 𝑅𝐶 ∥ 𝑟𝜋2
−𝑔𝑚1 × (𝑅𝐶 ∥ 𝑟𝜋2 )
𝐴𝑣 =
1
1 + ( + 𝑔𝑚1 ) 𝑅𝐸
𝑟𝜋1
*5.40. Compare the output impedances of the circuits illustrated in Fig. 5.132. Assume 𝛽 ≫ 1.
Sol:
(a)
𝑣𝜋 = −𝑖𝑋 (𝑅𝐸 ∥ 𝑟𝜋 )
𝑣𝑋 = (𝑖𝑋 − 𝑔𝑚 𝑣𝜋 )𝑟𝑂 − 𝑣𝜋 = [𝑖𝑋 + 𝑔𝑚 𝑖𝑋 (𝑅𝐸 ∥ 𝑟𝜋 )]𝑟𝑂 + 𝑖𝑋 (𝑅𝐸 ∥ 𝑟𝜋 )
𝑣𝑋
𝑅𝑜𝑢𝑡 = = [1 + 𝑔𝑚 (𝑅𝐸 ∥ 𝑟𝜋 )]𝑟𝑂 + (𝑅𝐸 ∥ 𝑟𝜋 ) = 𝑟𝑂 + (𝑔𝑚 𝑟𝑂 + 1)(𝑅𝐸 ∥ 𝑟𝜋 )
𝑖𝑋
1 1
𝑅𝐸 = 𝑟𝜋1 ∥ ∥ 𝑟𝑂1 , 𝑅𝑜𝑢𝑡 = 𝑟𝑂2 + (𝑔𝑚2 𝑟𝑂2 + 1) [(𝑟𝜋1 ∥ ∥ 𝑟 ) ∥ 𝑟𝜋2 ]
𝑔𝑚1 𝑔𝑚1 𝑂1
(b)
𝑅𝐸 = 𝑟𝑂1
𝑅𝑜𝑢𝑡 = 𝑟𝑂2 + (𝑔𝑚2 𝑟𝑂2 + 1)(𝑟𝑂1 ∥ 𝑟𝜋2 )
17
*5.41. Calculate the output impedance of the circuits shown in Fig. 5.133. Assume 𝛽 ≫ 1.
Sol:
(a)
1
𝑅𝑜𝑢𝑡 = 𝑟𝑂1 + (𝑔𝑚1 𝑟𝑂1 + 1) [(𝑟𝜋2 ∥ ∥ 𝑟 ) ∥ 𝑟𝜋1 ]
𝑔𝑚2 𝑂2
(b)
1 𝑅𝐵
𝑅𝑜𝑢𝑡 = 𝑟𝑂1 + (𝑔𝑚1 𝑟𝑂1 + 1) [( + ) ∥ 𝑟𝜋1 ]
𝑔𝑚2 1 + 𝛽
(c)
𝑅𝐸 = 𝑅1 ∥ 𝑟𝜋2
𝑅𝑜𝑢𝑡 = 𝑟𝑂1 + (𝑔𝑚1 𝑟𝑂1 + 1)(𝑅1 ∥ 𝑟𝜋2 ∥ 𝑟𝜋1 )
5.42. Calculate vout/vin for each of the circuits depicted in Fig. 5.134. Assume IS = 8 × 10−16 A, β = 100, and VA =∞. Also, assume
the capacitors are very large.
Sol:
(a)
By KVL: 𝑉𝐶𝐶 = 𝐼𝐵 𝑅𝐵 + 𝑉𝐵𝐸 + 𝐼𝐸 𝑅𝐸
Assume Q1 is at the active region.
𝑅𝐵 + (1 + 𝛽)𝑅𝐸 𝐼𝑆

𝑉𝐵𝐸 = 736.43𝑚𝑉 , 𝐼𝐶 = 1.60𝑚𝐴 , 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝐼𝐸 𝑅𝐸 ≅ 738.4𝑚𝑉 > 𝑉𝐵𝐸
𝐼𝐶 1.6𝑚𝐴 𝑣𝜋
𝑔𝑚 = = ≅ 61.54𝑚𝑆 , 𝑣𝑖𝑛 = 𝑣𝜋 + ( + 𝑔𝑚 𝑣𝜋 ) 𝑅𝐸 , 𝑣𝑜𝑢𝑡 = −𝑔𝑚 𝑣𝜋 𝑅𝐶
𝑉𝑇 26𝑚𝑉 𝑟𝜋
𝑣𝑜𝑢𝑡 −𝑔𝑚 𝑣𝜋 𝑅𝐶 −𝑔𝑚 𝑅𝐶 −𝑅𝐶 −1𝐾Ω
= 𝑣 = = = ≅ −8.53
𝑣𝑖𝑛 1
𝑣𝜋 + ( 𝜋 + 𝑔𝑚 𝑣𝜋 ) 𝑅𝐸 1 + ( + 𝑔𝑚 ) 𝑅𝐸 1 (𝛽 + 1) 1 101
𝑟𝜋 + 𝑅 + × 100Ω
𝑟𝜋 𝑔𝑚 𝛽 𝐸 61.54𝑚𝑆 100
(b)
18
By KVL: 𝑉𝐶𝐶 = 𝐼𝐵 𝑅𝐵 + 𝑉𝐵𝐸 + 𝐼𝐸 𝑅𝐸

(1
𝑅𝐵 + + 𝛽)𝑅𝐸 𝐼𝑆
Assume 𝑉𝐵𝐸 = 750𝑚𝑉 , 𝐼𝐶 ≅ 694.44𝜇𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛:

𝑉𝐵𝐸 = 715.24𝑚𝑉 , 𝐼𝐶 = 708.24𝜇𝐴 , 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝐼𝐸 𝑅𝐸 ≅ 361.12𝑚𝑉 , 𝑉𝐵𝐸 − 𝑉𝐶𝐸 = 354.12𝑚𝑉 < 400𝑚𝑉
𝐼𝐶 708.24𝜇𝐴 𝛽 𝑅𝑆 + 𝑅𝐵 ∥ 𝑟𝜋
𝑔𝑚 = = ≅ 27.24𝑚𝑆 , 𝑟𝜋 = ≅ 3.67𝐾Ω , 𝑣𝑖𝑛 = 𝑣𝜋 × , 𝑣𝑜𝑢𝑡 = −𝑔𝑚 𝑣𝜋 𝑅𝐶
𝑉𝑇 26𝑚𝑉 𝑔𝑚 𝑅𝐵 ∥ 𝑟𝜋
𝑣𝑜𝑢𝑡 −𝑔𝑚 𝑣𝜋 𝑅𝐶 𝑅𝐵 ∥ 𝑟𝜋 50KΩ ∥ 3.67𝐾Ω
= = −𝑔𝑚 𝑅𝐶 × = −27.24𝑚𝑆 × 1𝐾Ω × ≅ −21.08
𝑣𝑖𝑛 𝑅𝑆 + 𝑅𝐵 ∥ 𝑟𝜋 𝑅𝑆 + 𝑅 𝐵 ∥ 𝑟𝜋 1𝐾Ω + 50KΩ ∥ 3.67𝐾Ω
𝑣𝜋 ×
𝑅𝐵 ∥ 𝑟𝜋
(c)
11𝐾Ω
𝑉𝑡ℎ = 2.5𝑉 × = 1.1𝑉 , 𝑅𝑡ℎ = 14𝐾Ω ∥ 11𝐾Ω = 6.16𝐾Ω
14𝐾Ω + 11𝐾Ω
By KVL: 𝑉𝑡ℎ = 𝐼𝐵 𝑅𝑡ℎ + 𝑉𝐵𝐸 + 𝐼𝐸 𝑅𝐸
Assume 𝑉𝐵𝐸 = 700𝑚𝑉 , 𝐼𝐶 ≅ 154.64𝜇𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛:

𝑉𝐵𝐸 ≅ 677.12𝑚𝑉 , 𝐼𝐶 ≅ 163.49𝜇𝐴 , 𝑉𝐵𝐸 ≅ 677.12𝑚𝑉 , 𝐼𝐶 ≅ 163.49𝜇𝐴
𝑉𝐵𝐸 = 677.12𝑚𝑉 , 𝐼𝐶 = 163.49𝜇𝐴 , 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝐼𝐸 𝑅𝐸 ≅ 452.29𝑚𝑉 , 𝑉𝐵𝐸 − 𝑉𝐶𝐸 = 224.83𝑚𝑉 < 400𝑚𝑉
𝐼𝐶 163.49𝜇𝐴 𝛽
𝑔𝑚 = = ≅ 6.29𝑚𝑆 , 𝑟𝜋 = ≅ 15.9𝐾Ω
𝑉𝑇 26𝑚𝑉 𝑔𝑚
𝑣𝑜𝑢𝑡 −𝑔𝑚 𝑣𝜋 𝑅𝐶 −𝑔𝑚 𝑅𝐶 𝑣𝐴 (𝑅1 ∥ 𝑅2 ) ∥ [𝑟𝜋 + (1 + 𝛽)𝑅𝐸 ]
= 𝑣𝜋 = , =
𝑣𝐴 1
𝑣𝜋 + ( + 𝑔𝑚 𝑣𝜋 ) 𝑅𝐸 1 + ( + 𝑔𝑚 ) 𝑅𝐸 𝑖𝑛 𝑣 𝑅 𝑆 + (𝑅1 ∥ 𝑅2 ) ∥ [𝑟𝜋 + (1 + 𝛽)𝑅𝐸 ]
𝑟𝜋 𝑟𝜋
𝑣𝑜𝑢𝑡 −6.29𝑚𝑆 × 10𝐾Ω 6.16𝐾Ω ∥ [15.9𝐾Ω + 101 × 500Ω]
= × ≅ −12.79
𝑣𝑖𝑛 1 [15.9𝐾Ω + 101 × 500Ω]
1+( + 6.29𝑚𝑆) 500Ω 1𝐾Ω + 6.16𝐾Ω ∥
15.9𝐾Ω
5.43. The common base stage of Fig. 5.135 biased with a base current of 20μA. Assume β = 100 and of VA =∞. Calculate the
voltage gain and input/output impedances of the circuit.
Sol:
𝐼𝐶 2𝑚𝐴 𝛽 100
𝐼𝐵 = 20𝜇𝐴 , 𝐼𝐶 = 𝛽𝐼𝐵 = 2𝑚𝐴 , 𝑔𝑚 = = ≅ 76.92𝑚𝑆 , 𝑟𝜋 = = = 1.3𝐾Ω
𝑉𝑇 26𝑚𝑉 𝑔𝑚 76.92𝑚𝑆
𝑣𝑖𝑛 = −𝑣𝜋 , 𝑣𝑜𝑢𝑡 = −𝑔𝑚 𝑣𝜋 𝑅𝐶 , 𝐴𝑣 = 𝑔𝑚 𝑅𝐶 = 76.92𝑚𝑆 × 500Ω ≅ 38.46

1 1
𝑅𝑖𝑛 = 𝑟𝜋 ∥ = 1.3𝐾Ω ∥ ≅ 12.87Ω , 𝑅𝑜𝑢𝑡 = 𝑅𝐶 = 500Ω
5.44. Determine the voltage gain of the circuits shown in Fig. 5.136. Assume VA =∞, IC = 2 mA and βnpn = 2βpnp = 100.
Sol:
(a)
19
Assume Q1 and Q2 is at active region.

𝐼𝐶1
𝐼𝐶1 = 2𝑚𝐴 , 𝑔𝑚1 = ≅ 76.92𝑚𝑆 = 𝑔𝑚2
𝑉𝑇
𝛽𝑛𝑝𝑛 100
𝑟𝜋2 = = ≅ 1.3𝐾Ω = 𝑟𝜋1
𝑔𝑚2 76.92𝑚𝑆
1 1
𝐴𝑣 = 𝑔𝑚1 × (𝑅𝐶 + ∥ 𝑟𝜋2 ) = 76.92𝑚𝑆 × (1𝐾Ω + ∥ 1.3𝐾Ω) ≅ 77.91
𝑔𝑚2 76.92𝑚𝑆
(b)
𝑣𝜋2 = 0 → 𝑔𝑚2 𝑣𝜋2 = 0 , 𝑚𝑢𝑠𝑡 𝑏𝑒 𝑐𝑜𝑛𝑠𝑖𝑑𝑒𝑟 𝑟𝑂 .
𝐴𝑣 = 𝑔𝑚1 × 𝑟𝑂2 = ∞
(c)
𝐼𝐶1 𝛽𝑝𝑛𝑝 50
𝐼𝐶1 = 2𝑚𝐴 , 𝑔𝑚1 = ≅ 76.92𝑚𝑆 = 𝑔𝑚2 , 𝑟𝜋2 = = ≅ 650.03Ω
𝑉𝑇 𝑔𝑚2 76.92𝑚𝑆
1 1
𝐴𝑣 = 𝑔𝑚1 × (𝑅𝐶 + ∥ 𝑟𝜋2 ) = 76.92𝑚𝑆 × (1𝐾Ω + ∥ 650.03Ω) ≅ 77.9
𝑔𝑚2 76.92𝑚𝑆
5.45. Compute the input impedance of the stages shown in Fig. 5.137. Assume VA =∞, IC = 2 mA and β = 100.
Sol:
(a)
𝐼𝐶1 𝛽
𝐼𝐶1 = 2𝑚𝐴 , 𝑔𝑚1 = ≅ 76.92𝑚𝑆 , 𝐼𝐵1 = 𝐼𝐸2 , 𝐼𝐶2 = 𝐼 ≅ 19.8𝜇𝐴
𝑉𝑇 1 + 𝛽 𝐸2
𝐼𝐶2 𝛽 100 𝛽 100

𝑔𝑚2 = ≅ 761.61𝜇𝑆 , 𝑟𝜋1 = = ≅ 1.3𝐾Ω , 𝑟𝜋2 = = ≅ 131.3𝐾Ω
𝑉𝑇 𝑔𝑚1 76.92𝑚𝑆 𝑔𝑚2 761.61𝜇𝑆
𝑣𝜋1 𝑣𝜋2 𝑣𝜋1 𝑣𝜋1
= 𝑔𝑚2 𝑣𝜋2 + , 𝑣𝜋2 = , 𝑣𝑖𝑛 = −(𝑣𝜋1 + 𝑣𝜋2 ) , 𝑖𝑖𝑛 = − (𝑔𝑚1 𝑣𝜋1 + )
𝑟𝜋1 𝑟𝜋2 1 𝑟𝜋1
𝑟𝜋1 (𝑔𝑚2 + )
𝑟𝜋2
𝑣𝜋1 1
𝑣𝜋1 + 1 𝑟𝜋1 + 1
𝑣𝑖𝑛 𝑣𝜋1 + 𝑣𝜋2 𝑟𝜋1 (𝑔𝑚2 + ) 𝑔𝑚2 +
𝑟𝜋2 𝑟𝜋2
𝑅𝑖𝑛 = = = = ≅ 25.74Ω(P. 216)
𝑖𝑖𝑛 𝑔𝑚1 𝑣𝜋1 + 𝑣𝜋1 𝑔𝑚1 𝑣𝜋1 + 𝜋1
𝑣 𝑔𝑚1 𝑟𝜋1 + 1
𝑟𝜋1 𝑟𝜋1
(b)
𝐼𝐶1 𝛽 100
𝐼𝐶1 = 2𝑚𝐴 , 𝑔𝑚1 = ≅ 76.92𝑚𝑆 , 𝑟𝜋1 = = ≅ 1.3𝐾Ω
𝑉𝑇 𝑔𝑚1 76.92𝑚𝑆
𝑅2 𝑣𝜋 1
𝑣𝑖𝑛 = −(𝑣𝜋 + 𝑣𝑅2 ) = −𝑣𝜋 (1 + ) , 𝑖𝑖𝑛 = − ( + 𝑔𝑚 𝑣𝜋 ) = −𝑣𝜋 ( + 𝑔𝑚 )
𝑟𝜋 𝑟𝜋 𝑟𝜋
∵ 𝒗𝝅𝟐 + 𝑽𝑹𝑬 = 𝟎 , ∴ 𝒗𝝅𝟐 = 𝑽𝑹𝑬 = 𝟎 , (𝒑. 𝟏𝟖𝟗)

𝑅
𝑣𝑖𝑛 −𝑣𝜋 (1 + 2 ) 𝑟𝜋 + 𝑅2 1.3𝐾Ω + 10𝐾Ω
𝑟𝜋
𝑅𝑖𝑛 = = = = ≅ 111.88Ω
𝑖𝑖𝑛 −𝑣 ( 1 + 𝑔 ) 1 + 𝑔𝑚 𝑟𝜋 1 + 100
𝜋 𝑟 𝑚
𝜋
(c)
Assume Q1 and Q2 is at active region. 𝐴𝑠𝑠𝑢𝑚𝑒 𝐼𝐶1 = 𝐼𝐶2
20
𝑣𝜋 1 𝑣𝜋
𝑣𝑖𝑛 = − {𝑣𝜋 + [𝑅2 ∥ (𝑟𝜋2 ∥ )]} , 𝑖𝑖𝑛 = − ( + 𝑔𝑚 𝑣𝜋 )
𝑟𝜋 𝑔𝑚2 𝑟𝜋
1 1
𝑣𝑖𝑛 𝑟𝜋 + [𝑅2 ∥ (𝑟𝜋2 ∥ 𝑔𝑚2 )] 1.3𝐾Ω + [10𝐾Ω ∥ (1.3𝐾Ω ∥ 76.92𝑚𝑆)]
𝑅𝑖𝑛 = = = ≅ 12.999Ω
𝑖𝑖𝑛 1 + 𝑔𝑚 𝑟𝜋 101
𝑖𝑓 𝐼𝐶1 ≈ 10𝐼𝐶2 , 𝑔𝑚2 ≅ 7.69𝑚𝑆 , 𝑟𝜋2 ≅ 13𝐾Ω
1 1
𝑣𝑖𝑛 𝑟𝜋 + [𝑅2 ∥ (𝑟𝜋2 ∥ 𝑔𝑚2 )] 1.3𝐾Ω + [10𝐾Ω ∥ (13𝐾Ω ∥ 7.69𝑚𝑆)]
𝑅𝑖𝑛 = = = ≅ 14.13Ω
𝑖𝑖𝑛 1 + 𝑔𝑚 𝑟𝜋 101
5.46. Compute the input/output impedance and voltage gain of the stages shown in Fig. 5.138. Assume VA =∞.
Sol:
𝑣𝜋
𝑣𝑖𝑛 = −(𝑣𝑅𝑆 + 𝑣𝜋 ) , 𝑖𝑖𝑛 = − ( + 𝑔𝑚 𝑣𝜋 ) , 𝑣𝑜𝑢𝑡 = −𝑔𝑚 𝑣𝜋 𝑅𝐶
𝑟𝜋
𝑣𝜋 1
𝑣𝑖𝑛 [( 𝑟𝜋 + 𝑔𝑚 𝑣𝜋 ) 𝑅𝑆 + 𝑣𝜋 ] [(𝑟𝜋 + 𝑔𝑚 ) 𝑅𝑆 + 1]
𝑅𝑖𝑛 = = 𝑣 = , 𝑅𝑜𝑢𝑡 = 𝑅𝐶
𝑖𝑖𝑛 ( 𝜋 + 𝑔𝑚 𝑣𝜋 ) 1
𝑟𝜋 ( + 𝑔𝑚 )
𝑟𝜋
𝑣𝑜𝑢𝑡 −𝑔𝑚 𝑣𝜋 𝑅𝐶 𝑔𝑚 𝑅𝐶
𝐴𝑣 = = 𝑣𝜋 =
𝑣𝑖𝑛 1
− [( + 𝑔𝑚 𝑣𝜋 ) 𝑅𝑆 + 𝑣𝜋 ] [( + 𝑔𝑚 ) 𝑅𝑆 + 1]
𝑟𝜋 𝑟𝜋
5.47. Consider CB stage depicted in Fig. 5.139, where β = 100, IS = 8 × 10−16 A, VA =∞ and CB is very large. (a) Calculate the
operating point of Q and (b) calculate the voltage gain.
Sol:
12𝐾Ω
𝑉𝑡ℎ = 2.5𝑉 × ≅ 1.1𝑉 , 𝑅𝑡ℎ = 15𝐾Ω ∥ 12𝐾Ω ≅ 6.67𝐾Ω
15𝐾Ω + 12𝐾Ω
By KVL: 𝑉𝑡ℎ = 𝐼𝐵 𝑅𝑡ℎ + 𝑉𝐵𝐸 + 𝐼𝐸 𝑅𝐸
Assume 𝑉𝐵𝐸 = 700𝑚𝑉 , 𝐼𝐶 ≅ 1𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛:

𝑉𝐵𝐸 ≅ 722.69𝑚𝑉 , 𝐼𝐶 ≅ 943.28𝜇𝐴 , 𝑉𝐵𝐸 = 722.69𝑚𝑉 , 𝐼𝐶 = 943.28𝜇𝐴
𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝐼𝐸 𝑅𝐸 ≅ 1.24𝑉 > 𝑉𝐵𝐸 , Q1 is at active region.
𝐼𝐶 943.28𝜇𝐴
𝑔𝑚 = = ≅ 36.28𝑚𝑆
𝑉𝑇 26𝑚𝑉
𝑣𝑜𝑢𝑡
𝑣𝑖𝑛 = −𝑣𝜋 , 𝑣𝑜𝑢𝑡 = −𝑔𝑚 𝑣𝜋 𝑅𝐶 , 𝐴𝑣 = = 𝑔𝑚 𝑅𝐶 = 36.28𝑚𝑆 × 1𝐾Ω = 36.28
𝑣𝑖𝑛
*5.48. Calculate the voltage gain and the I/O impedances of the stage depicted in Fig. 5.140 if VA =∞ and CB is very large.
Sol:
1
𝑅𝑖𝑛 = 𝑟𝜋 ∥ ,𝑅 = 𝑅1
𝑔𝑚 𝑜𝑢𝑡
𝐴𝑣 = 𝑔𝑚 𝑅1
21
5.49. Compute the voltage gain and I/O impedances of the stage shown in Fig. 5.141 if VA =∞ and CB is very large.
Sol:
1 1
𝑅𝑖𝑛 = 𝑟𝜋 ∥ , 𝑅𝑜𝑢𝑡 = 𝑅1 ∥ (𝑟𝜋2 ∥ )
𝑔𝑚 𝑔𝑚2
1
𝐴𝑣 = 𝑔𝑚 [𝑅1 ∥ (𝑟𝜋2 ∥ )]
𝑔𝑚2
5.50. Calculate the voltage gain of the circuit shown in Fig. 5.142. Assume VA<∞, β = 100 and gm = (26Ω)−1.
Sol:
𝑟𝜋
𝑣𝐴 = 𝑣𝜋 + 𝑣𝑅𝐸 , 𝑣𝑅𝐸 = 𝑣𝐴 − 𝑣𝜋 , 𝑣𝜋 = 𝑣𝐴 ×
𝑟𝜋 + (1 + 𝛽)𝑅𝐸
𝑣𝑜𝑢𝑡 − 𝑣𝑅𝐸 𝑅𝐶 𝑅𝐶
𝑣𝑜𝑢𝑡 = − (𝑔𝑚 𝑣𝜋 + ) 𝑅𝐶 = −𝑔𝑚 𝑣𝜋 𝑅𝐶 − 𝑣𝑜𝑢𝑡 + (𝑣 − 𝑣𝜋 )
𝑟𝑂 𝑟𝑂 𝑟𝑂 𝐴
𝑅𝐶 𝑣𝐴 𝑟𝜋 𝑅𝐶 𝑟𝜋
𝑣𝑜𝑢𝑡 (1 + ) = −𝑔𝑚 𝑅𝐶 × + 𝑣𝐴 (1 − )
𝑟𝑂 (1
𝑟𝜋 + + 𝛽)𝑅𝐸 𝑟𝑂 (1
𝑟𝜋 + + 𝛽)𝑅𝐸
𝑟𝜋 𝑅𝐶 𝑟𝜋 −𝑔𝑚 𝑅𝐶 𝑟𝜋 𝑟𝑂 − 𝑅𝐶 𝑟𝜋
𝑣𝑜𝑢𝑡 −𝑔𝑚 𝑅𝐶 × 𝑟𝜋 + (1 + 𝛽)𝑅𝐸 + 𝑟𝑂 (1 − 𝑟𝜋 + (1 + 𝛽)𝑅𝐸 ) 𝑟 + (1 + 𝛽)𝑅𝐸
+ 𝑅𝐶
= = 𝜋
𝑣𝐴 𝑅 𝑟𝑂 + 𝑅𝐶
1+ 𝐶
𝑟𝑂
−(𝑔𝑚 𝑟𝑂 + 1)𝑅𝐶 𝑟𝜋
𝑣𝑜𝑢𝑡 𝑣𝐴 𝑣𝑜𝑢𝑡 𝑟𝜋 + (1 + 𝛽)𝑅𝐸 + 𝑅𝐶
𝑟 + (1 + 𝛽)𝑅𝐸
𝐴𝑣 = = = × 𝜋
𝑣𝑖𝑛 𝑣𝑖𝑛 𝑣𝐴 𝑅𝐵 + 𝑟𝜋 + (1 + 𝛽)𝑅𝐸 𝑟𝑂 + 𝑅𝐶
5.51. The circuit of Fig. 5.143 provides two outputs. If IS1 = 3IS2, determine the relation between Vout1/Vin and Vout2/Vin. Assume VA
=∞.
Sol:
𝐼𝑆1 = 3𝐼𝑆2 , 𝐼𝐶1 = 3𝐼𝐶2 , 𝑔𝑚1 = 3𝑔𝑚2
𝑣𝑜𝑢𝑡1 𝑔𝑚1 𝑅𝐶 𝑣𝑜𝑢𝑡2 𝑔𝑚2 𝑅𝐶 𝑣𝑜𝑢𝑡1 𝑣𝑜𝑢𝑡2
= , = , ≈3
𝑣𝑖𝑛 1 + 𝑔𝑚1 𝑅𝑆 𝑣𝑖𝑛 1 + 𝑔𝑚2 𝑅𝑆 𝑣𝑖𝑛 𝑣𝑖𝑛
**5.52. Using a small-signal model, determine the voltage gain of a CB stage with emitter degeneration, a base resistance, and VA
< ∞. Assume β ≫1.
Sol:
𝑣𝑜𝑢𝑡 − 𝑣𝐸 𝑣𝜋
𝑣𝑜𝑢𝑡 = −(𝑖1 + 𝑔𝑚 𝑣𝜋 )𝑅𝐶 , 𝑖1 = , 𝑣𝐸 = − (𝑟𝜋 + 𝑅𝐵 )
𝑟𝑂 𝑟𝜋
𝑅 𝑣
𝑣𝑜𝑢𝑡 𝑣𝐸 − [𝑔𝑚 𝑣𝜋 𝑅𝐶 + 𝐶 𝜋 (𝑟𝜋 + 𝑅𝐵 )] 𝑣
𝑟𝑂 𝑟𝜋 𝜋
𝑣𝑜𝑢𝑡 = −( − + 𝑔𝑚 𝑣𝜋 ) 𝑅𝐶 = = , 𝑣𝜋 = 𝐴𝑣𝑜𝑢𝑡
𝑟𝑂 𝑟𝑂 𝑅𝐶 𝐴
1+
𝑟𝑂
𝑣𝜋 𝑣𝜋 𝑣𝜋 𝑣𝑜𝑢𝑡 𝑣𝐸 𝑣𝜋
𝑣𝑖𝑛 = 𝑣𝐸 − 𝑣𝑅𝐸 = − (𝑟𝜋 + 𝑅𝐵 ) − (𝑖1 + 𝑔𝑚 𝑣𝜋 + ) 𝑅𝐸 = − (𝑟𝜋 + 𝑅𝐵 ) − ( − + 𝑔𝑚 𝑣𝜋 + ) 𝑅𝐸
𝑟𝜋 𝑟𝜋 𝑟𝜋 𝑟𝑂 𝑟𝑂 𝑟𝜋
𝐴𝑣𝑜𝑢𝑡 𝑣𝑜𝑢𝑡 𝐴𝑣𝑜𝑢𝑡 𝐴𝑣𝑜𝑢𝑡

𝑣𝑖𝑛 = − (𝑟𝜋 + 𝑅𝐵 ) − [ + (𝑟𝜋 + 𝑅𝐵 ) + 𝑔𝑚 𝐴𝑣𝑜𝑢𝑡 + ] 𝑅𝐸
𝑟𝜋 𝑟𝑂 𝑟𝑂 × 𝑟𝜋 𝑟𝜋
𝑅
𝑣𝑜𝑢𝑡 𝐴 1 𝐴 𝐴 −1 1+ 𝐶
𝑟𝑂
= {− (𝑟𝜋 + 𝑅𝐵 ) − [ + (𝑟 + 𝑅𝐵 ) + 𝑔𝑚 𝐴 + ] 𝑅𝐸 } , A =
𝑣𝑖𝑛 𝑟𝜋 𝑟𝑂 𝑟𝑂 × 𝑟𝜋 𝜋 𝑟𝜋 − [𝑔𝑚 𝑅𝐶 +
𝑅𝐶
(𝑟 + 𝑅𝐵 )]
𝑟𝑂 × 𝑟𝜋 𝜋
22
5.53. For RE = 600Ω in Fig. 5.144, determine the bias current of Q1 such that the gain is equal to 0.9. Assume VA =∞.
Sol:
𝑣𝜋 𝑣𝜋
𝑣𝑖𝑛 = 𝑣𝜋 + ( + 𝑔𝑚 𝑣𝜋 ) 𝑅𝐸 , 𝑣𝑜𝑢𝑡 = ( + 𝑔𝑚 𝑣𝜋 ) 𝑅𝐸
𝑟𝜋 𝑟𝜋
𝑣
𝑣𝑜𝑢𝑡 ( 𝜋 + 𝑔𝑚 𝑣𝜋 ) 𝑅𝐸 𝑅𝐸 𝑅𝐸
𝑟𝜋
𝐴𝑣 = = 𝑣 = 𝑟 ≈ = 0.9 , 𝑔𝑚 ≅ 15𝑚𝑆
𝑣𝑖𝑛 𝜋 𝜋
𝑣𝜋 + ( + 𝑔𝑚 𝑣𝜋 ) 𝑅𝐸 1 + 𝛽 + 𝑅𝐸 1
𝑟𝜋 + 𝑅𝐸
𝑔𝑚
𝐼𝐶
𝑔𝑚 = , 𝐼 = 𝑔𝑚 × 𝑉𝑇 = 15𝑚𝑆 × 26𝑚𝑉 = 390𝜇𝐴
𝑉𝑇 𝐶
5.54. The circuit of Fig. 5.144 must provide an input impedance of greater than 10 KΩ with a minimum gain of 0.9. Calculate the
required bias current and RE. Assume β = 100 and VA =∞.
Sol:
𝑅𝐸 𝑅𝐸 𝐼𝐶 𝑅𝐸
𝐴𝑣 ≈ = = > 0.9 , 𝐼𝐶 𝑅𝐸 > 9𝑉𝑇 = 234𝑚𝑉
1 𝑉𝑇 𝑉𝑇 + 𝐼𝐶 𝑅𝐸
+ 𝑅𝐸 𝐼 + 𝑅𝐸
𝑔𝑚 𝐶
𝑉𝑇
𝑅𝑖𝑛 = 𝑟𝜋 + (1 + 𝛽)𝑅𝐸 = 𝛽 × + (1 + 𝛽)𝑅𝐸 > 10𝐾Ω , 100𝑉𝑇 + 101𝐼𝐶 𝑅𝐸 > 10𝐾Ω × 𝐼𝐶
𝐼𝐶
𝐼𝐶 < 2.62𝑚𝐴 , 𝐼𝐶 𝑅𝐸 > 9𝑉𝑇 = 234𝑚𝑉 , 𝑅𝐸 > 89.31Ω

5.55. A microphone having an output impedance RS = 250Ω drives an emitter follower as shown in Fig. 5.145. Determine the bias
currents such that the output impedance does not exceed 10Ω. Assume β = 100 and VA =∞.
Sol:
1 𝑅𝑆 𝑉𝑇 𝑅𝑆
𝑅𝑜𝑢𝑡 ≈ 𝑅𝐸 ∥ ( + ) = 𝑅𝐸 ∥ ( + ) ≤ 10Ω , 𝑅𝐸 = 12KΩ
𝑔𝑚 1 + 𝛽 𝐼𝐶 1 + 𝛽
𝑉𝑇 𝑅𝑆 26𝑚𝑉 200Ω
⟹ + ≤ 10Ω , + ≤ 10Ω , 𝐼𝐶 ≥ 3.24𝑚𝐴
𝐼𝐶 1 + 𝛽 𝐼𝐶 101
5.56. Compute the voltage gain and I/O impedances of the circuits shown in Fig. 5.146. Assume VA =∞.
Sol:
(a)
𝑉𝐴 = ∞ , 𝑟𝑂 = ∞ , 𝑅𝑖𝑛 = 𝑟𝜋1 + 𝑟𝑂2 = ∞
1 1
𝑅𝑜𝑢𝑡 = 𝑟𝜋1 ∥ ∥ 𝑟𝑂2 = 𝑟𝜋1 ∥
𝑔𝑚1 𝑔𝑚1
𝑟𝑂2
𝐴𝑣 = =1
1
𝑟𝑂2 +
𝑔𝑚1
(b)
1 1 1
𝑅𝑖𝑛 = 𝑟𝜋1 + (1 + 𝛽) (𝑟𝜋2 ∥ ) , 𝑅𝑜𝑢𝑡 = 𝑟𝜋1 ∥ ∥ 𝑟𝜋2 ∥
𝑔𝑚2 𝑔𝑚1 𝑔𝑚2
1
𝑟𝜋2 ∥
𝑔𝑚2
𝐴𝑣 =
1 1
(𝑟𝜋2 ∥ )+
𝑔𝑚2 𝑔𝑚1
(c)
1 𝑅𝑆 1 1 𝑅𝑆
𝑅𝑖𝑛 = 𝑟𝜋1 + (1 + 𝛽) [(𝑟𝜋2 ∥ )+ ] , 𝑅𝑜𝑢𝑡 = 𝑟𝜋1 ∥ ∥ [(𝑟𝜋2 ∥ )+ ]
𝑔𝑚2 1+𝛽 𝑔𝑚1 𝑔𝑚2 1+𝛽
23
1 𝑅𝑆
[(𝑟𝜋2 ∥ )+ ]
𝑔𝑚2 1+𝛽
𝐴𝑣 =
1 𝑅𝑆 1
[(𝑟𝜋2 ∥ )+ ]+
𝑔𝑚2 1+𝛽 𝑔𝑚1
(d)
1 1 1
𝑅𝑖𝑛 = 𝑟𝜋1 + (1 + 𝛽) [𝑅𝐸 + (𝑟𝜋2 ∥ )] , 𝑅𝑜𝑢𝑡 = 𝑟𝜋1 ∥ ∥ [𝑅𝐸 + (𝑟𝜋2 ∥ )]
1
[𝑅𝐸 + (𝑟𝜋2 ∥ )]
𝑔𝑚2
𝐴𝑣 =
1 1
[𝑅𝐸 + (𝑟𝜋2 ∥ )] +
𝑔𝑚2 𝑔𝑚1
(e)
1 1 1
𝑅𝑖𝑛 = 𝑟𝜋1 + (1 + 𝛽) [𝑅𝐸 + (𝑟𝜋2 ∥ )] , 𝑅𝑜𝑢𝑡 = [(𝑟𝜋1 ∥ ) + 𝑅𝐸 ] ∥ (𝑟𝜋2 ∥ )
1
(𝑟𝜋2 ∥ )
𝑔𝑚2
𝐴𝑣 =
1 1
𝑅𝐸 + (𝑟𝜋2 ∥ )+
𝑔𝑚2 𝑔𝑚1
*5.57. Figure 5.147 depicts a “Darlington pair,” where Q1 plays a role somewhat similar to an emitter follower driving Q2.
Assume VA =∞ and the collectors of Q1 and Q2 are tied to VCC. Note that IE1(≈IC1) = IB2 = IC2/β. (a) If the emitter of Q2 is
grounded, determine the impedance seen at the base of Q1. (b) If the base of Q1 is grounded, calculate the impedance seen
at the emitter of Q2. (c) Compute the current gain of the pair, defined as (IC1 + IC2)/IB1.
Sol:
(a)
𝑅𝑖𝑛 = 𝑟𝜋1 + (1 + 𝛽)𝑟𝜋2
(b)
1 1 1
𝑅𝑜𝑢𝑡 = (𝑟𝜋2 ∥ )+ (𝑟𝜋1 ∥ )
𝑔𝑚2 1+𝛽 𝑔𝑚1
(c)
𝐼𝐶1 + 𝐼𝐶2 𝐼𝐶1 𝐼𝐶2 𝛽𝐼𝐵2 𝐼𝐶1 + 𝐼𝐶2 𝛽 × 𝛽𝐼𝐵1
= + =𝛽+ , 𝐼𝐵2 = 𝐼𝐸1 ≈ 𝐼𝐶1 = 𝛽𝐼𝐵1 , =𝛽+ = 𝛽(1 + 𝛽)
𝐼𝐵1 𝐼𝐵1 𝐼𝐵1 𝐼𝐵1 𝐼𝐵1 𝐼𝐵1
5.58. Determine the voltage gain of the follower depicted in Fig. 5.148. Assume IS = 7 × 10−16 A, β = 100, and VA = 5 V. (But for
bias calculations, assume VA =∞.) Also, assume the capacitors are very large.
Sol:
Assume Q1 is at active region. By KVL:
𝑉𝑐𝑐 = 𝐼𝐵 𝑅𝐵 + 𝑉𝐵𝐸 + 𝐼𝐸 𝑅𝐸 , 𝐼𝐶 = × 𝛽 , 𝑉𝐵𝐸 = 𝑉𝑇 ln
(1
𝑅𝐵 + + 𝛽)𝑅𝐸 𝐼𝑆

𝑉𝐵𝐸 = 739.74𝑚𝑉 , 𝐼𝐶 = 1.59𝑚𝐴 , 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐸 𝑅𝐸 ≅ 894.1𝑚𝑉 > 𝑉𝐵𝐸 , Q1 is at active region.
𝑉𝐴 5𝑉 1 𝑉𝑇 26𝑚𝑉
𝑟𝑂 = = ≅ 3.14𝐾Ω , = = ≅ 16.35Ω
𝐼𝐶 1.59𝑚𝐴 𝑔𝑚 𝐼𝐶 1.59𝑚𝐴
𝑅𝐸 ∥ 𝑅𝐿 ∥ 𝑟𝑂 1𝐾Ω ∥ 100Ω ∥ 3.14𝐾Ω
𝐴𝑣 = = ≅ 0.84
1 1𝐾Ω ∥ 100Ω ∥ 3.14𝐾Ω + 16.35Ω
𝑅𝐸 ∥ 𝑅𝐿 ∥ 𝑟𝑂 +
𝑔𝑚
24
5.59. Assuming VA =∞ determine the voltage gain of the circuit shown in Fig. 5.149.
Sol:
𝑟𝜋 𝑟𝜋 + (1 + 𝛽)(𝑅𝐸 ∥ 𝑅2 )
𝑣𝜋 = 𝑉𝑋 × , 𝑉𝑋 = 𝑣𝜋 ×
𝑟𝜋 + (1 + 𝛽)(𝑅𝐸 ∥ 𝑅2 ) 𝑟𝜋
𝑅𝑋
𝑅𝑋 = 𝑟𝜋 + (1 + 𝛽)(𝑅𝐸 ∥ 𝑅2 ) , 𝑉𝑋 = 𝑣𝜋 ×
𝑟𝜋
𝑅1 ∥ 𝑅𝑋 𝑅𝑆 + 𝑅1 ∥ 𝑅𝑋 𝑅𝑆 (𝑅1 +𝑅𝑋 ) + 𝑅1 𝑅𝑋
𝑉𝑋 = 𝑣𝑖𝑛 × , 𝑣𝑖𝑛 = 𝑉𝑋 × = 𝑉𝑋 ×
𝑅𝑆 + (𝑅1 ∥ 𝑅𝑋 ) (𝑅1 ∥ 𝑅𝑋 ) 𝑅1 𝑅𝑋
𝑣𝑜𝑢𝑡 −𝑔𝑚 𝑣𝜋 𝑅𝐶 −𝑔𝑚 𝑅𝐶 −𝑔𝑚 𝑅𝐶 𝑟𝜋 𝑅1
𝑣𝑜𝑢𝑡 = −𝑔𝑚 𝑣𝜋 𝑅𝐶 , 𝐴𝑣 = = = =
𝑣𝑖𝑛 𝑅𝑋 𝑅𝑆 (𝑅1 +𝑅𝑋 ) + 𝑅1 𝑅𝑋 𝑅𝑆 (𝑅1 +𝑅𝑋 ) + 𝑅1 𝑅𝑋 𝑅𝑆 (𝑅1 +𝑅𝑋 ) + 𝑅1 𝑅𝑋
𝑣𝜋 × ×
𝑟𝜋 𝑅1 𝑅𝑋 𝑟𝜋 𝑅1
−𝑔𝑚 𝑅𝐶 𝑟𝜋 𝑅1
𝐴𝑣 =
𝑅𝑆 1 + 𝜋 + + 𝛽)(𝑅𝐸 ∥ 𝑅2 )]) + 𝑅1 [𝑟𝜋 + (1 + 𝛽)(𝑅𝐸 ∥ 𝑅2 )]
(𝑅 [𝑟 (1
5.60. Calculate the input and output impedances of the circuit depicted in Fig. 5.150. Determine the voltage gain.
Sol:
𝑅𝑖𝑛 = 𝑟𝜋1 + (1 + 𝛽)(𝑅𝐸 ∥ 𝑟𝜋2 ∥ 𝑟𝑂1 )
𝑅𝑜𝑢𝑡 = 𝑅𝐶 ∥ 𝑟𝑂2
𝑅𝐸 ∥ 𝑟𝑂1
𝐴𝑣 = − × 𝑔𝑚2 (𝑅𝐶 ∥ 𝑟𝑂2 )
1
𝑅𝐸 ∥ 𝑟𝑂1 +
𝑔𝑚1
5.61. Figure 5.151 shows a cascade of an emitter follower and common base stage. Calculate the input/output impedances of the
circuit. Assume VA =∞, gm1 = gm2 = (26Ω)−1 and β = 100.
Sol:
1
𝑅𝑖𝑛 = 𝑟𝜋1 + (1 + 𝛽1 ) (𝑅𝐸 ∥ 𝑟𝜋2 ∥ ) , 𝑟𝜋1 = 𝑟𝜋2 = 2.6𝐾Ω
𝑔𝑚2
𝑅𝑖𝑛 = 2.6𝐾Ω + (1 + 100)(10𝐾Ω ∥ 2.6𝐾Ω ∥ 26Ω) ≅ 5.19𝐾Ω

𝑅𝑜𝑢𝑡 = 𝑅𝐶 = 1𝐾Ω
Design Problems
In the following problems, unless otherwise stated, assume β =100, IS =6×10−16A, and VA =∞.
5.62. Design the CE stage shown in Fig. 5.152 for a voltage gain of 10, and input impedance of greater than 5KΩ, and an output
impedance of 1KΩ. If the lowest signal frequency of interest is 200 Hz, estimate the minimum allowable value of CB.
Sol:
𝑅𝑜𝑢𝑡 = 𝑅𝐶 = 1𝐾Ω , 𝑅𝑖𝑛 = 𝑅𝐵 ∥ 𝑟𝜋 > 5𝐾Ω
𝐼𝐶 𝐼𝐶
𝐴𝑣 = −𝑔𝑚 𝑅𝐶 = − × 𝑅𝐶 = − × 1𝐾Ω = −10, 𝐼𝐶 = 0.26𝑚𝐴
𝑉𝑇 26𝑚𝑉
𝑉𝐵𝐸 = 𝑉𝑇 ln = 26𝑚𝑉 × ln ≅ 696.66𝑚𝑉 , 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 = 2.24𝑉 > 𝑉𝐵𝐸 , Q1 is at active region.
𝐼𝑆 6×10−16 𝐴
2.5𝑉−696.66𝑚𝑉 𝑉𝑇 26𝑚𝐴
By KVL: 𝑉𝐶𝐶 = 𝐼𝐵 𝑅𝐵 + 𝑉𝐵𝐸 , 𝐼𝐵 = = 2.6𝜇𝐴 , 𝑅𝐵 ≅ 693.59𝐾Ω , 𝑟𝜋 = 𝛽 × = 100 × = 10𝐾Ω
𝑅𝐵 𝐼𝐶 0.26𝑚𝐴
𝑅𝑖𝑛 = 𝑅𝐵 ∥ 𝑟𝜋 = 693.59𝐾Ω ∥ 10𝐾Ω ≅ 9.86𝐾Ω > 5𝐾Ω

The lowest signal frequency of interest is 200 Hz, fcl =20Hz.
1 1 1
𝑓𝑐𝑙 = ,𝐶 = = ≅ 8.072 × 10−7 𝑓 = 80.72𝜇𝑓
2𝜋𝑅𝑖𝑛 𝐶 2𝜋𝑓𝑐𝑙 𝑅𝑖𝑛 2𝜋 × 20𝐻𝑧 × 9.86𝐾Ω
25
5.63. We wish to design the CE stage of Fig. 5.153 for maximum voltage gain but with an output impedance no greater than 500
Ω. Allowing the transistor to experience at most 400mVof base-collector forward bias, design the stage.
Sol:
𝑅𝑜𝑢𝑡 = 𝑅𝐶 ≤ 500Ω , 𝑅𝐶 = 500Ω
𝑉𝐶𝐶 − 𝑉𝐵𝐸 + 400𝑚𝑉 𝐼𝐶
𝑉𝐵𝐸 − (𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 ) ≤ 400𝑚𝑉 , 𝐼𝐶 ≥ , 𝑉𝐵𝐸 = 𝑉𝑇 ln
𝑅𝐶 𝐼𝑆

𝑉𝐵𝐸 = 769.37𝑚𝑉 , 𝐼𝐶 = 4.26𝑚𝐴 , 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐸 𝑅𝐸 ≅ 370𝑚𝑉 , 𝑉𝐵𝐸 − 𝑉𝐶𝐸 = 399.39𝑚𝑉 < 400𝑚𝑉
2.5𝑉 − 769.37𝑚𝑉
𝑉𝐶𝐶 = 𝐼𝐵 𝑅𝐵 + 𝑉𝐵𝐸 , 𝑅𝐵 = ≅ 40.63𝐾Ω
42.6𝜇𝐴
𝐴𝑣 = −𝑔𝑚 𝑅𝐶 = − × 𝑅𝐶 = − × 500Ω ≅ −81.92
𝑉𝑇 26𝑚𝑉
5.64. The CE stage of Fig. 5.153 must be designed for minimum supply voltage but with a voltage gain of 15 and an output
impedance of 2KΩ. If the transistor is allowed to sustain a base-collector forward bias of 400mV, design the stage and
calculate the required supply voltage.
Sol:
𝐼𝐶 15 × 𝑉𝑇 15 × 26𝑚𝑉
𝑅𝑜𝑢𝑡 = 𝑅𝐶 = 2𝐾Ω , 𝐴𝑣 = −𝑔𝑚 𝑅𝐶 = − × 𝑅𝐶 = −15 , 𝐼𝐶 = = = 195𝜇𝐴
𝑉𝑇 𝑅𝐶 2𝐾Ω
𝐼𝐶 195𝜇𝐴
𝑉𝐵𝐸 = 𝑉𝑇 ln = 26𝑚𝑉 × ln ≅ 689.18𝑚𝑉
𝐼𝑆 6 × 10−16 𝐴
𝑉𝐵𝐸 − (𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 ) ≤ 400𝑚𝑉 , 𝑉𝐶𝐶 ≥ 689.18𝑚𝑉 − 400𝑚𝑉 + 195𝜇𝐴 × 2𝐾Ω , 𝑉𝐶𝐶 ≥ 679.18𝑚𝑉 , 𝑤𝑒 𝑠𝑒𝑡 𝑉𝐶𝐶 = 690𝑚𝑉
690𝑚𝑉 − 689.18𝑚𝑉
𝑉𝐶𝐶 = 𝐼𝐵 𝑅𝐵 + 𝑉𝐵𝐸 , 𝑅𝐵 = ≅ 420.51Ω
1.95𝜇𝐴
5.65. Design the degenerated CE stage of Fig. 5.154 for a voltage gain of 5 and an output impedance of 500Ω. Assume RE sustains
a voltage drop of 300 mV and the current flowing through R1 is approximately 10 times the base current.
Sol:
𝑟𝜋 + (1 + 𝛽)𝑅𝐸
𝑅𝑜𝑢𝑡 = 𝑅𝐶 = 500Ω , 𝑣𝑖𝑛 = 𝑣𝜋 × , 𝑣𝑜𝑢𝑡 = −𝑔𝑚 𝑣𝜋 𝑅𝐶
𝑟𝜋
𝑣𝑜𝑢𝑡 −𝑔𝑚 𝑣𝜋 𝑅𝐶 −𝑔𝑚 𝑅𝐶 𝑟𝜋 𝛽𝑉𝑇
𝐴𝑣 = = = ,𝑟 =
𝑣𝑖𝑛 𝑟𝜋 + (1 + 𝛽)𝑅𝐸 𝑟𝜋 + (1 + 𝛽)𝑅𝐸 𝜋 𝐼𝐶
𝑣𝜋 ×
𝑟𝜋
𝛽𝑉𝑇
−𝑔𝑚 𝑅𝐶 −𝑔𝑚 𝑅𝐶 𝛽𝑉𝑇 −𝐼𝐶 𝑅𝐶 26𝑚𝑉 + 300𝑚𝑉
𝐼𝐶
𝐴𝑣 = = = = −5 , 𝐼𝐶 = 5 × = 3.26𝑚𝐴
𝛽𝑉𝑇 𝛽𝑉𝑇 + (1 + 𝛽)𝐼𝐶 𝑅𝐸 𝑉𝑇 + 𝐼𝐸 𝑅𝐸 500Ω
+ (1 + 𝛽)𝑅𝐸
𝐼𝐶
300𝑚𝑉 𝐼𝐶 3.26𝑚𝐴
𝐼𝐸 𝑅𝐸 = 300𝑚𝑉 , 𝑅𝐸 = ≅ 91.11Ω , 𝑉𝐵𝐸 = 𝑉𝑇 ln = 26𝑚𝑉 × ln ≅ 762.41𝑚𝑉
1.01 × 3.26𝑚𝐴 𝐼𝑆 6 × 10−16 𝐴
𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝐼𝐸 𝑅𝐸 = 2.5𝑉 − 3.26𝑚𝐴 × 500Ω − 3.29𝑚𝐴 × 91.11Ω ≅ 570.25𝑚𝑉 , 𝑉𝐵𝐸 − 𝑉𝐶𝐸 = 192.16𝑚𝑉
Q1 is at soft saturation region, active region characteristics still apply.
𝑉𝐶𝐶 − 𝑉𝐵 𝑉𝐶𝐶 − 𝑉𝐵 2.5𝑉 − (762.41𝑚𝑉 + 300𝑚𝑉)
= 10𝐼𝐵 , 𝑅1 = = ≅ 4.41𝐾Ω
𝑅1 10𝐼𝐵 3.26𝑚𝐴
10 ×
100
26
𝑉𝐵𝐸 + 𝑉𝑅𝐸 762.41𝑚𝑉 + 300𝑚𝑉
𝑅2 = = ≅ 3.62𝐾Ω
9𝐼𝐵 3.26𝑚𝐴
9×
100
5.66. The stage of Fig. 5.154 must be designed for maximum voltage gain but an output impedance of no greater than 1KΩ.
Design the circuit, assuming that RE sustains 200 mV, the current flowing through R1 is approximately 10 times the base
current, and Q1 experiences a maximum base collector forward bias of 400 mV.
Sol:
𝑅𝑜𝑢𝑡 = 𝑅𝐶 = 1𝐾Ω
𝑉𝐶𝐶 + 400𝑚𝑉 − 𝑉𝐵𝐸 − 𝑉𝑅𝐸 𝐼𝐶
𝑉𝐵𝐶 = 𝑉𝐵 − 𝑉𝐶 = 𝑉𝐵𝐸 + 𝑉𝑅𝐸 − (𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 ) = 400𝑚𝑉 , 𝐼𝐶 = , 𝑉𝐵𝐸 = 𝑉𝑇 ln
𝑅𝐶 𝐼𝑆

𝑉𝐵𝐸 ≅ 749.05𝑚𝑉 , 𝐼𝐶 ≅ 1.95𝑚𝐴 , 𝑉𝐵𝐸 = 749.05𝑚𝑉 , 𝐼𝐶 = 1.95𝑚𝐴
200𝑚𝑉
Assume Q1 is at soft saturation region. 𝐼𝐸 𝑅𝐸 = 200𝑚𝑉 , 𝑅𝐸 = ≅ 101.55Ω
1.01×1.95𝑚𝐴
𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝐼𝐸 𝑅𝐸 ≅ 350𝑚𝑉 , 𝑉𝐵𝐸 − 𝑉𝐶𝐸 = 399.05𝑚𝑉 < 400𝑚𝑉, Q1 is at soft saturation region.
= 10𝐼𝐵 , 𝑅1 = = ≅ 7.95𝐾Ω
𝑅1 10𝐼𝐵 1.95𝑚𝐴
10 ×
100
𝑉𝐵𝐸 + 𝑉𝑅𝐸 749.05𝑚𝑉 + 200𝑚𝑉
𝑅2 = = ≅ 5.41𝐾Ω
9𝐼𝐵 1.95𝑚𝐴
9×
100
−𝐼𝐶 𝑅𝐶 −1.95𝑚𝐴 × 1𝐾Ω
𝐴𝑣 = = ≅ −8.63
𝑉𝑇 + 𝐼𝐸 𝑅𝐸 26𝑚𝑉 + 1.97𝑚𝐴 × 101.55Ω
5.67. Design the common-base stage shown in Fig. 5.155 for a voltage gain of 20 and an input impedance of 50Ω. Assume a
voltage drop of 10VT = 260mV across RE so that this resistor does not affect the input impedance significantly. Also, assume the
current flowing through R1 is approximately 10 times the base current, and the lowest frequency of interest is 200 Hz.
Sol:
1 1 1
Assume 𝑟𝜋 and 𝑅𝐸 ≫ , 𝑅𝑖𝑛 = 𝑅𝐸 ∥ 𝑟𝜋 ∥ ≈ = 50Ω
𝑔𝑚 𝑔𝑚 𝑔𝑚
𝑉𝑇 26𝑚𝑉 260𝑚𝑉
= 50𝛺 , 𝐼𝐶 = = 520𝜇𝐴 , 𝐼𝐸 𝑅𝐸 = 260𝑚𝑉 , 𝑅𝐸 = ≅ 495.05Ω
𝐼𝐶 50𝛺 1.01 × 520𝜇𝐴
𝐴𝑣 = −𝑔𝑚 𝑅𝐶 = −20 , 𝑅𝐶 = 20 × 50Ω = 1KΩ

𝑉𝐵𝐸 = 𝑉𝑇 ln = 26𝑚𝑉 × ln ≅ 714.69𝑚𝑉
𝐼𝑆 6 × 10−16 𝐴

= 10𝐼𝐵 , 𝑅1 = = ≅ 29.33𝐾Ω
𝑅1 10𝐼𝐵 520𝜇𝐴
10 ×
100
𝑉𝐵𝐸 + 𝑉𝑅𝐸 714.69𝑚𝑉 + 260𝑚𝑉
𝑅2 = = ≅ 20.83𝐾Ω
9𝐼𝐵 520𝜇𝐴
9×
100
1 1 1
𝑓𝑐𝑙 = ,𝐶 = = ≅ 1.591 × 10−4 𝑓 = 159.1𝜇𝑓
2𝜋𝑅𝑖𝑛 𝐶 2𝜋𝑓𝑐𝑙 𝑅𝑖𝑛 2𝜋 × 20𝐻𝑧 × 50Ω
27
5.68. The CB amplifier of Fig. 5.155 must achieve a voltage gain of 8 with an output impedance of 500Ω. Design the circuit with
the same assumptions as those in Problem 5.67.
Sol:
𝐼𝐶 8 × 26𝑚𝑉
𝑅𝑜𝑢𝑡 = 𝑅𝐶 = 500Ω , 𝐴𝑣 = −𝑔𝑚 𝑅𝐶 = × 𝑅𝐶 = −8 , 𝐼𝐶 = = 416𝜇𝐴
𝑉𝑇 500Ω

𝑉𝐵𝐸 = 𝑉𝑇 ln = 26𝑚𝑉 × ln ≅ 708.88𝑚𝑉
𝐼𝑆 6 × 10−16 𝐴

260𝑚𝑉
𝐼𝐸 𝑅𝐸 = 260𝑚𝑉 , 𝑅𝐸 = ≅ 618.81Ω
1.01 × 416𝜇𝐴
= 10𝐼𝐵 , 𝑅1 = = ≅ 36.81𝐾Ω
𝑅1 10𝐼𝐵 416𝜇𝐴
10 ×
100
𝑉𝐵𝐸 + 𝑉𝑅𝐸 708.88𝑚𝑉 + 260𝑚𝑉
𝑅2 = = ≅ 25.88𝐾Ω
9𝐼𝐵 416𝜇𝐴
9×
100
1
𝑅𝑖𝑛 = 𝑅𝐸 ∥ 𝑟𝜋 ∥ = 618.81Ω ∥ 6.25𝐾Ω ∥ 62.5Ω ≅ 56.26Ω
𝑔𝑚

1 1 1
𝑓𝑐𝑙 = ,𝐶 = = ≅ 1.414 × 10−4 𝑓 = 141.4𝜇𝑓
2𝜋𝑅𝑖𝑛 𝐶 2𝜋𝑓𝑐𝑙 𝑅𝑖𝑛 2𝜋 × 20𝐻𝑧 × 56.26Ω
5.69. Design the emitter follower shown in Fig. 5.156 for a voltage gain of 0.85 and an input impedance of greater than 10 KΩ.
Assume RL = 200Ω.
Sol:
𝑣𝜋 𝑣𝜋
𝑣𝑖𝑛 = 𝑣𝜋 + ( + 𝑔𝑚 𝑣𝜋 ) 𝑅𝐿 , 𝑣𝑜𝑢𝑡 = ( + 𝑔𝑚 𝑣𝜋 )
𝑣𝜋 𝑣𝜋
𝑣
𝑣𝑜𝑢𝑡 ( 𝜋 + 𝑔𝑚 𝑣𝜋 ) 𝑅𝐿 𝑅𝐿 𝑅𝐿
𝑟𝜋
𝐴𝑣 = = 𝑣 = 𝑟 = = 0.85 , 𝐼𝐶 ≅ 729.46𝜇𝐴
𝑣𝜋 + ( + 𝑔𝑚 𝑣𝜋 ) 𝑅𝐿 1 + 𝛽 + 𝑅𝐿 𝛽 𝑉𝑇
𝑟𝜋 × + 𝑅𝐿
1 + 𝛽 𝐼𝐶
𝐼𝐶 729.46𝜇𝐴
𝑉𝐵𝐸 = 𝑉𝑇 ln = 26𝑚𝑉 × ln ≅ 723.49𝑚𝑉
𝐼𝑆 6 × 10−16 𝐴
𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐸 𝑅𝐿 ≅ 2.35𝑉 > 𝑉𝐵𝐸 , Q1 is at active region.

𝑅𝑖𝑛 = 𝑅1 ∥ [𝑟𝜋 + (1 + 𝛽)𝑅𝐿 ] ≥ 10𝐾Ω , 𝑅1 ≥ 17.27𝐾Ω , or 𝑉𝐶𝐶 = 𝐼𝐵 𝑅1 + 𝑉𝐵𝐸 + 𝐼𝐸 𝑅𝐿
𝛽 × (𝑉𝐶𝐶 − 𝑉𝐵𝐸 − 𝐼𝐸 𝑅𝐿 ) 100 × (2.5𝑉 − 723.49𝑚𝑉 − 1.01 × 729.46𝜇𝐴 × 200Ω)
𝑅1 = = ≅ 223.34𝐾Ω
𝐼𝐶 729.46𝜇𝐴
5.70. The follower shown in Fig. 5.157 must drive a load resistance, RL = 50Ω, with a voltage gain of 0.8. Design the circuit
assuming that the lowest frequency of interest is 100 MHz. (Hint: Select the voltage drop across RE to be much greater than
VT so that this resistor does not affect the voltage gain significantly.)
Sol:
𝑣𝜋 𝑣𝜋
𝑣𝑖𝑛 = 𝑣𝜋 + ( + 𝑔𝑚 𝑣𝜋 ) (𝑅𝐿 ∥ 𝑅𝐸 ) , 𝑣𝑜𝑢𝑡 = ( + 𝑔𝑚 𝑣𝜋 ) , 𝑅𝐿 ∥ 𝑅𝐸 ≈ 𝑅𝐿
𝑟𝜋 𝑟𝜋
28
𝑣
𝑣𝑜𝑢𝑡 ( 𝜋 + 𝑔𝑚 𝑣𝜋 ) 𝑅𝐿 𝑅𝐿 𝑅𝐿
𝑟𝜋
𝐴𝑣 = = 𝑣 = 𝑟 = = 0.8 , 𝐼𝐶 ≅ 2.06𝑚𝐴
𝑣𝜋 + ( + 𝑔𝑚 𝑣𝜋 ) 𝑅𝐿 1 + 𝛽 + 𝑅𝐿 𝛽 𝑉𝑇
𝑟𝜋 × + 𝑅𝐿
1 + 𝛽 𝐼𝐶
𝑉𝐵𝐸 = 𝑉𝑇 ln = 26𝑚𝑉 × ln ≅ 750.48𝑚𝑉 , 𝑅𝐸 ≫ 𝑅𝐿 , 𝐶ℎ𝑜𝑜𝑠𝑒 𝑅𝐸 = 500Ω
𝐼𝑆 6 × 10−16 𝐴
𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐸 𝑅𝐸 ≅ 1.46𝑉 > 𝑉𝐵𝐸 , Q1 is at active region.

𝑉𝐶𝐶 − 𝑉𝐵𝐸 − 𝐼𝐸 𝑅𝐸
𝑉𝐶𝐶 = 𝐼𝐵 𝑅1 + 𝑉𝐵𝐸 + 𝐼𝐸 𝑅𝐸 , 𝑅1 = ≅ 34.43𝐾Ω
𝐼𝐵
The lowest signal frequency of interest is 100 MHz, fcl =10 MHz.
𝑉𝑇
𝑟𝜋 = 𝛽 × ≅ 1.26𝐾Ω , 𝑅𝑖𝑛 = 𝑅1 ∥ [𝑟𝜋 + (1 + 𝛽)(𝑅𝐿 ∥ 𝑅𝐸 )] ≅ 5𝐾Ω
𝐼𝐶
1 1 1
𝑓𝑐𝑙 = , 𝐶1 = = ≅ 3.183 × 10−12 𝑓 = 3.183𝑝𝑓
2𝜋𝑅𝑖𝑛 𝐶1 2𝜋𝑓𝑐𝑙 𝑅𝑖𝑛 2𝜋 × 10 𝑀𝐻𝑧 × 5𝐾Ω
1
𝑅𝑜𝑢𝑡 = 𝑅𝐸 ∥ ∥ 𝑟 = 500Ω ∥ 12.6Ω ∥ 1.26𝐾Ω ≅ 11.66Ω
𝑔𝑚 𝜋
1 1 1
𝑓𝑐𝑙 = , 𝐶2 = = ≅ 2.581 × 10−10 𝑓 = 25.81𝑛𝑓
2𝜋(𝑅𝑜𝑢𝑡 + 𝑅𝐿 )𝐶2 2𝜋(𝑅𝑜𝑢𝑡 + 𝑅𝐿 )𝑓𝑐𝑙 2𝜋 × 10 𝑀𝐻𝑧 × 61.66Ω
29

t and output resistance of 50Ω. Determine the

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t and output resistance of 50Ω. Determine the

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高雄科技大學電子系 兼任副教授李謨中

𝑣𝜋 = −𝑖𝑋 (𝑟𝜋 ∥ 𝑅𝐸 ) , 𝑣𝑋 = (𝑖𝑥 − 𝑔𝑚 𝑣𝜋 )𝑟𝑂 − 𝑣𝜋 = [𝑖𝑥 + 𝑔𝑚 𝑖𝑋 (𝑟𝜋 ∥ 𝑅𝐸 )]𝑟𝑂 + 𝑖𝑋 (𝑟𝜋 ∥ 𝑅𝐸 )

𝑅𝑜𝑢𝑡 = 𝑅1 ∥ [𝑟𝑂 + (𝑔𝑚 𝑟𝑂 + 1)(𝑟𝜋 ∥ 𝑅𝐸 )]

𝑣𝑥 − 𝑖𝑥 [𝑅𝐸 ∥ (𝑟𝜋 + 𝑅𝐵 )] 𝑖𝑥 𝑅𝐸 𝑣𝑥 − 𝑖𝑥 [𝑅𝐸 ∥ (𝑟𝜋 + 𝑅𝐵 )]

Q2 small signal circuit.

RE is the input resistor of Q2.

Assume 𝑉𝐵𝐸 = 800𝑚𝑉 , 𝐼𝐶 ≅ 1.7𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛

Assume 𝑉𝐵𝐸1 = 𝑉𝐵𝐸2 = 800𝑚𝑉 , 𝐼𝐶1 ≅ 900𝜇𝐴 = 𝐼𝐶2 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛

Assume 𝑉𝐵𝐸 = 800𝑚𝑉 , 𝐼𝐶 ≅ 1.2𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛

Assume 𝑉𝐵𝐸 = 700𝑚𝑉 , 𝐼𝐶 ≅ 919.12𝜇𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛

Assume 𝑉𝐵𝐸1 = 𝑉𝐵𝐸2 = 750𝑚𝑉 , 𝐼𝐶1 ≅ 1.74𝑚𝐴 , 𝐼𝐶2 ≅ 1.76𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛

Assume 𝑉𝐵𝐸 = 750𝑚𝑉 , 𝐼𝐶 ≅ 801.28𝜇𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛

Assume 𝑉𝐵𝐸 = 700𝑚𝑉 , 𝐼𝐶 ≅ 79.24𝜇𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛

Assume 𝑉𝐵𝐸 = 800𝑚𝑉 , 𝐼𝐶 ≅ 850𝜇𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛

Assume 𝑉𝐵𝐸 = 700𝑚𝑉 , 𝐼𝐶 ≅ 1.04𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛

𝐴𝑣 = −𝑔𝑚 𝑅𝐶 = −28.56𝑚𝑆 × 1𝐾Ω = −28.56 , 𝑅𝑖𝑛 = 𝑅1 ∥ 𝑅2 ∥ 𝑟𝜋 ≅ 2.56𝐾Ω , 𝑅𝑜𝑢𝑡 = 𝑅𝐶 = 1𝐾Ω

Assume 𝑉𝐵𝐸 = 800𝑚𝑉 , 𝐼𝐶 ≅ 850𝜇𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛

𝑅2 = 15.84𝐾Ω , Guarantees the operation of Q1 in the active mode, 𝑅2 < 15.84𝐾Ω

Assume 𝑉𝐵𝐸1 = 𝑉𝐵𝐸2 = 700𝑚𝑉 , 𝐼𝐶1 ≅ 1.67𝑚𝐴 , 𝐼𝐶2 ≅ 1.69𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛

𝑉𝑡ℎ − 𝑉𝐵𝐸1 − 𝑉𝐵𝐸3 𝐼𝐶1 𝐼𝐶3

Assume 𝑉𝐵𝐸1 = 𝑉𝐵𝐸2 = 550𝑚𝑉 , 𝐼𝐶1 ≅ 1.60𝑚𝐴 , 𝐼𝐶3 ≅ 2.4𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛

Assume 𝑉𝐵𝐸3 = 700𝑚𝑉 , 𝐼𝐶1 ≅ 1.60𝑚𝐴 , 𝐼𝐶3 ≅ 2.4𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛

𝑉𝐶𝐶 − 𝑉𝐵𝐸 − 𝐼𝐸 𝑅𝐶 2.5𝑉 − 658.54𝑚𝑉 − 0.505𝑚𝐴 × 1𝐾Ω

5.19. In the circuit of Fig. 5.112, if β = 100, IS = 5 × 10−15 A, determine VX and IC .

Assume 𝑉𝐵𝐸 = 700𝑚𝑉 , 𝐼𝐶 ≅ 4.47𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛:

Assume 𝑉𝐵𝐸 = 750𝑚𝑉 , 𝐼𝐶 ≅ 1.31𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛:

Assume 𝑉𝐵𝐸 = 750𝑚𝑉 , 𝐼𝐶 ≅ 1.58𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛:

Assume 𝑉𝐵𝐸 = 700𝑚𝑉 , 𝐼𝐶 ≅ 1.42𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛:

𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 2𝐼𝐸 𝑅𝐸 = 1.69𝑉 > 𝑉𝐵𝐸 , Q1 is at active region.

Assume 𝑉𝐸𝐵 = 700𝑚𝑉 , 𝐼𝐶 ≅ 1.63𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛:

𝑉𝐶𝐶 −𝑉𝐸𝐵 −𝑉𝑡ℎ 𝐼𝐶

Assume 𝑉𝐸𝐵 = 750𝑚𝑉 , 𝐼𝐶 ≅ 3.69𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛:

𝑉𝐶𝐶 −𝑉𝐵𝐸1 −𝑉𝐸𝐵2 −𝑉𝑡ℎ 100 100 51

Assume 𝑉𝐵𝐸1 = 𝑉𝐸𝐵2 = 700𝑚𝑉 , 𝐼𝐶2 ≅ 868.06𝜇𝐴 , 𝐼𝐶1 ≅ 876.65𝜇𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛:

2.5𝑉 − 681.55𝑚𝑉 − 3.88𝜇𝐴 × 5𝐾Ω − 1.25V

If the value of RE is halved. 𝑅𝐸 = 1.39𝐾Ω. Assume Q1 is at active region.

Assume 𝑉𝐸𝐵 = 700𝑚𝑉 , 𝐼𝐶 ≅ 269.87𝜇𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛:

Q1 is at deep saturation region.

Assume 𝑉𝐸𝐵 = 750𝑚𝑉 , 𝐼𝐶 ≅ 1.75𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛:

𝑉𝐶𝐶 −𝑉𝐸𝐵 −𝑉𝑡ℎ 𝐼𝐶

Assume 𝑉𝐸𝐵 = 750𝑚𝑉 , 𝐼𝐶 ≅ 1.20𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛:

𝑉𝐶𝐶 −𝑉𝐸𝐵 −𝑉𝑡ℎ 𝐼𝐶

Assume 𝑉𝐸𝐵 = 750𝑚𝑉 , 𝐼𝐶 ≅ 2.01𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛:

−56.54𝑚𝑆 × {1𝐾Ω ∥ [56.54𝑚𝑆 × 6.8𝐾Ω × (500Ω ∥ 1.77𝐾Ω )]}

𝑉𝐵𝐸 𝜕𝐼𝐶 1 𝑉𝐵𝐸 𝐼𝐶

Assume 𝑉𝐵𝐸 = 700𝑚𝑉 , 𝐼𝐶 = 1.52𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛:

𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝐼𝐸 𝑅𝐸 = 746.62𝑚𝑉 = 𝑉𝐵𝐸 , Q1 is at the edge of active region.

Assume 𝑉𝐵𝐸 = 750𝑚𝑉 , 𝐼𝐶 ≅ 1.59𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛:

By KVL: 𝑉𝐶𝐶 = 𝐼𝐵 𝑅𝐵 + 𝑉𝐵𝐸 + 𝐼𝐸 𝑅𝐸

Assume 𝑉𝐵𝐸 = 750𝑚𝑉 , 𝐼𝐶 ≅ 694.44𝜇𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛:

Assume 𝑉𝐵𝐸 = 700𝑚𝑉 , 𝐼𝐶 ≅ 154.64𝜇𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛:

𝑣𝑖𝑛 = −𝑣𝜋 , 𝑣𝑜𝑢𝑡 = −𝑔𝑚 𝑣𝜋 𝑅𝐶 , 𝐴𝑣 = 𝑔𝑚 𝑅𝐶 = 76.92𝑚𝑆 × 500Ω ≅ 38.46

Assume Q1 and Q2 is at active region.

𝐼𝐶2 𝛽 100 𝛽 100

∵ 𝒗𝝅𝟐 + 𝑽𝑹𝑬 = 𝟎 , ∴ 𝒗𝝅𝟐 = 𝑽𝑹𝑬 = 𝟎 , (𝒑. 𝟏𝟖𝟗)

Assume 𝑉𝐵𝐸 = 700𝑚𝑉 , 𝐼𝐶 ≅ 1𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛:

𝐴𝑣𝑜𝑢𝑡 𝑣𝑜𝑢𝑡 𝐴𝑣𝑜𝑢𝑡 𝐴𝑣𝑜𝑢𝑡

𝐼𝐶 < 2.62𝑚𝐴 , 𝐼𝐶 𝑅𝐸 > 9𝑉𝑇 = 234𝑚𝑉 , 𝑅𝐸 > 89.31Ω

Assume 𝑉𝐵𝐸 = 750𝑚𝑉 , 𝐼𝐶 ≅ 1.58𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛:

𝑅𝑖𝑛 = 2.6𝐾Ω + (1 + 100)(10𝐾Ω ∥ 2.6𝐾Ω ∥ 26Ω) ≅ 5.19𝐾Ω

𝑅𝑖𝑛 = 𝑅𝐵 ∥ 𝑟𝜋 = 693.59𝐾Ω ∥ 10𝐾Ω ≅ 9.86𝐾Ω > 5𝐾Ω

Assume 𝑉𝐵𝐸 = 750𝑚𝑉 , 𝐼𝐶 ≅ 4.3𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛:

Assume 𝑉𝐵𝐸 = 750𝑚𝑉 , 𝐼𝐶 ≅ 1.95𝑚𝐴 , 𝑏𝑦 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛:

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