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Figure 1. Symbol(1)
Note: 1. Pin names are written as they appear on the user screen when the symbol is
Rev. 2704A–PMGMT–10/02
opened in the design tool environment.
1
Functional Diagram
Figure 2. Functional Diagram
VIN7
VSAUVC
ON7
ON7 IBIAS VBG Pass
ON7 Device
VRADC
R1
GND3
R2
ON7
GND3
Pin Description
Electrical Specifications(1)
TJ = -20°C to 125°C, VIN7 = 4.75V to 5.5V unless otherwise specified, output capacitance = 2.2 µF.
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2704A–PMGMT–10/02
Table 1. Electrical Specifications (Continued)
Symbol Parameter Condition Min Typ Max Unit
Bandwidth: 10 Hz to 100 kHz
VN Output noise (2) 60 80 µVrms
IRAD = 30 mA
100% of IRAD,
TR Rise time 230 300 µs
10% to 90% of VRAD
ISD Shut down current 1 µA
ICC Short-circuit current 82 100 mA
Notes: 1. Obtained by considering the parasitics of a TFBGA100 Package.
2. Obtained by using BG019 as reference voltage generator.
Control Modes All digital signals are referred to the supply voltage VIN7.
Application Example A ceramic capacitor of 2.2 µF with ESR between 20 mΩ and 250 mΩ connected from
VRAD to ground is needed as external compensation.
2.5V Regulator
(e.g., RE031)
2.5V
VSAUVC
VIN7 Input
1.231V Bandgap VBG Supply
(e.g., BG019)
VRAD
ON7 CL
VRADS
Digital
Core
VRADC
GND3
5
2704A–PMGMT–10/02
Typical Performance Characteristics (Conditions specified on page 8)
0.15
c 1.0
-0.05
-0.15 0.5
-0.25
0.0
4.75 5 5.25 5.5
0 5 10 15 20 25 30
Input Voltage [V]
Output Current [mA]
Transient Line Regulation at Full Load Transient Load Regulation for VIN7=5,1V
4.52 4.510
4.52
4.51 4.505
Output Voltage [V]
Output Voltage [V]
4.51
4.50 4.500
4.50
4.49 4.495
4.49
4.48 4.490
0.35 0.4 0.45 0.5 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8
Time [ms] Time [ms]
P o w e r S u p p ly R e je ctio n Ra tio a t F u ll L o a d
Power Supply Rejection Ratio at Full Load and VIN7=5,1V
ve rsu s In p u t V o lta g e
10 100 1000 10000 100000
4.75 4.85 4.95 5.05 5.15 5.25 5.35 5.45
-30
-10
-40 -20
Freq = 100 k Hz
-30
PSRR [dB]
-50
-40
P S R R [d B ]
-50 Freq = 1 kHz
-60
Freq = 20 kHz
-60
-70 -70
-80
Fr eq = 100 Hz
-80
-90
Frequency [Hz]
In p u t V o lta g e [V ]
O u tp u t N o ise S p e ctru m a t F u ll L o a d
a n d V IN7 = 5,1V
L DO S ta rtu p a t F u ll L o a d a n d V IN 7 = 5 ,1V
1E-10
6
5
1E-11
O u tp u t No ise [V ^ 2/ Hz ]
O N7
3 1E-12
2 VR AD
1E-13
1
0 1E-14
0 50 100 150 200 250 300 10 100 1000 10000 100000
T i m e [µs] F re q u e n cy [H z ]
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2704A–PMGMT–10/02
Terminology
Line Regulation Measures the maximum transient and DC variations of the output voltage of the LDO
when the supply changes between two specified values with fixed load current; mini-
mum rise time and fall time is 5 µs.
5.5V
VIN7
4.75V
5 µs 5 µs
VRAD ∆VTRAN
∆VDC
Load Regulation Measures the maximum transient and DC variations of the output voltage of the LDO
when the load current changes between two specified values with fixed power supply;
minimum rise time and fall time is 5 µs.
IRAD
VRAD
∆VTRAN
∆VDC
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literature@atmel.com
Web Site
http://www.atmel.com
2704A–PMGMT–10/02 0M