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Features

• Low Drop Out Voltage Regulator


• 4.5V Fixed Output Voltage
• 4.75V to 5.5V Supply Operation
• 30 mA Maximum Load Current
• Less Than 162 µA (max) Quiescent Current
• Power-down Mode Consumption Less Than 1 µA
• More Than 50 dB (Typical) PSRR at 1 kHz
• 80 µVRMS Output Noise
• 0.35 µm CMOS Technology
• Typical Application: Radio Frequency Synthesizer and Antenna Switch Controller
Section Supply in Mobile Terminals
Embedded ASIC
Macrocell:
Description
RE028 is a Low Drop Out (LDO) voltage regulator macrocell with a fixed 4.5V output
Power
voltage, rated for loads up to 30 mA. It is designed to be integrated with other analog
cells, digital logic, microcontrollers, DSP cores and memory blocks into system-on-
Management
chip products. Furthermore, the RE028 is designed to supply radio frequency synthe-
sizers and used as a controller for the antenna switch.
The circuit consists of a PMOS pass device, an error amplifier and a feedback resis- RE028
tive network, sized to achieve the required closed loop gain. These blocks make up
the regulating loop. An over-current and short circuit protection circuit has been Fixed 4.5V
included to limit the output current delivered by the regulator, thus avoiding destruction
in case of a short circuit. 30 mA
An external reference voltage (bandgap voltage) is necessary for correct functionality.
The target reference voltage is 1.231V, delivered, for example, by BG019. Current ref-
LDO Voltage
erence is generated inside the cell through a circuit supplied by a 2.5V ± 0.1V
regulated input voltage on V SAUVC. Remote sense terminal VRADS provides regulation
Regulator
at the load by connecting it to the output terminal near a critical point to improve per-
formance of the regulator (e.g., connecting them at the package pin by double-
bonding, thus avoiding the bonding resistance influence). A ceramic capacitor of 2.2
µF connected from VRAD to ground is needed as external compensation.

Figure 1. Symbol(1)

Note: 1. Pin names are written as they appear on the user screen when the symbol is
Rev. 2704A–PMGMT–10/02
opened in the design tool environment.

1
Functional Diagram
Figure 2. Functional Diagram
VIN7
VSAUVC

ON7
ON7 IBIAS VBG Pass
ON7 Device

VRADC

GND3 GND3 VRAD


VRADS
Current
Sensing and
ON7 Limiter

R1
GND3

R2

ON7

GND3

Pin Description

Pin Name I/O Type Function Value


VIN7 Power supply External pad Power supply 4.75V to 5.5V
VRAD Analog output External pad Output voltage 4.4V to 4.6V
VRADS Analog input External pad Sense voltage 4.4V to 4.6V
VRADC Analog output Internal pin Output voltage 4.4V to 4.6V
GND3 Ground Internal pin Ground 0
VSAUVC Power supply Internal pin Power supply 2.5V ± 0.1V
VBG Analog input Internal pin Voltage reference 1.231V
ON7 Digital input Internal pin Enable command 0 or VIN7

2 RE028 4.5V 30mA LDO Voltage Regulator


2704A–PMGMT–10/02
RE028 4.5V 30mA LDO Voltage Regulator

Absolute Maximum Ratings*


VIN .......................................................... -0.3V to 6.5V *NOTICE: Stresses beyond those listed under “Absolute Maxi-
mum Ratings” may cause permanent damage to the
Digital Signals......................................... -0.3V to 5.5V device. This is a stress rating only and functional
operation of the device at these or other conditions
Output Current..................................Internally Limited beyond those indicated in the operational sections of
this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may
Junction Temperature ..........................-40°C to 150°C
affect device reliability.

Electrical Specifications(1)
TJ = -20°C to 125°C, VIN7 = 4.75V to 5.5V unless otherwise specified, output capacitance = 2.2 µF.

Table 1. Electrical Specifications


Symbol Parameter Condition Min Typ Max Unit
VIN7 Operating supply voltage 4.75 5.1 5.5 V
VSAUVC Auxiliary operating supply voltage 2.4 2.5 2.6 V
TJ Junction temperature range -20 125 °C
VRAD Output voltage 4.4 4.5 4.6 V
IRAD Output current 0 30 mA
IQQ Quiescent current 138 162 µA
VIN7 from 4.75V to 5.5V,
∆VDC Line regulation 3 mV
IRAD = 30 mA
VIN7 from 4.75V to 5.5V,
∆VTRAN Transient line regulation IRAD = 30 mA, 35 mV
rise time = fall time = 5 µs
∆VDC Load regulation 10% to 90% of max IRAD 3 mV
10% to 90% of max IRAD,
∆VTRAN Transient load regulation 17 mV
rise time = fall time = 5 µs
@ 100 Hz -52 -67
@ 1 kHz -41 -55
VIN7 = 4.75V
@ 20 kHz -13 -31
@ 100 kHz -18 -21
@ 100 Hz -68 -77
@ 1 kHz -62 -68
PSRR Power supply rejection ratio VIN7 = 5.1V dB
@ 20 kHz -36 -51
@ 100 kHz -27 -38
@ 100 Hz -60 -67
@ 1 kHz -60 -66
VIN7 = 5.5V
@ 20 kHz -48 -54
@ 100 kHz -37 -42

3
2704A–PMGMT–10/02
Table 1. Electrical Specifications (Continued)
Symbol Parameter Condition Min Typ Max Unit
Bandwidth: 10 Hz to 100 kHz
VN Output noise (2) 60 80 µVrms
IRAD = 30 mA
100% of IRAD,
TR Rise time 230 300 µs
10% to 90% of VRAD
ISD Shut down current 1 µA
ICC Short-circuit current 82 100 mA
Notes: 1. Obtained by considering the parasitics of a TFBGA100 Package.
2. Obtained by using BG019 as reference voltage generator.

4 RE028 4.5V 30mA LDO Voltage Regulator


2704A–PMGMT–10/02
RE028 4.5V 30mA LDO Voltage Regulator

Control Modes All digital signals are referred to the supply voltage VIN7.

Table 2. Truth Table


ON7 VRAD
0 Power down (High-Z)
1 Power on, VRAD = 4.5V

Application Example A ceramic capacitor of 2.2 µF with ESR between 20 mΩ and 250 mΩ connected from
VRAD to ground is needed as external compensation.

Description Min Typ Max Units


Capacitor, CL 1.8 2.2 2.6 µF

Figure 3. Application Example

2.5V Regulator
(e.g., RE031)

2.5V
VSAUVC

VIN7 Input
1.231V Bandgap VBG Supply
(e.g., BG019)

VRAD

ON7 CL
VRADS

Digital
Core

VRADC
GND3

5
2704A–PMGMT–10/02
Typical Performance Characteristics (Conditions specified on page 8)

Static Load Regulation at full load


Static Line Regulation at Full Load
and VIN7 = 5,1V
0.25
2.0
Output Voltage Change [mV]

0.15

Output Voltage Change [mV]


1.5
0.05

c 1.0
-0.05

-0.15 0.5

-0.25
0.0
4.75 5 5.25 5.5
0 5 10 15 20 25 30
Input Voltage [V]
Output Current [mA]

Transient Line Regulation at Full Load Transient Load Regulation for VIN7=5,1V
4.52 4.510

4.52

4.51 4.505
Output Voltage [V]
Output Voltage [V]

4.51

4.50 4.500

4.50

4.49 4.495

4.49

4.48 4.490
0.35 0.4 0.45 0.5 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8
Time [ms] Time [ms]

6 RE028 4.5V 30mA LDO Voltage Regulator


2704A–PMGMT–10/02
RE028 4.5V 30mA LDO Voltage Regulator

Typical Performance Characteristics (Conditions specified on page 8)

P o w e r S u p p ly R e je ctio n Ra tio a t F u ll L o a d
Power Supply Rejection Ratio at Full Load and VIN7=5,1V
ve rsu s In p u t V o lta g e
10 100 1000 10000 100000
4.75 4.85 4.95 5.05 5.15 5.25 5.35 5.45
-30
-10

-40 -20
Freq = 100 k Hz
-30
PSRR [dB]

-50
-40

P S R R [d B ]
-50 Freq = 1 kHz
-60
Freq = 20 kHz
-60

-70 -70

-80
Fr eq = 100 Hz
-80
-90
Frequency [Hz]
In p u t V o lta g e [V ]

O u tp u t N o ise S p e ctru m a t F u ll L o a d
a n d V IN7 = 5,1V
L DO S ta rtu p a t F u ll L o a d a n d V IN 7 = 5 ,1V
1E-10
6

5
1E-11
O u tp u t No ise [V ^ 2/ Hz ]

Total output nois e 60 µ V R MS


4
V o l ta g e [V ]

O N7
3 1E-12

2 VR AD
1E-13
1

0 1E-14
0 50 100 150 200 250 300 10 100 1000 10000 100000
T i m e [µs] F re q u e n cy [H z ]

7
2704A–PMGMT–10/02
Terminology
Line Regulation Measures the maximum transient and DC variations of the output voltage of the LDO
when the supply changes between two specified values with fixed load current; mini-
mum rise time and fall time is 5 µs.

Figure 4. Line Regulation

5.5V
VIN7

4.75V

5 µs 5 µs

VRAD ∆VTRAN

∆VDC

Load Regulation Measures the maximum transient and DC variations of the output voltage of the LDO
when the load current changes between two specified values with fixed power supply;
minimum rise time and fall time is 5 µs.

Figure 5. Load Regulation

90% of max IRAD

IRAD

10% of max IRAD


5 µs 5 µs

VRAD
∆VTRAN

∆VDC

8 RE028 4.5V 30mA LDO Voltage Regulator


2704A–PMGMT–10/02
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2704A–PMGMT–10/02 0M

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