EXPERIMENT-1

INVERTER
CHARACTERISTICS

Analog LAB
PRASHANTH
EE19BTECH11003
January 31, 2021

Contents
1 Problem - 1 2
1.1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2 Problem - 2 6
2.1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

3 Problem - 3 12

1
1 Problem - 1
Determine large-signal Iout vs Vin of a CMOS inverter using the
circuit below:

Testbench to find Iout vs Vin :

2
 Iout vs Vin Graph will look like:

1.1
Sweep Vin from 0V to VDD (6V).

• We can find Iout without using ammeter as by using voltage differences

and resistance R1 .
• Since the opamp is negative feedback we can say that

Vin+ = Vin−

since current Iout is flowing through R1 we can write

Iout × R1 = Vout − Vin−

Vout − Vin+
=⇒ Iout =
R1

3
1.2
What is the self-bias voltage (VB ) of the inverter?
Testbench of self bias voltage

Vin at which Io equals to zero is self bias voltage

4
Then the output will be look like:

Here we get 2.56V has a testbench self bias approximately.

1.3
Find the transconductance at VB .
Here for finding transconductance at VB we need to get slope of Iout vs Vin
at self bias voltage.

5
1.4
Choose appropriate supply voltages for the opamp.

From the above fig. i.e Testbench we can see that,

Output voltage is in between -3V and 11V. So we can take VCC greater
than +11V and VEE lesser than -3V.
So here I considered VCC as +12V and VEE as -12V.

2 Problem - 2
Determine large-signal Vout vs Vin of a CMOS inverter using the
circuit below:

6
 Testbench to find Vout vs Vin graph :

Then Vout vs Vin graph look like :

7
2.1
Find small-signal resistance of the self-biased inverter using the
circuit shown below for VDD = 5V, 6V and 9V:

Testbench to find small signal resistance :

Figure 1: Just one testbench when VDD is 9V, rest we can change the VDD values

8
small signal resistance graph when VDD is 9V

Figure 2: ∆V

Figure 3: ∆I

9
small signal resistance graph when VDD is 6V

Figure 4: ∆V

Figure 5: ∆I

10
 small signal resistance graph when VDD is 5V

Figure 6: ∆V

Figure 7: ∆I

From all graphs of small signal resistance at 9V,6V,5V we get R = 217.6 Ω

11
3 Problem - 3
Using the data from above two experiments, estimate small-signal
gm and ro of the transconductor.
Also find out VT and β of the NMOS and PMOS of inverter.

12
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