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  • Digital System Design Ec-202: Practical File Submitted BY

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    hrishabh K Pandey
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    This document appears to be a student's submission of a practical file for a digital systems design course. It includes 9 experiments on topics like Boolean logic, half/full adders, comparators, multiplexers/demultiplexers, flip flops, and counters. For each experiment, the student provides circuit diagrams, truth tables, and observations from simulating the circuits in software. The file is submitted by a student named Hrishabh K. Pandey to their professor for partial course requirements.

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    This document appears to be a student's submission of a practical file for a digital systems design course. It includes 9 experiments on topics like Boolean logic, half/full adders, comparators, multiplexers/demultiplexers, flip flops, and counters. For each experiment, the student provides circuit diagrams, truth tables, and observations from simulating the circuits in software. The file is submitted by a student named Hrishabh K. Pandey to their professor for partial course requirements.

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    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
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    6 views47 pages

    Digital System Design Ec-202: Practical File Submitted BY

    Uploaded by

    hrishabh K Pandey
    This document appears to be a student's submission of a practical file for a digital systems design course. It includes 9 experiments on topics like Boolean logic, half/full adders, comparators, multiplexers/demultiplexers, flip flops, and counters. For each experiment, the student provides circuit diagrams, truth tables, and observations from simulating the circuits in software. The file is submitted by a student named Hrishabh K. Pandey to their professor for partial course requirements.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
    of 47

    DIGITAL SYSTEM DESIGN EC-202

    PRACTICAL FILE SUBMITTED


    BY:
    Hrishabh K. Pandey

    SAPID: 1000012449
    ROLLNO: 190102057 SUBMITTING
    TO:
    Mr. Vivek Kumar Gupta
    Assistant Professor
    Electrical and Electronic & Communications
    In partial fulfilment of the requirements for the Degree of
    BACHELOR OF TECHNOLOGY
    in

    COMPUTER SCIENCE & ENGINEERING,


    DIT UNIVERSITY, DEHRADUN Mussoorie Diversion Road,
    Dehradun, Uttarakhand - 248009, India.
    Name:Mehak Aggarwal SapID:1000012511

    EXPERIMENTS

    1. Analysis and synthesis of Boolean expression using Boolean logic gates.


    2. To study and verify half and full adder.
    3. Verify the truth table of one bit and two-bit comparator using logic gates
    4. Implementation of 4*1 multiplexer and 1*4 de-multiplexer using logic gates.
    5. Verify Binary to Gray and Gray to Binary conversions using NAND gates only.
    6. Verify the truth table of RS,JK,T and D flip flops using NAND and NOR gates.
    7. Verify the truth table and timing diagram of 4 bit synchronous and asynchronous parallel counter by using
    JK flip flop.

    8. Understanding the functionality of active low 3 to 8 decoder using 74138 IC.


    9. Analysis of 4 bit serial input parallel output shift register by using IC 7474(D flip flop).

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    Experiment 1

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    Experiment 2:

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    Observation On Simulation 1: Half Subtractor

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    2:Full Subtractor

    Experiment 3:

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    Observation On Simulation
    1:Half Adder

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    2:Full Adder

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    Experiment 4:

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    Observation on simulator
    1:4*1 multiplexer

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    2:1*4 demultiplexer

    Experiment 5:

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    Observation On Simulation 1: Binary to Gray

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    2:Gray To Binary

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    Asynchronous counter circuit and timing diagram

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    Synchronous counter circuit and timing diagram

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    Observation on simulation
    1. Asynchronous Parallel Counter

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    2. Synchronous Parallel Counter

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    Observation on simulation

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    Observation on simulation

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