PMAS Arid Agriculture University Rawalpindi

University Institute of Information Technology

Final Term Examination- Fall 2014

BS(CS)-3 (M/E)
Digital Logic Design
(CS-430)
Theory

Registration No.________________ Maximum Marks: 40

Date: Time Allowed: 2 hours

Question # 01 (6)
There are 4 different electronic devises placed in a room, each having one output line carrying binary
information. It is required to transmit the output from each devise using a single transmission line one by
one to the input of an electronic devise placed in another room. Design such a combinational circuit by
writing a truth table, deriving an expression and finally implementing the circuit diagram. Explain how
design solves the problem.

Question # 02 (2+6)
a) How many clock pulses the 4x16 decoder has detected?

b) Explain the working of a full adder by showing its truth table, deriving simplified expressions for
outputs and finally drawing its circuit diagram.

Question # 03 (6)
Explain the working of a 2 input sequential circuit capable of storing either a 1 or 0, retaining the stored
values until desired and inverting the stored values whenever required. What set of input values control the
above mentioned functions of the sequential circuit upon the rising edge of an edge triggering clock.
Illustrate using suitable block diagrams.

Question # 05 (6)
Information of 1010 from a 4 bit serial shift right register A is required to be copied into another four bit
serial shift right register B such that the contents of register A remain the same after data has been
transferred. Draw the flip flop arrangement to solve the above mentioned problem. Assume that the contents
of register B are 0000 before the transfer.

Question # 06 (2+4)
(a) If the positive edge triggering clock for the given 2 bit Asynchronous counter is replaced by a
negative edge triggering clock, will it count up or down?

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University Institute of Information Technology

b) Modify a MOD-16 negative edge triggered Asynchronous UP Counter, that will reset after counting
the first 9 clock pulses.
Question # 05 (6+2)
(a) Using a truth table and circuit diagram, explain the working of a 4 x 2 Encoder.

b) Which logical gate does the circuit diagram given below represent?

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