MR-11783; No of Pages 7

Microelectronics Reliability xxx (2015) xxx–xxx

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Microelectronics Reliability

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Heavy-ion irradiation study in SOI-based and bulk-based junctionless FinFETs using

3D-TCAD simulation
N. Vinodhkumar a,⁎, Y.V. Bhuvaneshwari b, K.K. Nagarajan b, R. Srinivasan a
a
IT Department, Sri Sivasubramaniya Nadar (SSN) College of Engineering, Kalavakkam 603110, Tamil Nadu, India
b
ECE Department, Sri Sivasubramaniya Nadar (SSN) College of Engineering, Kalavakkam 603110, Tamil Nadu, India

a r t i c l e i n f o a b s t r a c t

Article history: In this paper, SOI-based and bulk-based junctionless FinFETs subjected to heavy–ion irradiation are scrutinized
Received 18 February 2015 using 3D-TCAD simulation. Since the junctionless devices need heavy doping concentrations, devices with vari-
Received in revised form 12 September 2015 ous fin dopings are studied for their radiation performance. Transient drain current device simulations depict
Accepted 12 September 2015
higher disturbances in bulk devices. Bipolar amplification is higher in SOI devices. The soft error performances
Available online xxxx
of the SRAM cells based on the above devices are also explored. Even though the SOI devices have higher bipolar
Keywords:
amplification than the bulk device, they show better soft error performance in SRAMs.
Bipolar amplification © 2015 Elsevier Ltd. All rights reserved.
Charge collection
Heavy ion
Junctionless
Bulk
SOI
Single-event upset
TCAD

1. Introduction
In the CMOS evolution, junction less devices are the younger devices
that have no junction and contain single doping species at same level in
its source, drain and channel region. They are bulk conduction devices
where the current transport is in the bulk of the semiconductor,
which enhances the mobility in ON-state and reduces the impact of im-
perfect semiconductor/insulator interfaces [1–6].
Junctionless (JL) devices even though introduced on SOI substrate,
bulk-based junctionless devices are also investigated. A comparison
study between SOI and bulk based junctionless devices (SOI JL and
Bulk JL), based on DC performance metrics, is available in [5]. The
heavy ion irradiation simulation study by Daniela Munteanu et al. [7]
compares the junctionless device with the inversion mode device. It is
reported that the large floating body effects in junctionless devices re-
duce the device immunity to Single Event Upset (SEU).
On one hand, the reduction in the sensitive charge collection volume
is a positive aspect of the SOI technology. But on the other hand, the in-
creased bipolar amplification in SOI reduces the SEU (Single Event
Upset) hardness [8]. In essence, the impact of radiation is a concern in
⁎ Corresponding author. Tel.:+91 9486251374.
E-mail addresses: vinodhkumarn@ssn.edu.in (N. Vinodhkumar),
bhuvaneshwarijan2@gmail.com (Y.V. Bhuvaneshwari), nagarajankk@ssn.edu.in
(K.K. Nagarajan), srinivasanr@ssn.edu.in (R. Srinivasan).
bulk as well as SOI devices [9]. A radiation study between SOI and
bulk based conventional FinFET devices has been explored [10]. A com-
parison study between SOI and bulk based junctionless devices, with re-
spect to irradiation, is yet to be studied. The results/conclusions derived
at the device level studies may not be applicable at the circuit level.
Coming to circuit level soft error or single event upset (SEU) is a tempo-
rary failure that occurs in SRAM circuits as a result of high energetic par-
ticle strike. As we scaled down the devices soft error rates are projected
to increase [11].
This work has two parts (i) Studying drain current perturbations
during radiation and calculating bipolar gains in bulk JL and SOI JL de-
vices and (ii) Studying soft error performance of the bulk JL and SOI
JL-based SRAMs. All the studies are done using 3-D TCAD simulations.
The paper is organized as follows: Section 2 provides device structure
and ID-VG calibration, Section 3 provides simulation results and discus-
sions. The conclusion is explained in Section 4.
2. Device structure and ID–VG calibration
Sentaurus TCAD simulator from Synopsys is used for this study. The
simulator has many facilities and the following modules are used in this
study.
• Sentaurus Structure Editor (SDE): To create the device structure, to
define doping, to define contacts and to generate mesh for device
simulation.

http://dx.doi.org/10.1016/j.microrel.2015.09.011
0026-2714/© 2015 Elsevier Ltd. All rights reserved.

Please cite this article as: N. Vinodhkumar, et al., Heavy-ion irradiation study in SOI-based and bulk-based junctionless FinFETs using 3D-TCAD
simulation, Microelectronics Reliability (2015), http://dx.doi.org/10.1016/j.microrel.2015.09.011
2 N. Vinodhkumar et al. / Microelectronics Reliability xxx (2015) xxx–xxx

• Sentaurus Device Simulator (SDEVICE): To perform DC and transient the spacer as a mean to enhance the device performance, we have
simulations. also changed the gate electrode work function to achieve the same
• SVisual and Inspect: To view the results. IOFF for both bulk and SOI devices. As already stated this was done for
fair comparison. It can be noticed from Fig. 4(b) that both the SOI and
The schematic structure of N-type Junctionless FinFET is given in bulk devices have the same IOFF.
Fig. 1(a), (b) and (c). The structure generated from SDE for n-type
bulk JL and SOI JL is shown in Fig. 2(a) and (b) respectively. For better
3. Results and discussions
view, 2D cutline of the device structure is depicted in Fig. 3. The param-
eters considered for these devices are given in Table 1. The models used
The radiation strike is simulated using the heavy ion models in
in the device simulation include Auger recombination model, SRH re-
SDEVICE [12]. The electron–hole pair column created in the device by
combination model with carrier lifetimes depending on the doping
the ion strike is modelled using a carrier-generation function which
level as well as the Fermi–Dirac carrier statistics, doping dependent mo-
has a Gaussian radial distribution with the characteristic radius of
bility model, and field dependent mobility model. Quantum corrections
20 nm. The time distribution of ion track has a Gaussian shape centred
are also taken into account. The default parameters of the simulator are
at 25 ps and with a characteristic width of 2 ps [7].
tuned to match the drain current (ID) versus gate voltage (VG) charac-
At device level radiation study, off state drain current perturbation
teristics against the published results [5] and is shown in Fig. 4(a). The
and bipolar amplification are taken as performance metrics. At circuit
high-k spacer (Si3N4 spacer) is used to further optimize the device
i.e. SRAM level, the critical radiation dose (LETth), minimum dose re-
performance [6] and is given in Fig. 4(b).
quired to flip the cell contents, is used as a metric to study the soft
Three fin doping levels have been considered in simulation:
error performance.
1 × 1019 cm−3, 1.5 × 1019 cm−3 and 2 × 1019 cm−3. To have a fair com-
parison among bulk and SOI devices gate work function are finely tuned
to obtain the same off state current (IOFF). 3.1. Impact of radiation on bulk JL and SOI JL devices
Fig. 4(a) and (b) show the ‘without spacer ID–VG’ and ‘with spacer
ID–VG’ respectively, for bulk and SOI based junctionless devices used in Biasing the device in off-state with VG = 0 V and VDD = 1 V, the ra-
this study, for a fin doping of 1.5 × 1019 cm−3. When we introduced diation strike is initiated. A radiation dose of, LET = 1 MeV/(mg/cm2) is

Fig. 1. (a) Schematic of the top view of junctionless device along xy plane. (b) Schematic of the side view of bulk junctionless device along yz plane. (c) Schematic of the side view of SOI
junctionless device along yz plane.

Please cite this article as: N. Vinodhkumar, et al., Heavy-ion irradiation study in SOI-based and bulk-based junctionless FinFETs using 3D-TCAD
simulation, Microelectronics Reliability (2015), http://dx.doi.org/10.1016/j.microrel.2015.09.011
 N. Vinodhkumar et al. / Microelectronics Reliability xxx (2015) xxx–xxx 3

Fig. 3. 2D-structure of junctionless FinFET.

potential during the ion strikes. For a better view, the potential variation
in a cutline along y- axis (Refer Fig. 2) from source to drain in middle of
the channel at different times before and after ion strike is plotted in
Fig. 7 (1-D profile). It can be seen that VDD (1 V) is dropped from
drain to source. The same study is done in ref. [7] comparing inversion
mode double gate devices (IMDG) and junctionless double gate devices
(JLDG) without substrate i.e. the body is floating. SOI results of this work
Fig. 2. (a) Structure of bulk junctionless FinFET. (b) Structure of SOI junctionless FinFET.
show a good match with the above work. The profile evolution with
time shown in Figs. 6 and 7 can be used to analyse the parasitic bipolar
device associated. It can be observed from Fig. 7 that after the ion strike
used. From the drain current transients, the bipolar gain is calculated as the bulk JL reaches the initial profile (profile before ion strike) more
the ratio of collected to deposited charges. Fig. 5(a) and (b) show the quickly compared to SOI devices (the curves corresponding to various
drain current transients of the bulk and SOI junctionless FinFET respec- time instants after 25 ps are all merged in bulk JL whereas the curves
tively, for three different fin dopings. The current spikes induced by the corresponding to various time instants after 25 ps are distinct in SOI
radiation strike are clearly visible in Fig. 5(a) and (b). The drain current JL). These potential variations cause the carrier fluctuations. Time pro-
shoots from nano amperes to micro amperes during the radiation strike. gression of the carrier density distribution in the bulk and SOI JL devices
The peak disturbances are independent of the doping values in bulk and are shown in Fig. 8(a) and (b). At t = 40 ps (which is after radiation
SOI cases. This is expected because the channel is depleted under off
state condition. The tail portion behaviour i.e. after radiation strike
of the bulk and SOI devices are different. The floating body effects Table 1
related to SOI devices are the cause for this difference and the doping af- Device specifications.
fects this behaviour significantly [7]. It can also be observed from Parameter Value
Fig. 5(a) and (b) that the peak disturbance of the SOI devices is smaller
Bulk JL SOI JL
compared to bulk devices due to smaller collection volume. The ratio of
peak drain current transient of bulk to SOI can be computed from Gate length (Lg) 15 nm 15 nm
Gate oxide thickness (Tox) 1 nm 1 nm
Fig. 5(a) and (b) as 3.2 (i.e. 32 μA/10 μA = 3.2).
Fin width (WFIN) 10 nm 10 nm
Fig. 6 shows the 3-D profile of electrostatic potential in bulk JL FinFET Fin height (HFIN) 10 nm 10 nm
for a LET of 1 MeV/(mg/cm2). Three profiles are obtained at three differ- Gate work function (WF) 4.76 eV 4.873 eV
ent time instants namely pre, peak and post profiles. Radiation strike Substrate doping (Nwell) 5 × 1018 cm−3 5 × 1018 cm−3
happens at 25 ps (peak). Comparing the peak profile with the pre and BOX thickness (TBOX) – 20 nm
Supply voltage (VDD) 1V 1V
post profiles (Fig. 6) reveals the disturbance of the electrostatic

Please cite this article as: N. Vinodhkumar, et al., Heavy-ion irradiation study in SOI-based and bulk-based junctionless FinFETs using 3D-TCAD
simulation, Microelectronics Reliability (2015), http://dx.doi.org/10.1016/j.microrel.2015.09.011
4 N. Vinodhkumar et al. / Microelectronics Reliability xxx (2015) xxx–xxx

Fig. 4. (a) Calibrated ID–VG Characteristic (lines) of bulk and SOI junctionless FinFETs with
fin doping of 1.5 × 1019 cm−3. The model calibration against ID–VG data (symbols) from [5]
which does not use spacer. (b) ID–VG characteristic of bulk and SOI junctionless FinFETs
with fin doping of 1.5 × 1019 cm−3 with Si3N4 spacer
strike) the bulk device has already reached its initial profile whereas the
SOI JL device is still in transition.
Since the channel in SOI device takes more time to revert back to its
original profile more carriers are collected at the drain and is known as
floating body effects. It has also been reported in the literature that the
floating body effects are more important in SOI based junctionless de-
vices than the inversion mode devices due to the high doping used in
the junctionless devices [7]. The floating body effect is captured through
bipolar gain, an important metric for device sensitivity to radiation. Fig.
9 depicts the bipolar amplification for both bulk and SOI JL devices, for
LET of 1 MeV/(mg/cm2). As already stated the bipolar amplification
(β) is calculated using the expression given below [13].
β ¼ Q coll =Q dep
where Qcoll is the collected charge and Qdep is the deposited charge.
Qcoll and Qdep are obtained from the following expressions [13].
Fig. 5. (a) Drain current of bulk JL FinFET for different doping levels. The ion strikes at 25 ps
with LET = 1 MeV/(mg/cm2), VG = 0 V and VDD = 1 V. (b) Drain current of SOI JL FinFET
for different doping levels. The ion strikes at 25 ps with LET = 1 MeV/(mg/cm2), VG = 0 V
and VDD = 1 V.
JLDG study [7] depicts a bipolar gain of 1.5 and 5, respectively. In our
study, the bipolar gain of the SOIJL devices is 13 and this difference
must be due to the higher doping (1.5 × 1019 cm−3 instead of
1 × 1019 cm−3).
The results corresponding to Figs. 5 to 9 are for the radiation strike at
the middle of the channel. Fig. 10 depicts the radiation induced peak
drain current values as a function of strike location at five different
points along the channel from source to drain to find the sensitive loca-
tion for SEU study. The sensitive location is the location where the drain
current transient is maximum. Then, the SEU LET threshold (LETth) ob-
tained in this location will be the smallest LET for which the SRAM cell
ð1Þ flips [14]. From Fig. 10 the sensitive location is found to be region
under the drain side spacer for both the devices. In the following, we
used this sensitive location to study the SEU performance of bulk JL
and SOI JL devices-based SRAMs.

Zt 3.2. Soft error performance of bulk JL and SOI JL devices-based SRAMs

Q coll ¼ Iðt Þdt ð2Þ
0 The impact of radiation on 6T-SRAM cells is studied using mixed mode
   simulations [12] in this section. The devices discussed in Section 2 are
Q dep ðfCÞ ¼ 10:3  LET MeV= mg=cm2  tSi ðμmÞ ð3Þ used for creating two different SRAMs, namely bulk JL-based SRAM and
SOI JL-based SRAM. Fig. 11 shows the schematic structure of the SRAM
where I(t) is the drain current transient and tSi is the silicon film cell used in the soft error study. The access pulse (V(nacc)) of 10 ps of
thickness/fin height. rise and fall times, and a pulse width of 250 ps is used. After SRAM
From Fig. 9, it is observed that SOI JL devices shows the higher bipo- functionality verification, soft error simulation is done by invoking the ra-
lar gain than the bulk JL devices due to the floating body effects which diation models discussed in Section 2. Out of the two SRAM outputs
dominates in SOI devices. The comparison study between IMDG and (V(n1) and V(n2)) the sensitive node, the node which stores logic 1, of

Please cite this article as: N. Vinodhkumar, et al., Heavy-ion irradiation study in SOI-based and bulk-based junctionless FinFETs using 3D-TCAD
simulation, Microelectronics Reliability (2015), http://dx.doi.org/10.1016/j.microrel.2015.09.011
 N. Vinodhkumar et al. / Microelectronics Reliability xxx (2015) xxx–xxx 5

Fig. 6. 3-D profile of electrostatic potential in bulk JL device at t = 10 ps (Pre Rad), at t = 25 ps (Peak Rad) and t = 60 ps (Post Rad). The ion strike LET is 1 MeV/(mg/cm2), VG = 0 V and
VDD = 1 V.

Fig. 7. 1-D profile of electrostatic potential in bulk and SOI JL devices at different time instants. The ion strike LET is 1 MeV/(mg/cm2), VG = 0 V and VDD = 1 V, fin doping of 1.5 × 1019 cm−3.

Fig. 8. (a) 2-D profile of electron density in bulk JL devices at different time instants, the ion strikes at t = 25 ps with LET is 1 MeV/(mg/cm2), VG = 0 V and VDD = 1 V, fin doping of
1.5 × 1019 cm−3. (b) 2-D profile of electron density in SOI JL devices at different time instants, the ion strikes at t = 25 ps with LET is 1 MeV/(mg/cm2), VG = 0 V and VDD = 1 V, fin doping
of 1.5 × 1019 cm−3.

Please cite this article as: N. Vinodhkumar, et al., Heavy-ion irradiation study in SOI-based and bulk-based junctionless FinFETs using 3D-TCAD
simulation, Microelectronics Reliability (2015), http://dx.doi.org/10.1016/j.microrel.2015.09.011
6 N. Vinodhkumar et al. / Microelectronics Reliability xxx (2015) xxx–xxx

Fig. 9. Bipolar amplification for bulk and SOI JL FinFET, channel doping is Fig. 11. Schematic structure of the SRAM cell used in this study.
1.5 × 1019 cm−3and LET is 1 MeV/(mg/cm2).

the SRAM cell is the strike location and the strike happens when V(nacc)
is zero.
Fig. 12 depicts V(nacc), V(n1) and V(n2) transients of the SOI JL de-
vices based SRAM cell, for the dose value of 1.6 MeV/(mg/cm2). It can be
observed from Fig. 12 that the V(n1) and V(n2) undergo a state change.
As already stated we are interested in the minimum dose value (LETth)
that results in the state change. The LETth of the SOI and bulk JL devices-
based SRAMs is given in Fig. 13. The SOI JL devices-based SRAM cell
shows better SEU performance compared to Bulk JL devices-based
SRAM cell despite the higher bipolar amplification. The smaller sensitive
collection volume of SOI JL devices should bring this benefit.
Fig. 12. Node voltages of SOI JL devices-based SRAM cell, the ion strikes at 375 ps with
4. Conclusion LETth = 1.6 MeV/(mg/cm2).

Bulk JL FinFET and SOI JL FinFET are studied in this paper for their ra- level, the SOI JL-based SRAM shows better soft error performance com-
diation performance. The study was carried at two levels (i) device level pared to bulk JL-based SRAM.
and (ii) circuit/SRAM level. At device level different fin/channel dopings
were considered. The simulation results show that bipolar amplification
is higher in SOI JL devices compared to bulk JL devices. But at the SRAM Acknowledgements

This work is supported by Defence Research Development Organiza-

tion (DRDO), Government of India, Sanction No. ERIP/ER/1104598/
M01/1397.

Fig. 10. Peak drain current transients of bulk and SOI JL FinFET at different locations. The
ion strikes at 25 ps with LET =1 MeV/(mg/cm2), VG = 0 V and VDD = 1 V. Fig. 13. LETth of bulk and SOI JL devices-based SRAMs.

Please cite this article as: N. Vinodhkumar, et al., Heavy-ion irradiation study in SOI-based and bulk-based junctionless FinFETs using 3D-TCAD
simulation, Microelectronics Reliability (2015), http://dx.doi.org/10.1016/j.microrel.2015.09.011
 N. Vinodhkumar et al. / Microelectronics Reliability xxx (2015) xxx–xxx
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