IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, VOL. 20, NO.
2, JUNE 2020 395
Single Event Transients in Sub-10nm SOI
MuGFETs Due to Heavy-Ion Irradiation
Chandan Kumar Jha , Kritika Aditya , Charu Gupta , Anshul Gupta ,
and Abhisek Dixit , Senior Member, IEEE
Abstract—We compare and report in this work heavy-ion irra-
diation induced single event transients (SETs) in sub-10nm node
SOI multiple gate FETs with the help of calibrated 3-D TCAD
simulations. Our analysis includes the nanosheet FET (NSFET),
nanowire FET (NWFET), and FinFET along with two differ-
ent device design modes based on the doping profiles, namely
the inversion (INV) and junctionless mode (JL). We have also
analyzed the impact of heavy-ion strike direction and angle of
incidence on SET performance of various MuGFETs. Heavy-ion
induced SET current has also been compared for multiple-
sheet/wires of NSFET and NWFET. In addition to this, different
locations of heavy-ion strike have also been considered in this
work. Further, we have collated the simulation trends to propose
empirical models that predict the impact of heavy-ion radiation
on various MuGFETs. Our models include some of the device
design parameters and heavy-ion exposure conditions as the input
to the model. The proposed models are shown to correlate well
with the TCAD simulation results for the set of model parameters
that we have reported here. These models not only expedite the
analysis, but these can also accurately predict SETs in advanced
MuGFETs under heavy-ion irradiation.
Index Terms—Heavy-ion, nanosheet (NS), silicon on insulator
single event transient, linear energy transfer (LET).
I. I NTRODUCTION
O overcome short-channel effects limiting the use of pla-
T nar technologies, many multiple-gate FETs (MugFETs),
such as FinFET, nanowire (NWFET), and nanosheet (NSFET)
have been proposed [1]–[10]. These MugFETs exhibit bet-
ter short-channel control due to multiple gate architecture
and therefore these provide better ON to OFF-current ratio.
Recently, NSFET has been receiving significant research
attention due to its large current driving capability and high-
frequency operation [2]. Advanced microelectronic devices
are also being used in space applications [11]–[18]. Cosmic
rays consist of different particles such as heavy-ions, neu-
trons, protons, electrons, alpha particles, and gamma rays [11].
Manuscript received March 17, 2020; accepted March 27, 2020. Date
of publication April 2, 2020; date of current version June 5, 2020. This
work was supported in part by the DST-SERB, Government of India, under
Grant CRG/2018/003974, and in part by the Visvesvaraya Ph.D. Scheme of
Ministry of Electronics and Information Technology, Government of India,
being implemented by Digital India Corporation (formerly, Media Lab Asia).
(Corresponding author: Chandan Kumar Jha.)
The authors are with the Department of Electrical Engineering,
IIT Delhi, New Delhi 110016, India (e-mail: eez178171@ee.iitd.ac.in;
adixit@ee.iitd.ac.in).
Color versions of one or more of the figures in this article are available
online at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TDMR.2020.2985029
1530-4388 
c 2020 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
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Some of these (ionizing) particles affect the electrical and
optical characteristics of various electronic components in
space [12]. While effects of radiation such as the single event
effects (SEE) appear for a very small interval of time, the
total ionizing dose (TID) effect is a persisting effect and
may even cause permanent damage to the device [18]. Heavy-
ions generate spikes in transient drain current of the device,
which can lead to temporary circuit failure (soft error) or
change in the state of the memory element, called the Single
Event Upset, SEU [18]–[20]. Heavy-ion induced charge col-
lection and bipolar amplification in double-gate FETs for
various doping modes have been reported by Munteanu and
Autran [21].
Alpha ray induced single event transients (SET) have
been studied for bulk-NSFET inverter and FinFET by
Kim et al. [22]. ADDICT (physical model) based predictions
for SET in bulk planar transistors have been reported by
Artola et al using TCAD simulations [23]. Angular irradi-
ation effect of heavy-ion has been shown in bulk FinFETs
by Zhang et al. [24]. 3-D TCAD simulations for heavy-ion
induced SETs for different MugFETs have also been reported
by various researchers [24]–[28]. It is imperative to ana-
lyze heavy-ion induced SEE on NSFET as NSFET has been
proposed as the architecture of choice for ultimate CMOS
nodes by various researchers [1]–[2], [9].
In this work, we have analyzed SEEs induced by heavy-ion
in NSFET devices using calibrated 3-D TCAD simulations.
SOI technology is known to be more tolerant of SETs as com-
pared to the bulk technology [27], [29]. This results from the
fact that the volume of silicon available for the collection of
charges in SOI substrates is very small as compared to the
bulk silicon substrates. Moreover, the fully depleted (FD)-SOI
architecture benefits from not only smaller silicon volume but
also reduced floating body effects as compared to the partially
depleted (PD)-SOI devices [19], [30]. In our earlier work, we
have compared the transient response due to heavy-ion irra-
diation on PD and FD-SOI devices [30]. In this work, we
have analyzed the heavy-ion transient response of contem-
porary SOI MuGFETs, namely the NSFETs, NWFETs, and
FinFETs with the help of 3-D TCAD simulations. Further,
we have also simulated the effect of heavy-ion irradiation on
different MuGFET device designs (modes), namely the junc-
tionless (JL) and inversion (INV) mode. In addition, the effect
of the angle of incidence or direction of the heavy-ion strike
has been reported. Finally, we propose empirical models for
device degradation, which are based on our TCAD simulation
 396 IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, VOL. 20, NO. 2, JUNE 2020

TABLE I
D EVICE D ESIGN PARAMETERS FOR NSFET, NWFET, AND F IN FET

results. The proposed empirical models capture the effect of

heavy-ion irradiation in different device geometries along with
Fig. 1. 3-D view and 2-D cross-section along the channel in (a) vertically
heavy-ion dose and direction of ion strike. stacked NSFET, and (b) FinFET.
Further sections of the paper are arranged as follows: 3-D
device structures and calibrations for various MuGFETs are
discussed in Section II. The changes induced by the heavy-
ion irradiation in the transient performance of these devices
are presented in Sections III–V. Empirical models are dis-
cussed in Section VI. The conclusion is finally drawn in
Section VII.

II. 3-D D EVICE D ESIGN A ND C ALIBRATION

We have considered 7-nm CMOS node targets for designing
NS and NW-FETs using Sentaurus TCAD, whereas FinFETs
were designed using 10-nm technology targets [2]–[5], [31].
More specifically, we have used Sentaurus structure edi-
tor (SSE) for process emulations to create the device
structures [31]. Different physical design parameters for the
simulated devices are listed in Table I. 3-D TCAD structures
as well as cross-sections of the NSFET and FinFET are shown
in Fig. 1. For 3-D device simulations in Sentaurus, we have
taken hydrodynamic transport model coupled with continuity
and Poisson’s equations. Hydrodynamic model includes the
carrier temperature and the heat flow equations in compari-
son to the Drift-Diffusion model. We have also included the
density gradient model for quantum confinement effects [31].
High field velocity saturation model is included to con-
sider the velocity overshoot effect in short channel devices.
Recombination models such as Auger and Shockley-Read-Hall
have been used for considering minority carrier recombination
effects. We have also used inversion and accumulation mobil-
ity model (IALMOB) as well as Lombardi highK model for
doping and transverse field dependencies and two-dimensional
Coulomb scattering effect.
To validate TCAD electrical simulation models, we have
correlated NSFET DC Id-Vg simulation results with reported
values [2]. We have also calibrated models for 10-nm FinFET
device simulations to measured data, which is obtained using
a Keysight B1500A parameter analyzer and Cascade man-
ual prober [4], [5]. These TCAD model calibration results
Fig. 2. Simulated drain current vs. gate overdrive voltage (VGS −Vth) for
NSFET (with VDS = VGS = 0.7V, and Lgate = 12nm, Dfin = 45nm, and
Tfin = 5nm) and FinFET in saturation region (with VDS = VGS = 1.0V, and
Lgate = 20nm, Dfin = 8nm, and Hfin = 30nm).
are shown in Fig. 2. It is noticeable from Fig. 2, calibrated
TCAD results correlate well with measured and reported data.
More details pertaining to NWFET device design and calibra-
tions are reported in our previous work [3]. We have taken
Source/Drain (S/D) doping concentration to be 1020 /cm3 ,
while channel doping is varied from NA = 1015 /cm3 for inver-
sion (INV) mode to ND = 1019 /cm3 for Junctionless (JL)
mode [3].
SET current affects mostly memory devices or digital cir-
cuit operation due to the higher amount of change in off-state
current for a small-time duration [12]. Therefore, for a fair
comparison, the OFF currents of all the devices have been
matched. Doping profiles for the simulated INV and JL mode
NSFETs are shown in Fig. 3(a), while their Id-Vg characteris-
tics are exhibited in Fig. 3(b). Moreover, Id-Vg characteristics
of different MugFETs in INV and JL mode are shown in
Fig. 3 (c) and (d).

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 JHA et al.: SINGLE EVENT TRANSIENTS IN SUB-10NM SOI MuGFETs DUE TO HEAVY-ION IRRADIATION
Fig. 3. NSFET in junctionless (JL) and inversion (INV) modes (a) dop-
ing profile vs. distance (length along the channel), Doping (red and black
color: n-type, blue color: p-type) and simulated current for (b) NSFET,
(c) INV MugFETs and (d) JL MugFETS at VDS = VGS = 0.7V, for NSFET
(Lgate = 12nm, Dfin = 45nm, and Tfin = 5nm), NWFET (Lgate = 12nm, and
Dnw = 6nm), and FinFET (Lgate = 20nm, Dfin = 8nm, and Hfin = 30nm).
Off current in INV and JL mode devices are matched by
tuning of metal gate work function (WF) as reported in [21]. It
is seen from Fig. 3(b) that although both the JL and INV mode
devices have been designed to have comparable subthreshold
characteristics, due to higher channel doping in JL device, the
inversion region drain current is lower in JL device [3], [21]. It
is also evident from Fig. 3(c) and (d) that subthreshold slope
is better for NWFET due to its cylindrical GAA structure,
whereas larger fin width causes higher On-state drive current
in NSFET and FinFET [1]–[2].
III. H EAVY-I ON S IMULATIONS FOR J UNCTIONLESS
AND I NVERSION M ODE M U GFET S
Sentaurus TCAD heavy-ion model was utilized to perform
the simulations [21], [30]–[32]. We have considered the mid-
dle of the channel as the location of heavy-ion strike, while
the heavy-ion track radius is taken as 20nm, centered at
10ps with a characteristic time of 2ps [30], [31]. Electron-
hole pair (EHP) generation in the heavy-ion model follows
Gaussian radial profile [30]. Linear energy transfer (LET) is
taken in the range of 1MeV-cm2 /mg to 50 MeV-cm2 /mg,
which determines the energy lost by heavy-ion in a given
material with traversed distance [33]. In order to manage the
simulation time and reduce complexity, we have performed
heavy-ion simulations only on devices with a single sheet for
NSFETs, a single wire for NWFETs, and a single Fin for
FinFETs [9].
Heavy-ions, which are charged particles with an atomic
number more than two, cause direct ionization in elec-
tronic devices by generating EHPs along their traversed
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397
Fig. 4. Comparison between NSFETs (Lgate = 12nm, Dfin = 45nm,
and Tfin = 5nm), NWFET (Lgate = 12nm, Dnw = 6nm,). and FinFET
(Lgate = 20nm, Dfin = 8nm, and Hfin = 30nm) (a) peak transient cur-
rent (Inset: Transient Drain Current vs. Time) and (b) Total collected
charge (Inset: Collected Charge vs. Time) for angle of Strike = 900 ,
LET = 10 MeV.cm2 /mg, VDS = 0.7V, and VGS = 0.
path [11]–[13]. These EHPs then drift apart in the presence
of electric field and when collected, they cause an instanta-
neous peak in the device terminal currents. Such instantaneous
drain current peaks cause SETs in devices and circuits [25].
Simulated transient drain current, as well as the total collected
charge, is shown in Fig. 4. The peak drain current, which can
be observed from Fig. 4 (a), is highest in FinFET due to the
heavy-ion strike, whereas it is lowest for the NWFET. As com-
pared to FinFET peak drain current, the JL NS and NW-FETs
are seen to achieve nearly 2.6X and 15X lower values respec-
tively. This could be attributed to improved gate control in
NS and NWFETs as compared to the FinFET and available
silicon thickness along the direction of ion strike. As the avail-
able silicon thickness in NWFET (NW diameter) and NSFETs
(silicon thickness) is very small as compared to FinFET (fin
height) for this particular case of ion strike from top of the
device, much less EHP generation takes place in these devices
as compared to the FinFET [1], [25]. Consequently, peak drain
current is lower for NW and NSFETs as compared to that in
FinFET. It is also observed from Fig. 4 that the peak drain cur-
rent together with the total collected charge generated due to
heavy-ion strike is lesser by up to 50% for INV mode devices
as compared to JL mode devices [17]. Electric field distribu-
tions along the channel in NSFET, NWFET, and FinFET are
also shown in Fig. 5 at VDS = 0.7V and VGS = 0. It can
be seen from Fig. 5 that electric field is reduced inside the
channel after the heavy-ion strike. As seen in Fig. 5, electric
 398 IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, VOL. 20, NO. 2, JUNE 2020
Fig. 5. Electric Field vs Distance along channel in (a) NSFET
(Lgate = 12nm, Dfin = 45nm, and Tfin = 5nm), (b) NWFET (Lgate = 12nm,
and Dnw = 6nm), and (c) FinFET (Lgate = 20nm, Dfin = 8nm, and
Hfin = 30nm) for LET = 10MeV.cm2 /mg, VDS = 0.7V, VGS = 0.
TABLE II
T HRESHOLD VOLTAGE OF INV AND JL M ODE
M UG FET S IN A S ATURATION R EGION
field is seen significantly affected after the heavy-ion strike in
FinFET as compared to NWFET and NSFET. Reduced elec-
tric field could occur due to more carrier generation inside the
cahnnel as a result of heavy-ion strike [37]. Threshold voltage
in the saturation region (Vthsat ) for different MugFETs is also
shown in Table III.
More charge collection in JL mode could be justified by the
plots along the channel direction, as are shown in Fig. 6 (a)
for NSFETs. The other MuGFETs discussed in this work also
show similar trends. It can be seen from Fig. 6 (a) that the
heavy-ion generates more electrons in JL mode device as com-
pared to INV mode device. The ionization energy required for
a single electron-hole pair (EHP) generation is approximately
3.6eV for silicon crystal [11]–[12]. Higher doping concentra-
tion in JL mode device accelerates the generation of EHPs
during the strike of heavy-ion (LET = 10MeV.cm2 /mg). It
may not only reduce the electric field but also raise the poten-
tial of the channel in NSFET as is shown in Fig. 5 and
Fig. 6 (b) [21], [28]. It results in larger band bending for the
JL device as compared to the INV mode device, as is evident
from Fig. 6 (c) [17]. Therefore, more EHPs are generated in
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Fig. 6. (a) Electron Density, (b) Potential, and (c) Energy (Band Diagram,
CB: Conduction Band, VB: Valence Band) vs. Distance along the chan-
nel length before and after heavy-ion strike for an angle of strike = 900 ,
LET = 10 MeV.cm2 /mg, VDS = 0.7V, VGS = 0, INV(NA = 1015 /cm3 ),
and JL(ND = 1019 /cm3 ), in NSFET with Lgate = 12nm, Dfin = 45nm, and
Tfin = 5nm.
the JL mode device after heavy-ion strike and separated by
drain field along the channel, the generated electrons lead to
higher transient peak current.
IV. E FFECT OF A NGLE OF H EAVY-I ON S TRIKE
ON SET S G ENERATED IN M U GFET S
Impact of the angle of heavy-ion strike and corresponding
heavy-ion charge density for NSFET, FinFET and NWFET
are shown in Fig. 7. Fig. 7 exhibits that with a strike angle
of 900 , the heavy-ion strikes the silicon channel surface from
a normal direction. Whereas, with the strike angle of 00 , the
heavy-ion impinges in direction parallel to the silicon chan-
nel. Transient drain currents generated in FinFET, NSFET, and
NWFETs as a result of heavy-ion strikes at different values of
angle of incidence are shown in Fig. 8. Fig. 8 shows that the
peak drain current is higher when the angle of the heavy-ion
strike is 00 as compared to 900 . In worst-case scenario, i.e.,
for a FinFET, as much as 50% increase in transient drain cur-
rent is observed due to heavy-ion strike at 00 as compared to
900 . This is because the heavy-ion covers larger silicon vol-
ume and therefore generates more charge when it strikes at 00
as compared to 900 , as is also evident from Fig. 7.
Moreover, the effect of angle of heavy-ion strike is depen-
dent on device technology. We report this analysis for
SOI devices, where the vertical dimension of silicon is
smaller than the lateral dimension. However, for bulk tech-
nology, lateral dimension is smaller compared to the ver-
tical dimension. Therefore, opposite results are reported in
literature [24], [34].
 JHA et al.: SINGLE EVENT TRANSIENTS IN SUB-10NM SOI MuGFETs DUE TO HEAVY-ION IRRADIATION
Fig. 7. Impact of Heavy-ion incidence with different angles of inci-
dence on (a) NSFET (Lgate = 12nm, Dfin = 45nm, and Tfin = 5nm)
(b) FinFET (Lgate = 20nm, Dfin = 8nm, and Hfin = 30nm) (c) NWFET
(Lgate = 12nm, Dnw = 6nm) (d) Heavy-ion charge density contour scale at
LET = 10MeV.cm2 /mg, VDS = 0.7V, VGS = 0, and ND = 1019 /cm3 .
Fig. 8. Maximum transient drain current for different directions of heavy-ion
strike with 10MeV.cm2/mg LET in NSFET (Lgate = 12nm, Dfin = 45nm,
and Tfin = 5nm), NWFET (Lgate = 12nm, Dnw = 6nm,). and FinFET
(Lgate = 20nm, Dfin = 8nm, Hfin = 30nm) for VDS = 0.7V, VGS = 0,
ND = 1019 /cm3 .
V. I MPACT OF M UG FET C HANNEL S TACKING ON SET
C URRENT D UE TO H EAVY-I ON S TRIKE
Heavy Ion strike crosssection for multi-layer NSFET and
NWFET are shown in Fig. 9. As seen in Fig. 9, no. of
Wire/Sheet(NSheet /NWire ) increased from one to three. SET
peak currents are compared for varying NSheet and NWire
in Fig. 10 (a). It is evident from Fig. 10(a) that SET cur-
rent increased with increasing number of wire/sheets in these
MugFETs. It can be seen from these results that NS and
NW-FETs provide 4.8 and 5.72 times larger SET current for
three vertically stacked sheets/wires as compared to the corre-
sponding device with single sheet/wire. It can be explained as
vertically stacked sheets/wires provide larger charge deposi-
tion volume for the heavy-ion strike [28]. As a result, vertical
stacking leads to higher charge collection at drain contact and
results in higher transient peak current.
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399
Fig. 9. Heavy-Ion strike cross section for multiple number of Sheet/Wire
of (a) NSFET (Lgate = 12nm, Dfin = 45nm, and Tfin = 5nm) (b) NWFET
(Lgate = 12nm, and Dnw = 6nm) at LET = 10MeV.cm2 /mg, VDS = 0.7V,
VGS = 0, and ND = 1019 /cm3 .
Fig. 10. Maximum transient drain current in NSFET (Lgate = 12nm,
Dfin = 45nm, and Tfin = 5nm), and NWFET (Lgate = 12nm, Dnw = 6nm
for (a) No. of Wires/Sheets, and (b) location of heavy-Ion strike at
LET = 10MeV.cm2 /mg, VDS = 0.7V, VGS = 0, and ND = 1019 /cm3 .
Heavy-ion strike location is also one of the important
factors which contributes to changes in SET peak current.
Fig. 10(b) exhibits that SET current increased when heavy-ion
strike location moves from source to drain. NS and NW-FETs
exhibit 2.2X and 4.5X larger SET peak current due to Heavy-
ion strike at drain contact compared to source contact location
respectively. The main reason behind this increased SET peak
current is the slower EHP recombination near the drain contact
as compared to EHP generated at the source contact or channel
region [30]. Locations away from drain but near to the source
provide sufficient time for EHP recombination and therefore
less charge contribution takes place in SET peak Current for
 400 IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, VOL. 20, NO. 2, JUNE 2020

TABLE III
M ODEL PARAMETER VALUES C ORRESPONDING TO O UR S IMULATION
R ESULTS FOR D IFFERENT M U GFET S IN JL OR INV M ODE

the transient effect of heavy-ion irradiation in FinFETs, NS,

Fig. 11. Maximum transient drain current in NSFET (Lgate = 12nm, and NW-FETs. The models take as input various device design
Dfin = 45nm, Tfin = 5nm, and NSheet = 3), NWFET (Lgate = 12nm, parameters, such as channel doping concentration (N = ND
Dnw = 6nm, and NWire = 3). and FinFET (Lgate = 20nm, Dfin = 8nm,
and Hfin = 30nm) for (a) Track Radius, and (b) Characteristics Time at
or NA ), DFin , HFin , Dnw and NSheet /NWire etc. LET and direc-
LET = 10MeV.cm2 /mg, VDS = 0.7V, VGS = 0, and ND = 1019 /cm3 . tion of heavy-ion strike (θ ). These models can be used to
predict the SETs resulting in circuit failure. The proposed
empirical models for NS, NW, and Fin-FET are shown in
a heavy-ion strike at middle of the channel/source of these equation (1), (2) and (3) respectively:
   
MugFETs [22]. N α1
SET current also depends on heavy-ion model parameters IDmax,NSFET = log10 + α2 ∗ (β1 ∗ LET + β2 )
1015
such as track radius and characteristic time [31]. Transient    
θ
peak current of different MugFETs for heavy-ion charge ∗ γ1 ∗ + γ2
track radius from 20 to 50nm and 1 to 2ps is shown in 90
 
Fig. 11 [17], [28]. NSheet
∗(δ1 ∗ DFin + δ2 ) ∗ 1 ∗ + ε2 μA
Heavy-ion track radius is defined as charge track charac- 3
teristic distance in a radial direction, whereas characteristic (1)
   
time is termed as spatial variation in SET current pulse N α1
width [17], [31]. Heavy-ion with larger track radius results in IDmax,NWFET = log10 + α2 ∗ (β1 ∗ LET + β2 )
1015
less amount of charge localization in NSFET and NWFET as    
θ
compared to a smaller heavy-ion track radius [28]. It results ∗ γ1 ∗ + γ2
90
in a lower transient drain current peak at a larger track radius  
NWire
as seen from Fig. 11 (a). It is also observed from Fig. 11 (b) ∗(δ1 ∗ DNW + δ2 ) ∗ 1 ∗ + ε2 μA
that as characteristics time increased from 1 to 2ps, transient 3
current width becomes larger and SET current shows slightly (2)
   
lower peak current similarly reported in the earlier published N α1
IDmax,FinFET = log10 + α2
paper [17]. NS, NW, and FinFETs exhibit 13, 3, and 2% lower 1015
 
peak current at tC = 2ps compared to tC = 1ps. ∗ β1 ∗ LET 2 + β2 ∗ LET + offset
   
θ
VI. E MPIRICAL M ODELS TO P REDICT THE I MPACT OF ∗ γ1 ∗ + γ2 ∗ (δ1 ∗ HFin + δ2 )μA
H EAVY I ON I RRADIATION ON D EVICE P ERFORMANCE 90
(3)
Empirical models can predict device behavior under certain
environmental and biasing conditions. These models are useful where, αi, βi, offset, γ i , δ i and εi are fitting parameters related
as they save time required for complex simulations and could to N (ND or NA ), LET, θ , DFIN /DNW /HFIN and NSheet /NWire
work almost like a calculator. In this section, we have proposed of different MugFETs. Values of these parameters as extracted
empirical models based on our simulation results that capture from our simulation results are listed in Table III.

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 JHA et al.: SINGLE EVENT TRANSIENTS IN SUB-10NM SOI MuGFETs DUE TO HEAVY-ION IRRADIATION 401

Fig. 12. Maximum Transient Current variation with DFin , Dnw, and HFin
in NSFET (Lgate = 12nm, Dfin = 15 − 45nm, and Tfin = 5nm), NWFET
(Lgate = 12nm, Dnw = 6 − 12nm), and FinFET (Lgate = 20nm, Dfin = 8nm,
Hfin = 15 − 45nm), for (VDS = 0.7V, VGS = 0V, ND = 1019 /cm3 , and
θ = 900 ).
Fig. 13. Maximum Transient Current variation with different value of
LET, in NSFET (Lgate = 12nm, Dfin = 45nm, and Tfin = 5nm), NWFET
(Lgate = 12nm, Dnw = 6nm), and FinFET (Lgate = 20nm, Dfin = 8nm,
Hfin = 30nm), for (VDS = 0.7V, VGS = 0, and θ = 900 ).

Fig. 12 shows the geometry dependence of IDmax for NS,

NW, and Fin-FET at different values of heavy-ion LETs. As
seen from Fig. 12, IDmax increases with increase in heavy-
ion LET as well as increasing DFIN /DNW /HFIN . An increase in
cross-sectional area of the silicon channel, where EHP gener-
ation takes place as a result of heavy-ion strike, with increase
in DFIN /DNW /HFIN could explain the observed IDmax trend
in Fig. 12. Fig. 12 exhibits that NSFET shows lowest sensitiv-
ity of IDmax to scaling of critical dimension, while NWFET
shows highest sensitivity. We believe that this sensitivity fol-
lows a reciprocal trend to the channel cross section area of
the device, which is highest for the NSFET and lowest for the
NWFET.
As is also evident from Fig. 12, the proposed empirical
model correlates well with results of TCAD simulations across
the range of geometries and doses, which further validates Fig. 14. Maximum Transient Current variation with different value of
proposed models and extracted values of model parameters. Incident Angle, in NSFET (Lgate = 12nm, Dfin = 45nm, and Tfin = 5nm),
Impact of channel doping mode on IDmax is shown as NWFET (Lgate = 12nm, Dnw = 6nm), and FinFET (Lgate = 20nm,
Dfin = 8nm, Hfin = 30nm), for (VDS = 0.7V, VGS = 0, and ND =
a function of irradiation dose in Fig. 13. It can be noticed in 1019 /cm3 ).
Fig. 13 that IDmax is larger for JL mode devices for a fixed
value of dose. Saturation in slope IDmax w.r.t. dose can also
be observed from Fig. 13 for FinFETs. This could be due to
the fact that the generation of electron-hole pairs becomes lim- ion strike’s worst case (parallel to the channel) and best case
iting factor at higher LET values for FinFETs [18]. Therefore, (perpendicular to the channel) are 45, 42, and 25% for NS,
while (1) and (2) have a linear relationship between IDmax NW, and Fin-FET respectively. Since effective LET changes
and LET for NS and NW-FET respectively, (3) for FinFET is with cosine of the angle of heavy-ion strike, in addition to
proposed with a quadratic relationship. strike angle dependence, offset has also been added in (3) for
Impact of angle of heavy ion strike on IDmax is shown FinFETs [18], [35].
in Fig. 14 for different LET values. Fig. 14 shows that the Fig. 15 shows IDmax for multiple sheet/wire of NS and
impact is maximum at 00 angle of strike for all the devices, NW-FETs for different LET values of heavy-ion. As seen
which corresponds to the heavy ion striking the devices in in Fig. 15, IDmax increased with number of wires and
a direction parallel to the channel surface and the direction of sheets in these MugFETs. At LET = 30 Mev.cm2 /mg, NSFET
drain current. As maximum silicon volume is available in this and NWFET show 3X and 5X times larger IDmax for
direction, it gives the worst-case scenario for all the devices. multiple channel layers (NSheet /NWire = 3) compared to a sin-
At LET = 30MeV.cm2 /mg, IDmax % difference between heavy gle sheet/wire. The Incremental charge deposition volume in

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 402 IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, VOL. 20, NO. 2, JUNE 2020
Fig. 15. Maximum Transient Current variation with multiple sheet/wire
in NSFET (Lgate = 12nm, Dfin = 45nm, and Tfin = 5nm), and NWFET
(Lgate = 12nm, Dnw = 6nm), for (VDS = 0.7V, VGS = 0, and ND =
1019 /cm3 ).
multiple stacked NS and NW-FETs leads to a higher IDmax
trend with a heavy-ion strike as shown in Fig. 15.
VII. C ONCLUSION
We have shown that as compared with FinFETs, both the
NS and NW-FETs are more resilient to the impact of heavy-
ion radiation. This may be due to smaller thickness of the
channel in top-down direction in NS and NW-FETs. Fins in
a FinFET are also narrow but in top-down direction their fin
height is much larger. In a multifin configuration, heavy-ion
approaching from sides could be ignored.
Our results also show that a heavy-ion striking from the
lateral direction, which is parallel to the drain current flow
direction, can give rise to a much large IDmax as compared
to a normal incidence case for all the MuGFETs. Based on
these findings, it could be concluded that while NWFET shows
best tolerance to heavy-ion radiation, considering NSFET pro-
cess simplicity over stacked NWFETs, NSFETs are superior
than FinFETs for operation in presence of heavy ion irradi-
ation. From our results, it is also found that larger no. of
vertically stacked sheets/wires provide larger charge deposition
volume for the heavy-ion strike, which leads to larger IDmax
in multiple sheet/wire of NSFET and NWFET as compared to
single sheet/wire devices. Furthermore, IDmax drops when
location of heavy-ion strike is away from drain contact but
near to the source contact. Locations away from drain contact
provide sufficient time for EHP recombination and therefore
less charge contribution takes place in SET peak Current for
a heavy-ion strike in the middle of the channel/ near the source
contact of these MugFETs.
While cmparing JL and INV mode devices, we have shown
that density of electrons, generated due to irradiation, is higher
in JL mode than in the INV mode, which then leads to higher
IDmax in JL mode devices. Therefore, despite the additional
process complexity involved in making an INV mode device,
we recommend INV mode NSFET as the target device for
operation in presence of heavy ion radiation. Based on our
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simulation results, we have proposed empirical models to cap-
ture impact of heavy ion radiation on device performance. The
models are shown to correlate well with the TCAD simulation
results for the set of model parameters that we have reported
here.
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