A Study on Low Power Spintronics

Reshma Sinha*1, Jasdeep Kaur#2

*
Dept. of Instrumentation, Shaheed Rajguru College of Applied Sciences for Women
University of Delhi, Delhi-110096, India
#
Dept. of ECE, Indira Gandhi Delhi Technical University for Women
Delhi-110006, India
1
reshma.sinha16@gmail.com
2
jasdeep@igdtuw.ac.in

Abstract— Spintronics is an encouraging innovation, which conventional semiconductor electronics. It is unique in

expects to take care of the serious issues existing in the present
traditional electronic devices. Practically, this technology can
consolidate the primary elements of the magnetic storage devices
and state-of-the-art semiconductor microelectronics/
nanoelectronics in a single chip. The nonstop improvements in
the customary electronics are fundamentally relying upon
reducing component size implanted in integrated circuits.
Reduced transistors release more power that is dispersed as heat.
Leakage energy has become a huge part of the power
dissemination and has forced a severe thermal limitation on the
device configuration accordingly constraining further scaling of
the transistors. Along these lines, there is a need to look beyond
CMOS (complementary metal-oxide-semiconductor) to discover
a substitution for CMOS. Other methodologies beyond CMOS,
and specifically, spin-based electronics, demonstrate encouraging
prospective to beat these problems by including the spin
electrons to electronic circuits. This paper represents and
reviews the classification of low power reduction strategies and
few of the low power spintronics devices to give a fundamental
and significant comprehension to the readers. And, this audit
also depicts the future prospect in spin-based electronics that can
possibly affect key areas of microelectronics, nanoelectronics,
biomedical field, information technology (IT) and information
and communication technology (ICT).
Keywords— Spintronics, low power spintronics, GMR, MTJ,
spin valve, spin FET, spin MOSFET, organic spintronics, domain
wall (DW)
I. INTRODUCTION
The continuous diminishment of CMOS devices showed a
incredible increase in speed, density, and performance of
prevailing integrated circuits. CMOS technology has
staggeringly affected the development of the semiconductor
industry. Numerous new techniques have been introduced,
such as nano-electronics, molecular electronics, spintronics,
and quantum information theory; among all, spintronics is
most up-and-coming ones.
"Spintronics," known as spin electronics, includes the
investigation of active control and manipulation of the
intrinsic spin of the electron’s electrical charge and its related
magnetic moment in solid-state framework. The methodology
in the spin- electronics field depends on the up-or-downspin
of the carriers instead of on electrons or holes as in
relation to traditional electronics, which utilizes the degree of
freedom of electron's charge for data handling; spintronics is
dedicated to consolidating the degree of freedom of electron's
spin. For an ideal case, there will be no charge current, there
will only be spin current in the spintronics circuit, in this way
no heat will be created and squandered.
Spintronics exist from 1960s and was found by a team at
IBM headed by Leo Esaki, a Japanese physicist who might
later proceed to win a portion of the Nobel Prize I 1973 for
finding the aspect of electronic tunneling. Esaki and his team
led an analysis that demonstrated an antiferromagnetic barrier
of EuSe (crystal) sandwiched between metal electrodes shows
an enormous magneto-resistance. Consequent advances of
semiconductor thin film deposition procedures; for example,
molecular beam epitaxy prompted the improvement of
semiconductor quantum structures, which provoked
investigations of magnetic multilayers. Subsequent
investigations of magnetic multilayers brought about the
disclosure of giant magnetoresistance (GMR) in 1988. This
impact was utilized to make magnetic sensors, which
supported the areal density of data storage on hard disk drives
and prompted the 2007 Nobel Prize in physics granted to
Albert Fert and Peter Grunberg.
Spintronics is another rising field subject to a blend of 3
regular data bearers: an electron spin, a photon helicity and an
electron charge, as demonstrated diagrammatically in fig. 1.
These carriers denote 3 significant areas in information
technology (IT); information handling with electron transport,
information stockpiling with a relationship of spins and
information transfer via optical connections.
Fig. 1: Theory of spintronics device applications [1].

978-1-7281-9785-2/20/$31.00 ©2020 IEEE

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For what reasons do we require spintronics?
• Breakdown of Moore's law (More than Moore)
• Requirement of low electric current flow
• Speedier gadgets
• Low power utilization
• Small size devices
• Bigger storage capacity
• Low heat dissipation
• Spintronic memory is non-volatile
• Spin control and manipulation is quicker, therefore
the reading and writing speed is also fast.
Movement from customary electronics to spintronics
innovation opens the conceivable outcomes to build devices
with high stockpiling density, low power consumption, and
fast operation, which are cheap and vigorous. The principle
point of this review is to give a straightforward and clear
picture to researchers about the low power strategies
especially for low power spintronics devices and the future
visions of spintronics.
II. LOW POWER SPINTRONICS TECHNOLOGIES
Nonetheless, there are different strategies to scale down the
off-chip power, which are as follows: fin-field effect transistor
(fin-FET), Si-nanowire MOSFET, and double gate-metal
oxide semiconductor field effect transistor (DG-MOSFET) are
very encouraging [2]. Carbon nanotube field- impact transistor
(CNTFET) is other possible nano-device comparable in
structure and replacement of CMOS innovation. CNTFET has
better, trans conductance, functioning and lower power
utilization, and so on than traditional CMOS innovation [3].
Dual material surrounding gate (DMSG) MOSFET is
additionally alternative way to deal with increase the carrier
transportation proficiency and decrease the short channel
impacts utilizing different gate materials [4]. By utilizing
these techniques plenty of logics have been created. Volatility
is the main issue with all mentioned logics. Spin logics are the
rising one, which consumes fewer power from lightweight
handy devices to huge information centres [5] to enhance the
battery life and are non-volatile in nature.
Fig. 2 Various Power Reduction Techniques, highlighted as the review focus.
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Low-power techniques can be classified as low power
devices and low power spintronics techniques as shown in the
fig. 2. For the techniques that are reviewed in this paper, the
emphasis is on the low power spintronics techniques, which
includes active spintronics, passive spintronics and organic
spintronics. Fig. 2 highlights the review focus among the
various power reduction techniques.
A. Active Devices
Some spintronics advancements of active spintronics for
example giant magneto resistance (GMR), ferroelectric tunnel
junction (FTJ), magnetic tunnel junction (MTJ), domain wall
(DW) in magnetic nanowires and spin valve has been talked
about [6,7]. The most remarkable outcome of spin-based
electronics is the tunnel magnetoresistance (TMR) and giant
magnetoresistance (GMR) impacts.
1) Giant Magnetoresistance (GMR): Baibich et al [8] and
Binasch et al [9], in the late 1980s, have represented the GMR
in Fe/Cr super lattices. Giant Magnetoresistance is
distinguished in a column comprising of as a minimum of 2
ferromagnetic (FM) layers isolated thru a non-magnetic (NM)
conducting layer. The resistance of the column relies upon the
orientation of magnetization of the layers relative with one
another. The following ratio was introduced to quantify the
GMR effect [7]:
GMR= = = (1)
Where, RAP and RP represents resistances, 𝜌AP and 𝜌P
represents resistivities, 𝜎AP and 𝜎P represents conductivities in
the high (anti-parallel (AP)) and low (parallel (P)) resistance
state, respectively. According to equation (1) if 𝜌AP > 𝜌P the
GMR can be much greater than 1, alternatively if 𝜌AP < 𝜌P the
GMR is less than 1 and can be explained as [7]:
GMRʹ = = (2)
In a first guesstimate one can expect that two free channels
of conductivity exist for electrons with 'spin up' and 'spin
down' directions [10]. Indisputably current is the total of I↑
current transporters with 'spin up' and I↓ current transporters
with 'spin down'. In the event that the flows I↑ and I↓ are
traveling through the FM layer with a fixed heading of
magnetic-polarization ('up' or 'down'), the resistance of the
first and second group of electrons varies [11].
The wellspring of the GMR shown in fig. 3 is the
inconsistent dispersing of the 2 groups of electrons with
distinct spin directions analogous to the magnetic-polarization
orientation of the FM layer [10]. If the magnetic-polarization
orientations of the FM layers are identical called parallel state,
the ‘spin down’ electrons where spin is anti-parallel to the
magnetic-polarization can transmit through the structure
approximately assembled, causing high electron conductivity
and thus low resistance. Interestingly, in the anti-parallel state
both 'spin up' and 'spin down' electrons experience collision in
FM layers, prompting high resistance [12].

Fig. 3 GMR effect in its easiest elucidation [11,12].
2) Ferroelectric Tunnel Junction: A L. Esaki et al in 1971
[13] proposed the idea of FTJ, however J. Rodriguez [14]
recently achieved the fabrication, because of the challenging
task to retain FM magnetic-polarization on very much thin
layer, which is built up of limited unit cells. FTJ is a tunnel
junction made out of 2 distinctive metal electrodes and a very
much reedy layer of ferroelectric inserted in-between them.
Because of rapid advancement in the Nano manufacturing the
width of ferroelectric reedy film has been shrunk to 2 nm [15].
FTJ is a voltage-controlled gadget and its electrical resistance
firmly relies upon the direction of the electric-polarization. At
a point when electric field is supplied over the thin
ferroelectric layer, unconstrained ferroelectric polarization
happens, which indicates “high or low” 2 logic states with
electric-polarization directing either up or down.
Interchanging the ferroelectric polarization changes tunnel
resistance and this wonder is called as the tunneling electro
resistance (TER) [12].
3) Magnetic Tunnel Junction: The MTJ nanopillar,
materialised in fig. 4, is one of the most significant gadgets of
spin-based electronics. MTJ was first anticipated by Julliere in
1975 [16], yet not for all intents and purposes acknowledged
with a high magneto-resistance until 1995 once extensive
advancement had been made in deposition and
nanofabricating methods [17,18].
A MTJ is for the most part made out of 3 layers: 2
ferromagnetic (FM) layers (e.g., CoFeB) and 1 insulating
barricade (like, Al2O3/MgO) layer. There are essentially two
kinds of MTJs, i.e., in-plane shape anisotropy, and
perpendicular magnetic anisotropy (PMA) and the two sorts of
MTJs can be implemented with various thin film
configuration. For the most part, PMA-MTJ has better thermal
stability factor (δ>60) and versatility (below 20nm) than in-
plane MTJ, whereas in-plane MTJ can be intended to get
lower switching current & high speed. Both kinds of MTJs are
reasonable for logic computing & stockpiling, contingent
upon the required applications [21].
MTJ-based spin transfer torque magneto resistive random
access memory (STT-MRAM) [19,20] is very encouraging
possibility for upcoming general memory. It consolidates
CMOS similarity, quick access, non-volatility, & conceivably
small dimension & high capacity.
4) Domain Wall (DW): Other than memory circuits,
Domain Wall (DW) movement in magnetic nanowires gives
likewise logic abilities. One of the representations is to utilize
geometry reliance of the DW movement to perform logic
calculation [22], which utilizes no MOS transistors and
displays ultra-low power utilization (if magnetic field
generation is not considered). Furthermore, the logic gate is
non-volatile, permitting zero reserve power to have the
figuring results. In any case, these circuits use magnetic fields
to drive the DW motion & have some basic weaknesses, for
example, low speed (<100 KHz), reliability, magnetic field
generation, scalability & power dissemination issues, & so on,
practically.
Fig. 5 Schematic of current-induced DW motion [21]

Current-induced magnetic DW movement (fig. 5) turns into

a powerful answer for beating these problems. Consolidating
the MTJ nanocolumns as the read & write heads, DW
movement racetrack memory (RM) gives an alternate logic
structure [23,24]. Dissimilar to the hybrid MTJ/CMOS logic
design where segments of the information are volatile
provided by the MOS circuits, in DW-movement based logic
circuits, all the input & output information are put away in
non-volatile RMs, totally beating the reserve power
distribution and accomplishing a genuine non-volatile logic
circuit. Nevertheless, every part of information input is put
Fig. 4 MTJ Schematic delineation of PMA magnetic tunnel junction (MTJ) away in non-volatile states that are hard to implement with
nanopillar [12,21]
reasonable area and dormancy over-heads. Moreover, it

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experiences similar difficulties (like pinning imperfections) as and magnitude. By passing DC magnetic field through the
hosted in RM circuits. There are as yet numerous difficulties electron, the magnetic-polarization can be made bi-stable, and
before this gadget can be broadly utilized in industry. afterward allow the framework rest to the thermodynamic
ground state. To illustrate monolithic spintronics let us
5) Spin Valve: In 1991, Spin valves came into existence
consider single spin logic of NAND gate (fig. 8) with this any
[25]; succeeding spin valve did a progressive advancement in
other combinational or sequential logics can be realized.
magnetic sensor industry, read head of MRAM and hard disks.
The impact of GMR can be analysed utilizing the spin valve's
repetitive structure in either current perpendicular to plane
(CPP) or current in plane (CIP) structure [6,26] as shown in
fig. 6.

Fig. 8 Array of three spin polarized electrons clustered in a quantum dot,

implements NAND gate [6, 12].

From fig. 8, A and B are 2 inputs as (in1) and (in2)

respectively and C (out) output for NAND gate. Parallel
polarization implies logic '1' and anti-parallel corresponds to
logic '0'. At the point when spin magnetic-polarizations of A
Fig. 6 CIP structure (left) and CPP structure (right)[7] & B inputs are prepared to uphold the preferred inputs bit &
st the framework is permitted to rest to the ground state, spin
Mainly spin valve structure comprises of 4 layers. The 1 magnetic-polarizations in C consistently corresponds to
nd
layer of FM material is “Free layer”. The 2 layer of NM outcome. Utilizing clock pad the input can transfer to distinct
material that isolates 1st and 3rd layer is “Spacer layer”. The 3rd node. The benefit of utilizing this communication is singal
layer of magnetic materials, which is fixed, is “Pinned layer”. directional communication of the signal that makes the
The 4th layer of anti-ferromagnetic materials is “Exchange structure pipelined to accomplish the fast speed thru an
layer” that fix the pinned layer's magnetic direction (see fig. 7). expense of clock latency.

2) Hybrid Spintronics: In 1990 Datta Das anticipated the

main spin-based polarized transistor called spin-FET utilizes
the idea of spin transistor [28]. Hybrid spintronics is also
called so “electro-optic modulator”. The principal Datta Das
spin FET wasn't hitherto manufactured totally but
hypothetically demonstrated & has exceptional uses of
spintronics innovation. Afterwards broad ranges of spin-based
transistor dependent upon different working principles that
Fig. 7 (a) Depicts anti-parallel resistance (b) Denotes parallel resistance.
(c) Schematic of four layer Spin valve structure [27].
have been accounted for. Spin-based transistor has been
constructed with same relationship of typical MOSFET that
B. Passive Devices comprises essentially 3 terminals (ignoring bulk); Source,
Drain & Gate that control the channel in between them. In fig.
Passive devices are classified as hybrid and monolithic 9(a & b) schematic delineation of spin MOSFET and spin
spintronics as shown in fig. 2. In monolithic type of FET is given.
spintronics the information communication and information
stockpiling is fulfilled by only electron-spin, such as single
spin logic (SSL). And in hybrid spintronics the information
communication and information stockpiling is fulfilled by
either electron and hole charge, yet hybrid impact is increased
by spin presence. Spin assumes a second-rate role and affects
how charge controls or stores information [6].
1) Monolithic Spintronics: Single Spin Logic is an
innovative kind of PC innovation projected in 1994 and well
Fig. 9 Schematic delineation of Spin transistors: (a) spin-MOSFET;
known because of electrons bi-stable spin state in quantum
(b) spin-FET [29].
dots. This technique formulate the Single spin logic utilizing
electrons, magnetic field, & quantum dots altogether. This Spin-based transistors, for the most part comprises of spin
logic is well known because of the electron's spin steady state. MOSFET & spin FET devices, advantage from a comparable
In this logic, current doesn't stream utilizing charge however it design as MOS transistors, & the bias voltage on the gate
streams utilizing spin. Spin has both magnetic-polarization electrodes governs the spin transport amongst the two FM

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terminals as appeared in fig. 9. In the spin FET & its
associated gadgets, the source and drain have similar spin
arrangement, & the on/off switching activity can be
accomplished by spin precession of the spin-polarized
transporters infused in the channel across spin-orbit
communication [21]. Here gate voltage constrained the spin
orbit connection.
By utilizing both spin MOSFET & spin FET all spin-based
systems can be designed to accomplish low power devices and
maneuvers.
C. Organic Spintronics
More than decade backs the invention of Organic
Semiconductors (OSC) are latest spacers for spintronic
devices. Among all, the Organic semi-conductor-based
research with respect to other electronic devices, for example,
organic light emitting diodes (OLEDs) [30-32], organic field
effect transistors [33,34], & organic solar cells [35,36] has
been of focal enthusiasm for more than three decades.
Actually, OLEDs have previously transformed the present day
display industry, & spin-based devices, for example, organic
spin valves (OSVs), OLED-based magnetic sensors & spin-
OLEDs, are under escalated study to accomplish their fresh
pathways [37,38]. This growing enthusiasm for organic
electronics is because of numerous diversities above their
inorganic counterparts in addition to its adaptable chemistry,
rich material science, potential applications and cost
proficiency in new ages of electronic gadgets. The
classification of Organic Spintronics based on Organic
Spintronic Phenomenon is shown in fig. 10.
Fig. 10 Classification of Organic Spintronics based on Organic Spintronic
Phenomenon [39]
In OLED an enormous segment of holes and electrons
model triplet spin states rather than singlet spin states that
restrains the secretion of light effectively. In 2002 principal
outcome in this field was announced, wherein the spin
polarized electrons infuse from enormous magneto-resistance
manganite La0.7Sr0.3MnO3 electrode into organic compound
layer of sexithienyl (T6, a typical OSC). At room temperature
the spin diffusion length of T6 was around 200 nm [40,41].
Afterwards the other group of individuals noticed the spin
valve impact in hybrid organic-inorganic device [42,45]. A
little alteration in magnetic field delivers the alteration in the
intrinsic resistance of organic semiconductor that is named as
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organic magneto resistance (OMAR) [43]. Above outcomes
affirmed the capability of organic semiconductor for spin-
based electronics [44].
III. CONCLUSION AND PERSPECTIVES
In this review paper, we represented an outline
of spintronics for low-power reduction strategies. Non-
volatility offered by spintronics is a promising substitute to
overwhelm the power efficiency logjams of microelectronics.
A promising method to decrease power utilization is to
control magnetism utilizing electric fields (for example
voltages), as it doesn't require the movement of electric
charges. One methodology is magnetoelectric multiferroics.
These materials show Ferro electricity, and ferromagnetism,
and these properties are coupled. Lamentably, such materials
are uncommon and just show feeble coupling impacts at well
beneath room temperature.
Alluring choices are hybrid or composite material
frameworks where ferromagnetic and ferroelectric mixes are
artificially collected. These are for instance layered structures
called multiferroic heterostructures, in which coupling
impacts are intervened at the interfaces. These structures are
engaging not just in light of the fact that they show the
properties of both parent mixes, yet in addition since
collaborations among electric and magnetic polarizations can
prompt totally new functionalities. For example, coupling
could, on a basic level, grant information to be magnetically
stored and composed electrically.
Spintronics materials consolidate numerous magnetic
materials, containing magnetic metals, magnetic
semiconductors, & topological insulators (TIs). To defeat the
confronts encountered by spintronics, a few new theoretical
reasonable materials have developed; for example, spin
gapless semiconductors (SGSs) [46,47], half metals,
asymmetric anti-ferromagnetic semiconductors (AAFMSs),
and bipolar magnetic semiconductors (BMSs) [48,49]. The
proposition of such materials is basically centered on primary
principles computations, and several of them have been
checked by consequent examinations, whereas others quiet
left as hypothetical models.
IV. FUTURE VISIONS
Spintronics still has far to go before its widespread
application, in practicality. Foster advancement of spintronics
is relied upon to concentrate on the various areas, few of them
listed below:
• Utilization of spin orbit phenomena instead of tunnel
magneto-resistance for designing low power read-out
system.
• Unconventional computing systems using spintronics.
• Groundbreaking magnetic field sensors with increased
sensitivity, reduced heat dissipation, low power
consumption or wider field dynamics for variant areas of
applications.
• Advancement of artificial neurons for neuromorphic
computing and artificial intelligence.
• Optimization of low temperature operation in quantum
engineering.
• 3D spintronics incarnations for large capacity storage and
memory devices.
• Aiming new conceptions and spintronics materials. For
example creating magnetic materials with multi-
functionality instead of using specific function.
• Concocting the interface between semiconductors and
magnetic materials.
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