HP EliteBook 2540P Compal LA-5251P Swatch-UMA Rev 0.9 Schematics

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Compal Confidential
2
Schematics Document 2
INTEL Auburndale BGA with IBEX core logic

Swatch UMA
LA-5251P
3 3
2010-01-04
REV:0.9
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2008/09/15 Deciphered Date 2010/12/31 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
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DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-5251P 0.9
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, January 05, 2010 Sheet 1 of 47
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Compal Confidential
File Name : LA-5251P Swatch UMA XDP Conn.
Page 4
Accelerometer
LIS302DLTR
PEG-eDP
Mobile Page 24
1
Display port panel 1
Page 20
Auburndale CPU DDR3 1066/1333MHz 1.5V DDR3-SO-DIMM X 2 Fan Control
BANK 0, 1, 2, 3 Page 9,10 Page 4
BGA 1288pins
Dual Channel
RGB Thermal Sensor

Page 4,5,6,7,8
VGA EMC2113 Page 4
Page 18
DP *1(Docking)
Page 29
Display port DDI_D FDI DMI X4 CK505
Page 18
USB *1(Docking)Page Clock Generator
29
SLG8SP585VTR
DDI_B USB conn*1(Left side)
Page 11
DDI Page 24
2 Express Card 54 WWAN USB2.0 2
+SIM Card
USB2.0 FingerPrinter Validity VFS451
PCIE *1 + USB *1 daughter board Module
Page 23 USB*1 Page 23
Intel Ibex Peak M USB*1 Page 32
Azalia
USB conn x 3(For I/O)-Rear side, Power USB
PCI-E BUS 1071pins
25mm*27mm SATA0 BT Conn USB x 1 Page 24
SATA1
USB x1(Camara)
Page 20
10/100/1000 LAN WLAN Card Rico R5C835 Controller PCI BUS SATA3
Page 12,13,14,15,16,17
Intel Hanksville GbE Page 25
PHY PCIE*1 MDC V1.5 RJ11
Page 21 Page 22 ONFI Interface Page 28 Page 28
Audio CKT TPA6047A4RHBR

Braidwood
Page 23 IDT 92HD75 Page 26
AMP & Audio Jack Page 27
RJ45 CONN 1394 port Smart Card SD/MMC Slot
3 3
Page 21
Page 25 Page 25 Page 32
SATA ODD Connector
Page 22
NAND Flash Card
Page 23
1.8" SATA HDD Connector
LPC BUS Page 22
RTC CKT. LED

Page 29
Page 12 LED Board Docking CONN.
Page 28 (2) USB 1.channels
(1) Display Port Channels
SMSC KBC 1098 TPM1.2 SATA*1(Docking) Page 29 (1) Line In
Power OK CKT.
Page 33 page 30
SLB9635TT (1) Line Out
Page 32 (1) RJ45 (10/100/1000)
(1) VGA
(1) 2 LAN indicator LED's
4
Touch Pad CONN. (1) Power Button 4
Power On/Off CKT. Page 28 Int.KBD
(1) SATA
Page 28 Page 28
TrackPoint CONN.
Page 28 Security Classification Compal Secret Data Compal Electronics, Inc.
2008/09/15 2010/12/31 Title
DC/DC Interface CKT. 8 MB
Issued Date Deciphered Date
Block Diagram
Page 34
SPI ROM Page 31
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Custom LA-5251P 0.9
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A
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( O MEANS ON X MEANS OFF )
Voltage Rails Symbol Note :
+RTCVCC +B +5VALW +3VM +1.5V +5VS
+3VL +3VALW +1.05VM +0.75V +3VS
+1.5VS : means Digital Ground
power
plane +VCCP
+CPU_CORE
+1.05VS : means Analog Ground
+1.8VS
@ : means just reserve , no build
CONN@ : means ME part.
State SV@ : means just build on SV Sku. LV Sku no build.
LV@ : means just build on LV Sku. SV Sku no build.
L Layout Notes
01/04 update
S0
O O O O O O
: Question Area Mark.(Wait check)
S1
O O O O O O
S3
O O O O O X
Install below 45 level BOM structure for ver. 0.1
S5 S4/AC
O O O O X X 45@ : means just put it in the BOM of 45 level.
S5 S4/ Battery only
O O X X X X
S5 S4/AC & Battery
O X X X X X
1
don't exist
Install below 43 level BOM structure for ver. 0.1 1
DEBUG@ : means just build when PCIE port 80 CARD function enable. Remove before MP
SMBUS Control Table
THERMAL
SOURCE BATT XDP SODIMM CLK CHIP MINI CARD DOCK NIC SENSOR G-SENSOR
SMB_EC_CK1
SMB_EC_DA1
SMSC1098
V X X X X X X X X
SMBCLK
SMBDATA
Calpella X V V V V V X X V
SML0CLK
SML0DATA
Calpella X X X X X X V X X
SML1CLK
SML1DATA
Calpella X X X X X X X V V

Notes List
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Custom LA-5251P 0.9
A
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：
1 2 3 4 5
Layout rule 10mil width trace

length < 0.5", spacing 20mil
U1B
20_0402_1% 1 R2 2 H_COM P3 AD71 COMP3 C LK_CPU_BCLK
BCLK AK7 CLK_CPU_BCLK 15
Misc
20_0402_1% 1 R5 2 H_COM P2 AC70 AK8 CLK_CPU_BCLK#
COMP2 BCLK# CLK_CPU_BCLK# 15
49.9_0402_1% 1 R7 2 H_COM P1 AD69 K71 CLK_CPU_XDP
COMP1 BCLK_ITP
Clocks
J70 CLK_CPU_XDP#
49.9_0402_1% 1 R9 H_COM P0 BCLK_ITP#
2 AE66 COMP0 CLK_EXP
07/09 update for INTEL S3 leakage issue.
PEG_CLK L21 CLK_EXP 13
J21 CLK_EXP#
PEG_CLK# CLK_EXP# 13 +1.5V
P AD T48 TP_SKTOCC# M71 PROC_DETECT R 1093
DPLL_REF_SSCLK Y2 C LK_DP 13
A W4 2 1 A
DPLL_REF_SSCLK# CLK_DP# 13
H _CATERR# N61 CATERR# 1K_0402_5%
SM_DRAMRST# 1 6 DRAMRST# 9,10
Thermal
BJ12 SM_DRAMRST#
SM_DRAMRST#
15 H_ PECI 1 R 14 2 H_PECI_ISO N19 PECI
Q52A
0_0201_5% BV33 SM_RCOMP0 2 R 1092 1 2N7002DWH 2N SOT363-6
2
SM_RCOMP[0] SM_RCOMP1
SM_RCOMP[1] BP39 P CH_ DDR_RST 15
to power; PU to VCCP at power side also BV40 SM_RCOMP2 @ 100K_0402_5%
SM_RCOMP[2]
DDR3
Misc
40 H _PROCHOT# 1 R 15 2 H_ PROCHOT#_D N67 PROCHOT#
C6 1 2 .1U_0402_16V7K
0_0201_5% AV66 PM_EXTTS#0 T49 P AD
PM_EXT_TS#[0] PM_EXTTS#1 1
PM_EXT_TS#[1] AV64 2 PM_EXTTS#1_R 9 ,10
0_0201_5% R 16 from DDR
07/17 update 08/28 update
15 H_THERMTRIP# 1 R 17 2 H_THERMTRIP#_R N17 THERMTRIP#
0_0201_5%
U71 XDP_PRDY#
PRDY# XDP _PREQ#
PREQ# U69
H _CPURST# 1 R 18 2 H_ CPURST#_R N70 T67 X DP_TCK

0_0201_5% RESET_OBS# TCK XDP_TMS
TMS N65
Power Management
1 R 19 2 H_P M_SYNC_R M17 P69 XDP_TRST#
14 H_ PM_SYNC PM_SYNC TRST#
0_0201_5%
T69 XDP_TDI
TDI
TDO T71
P71
X DP_TDO
X DP_TDI_M
CPU XDP Connector
TDI_M
JTAG & MBP

H_CP UP W RGD 1 R21 2 SYS_AGENT_P WROK AM7 T70 XDP _PREQ# JP4
0_0201_5% VCCPWRGOOD_1 TDO_M XDP_PRDY# 1 GND0 GND1 2
W71 XDP _DBRESET# 3 4
DBR# OBSFN_A0 OBSFN_C0 CFG8 5
15 H_CP UP W RGD 1 R 22 2 V CC PWRGOOD_0 Y67 VCCPWRGOOD_0
XDP_BPM#0 R23 1 2 0_0201_5% 5 OBSFN_A1 OBSFN_C1 6 CFG9 5
0_0201_5% @ R24 1 2 0_0201_5% 7 8
5 CFG 12 GND2 GND3
J69 XDP_BPM#0 XDP_BPM#1 R25 1 2 0_0201_5% 9 10
B BPM#[0] OBSDATA_A0 OBSDATA_C0 CFG0 5 B
14 PM_DRAM_PWRGD 1 R 26 2 V DDP W RGOOD_R AM5 SM_DRAMPWROK BPM#[1] J67 XDP_BPM#1
5 CFG 13
@ R27 1 2 0_0201_5% 11 OBSDATA_A1 OBSDATA_C1 12 CFG1 5
0_0201_5% J62 XDP_BPM#2 XDP_BPM#2 R28 1 2 0_0201_5% 13 14
from power BPM#[2] XDP_BPM#3 @R29 0_0201_5% GND4 GND5
BPM#[3] K65 5 CFG 14 1 2 15 OBSDATA_A2 OBSDATA_C2 16 CFG2 5
32 VTTPWRGOOD H15 K62 XDP_BPM#4 XDP_BPM#3 R30 1 2 0_0201_5% 17 18
VTTPWRGOOD BPM#[4] OBSDATA_A3 OBSDATA_C3 CFG3 5
J64 XDP_BPM#5 @R31 1 2 0_0201_5% 19 20
BPM#[5] 5 CFG 15 GND6 GND7 +3VS
0_0201_5% K69 XDP_BPM#6 21 22
BPM#[6] 5 CF G17 OBSFN_B0 OBSFN_D0 CFG 10 5
H_PWRGD_XDP 1 R 32 2 H _PWRGD_XDP_R Y70 M69 XDP_BPM#7 ESD request to add 23 24
TAPPWRGOOD BPM#[7] 5 CF G16 OBSFN_B1 OBSFN_D1 CFG 11 5
25 GND8 GND9 26
15 BUF_PLT_RST# 1 2R33 PLT_RST#_R G3 RSTIN#
XDP_BPM#4 0_0201_5% 1 2 R43 XDP_BPM#4_R 27 OBSDATA_B0 OBSDATA_D0 28 CFG4 5
2
XDP_BPM#5 0_0201_5% 1 2 R48 XDP_BPM#5_R 29 30
OBSDATA_B1 OBSDATA_D1 CFG5 5
1.5K_0402_1% 31 32 R34
GND10 GND11
1
+VCCP XDP_BPM#6 0_0201_5% 1 2 R40 XDP_BPM#6_R 33 34 1K_0201_5%

XDP_BPM#7 0_0201_5% 1 2 R41 XDP_BPM#7_R 35 36
R35 INTEL_AUBURNDALE_1288 1 R36 1K_0201_5% 37 38
1
H_CP UP W RGD 1 GND12 GND13
750_0402_1% 2 H_CP UP W RGD_R 39 PWRGOOD/HOOK0 ITPCLK/HOOK4 40 CLK_CPU_XDP
C1 PM_PWRBTN#_R 41 42 CLK_CPU_XDP# + VCCP
14 PM_PWRBTN#_R
2
0.1U_0402_16V4Z HOOK1 ITPCLK#/HOOK5 1K_0201_5%

43 VCC_OBS_AB VCC_OBS_CD 44
@ 2 H_PWRGD_XDP 1 XDP_RST#_R R38 H _CPURST#
2 45 HOOK2 RESET#/HOOK6 46 1 2
R37 0_0201_5% 47 48 XDP_DB RESET#_R 1 2 XDP _DBRESET#
HOOK3 DBR#/HOOK7 XDP_DBRESET# 12,14
49 50 R39 0_0201_5%
GND14 GND15 X DP_TDO
0112 Add test points P AD T112 51 SDA TD0 52
P AD T113 53 54 XDP_TRST#
SCL TRST# XDP_TDI
55 TCK1 TDI 56
X DP_TCK 57 58 XDP_TMS
PM_PWRBTN#_R TCK0 TMS
59 GND16 GND17 60
1 1
C 120 C1 19 01/04 update for ESD SAMTE_BSH-030-01-L-D-A C ONN@
XDP_RST#_R 1 @ 2 P LT_RST# PLT_RST# 12,15,21,22,23,31
07/08 update for INTEL S3 leakage issue. 0.1U_0402_16V4Z 0.1U_0402_16V4Z R42 0_0201_5%
2 2
07/17 update for value change back
PM_PWRBTN#_R 1 2 +VCCP V DDP W RGOOD_R 1 2 V CCP_1.5VSPWRGD 32
C @ 1K_0201_5% R20 R 12 1.5K_0402_1% C
L Add C119 between JP4 pin 37 and 41;
1 2
R 13 750_0402_1% Add C120 close to R20.1
+3VS
Thermal Sensor EMC2113 with CPU PWM FAN F AN_PWM_R 1
R 46
2
0_0201_5%
FAN_PWM 30
11/06 update 2
C2
Processor Pullups
DDR3 Compensation Signals DDR Pullups Close to U2 @ 0.1U_0402_16V4Z
L
2
U2 2
R50 C5 1
SM_RCOMP0 1 2 +VCCP 68_0402_5% H_ THERMDC 1 16 REMOTE2+ +5VS
R52 100_0201_1% DN DP2/DN3 2200P_0402_50V7K
SM_RCOMP1 H _CATERR# R44 1 + VCCP 1
1 2 2 49.9_0402_1% 1 2 H_THERM DA 2 15 REMOTE2-
1
R56 24.9_0402_1% C3 2200P_0402_50V7K DP DN2/DP3
2
SM_RCOMP2 1 2 H_ PROCHOT#_D 1 2 PM_EXTTS#0 1 2 +3VS _THER 3 14 R51 2.05K_0402_1%
R58 130_0402_1% R45 68_0402_5% R1 10K_0201_5% VDD TRIP_SET R54
H_ CPURST#_R 1 2 PM_EXTTS#1 1 2 1 C4 F AN_PWM_R 4 13 R55 15K_0402_5% +3VS 10K_0201_5%
R47 @ 68_0402_5% R3 10K_0201_5% 0.1U_0402_16V4Z PWM_IN SHDN_SEL
Layout Note:Please these J P2
+3VS 1 2 5 12
1
resistors near Processor R71 10K_0201_5% ADDR_SEL GND
1 1
2 FAN_PWM_OUT
15 THERM_SCI# 6 ALERT# PWM 11 2 2
R61 10K_0201_5% +5VS 3
@ 2 T ACH 3
+3VS 1 7 SYS_SHDN# TACH 10 4 4
0112 Remove uninstall parts R 62 10K_0201_5% 5
GND
G5
9,10,11,13,24 SMB_DATA_S3 8 SMDATA SMCLK 9 SMB_CLK_S3 9,10,11,13,24 6 G6
EMC2113-1-AP-TR QFN 16P ACES_85205-04001
17
11/06 Cancel REMOTE thermal sensor reserve. XDP_TRST# 1 2 C ONN@
R 59 51_0402_5% H_THERMTRIP# 1 2
R 63 0_0201_5% Add 0ohm and 0.1u
D Close to XDP D
+ VCCP
X DP_TDO 1 2
R10 51_0402_5%
This shall place near XDP
Auburndale(1/5)-Thermal/XDP
Size D ocument Number Rev
Cus tom LA -5251P 0.9
Dat e: Tuesday, January 05, 2010 Sheet 4 of 47
1 2 3 4 5
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U 1A 49.9_0402_1%
B12 E XP_ICOMPI 1 R64 2
PEG_ICOMPI
PEG_ICOMPO A13
14 DMI_CRX_PTX_N0 F7 DMI_RX#[0] PEG_RCOMPO D12
14 DMI_CRX_PTX_N1 J8 B11 E XP_RBIAS 1 R65 2 U1E
DMI_RX#[1] PEG_RBIAS 750_0402_1%
14 DMI_CRX_PTX_N2 K8 DMI_RX#[2]
14 DMI_CRX_PTX_N3 J4 DMI_RX#[3] PEG_RX#[0] G40 RSVD32 W66 T116 P AD
PEG_RX#[1] G38 RSVD33 W64 T117 P AD
14 DMI_CRX_PTX_P0 F9 DMI_RX[0] PEG_RX#[2] H34
14 DMI_CRX_PTX_P1 J6 DMI_RX[1] PEG_RX#[3] P34
DMI
A K9 G28 AC69 A
14 DMI_CRX_PTX_P2 DMI_RX[2] PEG_RX#[4] RSVD34
14 DMI_CRX_PTX_P3 J2 DMI_RX[3] PEG_RX#[5] H25 RSVD35 AC71 T118 P AD 04/20 INTEL #418125 update
PEG_RX#[6] H24
14 DMI_CTX_PRX_N0 H17 DMI_TX#[0] PEG_RX#[7] D29 RSVD36 AA71 T119 P AD
14 DMI_CTX_PRX_N1 K15 DMI_TX#[1] PEG_RX#[8] B26 RSVD37 AA69
14 DMI_CTX_PRX_N2 J13 DMI_TX#[2] PEG_RX#[9] D26
F10 B23 CFG0 AL4 R66
14 DMI_CTX_PRX_N3 DMI_TX#[3] PEG_RX#[10] 4 CFG0 CFG[0] RSVD38
D22 CFG1 AM2 R64
PEG_RX#[11] 4 CFG1 CFG[1] RSVD39
G17 A20 C9 03 CFG2 AK1
14 DMI_CTX_PRX_P0 DMI_TX[0] PEG_RX#[12] 4 CFG2 CFG[2]
M15 D19 MB_C_DP_AUXN 1 2 CFG3 AK2
14 DMI_CTX_PRX_P1 DMI_TX[1] PEG_RX#[13] MB_DP_AUXN 20 4 CFG3 CFG[3]
G13 A17 CFG4 AK4
14 DMI_CTX_PRX_P2 DMI_TX[2] PEG_RX#[14] 4 CFG4 CFG[4]
J11 B14 0.1U_0402_16V4Z CFG5 AJ2 BT5
14 DMI_CTX_PRX_P3 DMI_TX[3] PEG_RX#[15] 4 CFG5 CFG[5] RSVD_NCTF[3]
CFG6 AT2 BR5 T120 P AD
4 CFG6 CFG[6] RSVD_NCTF[4]
F40 CFG7 AG7
PEG_RX[0] 4 CFG7 CFG[7]
J38 CFG8 AF4 BV6
PEG_RX[1] 4 CFG8 CFG[8] RSVD_NCTF[2]
G34 CFG9 AG2 BV8
PEG_RX[2] + VCCP 4 CFG9 CFG[9] RSVD_NCTF[1]
FDI_CTX_PRX_N0 L2 M34 CF G10 AH1
14 FDI_CTX_PRX_N0 FDI_TX#[0] PEG_RX[3] 4 CF G10 CFG[10]
FDI_CTX_PRX_N1 N7 J28 CF G11 AC2 AV69
14 FDI_CTX_PRX_N1 FDI_TX#[1] PEG_RX[4] 4 CF G11 CFG[11] RSVD45
FDI_CTX_PRX_N2 M4 G25 CF G12 AC4 AK71
1
FDI_CTX_PRX_N3 P1 K24 CF G13 AE2 AN69
FDI_CTX_PRX_N4 N10 B28 R8 01 CF G14 AD1 AP66
Intel(R) FDI
FDI_CTX_PRX_N5 R7 A27 CF G15 AF8 AH66

FDI_CTX_PRX_N6 U7 B25 7.5K_0402_1% CF G16 AF6 AK66
FDI_CTX_PRX_N7 W8 A24 CF G17 AB7 AR71
14 FDI_CTX_PRX_N7 4 CF G17
2
FDI_TX#[7] PEG_RX[10] CFG[17] RSVD51
PEG_RX[11] B21 RSVD52 AM66
PEG_RX[12] B19 RSVD53 AK69
FDI_CTX_PRX_P0 K1 B18 MB_C_DP_AUXP 1 2 AU71
14 FDI_CTX_PRX_P0 FDI_TX[0] PEG_RX[13] MB_DP_AUXP 20 RSVD54
FDI_CTX_PRX_P1 N5 B16 C 904 AT70
14 FDI_CTX_PRX_P1 FDI_TX[1] PEG_RX[14] RSVD55
6
FDI_CTX_PRX_P2 N2 D15 0.1U_0402_16V4Z AR69
14 FDI_CTX_PRX_P2 FDI_TX[2] PEG_RX[15] RSVD56
FDI_CTX_PRX_P3 R2 Q46A AU69
14 FDI_CTX_PRX_P3 FDI_TX[3] RSVD57
PCI EXPRESS -- GRAPHICS
RESERVED
FDI_CTX_PRX_P4 N9 N40 AT67
14 FDI_CTX_PRX_P4 FDI_TX[4] PEG_TX#[0] RSVD58
FDI_CTX_PRX_P5 R8 L38 2
B 14 FDI_CTX_PRX_P5 FDI_TX[5] PEG_TX#[1] MB_DP_HPD 20 B
FDI_CTX_PRX_P6 U6 M32 P AD T50 AU1 AP2 T51 P AD
14 FDI_CTX_PRX_P6 FDI_TX[6] PEG_TX#[2] RSVD_TP[0] RSVD_TP[2]
1
FDI_CTX_PRX_P7 W10 D40 2N7002DWH 2N SOT363-6 AN7 T52 P AD
14 FDI_CTX_PRX_P7
1
FDI_TX[7] PEG_TX#[3] R8 00 RSVD_TP[1]
PEG_TX#[4] A38
14 FDI_FS Y NC0 FDI_FS Y N C0 AC7 G32 T4 AV4
FDI_FS Y N C1 FDI_FSYNC[0] PEG_TX#[5] 100K_0402_5%~D RSVD15 RSVD62
14 FDI_FS Y NC1 AC9 FDI_FSYNC[1] PEG_TX#[6] B33 T2 RSVD16 RSVD63 AU2
B35
2
FDI _INT PEG_TX#[7]
14 FDI_ INT AB5 FDI_INT PEG_TX#[8] L30 U1 RSVD17 RSVD64 BE69
PEG_TX#[9] A31 V2 RSVD18 RSVD65 BE71
14 FDI_LS Y NC0 FDI_LS Y NC0 AA1 B32
FDI_LS Y NC1 FDI_LSYNC[0] PEG_TX#[10]
14 FDI_LS Y NC1 AB2 FDI_LSYNC[1] PEG_TX#[11] L28 AV71 RSVD19
PEG_TX#[12] N26 AW70 RSVD20
PEG_TX#[13] M24 DC_TEST_BV71 BV71
G21 C9 05 AY69 BV69
PEG_TX#[14] MB_C_DP_DATA0_N 1 RSVD21 DC_TEST_BV69
PEG_TX#[15] J20 2 MB_DP_DATA0_N 20 BB69 RSVD22 DC_TEST_BV68 BV68
DC_TEST_BV5 BV5
L40 0.1U_0402_16V4Z D8 BV3
PEG_TX[0] RSVD23 DC_TEST_BV3
PEG_TX[1] N38 B7 RSVD24 DC_TEST_BV1 BV1
PEG_TX[2] N32 DC_TEST_BT71 BT71
PEG_TX[3] B39 A10 RSVD26 DC_TEST_BT69 BT69
PEG_TX[4] B37 B9 RSVD27 DC_TEST_BT3 BT3
PEG_TX[5] H32 DC_TEST_BT1 BT1
PEG_TX[6] A34 C5 RSVD_NCTF[7] DC_TEST_BR71 BR71 VSS_NCTF2_R 8
PEG_TX[7] D36 A6 RSVD_NCTF[8] DC_TEST_BR1 BR1 VSS_NCTF6_R 8
PEG_TX[8] J30 DC_TEST_E71 E71
PEG_TX[9] B30 E3 RSVD_NCTF[6] DC_TEST_E1 E1
PEG_TX[10] D33 F1 RSVD_NCTF[5] DC_TEST_C71 C71
PEG_TX[11] N28 DC_TEST_C69 C69
PEG_TX[12] M25 DC_TEST_C3 C3
PEG_TX[13] N24 DC_TEST_A71 A71
F21 C8 58 A69
PEG_TX[14] MB_C_DP_DATA0_P 1 DC_TEST_A69
PEG_TX[15] L20 2 MB_DP_DATA0_P 20 DC_TEST_A68 A68 VSS_NCTF1_R 8
DC_TEST_A5 A5 VSS_NCTF7_R 8
C 0.1U_0402_16V4Z C
INTEL_AUBURNDALE_1288 INTEL_AUBURNDALE_1288
CFG Straps for PROCESSOR

CFG0 R68 1 2 @ 3.01K_0402_1%
PCI-Express Configuration Select

1: Single PEG
CFG0 0: Bifurcation enabled
Not applicable for Clarksfield Processor
CFG3 R69 1 2 @ 3.01K_0402_1%
CFG3-PCI Express Static Lane Reversal

1: Normal Operation
CFG3 0: Lane Numbers Reversed
15 -> 0, 14 ->1, .....
CFG4 R70 1 2 3.01K_0402_1%

D D
ES1 sample need negative voltage
ES2 sample contact to GND
CFG4-Display Port Presence
1: Disabled; No Physical Display Port
attached to Embedded Display Port
CFG4
0: Enabled; An external Display Port
device is connected to the Embedded
Display Port
Auburndale(2/5)-DMI/PEG/FDI
1 2 3 4 5
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U1D
9 DDR_B _D[0..63] SB_CK[0] BU33 M _CLK_DDR2 9

A U1C BV34 A
SB_CK#[0] M _CLK_DDR#2 9
DDR_B _D0 BA2 BT26
SB_DQ[0] SB_CKE[0] DDR_CKE2_DIMMB 9
DDR_B _D1 AW2
DDR_B _D2 SB_DQ[1]
BD1 SB_DQ[2]
DDR_B _D3 BE4 BV38
SB_DQ[3] SB_CK[1] M _CLK_DDR3 9
DDR_B _D4 AY1 BU39
SB_DQ[4] SB_CK#[1] M _CLK_DDR#3 9
BM34 DDR_B _D5 BC2 BT24
SA_CK[0] M _CLK_DDR0 10 SB_DQ[5] SB_CKE[1] DDR_CKE3_DIMMB 9
BP35 DDR_B _D6 BF2
10 DDR_A _D[0..63] SA_CK#[0] M _CLK_DDR#0 10 SB_DQ[6]
BF20 DDR_B _D7 BH2
SA_CKE[0] DDR_CKE0_DIMMA 10 SB_DQ[7]
DDR_A _D0 AT8 DDR_B _D8 BG4
DDR_A _D1 SA_DQ[0] DDR_B _D9 SB_DQ[8]
AT6 SA_DQ[1] BG1 SB_DQ[9]
DDR_A _D2 BB5 DDR_ B_D10 BR6 BP46
SA_DQ[2] SB_DQ[10] SB_CS#[0] DDR_CS2_DIMMB# 9
DDR_A _D3 BB9 BK36 DDR_ B_D11 BR8 BT43
SA_DQ[3] SA_CK[1] M _CLK_DDR1 10 SB_DQ[11] SB_CS#[1] DDR_CS3_DIMMB# 9
DDR_A _D4 AV7 BH36 DDR_ B_D12 BJ4
SA_DQ[4] SA_CK#[1] M _CLK_DDR#1 10 SB_DQ[12]
DDR_A _D5 AV6 BK24 DDR_ B_D13 BK2
SA_DQ[5] SA_CKE[1] DDR_CKE1_DIMMA 10 SB_DQ[13]
DDR_A _D6 BE6 DDR_ B_D14 BU9
DDR_A _D7 SA_DQ[6] DDR_ B_D15 SB_DQ[14]
BE8 SA_DQ[7] BV10 SB_DQ[15] SB_ODT[0] BV45 M_ODT2 9
DDR_A _D8 BF11 DDR_ B_D16 BR10 BU49
SA_DQ[8] SB_DQ[16] SB_ODT[1] M_ODT3 9
DDR_A _D9 BE11 BH40 DDR_ B_D17 BT12
SA_DQ[9] SA_CS#[0] DDR_CS0_DIMMA# 10 SB_DQ[17]
DDR_ A_D10 BK5 BJ47 DDR_ B_D18 BT15
SA_DQ[10] SA_CS#[1] DDR_CS1_DIMMA# 10 SB_DQ[18]
DDR_ A_D11 BH13 DDR_ B_D19 BV15
DDR_ A_D12 SA_DQ[11] DDR_ B_D20 SB_DQ[19]
BF9 SA_DQ[12] BV12 SB_DQ[20] DDR _B_DM[0..7] 9
DDR_ A_D13 BF6 DDR_ B_D21 BP12 BB4 DD R_B_DM0
DDR_ A_D14 SA_DQ[13] DDR_ B_D22 SB_DQ[21] SB_DM[0] DD R_B_DM1
BK7 SA_DQ[14] SA_ODT[0] BF43 M_ODT0 10 BV17 SB_DQ[22] SB_DM[1] BL4
DDR_ A_D15 BN8 BL47 DDR_ B_D23 BU16 BT13 DD R_B_DM2
SA_DQ[15] SA_ODT[1] M_ODT1 10 SB_DQ[23] SB_DM[2]
DDR_ A_D16 BN11 DDR_ B_D24 BP15 BP22 DD R_B_DM3
BN9 SA_DQ[17] BU19 SB_DQ[25] SB_DM[4] BV47
DDR_ A_D18 BG17 DDR_ B_D26 BV22 BV57 DD R_B_DM5
BK15 SA_DQ[19] BT22 SB_DQ[27] SB_DM[6] BU65
DDR_ A_D20 BK9 DDR_ B_D28 BP19 BF67 DD R_B_DM7
DDR_ A_D21 SA_DQ[20] DDR_ B_D29 SB_DQ[28] SB_DM[7]
BG15 SA_DQ[21] DDR _A_DM[0..7] 10 BV19 SB_DQ[29]
DDR_ A_D22 BH17 BB10 DD R_A_DM0 DDR_ B_D30 BV20
B DDR_ A_D23 SA_DQ[22] SA_DM[0] DD R_A_DM1 DDR_ B_D31 SB_DQ[30] B
BK17 SA_DQ[23] SA_DM[1] BJ10 BT20 SB_DQ[31]
DDR_ A_D24 BN20 BM15 DD R_A_DM2 DDR_ B_D32 BT48
DDR_ A_D25 SA_DQ[24] SA_DM[2] DD R_A_DM3 DDR_ B_D33 SB_DQ[32]
BN17 SA_DQ[25] SA_DM[3] BN24 BV48 SB_DQ[33] DDR _B_DQS#[0..7] 9
DDR_ A_D26 BK25 BG44 DD R_A_DM4 DDR_ B_D34 BV50 BE2 DD R_B_DQS#0
DDR_ A_D27 SA_DQ[26] SA_DM[4] DD R_A_DM5 DDR_ B_D35 SB_DQ[34] SB_DQS#[0]
BH25 SA_DQ[27] SA_DM[5] BG53 BP49 SB_DQ[35] SB_DQS#[1] BM3 DD R_B_DQS#1
DDR_ A_D28 BJ20 BN62 DD R_A_DM6 DDR_ B_D36 BT47 BU12 DD R_B_DQS#2
DDR_ A_D29 SA_DQ[28] SA_DM[6] DD R_A_DM7 DDR_ B_D37 SB_DQ[36] SB_DQS#[2]
BH21 SA_DQ[29] SA_DM[7] BH59 BV52 SB_DQ[37] SB_DQS#[3] BT19 DD R_B_DQS#3
DDR_ A_D30 BG24 DDR_ B_D38 BV54 BT52 DD R_B_DQS#4
DDR SYSTEM MEMORY A
DDR_ A_D31 SA_DQ[30] DDR_ B_D39 SB_DQ[38] SB_DQS#[4]

BG25 SA_DQ[31] BT54 SB_DQ[39] SB_DQS#[5] BV55 DD R_B_DQS#5
DDR_ A_D32 BJ40 DDR_ B_D40 BP53 BU63 DD R_B_DQS#6
DDR_ A_D33 SA_DQ[32] DDR_ B_D41 SB_DQ[40] SB_DQS#[6]
BM43 SA_DQ[33] DDR_ A_DQS#[0..7] 10 BU53 SB_DQ[41] SB_DQS#[7] BG69 DD R_B_DQS#7
DDR_ A_D34 BF47 AY5 DD R_A_DQS#0 DDR_ B_D42 BT59
DDR SYSTEM MEMORY - B

DDR_ A_D35 SA_DQ[34] SA_DQS#[0] DD R_A_DQS#1 DDR_ B_D43 SB_DQ[42]
BF48 SA_DQ[35] SA_DQS#[1] BJ7 BT57 SB_DQ[43]
DDR_ A_D36 BN40 BN13 DD R_A_DQS#2 DDR_ B_D44 BP56
BH43 SA_DQ[37] SA_DQS#[3] BL21 BT55 SB_DQ[45]
DDR_ A_D38 BN44 BH44 DD R_A_DQS#4 DDR_ B_D46 BU60
BN47 SA_DQ[39] SA_DQS#[5] BK51 BV59 SB_DQ[47] DDR _B_DQS[0..7] 9
DDR_ A_D40 BN48 BP58 DD R_A_DQS#6 DDR_ B_D48 BV61 BD4 DDR _B_DQS0
DDR_ A_D41 SA_DQ[40] SA_DQS#[6] DD R_A_DQS#7 DDR_ B_D49 SB_DQ[48] SB_DQS[0] DDR _B_DQS1
BN51 SA_DQ[41] SA_DQS#[7] BE62 BP60 SB_DQ[49] SB_DQS[1] BN4
DDR_ A_D42 BH53 DDR_ B_D50 BR66 BV13 DDR _B_DQS2
DDR_ A_D43 SA_DQ[42] DDR_ B_D51 SB_DQ[50] SB_DQS[2] DDR _B_DQS3
BJ55 SA_DQ[43] BR64 SB_DQ[51] SB_DQS[3] BT17
DDR_ A_D44 BH48 DDR_ B_D52 BR62 BT50 DDR _B_DQS4
DDR_ A_D45 SA_DQ[44] DDR_ B_D53 SB_DQ[52] SB_DQS[4] DDR _B_DQS5
BJ48 SA_DQ[45] DDR_ A_DQS[0..7] 10 BT61 SB_DQ[53] SB_DQS[5] BU56
DDR_ A_D46 BM53 AY7 DDR _A_DQS0 DDR_ B_D54 BN68 BV62 DDR _B_DQS6
DDR_ A_D47 SA_DQ[46] SA_DQS[0] DDR _A_DQS1 DDR_ B_D55 SB_DQ[54] SB_DQS[6] DDR _B_DQS7
BN55 SA_DQ[47] SA_DQS[1] BJ5 BL69 SB_DQ[55] SB_DQS[7] BJ69
DDR_ A_D48 BF55 BL13 DDR _A_DQS2 DDR_ B_D56 BJ71
DDR_ A_D49 SA_DQ[48] SA_DQS[2] DDR _A_DQS3 DDR_ B_D57 SB_DQ[56]
BN57 SA_DQ[49] SA_DQS[3] BN21 BF70 SB_DQ[57]
DDR_ A_D50 BN65 BK44 DDR _A_DQS4 DDR_ B_D58 BG71
BJ61 SA_DQ[51] SA_DQS[5] BH51 BC67 SB_DQ[59]
DDR_ A_D52 BF57 BM60 DDR _A_DQS6 DDR_ B_D60 BK70
BJ57 SA_DQ[53] SA_DQS[7] BE64 BK67 SB_DQ[61]
DDR_ A_D54 BK64 DDR_ B_D62 BD71
C SA_DQ[54] SB_DQ[62] DDR_B_MA[0..15] 9 C
DDR_ A_D55 BK61 DDR_ B_D63 BD69 BT34 DDR_B_M A0
DDR_ A_D56 SA_DQ[55] SB_DQ[63] SB_MA[0] DDR_B_M A1
BJ63 SA_DQ[56] SB_MA[1] BP30
DDR_ A_D57 BF64 BV29 DDR_B_M A2
SA_DQ[57] DDR_A_MA[0..15] 10 SB_MA[2]
DDR_ A_D58 BB64 BT36 DDR_A_M A0 BU30 DDR_B_M A3
DDR_ A_D59 SA_DQ[58] SA_MA[0] DDR_A_M A1 SB_MA[3] DDR_B_M A4
BB66 SA_DQ[59] SA_MA[1] BP33 SB_MA[4] BV31
DDR_ A_D60 BJ66 BV36 DDR_A_M A2 BV43 BT33 DDR_B_M A5
SA_DQ[60] SA_MA[2] 9 D DR_B_BS0 SB_BS[0] SB_MA[5]
DDR_ A_D61 BF65 BG34 DDR_A_M A3 BV41 BT31 DDR_B_M A6
DDR_ A_D62 AY64 BG32 DDR_A_M A4 BV24 BP26 DDR_B_M A7
DDR_ A_D63 BC70 BN32 DDR_A_M A5 BV27 DDR_B_M A8
SA_DQ[63] SA_MA[5] DDR_A_M A6 SB_MA[8] DDR_B_M A9
SA_MA[6] BK32 SB_MA[9] BT27
BJ30 DDR_A_M A7 BU46 BU42 DDR_B_MA 10
SA_MA[7] 9 DD R_B_CAS# SB_CAS# SB_MA[10]
BN30 DDR_A_M A8 BT40 BU26 DDR_B_MA 11
SA_MA[8] 9 DD R_B_RAS# SB_RAS# SB_MA[11]
BT38 BF28 DDR_A_M A9 BT41 BT29 DDR_B_MA 12
10 D DR_A_BS0 SA_BS[0] SA_MA[9] 9 DDR_ B_WE# SB_WE# SB_MA[12]
BH38 BH34 DDR_A_MA 10 BT45 DDR_B_MA 13
10 D DR_A_BS1 SA_BS[1] SA_MA[10] SB_MA[13]
BF21 BH30 DDR_A_MA 11 BV26 DDR_B_MA 14
10 D DR_A_BS2 SA_BS[2] SA_MA[11] SB_MA[14]
BJ28 DDR_A_MA 12 BU23 DDR_B_MA 15
SA_MA[12] DDR_A_MA 13 SB_MA[15]
SA_MA[13] BF40
BN28 DDR_A_MA 14
SA_MA[14] DDR_A_MA 15
10 DD R_A_CAS# BK43 SA_CAS# SA_MA[15] BN25
10 DD R_A_RAS# BL38 SA_RAS#
10 DDR_ A_WE# BF38 SA_WE#
INTEL_AUBURNDALE_1288
D D

Auburndale(3/5)-DDR3
Cus t om L A-5251P 0 .9
1 2 3 4 5
WWW.AliSaler.Com
+GFX_CORE
C17
C18
C19
Follow SCH check list
1U_0402_6.3V4Z
10U_0805_6.3V6M
10U_0805_6.3V6M
330U_V_2VM_R6M
330U_V_2VM_R6M
09/22 update
1 1 1 2 GFXVR_EN
C16 1 1 1 1 R7 00 4.7K_0201_5%
C 973
C 974
+ +
+CP U_CORE U1H
U1G
2 2 2 2 2 2
AF57 VCC_1
AN32 VAXG1 AF55 VCC_2
1U_0402_6.3V4Z AN30 AF12 AF53 +VCAP0
VAXG2 VAXG_SENSE VCC_AXG_SENSE 42 VCC_3 + VCCP
AN28 AF10 AF51 H_VTTVID1 = Low, 1.1V U 1F
SENSE
LINES
VAXG3 VSSAXG_SENSE VSS_AXG_SENSE 42 VCC_4
AN26 VAXG4 AF50 VCC_5 VCAP0_1 BD55
AN24 VAXG5 AF48 VCC_6 VCAP0_2 BD51 H_VTTVID1 = High, 1.05V VTT0_11 AW14
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
A AN23 AF46 BD48 AW12 A

VAXG6 VCC_7 VCAP0_3 VTT0_12
AN21 VAXG7 AF44 VCC_8 VCAP0_4 BB55 VTT0_13 AU60
C2 12
C1 79
C2 14
C2 13
1 1 1 1 AN19 VAXG8 GFX_VID[0] AF71 GFXVR_VID_0 42 AF42 VCC_9 VCAP0_5 BB51 VTT0_14 AU59
AL32 VAXG9 GFX_VID[1] AG67 GFXVR_VID_1 42 AF41 VCC_10 VCAP0_6 BB48 40 PSI# F68 PSI# VTT0_15 AU12
GRAPHICS VIDs
AL30 VAXG10 GFX_VID[2] AG70 GFXVR_VID_2 42 AD55 VCC_11 VCAP0_7 AY57 40 H_V I D[0..6] VTT0_16 AR60
AL28 AH71 AD51 AY53 H_V ID0 A61 AR59
2 2 2 2 VAXG11 GFX_VID[3] GFXVR_VID_3 42 VCC_12 VCAP0_8 VID[0] VTT0_17
CPU VIDS
AL26 AN71 AD48 AY50 H_V ID1 D61 AR12
VAXG12 GFX_VID[4] GFXVR_VID_4 42 VCC_13 VCAP0_9 VID[1] VTT0_18
AL24 AM67 AD44 AW57 H_V ID2 D62 AN60
GRAPHICS
AL23 AM70 0116 add AD41 AW53 H_V ID3 A62 AN59
AL21 AB55 AW50 H_V ID4 B63 AN35
VAXG15 @ 4.7K_0201_5% 1 VCC_16 VCAP0_12 VID[4] VTT0_21
AL19 VAXG16 2 R7 05 + VCCP AB51 VCC_17 VCAP0_13 AU55 H_V ID5 D64 VID[5] VTT0_22 AN33
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
AK14 AH69 AB48 AU51 H_V ID6 D66 AN17

VAXG17 GFX_VR_EN GFXVR_EN 42 VCC_18 VCAP0_14 VID[6] VTT0_23
AK12 VAXG18 GFX_DPRSLPVR AL71 GFXVR_DPRSLPVR 42 AB44 VCC_19 VCAP0_15 AU48 VTT0_24 AN15
C2 16
C2 15
C2 18
C2 17
1 1 1 1 AJ10 VAXG19 GFX_IMON AL69 GFXVR_IMON 42 +1.5VS_CPU_VDDQ AB41 VCC_20 VCAP0_16 AR55 H_VTTVID1 AN1 VTT_SELECT[1] VTT0_25 AN14
AH14 VAXG20 AA55 VCC_21 VCAP0_17 AR51 VTT0_26 AN12
AH12 VAXG21 AA51 VCC_22 VCAP0_18 AR48 40 P ROC_DPRSLPVR 2 1PM_DPRSLP VR_R F66 PROC_DPRSLPVR VTT0_27 AM10
AF28 BU40 AA48 AN57 R72 AL60
2 2 2 2 VAXG22 VDDQ1 VCC_23 VCAP0_19 VTT0_28
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
AF26 BU35 AA44 AN53 0_0201_5% AL59
VAXG23 VDDQ2 VCC_24
POWER VCAP0_20 VTT0_29
C20
C21
C22
C23
C24
AF24 VAXG24 VDDQ3 BU28 1 1 1 1 1 AA41 VCC_25 VCAP0_21 AN50 VTT0_30 AL17
1.1V RAIL POWER

AF23 VAXG25 VDDQ4 BN38 W55 VCC_26 VCAP0_22 AL57 VTT0_31 AL15
AF21 VAXG26 VDDQ5 BM25 W51 VCC_27 VCAP0_23 AL53 VTT0_32 AL14
AF19 BL30 W48 AL50 A41 AL12
VAXG27 - 1.5V RAILS VDDQ6 2 2 2 2 2 VCC_28 VCAP0_24 40 IMVP_IMON ISENSE VTT0_33
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
AF17 VAXG28 VDDQ7 BJ38 W44 VCC_29 VCAP0_25 AK57 VTT0_34 AK35
AF15 VAXG29 VDDQ8 BH32 W41 VCC_30 VCAP0_26 AK53 VTT0_35 AK33
C2 20
C2 19
C3 80
C2 21
SENSE LINES
1 1 1 1 AF14 VAXG30 VDDQ9 BH28 U55 VCC_31 VCAP0_27 AK50 VTT0_36 AF39
AD28 VAXG31 VDDQ10 BG43 U51 VCC_32 VTT0_37 AF37
AD26 BF16 U48 0_0201_5% AF35
VAXG32 VDDQ11 VCC_33 VTT0_38
330U_B2_2.5VM_R15M
22U_0805_6.3V6M
22U_0805_6.3V6M
AD24 BF15 U44 VCCSENSE 2 R73 1 F64 AF33
2 2 2 2 VAXG33 VDDQ12 VCC_34 40 VCCSENSE VCC_SENSE VTT0_39
AD23 BD35 1 U41 CPU CORE SUPPLY VSS SENSE 2 1 F63 AF32
VAXG34 VDDQ13 VCC_35 40 VSSSENSE VSS_SENSE VTT0_40
C25
C26
C27
AD21 BD33 1 1 R55 R74 AF30
VAXG35 VDDQ14 + VCC_36 0_0201_5% VTT0_41
AD19 VAXG36 VDDQ15 BD32 R51 VCC_37 VTT0_42 AD39
B
0116 add AD17 VAXG37 VDDQ16 BD30 R48 VCC_38 37 VTT_SENSE N13 VTT_SENSE VTT0_1 BF60
B
BD28 @ R44 BF59
VDDQ17 2 2 2 VCC_39 VTT0_2
VDDQ18 BD26 R41 VCC_40 37 VSS_SENSE_VTT R12 VSS_SENSE_VTT VTT0_3 BD60
+ VCCP W21 BD24 P60 BD59
VTT1_1 VDDQ19 VCC_41 VTT0_4
W19 BD23 N55 BB60
DDR3
VTT1_2 VDDQ20 VCC_42 +VCAP1 VTT0_5

@ 10U_0805_6.3V6M
PEG & DMI
U21 VTT1_3 VDDQ21 BD21 11/27 update N51 VCC_43 VTT0_6 BB59
10U_0805_6.3V6M
22U_0805_6.3V6M
10U_0805_6.3V6M
U19 VTT1_4 VDDQ22 BD19 N48 VCC_44 VTT0_7 AY60

U17 BD17 N44 BD44 AW60
POWER
VTT1_5 VDDQ23 VCC_45 VCAP1_1 +C PU_CORE VTT0_8

C28
C29
C30
C31
1 1 1 1 U15 VTT1_6 VDDQ24 BD15 N42 VCC_46 VCAP1_2 BD41 Close to CPU VTT0_9 AW35
U14 VTT1_7 VDDQ25 BB35 M60 VCC_47 VCAP1_3 BD37 VTT0_10 AW33
U12 BB33 M51 BB44 VCCSENSE 1 2 AD37
VTT1_8 VDDQ26 VCC_48 VCAP1_4 R75 100_0402_1% VTT0_43
R21 VTT1_9 VDDQ27 BB32 M44 VCC_49 VCAP1_5 BB41 VTT0_44 AD35
2 2 2 2 VSS SENSE
R19 VTT1_10 VDDQ28 BB30 L55 VCC_50 VCAP1_6 BB37 1 2 VTT0_45 AD33
R17 BB28 + VCCP K60 AY46 R76 100_0402_1% AD32
VTT1_11 VDDQ29 VCC_51 VCAP1_7 VTT0_46
VDDQ30 BB26 K51 VCC_52 VCAP1_8 AY42 VTT0_47 AD30
POWER
11/13 update VDDQ31 BB24 K44 VCC_53 VCAP1_9 AY39 VTT0_48 W35
VDDQ32 BB23 J55 VCC_54 VCAP1_10 AW46 VTT0_49 W33
1
BB21 H60 AW42 +1.8VS 10U_0805_6.3V6M W39 W32
+VCAP2 VDDQ33 VCC_55 VCAP1_11 VCCPLL1 VTT0_50
1.8V
VDDQ34 BB19 H51 VCC_56 VCAP1_12 AW39 W37 VCCPLL2 VTT0_51 W30
BB17 L 31 H44 AU44 1 1 U37 W28
VDDQ35 0_0603_5% VCC_57 VCAP1_13 VCCPLL3 VTT0_52
AK62 VCAP2_1 VDDQ36 BB15 G60 VCC_58 VCAP1_14 AU41 R39 VCCPLL4 VTT0_53 W26
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
AK60 G55 AU37 4.7U_0603_6.3V6K C37 C 38 R37 W24

VCAP2_2 VCC_59 VCAP1_15 VCCPLL5 VTT0_54
C32
C33
C34
C35
C36
1 1 1 1 1 AK59 VCAP2_3 2 G51 VCC_60 VCAP1_16 AR44 VTT0_55 W23

+VTT_DDR 2 2
AH60 VCAP2_4 VTT0_DDR AW32 G44 VCC_61 VCAP1_17 AR41 VTT0_56 U35
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
AH59 VCAP2_5 VTT0_DDR[1] AW30 F55 VCC_62 VCAP1_18 AR37 VTT0_57 U33
AF60 VCAP2_6 VTT0_DDR[2] AW28 E60 VCC_63 VCAP1_19 AN46 VTT0_58 U32
2 2 2 2 2
C 42
C 43
C 44
AF59 VCAP2_7 VTT0_DDR[3] AW26 1 1 1 E57 VCC_64 VCAP1_20 AN42 VTT0_59 U30
AD60 VCAP2_8 VTT0_DDR[4] AW24 E53 VCC_65 VCAP1_21 AN39 VTT0_60 U28
AD59 VCAP2_9 VTT0_DDR[5] AW23 E50 VCC_66 VCAP1_22 AL46 VTT0_61 U26
AB60 VCAP2_10 VTT0_DDR[6] AW21 E46 VCC_67 VCAP1_23 AL42 VTT0_62 U24
2 2 2
0112 change size AB59 VCAP2_11 VTT0_DDR[7] AW19 E42 VCC_68 VCAP1_24 AL39 VTT0_63 U23
AA60 VCAP2_12 VTT0_DDR[8] AW17 D59 VCC_69 VCAP1_25 AK46 VTT0_64 R35
AA59 VCAP2_13 VTT0_DDR[9] AW15 D57 VCC_70 VCAP1_26 AK42 VTT0_65 R33
C W60 D55 AK39 +1.5VS_CPU_VDDQ R32 C
VCAP2_14 + VCCP VCC_71 VCAP1_27 L32 VTT0_66
W59 VCAP2_15 VTT1_12 AD15 D54 VCC_72 VTT0_67 R30
U60 AD14 D52 2 1 + VDDQ_CK BB14 R28
VCAP2_16 VTT1_13 VCC_73 0_0603_5% VDDQ_CK[1] VTT0_68
U59 VCAP2_17 VTT1_14 AD12 D50 VCC_74 BB12 VDDQ_CK[2] VTT0_69 R26
10U_0805_6.3V6M
10U_0805_6.3V6M
22U_0805_6.3V6M
10U_0805_6.3V6M
R60 VCAP2_18 VTT1_15 AB12 D48 VCC_75 VTT0_70 R24

+VCCP R59 AA12 D47 R23
VCAP2_19 VTT1_16 VCC_76 1 VTT0_71
C46
C47
C48
C49
11/13 update W17 1 1 1 1 D45 C 50 AY10 VTT0_72

VTT1_17 VCC_77 VTT0_72
VTT1_18 W15 D43 VCC_78
1U_0402_6.3V4Z
VTT0_73 AN9 VTT0_73
10U_0805_6.3V6M
22U_0805_6.3V6M
10U_0805_6.3V6M
22U_0805_6.3V6M
VTT1_19 W14 B60 VCC_79 2

VTT1_20 W12 B56 VCC_80
2 2 2 2
C59
C60
C61
C62
1 1 1 1 R15 B53 INTEL_AUBURNDALE_1288

VTT1_21 VCC_81
B49 VCC_82
INTEL_AUBURNDALE_1288 B46 VCC_83
2 2 2 2 11/13 update B42 VCC_84 VTT0_72 R77
04/29 Change C55,C56,C57 from A57 VCC_85 1 2 0_0402_5% +VCCP
A54 10/01 update VTT0_73 R78 1 2 0_0402_5%
@47P_0402 to 1UF_0402 by HP. VCC_86
A50 VCC_87
11/13 update +CP U_CORE
A47 VCC_88 L Change +VCAP0/+VCAP1/ MLCC Caps from 04/28 Change P/N from SD034000080 to
A43 VCC_89
+C PU_CORE
0116 add 1U_0402 to 2.2U_0402 on SI-2B SV&LV Sku SD028000080
1U_0402_6.3V6K
SMT build.
47P_0402_50V8J
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
C 58
C3 81
C3 82
C5 33
C5 34
C3 83
C6 13
C6 14
C6 12
1 1 1 1 1 1 1 1 1 1 1 1
C55 C56 C57 +VCAP0 +VCAP1
0112 add 7pcs Caps to follow Design guide 0112 add 7pcs Caps to follow Design guide
@ 2.2U_0402_6.3V4M2.2U_0402_6.3V4M 2.2U_0402_6.3V4M2.2U_0402_6.3V4M 2.2U_0402_6.3V4M2.2U_0402_6.3V4M 2.2U_0402_6.3V4M 2.2U_0402_6.3V4M2.2U_0402_6.3V4M2.2U_0402_6.3V4M 2.2U_0402_6.3V4M2.2U_0402_6.3V4M
2 2 2 2 2 2 2 2 2 2 2 2
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1U_0402_6.3V6K 1U_0402_6.3V6K
C68 C69 C70 C 71 C72 C93 C1 14 C1 13 C 94 C92 C 140 C1 15 C63 C64 C65 C 66 C67 C86 C89 C88 C 87 C85 C91 C90
2.2U_0402_6.3V4M 2.2U_0402_6.3V4M
D 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 D
+ VCCP
+CP U_CORE 2.2U_0402_6.3V4M2.2U_0402_6.3V4M2.2U_0402_6.3V4M2.2U_0402_6.3V4M2.2U_0402_6.3V4M 2.2U_0402_6.3V4M2.2U_0402_6.3V4M2.2U_0402_6.3V4M2.2U_0402_6.3V4M2.2U_0402_6.3V4M
0116 add
47P_0402_50V8J
47P_0402_50V8J
47P_0402_50V8J
47P_0402_50V8J
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
C 51
C 52
C 53
C 54
C6 15
C6 16
C6 23
C6 43
C6 17
C6 45
C6 46
C6 44
C6 47
C6 49
C6 50
C6 48
C6 52
C6 53
C6 51
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
@ @ @ @
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 Issued Date 2008/09/15 Deciphered Date 2010/12/31 Title
Auburndale(4/5)-PWR
1 2 3 4 5
WWW.AliSaler.Com
0112 Add to follow design guide

U 1I
+ VCCP
CPU CORE
VSS90 AY24
BU62 AY23 U1J 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K +CP U_CORE
VSS1 VSS91
BU58 VSS2 VSS92 AY21
BU55 VSS3 VSS93 AY19 AH53 VSS202 VSS404 A40 1 1 1 1 1 1
BU51 VSS4 VSS94 AY17 AH51 VSS203 VSS405 A36
SV@22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
BU48 AY15 AH50 A33 C 189 C1 42 C1 91 C1 41 C 190 C 201 SV@
VSS5 VSS95 VSS204 VSS406 1U_0402_6.3V6K
2 2 2 2 2 2
22U_0805_6.3V6M
C73
C74
C75
C76
C77
C78
C79
C80
C81
C82
C83
C84
BU37 VSS7 VSS97 AY12 AH46 VSS206 VSS408 A26 1 1 1 1 1 1 1 1 1 1 1 1
A BU25 AY4 AH42 A19 1U_0402_6.3V6K 1U_0402_6.3V6K A
VSS9 VSS99 VSS208 VSS410
BU21 VSS10 VSS100 AW67 AH41 VSS209 VSS411 A15
2 2 2 2 2 2 2 2 2 2 2 2
BU11 AW55 AH35 B62 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K
BU7 VSS14 VSS104 AW51 AH33 VSS213 VSS394 B58
BP42 AW48 AH32 B55
BN64
VSS15
VSS16
VSS105
VSS106 AW44 AH30
VSS214
VSS215
VSS395
VSS396 B51
1 1 1 1 1 1
Inside cavity
BN6 AW41 AH28 B48 C 304 C3 03 C3 02 C1 92 C 306 C 305
BM70 VSS18 VSS108 AW37 AH26 VSS217 VSS398 B44
2 2 2 2 2 2
BM51 VSS19 VSS109 AV9 AH24 VSS218 VSS399 A59 05/06 update to change
SV@470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
BM44 VSS20 VSS110 AV1 AH23 VSS219 VSS400 A55
C95,C96,C97,C98 from
C 95
C 96
C 97
C 98
BM32 AU70 AH21 A52 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1 1 1 1
BM24 VSS22 VSS112 AU62 AH19 VSS221 VSS402 A48 SGA00002X00(330U_7mR) to
BM17 AU57 AH17 A45 + + + +
BL57 VSS24 VSS114 AU53 AH15 VSS223 VSS288 AA17 SGA00004200(470U_4.5mR)
BL55 VSS25 VSS115 AU50 AH4 VSS224 VSS289 AA15
2 2 2 2
BL48 VSS26 VSS116 AU46 AG64 VSS225 VSS290 AA14
1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K L 1- SV BGA 4x470uF bulk on C95,C96,C97,C98
BL40 VSS27 VSS117 AU42 AG9 VSS226 VSS291 AA4
BL28 AU39 AG6 W69 2- LV BGA 3x330uF 9mR (SGA20331E10) bulk on C96,C97,C98
BL20 VSS29 VSS119 AU35 AF69 VSS228 VSS293 W62 1 1 1 1 1 1
BK63 AU33 AF62 W57
BK60
VSS30
VSS31
VSS120
VSS121 AU32 AF1
VSS229
VSS230
VSS294
VSS295 W53 C 510 C 509 C5 08 C3 07 C5 12 C 511 Under cavity
BK53 VSS32 VSS122 AU30 AE70 VSS231 VSS296 W50
2 2 2 2 2 2
BK34 VSS33 VSS123 AU28 AE64 VSS232 VSS297 W46
BK10 VSS34 VSS124 AU26 AD62 VSS233 VSS298 W42
22U_0805_6.3V6M
22U_0805_6.3V6M
SV@22U_0805_6.3V6M
SV@22U_0805_6.3V6M
22U_0805_6.3V6M
SV@22U_0805_6.3V6M
22U_0805_6.3V6M
SV@22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
BJ64 AU24 AD57 W6 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K
BJ21 VSS36 VSS126 AU23 AD53 VSS235 VSS300 W1
C1 01
C1 02
C1 03
C1 04
C1 05
C1 06
C1 07
C1 08
C1 09
C1 10
BJ9 AU21 AD50 V70
BJ1
BH70
VSS37
VSS38
VSS39
VSS VSS127
VSS128
VSS129
AU19
AU17
AD46
AD42
VSS236
VSS237
VSS238 VSS
VSS301
VSS302
VSS303
U64
U62
1 1 1 1 1 1 1 1 1 1
BH57 AU15 AD4 U57 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K

B VSS40 VSS130 VSS239 VSS304 2 2 2 2 2 2 2 2 2 2 B
BH55 VSS41 VSS131 AU14 AC67 VSS240 VSS305 U53
BH47 VSS42 VSS132 AU4 AC64 VSS241 VSS306 U50 1 1 1 1 1 1
BH24 VSS43 VSS133 AT64 AC10 VSS242 VSS307 U46
BH20 AT10 AC5 U42 C6 19 C 618 C 515 C5 13 C6 36 C6 28
BH15 AR62 AC1 U39
BG51
VSS45
VSS46
VSS135
VSS136 AR57 AB70
VSS244
VSS245
VSS309
VSS310 U9
2 2 2 2 2 2 Under cavity
BG36 VSS47 VSS137 AR53 AB62 VSS246 VSS311 U4
BF62 AR50 AB57 T1 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K
BF30 VSS49 VSS139 AR46 AB53 VSS248 VSS313 R70
BF13 VSS50 VSS161 AN51 AB50 VSS249 VSS314 R62
BF8 VSS51 VSS162 AN48 AB46 VSS250 VSS315 R57
BE70 VSS52 VSS163 AN44 AB42 VSS251 VSS316 R53
BD57 VSS56 VSS167 AN4 AB33 VSS255 VSS320 R5
BD53 VSS57 VSS168 AM64 AB32 VSS256 VSS321 P4
BD50 VSS58 VSS169 AM8 AB30 VSS257 VSS322 N63
BD46 VSS59 VSS170 AL62 AB28 VSS258 VSS323 N57
BB71 VSS63 VSS174 AL44 AB21 VSS262 VSS327 N30
BB53 VSS66 VSS177 AL35 AB15 VSS265 VSS330 M53
BB50 VSS67 VSS178 AL33 AB14 VSS266 VSS331 M42
BB46 AL1 AB9 M36
BB42
BB39
VSS68
VSS69
VSS179
VSS180 AK70
AK64
AA66
AA64
VSS267
VSS268
VSS332
VSS333 M1
L70
BGA Ball Cracking Prevention and Detection
BB7 VSS71 VSS182 AK55 AA62 VSS270 VSS335 L57
BB1 VSS72 VSS183 AK51 AA57 VSS271 VSS336 L48
C BA70 AK48 AA53 L47 C
VSS73 VSS184 VSS272 VSS337 +3VS
AY71 VSS74 VSS185 AK44 AA50 VSS273 VSS338 L13
AY66 VSS75 VSS186 AK41 AA46 VSS274 VSS339 K64
AY62 AK37 AA42 K53 +3VS
1
1
AY51 AK28 AA35 K34 R79
VSS79 VSS190 VSS278 VSS343 R80
AY48 VSS80 VSS191 AK26 AA33 VSS279 VSS344 K32 CRACK_BGA 17,30
AR42 AK24 AA32 K25 CRACK_BGA 100K_0201_5%
6
AR39 AK23 AA30 K17 100K_0201_5%
2
3
AR35 AK21 AA28 K11 Q3A
2
VSS142 VSS194 VSS282 VSS347 Q3B
AR33 VSS143 VSS195 AK19 AA26 VSS283 VSS348 K6 2N7002DW-T/R7_SOT363-6
AR32 VSS144 VSS196 AK17 AA24 VSS284 VSS349 K4 2
AR30 VSS145 VSS197 AK15 AA23 VSS285 VSS350 J65 5
AR28 AJ70 AA21 J57 2N7002DW-T/R7_SOT363-6
1
AR26 AH62 AA19 J48
4
AR24 VSS148 VSS200 AH57 F20 VSS374 VSS353 J47 5 VSS_NCTF1_R 5 VSS_NCTF2_R
AR23 VSS149 VSS201 AH55 F4 VSS375 VSS354 J40
AR21 VSS150 VSS202 BV66 E37 VSS376 VSS355 J9
AR19 VSS151 VSS203 BV64 E33 VSS377 VSS356 H53
AR17 VSS152 VSS204 BT68 E30 VSS378 VSS357 H43
AR15 BR69 E16 H36 +3VS +3VS
AR14 VSS154 VSS206 BR68 E12 VSS380 VSS359 H1
AR4 VSS155 VSS207 BR3 D41 VSS381 VSS360 G70
AR1 VSS156 VSS208 BN71 D38 VSS382 VSS361 G57
1
AP70 BN1 D34 G53 CRACK_BGA
VSS157 VSS209 VSS383 VSS362 R81 R82 CRACK_BGA
AP64 VSS158 VSS210 BL71 D31 VSS384 VSS363 G48
AN62 VSS159 VSS211 BL1 D27 VSS385 VSS364 G47
3
AN55 R14 D24 G43 100K_0201_5% 100K_0201_5%
VSS160 VSS212 VSS386 VSS365 Q4A Q4B
AY44 H71 D20 G30
2
AY41 VSS82 VSS214 F71 D17 VSS388 VSS367 G24 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6
AY37 VSS83 VSS215 E69 D13 VSS389 VSS368 G20 2 5
D AY35 E68 D10 G15 D
AY33 A66 D6 F61
4
AY32 VSS86 VSS218 A64 B65 VSS392 VSS371 F48 5 VSS_NCTF6_R 5 VSS_NCTF7_R
AY30 VSS87 VSS219 E5 B40 VSS415 VSS372 F47
AY28 VSS88 VSS220 C68 VSS373 F28
AY26 VSS89
INTEL_AUBURNDALE_1288 INTEL_AUBURNDALE_1288
Auburndale(5/5)-GND/Bypass
1 2 3 4 5
WWW.AliSaler.Com
DDR3 SO-DIMM B +1.5V
+1.5V +1.5V
3A@ 1.5V
1
+V _D DR_CPU_REF
JDIMB1 R 83
1 2 1K_0402_1%
VREF_DQ VSS DDR_B _D4
3 VSS DQ4 4
0.1U_0402_16V4Z
2.2U_0805_16V4Z
DDR_B _D0 5 6 DDR_B _D5
2
DQ0 DQ5
C 111
C 112
1 1 DDR_B _D1 7 8 +V _D DR_CPU_REF

DQ1 VSS DD R_B_DQS#0
9 VSS DQS0# 10
DD R_B_DM0 11 12 DDR _B_DQS0
DM0 DQS0
1
13 VSS VSS 14
2 2 DDR_B _D2 DDR_B _D6
15 DQ2 DQ6 16
A DDR_B _D3 17 18 DDR_B _D7 R 86 A
DQ3 DQ7 1K_0402_1%
19 VSS VSS 20
DDR_B _D8 21 22 DDR_ B_D12
2
DDR_B _D9 DQ8 DQ12 DDR_ B_D13
23 DQ9 DQ13 24
25 VSS VSS 26
DD R_B_DQS#1 27 28 DD R_B_DM1
DDR _B_DQS1 DQS1# DM1 DRAMRST#
29 DQS1 RESET# 30 DRAMRST# 4 ,10
31 VSS VSS 32
DDR_ B_D10 33 34 DDR_ B_D14
DQ10 DQ14 6 DDR _B_DQS#[0..7]
DDR_ B_D11 35 36 DDR_ B_D15
DQ11 DQ15
37 VSS VSS 38 6 DDR_B _D[0..63]
DDR_ B_D16 39 40 DDR_ B_D20
DDR_ B_D17 DQ16 DQ20 DDR_ B_D21
41 DQ17 DQ21 42 6 DDR _B_DM[0..7]
43 VSS VSS 44
DD R_B_DQS#2 45 46 DD R_B_DM2
DQS2# DM2 6 DDR _B_DQS[0..7]
DDR _B_DQS2 47 48
DQS2 VSS DDR_ B_D22
49 VSS DQ22 50 6 DDR_B_MA[0..15]
DDR_ B_D18 51 52 DDR_ B_D23
DDR_ B_D19 DQ18 DQ23
53 DQ19 VSS 54
55 56 DDR_ B_D28
DDR_ B_D24 VSS DQ28 DDR_ B_D29
57 DQ24 DQ29 58
DDR_ B_D25 59 60
61 VSS DQS3# 62
DM3 DQS3
65 VSS VSS 66
DDR_ B_D26 67 68 DDR_ B_D30
69 DQ27 DQ31 70
71 VSS VSS 72
6 DDR_CKE2_DIMMB DDR_CKE2_DIM MB 73 74 DDR_CKE3_DIM MB

CKE0 CKE1 DDR_CKE3_DIMMB 6
75 VDD VDD 76
B 77 78 DDR_B_MA 15 B
D DR_B_BS2 NC A15 DDR_B_MA 14
6 D DR_B_BS2 79 BA2 A14 80
81 VDD VDD 82
DDR_B_MA 12 83 84 DDR_B_MA11
DDR_B_M A9 A12/BC# A11 DDR_B_M A7
85 A9 A7 86
87 VDD VDD 88
DDR_B_MA8 89 90 DDR_B_MA6
DDR_B_M A5 A8 A6 DDR_B_M A4
91 A5 A4 92
93 VDD VDD 94
DDR_B_M A3 95 96 DDR_B_M A2
DDR_B_M A1 A3 A2 DDR_B_M A0
97 A1 A0 98
99 VDD VDD 100
6 M _ CLK_DDR2 M _CLK_DDR2 101 102 M _CLK_DDR3
CK0 CK1 M _CLK_DDR3 6
6 M _CLK_DDR#2 M _CLK_DDR#2 103 104 M _CLK_DDR#3
CK0# CK1# M_CLK_DDR#3 6
105 VDD VDD 106
DDR_B_MA 10 107 108 D DR_B_BS1
A10/AP BA1 DDR_B_BS1 6
6 D DR_B_BS0 D DR_B_BS0 109 110 DD R_B_RAS#
BA0 RAS# DD R_B_RAS# 6
111 VDD VDD 112
6 DDR_ B_WE# DDR _B_WE# 113 114 DDR_CS2_DIMM B#
WE# S0# DDR_CS2_DIMMB# 6
6 DDR _B_CAS# DD R_B_CAS# 115 116 M _ODT2
CAS# ODT0 M_ODT2 6
117 VDD VDD 118
DDR_B_MA 13 M _ODT3 +VREF_CA +V _D DR_CPU_REF
119 A13 ODT1 120 M_ODT3 6
6 DDR_CS3_DIMMB# DDR_CS3_DIMM B# 121 122
S1# NC
123 VDD VDD 124
125 126 R94 1 2 0_0402_5%
TEST VREF_CA
127 VSS VSS 128
2.2U_0805_16V4Z
DDR_ B_D32 129 130 DDR_ B_D36

DQ32 DQ36
0.1U_0402_16V4Z
DDR_ B_D33 131 132 DDR_ B_D37

DQ33 DQ37
C 117
133 VSS VSS 134 1

C 116
DD R_B_DQS#4 135 136 DD R_B_DM4 1

DDR _B_DQS4 DQS4# DM4
137 DQS4 VSS 138
139 140 DDR_ B_D38
C DDR_ B_D34 VSS DQ38 DDR_ B_D39 2 C
141 DQ34 DQ39 142
DDR_ B_D35 2
143 DQ35 VSS 144
145 146 DDR_ B_D44
DDR_ B_D40 VSS DQ44 DDR_ B_D45
147 DQ40 DQ45 148
DDR_ B_D41 149 150
151 VSS DQS5# 152
DM5 DQS5
155 VSS VSS 156
DDR_ B_D42 157 158 DDR_ B_D46
159 DQ43 DQ47 160
161 VSS VSS 162
DDR_ B_D48 163 164 DDR_ B_D52 JP3
DDR_ B_D49 DQ48 DQ52 DDR_ B_D53 S MB_DATA_S3
165 DQ49 DQ53 166
SMB _CLK_S3
3 3 G2 5 Layout Note:
DD R_B_DQS#6
167 VSS VSS 168
DD R_B_DM6
2 2 G1 4
Place near JDIMB1 Layout Note:
169 DQS6# DM6 170 1 1
DDR _B_DQS6 171 172 Place near JDIMB1
DQS6 VSS DDR_ B_D54 ACES_85204-03001
173 VSS DQ54 174
DDR_ B_D50 175 176 DDR_ B_D55 C ONN@
DDR_ B_D51 DQ50 DQ55
177 DQ51 VSS 178
179 180 DDR_ B_D60
DDR_ B_D56
DDR_ B_D57
181
183
VSS
DQ56
DQ60
DQ61 182
184
DDR_ B_D61 For ME/AMT debug +1.5V
+0.75VS

185 VSS DQS7# 186
DM7 DQS7
330U_B2_2.5VM_R15M
189 VSS VSS 190
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C1 18
C1 31
1U_0402_6.3V6K
C1 32
1U_0402_6.3V6K
C1 33
C1 34
1U_0402_6.3V6K
C1 35
10U_0805_6.3V6M
1U_0402_6.3V6K
DDR_ B_D58 191 192 DDR_ B_D62 1
DQ58 DQ62
C 121
C 122
C 123
C 124
C 125
C 126
C 127
C 128
C 129
C 130
DDR_ B_D59 193 194 DDR_ B_D63 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
DQ59 DQ63 +
1 R 95 2 195 VSS VSS 196
10K_0201_5% 197 198 PM_EXTTS#1_R
SA0 EVENT# PM_EXTTS#1_R 4,10
199 200 S MB_DATA_S3
+3VS VDDSPD SDA SMB_DATA_S3 4,10,11,13,24 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
2.2U_0402_6.3V6M
0.1U_0402_16V4Z
1 2 201 202 SMB _CLK_S3 SMB_CLK_S3 4,10,11,13,24

SA1 SCL
C 136
C 137
1 1 203 VTT VTT 204 +0.75VS

D 10K_0201_5% D
R96 205 206
GND1 BOSS1
207 GND2 BOSS2 208
2 2 0. 65A@0.75V
FOX_AS0A626-U4SN-7F~D
C ONN@
L Bottom Side H:5.2mm DDRIII-SODIMM SLOT1

Wait update the symbol for correct (LTCX001HL00) DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Cus t om L A-5251P 0 .9
1 2 3 4 5
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DDR3 SO-DIMM A
+1.5V +1.5V
6 DDR_A _D[0..63]
+V _ DDR_CPU_REF_A 6 DDR _A_DM[0..7]

3A@ 1.5V
6 DDR_ A_DQS[0..7]
JDIMA1
1 VREF_DQ VSS 2 6 DDR _A_DQS#[0..7]
3 4 DDR_A _D4
VSS DQ4
2.2U_0805_16V4Z
0.1U_0402_16V4Z
DDR_A _D0 5 6 DDR_A _D5
DQ0 DQ5 6 DDR_A_MA[0..15]
1 1 DDR_A _D1 7 8
DQ1 VSS DD R_A_DQS#0
9 VSS DQS0# 10
C1 38
C1 39
DD R_A_DM0 11 12 DDR _A_DQS0
A DM0 DQS0 A
13 VSS VSS 14
2 2 DDR_A _D2 DDR_A _D6
15 DQ2 DQ6 16
DDR_A _D3 17 18 DDR_A _D7
DQ3 DQ7
19 VSS VSS 20
DDR_A _D8 21 22 DDR_ A_D12
DDR_A _D9 DQ8 DQ12 DDR_ A_D13
23 DQ9 DQ13 24
25 VSS VSS 26
DD R_A_DQS#1 DD R_A_DM1 +V _ DDR_CPU_REF_A +1.5V
27 DQS1# DM1 28
DDR _A_DQS1 29 30 DRAMRST#
DQS1 RESET# DRAMRST# 4,9
31 VSS VSS 32
1
DDR_ A_D10 33 34 DDR_ A_D14 R 1094
DDR_ A_D11 DQ10 DQ14 DDR_ A_D15
35 DQ11 DQ15 36
37 VSS VSS 38
DDR_ A_D16 39 40 DDR_ A_D20 1K_0402_1%
41 42
2
DQ17 DQ21 +V _ DDR_CPU_REF_A
43 VSS VSS 44
DD R_A_DQS#2 45 46 DD R_A_DM2
DDR _A_DQS2 DQS2# DM2
47 DQS2 VSS 48
1
49 50 DDR_ A_D22
DDR_ A_D18 VSS DQ22 DDR_ A_D23 R 1095
51 DQ18 DQ23 52
DDR_ A_D19 53 54
DQ19 VSS DDR_ A_D28 1K_0402_1%
55 VSS DQ28 56
DDR_ A_D24 57 58 DDR_ A_D29
2
DDR_ A_D25 DQ24 DQ29
59 DQ25 VSS 60
61 62 DD R_A_DQS#3
DD R_A_DM3 VSS DQS3# DDR _A_DQS3
63 DM3 DQS3 64
65 VSS VSS 66
DDR_ A_D26 67 68 DDR_ A_D30 Place R1094,R1095 close to JDIMA1 pin1 with C138,C139
DDR_ A_D27 69
DQ26
DQ27
DQ30
DQ31 70 DDR_ A_D31 L
71 VSS VSS 72 4/24 New add R1094, R1095, R1096 and the Vref
circuit for DIMM A Ref Voltage.
B DDR_CKE0_DIM MA 73 74 DDR_CKE1_DIM MA B
6 DDR_CKE0_DIMMA CKE0 CKE1 DDR_CKE1_DIMMA 6
75 VDD VDD 76
77 78 DDR_A_MA 15
D DR_A_BS2 NC A15 DDR_A_MA 14
6 D DR_A_BS2 79 BA2 A14 80
81 VDD VDD 82
DDR_A_MA 12 83 84 DDR_A_MA11
DDR_A_M A9 A12/BC# A11 DDR_A_M A7
85 A9 A7 86
DDR_A_M A8
87 VDD VDD 88
DDR_A_MA6 L Top Side H:4mm
89 A8 A6 90
DDR_A_M A5 91 92 DDR_A_M A4
A5 A4
DDR_A_M A3
93 VDD VDD 94
DDR_A_M A2
Wait update the symbol for correct (LTCX001HH00)
95 A3 A2 96
DDR_A_M A1 97 98 DDR_A_M A0
A1 A0
99 VDD VDD 100
M _CLK_DDR0 101 102 M _CLK_DDR1
6 M _CLK_DDR0 CK0 CK1 M _CLK_DDR1 6
M _CLK_DDR#0 103 104 M _CLK_DDR#1
6 M _CLK_DDR#0 CK0# CK1# M_CLK_DDR#1 6
105 VDD VDD 106
DDR_A_MA 10 107 108 D DR_A_BS1
A10/AP BA1 DDR_A_BS1 6
D DR_A_BS0 109 110 DD R_A_RAS#
6 D DR_A_BS0 BA0 RAS# DD R_A_RAS# 6
111 VDD VDD 112
DDR _A_WE# 113 114 DDR_CS0_DIMM A#
6 DDR_ A_WE# WE# S0# DDR_CS0_DIMMA# 6
DD R_A_CAS# 115 116 M _ODT0
6 DD R_A_CAS# CAS# ODT0 M_ODT0 6
117 VDD VDD 118
DDR_A_MA 13 M _ODT1 +VREF_CA_A +V _DDR_CPU_REF_A
119 A13 ODT1 120 M_ODT1 6
DDR_CS1_DIMM A# 121 122
6 DDR_CS1_DIMMA# S1# NC
123 VDD VDD 124
125 126 +VREF_CA R 1096 1 2 0_0402_5%
TEST VREF_CA 0.1U_0402_16V4Z
2.2U_0805_16V4Z
127 VSS VSS 128
DDR_ A_D32 129 130 DDR_ A_D36
DQ32 DQ36
C 143
C 144
DDR_ A_D33 131 132 DDR_ A_D37 1 1
DQ33 DQ37
DD R_A_DQS#4
133 VSS VSS 134
DD R_A_DM4 L Place R1096 close to JDIMA1 pin126 with C143,C144
135 DQS4# DM4 136
C DDR _A_DQS4 137 138 C
DQS4 VSS DDR_ A_D38 2 2
139 VSS DQ38 140
DDR_ A_D34 141 142 DDR_ A_D39
143 DQ35 VSS 144
145 146 DDR_ A_D44
DDR_ A_D40 VSS DQ44 DDR_ A_D45
147 DQ40 DQ45 148
DDR_ A_D41 149 150
DQ41 VSS DD R_A_DQS#5
151 VSS DQS5# 152
DD R_A_DM5 153 154 DDR _A_DQS5
DM5 DQS5
155 VSS VSS 156
DDR_ A_D42 157 158 DDR_ A_D46
159 DQ43 DQ47 160 Layout Note:
DDR_ A_D48
161 VSS VSS 162
DDR_ A_D52 Place near JDIMA1 Layout Note:
163 DQ48 DQ52 164
DDR_ A_D49 165 DQ49 DQ53 166 DDR_ A_D53 Place near JDIMA1
167 VSS VSS 168
DD R_A_DQS#6 169 170 DD R_A_DM6
DDR _A_DQS6 DQS6# DM6
171 DQS6 VSS 172
173 174 DDR_ A_D54
DDR_ A_D50 VSS DQ54 DDR_ A_D55 +0.75VS
175 DQ50 DQ55 176
DDR_ A_D51 177 178 +1.5V
DQ51 VSS DDR_ A_D60
179 VSS DQ60 180
DDR_ A_D56 181 182 DDR_ A_D61
183 DQ57 VSS 184
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
185 186 DD R_A_DQS#7
VSS DQS7#
C1 47
C1 48
C1 49
C1 50
C1 51
C1 52
C1 53
C1 54
C1 55
C1 56
C1 57
C1 58
C1 59
C1 60
DD R_A_DM7 187 188 DDR _A_DQS7 1 1 1 1 1 1 1 1 1 1 1 1 1 1
DM7 DQS7
189 VSS VSS 190
DDR_ A_D58 191 192 DDR_ A_D62
193 DQ59 DQ63 194
2 2 2 2 2 2 2 2 2 2 2 2 2 2
1 R1 04 2 195 VSS VSS 196
10K_0201_5% 197 198 PM_EXTTS#1_R
SA0 EVENT# PM_EXTTS#1_R 4 ,9
199 200 S MB_DATA_S3
+3VS VDDSPD SDA SMB_DATA_S3 4,9,11,13,24
2.2U_0402_6.3V6M
0.1U_0402_16V4Z
D 201 202 SMB _CLK_S3 D

SA1 SCL SMB_CLK_S3 4,9,11,13,24
C1 61
C1 62
1 1 203 VTT VTT 204 +0.75VS

0. 65A@0.75V
2
205 GND1 GND2 206

R 105 207 208
2 2 10K_0201_5% BOSS1 BOSS2
FOX_AS0A626-U2SN-7F
1
C ONN@
DDRIII-SODIMM SLOT2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS L A-5251P 0.9
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A A
+3VS_CK505_G +3VS_CK505
U6
1 32 SMB _CLK_S3 SMB_CLK_S3 4,9,10,13,24

VDD_DOT SCL S MB_DATA_S3
2 VSS_DOT SDA 31 SMB_DATA_S3 4,9,10,13,24
CLK_BUF_DOT96 R1 06 1 2 0_0201_5% L_CLK_BUF_DOT96 3 30 R EF_0/CPU_SEL R 107 1 2 33_0402_5% CLK_14M_PCH
13 CLK_BUF_DOT96 DOT_96 REF_0/CPU_SEL CLK_14M_PCH 13
CLK_BUF_DOT96# R1 08 1 2 0_0201_5% L_CLK_BUF_DOT96# 4 29
13 CLK_BUF_DOT96# DOT_96# VDD_REF
+3VS_CK505 5 28 CLK _XTAL_IN 1
VDD_27 XTAL_IN CLK_XTAL_OUT
6 27MHZ XTAL_OUT 27
7 26 C1 63
27MHZ_SS VSS_REF CK _P WRGD @ 10P_0402_50V8C
8 VSS_27 CKPWRGD/PD# 25
2
9 VSS_SATA VDD_CPU 24
CL K_BUF_CKSSCD R1 09 1 2 0_0201_5% L _CLK_BUF_CKSSCD 10 23 R _CLK_BUF_BCLK R 110 1 2 0_0201_5% CLK_BUF_BCLK
13 CL K_BUF_CKSSCD SRC_1/SATA CPU_0 CLK_BUF_BCLK 13
CL K_BUF_CKSSCD# R1 11 1 2 0_0201_5% L_CLK_BUF_CKSSCD# 11 22 R_CLK_BUF_BCLK# R 112 1 2 0_0201_5% CLK_BUF_BCLK#
13 CL K_BUF_CKSSCD# SRC_1#/SATA# CPU_0# CLK_BUF_BCLK# 13
12 VSS_SRC VSS_CPU 21
CLK_DMI R1 13 1 2 0_0201_5% L_CLK_DMI 13 20
13 CLK_DMI SRC_2 CPU_1
CLK_DMI# R1 14 1 2 0_0201_5% L_CLK_DMI# 14 19
13 CLK_DMI# SRC_2# CPU_1#
+1.05VS_CK505 15 VDD_SRC_IO VDD_CPU_IO 18 +1.05VS_CK505
CPU_S TOP# 16 17 +3VS_CK505_G
CPU_STOP# VDD_SRC
TGND
B B
ICS9LVS3197BKLFT MLF 32P
33
CK _P WRGD 1 R1 15 2 +3VS_CK505
10K_0201_5%
6
Q55A
09/21 update
2 C LK_EN# 40
2N7002DWH 2N SOT363-6
1
09/10 update
+3VS +3VS_CK505 +3VS_CK505_G +3VS +1.5VS
+3VS_CK505 07/01 update
1 2
+1.05VS +1.05VS_CK505 R1 43 @ 0_0603_5%
Close to U6
Close to U6
CPU_S TOP# R 116 1 2 10K_0201_5% 1 2 1 2
1 2 R1 17 0_0603_5% R1 20 0_0603_5%
47P_0402_50V8J
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0805_10V4Z
R1 18 0_0603_5% CLK_XTAL_OUT
10U_0805_10V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
47P_0402_50V8J
C1 70
C1 65
C1 66
C1 67
C1 68
C1 69
C1 64
1 1 1 1 1 1 1
L Low Power Chip: Install R120 and remove R143.
C 171
C 172
C 173
C 174
C 175
C 176
1 1 1 1 1 1 CLK _XTAL_IN
Standard Power Chip: Remove R120 and Install R143.
2 2 2 2 2 2 2
C 2 2 2 2 2 2 C
14.31818MHZ_20PF_7A14300038~D Y1
2 1
2 2
C 177 C1 78
33P_0402_50V8J 33P_0402_50V8J
1 1
Close to U2 within 500mil
D D

CLOCK GENERATOR
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS L A-5251P 0 .9
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+R TCVCC +3VS
PCH_RTCX1 1 2 S M_INTRUDER# R1 22 1 2 10K_0201_5% S I RQ

R1 21 1M_0402_5%
1 2 PCH_RTCX2 1 2 PCH_INTVRMEN @ R1 25 2 1 10K_0201_5% H DA_SPKR
R 123 10M_0402_5% R1 24 330K_0402_5%
+R TCVCC +VREG3_51125 BATT1.1
32.768KHZ_12.5PF_Q13MC14610002
JBATT1
U7A
D1
1 PCH_RTCX1 B13 D33 2
RTCX1 FWH0 / LAD0 LPC_LAD0 22,30,31
1
1
+R TCVCC
18P_0402_50V8J
C 180 CLR P1 PCH_RTCX2 D13 B33 1 R1 27

RTCX2 FWH1 / LAD1 LPC_LAD1 22,30,31
1 1 @ SHORT PADS C32 3 R_B ATT1.1 1 2 1 2
OSC
OSC
FWH2 / LAD2 LPC_LAD2 22,30,31 + -

C 181 C1 82 1U_0603_10V4Z A32 LPC_LAD3 22,30,31
2
A 18P_0402_50V8J R1 26 1 2 PCH_RTCRST# FWH3 / LAD3 BAV70W 3P C/C SOT-323 1K_0201_5% A
2 C14 RTCRST#
20K_0201_1% C34 1 C 184
2 2 FWH4 / LFRAME# LPC_LFRAME# 22,30,31
R1 28 1 PCH_SRTCRS T#
NC
NC
2 D17 SRTCRST#
Y2 20K_0201_1% 1 A34 1U_0603_10V4Z
RTC
LPC
LDRQ0#
1
S M_INTRUDER# A16 F34 NAND_DETECT# SUYIN_060003FA002G202NL
NAND_DETECT# 23
2
C 183 CLR P2 INTRUDER# LDRQ1# / GPIO23 2

CONN@
1U_0603_10V4Z @ SHORT PADS PCH_INTVRMEN A14 AB9 S I RQ
S I RQ 22,25,30,31
2
2 INTVRMEN SERIRQ
@ 1 2 HDA_BIT_CLK_MDC R1 29 1 2 33_0402_5% HDA_BIT_CLK A30

28 HDA_BIT_CLK_MDC HDA_BCLK
C1 85 47P_0402_50V8J R1 30 1 2 33_0402_5% AK7 SATA_PRX_DTX_N0
26 HDA_BIT_CLK_CODEC SATA0RXN SATA_PRX_DTX_N0 22
@ 1 2 HDA_BIT_CLK_CODEC R1 31 1 2 33_0402_5% HDA _S Y NC D29 AK6 SATA_PRX_DTX_P0
28 HDA _S Y NC_MDC HDA_SYNC SATA0RXP SATA_PRX_DTX_P0 22
C1 86 47P_0402_50V8J R1 32 1 2 33_0402_5% AK11 SATA_PTX_DRX_N0
26 HDA _S Y NC_ CODEC SATA0TXN SATA_PTX_DRX_N0 22
@ 1 2 H DA_SDOUT_MDC H DA_SPKR P1 AK9 SATA_PTX_DRX_P0
26 H DA_SPKR SPKR SATA0TXP SATA_PTX_DRX_P0 22
C1 87 47P_0402_50V8J
@ 1 2 HDA _SDOUT_CODEC 28 HDA_RST#_MDC
R1 33 1 2 33_0402_5% HDA_RST# C30 HDA_RST#
C1 88 47P_0402_50V8J R1 34 1 2 33_0402_5% AH6 SATA_PRX_DTX_N1
26 HD A_RST#_CODEC SATA1RXN SATA_PRX_DTX_N1 22
AH5 SATA_PRX_DTX_P1
SATA1RXP SATA_PRX_DTX_P1 22
26 HDA _ SDIN0 HDA _ SDIN0 G30 AH9 SATA_PTX_DRX_N1
HDA_SDIN0 SATA1TXN SATA_PTX_DRX_N1 22
AH8 SATA_PTX_DRX_P1
SATA1TXP SATA_PTX_DRX_P1 22
28 HDA _ SDIN1 HDA _ SDIN1 F30 HDA_SDIN1
SATA2RXN AF11
E32 AF9
IHDA
HDA_SDIN2 SATA2RXP
SATA2TXN AF7
F32 HDA_SDIN3 SATA2TXP AF6
SATA3RXN AH3
28 H DA_SDOUT_MDC R1 36 1 2 33_0402_5% H DA_SDOUT B29 AH1
R1 37 1 HDA_SDO SATA3RXP
26 HDA _SDOUT_CODEC 2 33_0402_5% SATA3TXN AF3
SATA3TXP AF1
AQUAWHITE _BATLED R 138 1 2 PCH_GPIO33 H32
SATA
B 1K_0201_5% HDA_DOCK_EN# / GPIO33 B
SATA4RXN AD9
+3VALW 1 R8 2 PCH_GPIO13 J30 AD8
10K_0402_5% HDA_DOCK_RST# / GPIO13 SATA4RXP
SATA4TXN AD6
08/31 update SATA4TXP AD5
PCH_JTA G_TCK M3 AD3 SATA_PRX_DTX_N5

JTAG_TCK SATA5RXN SATA_PRX_DTX_N5 29
AD1 SATA_PRX_DTX_P5
SATA5RXP SATA_PRX_DTX_P5 29
PCH_JTAG_TMS K3 AB3 SATA_PTX_DRX_N5
+3VM iTPM ENABLE/DISABLE 07/02 update
JTAG_TMS SATA5TXN
SATA5TXP AB1 SATA_PTX_DRX_P5
SATA_PTX_DRX_N5
SATA_PTX_DRX_P5
29
29
PCH_JTAG_TDI K1 JTAG_TDI
JTAG
1 2 KBC_SPI_S I_R PCH_JTAG_TDO J2 AF16
R1 39 @ 1K_0201_5% JTAG_TDO SATAICOMPO
Enable=Stuff Disable=No Stuff PCH_TRST# J4 AF15 SATAICOMPI 1 2 +3VS
JTAG_RST# SATAICOMPI +1.05VS
0202 D i sabl e iTPM P AD T121 R 142 37.4_0402_1%
30 KBC_SPI_CLK_R BA2 SPI_CLK
2
1 2 AV3 1 2 +3VS R1 46 R1 47
30 KBC_SPI_CS0#_R SPI_CS0#
R1 44 0_0402_5% R 145 10K_0201_5% 10K_0201_5% 10K_0201_5%
30 KBC_SPI_CS1#_R 1 2 AY3 SPI_CS1# SATALED# T3 SATA_LED# 28,29
R1 48 0_0402_5%
1
AY1 Y9 GPIO21 HD D_HALTLED
30 KBC_SPI_SI_R SPI_MOSI SATA0GP / GPIO21
SPI
30 KBC_SPI_SO AV1 V1 HD D_HALTLED GPIO21
SPI_MISO SATA1GP / GPIO19 HD D_HALTLED 28
IBEXPEAK-M_FCBGA1071
+3VALW +3VALW +3VALW
C C
08/28 update
2
R1 58 R1 57 R 156 +3VS
@ 200_0402_5% @ 200_0402_5% @ 200_0402_5% iAMT setting +3VS

J P5
1
PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_TMS 1 OBSFN_A0

2 OBSFN_A1
2
3 GND
2
R1 67 R1 66 R 165 4 OBSDATA_A0
1 2 PCH_JTA G_TCK 5 OBSDATA_A1
R 140
2
R1 76 51_0402_5% @ 100_0201_1% @ 100_0402_1% @ 100_0402_1% 6 R1 41
GND @ 10K_0201_5%
7
1
OBSDATA_A2 @ 330K_0402_5%
8
1
R 179 OBSDATA_A3 AQUAWHITE _BATLED
9 GND
14,40 VGATE 1 2 10
1
HOOK0
6
11 HOOK2
1K_0402_5% 12 HOOK4 Q31A
13 HOOK5
Pre-Production Units Production R2 14 1K_0402_5% 14 28,30 AQUAWHITE_BATLED# 2 2N7002DWH 2N SOT363-6
VCCOBS_AB
4,15,21,22,23,31 PLT_RST# 1 2 15 HOOK6
PCH Pin Ref. ES1 ES2 All 4 ,14 XDP_DBRESET# 16
1
HOOK7
17 GND
R157 Unstuff 200 ohm Unstuff PCH_JTAG_TDO 18 TDO
19 TRST#
PCH_JTAG_TDO PCH_JTAG_TDI 20 TDI
R166 Unstuff 100ohm Unstuff PCH_JTAG_TMS 21 GPIO33 iAMT Enable /Disable
TMS
22 TCK1
23 GND
R158 200 ohm 200 ohm Unstuff PCH_JTA G_TCK 24 TCK0
Hi Enable (Default)
PCH_JTAG_TDI
D R167 100ohm 100ohm Unstuff MOLEX_52435-2472_24P-T D
C ONN@ Lo Disable
R156 200 ohm 200 ohm Unstuff
PCH_JTAG_TMS
R165 100ohm 100ohm Unstuff
PCH_JTAG_TCK R176 51 ohm 5% 51 ohm 5% 51 ohm 5%

IBEX-M(1/6)-HDA/JTAG/SATA
Cus t om L A-5251P 0 .9
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SMB _CLK_S3 1 2 +3VS SM BCLK 1 2 +3VALW

R1 83 10K_0201_5% R1 84 2.2K_0402_5%
S MB_DATA_S3 1 2 SMBDATA 1 2
R1 85 10K_0201_5% R1 86 2.2K_0402_5%
SML0CLK 1 2
4/23 Change R187,R188 from 4.7K_0201 R1 87 2.2K_0402_5%
S ML0DATA 1 2
to 2.2K_0402. R1 88 2.2K_0402_5%
SML1CLK 1 2
R1 89 4.7K_0201_5%
S ML1DATA 1 2
U 7B R1 91 4.7K_0201_5%
S ML0ALERT# 1 2
BG30 B9 LID_SW#_ISO# LID_SW#_ISO# 20 07/03 update R1 92 10K_0201_5%
PERN1 SMBALERT# / GPIO11
A
BJ30 PERP1 SM BCLK
07/03 update A
BF29 PETN1 SMBCLK H14
BH29 S ML1ALERT# 1 2
PETP1 SMBDATA R1 94 10K_0201_5%
11/13 update PCIE _PRX_DTX_N2 AW30 SMBDATA C8
23 PCIE_PRX_DTX_N2 PERN2
23 PCIE_PRX_DTX_P2 PCIE_PRX_DTX_P2 BA30
C1 93 1 PERP2
23 PCIE_PTX_C_DRX_N2 2 0.1U_0402_25V4K PCIE _PTX_DRX_N2 BC30
PETN2 SML0ALERT# / GPIO60 J14 S ML0ALERT#
C1 94 1 2 0.1U_0402_25V4K PCIE_PTX_DRX_P2 BD30
23 PCIE_PTX_C_DRX_P2 PETP2
C6 SML0CLK
SML0CLK SML0CLK 21
AU30
SMBus
PERN3 S ML0DATA
AT30 PERP3 SML0DATA G8 SML0DATA 21
AU32 PETN3
AV32 PETP3
M14 S ML1ALERT#
PCIE _PRX_DTX_N4 SML1ALERT# / GPIO74
22 PCIE_PRX_DTX_N4 BA32 PERN4
22 PCIE_PRX_DTX_P4 PCIE_PRX_DTX_P4 BB32 E10 SML1CLK
C1 95 1 PERP4 SML1CLK / GPIO58
22 PCIE_PTX_C_DRX_N4 2 0.1U_0402_25V4K PCIE _PTX_DRX_N4 BD32 PETN4
C1 96 1 2 0.1U_0402_25V4K PCIE_PTX_DRX_P4 BE32 G12 S ML1DATA
22 PCIE_PTX_C_DRX_P4 PETP4 SML1DATA / GPIO75
PCI-E*
BF33 Q8A
PERN5 2N7002DW-T/R7_SOT363-6
BH33 T13
Controller
PERP5 CL_CLK1 C L_CLK1 22
BG32 SM BCLK 6 1 SMB _CLK_S3
PETN5 SMB_CLK_S3 4,9,10,11,24
BJ32 PETP5 CL_DATA1 T11 CL_DATA1 22
Link
21 PCIE_PRX_DTX_N6 PCIE _PRX_DTX_N6 BA34 T9 CL_RST1# 22
2
PCIE_PRX_DTX_P6 AW34 PERN6 CL_RST1#
21 PCIE_PRX_DTX_P6 PERP6 +3VS
C1 97 1 2 0.1U_0402_25V4K PCIE _PTX_DRX_N6 BC34
21 PCIE_PTX_C_DRX_N6 PETN6
5
C1 98 1 2 0.1U_0402_25V4K PCIE_PTX_DRX_P6 BD34
21 PCIE_PTX_C_DRX_P6 PETP6
PEG_A_CLKRQ# / GPIO47 H1
AT34 SMBDATA 3 4 S MB_DATA_S3
PERN7 SMB_DATA_S3 4,9,10,11,24
AU34 PERP7
AU36 AD43 2N7002DW-T/R7_SOT363-6
PETN7 CLKOUT_PEG_A_N Q8B
AV36 PETP7 CLKOUT_PEG_A_P AD45
B B
BG34 PERN8 CLKOUT_DMI_N AN4 R_CLK_EXP# R 195 1 2 0_0402_5% CLK_EXP# 4
PEG
BJ34 PERP8 CLKOUT_DMI_P AN2 R_CLK_EXP R 196 1 2 0_0402_5% CLK_EXP 4
BG36 PETN8
BJ36 Q2A
PETP8
CLKOUT_DP_N / CLKOUT_BCLK1_N AT1 R _CLK_DP# R 197 1 2 0_0201_5% CLK_DP# 4
2N7002DW-T/R7_SOT363-6
CLKOUT_DP_P / CLKOUT_BCLK1_P AT3 R_ CLK_DP R 198 1 2 0_0201_5% C LK_DP 4
+3VALW AK48 SML1CLK 1 6 1 2
CLKOUT_PCIE0N CAP_CLK 2 8,30
AK47 0_0201_5%
CLKOUT_PCIE0P
From CLK BUFFER

AW24 R2 63
CLKIN_DMI_N CLK_DMI# 11
R2 00 1 2 10K_0201_5% P9 BA24 CLK_DMI 11
2
PCIECLKRQ0# / GPIO73 CLKIN_DMI_P
+3VALW
5
AM43 CLKOUT_PCIE1N CLKIN_BCLK_N AP3 CLK_BUF_BCLK# 11
AM45 AP1 R2 64
CLKOUT_PCIE1P CLKIN_BCLK_P CLK_BUF_BCLK 11
07/01 update S ML1DATA 4 3 1 2 CAP_DAT 28,30
+3VS R2 02 1 2 10K_0201_5% U4 0_0201_5%
PCIECLKRQ1# / GPIO18
21 CLK_PCIE_LAN_REQ1# CLKIN_DOT_96N F18 CLK_BUF_DOT96# 11
E18 2N7002DW-T/R7_SOT363-6
CLKIN_DOT_96P CLK_BUF_DOT96 11 Q2B
R 203 1 2 0_0402_5% CLK_PCIE_EXP#_R AM47
23 CLK_PCIE_EXP# CLKOUT_PCIE2N
R 204 1 2 0_0402_5% CLK_PCIE_EXP_R AM48
23 CLK_PCIE_EXP CLKOUT_PCIE2P
CLKIN_SATA_N / CKSSCD_N AH13 CL K_BUF_CKSSCD# 11
23 CLKREQ_EXP# N4 PCIECLKRQ2# / GPIO20 CLKIN_SATA_P / CKSSCD_P AH12 CL K_BUF_CKSSCD 11
10K_0201_5%
+3VS R2 05 1 2 AH42 P41
CLKOUT_PCIE3N REFCLK14IN CLK_14M_PCH 11
AH41 CLKOUT_PCIE3P
+3VALW R2 07 1 2 10K_0201_5% A8 J42

PCIECLKRQ3# / GPIO25 CLKIN_PCILOOPBACK C LK_PCI_FB 15
R 208 1 2 0_0402_5% CLK_PCIE_MCARD#_R AM51 AH51 X TAL25_IN

C 22 CLK_PCIE_MCARD# CLKOUT_PCIE4N XTAL25_IN C
R 209 1 2 0_0402_5% C LK_PCIE_MCARD_R AM53 AH53 XTAL25_OUT
22 CLK_PCIE_MCARD CLKOUT_PCIE4P XTAL25_OUT X TAL25_IN
22 C LKREQ_WLAN# M9 AF38 XCLK _RCOMP R2 11 1 2 90.9_0402_1% +1.05VS
PCIECLKRQ4# / GPIO26 XCLK_RCOMP XTAL25_OUT 1 2
+3VALW R2 12 1 2 10K_0201_5% R 210 1M_0402_5%
AJ50 CLKOUT_PCIE5N CLKOUTFLEX0 / GPIO64 T45 T55 P A D
AJ52 Y3
CLKOUT_PCIE5P
1 2
R2 13 1 2 10K_0201_5% H6 P43
Clock Flex
+3VALW PCIECLKRQ5# / GPIO44 CLKOUTFLEX1 / GPIO65 T56 P A D

25MHZ_20PF_7A25000012
AK53 CLKOUT_PEG_B_N CLKOUTFLEX2 / GPIO66 T42
AK51 CLKOUT_PEG_B_P 1 C 199 1 C2 00
+3VALW R7 01 1 2 10K_0201_5% P13 N50

PEG_B_CLKRQ# / GPIO56 CLKOUTFLEX3 / GPIO67 18P_0402_50V8J 18P_0402_50V8J
2 2
6/16 Reserve back the 25MHz design circuit. (Reserve Y3,

R210,C199); Move R1093 to close to Y3 and C199.
7/1 Del T122, Del R1093(0_0402) and replace by add C200
(18P); Install R210,Y3,C199 by Intel finalized DP
workaround and need them.
D D

IBEX-M(2/6)-PCI-E/SMBUS/CLK
Cus t om L A-5251P 0 .9
1 2 3 4 5
WWW.AliSaler.Com
5 4 3 2 1
WWW.AliSaler.Com U7C U7D +3VS

FDI_CTX_PRX_N0 L Place C669 close to R215.
FDI_RXN0 BA18 FDI_CTX_PRX_N0 5 20 ENABLT T48 L_BKLTEN SDVO_TVCLKINN BJ46
5 DMI_CTX_PRX_N0 DMI_CTX_PRX_N0 BC24 BH17 FDI_CTX_PRX_N1 T47 BG46
DMI0RXN FDI_RXN1 FDI_CTX_PRX_N1 5 20 E NA VDD L_VDD_EN SDVO_TVCLKINP
5 DMI_CTX_PRX_N1 DMI_CTX_PRX_N1 BJ22 BD16 FDI_CTX_PRX_N2
DMI1RXN FDI_RXN2 FDI_CTX_PRX_N2 5
5 DMI_CTX_PRX_N2 DMI_CTX_PRX_N2 AW20 BJ16 FDI_CTX_PRX_N3 Y48 BJ48 1
DMI2RXN FDI_RXN3 FDI_CTX_PRX_N3 5 20 INV_PWM L_BKLTCTL SDVO_STALLN
5 DMI_CTX_PRX_N3 DMI_CTX_PRX_N3 BJ20 BA16 FDI_CTX_PRX_N4 BG48 R 216 R2 15 C6 69
DMI3RXN FDI_RXN4 FDI_CTX_PRX_N4 5 SDVO_STALLP
BE14 FDI_CTX_PRX_N5 AB48
FDI_RXN5 FDI_CTX_PRX_N5 5 L_DDC_CLK
5 DMI_CTX_PRX_P0 DMI_CTX_PRX_P0 BD24 BA14 FDI_CTX_PRX_N6 Y45 BF45 2.2K_0402_5% 2.2K_0402_5% 0.1U_0402_16V4Z
DMI0RXP FDI_RXN6 FDI_CTX_PRX_N6 5 L_DDC_DATA SDVO_INTN 2
5 DMI_CTX_PRX_P1 DMI_CTX_PRX_P1 BG22 BC12 FDI_CTX_PRX_N7 BH45
DMI1RXP FDI_RXN7 FDI_CTX_PRX_N7 5 SDVO_INTP
5 DMI_CTX_PRX_P2 DMI_CTX_PRX_P2 BA20 AB46 11/11 update for EMI.
DMI_CTX_PRX_P3 DMI2RXP FDI_CTX_PRX_P0 L_CTRL_CLK
5 DMI_CTX_PRX_P3 BG20 DMI3RXP FDI_RXP0 BB18 FDI_CTX_PRX_P0 5 V48 L_CTRL_DATA
BF17 FDI_CTX_PRX_P1
FDI_RXP1 FDI_CTX_PRX_P1 5
D DMI_CRX_PTX_N0 BE22 BC16 FDI_CTX_PRX_P2 AP39 T51 D
5 DMI_CRX_PTX_N0 DMI0TXN FDI_RXP2 FDI_CTX_PRX_P2 5 LVD_IBG SDVO_CTRLCLK DPB_CTRLCLK 29
DMI_CRX_PTX_N1 BF21 BG16 FDI_CTX_PRX_P3 PAD T57 AP41 T53
5 DMI_CRX_PTX_N1 DMI1TXN FDI_RXP3 FDI_CTX_PRX_P3 5 LVD_VBG SDVO_CTRLDATA DPB_CTRLDATA 29
DMI_CRX_PTX_N2 BD20 AW16 FDI_CTX_PRX_P4
5 DMI_CRX_PTX_N2 DMI2TXN FDI_RXP4 FDI_CTX_PRX_P4 5
DMI_CRX_PTX_N3 BE18 BD14 FDI_CTX_PRX_P5 04/25 Delete U7.AT42 and U7.AT43 DGND AT43
5 DMI_CRX_PTX_N3 DMI3TXN FDI_RXP5 FDI_CTX_PRX_P5 5 LVD_VREFH
BB14 FDI_CTX_PRX_P6 AT42 BG44
FDI_RXP6 FDI_CTX_PRX_P6 5 LVD_VREFL DDPB_AUXN DPB_AUX# 29
5 DMI_CRX_PTX_P0
DMI_CRX_PTX_P0 BD22 DMI0TXP FDI_RXP7 BD12 FDI_CTX_PRX_P7
FDI_CTX_PRX_P7 5
connection (confirmed with INTEL) DDPB_AUXP BJ44 DPB_AUX 29
DMI_CRX_PTX_P1 BH21 AU38
5 DMI_CRX_PTX_P1 DMI1TXP DDPB_HPD DP B_HPD 29
LVDS
DMI_CRX_PTX_P2 BC20 AV53
5 DMI_CRX_PTX_P2 DMI2TXP LVDSA_CLK#
DMI_CRX_PTX_P3 BD18 BJ14 FDI _INT AV51 BD42
5 DMI_CRX_PTX_P3 DMI3TXP FDI_INT FDI _INT 5 LVDSA_CLK DDPB_0N DPB_TXN0 29
BC42
DMI
FDI
DDPB_0P DPB_TXP0 29
BF13 FDI_FS Y N C0 BB47 BJ42
+1.05VS FDI_FSYNC0 FDI_FS Y N C0 5 LVDSA_DATA#0 DDPB_1N DPB_TXN1 29
Digital Display Interface

BH25 DMI_ZCOMP BA52 LVDSA_DATA#1 DDPB_1P BG42 DPB_TXP1 29
BH13 FDI_FS Y N C1 AY48 BB40
FDI_FSYNC1 FDI_FS Y N C1 5 LVDSA_DATA#2 DDPB_2N DPB_TXN2 29
1 2 DMI_IRCOMP BF25 AV47 BA40
DMI_IRCOMP LVDSA_DATA#3 DDPB_2P DPB_TXP2 29
R2 20 49.9_0402_1% BJ12 FDI_LS Y NC0 AW38
FDI_LSYNC0 FDI_LS Y NC0 5 DDPB_3N DPB_TXN3 29
BB48 LVDSA_DATA0 DDPB_3P BA38 DPB_TXP3 29
BG14 FDI_LS Y NC1 BA50
FDI_LSYNC1 FDI_LS Y NC1 5 LVDSA_DATA1
AY49 LVDSA_DATA2
AV48 LVDSA_DATA3 DDPC_CTRLCLK Y49
DDPC_CTRLDATA AB49
AP48 LVDSB_CLK#
AP47 LVDSB_CLK DDPC_AUXN BE44
DDPC_AUXP BD44
4 ,12 XDP_DBRESET# 1 2 SYS_RS T# T6 SYS_RESET# WAKE# J12 PCIE_WA KE#
PCIE_WAKE# 22,23 AY53 LVDSB_DATA#0 DDPC_HPD AV40
R2 23 0_0201_5% AT49 LVDSB_DATA#1
AU52 LVDSB_DATA#2 DDPC_0N BE40
12,40 VGATE VGATE M6 Y1 P M_CLKRUN# AT53 BD40
SYS_PWROK CLKRUN# / GPIO32 P M_CLKRUN# 25,30,31 LVDSB_DATA#3 DDPC_0P
System Power Management

DDPC_1N BF41
AY51 LVDSB_DATA0 DDPC_1P BH41
30,40 P GD _IN R4 08 1 2 1K_0402_5% B17 AT48 BD38
PWROK LVDSB_DATA1 DDPC_2N
07/01 update 08/25 update AU50 LVDSB_DATA2 DDPC_2P BC38
AT51 LVDSB_DATA3 DDPC_3N BB36
32 M_PWROK 1 2 K5 P8 SUS_STAT# T87 P AD BA36
R 224 0_0201_5% MEPWROK SUS_STAT# / GPIO61 DDPC_3P
C C
DP D_CTRLCLK 19
1 2 AUXP WROK A10 LAN_RST# SUSCLK / GPIO62 F3 SUS_CLK T58 P AD DA C _BLU AA52 CRT_BLUE DDPD_CTRLCLK U50 R 226 2.2K_0402_5% +3VS
R 225 0_0201_5% DA C_G RN AB53 U52 R 227 2.2K_0402_5%
DA C_R ED CRT_GREEN DDPD_CTRLDATA
AD53 CRT_RED DPD_CTRLDATA 19
PM_DRAM_PW RGD D9 E4
4 PM_DRAM_PWRGD DRAMPWROK SLP_S5# / GPIO63 SLP_S5#
BC46 C_DPD_AUX# C2 22 1 2 0.1U_0402_16V4Z
DDPD_AUXN DPD_AUX# 19
36 R PGOOD R2 28 1 2 0_0201_5% V51 BD46 C_DPD_A UX C2 23 1 2 0.1U_0402_16V4Z
18 CRT_D DC_CLK CRT_DDC_CLK DDPD_AUXP DPD_AUX 19
30 PM_RSMRST# 1 2 C16 RSMRST# SLP_S4# H7 SLP_S4# 24,29,33,39 18 C RT_DDC_DATA V53 CRT_DDC_DATA DDPD_HPD AT38 DP D_H PD 19
R2 29 10K_0201_5%
+3VALW R2 30 1 2 10K_0201_5% BJ40 C_DPD_TXN0 C2 24 1 2 0.1U_0402_16V4Z
DDPD_0N DPD_TXN0 19
30 SUS_PWR_ACK M1 P12 Y53 BG40 C_DP D_TXP0 C2 25 1 2 0.1U_0402_16V4Z
SUS_PWR_ACK / GPIO30 SLP_S3# SLP_S3# 23,29,30,32,33,35,37,38 18 CRT_HS Y NC CRT_HSYNC DDPD_0P DPD_TXP0 19
Y51 BJ38 C_DPD_TXN1 C2 26 1 2 0.1U_0402_16V4Z
18 CRT_V SYNC CRT_VSYNC DDPD_1N DPD_TXN1 19
4 PM_PWRBTN#_R BG38 C_DP D_TXP1 C2 27 1 2 0.1U_0402_16V4Z
DDPD_1P DPD_TXP1 19
CRT
28,30 O N/OFFBTN# O N/OFFBTN# 1 2 P5 K8 BF37 C_DPD_TXN2 C2 28 1 2 0.1U_0402_16V4Z
PWRBTN# SLP_M# PM_SLP_M# 30,32,33 DDPD_2N DPD_TXN2 19
R2 31 0_0201_5% DA C_I REF AD48 BH37 C_DP D_TXP2 C2 29 1 2 0.1U_0402_16V4Z
DAC_IREF DDPD_2P DPD_TXP2 19
AB51 BE36 C_DPD_TXN3 C2 30 1 2 0.1U_0402_16V4Z
CRT_IRTN DDPD_3N DPD_TXN3 19
30 AC_PRESENT P7 N2 BD36 C_DP D_TXP3 C2 31 1 2 0.1U_0402_16V4Z
ACPRESENT / GPIO31 TP23 DDPD_3P DPD_TXP3 19
R 232
01/04 update for ESD LOW_B AT_R A6 BJ10 1K_0402_0.5%
BATLOW# / GPIO72 PMSYNCH H_ PM_SYNC 4
O N/OFFBTN#
1
C 145 IB EX_R# F14 F6
RI# SLP_LAN# PM_SLP_LAN# 30,33,39
0.1U_0402_16V4Z
2 IBEXPEAK-M_FCBGA1071 DP B_HPD 1 2
R2 33 100K_0201_5%
L Add C145 close to R231 pin 1. DP D_H PD 1 2

VGATE 1 2 R2 35 100K_0201_5%
+3VS R 236 10K_0201_5%
P M_CLKRUN# 1 2
B 04/28 Remove R238 R2 37 10K_0201_5% B
(Confirm why pull up to +3VALW

Sus-Power different to SYS_RS T# 1 2
INTEL DG Core-Power) R2 38 @ 10K_0201_5%
LOW_B AT_R 1 2 SLP_S3# 1 2 1/4 update L1~L6 PCB Footprint
R2 39 10K_0201_5% R 240 @ 10K_0201_5%
PM_SLP_LAN# 1 2 SLP_S4# 1 2 L1 L2
R2 41 10K_0201_5% R 242 @ 10K_0201_5% HLC0603CSCC33NJT_0603 0_0603_5%
IB EX_R# 1 2 SLP_S5# 1 2 DA C_R ED 1 2 RE D_L 1 2 RE D_R 18
R2 43 10K_0201_5% R 244 @ 10K_0201_5% L3 L4
PCIE_WA KE# 1 2 HLC0603CSCC33NJT_0603 0_0603_5%
R2 45 1K_0201_5% DA C_G RN 1 2 G REEN_L 1 2 GR EEN_R 18
AC_PRE SENT 1 2 L5 L6
R2 46 @ 10K_0201_5% HLC0603CSCC33NJT_0603 0_0603_5%
07/01 update DA C _BLU 1 2 BLUE _L 1 2 B LUE_R 18
R2 47
R2 48
R2 49
18P_0402_50V8J
18P_0402_50V8J
18P_0402_50V8J
@18P_0402_50V8J
@18P_0402_50V8J
@18P_0402_50V8J
C2 35
C2 36
C2 37
@ 150_0402_1%
@ 150_0402_1%
@ 150_0402_1%
C2 32
C2 33
C2 34
1 1 1 1 1 1
1
2 2 2 2 2 2
11/27 update
2
A A

IBEX-M(3/6)-DMI/GPIO/LVDS
WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Cus t om L A-5251P 0 .9
5 4 3 2 1
U 7E U 7F
25 P C I_AD[0..31] 0_0402_5%
P C I_AD0 H40 AY9 0_0402_5%
AD0 NV_CE#0 N V_CE0# 23
P C I_AD1 N34 BD1 +3VS R2 50 1 2 10K_0201_5% PCH_XDP _GPIO0 Y3 AH45 CLK_PCIE_LAN#_R 2 1 CLK_PCIE_LAN# 21
AD1 NV_CE#1 N V_CE1# 23 BMBUSY# / GPIO0 CLKOUT_PCIE6N
P C I_AD2 C44 AP15 PCH_XDP_GPIO0 AH46 CLK_PCIE_LAN_R 2 1
AD2 NV_CE#2 N V_CE2# 23 CLKOUT_PCIE6P
P C I_AD3 A38 BD8 41 O CP# C38 R 251 CLK_PCIE_LAN 21
AD3 NV_CE#3 N V_CE3# 23 TACH1 / GPIO1
P C I_AD4 C36 R 252
P C I_AD5 AD4 RUNS CI _EC#
J34 AD5 NV_DQS0 AV9 N V_DQS0 23 30 RUNS CI _EC# D37 TACH2 / GPIO6
P C I_AD6 A40 BG8 AF48
AD6 NV_DQS1 N V_DQS1 23 CLKOUT_PCIE7N
MISC
P C I_AD7 D45 4 THERM_SCI# THERM_S CI# J32 AF47
P C I_AD8 AD7 TACH3 / GPIO7 CLKOUT_PCIE7P
E36 AD8 NV_DQ0 / NV_IO0 AP7 NV _DQ0 23
P C I_AD9 H48 AP6 4 P CH_D DR_RST P CH_ DDR_RST F10
AD9 NV_DQ1 / NV_IO1 NV _DQ1 23 GPIO8
P CI_AD10 E40 AT6 07/08 update for INTEL 1 2 +3VS
AD10 NV_DQ2 / NV_IO2 NV _DQ2 23
P CI_AD11 C40 AT9 21 LA N_DIS# K9 U2 10K_0201_5% R 253
AD11 NV_DQ3 / NV_IO3 NV _DQ3 23 LAN_PHY_PWR_CTRL / GPIO12 A20GATE GATEA20 30
P CI_AD12 M48 AD12 NV_DQ4 / NV_IO4 BB1 NV _DQ4 23
S3 leakage issue.
P CI_AD13 M45 AV6 GPIO15 T7
D AD13 NV_DQ5 / NV_IO5 NV _DQ5 23 GPIO15 D
P CI_AD14 F53 BB3
P CI_AD15 M40 BA4 PCH_XDP_GPIO16 AA2 AM3
AD15 NV_DQ7 / NV_IO7 NV _DQ7 23 SATA4GP / GPIO16 CLKOUT_BCLK0_N / CLKOUT_PCIE8N CLK_CPU_BCLK# 4
NVRAM
P CI_AD16 M43 BE4
P CI_AD17 J36 BB6 20 ALS_EN# ALS_EN# F38 AM1
AD17 NV_DQ9 / NV_IO9 NV _DQ9 23 TACH0 / GPIO17 CLKOUT_BCLK0_P / CLKOUT_PCIE8P C LK_CPU_BCLK 4
P CI_AD18 K48 BD6
P CI_AD19 F40 BB7 23 W W AN_DET# W WAN_DET# Y7 BG10 P CH _PECI_R 1 2 R 254
AD19 NV_DQ11 / NV_IO11 NV _DQ11 23 SCLOCK / GPIO22 PECI H_P ECI 4
GPIO
P CI_AD20 C42 BC8 0_0201_5%
1 2 +3VS
P CI_AD21 K46 BJ8 GPIO24 H10 T1 KB _RST# 10K_0201_5% R 260
AD21 NV_DQ13 / NV_IO13 NV _DQ13 23 MEM_LED / GPIO24 RCIN# KB_RST# 30
P CI_AD22 M51 BJ6
P CI_AD23 J52 BG6 WWAN_TRANSMIT_OFF# AB12 BE10
AD23 NV_DQ15 / NV_IO15 NV _DQ15 23 23,28 WWAN_TRANSMIT_OFF# GPIO27 PROCPWRGD H_CP UP W RGD 4
CPU
P CI_AD24 K51
P CI_AD25 AD24
L34 AD25 NV_ALE BD3 NV_A LE NV_ALE 23
PCH_XDP_GPIO28 V13 GPIO28 THRMTRIP# BD10 H_THERMTRIP#_L 1 2 H_THERMTRIP# 4
P CI_AD26 F42 AY6 N V_CLE R2 55 54.9_0402_1%
AD26 NV_CLE N V_CLE 23
1
P CI_AD27 J40 STP_PCI# M11
P CI_AD28 AD27 STP_PCI# / GPIO34
P CI_AD29
G46 AD28 09/03 update
F44 AD29 NV_RCOMP AU2 NV_RCOMP 1 2 SATA_CLKREQ# V6 SATACLKREQ# / GPIO35
R2 56
P CI_AD30 M47 R2 57 @ 32.4_0402_1% 56_0402_5%
P CI_AD31 AD30 PCI
H36 AV7 NV _RB# 23 30 NPCI_RST# AB7 BA22 T59 P AD
2
AD31 NV_RB# SATA2GP / GPIO36 TP1
+ VCCP
J50 AY8 20 WEBCAM_ON WEBCAM_ON AB13 AW22 T60 P AD
25 PCI_CBE0# C/BE0# NV_WR#0_RE# NV _ RE#_WR#0 23 SATA3GP / GPIO37 TP2
25 PCI_CBE1# G42 C/BE1# NV_WR#1_RE# AY5 NV _ RE#_WR#1 23 06/16 update DOCK _ID0
25 PCI_CBE2# H47 C/BE2# 29 DOCK _ID0 V3 SLOAD / GPIO38 TP3 BB22 T61 P AD
25 PCI_CBE3# G34 C/BE3# NV_WE#_CK0 AV11 N V_WE#_CK0 23
BF5 DOCK _ID1 P3 AY45 T62 P AD
NV_WE#_CK1 N V_WE#_CK1 23 29 DOCK _ID1 SDATAOUT0 / GPIO39 TP4
PCI_PIRQA# G38
PCI_PIRQB# PIRQA# CLK_PCIE_LAN_REQ#
H51 PIRQB# 21 CLK_PCIE_LAN_REQ# H3 PCIECLKRQ6# / GPIO45 TP5 AY46 T63 P AD
P CI _PIRQC# B37 H18 USB20_N0 10K_0201_5%
PIRQC# USBP0N USB20_N0 24
P CI _PIRQD# A44 J18 USB20_P0 +3VALW R4 30 1 2 F1 AV43 T64 P AD
PIRQD# USBP0P USB20_P0 24 PCIECLKRQ7# / GPIO46 TP6
A18 USB20_N1
USBP1N USB20_N1 24
PCI_REQ0# F51 C18 USB20_P1 GPIO48 AB6 AV45 T65 P AD
REQ0# USBP1P USB20_P1 24 SDATAOUT1 / GPIO48 TP7
PCI_REQ1# A46 N20 USB20_N2
REQ1# / GPIO50 USBP2N USB20_N2 24
25 PCI_REQ2# PCI_REQ2# B45 P20 USB20_P2 PCH_XDP_GPIO49 AA4 AF13 T66 P AD
C REQ2# / GPIO52 USBP2P USB20_P2 24 PCH_XDP_GPIO49 SATA5GP / GPIO49 TP8 C
PCI_REQ3# M53 J20 USB20_N3
REQ3# / GPIO54 USBP3N USB20_N3 24
L20 USB20_P3 WLAN_TRANSMIT_OFF# F8 M18 T67 P AD
USBP3P USB20_P3 24 22 WLAN_TRANSMIT_OFF# GPIO57 TP9
PCI_GNT0# F48 F20 USB20_N4
GNT0# USBP4N USB20_N4 23
P AD T114 MODE M_DISABLE K45 G20 USB20_P4 N18 T68 P AD CLK_PCI_1394
GNT1# / GPIO51 USBP4P USB20_P4 23 TP10
PCI_GNT2# F36 A20 CLK_PCI_KBC 1
25 PCI_GNT2# GNT2# / GPIO53 USBP5N
PCI_GNT3# H53 C20 A4 AJ24 T69 P AD 1
GNT3# / GPIO55 USBP5P VSS_NCTF_1 TP11 C 660
M22 10/13 update A49
NCTF
USBP6N VSS_NCTF_2
RSVD
PCI_PIRQE# B41 N22 A5 AK41 T70 P AD C6 35 @ 12P_0402_50V8C
25 PCI_PIRQE# PIRQE# / GPIO2 USBP6P VSS_NCTF_3 TP12 2
22 ODD_DET# O DD_DET# K53 B21 A50 @ 12P_0402_50V8C
P CI_PIRQG# PIRQF# / GPIO3 USBP7N VSS_NCTF_4 2
25 P CI_PIRQG# A36 PIRQG# / GPIO4 USBP7P D21 A52 VSS_NCTF_5 TP13 AK42 T71 P AD
ACCEL_INT# A48 H22 USB20_N8 A53
24 ACCEL_INT# PIRQH# / GPIO5 USBP8N USB20_N8 24 17 P CH_ NCTF6 VSS_NCTF_6
J22 USB20_P8 B2 M32 T72 P AD
USBP8P USB20_P8 24 17 P CH_ NCTF7 VSS_NCTF_7 TP14
USB
K6 E22 USB20_N9 B4
22,25 PCI_RST# PCIRST# USBP9N USB20_N9 23 VSS_NCTF_8
F22 USB20_P9 B52 N32 T73 P AD
USBP9P USB20_P9 23 VSS_NCTF_9 TP15
P C I_SERR# E44 A22 USB20_N10 B53 C LK_PCI_FB CLK_P CI_TPM
22,25,30,31 P C I_SERR# SERR# USBP10N USB20_N10 31 VSS_NCTF_10
P C I_PERR# E50 C22 USB20_P10 BE1 M30 T74 P AD 1 1
25 P C I_PERR# PERR# USBP10P USB20_P10 31 VSS_NCTF_11 TP16
G24 USB20_N11 BE53
USBP11N USB20_N11 29 VSS_NCTF_12
H24 USB20_P11 BF1 N30 T75 P AD C6 58 C 659
USBP11P USB20_P11 29 VSS_NCTF_13 TP17
P CI_IRD Y# A42 L24 USB20_N12 BF53 @ 12P_0402_50V8C @ 12P_0402_50V8C
25 P CI_IRD Y# IRDY# USBP12N USB20_N12 20 VSS_NCTF_14 2 2
H44 M24 USB20_P12 BH1 H12 T76 P AD
25 P CI_PAR PAR USBP12P USB20_P12 20 VSS_NCTF_15 TP18
PCI_DEVS EL# F46 A24 BH2
25 PCI_DEVSEL# DEVSEL# USBP13N VSS_NCTF_16
PCI_FRAM E# C46 C24 BH52 AA23 T77 P AD
25 PCI_FRAME# FRAME# USBP13P VSS_NCTF_17 TP19
BH53 VSS_NCTF_18
PCI_LOCK# D49 BJ1 AB45 T78 P AD
PLOCK# 17 P CH _NCTF19 VSS_NCTF_19 NC_1
B25 USBRBIAS 1 2 BJ2
PCI_STOP# USBRBIAS# R2 59 22.6_0402_1% VSS_NCTF_20
25 PCI_STOP# D41 STOP# BJ4 VSS_NCTF_21 NC_2 AB38 T79 P AD
P CI_ TRDY# C48 D25 BJ49
25 P CI_ TRDY# TRDY# USBRBIAS VSS_NCTF_22
BJ5 VSS_NCTF_23 NC_3 AB42 T80 P AD
M7 PME# BJ50 VSS_NCTF_24
N16 USB_OC#0 BJ52 AB41 T81 P AD
OC0# / GPIO59 VSS_NCTF_25 NC_4
4,12,21,22,23,31 PLT_RST# D5 PLTRST# OC1# / GPIO40 J16 BT_OFF 24 17 P CH _NCTF26 BJ53 VSS_NCTF_26
F16 USB_OC#2 D1 T39 T82 P AD
B C LK_PCI_KBC_RN52 OC2# / GPIO41 VSS_NCTF_27 NC_5 B
CLKOUT_PCI0 OC3# / GPIO42 L16 FP R_ OFF 31 D2 VSS_NCTF_28
CL K_PCI_FB_R P53 E14 USB_OC#4 D53
CLK_PCI_TPM_R P46 CLKOUT_PCI1 OC4# / GPIO43 VSS_NCTF_29
CLKOUT_PCI2 OC5# / GPIO9 G16 PREP# 18,21,29 E1 VSS_NCTF_30 INIT3_3V# P6 T83 P AD
CLK_PCI_1394_RP51 F12 USB_OC#6 E53
CLKOUT_PCI3 OC6# / GPIO10 LA NLINK_R# 21,30 VSS_NCTF_31
CLK_PCI_DB_P P48 T15 W OW # C10 T84 P AD
CLKOUT_PCI4 OC7# / GPIO14 R 265 TP24
+3VS 08/25 update IBEXPEAK-M_FCBGA1071
10/21 update RP 1 IBEXPEAK-M_FCBGA1071
2
0_0402_5%
1 CPPE# 23
P CI _PIRQD# 1 8 +3VALW +3VS
PCI_PIRQE# 2 7
PCI_STOP# 3 6 C 662 0.1U_0402_16V4Z PCI_GNT0# R 267 1 2 @ 1K_0201_5% WLAN_TRANSMIT_OFF# R 269 1 2 10K_0201_5% NPCI_RST# R2 68 1 2 10K_0201_5%
4 5 C6 61 0.1U_0402_16V4Z +1.05VS 1 2 +1.05VM
+3VS 1 2 +1.05VM MODE M_DISABLE R 271 1 2 @ 1K_0201_5% WWAN_TRANSMIT_OFF# R 273 1 2 10K_0201_5% SATA_CLKREQ# R2 72 1 2 10K_0201_5%
8.2K_0804_8P4R_5% +1.05VS 1 2 +3VS
RP 2 GPIO24 R 277 1 2 10K_0201_5% PCH_XDP_GPIO49 R2 75 1 2 10K_0201_5%
PCI_REQ2# 1 8 C 663 0.1U_0402_16V4Z Danbury Technology Enable
PCI_REQ1# NV_ALE High=Endabled GPIO15 R 280 1 2 SV@1K_0201_5% W WAN_DET# R2 79 1 2 100K_0201_5%
PCI_FRAM E#
2 7 07/09 update for INTEL S3 leakage issue. Low=Disable (@)
07/02 update
3 6
P CI_ TRDY# 4 5 PRE P# R 283 1 2 10K_0201_5% ALS_EN# R2 81 1 2 10K_0201_5%
R 266 1 2 22_0402_5% C LK_PCI_KBC_R GPIO15 R 302 1 2 LV@10K_0201_5%
30 C LK_PCI_KBC +V_NVRAM_VCCQ
8.2K_0804_8P4R_5% CLK_PCIE_LAN_REQ# R 286 1 2 10K_0201_5% RUNS CI _EC# R2 85 1 2 10K_0201_5%
RP 3 10/19 update 09/12 update
P CI_IRD Y# 1 8 NV_A LE 1 2 USB_OC#0 R 289 1 2 10K_0201_5% WEBCAM_ON R2 87 1 2 @ 10K_0402_5%
P C I_PERR# 2 7 R 274 1 2 22_0402_5% CLK_PCI_DB_P CPU Type Detect : High-->SV , Low-->LV R2 84 @ 1K_0201_5%
PCI_DEVS EL#
P C I_SERR#
3 6
22,31
13
CL K_PCI_DB
C LK_PCI_FB
R 276 1
R 278 1
2 22_0402_5% CL K_PCI_FB_R L P CH_ DDR_RST R 291 1 2@ 10K_0201_5% PCH_XDP_GPIO16 R2 90 1 2 10K_0201_5%
4 5 31 CLK_PCI_TPM 2 22_0402_5% CLK_PCI_TPM_R
USB_OC#4 R 293 1 2 10K_0201_5% DOCK _ID0 R2 92 1 2 10K_0201_5%
8.2K_0804_8P4R_5% 1 2 DMI Termination Voltage
RP 4 R 282 1 2 22_0402_5% CLK_PCI_1394_R R2 88 0_0201_5% NV_CLE Set to Vss when LOW W OW # R 295 1 2 10K_0201_5% DOCK _ID1 R2 94 1 2 10K_0201_5%
25 CLK_PCI_1394 Set to Vcc when HIGH
PCI_REQ0# 1 8
PCI_PIRQB# 2 7 +3VS GPIO48 R2 96 1 2 10K_0201_5%
O DD_DET# 3 6 +3VS
A PCI_REQ3# 4 5 +3VS PCH_XDP_GPIO28 R 368 1 2 10K_0201_5% STP_PCI# R2 99 1 2 10K_0201_5% A
RP 5
5
8.2K_0804_8P4R_5% PCI_PIRQA# U10 N V_CLE USB_OC#6 R 258 2 1 10K_0201_5% +3VM_LAN

THERM_S CI#
1 8
P LT_RST#
1
R2 97 @
2
1K_0201_5%
07/02 update
2 7 1
P
P CI _PIRQC# IN1 USB_OC#2 R 301 2

3 6 4 BUF_PLT_RST# 4 O 1 10K_0201_5% L AN_DIS# R2 98 1 2 10K_0201_5%
PCI_GNT3# 1 2 P CI_PIRQG# 4 5 2
IN2
G
R 300 @ 1K_0201_5%
8.2K_0804_8P4R_5% @ SN74AHC1G08DCKR_SC70-5
3
RP 6
ACCEL_INT# 1 8 2008/09/15 2010/12/31 Title
PCI_LOCK#
2 7
3 6 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
IBEX-M(4/6)-PCI/USB/RSVD
4 5 Size D ocument Number Rev
Cus t om L A-5251P 0 .9
8.2K_0804_8P4R_5% MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2 1
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+3VS
P AD T123
+1.05VS L7
+1.05VM U 7J POWER
+1.05VS U7G POWER 1 2
0.01U_0603_16V7K
10U_0805_6.3V6M
AB24 AE50 10UH_LB2012T100MR_20%_0805
VCCCORE[1] VCCADAC[1]
1U_0603_10V4Z
10U_0805_6.3V6M
0.1U_0402_16V4Z
AB26 VCCCORE[2]
C2 40
C2 41
C2 42
C2 43
C2 44
AP51 VCCACLK[1] VCCIO[5] V24 1 1 AB28 VCCCORE[3] 0.069A VCCADAC[2] AE52 1 1 1
1U_0402_6.3V4Z
1 0.052A VCCIO[6] V26 AD26 VCCCORE[4] 1.524A
CRT
AP53 VCCACLK[2] VCCIO[7] Y24 1 AD28 VCCCORE[5] VSSA_DAC[1] AF53
Y26 C 246 AF26
VCCIO[8] 2 2 VCCCORE[6] 2 2 2
C2 45
VCC CORE
1U_0402_6.3V4Z AF28 AF51
2 VCCCORE[7] VSSA_DAC[2]
AF23 VCCLAN[1] VCCSUS3_3[1] V28 AF30 VCCCORE[8]
2
A
0.344A VCCSUS3_3[2] U28 AF31 VCCCORE[9] A
AF24 VCCLAN[2] VCCSUS3_3[3] U26 AH26 VCCCORE[10]
P AD T111 U24 AH28
VCCSUS3_3[4] VCCCORE[11]
VCCSUS3_3[5] P28 AH30 VCCCORE[12]
1
C 247
2
0.1U_0402_16V4Z
Y20 DCPSUSBYP VCCSUS3_3[6] P26 AH31 VCCCORE[13] 0.030A VCCALVDS AH38
VCCSUS3_3[7] N28 AJ30 VCCCORE[14]
VCCSUS3_3[8] N26 AJ31 VCCCORE[15] VSSA_LVDS AH39
AD38 VCCME[1] VCCSUS3_3[9] M28
M26 +3VALW
VCCSUS3_3[10]
AD39 L28 AP43
USB
+1.05VM VCCME[2] VCCSUS3_3[11] +1.05VS VCCTX_LVDS[1]
VCCSUS3_3[12] L26 0.059AVCCTX_LVDS[2] AP45
0.1U_0402_16V4Z
0.1U_0402_16V4Z
AD41 J28 AT46
LVDS
VCCME[3] VCCSUS3_3[13] VCCTX_LVDS[3]
C 250
C 251
VCCSUS3_3[14] J26 1 1 AK24 VCCIO[24] VCCTX_LVDS[4] AT45
1U_0402_6.3V4Z
AF43 H28 Don't need extra-power

VCCME[4] VCCSUS3_3[15]
C2 52
1 VCCSUS3_3[16] H26
0.163AVCCSUS3_3[17] P AD T124 +1.05VS_APLL
AF41 VCCME[5] G28
2 2
BJ24 VCCAPLLEXP0.042A
VCCSUS3_3[18] G26 VCC3_3[2] AB34
AF42 VCCME[6] VCCSUS3_3[19] F28
2 +3VS
1.998A VCCSUS3_3[20] F26 AN20 VCCIO[25] VCC3_3[3] AB35
V39 E28 AN22
HVCMOS
VCCME[7] VCCSUS3_3[21] VCCIO[26]
Clock and Miscellaneous

VCCSUS3_3[22] E26 AN23 VCCIO[27] VCC3_3[4] AD35 1 2
1U_0402_6.3V4Z V41 C28 AN24 C 254 0.1U_0402_16V4Z
VCCSUS3_3[24] C26 AN26 VCCIO[29]
V42 VCCME[9] VCCSUS3_3[25] B27 AN28 VCCIO[30]
1 1 1 VCCSUS3_3[26] A28 BJ26 VCCIO[31]
C2 55 C 256 C 257 Y39 A26 BJ28
AT26 VCCIO[33]
22U_0805_6.3V6M Y41 U23 +1.05VS AT28
2 2 2 VCCME[11] VCCSUS3_3[28] VCCIO[34]
AU26 VCCIO[35]
Y42 V23 AU28 +1.8VS
VCCME[12] VCCIO[56] +1.05VS VCCIO[36]
1U_0402_6.3V4Z
1U_0402_6.3V4Z
22U_0805_6.3V6M AV26 VCCIO[37]
C 259
C 260
>1mA F24 IC H_V5REF_SUS 1 1 AV28 AT24
C 258 V5REF_SUS VCCIO[38] VCCVRM[2]
AW26 VCCIO[39]
B 1 2 +VCCRTCEXT V9 AW28 B
DCPRTC VCCIO[40] +VCCP
DMI
0.1U_0402_16V4Z BA26 AT16
2 2 VCCIO[41] VCCDMI[1]
ICH_V 5R EF_RUN
BA28 VCCIO[42] 0.061A
0.035A >1mA V5REF K49 BB26 VCCIO[43] VCCDMI[2] AU16 1
C 261
2
1U_0603_10V4Z
AU24 BB28
PCI/GPIO/LPC
+1.8VS VCCVRM[3] VCCIO[44]

BC26 VCCIO[45]
+3VS
PCI E*
0.072A VCC3_3[8] J38 BC28 VCCIO[46] +V_NVRAM_VCCQ
1U_0402_6.3V4Z
1U_0402_6.3V4Z
10U_0603_6.3V6M
BB51 VCCADPLLA[1] BD26 VCCIO[47]
+V1.05S_VCCA_A_DPL BB53 L38 BD28
VCCADPLLA[2] VCC3_3[9] VCCIO[48]
C 263
C 264
C 265
1 1 1 1 BE26 VCCIO[49] VCCPNAND[1] AM16
0.1U_0402_16V4Z
0.073A M36 C2 62 BE28 AK16
VCC3_3[10] VCCIO[50] VCCPNAND[2]
C2 66
+V1.05S_VCCA_B_DPL BD51 0.357A 0.1U_0402_16V4Z BG26 AK20 1
VCCADPLLB[1] VCCIO[51] VCCPNAND[3]
BD53 VCCADPLLB[2] VCC3_3[11] N36 BG28 VCCIO[52] VCCPNAND[4] AK19
+1.05VS 2 2 2 2
BH27 VCCIO[53] 0.156A VCCPNAND[5] AK15
AH23 VCCIO[21] VCC3_3[12] P36 VCCPNAND[6] AK13
2
AJ35 VCCIO[22] AN30 VCCIO[54] VCCPNAND[7] AM12
NAND / SPI
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
AH35 VCCIO[23] VCC3_3[13] U35 AN31 VCCIO[55] VCCPNAND[8] AM13

+3VS +3VS
C2 67
C2 68
C2 69
1 1 1 VCCPNAND[9] AM15
AF34 3.208A 0.1U_0402_16V4Z C2 71
VCCIO[2]
VCC3_3[14] AD13 1 2 1 2 AN35 VCC3_3[1]
AH34 C2 70 0.1U_0402_16V4Z
2 2 2 VCCIO[3]
R 303 1 2 0_0402_5% +3VM
AF32 VCCIO[4] T126 P AD
+1.8VS AT22 VCCVRM[1] 0.035A
VCCSATAPLL[1] AK3
1 2 +VCCSST V12 0.032A AK1 T127 P AD P AD T125 +1.05VS_VCCFDIPLL BJ18 6mA AM8
DCPSST VCCSATAPLL[2] VCCFDIPLL VCCME3_3[1]
0.1U_0402_16V4Z
0.1U_0402_16V4Z 6/22 AM9
VCCME3_3[2]
C2 75
FDI
C 272 +1.05VS AM23 0.085A AP11 1
VCCIO[1] VCCME3_3[3]
VCCME3_3[4] AP9
1 2 +V1.1A_INT_V CCSUS Y22
0.1U_0402_16V4Z DCPSUS
VCCIO[9] AH22
C 274 Don't need extra-power 2
C +3VALW P18 AT20 C
VCCSUS3_3[29] VCCVRM[4] +1.8VS
1 2 0. 2A@3.3V U19
SATA
VCCSUS3_3[30] +1.05VS
PCI/GPIO/LPC
0.1U_0402_16V4Z AH19
C 278 VCCIO[10]
U20 VCCSUS3_3[31]
VCCIO[11] AD20
1U_0402_6.3V4Z
U22 VCCSUS3_3[32]
C 279
VCCIO[12] AF22 1
+3VS +1.05VS
AD19 L10
0. 4A@3.3V VCCIO[13] +V1.05S_VCCA_A_DPL
1 2 V15 VCC3_3[5] VCCIO[14] AF20 1 2
0.1U_0402_16V4Z 2 10UH_LB2012T100MR_20%_0805
VCCIO[15] AF19 1
C 280 V16 AH20 1
VCC3_3[6] VCCIO[16] C 282 + C2 81
Y16 AB19 1U_0402_6.3V4Z 220U_B2_2.5VM_R15M
VCC3_3[7] VCCIO[17]
VCCIO[18] AB20
+ VCCP 2 2
VCCIO[19] AB22 <BOM Structure>
AD22 +1.05VM
0. 1A@1.1V VCCIO[20]
AT18 V_CPU_IO[1]
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
AA34 +PCH_VCC1_1_20 1 R3 05 2 0_0402_5%

CPU
VCCME[13] +5VALW +3VALW 0202 Change value +5VS +3VS

C2 84
C2 85
C2 86
1 1 1 >1mA Y34 +PCH_VCC1_1_21 1 R3 06 2 0_0402_5% L11

VCCME[14] +PCH_VCC1_1_22 R3 07 0_0402_5% +V1.05S_VCCA_B_DPL
AU18 V_CPU_IO[2] VCCME[15] Y35 1 2 1 2
AA35 +PCH_VCC1_1_23 1 R3 08 2 0_0402_5%
VCCME[16]
2
10UH_LB2012T100MR_20%_0805 1
2 2 2 R3 09 D2 R3 10 D3
1
RTC
R 311 1 2 0_0402_5% C 288 + C2 87

+R TCVCC
A12 VCCRTC 2mA 6mA VCCSUSHDA L30 +3VALW
HDA
1U_0402_6.3V4Z 220U_B2_2.5VM_R15M 100_0402_5% CH751H-40PT_SOD323-2 100_0402_5% CH751H-40PT_SOD323-2
1
2mA @3.3V IBEXPEAK-M_FCBGA1071 1
2 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C 289 IC H_V5REF_SUS ICH_V 5R EF_RUN

C2 90
C2 91
1 1 0202 Change value 20 mils 20 mils

1U_0402_6.3V4Z 1 1
D 2 C 292 C 293 D
1U_0402_6.3V4Z 1U_0603_6.3V6M
2 2
2 2

IBEX-M(5/6)-PWR
Cus t om L A-5251P 0 .9
1 2 3 4 5
WWW.AliSaler.Com
WWW.AliSaler.Com
1 2 3 4 5
U 7I U7H
AY7 VSS[159] VSS[259] H49 AB16 VSS[0]
B11 VSS[160] VSS[260] H5
B15 VSS[161] VSS[261] J24 AA19 VSS[1] VSS[80] AK30
B19 VSS[162] VSS[262] K11 AA20 VSS[2] VSS[81] AK31
B31 VSS[164] VSS[264] K47 AM19 VSS[4] VSS[83] AK34
B39 VSS[166] VSS[266] L14 AA26 VSS[6] VSS[85] AK38
A B7 L22 AA31 AK49 A
VSS[169] VSS[269] VSS[9] VSS[88]
BG12 VSS[170] VSS[270] L32 AA32 VSS[10] VSS[89] AK5
BB12 VSS[171] VSS[271] L36 AB11 VSS[11] VSS[90] AK8
BB16 VSS[172] VSS[272] L40 AB15 VSS[12] VSS[91] AL2
BB20 VSS[173] VSS[273] L52 AB23 VSS[13] VSS[92] AL52
BB24 VSS[174] VSS[274] M12 AB30 VSS[14] VSS[93] AM11
BB30 VSS[175] VSS[275] M16 AB31 VSS[15] VSS[94] BB44
BB34 VSS[176] VSS[276] M20 AB32 VSS[16] VSS[95] AD24
BB38 VSS[177] VSS[277] N38 AB39 VSS[17] VSS[96] AM20
BC10 VSS[181] VSS[281] M46 AB8 VSS[21] VSS[100] AM28
BC14 VSS[182] VSS[282] M49 AC2 VSS[22] VSS[101] BA42
BC18 VSS[183] VSS[283] M5 AC52 VSS[23] VSS[102] AM30
BC2 VSS[184] VSS[284] M8 AD11 VSS[24] VSS[103] AM31
BC22 VSS[185] VSS[285] N24 AD12 VSS[25] VSS[104] AM32
BC32 VSS[186] VSS[286] P11 AD16 VSS[26] VSS[105] AM34
BC36 VSS[187] VSS[287] AD15 AD23 VSS[27] VSS[106] AM35
BH9 VSS[191] VSS[291] P34 AD34 VSS[31] VSS[110] AU20
BD48 VSS[192] VSS[292] P42 AU22 VSS[32] VSS[111] AM46
BD49 VSS[193] VSS[293] P45 AD42 VSS[33] VSS[112] AV22
BD5 VSS[194] VSS[294] P47 AD46 VSS[34] VSS[113] AM49
BE12 VSS[195] VSS[295] R2 AD49 VSS[35] VSS[114] AM7
BE16 VSS[196] VSS[296] R52 AD7 VSS[36] VSS[115] AA50
BE20 VSS[197] VSS[297] T12 AE2 VSS[37] VSS[116] BB10
BE24 VSS[198] VSS[298] T41 AE4 VSS[38] VSS[117] AN32
BE30 VSS[199] VSS[299] T46 AF12 VSS[39] VSS[118] AN50
BE34 T49 Y13 AN52 +3VS
B VSS[200] VSS[300] VSS[40] VSS[119] B
BE38 VSS[201] VSS[301] T5 AH49 VSS[41] VSS[120] AP12
BE42 VSS[202] VSS[302] T8 AU4 VSS[42] VSS[121] AP42
BE46 VSS[203] VSS[303] U30 AF35 VSS[43] VSS[122] AP46
1
BE48 VSS[204] VSS[304] U31 AP13 VSS[44] VSS[123] AP49
BE50 U32 AN34 AP5 R3 12
VSS[205] VSS[305] VSS[45] VSS[124] CRACK_BGA 8,30
BE6 VSS[206] VSS[306] U34 AF45 VSS[46] VSS[125] AP8
6
BE8 P38 AF46 AR2 100K_0201_5%
VSS[207] VSS[307] VSS[47] VSS[126] Q10A
BF3 V11 AF49 AR52
2
VSS[208] VSS[308] VSS[48] VSS[127]
BF49 VSS[209] VSS[309] P16 AF5 VSS[49] VSS[128] AT11 2N7002DW-T/R7_SOT363-6
BF51 VSS[210] VSS[310] V19 AF8 VSS[50] VSS[129] BA12 15 P CH _NCTF6 2
BG18 VSS[211] VSS[311] V20 AG2 VSS[51] VSS[130] AH48
BG24 V22 AG52 AT32
1
VSS[212] VSS[312] VSS[52] VSS[131]
BG4 VSS[213] VSS[313] V30 AH11 VSS[53] VSS[132] AT36
BG50 V31 AH15 AT41 +3VS
VSS[214] VSS[314] VSS[54] VSS[133]
BH11 VSS[215] VSS[315] V32 AH16 VSS[55] VSS[134] AT47
BH15 VSS[216] VSS[316] V34 AH24 VSS[56] VSS[135] AT7
BH19 VSS[217] VSS[317] V35 AH32 VSS[57] VSS[136] AV12
1
BH23 V38 AV18 AV16 CRACK_BGA
VSS[218] VSS[318] VSS[58] VSS[137] R3 13
3
BH39 V46 AH7 AV30 100K_0201_5%
VSS[221] VSS[321] VSS[61] VSS[140] Q10B
BH43 V47 AJ19 AV34
2
VSS[222] VSS[322] VSS[62] VSS[141]
BH47 VSS[223] VSS[323] V49 AJ2 VSS[63] VSS[142] AV38 2N7002DW-T/R7_SOT363-6
BH7 VSS[224] VSS[324] V5 AJ20 VSS[64] VSS[143] AV42 15 P CH _NCTF7 5
C12 VSS[225] VSS[325] V7 AJ22 VSS[65] VSS[144] AV46
C50 V8 AJ23 AV49
4
VSS[226] VSS[326] VSS[66] VSS[145]
D51 VSS[227] VSS[327] W2 AJ26 VSS[67] VSS[146] AV5
E12 W52 AJ28 AV8 +3VS
VSS[228] VSS[328] VSS[68] VSS[147]
E16 VSS[229] VSS[329] Y11 AJ32 VSS[69] VSS[148] AW14
E20 VSS[230] VSS[330] Y12 AJ34 VSS[70] VSS[149] AW18
E24 VSS[231] VSS[331] Y15 AT5 VSS[71] VSS[150] AW2
1
E30 Y19 AJ4 BF9 CRACK_BGA
C VSS[232] VSS[332] VSS[72] VSS[151] R3 14 C
E34 VSS[233] VSS[333] Y23 AK12 VSS[73] VSS[152] AW32
E38 VSS[234] VSS[334] Y28 AM41 VSS[74] VSS[153] AW36
6
E42 Y30 AN19 AW40 100K_0201_5%
VSS[235] VSS[335] VSS[75] VSS[154] Q11A
E46 Y31 AK26 AW52
2
VSS[236] VSS[336] VSS[76] VSS[155]
E48 VSS[237] VSS[337] Y32 AK22 VSS[77] VSS[156] AY11 2N7002DW-T/R7_SOT363-6
E6 VSS[238] VSS[338] Y38 AK23 VSS[78] VSS[157] AY43 15 P CH _NCTF19 2
E8 VSS[239] VSS[339] Y43 AK28 VSS[79] VSS[158] AY47
F49 Y46
1
VSS[240] VSS[340] IBEXPEAK-M_FCBGA1071 +3VS
F5 VSS[241] VSS[341] P49
G10 VSS[242] VSS[342] Y5
G14 VSS[243] VSS[343] Y6
G18 VSS[244] VSS[344] Y8
1
G2 P24 CRACK_BGA
VSS[245] VSS[345] R3 15
G22 VSS[246] VSS[346] T43
G32 VSS[247] VSS[347] AD51
3
G36 AT8 100K_0201_5%
VSS[248] VSS[348] Q11B
G40 AD47
2
VSS[249] VSS[349]
G44 VSS[250] VSS[350] Y47 2N7002DW-T/R7_SOT363-6
G52 VSS[251] VSS[351] AT12 15 P CH _NCTF26 5
AF39 VSS[252] VSS[352] AM6
H16 AT13
4
VSS[253] VSS[353]
H20 VSS[254] VSS[354] AM5
H30 VSS[255] VSS[355] AK45
H34 VSS[256] VSS[356] AK39
H38 VSS[257] VSS[366] AV14
H42 VSS[258]
BGA Ball Cracking Prevention and Detection
D D

IBEX-M(6/6)-GND
Cus t om L A-5251P 0 .9
1 2 3 4 5
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1 2 3 4 5
CRT Connector
A A
+5VS +RC RT_VCC +C RTVDD

F1 D4
1.1A_6VDC_FUSE CH4 91D_SC59
1 2 2 1
W=40mils
1
+5VS +3VS C2 94
PREP#: DOCK --> L 0.1U_0402_16V4Z
PREP#: UNDOCK --> H 1 1
2
C 298 C 299 Place close to JCRT1 for EMI backup solution. J C RT1
U13 0.1U_0402_16V4Z 0.1U_0402_16V4Z

L 6
11
2 2 VGA_RED R 316 1 2 0_0402_5% V GA_RED_R 1
14 R E D_R RE D_R 3 8 7
GRE EN_R R0 MAX4885E VCC VGA_DDC_DA TA
14 GRE EN_R 4 G0 12
14 B L UE_R B LUE_R 5 9 V GA_GRN R 317 1 2 0_0402_5% V GA_GRN_R 2
B0 VL
8
29 DOCK _RED DOCK _RED 18 2 CRT_D DC_CLK CRT_ DDC_CLK 14 13
DOCK _GRN R1 SCL0 CR T_DDC_DATA VGA_BLUE R 318 1 VGA_BLUE_R
29 DOCK _ GRN 16 G1 SDA0 1 C RT_DDC_DATA 14 2 0_0402_5% 3
@ 10P_0402_50V8J
@ 10P_0402_50V8J
@ 10P_0402_50V8J
29 DO CK_BLU DO CK_BLU 14 9
B1
R3 22
R3 23
R3 24
75_0402_1%
75_0402_1%
75_0402_1%
20 D_DDCC LK D_DDCC LK 29 14 G 16
SCL1
C2 95
C2 96
C2 97
C3 21
C3 20
C3 15
VGA_RED 17 22 D_D DCDATA D_D DCDATA 29 1 1 1 1 1 1 4 17
R2 SDA1 G
V GA_GRN 15 10
VGA_BLUE G2 V G A_DDC_CLK V G A_DDC_CLK
13 B2 SCL2 19 15
B 21 VGA_DDC_DA TA +3VS 5 B
SDA2 2 2 2 2 2 2
@ 150_0402_1%
@ 150_0402_1%
@ 150_0402_1%
14 CRT_HS Y NC CRT_HS Y NC 6
2
CRT_ VSYNC H0 R3 19 1
14 CRT_V SYNC 7 V0 EN 23 2 10K_0402_5% S U YIN_070546FR015S233ZR
24 PRE P# PREP# 15,21,29 C ONN@
H S Y NC SEL
11 H1
V S Y NC 12 10
V1 GND
EP 25 11/27 update
MAX4885EETG+T_TQFN24_4X4 11/27 update
ESD design inside U13 already
L Place R325,R326,C300,C301 cloce to JP30 (Docking Conn.) D _ HS Y NC 29

+3VS H S Y NC R3 25 1 2 0_0603_5% D _ HS Y NC
D_V S Y NC 29
V S Y NC R3 26 1 2 0_0603_5% D_V S Y NC
1
R53 R57
1 1
2.2K_0402_5% 2.2K_0402_5%
C3 00 C 301
2
11/06 update 5P_0402_50V8C 5P_0402_50V8C

2 2
CRT_D DC_CLK
CR T_DDC_DATA
C C
D D

CRT Connector
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA -5251P 0 .9
1 2 3 4 5
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5 4 3 2 1
+3VS
+5VALW +5VALW 6/16 update
2
08/28 update R 332
2
100K_0201_5%
R3 42 R3 43 Q13A Q13B
10K_0201_5% 10K_0201_5% 2N7002DWH 2N SOT363-6 2N7002DWH 2N SOT363-6
1
DPD_CTRLDA TA 1 6 3 4 DPD_C_AUX#
D 14 DPD_CTRLDATA D
1
DP _EN D DC_E N
5
6
3
D DC_E N
Q16B
2N7002DWH 2N SOT363-6 Q14A Q14B
DC AD R3 46 1 2N7002DWH 2N SOT363-6
2 0_0201_5% 2 5 2N7002DWH 2N SOT363-6 2N7002DWH 2N SOT363-6
Q16A DP D_CTRLCLK 1 6 3 4 DPD_C_A UX
14 DP D_CTRLCLK
4
1
2
R 348 D DC_E N
1M_0402_5% R3 37
100K_0201_5%
2
6/16 update
1
+3VS
2
R3 38 DP _EN
@ 100K_0201_5%
2
1
DPD_A UX# 1 6 6 1
14 DPD_AUX#
06/18 update 2N7002DWH 2N SOT363-6 2N7002DW-7-F_SOT363-6

+3VS_DP_F +3VS_DP Q15A Q30A
DP _EN
0_0603_5% NANOSMDC050F 0.5A 13.2V POLY-FUSE
5
+3VS 1 2 2 1
C3 08
0.1U_0402_16V4Z
C3 09
10U_0805_10V4Z
C R3 49 F2 DPD_A UX 4 3 3 4 C
14 DPD_AUX
1 1
2N7002DWH 2N SOT363-6 2N7002DW-7-F_SOT363-6
2
Q15B Q30B
R3 44
2 2 @ 100K_0201_5%
1
J D P1 +5VS
14 DPD_TXP0 DPD_TXP0 1 LAN0+
2 LAN0_shield
14 DPD_TXN0 DPD_TXN0 3 LAN0-
5
14 DPD_TXP1 DPD_TXP1 4 LAN1+
5 LAN1_shield
14 DPD_TXN1 DPD_TXN1 6 DP D_H PD_R 3 4 DP D_H PD
LAN1- DP D_H PD 14
14 DPD_TXP2 DPD_TXP2 7 LAN2+ 2N7002DWH 2N SOT363-6
8 LAN2_shield GND 24
2
DPD_TXN2 9 23 Q46B
14 DPD_TXN2 LAN2- GND
14 DPD_TXP3 DPD_TXP3 10 22 R 1076
LAN3+ GND
11 LAN3_shield GND 21 100K_0402_5% 2 1
14 DPD_TXN3 DPD_TXN3 12
DC AD LAN3- R 1055 @
13
1
CA_DET 0_0402_5%
14 GND
B DPD_C_A UX 15 B
AUX_CH+
16 GND
1
DPD_C_AUX# 17
DP D_H PD_R AUX_CH-
18 HP_DET
R 351 19
5.1M_0402_5% RTN
20 DP_PWR
2
+3VS_DP MOLEX_105088-0001
C ONN@
A A

Display Port Connector
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA -5251P 0 .9
5 4 3 2 1
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DDI PANEL CONN.
Web camera POWER CIRCUIT

A A
I NVPWR_B+ L17 B+
HCB2012KF-121T50_0805 +5VS +5V_WEBCAM
L Close to JEDP1.24
1 2
1 1 R3 04 1 2 0_0603_5%
C 313 C3 14
47P_0402_50V8J
0.01U_0402_16V7K
0.1U_0402_16V4Z
4.7U_0805_10V4Z
+3VS +LCD VDD +LCD VDD +3VS I NVPWR_B+ @ 47P_0402_50V8J 680P_0402_50V7K
2 2
C3 16
C3 17
C3 18
C3 19
1 1 1 1
2
1 1 R3 76 @
C3 11 C3 12 2 2 2 2
06/16 update
1
C 310 0_0805_5% 07/03 update

680P_0402_50V7K @ 47P_0402_50V8J 680P_0402_50V7K
1
2 2 J EDP1
2
2 1 M B_DP_AUXP
4 3 MB_DP_AUXP 5
MB_DP_AUXN MB_DP_AUXN 5
6 5
8 7
10 9 MB_DP_DATA0_P 5
12 11 MB_DP_DATA0_N 5
15 ALS_EN# R 374 2 1 0_0402_5%
INV_PWM 14 13
14 INV_PWM 16 15
15 WEBCAM_ON WEBCAM_ON R 375 2 1 WEBCAM_ON_R
0_0402_5% 18 17
+5V_KL 20 19
2 1 D ISP_OFF#
R3 58 0_0402_5% 22 21
4 WCM-2012-900T_4P
+5V_WEBCAM
USB20_P12_R
24
26
23
25 LCD POWER CIRCUIT
15 USB20_P12 4 3 3 USB20_N12_R 28 27 MB_HPD
30 29 1 2 MB_DP_HPD 5
B R 365 0_0402_5% +LCDV DD B
15 USB20_N12 1 1 L18 2 2 32 31
@ INV_PWM
1
2 1 C ONN@ ACES_88242-3001_30P
R3 59 0_0402_5% R3 69 +LCD VDD +3VS
1
100_0201_1% Q19
R 372 1 3 SI2301CDS-T1-GE3 1P SOT23-3
S
3 2
22_0402_5%
G
2
2
6
11/11 update 47K_0402_5% R3 70 1 2 1M_0402_5%
1 R 371
C 665 +3VS 5 1 2 1 2
2 Q18B C3 22 0.1U_0402_16V4Z
220P_0402_25V Q18A 2N7002DW-T/R7_SOT363-6 1 1 1
4
2
2 2N7002DW-T/R7_SOT363-6 C 323 C3 24
1
R5 69 0.1U_0402_16V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z
@ C 325
OUT
100K_0402_5% 2 2 2
1
MB_DP_AUXN 14 E NA VDD 2
M B_DP_AUXP WEBCAM_ON_R IN Q20
GND
DTC124EKAT146_SC59-3
D12
1
2
USB20_N12_R 2 3 USB20_P12_R R 377
3
CH1 CH2
2
R6 16 100K_0402_1%
R6 13
1 4 +5VS 100K_0402_5%
2
VN VP 100K_0402_5%
1
@ CM1213-02SR_SOT143-4
1
C
06/16 update C
Keyboard Light circuit +3VALW
Q78 L Place R366 close to Q56.

09/28 update @ SI2301CDS-T1-GE3 1P SOT23-3 +5V_KL +5VS +5VS
1
S
B+ 3 1 I NVPWR_B+
10K_0402_5%
Q23 R3 61
1
2
SI2301CDS-T1-GE3 1P SOT23-3
1
R 149
R 1105 C9 75 R 366 100K_0402_5%
G
2
1 LI D_SW#
S
3 6 1 1 2 LID_SW#_ISO# 13
2
@ 220K_0402_5% @ 0_0402_5%
2
2N7002DWH 2N SOT363-6
2
2
1
5
Q56A 08/25 update
G
2
@ 0.22U_0603_25V7K C 976 +3VS
1
@ 1U_0603_25V7K 3 4
2
R 1106 D57
1
2N7002DWH 2N SOT363-6 D ISP_OFF# 2 1 LI D_SW# LI D_SW# 28,30
@ 100K_0402_1% R3 56 Q56B
@ 10K_0402_5%
2
CH751H-40PT_SOD323-2
R3 62
2
D ISP_OFF# 1 2 ENABLT ENABLT 14
1
1 2K_0402_5%
C3 26 R3 57
680P_0402_50V7K 100K_0402_1%
2
2
D D

LCD CONN & Q-Switch & GPIO Ext.
1 2 3 4 5
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+1.0VM_LAN +1.05VM_LAN
+3VM +3VM_LAN R3 85
R 382 0_0603_5%
0_0603_5% 1 2
1 2
1 1 1 1 1
C3 34 C3 35 C41
C3 27 C3 28 +
0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 330U_B2_2VM_R15M
2
10U_0805_10V4Z
A 10U_0805_6.3V6M A
04/20 Cancel +1.0VM_LAN from +3VM reserve

circuit for LAN Layout Placement issue improve.
05/06 Install C41(330U_2V_B2_15mR) by HP request.
07/01 update
13 CLK_PCIE_LAN_REQ1# R4 07 1 2 0_0402_5%
U14
R3 88 1 2 @0_0201_5% 48 13 LAN_MDI0P
15 CLK_PCIE_LAN_REQ# CLK_REQ_N MDI_PLUS0
4,12,15,22,23,31 PLT_RST# R3 89 1 2 PLT_RST#_LAN 36 14 L AN_MDI0N
0_0201_5% PE_RST_N MDI_MINUS0
15 CLK_PCIE_LAN 44 17 LAN_MDI1P
PE_CLKP MDI_PLUS1 L AN_MDI1N L AN_DIS#
15 CLK_PCIE_LAN# 45 18
PCIE
PE_CLKN MDI_MINUS1
MDI
0.1U_0402_16V7K
2
C3 36 1 2 PCIE_PRX_C_DTX_P6 38 20 LAN_MDI2P
13 PCIE_PRX_DTX_P6 PETp MDI_PLUS2
C3 37 1 2 PCIE_PRX_C_DTX_N6 39 21 L AN_MDI2N
13 PCIE_PRX_DTX_N6 PETn MDI_MINUS2 LA NLINK_R# R 262 1 2 6 1 LANLINK _STATUS#
13 PCIE_PTX_C_DRX_P6 0.1U_0402_16V7K 41 23 LAN_MDI3P 0_0201_5%
PERp MDI_PLUS3 L AN_MDI3N
13 PCIE_PTX_C_DRX_N6 42 PERn MDI_MINUS3 24 Q9A
0_0201_5% 2N7002DW T/R7_SOT-363-6
R3 90 1 2 LAN_S M_CLK 28 6
SMBUS
13 SML0CLK SMB_CLK VCT
R3 91 1 2 LAN_SM_DAT 31
13 SML0DATA SMB_DATA
0_0201_5% 1 R3 92 1 2 3.01K_0402_1% +3VM_LAN
RSVD_VCC3P3_1 R3 93 1
RSVD_VCC3P3_2 2 2 3.01K_0402_1%
5 +3VM_LAN +3VM_LAN_LED
R3 94 1 LA N_P HYPC_R VDD3P3_IN
15 L AN_DIS# 2 3 LAN_DISABLE_N
0_0201_5% 4 +3.3V M_LAN_OUT
B VDD3P3_OUT B
1
D
15 +3.3VM_LAN_OUT_R 1 2 C 338 3 1
R2 61 1 LANLINK _STATUS# VDD3P3_15 R 395 0_0603_5%
15,30 LA NLINK_R# 2 26 LED0 VDD3P3_19 19
1
@0_0201_5% LAN_A CT# 27 29 1U_0603_10V4Z Q 22
LED
LED1 VDD3P3_29 2 SI2301CDS-T1-GE3 1P SOT23-3

25
G
2
LED2 R 397
47 1 2 100K_0402_5%
VDD1P0_47 R 396 0_0603_5%
46
2
VDD1P0_46
P AD T85 32 JTAG_TDI VDD1P0_37 37
@ 10K_0201_5% P AD T86 34
JTAG
JTAG_TDO
3
+3VM_LAN R3 98 1 2 LAN_JTAG_TMS 33 43 +1.0VM_LAN3 1 2 +1.0VM_LAN
R4 00 1 LAN_J TAG_TCK JTAG_TMS VDD1P0_43 R 399 0_0603_5%
2 35 JTAG_TCK
@10K_0201_5% VDD1P0_11 11 +1.0VM_LAN2 1 2 Q9B
10P_0402_50V8J R 401 0_0603_5% 15,18,29 PREP# 5 2N7002DW T/R7_SOT-363-6
XTAL1 9 40
C 411 XTAL_OUT VDD1P0_40
XTAL2 10 22
4
XTAL1_C XTAL1 XTAL_IN VDD1P0_22
2 1 VDD1P0_16 16
VDD1P0_8 8 1 2
25MHZ_20PF_7A25000012 1 2 30 R 402 0_0603_5%
R4 03 1K_0201_5% TEST_EN
Y4
1 2 XTAL2 1 2 12 7 LAN_CTRL_10 T115 P AD
R4 04 3.01K_0402_1% RBIAS CTRL_1P0
2 2 VSS_EPAD 49 04/20 Test Point reserve.
C3 41 C3 42 WG82577LM QLMG A3 QFN 48P
33P_0402_50V8J 33P_0402_50V8J +3VM_LAN 11/03 update
1 1 M/E Design change
10/01 update DC234003O00(TYCO_2006067-1_13P) to
1
TAIMAG IH-037-2 T47 10K_0402_5% DC020910201(FOX_JM36111-R2225-7H_13P-T)
L AN_MDI0N 12 13 MDO0- R4 05
TD4- MX4- MDO0- 29
J RJ 45
C C
04/25 Delete TRM_CT,R407,R408. leave U14-6 NC. +3VM_LAN_LED 11
2
Yellow LED+
Add 1uF C339 decoupling cap to TRM_CTR. 29 LAN_ACT#
LAN_A CT# R 406 1 2 300_0603_5% 12 Yellow LED-
LAN_MDI0P 11 14 MDO0+ R 409 2 13
TD4+ 1:1 MX4+ MDO0+ 29 DETECT PIN1
75_0402_1% MDO3- 8
TRM_CTR M CT0 C3 47 1 C3 45 @ PR4-
1 2 10 TCT4 MCT4 15 2 1 2
C3 46 0.1U_0402_16V7K 0.01U_0402_50V7K 680P_0402_50V7K MDO3+ 7
L AN_MDI1N MDO1- 1 PR4+
9 TD3- MX3- 16 MDO1- 29
MDO1- 6 PR2-
MDO2- 5 PR3-
LAN_MDI1P 8 17 MDO1+ R 412 MDO2+ 4
TD3+ 1:1 MX3+ MDO1+ 29 +3VM_LAN PR3+
75_0402_1%
1 2 TRM_CTR 7 18 M CT1 C3 50 1 2 1 2 MDO1+ 3
C3 49 0.1U_0402_16V7K TCT3 MCT3 0.01U_0402_50V7K PR2+
1
L AN_MDI2N 6 19 MDO2- MDO0- 2
TD2- MX2- MDO2- 29 PR1-
R 410 MDO0+ 1 14
10K_0402_5% PR1+ SHLD1
SHLD1 15
+3VM_LAN_LED 9
2
LAN_MDI2P MDO2+ R 413 Green LED+
5 TD2+ 1:1 MX2+ 20 MDO2+ 29
75_0402_1% LANLINK _STATUS# R4 11 1 2 300_0603_5% 10
29 LANLINK_STATUS# Green LED-
1 2 TRM_CTR 4 21 M CT2 C3 53 1 2 1 2 2
C3 52 0.1U_0402_16V7K TCT2 MCT2 0.01U_0402_50V7K FOX_JM36111-R2225-7H
L AN_MDI3N 3 22 MDO3- C 351 @ CONN@
TD1- MX1- MDO3- 29
680P_0402_50V7K
1
2
LAN_MDI3P 2 23 MDO3+ R4 14 D13
TD1+ 1:1 MX1+ MDO3+ 29
75_0402_1% PJSOT05C_SOT23-3
D 1 2 TRM_CTR 1 24 M CT3 C3 55 1 2 1 2 D
C3 54 0.1U_0402_16V7K TCT1 MCT1 0.01U_0402_50V7K @
1 1
1
C 339 C 348
1U_0603_10V4Z 1000P_1808_3KV7K
2 2

Intel 82566 Nineveh
1 2 3 4 5
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B+_DEBUG_R R4 53 1 2 0_0402_5% B+_DEBUG 07/01 update

P CI _SERR#_R R4 33 1 2 @ 0_0201_5% P C I_SERR# P C I_SERR# 15,25,30,31
W W _ LED# R4 37 1 2 @ 0_0201_5% S I RQ S I RQ 12,25,30,31
8051RX_R R4 32 1 2 @ 0_0201_5% 8051RX 8051RX 30,31
8051TX_R R4 21 1 2 @ 0_0201_5% 8051TX 8051TX 30,31
DEBUG_KBCRST_R R4 31 1 2 @ 0_0201_5% DEBUG_KBCRST DEBUG_KBCRST 31,36
+3V_WLAN +1.5VS 8051_RECOVER#_R R4 41 1 2 @ 0_0201_5% 8051_RECOV ER#
+3V_WLAN 8051_RECOVER# 30,31
39P_0402_50V8J DEG_FRA ME# R4 15 1 2 0_0201_5% LPC_LFRAME# 12,30,31

0.01U_0402_16V7K
0.1U_0402_16V4Z
4.7U_0805_10V4Z
0.01U_0402_16V7K
0.1U_0402_16V4Z
4.7U_0805_10V4Z
D EBUG_AD3 R4 16 1 2 0_0201_5% LPC_LAD3 LPC_LAD3 12,30,31
C3 56
C3 57
C3 58
C3 59
C3 60
C3 61
1 1 1 1 1 1 1 1 D EBUG_AD2 R4 17 1 2 0_0201_5% LPC_LAD2 LPC_LAD2 12,30,31
D EBUG_AD1 R4 18 1 2 0_0201_5% LPC_LAD1 LPC_LAD1 12,30,31
A C6 29 C4 43 D EBUG_AD0 R4 19 1 2 0_0201_5% LPC_LAD0 A
LPC_LAD0 12,30,31
@ @
2 2 2 2 2 2 2 2 PCI_RST#_R R4 20 0_0201_5%
1 2 PCI_RST# 15,25
W W _ LED# R4 75 1 2 0_0201_5% W L_LED#
39P_0402_50V8J
+3V_WLAN
JP6
PCIE_WA KE# 1 2
14,23 PCIE_WAKE# 1 2
8051_RECOVER#_R 3 4
DEBUG_KBCRST_R 3 4
5 5 6 6 +1.5VS
7 8 DEG_FRA ME#
+3VALW 13 C LKREQ_WLAN# 7 8
9 10 D EBUG_AD3
@ 0.1U_0402_10V6K CLK_PCIE_MCARD# 9 10 D EBUG_AD2
13 CLK_PCIE_MCARD# 11 11 12 12
13 CLK_PCIE_MCARD CLK_PCIE_MCARD 13 14 D EBUG_AD1
13 14 D EBUG_AD0
15 15 16 16
1
07/01 update R 422 C 362

1
10/19 update L Close to C443 R4 77 PCI_RST#_R 17 17 18 18
@ 10K_0201_5% 15,31 C LK_PCI_DB 1 2 C LK_PCI_DEBUG 19 20 XMIT_D_OFF#
2 Q24 0_0402_5% 19 20
21 22 PLT_RST# 4,12,15,21,23,31
2
21 22
3
SI2305DS-T1-E3_SOT23-3
13 PCIE_PRX_DTX_N4
R4 23 1 2 0_0201_5% PCIE_PRX_DTX_N4_R 23 23 24 24
30 MC2_DISABLE 1 R4 25 2 2 13 PCIE_PRX_DTX_P4
R4 24 1 2 0_0201_5% PCIE_PRX_DTX_P4_R 25 25 26 26
220K_0402_1% +3V_WLAN 27 28
27 28 8051TX_R
29 29 30 30
13 PCIE_PTX_C_DRX_N4 31 32 8051RX_R
31 32
13 PCIE_PTX_C_DRX_P4 33 34
1
33 34
1 2 35 35 36 36
R 119 0_0603_5% +3V_WLAN 37 37 38 38 10/13 update
39 39 40 40
41 42 W W _ LED#
41 42 W L_LED#
43 43 44 44 W L_LED# 28
B XMIT_D_OFF# 2 1 C L_CLK1 R4 26 2 1 0_0201_5% C L_CLK1-R 45 46 P CI _SERR#_R B
WLAN_TRANSMIT_OFF# 15 13 C L_CLK1 45 46
D14 CH751H-40PT_SOD323-2 CL_DA TA1 R4 27 2 1 0_0201_5% CL_DATA 1-R 47 48
13 CL_DATA1 CL_RST#1 R4 28 47 48
13 CL_RST1# 2 1 0_0201_5% CL_RST1#-R 49 49 50 50
B+_DEBUG_R 51 51 52 52
G1
G2
G3
G3
C LK_PCI_DEBUG
FOX_AS0B226-S99N-7F
53
54
55
56
1 C ONN@
@ C 539
12P_0402_50V8J
2
06/25 Del JHDD1 and JHDD2 Cable design. Add JHDD3 B to B directly connect design.
J H DD3 J ODD1
C 1 +5VS C
GND SATA_PTX_C_DRX_P0 0.01U_0402_16V7K 1
A+ 2 2 C3 65 SATA_PTX_DRX_P0
SATA_PTX_DRX_P0 12 GND 1
3 SA TA_PTX_C_DRX_N0 0.01U_0402_16V7K 1 2 C3 67 SATA_PTX_DRX_N0 2 SATA_PTX_C_DRX_P1 0.01U_0402_16V7K 1 2 C3 63 SATA_PTX_DRX_P1
A- SATA_PTX_DRX_N0 12 A+ SATA_PTX_DRX_P1 12
0.1U_0402_16V4Z
10U_0805_10V4Z
10U_0805_10V4Z
4 3 SA TA_PTX_C_DRX_N1 0.01U_0402_16V7K 1 2 C3 64 SATA_PTX_DRX_N1
GND A- SATA_PTX_DRX_N1 12
C3 76
1U_0603_10V4Z
C3 77
C3 78
C3 79
5 SA TA_PRX_C_DTX_N0 0.01U_0402_16V7K 1 2 C3 69 SATA_PRX_DTX_N0 4 1 1 1 1
B- SATA_PRX_DTX_N0 12 GND
6 SATA_PRX_C_DTX_P0 0.01U_0402_16V7K 1 2 C3 70 SATA_PRX_DTX_P0 5 SA TA_PRX_C_DTX_N1 0.01U_0402_16V7K 1 2 C3 66 SATA_PRX_DTX_N1
B+ SATA_PRX_DTX_P0 12 B- SATA_PRX_DTX_N1 12
7 6 SATA_PRX_C_DTX_P1 0.01U_0402_16V7K 1 2 C3 68 SATA_PRX_DTX_P1
GND B+ SATA_PRX_DTX_P1 12
GND 7
2 2 2 2
V33 8 +3VS
9 8 R 429 1 @ 2 0_0201_5%
V33 +3VS DP ODD_DET# 15
GND 10 V5 9
GND 11 V5 10 +5VS 1
12 0.1U_0402_16V4Z 0.1U_0402_16V4Z 11 C 371 @
V5 MD 0.1U_0402_16V4Z
V5 13 1 1 1 1 GND 12
17 14 C 372 C3 73 C3 74 C 375 13
GND R GND 2
18 GND Rsv1 15
19 16 C ONN@TYCO_2023233-3_NR
GND Rsv2 2 2 2 2
CONN@ FOX_LM25163-BA01-9H 10U_0805_10V4Z 0.1U_0402_16V4Z 7/1 Update JODD1 PCB Footprint from ALLTO_C18522-11303-L_13P_NR to TYCO_2023233-3_13P_NR
D D

WLAN/ODD/HDD
1 2 3 4 5
WWW.AliSaler.Com
D16
15,28 WWAN_TRANSMIT_OFF# 1 2 M_WXMIT_OFF#
J P8
1 2 + 3V_WWAN CH751H-40PT_SOD323-2
1 2
3 3 4 4
5 6 JEXP1
5 6 UI M_PWR +3VALW
7 7 8 8
UIM_DATA
07/02 update L Place C933 between R1077.1 and R1079.2 for limit inrush current. R4 35 1
1 GND
9 9 10 10 15 USB20_N4 2 0_0201_5% U SB20_N4_R 2 USB_D-
11 12 UIM_CLK 15 USB20_P4 R4 36 1 2 0_0201_5% USB20_P 4_R 3
11 12 UIM_RST NC_C P# USB_D+
13 13 14 14 4 CPUSB#
1
15 16 UIM _VPP 1 5
15 16 R 1077 C9 33 RSV
PAD T88 17 17 18 18
M_WXMIT_OFF#
09/11 update 6 RSV
PAD T89 19 19 20 20 7 SMB_CLK
2
A 21 22 @ 10K_0402_5% 1000P_0402_50V7K 8 A
21 22 2 J3 R4 39 SMB_DATA
23 24 +1.5VS_PEC 9
2
23 24 +1.5V
3
25 26 W WAN_DET# W WAN_DET# 15 PAD-OPEN 4x4m 0_0201_5% 10
25 26 +1.5VS_PEC +1.5V
27 28 30 MC1_DISABLE 1 2 2 14,22 PCIE_WAKE# PCIE_WA KE# 1 2 PCIE_WAKE#_R 11
27 28 R 1079 220K_0402_1% + 3V_WWAN WAKE#
29 29 30 30 +3V_PEC 12 +3.3VAUX
31 32 PE RST# 13
1
31 32 PERST#
33 33 34 34 +3VS_PEC 14 +3.3V
35 36 USB20_N9 15 Q77 R 1080 15
1
35 36 SI2305DS-T1-E3_SOT23-3 CLK REQ_EXP# +3.3V
37 37 38 38 USB20_P9 15 2 1 13 CLKREQ_EXP# 16 CLKREQ#
39 40 0_0805_5% CPP E# 17
39 40 W W _ LED# CLK_P CIE_EXP# CPPE#
+ 3V_WWAN 41 41 42 42 W W _ LED# 28 13 CLK_PCIE_EXP# 18 REFCLK-
43 44 13 CLK_PCIE_EXP CLK_PCIE_EXP 19
43 44 REFCLK+
45 45 46 46 20 GND
47 48 PCIE _PRX_DTX_N2 C 403 1 2 0.1U_0402_16V7K PCIE_PRX_DTX_N2_R 21
47 48 13 PCIE_PRX_DTX_N2 PERn0
49 50 PCIE_PRX_DTX_P2 C 404 1 2 0.1U_0402_16V7K PCIE_PRX_DTX_P2_R 22
49 50 13 PCIE_PRX_DTX_P2 PERp0
PAD T90 51 51 52 52 23 GND
13 PCIE_PTX_C_DRX_N2 PCIE_PTX_C_DRX_N2 24
S DIO(BR) NUP4301MR6T1 TSOP-6 PCIE_PTX_C_DRX_P2 PETn0
53 GND1 GND2 54 13 PCIE_PTX_C_DRX_P2 25 PETp0
U15 @ 26
MOLEX_67910-5700 GND
1 CH1 CH4 6
CONN@
2 Vn Vp 5 + 3V_WWAN 27 GND GND 29
+ 3V_WWAN 28 30
GND GND
3 CH2 CH3 4
SANTA_130853-1_RT
DAN217T146_SC59-3 C ONN@
+ 3V_WWAN JP10 3
+3V_WWAN 4 1 UI M_PWR 1
0.01U_0402_16V7K UIM _VPP GND VCC UIM_RST
5 VPP RST 2 2
@ 39P_0402_50V8J UIM_DATA 6 3 UIM_CLK +1.5VS
I/O CLK D15 @ U17
1 1 1 7 DET 1
+3VS_PEC +3V_PEC
C 385
18P_0402_50V8J
1 1 C3 88 C3 89 C 390 C 394 2 1 0.1U_0402_16V4Z 12 11 +1.5VS_PEC
B C3 91 C3 92 1.5Vin 1.5Vout B
14 NC NC 13
4.7U_0805_10V4Z
0.1U_0402_16V4Z
4.7U_0805_10V4Z @
2 2 2 2 +3VS
C3 86
C3 87
@ 39P_0402_50V8J 8 1 1
2 2 GND
0.1U_0402_16V7K
4.7U_0805_10V4Z
0.1U_0402_16V7K
4.7U_0805_10V4Z
9 C 399 2 1 0.1U_0402_16V4Z 2 3 +3VS_PEC
GND 3.3Vin 3.3Vout
C 395
C 396
C 397
C 398
0.1U_0402_16V4Z 4 5 1 1 1 1
R4 34 C 400 2 NC NC
1 0.1U_0402_16V4Z
2 2
+3VALW 17 AUX_IN AUX_OUT 15 +3V_PEC
@ 47K_0402_5%
P LT_RST# 2 2 2 2
4,12,15,21,22,31 PLT_RST# 6 19
2
SANTA_135306-3 C ONN@ SYSRST# OC#
UI M_PWR +3VALW R 440 2 1 100K_0201_5% 20 8 PE RST#
SHDN# PERST#
14,29,30,32,33,35,37,38 SLP_S3# 1 STBY# NC 16
15 CPPE# CPP E# 10 7
CPPE# GND +1.5VS_PEC
NC_C P# 9 CPUSB#
GND 21
18 RCLKEN
0.1U_0402_16V7K
4.7U_0805_10V4Z
+3V_NVRAM +V_NVRAM_VCCQ
C4 01
C4 02
R5 61 1 2@ 0_0603_5% +3VS TPS2231MRGPR-2 QFN 20P 1 1
+3VS R5 67 1 2@ 0_0603_5% R5 62 1 2 0_0603_5% +1.8VS

Nee d Keep 2 2
C 571
1 1
C5 66
08/28 update
+
40
41
42
38
39
78
1
2
3
JP11 @ 22U_0805_6.3VAM
@ 100U_B2_6.3VM_R45M 2
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCCQ_1
VCCQ_2
VCCQ_3
2
C C
15 NV _DQ0 6 9 TP_NV_DOS_0# T91 P A D

DQ0 DOS_0#
15 NV _DQ1 7 DQ1 DOS_0 10 NV_DQS0 15
15 NV _DQ2 45 31 TP_NV_DOS_1# T92 P A D
DQ2 DOS_1#
15 NV _DQ3 46 DQ3 DOS_1 32 NV_DQS1 15
15 NV _DQ4 12 DQ4
15 NV _DQ5 13 15 TP_NV_RFU_1 T93 PAD
DQ5 RFU_1 TP_NV_RFU_2
15 NV _DQ6 51 DQ6 RFU_2 16 T94 PAD
15 NV _DQ7 52 63 TP_NV_RFU_3 T95 PAD
DQ7 RFU_3 TP_NV_RFU_4
15 NV _DQ8 28 DQ8 RFU_4 64 T96 PAD
15 NV _DQ9 29 DQ9
15 N V_DQ10 67 DQ10 CE_0# 24
15 N V_DQ11 68 25 N V_CE0# NV_CE0# 15
DQ11 CE_2#
15 N V_DQ12 34 DQ12 CE_1# 22
15 N V_DQ13 35 61 N V_CE1# NV_CE1# 15
DQ13 CE_3#
15 N V_DQ14 73 DQ14 CE_4# 4
15 N V_DQ15 74 43 N V_CE2# NV_CE2# 15
DQ15 CE_6#
CE_5# 37
76 N V_CE3# NV_CE3# 15
CE_7#
15 N V_CLE N V_CLE 18 48 TP_NV_CK_0# T97 P A D

CLE_0 CK_0#
57 CLE_1 CK_0/WE_0# 49 NV_WE#_CK0 15
15 NV_ALE NV_A LE 19 70 TP_NV_CK_1# T98 P A D
ALE_0 CK_1#
58 ALE_1 CK_1/WE_1# 71 NV_WE#_CK1 15
R/B# 54 N V_RB# 15
15 NV _RE#_WR#1 60 55 TP_NV _WP0# T99 P A D
W/R_1#/RE_1# WP#
15 NV _RE#_WR#0 21 W/R_0#/RE_0#
77 TP_NV_VREF T100 P A D
VREF
D 5 44 D
VSS_1 VSS_13
8 VSS_2 VSS_14 47
11 VSS_3 VSS_15 50
14 VSS_4 VSS_16 53
12 NAND_DETECT# NAND_DETECT# 17 56
VSS_5 VSS_17
20 VSS_6 VSS_18 59
23 VSS_7 VSS_19 62
26 65
27
VSS_8
VSS_9
VSS_20
VSS_21 66
30 VSS_10 VSS_22 69 Issued Date 2008/09/15 Deciphered Date 2010/12/31 Title
33 72
36
VSS_11
VSS_12
VSS_23
VSS_24 75 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
WWAN/NAND
@ NVRAM Connector DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS L A-5251P 0 .9
1 2 3 4 5
WWW.AliSaler.Com
Rear side USB conn. R 352 1 2 0_0402_5% 06/18 update

07/17 update USB20_P0 1 2 USB20_L_P0
15 USB20_P0 1 2
+5VALW (2A,100mils ,Via NO.=4)
U18 +USB_VCCA USB20_N0 4 4 USB20_L_N0
15 USB20_N0 3 3
L8 @ WCM-2012-900T_4P
1 GND OUT 8
2 7 220U_6.3V_M 1000P_0402_50V7K R 350 1 2 0_0402_5%
IN OUT
1 3 IN OUT 6 1
C4 05 4 5 1 1 R 354 1 2 0_0402_5%
EN# OC# C4 06 + C4 07 C4 08 JP13
4.7U_0805_10V4Z G547F1P81U MSOP 8P 14 13 USB20_P2 1 2 USB20_L_P2
A 2 G6 G5 15 USB20_P2 1 2 A
12 G4 G3 11
2 2 2
R 442 10 G2 G1 9
USB20_N2 4 4 USB20_L_N2
14,29,33,39 SLP_S4#
0.1U_0402_16V4Z
15 USB20_N2 3 3
L9 @ WCM-2012-900T_4P
+5VALW 1 2 4 VSS VSS 8
USB20_L_N0 3 7 USB20_L_N2 R 353 1 2 0_0402_5%
10K_0201_5% USB20_L_P0 D0+ D1+ USB20_L_P2
10/13 update 2 D0- D1- 6
R 360 1
1 VCC VCC 5 2 0_0402_5% R 443 1 2 0_0402_5%
D 19 D18
C ONN@ USB20_N1 1 2 USB20_L_N1 USB20_P8 1 2 USB20_P 8_R
15 USB20_N1 1 2 15 USB20_P8 1 2
USB20_L_N0 2 3 USB20_L_P0 USB20_L_N2 2 3 USB20_L_P2 S UYIN_020122GR008S51CZL
CH1 CH2 CH1 CH2
09/01 update USB20_P1 USB20_L_P1 USB20_N8 U SB20_N8_R
15 USB20_P1 4 4 3 3 15 USB20_N8 4 4 3 3
1 4 +5VALW 1 4 +5VALW L19 @ WCM-2012-900T_4P L26 @ WCM-2012-900T_4P
VN VP VN VP R 355 1
Need Correct the Symbol and 2 0_0402_5% R 444 1 2 0_0402_5%
@ CM1213-02SR_SOT143-4 @ CM1213-02SR_SOT143-4 L reverse the connection.
USB+power conn.(Left Side)-debug port

+5VALW +5VALW
BT Connector
JP12 +3VALW SI2301CDS-T1-GE3 1P SOT23-3 +3VAUX_BT
2
2
1 +3VAUX_BT Q26
1
S
C5 04 R4 45 R 501 3
D
2 1
B 100K_0402_5% 100K_0402_5% USB20_P 8_R B
4.7U_0805_10V4Z 3 U SB20_N8_R
4
1
2 R1 35
G
BT_LED 28 1 1 1
1
2
U33 5 R4 46 C5 06 C4 09 C 410
1 8 +U SB_VCCC C ONN@ ACES_87212-05G0_5P 470_0402_5%
R11 GND OC1#
2 7 JP14 CONN@ 10K_0201_5% @ 0.1U_0402_16V4Z 10U_0805_10V4Z
SLP_S 4_R IN OUT1 0.1U_0402_16V4Z 2 2 2
14,29,33,39 SLP_S4# 1 2 3 6 1
2
EN1# OUT2 1
3
4 5 1 USB20_L_N1 2 R 447 Q55B 0.1U_0402_16V4Z
470K_0402_5% EN2# OC2# USB20_L_P1 2
1 1 1 3 3 15 BT_OFF 1 2
C7 G546A1P1UF_SO8 + 4 USB20_N8 USB20_P8
4
3
2.5A normal with 3.0A Max Peak(1ms) C 416 C 417 C 418 5 220K_0402_1% 5
0.01U_0402_16V7K GND
2 150U_B2_6.3VM_R35M 2 2 2
6 GND 09/21 update
7
4
GND 2N7002DWH 2N SOT363-6
11/03 update 1000P_0402_50V7K
8 GND D17
Close to U33 pin3 and pin4 SUYIN_020173MR004S582ZL
L D20
@ PJDLC05_SOT23-3
USB20_L_N1 2 3 USB20_L_P1
1
CH1 CH2
1 VN VP 4 +5VALW
@ CM1213-02SR_SOT143-4
ACCELEROMETER +3VS_ACL
C C
0.1U_0402_16V4Z
10U_0805_6.3V6M
+3VS +3VS_ACL +3VS_ACL_IO
C 419
C 420
1 1
R4 49
Left side USB conn.(Extra-USB) JP15
0_0603_5%
C ONN@ 1 2
2 2
1 GND
07/17 update 2 U21
15 USB20_N3 A+
+5VALW
(2A,100mils ,Via NO.=4) 15 USB20_P3 3 A- LIS302DL
4 GND
U20 +USB_VCCB 5 1
B- +3VS_ACL_IO VDD_IO
1 GND OUT 8 6 B+ +3VS_ACL 6 VDD GND 2
2 IN OUT 7 7 GND GND 4
1 3 IN OUT 6 15 ACCEL_INT# 8 INT 1 GND 5
C4 15 4 5 9 10
EN# OC# +USB_VCCB INT 2 GND
1 1 8 DP
4.7U_0805_10V4Z G547F1P81U MSOP 8P 9 12
2 C 620 1000P_0402_50V7K V5 SDO
10 V5 4,9,10,11,13 SMB_DATA_S3 13 SDA / SDI / SDO
R4 48 11 MD 4,9,10,11,13 SMB_CLK_S3 14 SCL / SPC
2 2 C 621 12 GND RSVD 3 +3VS_ACL
+5VALW 1 2 13 +3VS_ACL R4 50 2 1 10K_0201_5% 7 11
0.1U_0402_16V4Z GND CS RSVD
10K_0201_5% P-TWO_121057-13251_13P_NR-T HP302DLTR8_LGA14_3X5
SLP_S4#
<BOM Structure>
D D

USB & BT Connector & Acclerometer
1 2 3 4 5
WWW.AliSaler.Com
+3VS
C 426
1 2 R5C832XI + 3V_PHY
10U_0805_10V4Z
U22 L20
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
15 P C I_AD[0..31]
C4 21
C4 22
C4 23
C4 24
C4 25
P CI_AD31 121 6 1 1 1 1 1 15P_0402_50V8J 1 2
AD31 VCC_PCI3V +3VS
1
P CI_AD30 122 23 MBK2012601YZF_2P
AD30 VCC_PCI3V
10U_0805_6.3V6M
0.01U_0402_16V7K
1000P_0402_50V7K
P CI_AD29 123 38 Y7
P CI_AD28 AD29 VCC_PCI3V 24.576MHZ_16PF_1Y724576CE1C~D
124 118
P CI_AD27 125
AD28
R5C835 VCC_PCI3V 2 2 2 2 2 C 434 1 1 1
2
P CI_AD26 AD27 +3VS R5C832XO
126 AD26 VCC_RIN 92 1 2
P CI_AD25 127
P CI_AD24 AD25 15P_0402_50V8J
1 AD24 VCC_ROUT 11
2 2 2
0.01U_0402_16V7K
0.1U_0402_16V4Z
0.01U_0402_16V7K
10U_0805_10V4Z
P CI_AD23 4 33
+3VS AD23 VCC_ROUT
0.01U_0402_16V7K
0.01U_0402_16V7K
0.47U_0603_16V4Z
0.47U_0603_16V4Z
C4 27
C4 28
C4 29
P CI_AD22
CLK_PCI_1394 P CI_AD21
5
7
AD22 VCC_ROUT 59
91 +3VS
1 1 1 1
1 1 1 1 SD,MMC,MS,XD muti-function pin define
A P CI_AD20 AD21 VCC_ROUT A
9 AD20 VCC_ROUT 111 MDIO SD Card MMC Card MS Card XD Card
1 100K_0402_1%
R 451
P CI_AD19 10 AD19 PIN Name PIN Name PIN Name PIN Name PIN Name
1
2 2 2 2
R4 52
10_0201_5%
0.01U_0402_16V7K
10U_0805_10V4Z
P CI_AD18 12 79
AD18 VCC_3V 2 2 2 2
C4 30
C4 31
C4 32
C4 33
P CI_AD17 13 1 1 MDIO00 SDCD# MMCCD# XDCD0#
AD17
C4 35
C4 36
C4 37
C4 38
P CI_AD16 14 54
@ P CI_AD15 AD16 VCC_MD3V
27 MDIO01 MSCD# XDCD1#
2
P CI_AD14 AD15 + 3V_PHY

28 97
2
AD14 AVCC_PHY3V 2 2
4.7P_0402_50V8C
CBS_GRST# P CI_AD13 29 104 MDIO02 XDCE#

AD13 AVCC_PHY3V
C4 39
C4 40
P CI_AD12 30 108
AD12 AVCC_PHY3V
C4 42
1 1 P CI_AD11 31 MDIO03 SDWP# XDR/B#

C4 41 P CI_AD10 AD11 + SC_PWR
32 AD10 VCC_SC 90
1U_0603_6.3V6M P C I_AD9 34 MDIO04 SDPWR0 MMCPWR MSPWR XDPWR
@ P C I_AD8 AD9
36 AD8
2 2
0.01U_0402_16V7K
10U_0805_10V4Z
P C I_AD7 39 110 IEEE 1394_TPBIAS0 MDIO05 SDPWR1 XDWP#
P C I_AD6 AD7 TPBIAS0
40 AD6 1 1
P C I_AD5 41 107 IEE E1394_TPAP0 MDIO06 SDLED# MMCLED# MSLED# XDLED#
P C I_AD4 AD5 TPAP0 IEEE1394_TPAN0
42 AD4 TPAN0 106
SDCLK_MM CCLK P C I_AD3 43 MDIO07 MSEXTCK
P C I_AD2 AD3 IEE E1394_TPBP0 2 2
44 AD2 TPBP0 103
C4 44
C4 45
P C I_AD1 45 102 IEEE1394_TPBN0 MDIO08 SDCCMD MMCCMD MSBS XDWE#
AD1 TPBN0
1
R 454
10_0201_5%
P C I_AD0 46 AD0 S D_CARD_DET#

MDIO00 70 S D_CARD_DET# 31 MDIO09 SDCCLK MMCCLK MSCCLK XDRE#
PCI_CBE3# 2 69 T101 P A D
15 PCI_CBE3# C/BE3# MDIO01
@ PCI_CBE2# 15 63 XD_CE# T102 P A D MDIO10 SDCDAT0 MMCDAT0 MSCDAT0 XDCDAT0
15 PCI_CBE2# C/BE2# MDIO02
PCI_CBE1# 26 68 S D _WP
15 PCI_CBE1# S D _WP 31
2
C/BE1# MDIO03
4.7P_0402_50V8C
PCI_CBE0# 37 67 SDPWR0_MSPWR_XDPWR MDIO11 SDCDAT1 MMCDAT1 MSCDAT1 XDCDAT1

15 PCI_CBE0# C/BE0# MDIO04 SDPWR0_MSPWR_XDPWR 31
66 XDWP# T103 P A D
MDIO05
C4 46
1 65 3 IN1_LED# T104 P A D MDIO12 SDCDAT2 MMCDAT2 MSCDAT2 XDCDAT2

MDIO06 TP_MSEXTCK
MDIO07 64
P CI_PAR 25 62 SD_MMC_CMD MDIO13 SDCDAT3 MMCDAT3 MSCDAT3 XDCDAT3
15 P C I_PAR PAR MDIO08 SD_MMC_CMD 31
@ PCI_FRAM E# 16 60 SDCLK_MMCCLK_R R 455 1 2 0_0201_5%
2 15 PCI_FRAME# FRAME# MDIO09 SDCLK_MMCCLK 31
P CI_ TRDY# 18 58 SDDA TA0_MSDATA0 MDIO14 MMCDAT4 XDCDAT4
B 15 P CI_ TRDY# TRDY# MDIO10 SDDATA0_MSDATA0 31 B
P CI_IRD Y# 17 57 SDDA TA1_MSDATA1
15 P CI_IRD Y# IRDY# MDIO11 SDDATA1_MSDATA1 31
PCI_STOP# 21 56 SDDA TA2_MSDATA2 MDIO15 MMCDAT5 XDCDAT5
R4 56 15 PCI_STOP# STOP# MDIO12 SDDATA2_MSDATA2 31
PCI_DEVS EL# 19 55 SDDA TA3_MSDATA3
15 PCI_DEVSEL# DEVSEL# MDIO13 SDDATA3_MSDATA3 31
P CI_AD22 1 2 CBS_IDS EL 3 53 MMC_D4 MDIO16 MMCDAT6 XDCDAT6
IDSEL MDIO14 MMC_D4 31
P C I_PERR# 22 52 MMC_D5
15 P C I_PERR# PERR# MDIO15 MMC_D5 31
470_0402_5% P C I_SERR# 24 51 MMC_D6 MDIO17 MMCDAT7 XDCDAT7
15,22,30,31 P C I_SERR# SERR# MDIO16 MMC_D6 31
50 MMC_D7
MDIO17 MMC_D7 31
49 XDCLE T105 P A D MDIO18 XDCLE
PCI_REQ2# MDIO18 XDALE
15 P CI_REQ2# 120 REQ# MDIO19 48 T106 P A D
15 PCI_GNT2# PCI_GNT2# 119 MDIO19 XDALE
GNT# S CV CC5EN#
SCVCC5EN# 83
84 S CV CC3EN#
CLK_PCI_1394 117 SCVCC3EN#
15 CLK_PCI_1394 PCICLK
15,22 PCI_RST#
CBS_GRST#
116 PCIRST# R5C832XI
04/23 Add Q28 to prevent +5VS from leaking through Q27.
82 GBRST# XI 95
R4 57 1 @ 2 10K_0201_5% 114 96 R5C832XO + SC_PWR
R4 58 1 CLKRUN# XO
14,30,31 PM_CLKRUN# 2 0_0201_5% 78 PME# +3VS 1 2 S CV CC3EN#
+3VS R4 59 1 2 10K_0201_5% PME# 100
REXT R 1088 100K_0402_5%
VREF 99
0.01U_0402_16V7K
SC_RST 89 SCRST
1
C4 47
10K_0603_1%
R4 61
S C_CLK R4 60 1 2 0_0201_5% S C _CLK_R 88 76 S I RQ 1
SCCLK UDIO0/SRIRQ# S I RQ 12,22,30,31 +3VS
SC_DATA 87 75 TP_UDIO1 T107 P A D
SCIO UDIO1
2
S C_C D# 86 74 TP_UDIO2 T108 P A D
SCSENSE SCCD# UDIO2 UDIO3
+ SC_PWR 1 2 85 SCSENSE UDIO3 73
R4 62 10K_0402_5% UDIO4 2
72
2
UDIO4 UDIO5
UDIO5 71 1 3 3 1
1
112 8 C4 48 Q28 Q27
15 P CI_PIRQE# INTA# GND
113 20 1U_0402_6.3V4Z AP2309AGN-HF_SOT23-3 AP2301GN-HF_SOT23-3
15 P CI_PIRQG# INTB# GND
R4 65 1 GND 35
2 11/13 update
+3VS 2 10K_0201_5% 77 HWSPND# GND 47 1 C9 68
3
1 2 81 TEST GND 61
C R4 66 100K_0201_5% 80 +5VS C
GND Q51B 1U_0402_6.3V4Z
98 AGND GND 93
+5VS 2
101 AGND GND 94 5
105 115 2N7002DWH 2N SOT363-6 3 1
AGND GND
109 128 1
4
AGND GND
1
C9 67
Q 57
270P_0402_50V7K
R 1090
1
C 452
5.1K_0402_1%
R 467
R5C835-TQFP128P_TQFP128_14X14 1 1U_0402_6.3V4Z AP2301GN-HF_SOT23-3
2
100K_0402_5% 2
R 1089
6 2
2N7002DWH 2N SOT363-6 1 2 2
2
2
Q51A 47K_0402_5% C9 69
1U_0402_6.3V4Z
S CV CC3EN# 1
2
1
1
56.2_0402_1%
R 469
56.2_0402_1%
R 470
R 1091 +5VS
1
+3VS 1 2 S CV CC5EN#
100K_0402_5%
2
+S C_PWR
07/01 update
JP37
Function set pin define
SMART Card Connector SC_RST D54 2 1 @ 1N4148WS-7-F_SOD323-2 IEEE1394_TPBN0
IEE E1394_TPBP0
R 471
R 472
1
1
2
2
0_0201_5%
0_0201_5%
IEEE1394_TPBN0_R
IEEE1394_TPBP0_R
1
2
TPB- GND 5
6
UDIO3 UDIO4 UDIO5 Function
S C_CLK D55 TPB+ GND
2 1 @ 1N4148WS-7-F_SOD323-2 IEEE1394_TPAN0 R 474 1 2 0_0201_5% IEEE1394_TPAN0_R 3 TPA- GND 7 Pull-down Pull-down Pull-up Disable MS,xD Card,serial ROM
JP16 IEE E1394_TPAP0 R 476 1 2 0_0201_5% IEEE1394_TPAP0_R 4 8
+S C_PWR SC_DATA D56 TPA+ GND
1 1 +S C_PWR 2 1 @ 1N4148WS-7-F_SOD323-2 Pull-up Pull-up Pull-down Enable serial EEPROM
2 SUYIN_020115FB004S512ZL
2 SC_RST SC_RST R 463 1
3 3 2 @ 15K_0402_5% CONN@ Pull-up Pull-up Pull-up Ensable MS,xD Card,disable serial ROM
1
1
56.2_0402_1%
R4 80
56.2_0402_1%
R4 81
4 4 1
5 S C_CLK C4 53 S C_CLK R 464 1 2 @ 15K_0402_5%
D 5 SC_DATA UDIO5 R4 73 1 D
6 6 2 100K_0201_5% +3VS
7 SC_DATA R 468 2 1 15K_0402_5% UDIO3 R4 79 1 2 10K_0201_5%
7 2 UDIO4 R4 82 1
8 2 10K_0201_5%
2
8 S C_C D# SC_DATA C 449 1

9 9 2 12P_0402_50V8J
10 10
11 0.1U_0402_16V4Z SC_RST C 450 1 2 12P_0402_50V8J IEEE 1394_TPBIAS0
GND
0.01U_0402_16V7K
0.33U_0603_16V4Z
GND 12
C4 54
C4 55
S C_CLK C 451 1 2 12P_0402_50V8J

ACES_85201-1005N
C ONN@
1 1 Security Classification Compal Secret Data Compal Electronics, Inc.
@
2 2
1394+2 in 1 Card
1 2 3 4 5
WWW.AliSaler.Com
+V DDA_CODEC AMP. FOR INTERNAL SPEAKER
1
+5VS U24 +5VALW
08/28 update
2
R4 83 D21 D22 PJMBZ6V8_SOT23 9 25 R 490 1 2
10K_0201_5% PJMBZ6V8_SOT23 CPVDD REG_EN 100K_0402_5%
C 456 C4 58 2 1 10U_0805_16V6K_X5R 17 29 +V D DA_CODEC
R 484
3
0.1U_0402_16V7K HPVDD REG_OUT
6 1
1 2 1 2 1 2 M ON O_IN_HD JP17 C4 60 2 1 1U_0603_16V7_X7R 8 SPVDD
300K_0201_5% C 457 0.1U_0402_16V7K_X7R R_S PK+ 1
R_S PK- 1 C4 65 2
07/24 update 2 2 1 1U_0603_16V7_X7R 18 SPVDD HP_EN 22 HP_DET R 488 1 2 @ 100K_0402_5% +5VS
Q29A L_SPK+ 3 3
C4 59
12 H DA_SPKR H DA_SPKR 2 2N7002DWH 2N SOT363-6 L_SPK- 4 C4 66 2 1 10U_0805_16V6K_X5R 30 27 HP _L_IN C 467 1 2 2.2U_0805_10V6K HP _IN_L
D 4 VDD HP_INL D
5 G1
2
1 6 26 HP _R _IN C 468 1 2 2.2U_0805_10V6K HP _I N_R
1
R 487 G2 HP_INR
0.01U_0402_16V7K
100P_0402_50V8J
C4 61
C4 62
100P_0402_50V8J
100P_0402_50V8J
C4 63
C4 64
100P_0402_50V8J
10K_0201_5% ACES_85204-04001 SPKR_EN 23 16 HP_OUTL 27
SPKR_EN HP_OUTL
1 1 1 1
3
2
C ONN@ 1 2 2 15 H P_OUTR 27
1
C 469 0.022U_0603_25V4Z_X7R SPKR_RIN+ HP_OUTR
Q29B L INE_OUTR 1 2 LI NE_C_OUTR 1
2N7002DWH 2N SOT363-6 2 2 2 2 C4 71 0.022U_0603_25V4Z_X7R SPKR_RIN-
5
1 2 3 20 R_S PK+
C 472 0.022U_0603_25V4Z_X7R SPKR_LIN+ ROUT+
4
LINE_OUTL 1 2 LINE_C_OUTL 4 19 R_S PK-

C4 74 0.022U_0603_25V4Z_X7R SPKR_LIN- ROUT-
6 L_SPK+
LOUT+
R6 14 C 476 2 1 1U_0603_16V7_X7R 14 7 L_SPK-
20K_0201_1% HPVSS LOUT-
2 1 SENSE_A 13 CPVSS C 477 2
10 1 1U_0603_16V7_X7R
L 28 SGND
C1P
3
+3VS 12
C1N
11 CPGND
Q36B Place R509,C498,C499 close to U24.23. 24 C 479 1 2 0.47U_0603_16V7K_X7R
27 MIC_SENSE 5
2N7002DWH 2N SOT363-6
1
R 703
L L 21 SPGND
BYPASS +5VS
4.7K_0201_5% 5 31 G AIN0 R4 91 2 1 @ 100K_0201_5%

4
+V D DA_CODEC U76 SPGND GAIN0

R 489
EAP D# 2 33 32 G AIN1 R4 92 2 1 @ 100K_0201_5%
2
R5 07 +V _CODEC_R TML GAIN1

+3VS 2 1
1
20K_0201_1% HD A_RST#_CODEC +V D DA_CODEC 1 G AIN0 R4 85 1 2 0_0201_5%

R5 00 2 1 SENSE_B 0_0805_5% TPA6047A4RHBR_QFN32_5X5
10K_0201_1% 1 C 480 C4 81 C 482 30 A_SD# A_SD# 3 G AIN1 R4 86 1 2 0_0201_5%
6
C C4 83 C4 84 C 485 C
4.7U_0805_10V4Z
0.1U_0402_16V7K
0.1U_0402_16V7K
C6 37 BAT54AW_SOT323-3~D 9/3 update
2
Q36A 0.01U_0402_16V7K 1 1
1
2 +V D DA_CODEC
0.1U_0402_16V7K
0.1U_0402_16V7K
10U_0805_16V6K_X5R
27 HP_DET HP_DET 2 1 1 1
2N7002DWH 2N SOT363-6 C4 86 GAIN0 GAIN1
1
2
10U_0805_16V6K_X5R 2 2 R5 09 1 2 15K_0402_1% SPKR_EN
2 2 2
1 2
C4 98 1 2 0.1U_0402_16V7K_X7R GAIN:10dB L L
C4 99 1 2 1U_0603_16V7_X7R
U25 GAIN:12dB L H
25 AVDD1 DVDD_LV 1
38 AVDD2 DVDD_CORE 9 GAIN:15.6dB H L

3 R4 93 2 1 20K_0201_5%
DVDD_IO
R4 94 2
GAIN:21.6dB H H
1 20K_0201_5%
47uF_6.3V_1.3_H1.9 60.4_0402_1%
D OCK_OUT_R C4 87 1 2 DO CK_OUTR R4 95 2 DL INE_OUTR L21 2 1 MBC1608121YZF_0603 DL INE_OUT_R
+
PORTA_R 41 1 D LINE_OUT_R 29
C 489 @ 10P_0402_25V8K R4 97 @ 10_0201_5% DOCK_OUT_L C4 88 1 DOCK_OUTL R4 96 2 DLINE_OUTL L22 2 1 MBC1608121YZF_0603 DLINE_OUT_L
+
PORTA_L 39 2 1 DLINE_OUT_L 29
1 2 2 1 2 1 60.4_0402_1%
C4 70 0.1U_0805_25V7M 47uF_6.3V_1.3_H1.9
HDA_BIT_CLK_CODEC 6 22 M IC1_C C4 90 2 1 1U_0603_16V7_X7R M IC1 27
12 HDA_BIT_CLK_CODEC BITCLK PORTB_R
1 2 12 HDA _SDOUT_CODEC HDA _SDOUT_CODEC 5 21 M IC2_C C4 91 2 1 1U_0603_16V7_X7R
C4 73 0.1U_0805_25V7M SDO PORTB_L
12 HDA _ SDIN0 R4 99 2 1 HDA _S D IN0_CODEC 8

33_0201_1% SDI_CODEC IN T_MICR_C C4 92 2
PORTC_R 24 1 1U_0603_16V7_X7R INT_MIC1 INT_MIC1 27
1 2 12 HDA _S Y NC_ CODEC HDA _S Y NC_ CODEC 10
B C4 75 0.1U_0805_25V7M SYNC INT_MICL_C C4 93 2 B
PORTC_L 23 1 1U_0603_16V7_X7R INT_MIC2 INT_MIC2 27
HD A_RST#_CODEC 11
12 HD A_RST#_CODEC RESET#
1 2 36 L INE_OUTR
C4 78 0.1U_0805_25V7M PORTD_R
46 35 LINE_OUTL
PJP603 DMIC_CLK PORTD_L
1 2 C 494 2 1 1U_0603_16V7_X7R 33 2.2U_0603_10V6K_X5R
CAP2 DLINE _IN _RC_R C4 95 1 DLINE _IN_R R5 02 6.04K_0402_1% DOCK _LINE_IN_R
PORTE_R 15 2 2 1 DOCK _LINE_IN_R 29
M ON O_IN_HD 12 R5 03 2 1 2K_0402_5%
PAD-OPEN 4x4m PCBEEP
14 DLINE _ IN_RC_L C4 96 1 2 DLI NE_IN_L R5 04 2 1 6.04K_0402_1% DO CK_LINE_IN_L DO CK_LINE_IN_L 29
PORTE_L 2.2U_0603_10V6K_X5R R5 05 2K_0402_5%
2 1
C 497 2 1 10U_0805_16V6K_X5R 27 07/24 update
VREFFILT HP _I N_R
L Place PJP603 between DGND and AGND by PORTF_R 17
+MIC_BIAS_B 28 VREFOUT-B
3vias and 80 mils shape bridge for ESD. 16 HP _IN_L
PORTF_L
+MIC_BIAS_C 29 VREFOUT-C
R5 08
47 2 1 EAP D#
EAPD/ SPDIF OUT 0 or 1 / GPIO 0 0_0201_5%
32 NC
40 NC VOL_UP/DMIC_0/GPIO 1 2 Port A = Dock Line Out
37 NC
18 NC VOL_DN/DMIC_1/GPIO 2 4 Port B = External Mic
R5 10 19 NC
20 NC GPIO 3 30 MUTE_LE D_CNTL MUTE_LED_CNTL 30 Port C = Internal Mic
1 2 LINE_OUT_SENSE# R5 11 2 1 39.2K_0402_1% SENSE_A
Port D = Internal Speakers
6
VREFOUT-E / GPIO 4 31
+V DDA_CODEC C5 00 1 2 1000P_0402_50V7K_X7R 13
100K_0201_1% Q32A SENSE_A
43
Port E = Line In
GPIO 5
29 LINE_OUT_SENSE 2 2N7002DWH 2N SOT363-6 R5 12 2 1 2.49K_0402_1% Port F = Internal Headphone
44
A R5 13 2 1 2.49K_0402_1%
GPIO 6 L A
1
SPDIF OUT1 / GPIO 7 45

LINE_IN_SENS E# R5 14 2 1 39.2K_0402_1% SENSE_B 34
R5 15 SENSE_B
SPDIF OUT0 48
3
1 2 C5 01 1 2 1000P_0402_50V7K_X7R
26 AVSS1 DVSS 7
100K_0201_1% Q32B
5 2N7002DWH 2N SOT363-6 42 49
29 LINE_IN_SENSE AVSS2
92HD75B3X5NLGXYBX8_QFN48_7X7
GPAD Security Classification Compal Secret Data Compal Electronics, Inc.
4
HDA CODEC 92HD75
5 4 3 2 1
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R5 27
100K_0402_5% +V D DA_CODEC
1 2
C ONN@
2
JP19
2
+MIC_BIAS_B INT_MIC_1_2
R 529 R6 15 1 1
560K_0402_5% 2 2 INT_MIC_2_2
2 1 3 3
D 10K_0402_5% D
04/24 Correct the Symbol from SINGA_2SJ-B960-003 4 4
5
2.2K_0402_5% U 75
1 G1 5
1
R 528 1 to SINGA_2SJ3005-002211, also correct the G2 6
P
C5 14 IN+
O 4 MIC_SENSE 26 connection for fix Audio work abnormal issue.
1U_0603_16V6K 3 ACES_85204-04001
IN-
G
2
2
2
3
INT_MIC_1_2 INT_MIC_2_2
D50 LMV331IDCKRG4_SC70-5~D
R 526
2
120K_0402_5%
D24
1
BAV70W 3P C/C SOT-323 @ PJDLC05_SOT23 PJSOT05C_SOT23
1
2 D38 @
1
3
1
JP35
220P_0402_25V8J 2 1 C6 38 EXT_MIC L25 1 2 BLM18BD601SN1D_0603 MIC_EXTOUT 7
5
26 HP_OUTL R 516 1 2 60.4_0402_1% HP_OUT_L L23 1 2 BLM18BD601SN1D_0603 HP_L_OUT 4
3
26 HP _OUTR R 517 1 2 60.4_0402_1% H P_OUT_R L24 1 2 BLM18BD601SN1D_0603 H P_R_OUT 1
2
1
1 1 6
R 518 R 519 C5 02 C 503
SINGA_2SJ3005-002211
20K_0402_5% 0.01U_0402_16V7K C ONN@
2
20K_0402_5% 2 2 0.01U_0402_16V7K
C HP_DET 26 C
04/27 Change C642 from 33P to 15P via

IDT recommend to fix the SVTP fail issue.
EXT_MIC_3 C6 42 2 1 15P_0402_50V8J
+COD EC_REF
8
1 2
R7 04 100K_0402_5% 5
P
+
O 7
100P_0402_50V8J
6 -
G
C 640
1 U 44B
+V DDA_CODEC TLV2462_SO8
4
+V DDA_CODEC
2
8
L27
1
11 0NH_HLC0603CSCCR11JT_5% 3
P
R6 17 + M IC1 R5 24
O 1 M IC1 26
EXT_MIC 1 2 EXT_MIC_1 1 2 EXT_MIC_2 1 2 2 47K_0402_5%
-
G
0.47U_0402_6.3V6K C 639 10K_0402_5% U 44A

TLV2462_SO8
4
2
1 +COD EC_REF
C6 41
1
68P_0402_50V8J 1
B C5 07 R5 25 B
2 47K_0402_5%
4.7U_0805_10V4Z
2
2
+MIC_BIAS_C INT_MIC_2_5 C5 16 1 2 100P_0402_50V8J
INT_MIC_1_5 C 517 1 +COD EC_REF

2 100P_0402_50V8J 1 2
R5 30 100K_0402_5%
1 2
1
R5 33 100K_0402_5% +V D DA_CODEC
+CO DEC_REF
R 531 R5 32 +V DDA_CODEC
0.1U_0402_16V4Z
3K_0402_5% 3K_0402_5%
100P_0402_50V8J
C5 18
1
2
0.1U_0402_16V4Z
C5 19
1
100P_0402_50V8J
INT_MIC_1_2
C 520
C 521
1 1 INT_MIC_2_2
INT_MIC_2_2 2
8
+V DDA_CODEC 2
R5 35 L29 R5 36 5
P
+
8
+V DDA_CODEC 2 2 3K_0402_5% 1 10NH_HLC0603CSCCR11JT_5% 10K_0402_5%

O 7
R5 38 L30 R5 39 3 1 2 INT_MIC_2_1 1 2 1 2INT_MIC_2_31 2 INT_MIC_2_41 2 6
P
+ -
G
3K_0402_5% 1 10NH_HLC0603CSCCR11JT_5% 10K_0402_5% 1 R5 34 @ 3K_0402_5% @ C 522 U 26B
O
1 2 INT_MIC_1_1 1 2 1 2INT_MIC_1_31 2 INT_MIC_1_4 1 2 2 1 0.068U_0603_16V7K 1 TLV2462_SO8
4
-
G
R5 37 @ 3K_0402_5% @ C 523 0.068U_0603_16V7K U 26A C5 24 C 525

1 1 TLV2462_SO8 @ 1U_0603_10V4Z 68P_0402_50V8J
4
A C5 26 C 527 A
@ 1U_0603_10V4Z 68P_0402_50V8J 2 2
2 2 26 INT_MIC2
26 INT_MIC1 Security Classification Compal Secret Data Compal Electronics, Inc.

AMP & Audio Jack
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA -5251P 0.9
5 4 3 2 1
WWW.AliSaler.Com
KS O[0..11]
+5VS 30 KSO[0..11]
KSI[0..7]
04/27 Del Q54, change the LED +3VL 30 KSI[0..7]
circuit for common. L Place C668 close to JP22.2.
3
2N7002DW T/R7_SOT-363-6
Q34B +3VS JP21
HDD_STP# +3VS +3VL KSO11 1 KSO11 C906 1 2 100P_0402_50V8J
JP22 KSO0 1 KSO0 C907 100P_0402_50V8J
15,23 W W AN_TRANSMIT_OFF# 1 2 5 2 2 1 2
R1099 0_0402_5% 1 KSO2 3 KSO2 C908 1 2 100P_0402_50V8J
1 3
1
2N7002DW H 2N SOT363-6 2 1 KSO5 4 KSO5 C909 1 2 100P_0402_50V8J
4
Q31B R540 2 C668 KSI_D_14 4
A 3 3 5 5 A
W W _LED#1 2 4 K SI_D_8 6 KSI_D_14 C910 1 2 100P_0402_50V8J
23 W W _LED# 30 AMBER_BATLED# 4 6
5 R1098 0_0402_5% 47K_0402_5% 5 0.1U_0402_16V4Z KSI_D_12 7 K SI_D_8 C911 1 2 100P_0402_50V8J
12 HDD_HALTLED 12,30 AQUAW HITE_BATLED# 5 2 7
6 KSI_D_10 8 KSI_D_12 C912 1 2 100P_0402_50V8J
12,29 SATA_LED#
2
6 8
1
W L_LED# 1 2 W L/BT_LED# HDD_STP# 7 K SI_D_0 9 KSI_D_10 C913 1 2 100P_0402_50V8J

22 W L_LED#
4
@ R560 R1097 0_0402_5% 7 K SI_D_4 9

29 STB_LED# 8 8 10 10
6
100K_0201_5% W L/BT_LED# 9 K SI_D_2 11 K SI_D_0 C914 1 2 100P_0402_50V8J
Q34A 9 K SI_D_1 11 K SI_D_4 C915 100P_0402_50V8J
10 10 11/11 update for EMI. K SI_D_3
12 12 K SI_D_2
1 2
11 13 C916 1 2 100P_0402_50V8J
2
GND KSO3 13 K SI_D_1 C917 100P_0402_50V8J

09/01 Update 24 BT_LED 2 12 GND KSO8
14 14 1 2
15 15
2N7002DW T/R7_SOT-363-6 ACES_85201-1005N KSO4 16 K SI_D_3 C918 1 2 100P_0402_50V8J
1
KSO7 16 KSO3 C919 100P_0402_50V8J
CONN@ 17 17 1 2
BT_LED R541 1 2 100K_0201_5% KSO6 18 KSO8 C920 1 2 100P_0402_50V8J
KSO10 18 KSO4 C921 100P_0402_50V8J
19 19 1 2
KSO1 20
K SI_D_5 20 KSO7 C922 100P_0402_50V8J
L Place C536 close to JP22.8 21 21 1 2
K SI_D_6 22 KSO6 C923 1 2 100P_0402_50V8J
STB_LED# K SI7 22 KSO10 C924 100P_0402_50V8J
23 23 1 2
1 KSI_D_13 24 KSO1 C925 1 2 100P_0402_50V8J
C536 KSI_D_11 24
25 25
K SI_D_9 26 K SI_D_5 C926 1 2 100P_0402_50V8J
1000P_0402_50V7K KSO9 26 K SI_D_6 C927 100P_0402_50V8J
27 27 1 2
2 K SI7 C928 100P_0402_50V8J
07/02 update LEFT
28 28 KSI_D_13 C929
1 2
100P_0402_50V8J
29 29 1 2
+3VS +3VS RIGHT 30 30 KSI_D_11 C930 1 2 100P_0402_50V8J
31 K SI_D_9 C931 1 2 100P_0402_50V8J
GND1 KSO9 C932 1
32 GND2 2 100P_0402_50V8J
C528
C529
C530
0.1U_0402_16V4Z
4.7U_0805_10V4Z
1000P_0402_50V7K
JP23
1 1 2 2 1 1 1
12 HDA_SDOUT_MDC HDA_SDOUT_MDC 3 4 HRS_FH28-60(30)SB-1SH(86)
3 4 D25
5 5 6 6 CONN@
12 HDA_SYNC_MDC 7 8 2 K SI_D_3
B 7 8 2 2 2 B
12 HDA_SDIN1 1 2 HDA_ SDIN1_MDC 9 9 10 10 R544 K SI3 1
R543 33_0402_5% 11 12 BITCLK_MDC 2 1 3 KSI_D_11
11 12 HDA_BIT_CLK_MDC 12
12 HDA_RST#_MDC 0_0201_5% ON /OFFBTN_KBC#
13 14 @ C531 @ 1 DAP202UGT106_SC-70
GND GND
15 GND GND 16 1 2 10P_0402_25V8K C146 01/04 update for ESD D26 D27
17 18 2 K SI_D_0 2 K SI_D_4
GND GND 0.1U_0402_16V4Z K SI0 1 K SI4 1
CONN@ ACES_88025-120N-CP 2 K SI_D_8 KSI_D_12
3 3
Add C146 close to D34 pin 1. DAP202UGT106_SC-70 DAP202UGT106_SC-70
+3VL
L D28 D30
2 K SI_D_1 2 K SI_D_5
K SI1 1 K SI5 1
3 K SI_D_9 3 KSI_D_13
1
R546
100K_0201_5% DAP202UGT106_SC-70 DAP202UGT106_SC-70
D31 D32
JP25 JP26 2 K SI_D_2 2 K SI_D_6
1 MOD _RING MOD_TIP 1 K SI2 1 K SI6 1
2
1 MOD_TIP MOD _RING TIP KSI_D_10 KSI_D_14
2 2 2 RING 3 3
G1 3
4 29 ON/OFF# 1 2 ON /OFFBTN_KBC# DAP202UGT106_SC-70 DAP202UGT106_SC-70
G2 ON/OFFBTN_KBC# 30
3 R547 47_0201_5% 1
ACES_85204-02001 GND
4 GND
CONN@ C538 07/22 update
FOX_JM74613-V5-7F 1U_0603_10V4Z
CONN@ 2 R550
1 2 +3VALW
D34 100K_0402_5%
1 2 ON/OFFBTN# 14,30
@ CH751H-40PT_SOD323-2
C
8/25 Update C
+3VS +VREG3_51125
11/14 Update C AP_INT
CONN@ W L_LED# STB_LED#

JP28
3
1 +5VS
1 +5VALW
2 2
3 CONN@ JP29
3 D47 D49 JP20 JP27
W L/BT_LED# 4 4 1 1
5 1 RIGHT 1 2
5 1 1 30 TP_CLK 2
6 PJSOT05C_SOT23 PJSOT05C_SOT23 ON/OF F# 2 2 3
13,30 CAP_CLK 30 TP_DATA
1
6 STB_LED# 2 LEFT 2 3
13,30 CAP_DAT 7 7 3 3 3 3 4 4
2
30 CAP_INT 8 8 4 4 30 SP_CLK 4 4 5 G1
3
9 5 5 +5VS 6
9 G5 30 SP_DATA 5 G2
STB_LED# 10 C AP_CLK 6 6
R612 1 10 G6 6
20,30 LID_SW # 2 0_0201_5% 11 11 7 7
ACES_50504-0040N-001
12 +3VS CAP_DAT ACES_85205-04001 8 CONN@
12 +5VS 8 1
2 2 D45 CONN@ 1 C532
PJDLC05_SOT23-3
3
C742 C744 2 C535 E&T_6701-E08N-00R 0.1U_0402_16V4Z

1
13 PESD24VS2UT_SOT23-3~D D29
@ 680P_0402_50V7K 330P_0402_50V7K GND1 C752 0.1U_0402_16V4Z 2
14
1
1 1 GND2 @ 330P_0402_50V7K D48 2
ACES_87213-1200G 1
L Place C670 close to JP20.2's via.
PJSOT05C_SOT23
1
ON/OF F#
6/17 Correct JP27 connection from currently
1
L ID_SW # C AP_INT C670 Pin1:+5VS,Pin2:RIGHT,Pin7:GND,Pin8:GND to
+3VL
Pin1:RIGHT,Pin2:NC,Pin7:NC,Pin8:+5VS.
3
1 0.1U_0402_16V4Z
D53 R438 2
2
D PJDLC05 3P_SOT23 10K_0201_5% C627 D
220P_0402_25V C753
2 11/11 update for ESD.
@ 330P_0402_50V7K
2
+3VL 5.1K_0402_5% 1
1
R695 1 2 C AP_CLK
R694 1 2 CAP_DAT
5.1K_0402_5%
MDC/KBD/ON_OFF/LID
LA-5251P 0.9
Date: T uesday, January 05, 2010 Sheet 28 of 47
1 2 3 4 5
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1 2 3 4 5 6 7 8
VA
VIN VA
R6 98
C5 41
C5 42
1 2
A 0_0805_5% A
1 1
3
2 2
08/28 update
0.1U_0603_50V4Z
0.1U_0603_50V4Z
D35
@ PJDLC05_SOT23-3
VA
81
JP30
VA
21 MDO1+ MDO1+ 1 41 MDO3+ MDO3+ 21
MDO1- RJ45_B+ RJ45_D+ MDO3-
21 MDO1- 2 RJ45_B- RJ45_D- 42 MDO3- 21
21 MDO0+ MDO0+ 3 43 MDO2+ MDO2+ 21
MDO0- RJ45_A+ RJ45_C+ MDO2-
21 MDO0- 4 RJ45_A- RJ45_C- 44 MDO2- 21
04/22 Change JP30 Pin 46 and 27 connection from GND to DOCK_DETECT#

21 LANLINK_STATUS# 5 RJ45_LINKLED# RJ45_ACTLED# 45 LAN_ACT# 21
28 STB_LED# 6 46 DOCK_DETECT#
ADP_SIGNAL PWRLED DETECT1# PRE P#
ADP_SIGNAL 7 DOCK_ADP_SIGNAL PREP# 47 PREP# 15,18,21
14,23,30,32,33,35,37,38 SLP_S3# SLP_S3# 8 48 SLP_S4# 14,24,33,39
5VS(0.5A) 5VS(0.5A)
B
9 GND GND 49 04/20 JP30.8 become NC, JP30.48 connect to SLP_S4# from HP B
15 USB20_N11 10 USB1- DP_ML0+ 50 DPB_TXP0 14
15 USB20_P11 11 USB1+ DP_ML0- 51 DPB_TXN0 14
12 GND GND 52
28 ON/ OFF# ON/O FF# 13 53 DPB_TXP1 14
VA_ON# NBSWON# DP_ML1+
14 VA_ON# DP_ML1- 54 DPB_TXN1 14
15 DOC K_ID0 15 DOCK_ID0 GND 55
15 DOC K_ID1 16 DOCK_ID1 DP_ML2+ 56 DPB_TXP2 14
17 AUDIO AGND DP_ML2- 57 DPB_TXN2 14
26 LINE_IN_SENSE 18 LINE_IN_SENSE GND 58
26 LINE_OUT_SENSE 19 LINE_OUT_SENSE DP_ML3+ 59 DPB_TXP3 14
20 AUDIO AGND DP_ML3- 60 DPB_TXN3 14
26 DO CK_LINE_IN_L DLI NE_IN_L 21 61
DLINE _IN_R LINE_IN_L GND
26 DOCK _LINE_IN_R 22 LINE_IN_R DP_AUX+ 62 DPB_AUX 14
23 AUDIO AGND DP_AUX- 63 DPB_AUX# 14
26 DLINE_OUT_L DLINE_OUT_L 24 64
DL INE_OUT_R LINE_OUT_L GND
26 D LINE_OUT_R 25 LINE_OUT_R DCAD 65 DPB_CTRLCLK 14
DOCK_DETECT#
26 AUDIO AGND HCED 66 DPB_CTRLDATA 14 4/5 update for HP Docking pin define change
27 DETECT2# HPD 67 DP B_HPD 14
28 GND GND 68
18 DOCK _RED DOCK _RED 0_0402_5% 2 R5 55 1 R_DOC K_RED 29 69 D_D DCDATA D_DD CDATA 18
DOCK _GRN 0_0402_5% 2 R5 56 1 R_DOC K_GRN CRT_R CRT_DDC_DATA D_DDCC LK
18 DOCK _GRN 30 CRT_G CRT_DDC_CLK 70 D_DDCCLK 18
18 DO CK_BLU DO CK_BLU 0_0402_5% 2 R5 57 1 R_D OCK_BLU 31 71
CRT_B GND
32 GND CRT_VSYNC 72 D_V S Y NC 18
33 RESERVED(USB3_RX+) CRT_HSYNC 73 D _ HS Y NC 18
34 RESERVED(USB3_RX-) GND 74
+3VALW 35 75
GND RESERVED(SATA_RXP) SATA_PRX_DTX_P5 12
36 RESERVED(USB3_TX+) RESERVED(SATA_RXN) 76 SATA_PRX_DTX_N5 12
37 RESERVED(USB3_TX-) GND 77
1
38 GND RESERVED(SATA_TXP) 78 SATA_PTX_DRX_P5 12

R49 SATA_LED#_Q 39 79 SATA_PTX_DRX_N5 12
RESERVED(SATA_LED#) RESERVED(SATA_TXN)
40 80
GND
GND
GND
GND
GND
10K_0402_5% GND GND
C C
2
FOX_QL1044L-D261A1-7H
82
83
84
85
86
C ONN@
VA_ON#
1
1
D
1
SLP_S3# 2 Q79
G 2N7002H_SOT23-3 R 552 C 540
S 1K_0201_5% 0.1U_0402_16V4Z
3
2
11/05 update
2
DOCK _RED C5 47 1 2 @ 0.1U_0402_16V4Z
DOCK _GRN C5 48 1 2 @ 0.1U_0402_16V4Z
1 2,28 SATA_LED# SA TA_LED# DO CK_BLU C5 49 1 2 @ 0.1U_0402_16V4Z
DOCK _RED R5 64 1 2 @ 150_0402_1%

DOCK _GRN R5 68 1 2 @ 150_0402_1%
DO CK_BLU R5 70 1 2 @ 150_0402_1%
D D

DOCK CONN
1 2 3 4 5 6 7 8
WWW.AliSaler.Com
+3VL
1
R5 90
+3VL 0_0603_5%
L
07/01 update
1 2 +3VS
2
+3VL 0.1U_0402_16V4Z 0.1U_0402_16V4Z R5 73 0_0402_5%
1
R P7
1 8 KSI3 R 521 1 1 1 1 1 1 1
2 7 KSI2 C 565 C 558
3 6 KSI1 @ 100K_0402_5% C 554 C 555 C5 56 C5 57 0.1U_0402_16V4Z
4 5 KSI0 C 553 0.1U_0402_16V4Z
2
A ROM_CS #0 0.1U_0402_16V4Z 2 2 2 2 2 2 2 A
10K_0804_8P4R_5%
0.1U_0402_16V4Z 4.7U_0805_10V4Z
106
119
R P8
07/01 update
39
58
84
14
49
1 8 KSI7 U 32
2 7 KSI6 1 2 ROM_DATOUT 128 15 C5 59 1 2 4.7U_0805_10V6K
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC2
31 SPI_SI FLDATAOUT CAP
3 6 KSI5 12 KBC_SPI_SI_R R5 76 0_0402_5% 127 01/04 update (Cancel Board ID Detect reserve
KSI4 ROM_CS #0 HSTDATAOUT/GPIO45
4 5 31 SPI_CS0# 1 2 97 FLCS0# GPIO28 93 PM_SLP_M# 14,32,33
12 KBC_SPI_CS0#_R R5 77 0_0402_5% 96 HSTCS0#/GPIO44 GPIO29 98 SUS_PWR_ACK 14 circuit (Del U8,Q37,R571,R572,R574,R575)).
10K_0804_8P4R_5% 31 SPI_SO 95 99 AC_PRESENT 14
ROM_DATIN FLDATAIN GPIO30 R5 79 1
12 KBC_SPI_SO 1 2 94 HSTDATAIN/GPIO43 GPIO31 100 2 0_0402_5% MUTE_LED_CNTL 26
R5 78 0_0402_5% 126 P C I_SERR# 15,22,25,31
GPIO32
28 KSO[0..11]
KS O0 21 124 K B C_PWR_ON 36
ROM_CLK KS O1 KSO0 OUT0/(SCI)
20 KSO1 OUT1/IRQ8# 125 AQUAWHITE_BATLED# 12,28
KS O2 19
KS O3 KSO2
18 KSO3 CFETA/OUT7/nSMI 123
1 C6 54 KS O4 17 122 KB RST# D36 1 2
General Purpose I/O Interface

KSO4 OUT8/KBRST KB_RST# 15
Keyboard/Mouse Interface
KS O5 16 121 CH751H-40PT_SOD323-2
SMSC_1098-NU_TQFP-128P
KSO5 OUT9/PWM2 FAN_PWM 4
@ 4.7P_0402_50V8C KS O6 13 120
2
KS O7
KS O8
12
KSO6
KSO7
OUT10/PWM0
PWM_CHRGCTL 118
BAT_PWM_OUT
CHG CTRL 35
35
L
10 KSO8
KS O9 9 107
KS O10 KSO9 GPIO01
8 KSO10 GPIO02 79 ON/OFFBTN_KBC# 28
KS O11 7 80 CPU_SV_ID_DET
KSO11 GPIO03 SLP_S3#
6 KSO12/GPIO00/KBRST GPIO04/KSO14 81 SLP_S3# 14,23,29,32,33,35,37,38
+5VS 5 83
KSO13/GPIO18 GPIO05/KSO15 8051_RECOVER# 22,31
R P9 P M_RSMRST#
28 K SI[0..7] GPIO07/PWM3 85 PM_RSMRST# 14
1 8 TP _CLK KSI0 29 86 CRACK_BGA CRACK_BGA 8,17
TP_DATA KSI1 KSI0 GPIO08/RXD B D_ ID
2 7 28 KSI1 GPIO09/TXD 87
3 6 KSI2 27
B KSI3 KSI2 AB 2A_DATA R5 82 0_0201_5% B
4 5 26 KSI3 GPIO11/AB2A_DATA 88 1 2 CAP_DAT 13,28
KSI4 25 89 AB2A _CLK R5 83 1 2 0_0201_5% CAP_CLK 13,28
10K_0804_8P4R_5% KSI5 KSI4 GPIO12/AB2A_CLK R5 84 0_0201_5%
24 KSI5 GPIO13/AB2B_DATA 90 1 2 CELLS 35
KSI6 23 91 R5 85 1 2 0_0402_5% A_SD# 26
KSI7 KSI6 GPIO14/AB2B_CLK
22 KSI7 GPIO15/FAN_TACH1 92 ADP_DET# 41
R P10
GPIO16/FAN_TACH2 101 THM_MAIN# 34
1 8 SP_CLK 102 GATEA20 15
SP _DATA TP _CLK GPIO17/A20M
2 7 28 TP_CLK 35 IMCLK
3 6 28 TP_DATA TP_DATA 36 103 R7 06 1 2 0_0402_5% O N/OFFBTN# 14,28
SP_CLK IMDAT GPIO20/PS2CLK
4 5 28 SP_CLK 61 KCLK GPIO21/PS2DAT 105
28 SP_DATA SP _DATA 62 4 PWRBTN_OUT# 1 2 LA NLINK_R# L ANLINK_R# 15,21
10K_0804_8P4R_5% KDAT GPIO24/KSO16 R6 08 @ 0_0402_5%
66 EMCLK ADP_PRES[CKT#2]/GPIO27/WK_SE05 74 ADP_PRES 33,35
67 EMDAT
111 AB 1A_DATA AB1A_DATA 34

AB1A_DATA AB1A _CLK
AB1A_CLK 112 AB1A_CLK 34
CLK_PCI_KBC Access Bus Interface
14,25,31 P M_CLKRUN# 55 109 AB 1B_DATA AB1B_DATA
CLKRUN# AB1B_DATA AB1B _CLK
12,22,25,31 S I RQ 57 SER_IRQ AB1B_CLK 110 AB1B_CLK
1
R5 87
10_0402_5%
CLK_PCI_KBC
15 C LK_PCI_KBC
RUNS CI _EC#
54
76
PCI_CLK Power Mgmt/SIRQ 73 R5 88 1 2 0_0201_5%
15 RUNS CI _EC# EC_SCI# GPIO25 CAP_INT 28
@
07/22 update +3VL
GPIO26/KSO17 108
51 59
Miscellaneous
12,22,31 LPC_LAD3
2
LAD[3] NC_CLOCKI
4.7P_0402_50V8C
12,22,31 LPC_LAD2 50 75 32K_CLK R5 92 1 2 0_0201_5% ADP_EN 41

LAD[2] 32KHZ_OUT/GPIO22/WK_SE01 P GD _IN CPU_SV_ID_DET R5 51 1
12,22,31 LPC_LAD1 48 LAD[1] RESET_OUT#/GPIO06 60 07/03 update 2 100K_0402_5%
C5 60
1 12,22,31 LPC_LAD0 46 LAD[0] LPC PWRGD 78 P W R_ GD P W R _GD 32

77 R5 53 1 2@ 100K_0402_5%
52
Bus VCC1_RST#
38 R5 95 1 2 0_0201_5%
V CC1 _PWRGD 36,41
12,22,31 LPC_LFRAME# LFRAME# ADC_TO_PWM_OUT/GPIO19 O CP 41
@ 15 N PCI_RST# 53
2 LRESET# TEST R5 96 1
TEST PIN 69 2 1K_0201_5%
C C
L CPU Type Detect : High-->SV , Low-->LV (No use)
CRY1 70 116
CRY2 XTAL1 CFETB/GPIO10
71 XTAL2 BAT_LED# 113 AMBER_BATLED# 28
PWR_LED#/8051TX 115 8051TX 22,31
+ VCC0 68 VCC0 FDD_LED#/8051RX 114 8051RX 22,31
R6 01 1 2 100K_0201_5% +3VL +3VL
BAT_ALARM 1 Alarm [CKT#2]/GPIO36 07/02 update
32.768KHZ QTFM28-32768K125P20L
12 KBC_SPI_CLK_R 2 HSTCLK/GPIO41 AC[CKT#2]/GPIO23 41 AC_ADP_PRES 35

31 SPI_CLK 1 2ROM_CLK 3 FLCLK ADC2/GPIO40 42 A DC2 R 1100 1 2 300_0402_5% ADP_A_ID 41 CAP_CLK SPI_CLK KB RST# R 589 1 2@ 10K_0201_5%
4.7P_0402_50V8C
4.7P_0402_50V8C
22 MC2_DISABLE R6 03 0_0402_5% 30 65 11/06 update
GPIO39 Q/GPIO33
1
12 KBC_SPI_CS1#_R 31 64 LI D_SW# LI D_SW# 20,28 V CC1_ PWRGD R 591 1 2 10K_0201_5%

HSTCS1#/GPIO42 GPIO34
22P_0402_50V8J
22P_0402_50V8J
C 622
C 634
Y5 1 2 32 63 1 1
OUT
IN
31 SPI_CS1# FLCS1# GPIO35

C5 61
C5 62
23 MC1_DISABLE R6 04 0_0402_5% 33 40 +3VL 11/14 update CRACK_BGA R 593 1 2 10K_0201_5%

R 1101 300_0402_5% GPIO38 AVCC
1 1 14,33,39 PM_SLP_LAN# 34 GPIO37
AGND
AVSS
35 PMC 1 2 A DC1 43 LI D_SW# 1 R3 63 2 @ @ B D_ ID R 586 1 2 10K_0201_5%

VSS
VSS
VSS
VSS
VSS
VSS
VSS
O CP_A_IN ADC1/GPIO46 2 2
2 ADC 100K_0402_5%
NC
NC
41 O CP_A_IN 1 44 ADC_TO_PWM_IN
R 1102 300_0402_5% 07/02 update
2 2 KBC1098-NU_VTQFP128_14X14
2
72
11
37
47
56
104
82
117
45
K B C_PWR_ON R 597 1 2 10K_0201_5%

2200P_0402_25V7K 2 1 C9 70 ADC
+R TCVCC 2200P_0402_25V7K 2 1 C9 71 A DC1

07/01 update
1
2200P_0402_25V7K 2 1 C9 72 A DC2
1
R6 09 R P11 +3VL
R6 10 0_0402_5% 14,40 P GD _IN P GD _IN @ R6 06 1 2 10K_0201_5% 4.7K_0804_8P4R_5%

0_0402_5% AB1A _CLK 1 8
2
P M_RSMRST# R6 07 1 2 100K_0201_5% AB 1A_DATA 2 7

2
AB1B _CLK 3 6
D AB 1B_DATA D
+V CC0 07/02 update 4 5
1
1 1
R6 11 C5 63 C5 64
@ 0_0402_5% 0.1U_0402_16V4Z
2 2
2
1U_0603_10V4Z Security Classification Compal Secret Data Compal Electronics, Inc.

KBC1098
1 2 3 4 5
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TPM1.2 on board +3VS +3VALW
LPC Debug Port +3VL

Finger Printer
C5 73
0.1U_0402_16V4Z
C5 74
0.1U_0402_16V4Z
C5 75
0.1U_0402_16V4Z
C5 76
0.1U_0402_16V4Z
C LK_PCI_DB 1 2 TPM_XTALI
8051_RECOV ER# R 628 1 2 100K_0201_5% C 572 22P_0402_50V8J 1 1 1 1
1
reserve it for WWAN noise Y6
1
@ C 655
12P_0402_50V8J B+_DEBUG R 618 2 2 2 2
2 NC IN 1
2 +3VALW 10M_0402_5%
A JP31 Q38 SI2301CDS-T1-GE3 1P SOT23-3 CONN@ 3 4 A
JP32 NC OUT
1
2
Ground
S
C LK_PCI_DB 2 3 U SB20_N1_PWR 32.768KHZ QTFM28-32768K125P20L
D
15,22 C LK_PCI_DB LPC_PCI_CLK 1 1 1
3 Ground 15 USB20_N10 2 2
C5 78
C5 79
TPM_XTALO
24
19
10
12,22,30 LPC_LFRAME# 4 LPC_FRAME# 15 USB20_P10 3 3 1 2
5
S I RQ C 577 22P_0402_50V8J U34
G
12,22,25,30 S I RQ 5 1 1 4 4
2
+V3S
6 5 G1
VSB
VDD
VDD
VDD
4,12,15,21,22,23 PLT_RST# LPC_RESET#
2
7 6 G2 12,22,30 LPC_LAD0 LPC_LAD0 26
15,22,25,30 P C I_SERR# +V3S LAD0
0.1U_0402_16V4Z
10U_0805_10V4Z
12,22,30 LPC_LAD0 8 R6 20 12,22,30 LPC_LAD1 LPC_LAD1 23
LPC_AD0 10K_0201_5% 2 2 ACES_85201-0405N LPC_LAD2 LAD1
12,22,30 LPC_LAD1 9 LPC_AD1 12,22,30 LPC_LAD2 20 LAD2
10 LPC_LAD3 17 6 TPM_GPIO +3VS
12,22,30 LPC_LAD2 LPC_AD2 +3VS 12,22,30 LPC_LAD3 LAD3 GPIO T109 P AD
12,22,30 LPC_LAD3 11 12,22,30 LPC_LFRAME# LPC_LFRAME# 22 2 TPM_GPIO2 T110 P AD
1
LPC_AD3 P LT_RST# LFRAME# GPIO2
12 VCC_3VA 16 LRESET#
Base I/O Address
1
13 R6 25 R3 67 1 2 4.7K_0402_5% L PC_PD# 28 0 = 02Eh
22,30 8051TX PWR_LED# LPCPD#
22,30 8051RX 14 220K_0402_1% 08/25 update 12,22,25,30 S I RQ S I RQ 27 1 =* 04Eh
8051_RECOV ER# CAPS_LED# CLK_P CI_TPM SERIRQ R6 19
22,30 8051_RECOVER# 15 NUM_LED# 15 FP R _OFF 1 2 15 CLK_PCI_TPM 21 LCLK
22,36 DEBUG_KBCRST 16 R6 22 4.7K_0201_5%
VCC1_PWRGD
SPI_CLK _JP 17 1 2 1 @ 2 SLB 9635 TT 1.2 0_0201_5%
2
SPI_CS0#_JP SPI_CLK 10P_0402_50V8K @ C5 80 R 621 10_0201_5%
18 SPI_CS# D39 15 CLKRUN# TEST1 8 1 2 1 2
SPI_SI_JP 19 9 R 623 @
SPI_S O_JP SPI_SI USB20_N10 USB20_P10 TESTB1/BADD 4.7K_0201_5%
20 SPI_SO 2 CH1 CH2 3 14,25,30 PM_CLKRUN#
SPI_HOLD#_0 21 7
SPI_HOLD# PP
30 SPI_CS1# 22 Reserved
23 Reserved 1 VN VP 4 +5VALW NC 3
24 +3VS TPM_XTALO 14 12
Reserved XTALO NC
CM1213-02SR_SOT143-4 07/02 update TPM_XTALI NC 1
13 XTALI/32K IN
1
ACES_87216-2404_24P
C ONN@
GND
GND
GND
GND
R 624
@ 4.7K_0201_5%
SLB 9635 TT 1.2_TSSOP28
25
18
11
4
B B
1
R 626
@ 0_0201_5% 07/02 update
2
+3VL
SD/MMC socket
SPI ROM SOCKET Layout note: U46 close to JP33 within 2"
BIOS ROM(8MB) 1
20mils
C 581 U35 +SD_MMC_3VCC
8MB SPI ROM 0.1U_0402_16V4Z
25mA JP33
8 VCC VSS 4
2 SDDA TA0_MSDATA0
25 SDDATA0_MSDATA0 7 D0 VDD 4
SPI_W P# 3 SDDA TA1_MSDATA1 8
W 25 SDDATA1_MSDATA1 D1
SDDA TA2_MSDATA2 9
25 SDDATA2_MSDATA2 D2
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
Near to JP33
20mils R 629 1 2 3.3K_0201_5%SPI_HOLD#_1 7 SDDA TA3_MSDATA3 1
+3VL HOLD 25 SDDATA3_MSDATA3 D3
1 150K_0402_5%
R5 63
MMC_D4 10 14 1 1
25 MMC_D4 D4 WP S D _WP 25
30 SPI_CS0# SPI_CS 0# 1 MMC_D5 11 15 S D_CARD_DET#
S 25 MMC_D5 D5 CD S D_CARD_DET# 25
MMC_D6 12
25 MMC_D6 D6
30 SPI_CLK SPI_CLK 6 MMC_D7 13 6
C 25 MMC_D7 D7 VSS2 2 2
@ 3
2
VSS1
100P_0402_50V8J
C4 13
C4 12
30 SPI_SI SPI_SI 5 2 SPI_SO_R0 1 2 1 2 1 R5 65 2 SDCLK_MM CCLK 5 16
C D Q SPI_SO 30 CLK VSS3 C
R6 30 33_0402_5% C6 30 @ 10_0201_5% 17 1
C ONN@ ACES-91960-0084L 22P_0402_50V8J SD_MMC_CMD VSS4
25 SD_MMC_CMD 2 CMD
05/06 update R630 from @33_0402 become install.
C4 14
TAI_PSDBT0-16GNBS7N14N0_15P 2
25 SDCLK_MMCCLK
SPI_HOLD#_0 1 2 SPI_HOLD#_1 C ONN@
R6 33 0_0201_5%
SPI_CLK _JP 1 2 SPI_CLK +3VL
20mils R6 31 1 2 SPI_W P# 1 R 632 2 SPI_CLK
R6 34 0_0201_5% 3.3K_0201_5% @ 0_0201_5%
SPI_SI_JP 1 2 SPI_SI
1
R6 35 0_0201_5%
SPI_CS0#_JP 1 2 SPI_CS 0# R6 27 +3VS +SD_MMC_3VCC
R6 36 0_0201_5%
SPI_S O_JP SPI_SO_R0 @10_0201_5%
R6 37
1 2
0_0201_5% U 46 40mil
2
3 VIN VOUT 1
10U_0805_10V4Z
SDPWR0_MSPWR_XDPWR
8MB SPI ROM 1
C5 82
25 SDPWR0_MSPWR_XDPWR 4 VIN/CE VOUT 5
1
1
0.1U_0402_16V4Z
1U_0402_6.3V4Z
150K_0402_5%
R5 66
& U2 & U1 2 GND
C6 31
C6 32
@ 4.7P_0402_50V8C 1 1
2 RT9701-GB SOT23 5P
2
C6 33
2
2 2
45@ W25Q64BVSSIG SOIC 8P @ SST25VF064B-66_SO8
SPI ROM
01/04 update (Cancel 16pin BIOS reserve (Del U36 and R696)).
D D

TCG/BIOS ROM/PS2/SW LPC DEBUG
1 2 3 4 5
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1 2 3 4 5 6 7 8
R6 38
1 2 +3VS
1M_0201_1% 07/09 update for INTEL S3 leakage issue.
1
+5VALW +3VALW
14,23,29,30,33,35,37,38 SLP_S3#
1 2 R 639
39 1.5V_POK
1
R6 40 3.3K_0201_5%
8
U 37A 10K_0201_5% R6
1 2 1 2 3 J1 R4
P
+5VS
2
+
5
R6 41 76.8K_0402_1% R 642 10K_0201_5% 1 1 2 V C CP_EN 37 @ 0_0402_5% 8.2K_0402_5%
O
1 2 2VREF_393 2 U77
VCC
2VREF_51125
2
-
G
+0.75VS 1 2 R6 43 34.8K_0402_1% SHORT PADS 1
R6 44 11.5K_0402_1% LM393DG_SO8 IN1
4 V CCP_1.5VSPWRGD 4
4
A D40 OUT A
1 2 2
GND
R6 45 49.9K_0402_1% IN2
14 M_PWROK 1 2 1 2
R 646 3.3K_0201_5% +3VALW MC74VHC1G08DFT2G_SC70-5
CH751H-40PT_SOD323-2 1
3
D41 C5 83
5
14,23,29,30,33,35,37,38 SLP_S3# 1 2 1 2 1000P_0402_50V7K U38
R 647 3.3K_0201_5%
VCC
CH751H-40PT_SOD323-2 2
1 IN1
1 OUT 4 P W R_ GD 30
C5 84 2
GND
37 VCCP_POK IN2
R6 49
1
3300P_0402_25V7K 1 2
2 1M_0201_1% MC74VHC1G08DFT2G_SC70-5 R6 48
3
1 @ 2 4.99K_0402_1%
42 GFXVR_PWRGD
R6 50 3.3K_0201_5%
+5VALW
3300P_0402_25V7K
2
+3VS 1 2
R6 53 49.9K_0402_1% VTTPWRGOOD 4
8
U 37B
1 2 1 2 5
P
+1.05VS +
1
R6 54 16.2K_0402_1% R6 51 10K_0201_5% 7
O R6 52
6 -
G
2.49K_0402_1%
1
R6 58 1 2VREF_393 2VREF_393 LM393DG_SO8
4
C5 85
2
56.2K_0402_1% 10/19 Delete H13 (H_3P0);
2 R6 57 change H2 from H_4P7 to
2
1 2 H_4P4; H28 from H_4P9 to

1M_0201_1%
H_4P8.
3.3K_0201_1% +5VALW
B 1 2 B
38 1.8VS_POK
R6 55 10K_0201_5% H2 H28 H1 H7
8
11.5K_0402_1% R 660 U 39A HOLEA HOLEA HOLEA HOLEA
1 2 1 2 3 4/9 update for M/E, Change
P
+1.5VS +
R6 56 1
O H3 H_3P3-->H_3P0, H10
2VREF_393 2
1
-
1
G
R6 59
1
LM393DG_SO8
4/23 Cancel H16 for H_2P5-->H_2P3
4
78.7K_0402_1%~D C 586 M/E PCB edge
H10 H3
2 3300P_0402_25V7K modify. HOLEA HOLEA H11 H12 H9
2
HOLEA HOLEA HOLEA

11/13 Change H2 from
1
1/4 Cancel H17 for H_4P4 to H_4P7; H28 from
1
M/Emodify. H_4P8 to H_4P9.
H24 H25
HOLEA HOLEA H 31 H20 H21
7/15 update for HOLEA HOLEA HOLEA
M/E, del H31
1
R6 61
8/18 update for
1
41.2K_0402_1%
2VREF_51125 2VREF_51125 1 2 M/E, add back H31
1
1
R 662 4/8 update for H26 H29
71.5K_0402_1% C5 87 +3VALW HOLEA HOLEA
1000P_0402_25V8J R6 63 2 1 1M_0201_1% M/E, del H6
2
C 2 C
2
R6 64 H23 H22
1
+5VALW 3.3K_0201_5% HOLEA HOLEA
1
8
U 39B H4 H5 08/28 update
1
R6 65 1 2 3.3K_0201_5% R 666 2 1 10K_0201_5% 5 HOLEA HOLEA
P
39 1.05VM_LAN_POK +
7 M_PWROK H30
O M_PWROK 14
+3VM R6 67 1 2 46.4K_0402_1% 6 HOLEA
-
G
1
1
+1.05VM R6 68 1 2 14.7K_0402_1% LM393DG_SO8

4
D42 R6 69
1
R6 70 1 2 1 2 1K_0201_5%
14,30,33 PM_SLP_M#
D43
3.3K_0201_5% 1N4148WS-7-F_SOD323-2 2 1
2
H14 H8
1
CH751H-40PT_SOD323-2 R6 71 1 2 1M_0201_1% HOLEA HOLEA

1
R6 72
86.6K_0402_1% C5 88
1 2
2
1
C 589 0.047U_0402_16V7K
2
3300P_0402_50V7K
Z ZZ1
FM1 FM2 FM3 FM4

1 1 1 1
D D
PCB-MB

POK CKT
1 2 3 4 5 6 7 8
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+3VALW Q39 +3VM

SI2301CDS-T1-GE3 1P SOT23-3 +1.05VM +3VM
+1.05VM_LAN +1.05VS
D
05/06 update to install C39 3 1
1
C5 90
SI7326DN-T1-E3_PAK1212-8
(330U_2V_B2_R15M) by HP
0.1U_0402_16V4Z
U40
1
C 592
0.1U_0402_16V4Z
R6 74 R6 75
G
1 request. 1 1
2
2 1 R 673 C5 91 470_0201_5% 470_0201_5%
5 3 47K_0402_5% 10U_0805_10V4Z
2
2 2
C5 93
10U_0805_10V4Z
C5 94
0.1U_0402_16V4Z
C5 95
0.1U_0402_16V4Z
C5 96
10U_0805_10V4Z
1
3
A C39 2 A
1 1 1 1
4
R 676 + R6 77 Q40A
1 2 1 2 L AN_EN Q40B
0_0402_5% 330U_B2_2VM_R15M 4.7K_0402_5% PM_SLP_M 2 L AN_EN 5
6
2 2 2 2 2 2N7002DWH 2N SOT363-6
R U N ON Q50A 2N7002DWH 2N SOT363-6
4
2N7002DWH 2N SOT363-6
14,30,39 PM_SLP_LAN# 2
1
07/08 update for INTEL S3 leakage issue. +1.5V +1.5VS
+1.05VM_LAN +1.05VM +1.5V +1.5VS_CPU_VDDQ
B+ +3VALW +3VS Q42
SI7326DN-T1-E3_PAK1212-8 SI7326DN-T1-E3_PAK1212-8
05/06 update to install C40 SI7326DN-T1-E3_PAK1212-8 AO4430L 1N SOIC-8
U41 U42 (330U_2V_B2_R15M) by HP U45 8 1
1 1 request. 1 7 2
1
2 2 2 6 3
0.1U_0402_16V4Z
10U_0805_10V4Z
1 5 3 5 3 5 3 5
C5 98
C5 99
C6 04
10U_0805_10V4K
C6 05
0.1U_0402_10V6K
C6 06
0.1U_0402_10V6K
C6 07
10U_0805_10V4K
R6 78 1 1
C6 00
10U_0805_10V4Z
C6 01
0.1U_0402_16V4Z
C6 02
0.1U_0402_16V4Z
C6 03
10U_0805_10V4Z
C6 24
0.1U_0402_16V4Z
C6 25
0.1U_0402_16V4Z
330K_0402_5% C5 97 1 1 1 1 1
4
1 1 1 1 C40 1 1 R6 81
2
4
2 10U_0805_10V4Z + 1 2
2 2 0_0402_5%
R U N ON 330U_B2_2VM_R15M 2 2 2 2
1
2 2 2 2 2 2 2 R U N ON
1
1
R 1104 C5 05
J2
B SHORT PADS R 679 R6 80 Q44A 0_0402_5% @ 0.01U_0402_16V7K B
62
820K_0402_5% 470_0402_5% R6 82 330K_0402_5% 2N7002DWH 2N SOT363-6 2

07/17 update
2
B+ 1 2 6 1
2
Q45A 1 R U N ON
SLP_S3 2 C6 08 R6 83 Add C626,C664 close to JDIMA1;
2N7002DWH 2N SOT363-6 0.01U_0402_16V7K 1 2
L
2
820K_0402_5% PM_SLP_M C656,C657 close to JDIMB1.
1
3
2
Q45B Q44B +1.5V +1.5VS_CPU_VDDQ

3 0,35 ADP_PRES 5 30,35 ADP_PRES 5
2N7002DWH 2N SOT363-6 2N7002DWH 2N SOT363-6 C 626 1 2 0.1U_0402_16V4Z
4
4
C 664 1 2 0.1U_0402_16V4Z
+3VL +3VL
+3VL C 656 1 2 0.1U_0402_16V4Z
C 657 1 2 0.1U_0402_16V4Z
1
1
R 685 R6 84 07/10 update for INTEL S3 leakage issue.
R6 86 100K_0201_5% 100K_0201_5%
100K_0201_5%
+5VALW +5VS
L Add C666,C667,C671 close to JP11.
2
SI7326DN-T1-E3_PAK1212-8
2
U43 SLP_S4
SLP_S4
1 PM_SLP_M SLP_S3
+5VS
0.1U_0402_16V4Z
2
3
6
5 3
C 609
1 1 2N7002DWH 2N SOT363-6 C 666 1 2 0.1U_0402_16V4Z

1 C6 10 Q50B Q43B Q43A
10U_0805_10V4Z 14,30,32 PM_SLP_M# PM_SLP_M# 5 14,23,29,30,32,35,37,38 SLP_S3# 5 14,24,29,39 SLP_S4# 2 C 667 1 2 0.1U_0402_16V4Z
4
C6 11 2N7002DWH 2N SOT363-6 2N7002DWH 2N SOT363-6

C 10U_0805_10V4Z 2 2 C 671 1 C
2 0.1U_0402_16V4Z
4
1
2
1/5 update for EMI PCI Issue.
R U N ON
07/01 update
+1.05VS +3VS +1.8VS +1.5V + VCCP +GFX_CORE +1.5VS_CPU_VDDQ
07/17 update BOM.

1
1
R6 87 R 688 R 691 R6 92 R6 99 R 702 R 1103
470_0201_5% 470_0201_5% 470_0201_5% 470_0201_5% 470_0201_5% 470_0201_5%
220_0402_5%
32
6 2
3 2
6 2
3 2
6 2
3 2
Q47B Q47A Q49A Q41A
SLP_S3 5 2N7002DWH 2N SOT363-6 Q49B 2N7002DWH 2N SOT363-6 Q41B Q52B
2N7002DWH 2N SOT363-6 SLP_S3 2 SLP_S3 5 SLP_S4 2 SLP_S3 5 SLP_S4 2 SLP_S3 5
2N7002DWH 2N SOT363-6 2N7002DWH 2N SOT363-6 2N7002DWH 2N SOT363-6 2N7002DWH 2N SOT363-6
4
4
07/08 update for INTEL S3 leakage issue.
+1.5VS +5VS
+0.75VS
05/06 Update R693 and Q53 become no
1
D install to avoid the +0.75VS leakage from D

1
R6 89 R 690
470_0201_5% 470_0201_5% R 693
DDR slot on S3 Mode for power saving.
09/10 update.
22_0402_5%
07/09 Update
3 2
6 2
Q48A
1
Q48B D
2N7002DWH 2N SOT363-6
SLP_S3 5 SLP_S3 2 SLP_S3 2 2008/09/15 2010/12/31 Title
2N7002DWH 2N SOT363-6 G
S Q53 DC/DC Circuits
4
2N7002_SOT23-3 Size D ocument Number Rev
1 2 3 4 5
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1 2 3 4
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ADP_SIGNAL
PJP1
4 V- ID 3 ADP_SIGNAL 29,41
5 V- ADPIN VIN
6 PL1
GND_1
V+ 1 HCB2012KF-121T50_0805 B++ PR37 51125_PWR
A 7 1 2 0_0402_5% A
GND_2 A DPIN 2 1 1 2
8 GND_3 1 2
1
PL3 PD22
100P_0402_50V8J
1000P_0402_50V7K
9 GND_4 V+ 2 HCB2012KF-121T50_0805 Vin PD12
1SS355_SOD323-2
1
PD8
1
PC1
PC4
@FOX_JPD1131-DB371-7F PC3 PR1 2 1 RLZ27V
100P_0402_50V8J @15K_0402_5%
2
PD1 PC2
2
1SS355_SOD323-2
@PJSOT24C_SOT23 1000P_0402_50V7K BATT
2
PR23
PD2 100_0805_5%
2 1 1 2
VMB PL2 BATT CH751H_SOD323-2
HCB2012KF-121T50_0805
PJP2 1 2
1
1 B+_DEBUG
1
2 1 2
B+_DEBUG PC15
2 PL4 0.1U_0603_50V7K
3
2
3
1
4 HCB2012KF-121T50_0805
4
5 5
6 PC5 PC6
2
GND
3
7 1000P_0402_50V7K 0.01U_0402_50V4Z
GND
@SUYIN_200275MR005G15UZL_5P
100_0402_5%
100P_0402_50V8J
100P_0402_50V8J
PD6 PD7
1
1
1K_0402_5%
100_0402_5%
B PJSOT24CW _SOT323-3 PJSOT24CW _SOT323-3 B
1
1
PR6
PR3
PC7
PR5
PC8
PC9
100P_0402_50V8J
2
2
+3VL
2
2
1
PR4
100K_0402_5%
AB1A_DATA 30
2
30 THM_MAIN#
AB1A_CLK 30
PD5
BAV99W T1G_SC70-3 PD3 PD4
1
BAV99W T1G_SC70-3 BAV99W T1G_SC70-3
+3VL
+3VL
2
PH1 under CPU botten side :

CPU thermal protection at 93 +-3 degree C
(Need to be checked)
C C
2VREF_51125
PR8
470K_0402_1%
1
1 2 VL
PH1
Close to CPU 100K_0603_1%_TSM1A104F4361RZ PR10
2
VL
100K_0402_5%
PR12 EN0 36
2
53.6K_0603_1% PU1
1 2 1 IN+
5
1
VCC+ D
1
2 GND
1 PQ1
OUT 4 2
PC12 PR16 G SSM3K7002FU_SC70-3
3 IN-
19.1K_0402_1% S
0.1U_0603_25V7K
2
3
1 2 LMV331IDCKRG4_SC70-5
2
2VREF_51125 PR13
75K_0402_1%
1
PR17 PC13
150K_0402_1% 1000P_0402_50V7K
2
2
D D
0.9
DC-IN/ BATTERY CONN
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DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C ustom LA-4902P
D ate: Tuesday, January 05, 2010 Sheet 34 of 47
1 2 3 4
A B C D
V IN
WWW.AliSaler.Com PQ101
P2
PQ102
P4
B+
P4
PQ103
AO4407L_SO8 AO4407AL 1P SO8 PR102 PL101 AO4407AL 1P SO8
1 8 8 1 0.01_2512_1% HCB2012KF-121T50_0805 1 8
2 7 7 2 1 4 1 2 CHG_B+ 2 7
3 6 6 3 3 6
5 5 2 3 5
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4
4
ACN
1
ACP
ACDET
+3VL
PC102
PC103
PC104
1 1 2 1 2 PR104 PC105 1
0.1U_0603_50V7K
PR103 1 2 1U_0603_6.3V6M
2
1
2
PC101 47K_0402_5% 56K_0402_1% 1 2
0.1U_0603_50V7K
1
1 2 PR105 PR106
PC108
PR101 15K_0402_5% 0_0402_5%
1
200K_0402_5% PC107 +3VL PC106
1 2
1
PR111 0.01U_0402_16V7K @0.1U_0603_25V7K
D CHG EN# CHG_B+ P2
150K_0402_5%
2
G
2
1
41 ADP_EN# S PQ104 PR110
3
VL SSM3K7002FU_SC70-3 10_0805_1%
LPMD
ACN
CHGEN
ACP
LPREF
ACSET
ACDET
5
TP 29 1 2
PR109
PR138
1 2 0_0402_5%
100K_0402_5% 1 2 8 28 1 2
BATT P2 14,23,29,30,32,33,37,38 SLP_S3# IADSLP PVCC
PC109 PC110
PR139 1U_0805_25V6K 0.1U_0402_10V7K 4 PQ105
1 2 9 27 BST_CHG 1 2 1 2 SIS412DN-T1_POW ERPAK8-5
PR135 1M_0402_5% AGND BTST PR121
8
100K_0402_1% BQ24740VREF PU101 0_0402_5%

1 2 3 1 2 10 BQ24740RHDR_QFN28_5X5 26 DH_CHG 1 2 BATT
P
3
2
1
+ PC111 VREF HIDRV PR145 PL102 PR112
O 1
1 2 2 1U_0603_6.3V6M +3VL 0_0402_5% 10UH_MMD-10DZ-100M-X1_6A_20% 0.01_1206_1%
-
G
PR136 PU105A 11 25 LX_CHG 1 2 1 2

VDAC PH
23.7K_0402_1%
100K_0402_1% LM393DG_SO8
4
1
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PD101
2
PR113 VA DJ 12 24 RE GN 2 1 PQ106
VADJ REGN
PR140
2 AON7406L PR141 2
453K_0402_1%
RLS4148_LL34-2 @4.7_1206_5%
13 23 DL_ CHG
2
2
EXTPWR LODRV
1
30 BAT_PW M_OUT 1 2 4
1 1
1 2 PR114
1
PR137 422K_0402_1% 14 22
2
ISYNSET PGND
1
24.3K_0603_1% PR115 PC126
DPMDET
1
PC112
PC113
PC129
PC114
PC115
PC128
IADAPT
PC116 1M_0402_1% PC118 @680P_0603_50V8J 1 2
SRSET
CELLS
3
2
1
2
1
1U_0603_6.3V6M 1U_0603_10V6K PC117
SRN
SRP
2
BAT
PR116 0.1U_0402_10V7K
2
22.6K_0402_1%
CELLS 30
2
2
15
16
17
18
19
20
21
PR117
PR118 100K_0402_5%
P2 +3VL
1 2
BATT
255K_0402_1% IADAPT
1
41 IADAPT
AC Detector
1
1
PR119
200K_0402_1% PR120
High 11.85 PC119
100P_0402_50V8J
2
22K_0402_5% Low 10.55
8
SRSET 41
2
5
P
+
O 7
1
1
6 ADP_PRES 30,33 2 1 CHGCTRL 30
-
G
PU103B PR122
PR123
1
41.2K_0402_1% LM393DG_SO8 210K_0402_1% PC120 PC121
4
2
1
PR124 0.1U_0603_50V7K @0.1U_0603_25V7K
147K_0402_1%
2
3
2VREF_51125 PC122 3
2
1U_0603_6.3V6M
2
+3VL +3VL
1 2
PR125
604K_0402_1%
Charge Detector
V IN P2
High 17.588 2 PR142
VL PR126 11K_0402_1% PU104 +5VALW
+3VL
Low 17.292 100K_0402_5% IADAPT 1 2 1 +IN
76.8K_0402_1%
@76.8K_0402_1%
PQ108
1
1
E
5
1
V+
1
1
PR128
PR127
B
2 MMBT3906H_SOT23-3 2
PC127 V-
PR132
2
2
C
PC124 22K_0402_5% 1U_0603_6.3V6M 4
PMC 30
2
1
0.1U_0402_10V7K PR129 OUT
3
2
-IN
8
220K_0402_5% PR146
2
3 47K_0402_5%
P
+
1 1 2 ACDET LMV321AS5X_SOT23-5
AC_ADP_PRES 30
1
O
1
2 CHG EN#
-
G
1
PU103A PR130 PD102
PR131 D
1
LM393DG_SO8 1K_0402_5% 1SS355_SOD323-2

PR133
4
10K_0603_0.1% CH GCTRL 1 2 2 1 2 300K_0402_5% 1 2

G
2
1
S PQ107 PR143
3
2
1
2VREF_51125 PC123 SSM3K7002FU_SC70-3 PR144 39.2K_0402_1%

1
0.047U_0402_16V7K 49.9K_0402_1%
PR134
4 Note: X7R type 4
2
2
470K_0402_5%
2

Charger
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DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4902P 0.9
A B C D
A B C D E
WWW.AliSaler.Com 2VREF_51125
1
PC302
1U_0603_10V6K
2
1 1
PR301 PR302
13.7K_0402_1% 30.9K_0402_1%
+3VALWP 1 2 1 2 +5VALWP
PR303 PR304
B+ B++
20K_0402_1% 20K_0402_1%
B++
PL301 1 2 1 2
HCB2012KF-121T50_0805
1 2 +3VLP
ENTRIP2
ENTRIP1
0.1U_0402_25V6
4.7U_0805_25V6-K
PR305 PR306
0.1U_0402_25V6
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
110K_0402_1% 100K_0402_1%
1
1
PC317
1 2 1 2
1
PC318
PC304
PC305
PC306
PC303
PC301
2
2200P_0402_50V7K
2
5
5
1
PC307
ENTRIP2
VFB2
TONSEL
VFB1
ENTRIP1
VREF
2.2U_0805_10V6K 25 P PAD
2
4UG1_3V 7 VO2 VO1 24 4
PQ302
2 PQ301 8 23 PR308 PC309 SIS412DN-T1_POW ERPAK8-5 2
SIS412DN-T1_POW ERPAK8-5 VREG3 PGOOD 0_0402_5% 0.1U_0402_10V7K
PR307
PR309 1 2 1 2 BST_3V 9 22 BST_5V 1 2 1 2 PR310
1
2
3
3
2
1
0_0402_5% VBST2 VBST1 0_0402_5%
PC308 0_0402_5%
PL302 1 2 0.1U_0402_10V7K UG_3V 10 DRVH2 DRVH1 21 UG_5V 1 2 PL303
4.7UH 20% FDVE0630-H-4R7M=P3 5.5A 4.7UH 20% FDVE0630-H-4R7M=P3 5.5A
2 1 LX_3V 11 20 LX_5V 1 2 +5VALWP
+3VALWP LL2 LL1
PQ304 LG_3V 12 19 LG_5V
DRVL2 DRVL1
1
SKIPSEL
1
AON7406L PR312
VREG5
VCLK
1 PR311 +3VL 2.2_1206_5% 1
GND
EN0
VIN
2.2_1206_5%
PC310 + +
2
150U 6.3V M B2 LESR45M PU301 4
2
13
14
15
16
17
18
1
4 TPS51125RGER_QFN24_4X4 PC311
1
2 2 150U 6.3V M B2 LESR45M
VL +5VLP
1
PR314
PC312 @100K_0402_5% PC313
3
2
1
2
1000P_0603_50V7K 1000P_0603_50V7K
2
1
2
3
2
RPGOOD 14
1
51125_PW R PQ303
IRFH3707TRPBF_PQFN8-3
1
PC316 1 2 B++
2
1
10U_0805_10V6K PR319
PR315 2VREF_51125 @0_0402_5%
@620K_0402_5% PC315
6 ENTRIP1
3 ENTRIP2
+3VEXTLP
2
2 PC314 22U_0805_6.3V6M
0.1U_0603_50V7K +5VLP
3 3
1
PU303
1
1 PC320
PQ305A PQ305B VIN PR322
1
220K_0402_5%
2N7002KDW H-2N_SOT363-6 2N7002KDW H-2N_SOT363-6 PC319 5 64.9K_0402_1% 2.2U_0805_10V6K
2
PJP301 10U_0805_10V6K VOUT
2 5 2
2
GND
PR325
+5VALW P 1 2 +5VALW (4.5A,180mils ,Via NO.= 9)
2
4
1
FB
PAD-OPEN 4x4m 3
2
EN
1
PJP303 22,31 DEBUG_KBCRST
1
PR316 1 2 +3VALW (3A,120mils ,Via NO.= 6) P2 APL5317 PR323
100K_0402_5% +3VALW P 20K_0402_1%
1 2 +5VLP PR326
VL PAD-OPEN 4x4m
2
1
PR317 470K_0402_5%
1
330K_0402_5% PU302
2
2 1 PJP302 PR320 1 PR324
KBC_PWR_ON 30 2 1 255K_0402_1% +IN 16.5K_0402_1%
+3VLP +VREG3_51125 5
2
V+
1
PAD-OPEN 2x2m 2
2
V- PR331 PD304
PR318 PJP304 4 1 2 2 1
OUT
1
100K_0402_5% 2 1 3
D +5VLP VL -IN
1
11.5K_0402_1%
PC321 680K_0402_5% 1SS355_SOD323-2
2
PR321
2 PAD-OPEN 2x2m
G 1U_0603_10V6K LMV321AS5X_SOT23-5
S 2
3
2
PQ307 2 1 PJP305
SSM3K7002FU_SC70-3 PD305 DEBUG_KBCRST 22,31 2 1
4
1SS355_SOD323-2 +3VEXTLP +3VL 4
PAD-OPEN 2x2m
2 1
PD301 VCC1_PWRGD 30,41
1SS355_SOD323-2
EN0 34
3.3VALWP/5VALWP
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A B C D E
A B C D
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1 1
B+ PL401
HCB2012KF-121T50_0805
1 2 VCCP_B+
0.1U_0402_25V6
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
+3VS +VCCP
1
1
PC416
PC401
1 2
PC402
PC403
PC404
PR427 PR401 PR417
2
2
10K_0402_5% @10K_0402_5% 1 2 1 2 0_0603_5%
PR402
BST_VCCP
0_0603_5% PC405
DH_VC CP
2
LX_VCCP
0.22U_0603_10V7K
+5VALW
32 VCCP_POK
DH_V CCP1
1
5
6
7
8
PR403
0_0402_5% PR404 PQ401
17
16
15
14
13
PU401 2.2_0603_5% AO4474L_SO8
1 2
UG
GND
PGOOD
PHASE
BOOT
+6269_VCC
2
4
1 VIN PVCC 12 1 2 PC406
+6269_VCC 2.2U_0805_10V6K
(18A,720mils ,Via NO.= 36)
3
2
1
2 11 DL _VCCP PL402
VCC LG 0.47U 20% FDVE0630-H-R47M=P3 17.7A
1
PC407 PR405 1 2
2
2.2U_0805_10V6K 0_0402_5%
+VCCP 2
1 2 3 10
2
FCCM PGND
330U_V_2VM_R6M
330U_V_2VM_R6M
330U_V_2VM_R6M
5
1
1 1 1
PR408
2.2_1206_5%
PC408
PC409
PC410
1 2 4 9 SE_VCCP 1 2 + + +
14,23,29,30,32,33,35,38 SLP_S3# EN ISEN PR407
PR406
COMP
FSET
8.06K_0402_1%
@0_0402_5%
2
2 2 2
VO
4
FB
1
2
1 2 ISL6269ACRZ-T_QFN16
32 VCCP_EN
5
8
PR428 PC412
PC411 PQ402
0_0402_5%
2
3
2
1
1
@10K_0402_5% +VCCP AON6718L 1N DFN 1000P_0603_50V7K
FB_ VCCP
22.6K_0402_1%
0.01U_0402_16V7K
1
1
PR409
49.9K_0402_1%
PR410
PC413
2
1
6800P_0603_50V7K
2
PC414
22P_0402_50V8J
2
1
PC415
2
3 3
1 2 1 2+VCCP
PR411 PR413
1.5K_0402_1% 10_0402_5%
1
PR412 1 2
1.96K_0402_1% PR414 VTT_SENSE 7
@0.1U_0402_25V6
0_0402_5%
2
PC417
2
1 2
PR415 VSS_SENSE_VTT 7
0_0402_5%
Need to close CPU chipset
4 4

1.05V_VCCP
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A B C D
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PJP604
+1.5V 2 1
PAD-OPEN 3x3m
1 PJP605 1
+1.5VS_CPU_VDDQ 2 1
PAD-OPEN 3x3m PU601

1 6
VIN VCNTL +5VALW
10U_0805_6.3V6M
@10U_0805_10V4Z
2 GND NC 5
1
3 VREF NC 7
1
PC601
PC602
To resolve +0.75VS to +1.5V_CPU_VDDQ timing issue
+5VALW PR601
4 8 PC603
2
1K_0402_1% VOUT NC 1U_0603_10V6K
2
9
2
TP
1
PR604
20K_0402_5% PR602 G2992F1U_SO8
1 2
14,23,29,30,32,33,35,37 SLP_S3#
6
10K_0402_5%
0.1U_0402_10V7K
PQ601A
+0.75VSP
1
PD601 2N7002KDW H-2N_SOT363-6
1SS355_SOD323-2 2 PR603
3
1 2 1K_0402_1%
1
PQ601B
1
2N7002KDW H-2N_SOT363-6 PC605
PC604
5 10U_0805_6.3V6M
2
1
4
PC606
2
.1U_0402_16V7K
2 2
PJP601
+0.75VSP 1 2 +0.75VS (2A,80mils ,Via NO.= 4)

PAD-OPEN 3x3m
Change +1.8VS VR
PR605
0_0402_5%
1 2
SLP_S3# 14,23,29,30,32,33,35,37
2
1
316K_0402_1% PC607
PR607 @0.1U_0402_16V7K
2
PR608
402K_0402_1% PU602
1
+1.8VSP 2 1 1 FB EN/SYNC 10
PC608 2 9 PL602
3 0.1U_0402_16V7K GND GND 1.2UH +-30% 1231AS-H-1R2N=P3 2.9A 3
PL601 1 2 3 8 1 2 +1.8VSP
HCB1608KF-121T30_0603 SW SW
+5VALW
1 2 4 IN IN 7
22U_0805_6.3V6M
22U_0805_6.3V6M
0.1U_0402_10v_X7R
10U_0805_10V_X5R
10U_0805_10V_X5R
1 2 5 BS POK 6 1.8VS_POK 32
@B340A_SMA2
PR609 PR606 1 1
1
2
PC611
PC610
PC609
PD602
PC613
PC614
0_0402_5% 11 4.7_1206_5%
TP
2
MP2121DQ-LF-Z_QFN10_3X3
2
2 2
1
PC612
680P_0603_50V7K
2
PJP602
+1.8VSP 1 2 +1.8VS (1.5A,60mils ,Via NO.= 3)

PAD-OPEN 3x3m
4 4

0.75VSP/1.8VSP
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A B C D
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PR516 PL501
2 1 +1.05VM_LAN_B+
14,30,33 PM_SLP_LAN# HCB1608KF-121T30_0603
0_0402_5% PC519 1 2 B+
1000P_0402_50V7K
0.1U_0402_25V6
@1000P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
2
1
PC504
PC505
PC506
PC507
1 1
PR511 PC511
2
5
0_0402_5% 0.1U_0402_10V7K
BST_1.05V 1 2 1 2
15
14
1
PU501 4 PQ502
PR524 PR509 SIS412DN-T1-GE3_POW ERPAK8-5
EN_PSV
TP
VBST
255K_0402_1% 0_0402_5% +1.05VMP_LAN
1 2 2 13 UG_1.05V 1 2 UG1_1.05V PL503
TON DRVH 2.2UH_PCMC063T-2R2MN_8A_20%
3
2
1
+1.05VMP_LAN 1 2 3 12 LX_1.05V 1 2
PR519 0_0402_5% VOUT LL
+5VALW 1 PR517 14.3K_0402_1%
+5VALW 2 4 V5FILT TRIP 11 1 2
1
PR518 PR503
+1.05VMP_LAN 1 2 5 10 +5VALW
316_0402_1% VFB V5DRV PR513
4.12K_0402_1% 1
1
1
6 9 LG_1.05V 2.2_1206_5%
PGOOD DRVL
1
PGND
PC520 PC521 +
GND
2
1U_0603_10V6K 1 2 4.7U_0805_10V6K 4
2
2
PC526 PC514 PC515
2
1
@10P_0402_50V8J TPS51117RGYR_QFN14_3.5x3.5 4.7U_0805_6.3V6K 2 220U_B2_2.5VM_R25M
8
1
PQ504 PC517
PR504 AON7702L_DFN8-5 1000P_0603_50V7K
3
2
1
2
10K_0402_1%
2
2 2
1.05VM_LAN_POK 32
PJP501
+1.05VMP_LAN 1 2 +1.05VM_LAN (8A,320mils ,Via NO.= 16)

PAD-OPEN 4x4m
PR521 PL504
2 1 1.5V_B+
14,24,29,33 SLP_S4# HCB1608KF-121T30_0603
0_0402_5% PC524 1 2 B+
1
1000P_0402_50V7K
0.1U_0402_25V6
@1000P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
2
1
PC501
PC502
PC508
PC509
5
PR510 PC510
2
0_0402_5% 0.1U_0402_10V7K
BST_1.5V 1 2 1 2
15
14
4
1
3 PU502 PQ501 3
PR523 PR508 SIS412DN-T1-GE3_POW ERPAK8-5

EN_PSV
TP
VBST
255K_0402_1% 0_0402_5% +1.5VP

1 2 2 13 UG_1.5V 1 2 UG1_1.5V PL502
3
2
1
TON DRVH 2.2UH_PCMC063T-2R2MN_8A_20%
+1.5VP 1 2 3 12 LX_1.5V 1 2
PR520 0_0402_5% VOUT LL
+5VALW 1 PR515 14.3K_0402_1%
+5VALW 2 4 V5FILT TRIP 11 1 2
1
PR522 PR501
+1.5VP 1 2 5 10 +5VALW
316_0402_1% VFB V5DRV PR512
10.2K_0603_0.1% 1
1
6 9 LG_1.5V 2.2_1206_5%
PGOOD DRVL
1
PGND
PC522 PC523 +
GND
2
1U_0603_10V6K 1 2 4.7U_0805_10V6K 4 PC513
2
PC525 4.7U_0805_6.3V6K PC512
2
1
@10P_0402_50V8J TPS51117RGYR_QFN14_3.5x3.5 2 330U_2.5V_B2_R15M
7
8
1
PC516
PR502 PQ503 1000P_0603_50V7K
3
2
1
2
10K_0603_0.1% AON7702L_DFN8-5
2
1.5V_POK 32
PJP502
+1.5VP 1 2 +1.5V (8A,320mils ,Via NO.= 16)

4 4
PAD-OPEN 4x4m

1.5VP/1.05VMP
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8 7 6 5 4 3 2 1
+VCCP
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H _VID1
2
2
1 PR266 1K_0201_5%
1 PR267 1K_0201_5%
H _VID0
H _VID1
2
2
1 PR280 @1K_0201_5%
1 PR281 @1K_0201_5%
CPU_B+
PL201
HCB2012KF-121T50_0805
2 1
H _VID2 2 1 PR268 1K_0201_5% H _VID2 2 1 PR282 @1K_0201_5%
B+
H H _VID3 2 1 PR269 @1K_0201_5% H _VID3 2 1 PR275 1K_0201_5% VID[5:3]=100 for SV CPU 48A 2 1 H
PL203
VID[5:3]=011 for LV CPU 35A
0.1U_0402_25V6
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
100U_25V_M
H _VID4 2 1 PR270 @1K_0201_5% H _VID4 2 1 PR276 1K_0201_5% HCB2012KF-121T50_0805
4.7U_0805_25V6-K
4.7U_0805_25V6-K
1
PC206
7 H _VID0 H _VID0 H _VID5 2 1 PR271 1K_0201_5% H _VID5 2 1 PR277 @1K_0201_5%
1
PC201
PC203
PC204
+
1
PC202
PC207
PC208
7 H _VID1 H _VID1 H _VID6 2 1 PR272 @1K_0201_5% H _VID6 2 1 PR278 1K_0201_5%
2
H _VID2 P ROC_DPRSLPVR 2 1 PR273 1K_0201_5% P ROC_DPRSLPVR 2 1 PR279 @1K_0201_5% 2
7 H _VID2
2
5
7 H _VID3 H _VID3
7 H _VID4 H _VID4
7 H _VID5 H _VID5 PR208 PC209 UGATE1_CPU24

0_0603_5% 0.22U_0603_10V7K
7 H _VID6 H _VID6 BOOST_CPU2 2 1 1 2 PR249 PQ201
0_0603_5% IRFH7914TRPBF
UGATE_C PU2 2 1 PL202
3
2
1
G 0.36UH 20% PCMC104T-R36MN1R105 30A G
14,30 P GD_IN PR209 1 2 220_0402_5% PM_PWR OK PHASE_CPU2 1 4 + CPU_CORE

L F2 2 3 V 2N
3.65K +-1% 0603
10K_0402_1%
7 P ROC_DPRSLPVR P ROC_DPRSLPVR
1
2.2_1206_5%
PQ202
1
PR211
PR213
PR214
TPCA8028_PSO8 PR216
11 CLK_EN# 1_0402_5%
+3VALW LGATE_CPU2 4 PR220
2
PR215 @0_0402_5%
2
47K_0402_1% 1 2 V 1N VSUM-
1000P_0603_50V7K
1 2 CLK_EN#
1
PR219
3
2
1
PC210
0_0402_5%
1 2
2
12,14 VGATE ISEN2
VSUM+
+VCCP 2 1 PR221 @1K_0402_5%
F F
7 PSI# PSI#1 2 PR222 0_0402_5%
2 1 PR283 1K_0402_5%
1 2
PR223 147K_0402_1%
PC211
1 2 1U_0603_10V6K
40
39
38
37
36
35
34
33
32
31
+ VCCP
PR224 PU201 1 2
68_0402_5%
CLK_EN#
VID6
VID5
VID4
VID3
VID2
VID1
VID0
DPRSLPVR
VR_ON
1 2
4 H_PROCHOT# PR225 30
0_0402_5% BOOT2
29
UGATE2
1 28
PC220 @56P_0402_50V8 PGOOD PHASE2
2 27
PSI# VSSP2
1 2 3 26
RBIAS LGATE2
4 25 +5VALW
PR227 @4.02K_0402_1% VR_TT# VCCP
E 5 24 E
NTC PWM3
1 2 1 2 6 23
PH202 VW LGATE1
7 22
@470K_0402_5%_TSM0B474J4702RE COMP VSSP1
8 21
FB PHASE1 PR228
1 2 9
ISEN3
UGATE1
10 0_0402_5%
BOOT1
ISUM+
ISEN2
ISEN1
ISUM-
8.06K_0402_1%
1000P_0402_50V7K
VSEN
IMON
PC221 1 2
VDD
RTN
VIN
22P_0402_50V8J 41
AGND
1
2
PC222
@0_0402_5%
1
PR235
PR229
ISL62883HRZ-T_QFN40_5X5
11
12
13
14
15
16
17
18
19
20
2
390P_0402_50V7K PC223
2
1 2 1 2 1U_0603_10V6K
2
PR236
562_0402_1% PC224
+5VALW PR239 0_0402_5%
1 2 1 2 1 2
PC225
10P_0402_50V8J PR238 PR242 0_0402_5% IMVP_IMON 7
D 2.87K_0402_1% 1 2 CPU_B+ D
0.047U_0603_16V7K
1 2 1 2
PC227 PR241
150P_0402_50V8J 412K_0402_1% PR244 1_0402_5%
1 2 CPU_B+
+5VALW
1
1
1
PC228
PC229
PC230
1U_0603_10V6K
0.22U_0603_25V7K
ISEN2 PR246
0.22U_0603_10V7K
0.22U_0603_10V7K
10K_0402_1%
2
0.1U_0402_25V6
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
ISEN1
2
4.7U_0805_25V6-K
4.7U_0805_25V6-K
1
1
PC231
VSSSEN SE BOOST_CPU1
SV LV
PC232
PC233
PC234
PC238
PC239
PR274
1
LL=-1.9 LL=-3
PC236
PC237
0_0603_5%
2
UGATE_C PU1 2 1 UGATE1_CPU1 4
2
VSUM-
PR238 2.87K 3.92K PR248 PC240
C 0_0603_5% 0.22U_0603_10V7K PQ205 C
3
2
1
VSUM+ IRFH7914TRPBF
PR260 1.3K 1.1K 2 1 1 2
PL204
82.5_0402_1%
0.36UH 20% PCMC104T-R36MN1R105 30A

PR246 10K 10.7K PHASE_CPU1 1 4 + CPU_CORE
1
0.022U_0402_16V7K
2.61K_0402_1%
PR252
0.22U_0603_10V7K
L F1 2 3 V 1N
1
2.2_1206_5%
PR250
PR253
0.01U_0402_16V7K
3.65K +-1% 0603

7 V CCSENSE 1 2 PQ206
1
10K_0402_1%
TPCA8028_PSO8
2
PR251 0_0402_5% PR257

PC242 2
PC243 2
1
PR255
PR256
1_0402_5%
2
1
PC244 LGATE_CPU1 4
PC245
@10KB_0603_5%_ERTJ1VR103J
10KB_0603_5%_ERTJ1VR103J
330P_0402_50V7K PR259
2
2
1000P_0603_50V7K
@0_0402_5%
2
1
1 2 V 2N VSUM-
PC246
3
2
1
330P_0402_50V7K
2
1
B B
11K_0402_1%
PR260
1
PC248
PR262
PH201
PH203
PC247 1.3K_0402_1%
1000P_0402_50V7K 1 2
PR263 0_0402_5% ISEN1
2
7 VSSSENSE 1 2 VSUM+
2
PC249 @100_0402_1%
1 21 2 VSUM-
@1200P_0402_50V7K PR265
0.1U_0402_10V7K
1
PC250
2
A A
CPU_CORE
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5 4 3 2 1
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1
PR1000
165K_0402_1%
PC1000
2
0.22U_0603_10V7K
1 2
PU1000 +5VS
0.01U_0402_16V7K
35 IADAPT 1 2 1 +IN
D PR1013 D
10K_0402_1% 5
V+
2 V-
PC1001
OUT 4
3
2
-IN
1
LMV321AS5X_SOT23-5
1
PR1017
2K_0402_5%
PR1018
2
76.8K_0402_1%
2
PD1001
1SS355_SOD323-2
PD1000 +3VS
SRSET 35
1
ADP_SIGNAL 1SS355_SOD323-2
1
PQ1003 C
D
1 2 3 1 2 1 1 2 2 PQ1005
2
3.9K_0402_5%
PR1022 PR1028 B MMBT3904W H_SOT323-3
1
100_0402_5% NDS0610_NL_SOT23-3 1 100K_0402_5% E
3
PR1025
3900P_0402_50V7K
PR1019
G
2
10K_0402_5%
1 2OC P_A_IN OCP_A_IN 30
1
2
PC1003
PR1032
1
100_0402_5% 1 2 OCP# 15
C PR1020 C
0_0402_5%
PD1003
D
1
GLZ4.7B_LL34-2 PR1033 @0_0402_1%
2
1 2 2
30 OCP G
V IN
27.4K_0402_1%
PR1034 200K_0402_1% S
3
1
1 2 PQ1004
PR1031
SSM3K7002FU_SC70-3
1
+5VS
PR1030
68K_0402_5%
8
PR1029
1 2 5 PR1035
P
2
+
O 7 1 2 +3VS
100K_0402_1% 6 -
G
1
10K_0402_5%
1
PU1004B
0.01U_0402_16V7K
PR1040
4
PC1004
33K_0402_5% LM393DG_SO8
2
1
2
PR1042 ADP_EN# 35 1 2 +3VL

8.06K_0402_1%
100K_0402_1%
PR1027 100K_0402_1%
4.7K_0402_5%
PR1026
2
1
PR1045
+3VL
2
1
3
3
B B
8.66K_0402_1%
E
PQ1007B
2
PR1046
B
2 2N7002KDW H-2N_SOT363-6
C 5 VCC1_PW RGD 30,36
PQ1006
2
MMBT3906H_SOT23-3
4
8
3
P
AD P_A_ID +
2 1 O 1
2 -
G
PD1004
1
1SS355_SOD323-2 PU1004A
4
PR1059 LM393DG_SO8
45.3K_0402_1%
2
PQ1007A
2N7002KDW H-2N_SOT363-6
2VREF_51125
1 2 2 ADP_EN 30
PR1062
1M_0402_5% +3VL
1
1
VL
PR1063
130K_0402_1% PR1064
22K_0402_5%
8
2
5
P
+
A O 7 ADP_DET# 30 A
1
6 -
G
PR1065 PU105B
10K_0402_1% LM393DG_SO8
4
2
1 2AD P_A_ID ADP_A_ID 30

PR1066
10K_0402_5%
ADP_OCP
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PL701
B+ HCB2012KF-121T50_0805
1 2 GFX_B+
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
0.1U_0402_25V6
2
PL703
7 GFXVR_IMON
HCB2012KF-121T50_0805 PR702
1
D 1 2 0_0402_5% 1 2 D
PC701
PC727
0.22U_0603_25V7K
0.22U_0402_6.3V6K
PR701 PR715
PC702
PC703
PC704
PC705
22.6K_0402_1%
+5VALW 2 1 0_0402_5%
1 1
1
1_0402_5%
1
PC707
PR703
PC708
PC706
2
1U_0603_10V6K
2
PR704
10_0402_5%
ISUM+ VSS_AXG_SENSE 7
1 2
5
6
7
8
ISUM- PQ701
1 2 BST_GFX 1 2 1 2 AO4474L_SO8
7 VSS_AXG_SENSE PC709
1
1000P_0402_50V7K PR705 PC710
PC711 0_0603_5% 0.22U_0603_10V7K 4
7 VCC_AXG_SENSE 330P_0402_50V7K
29
10
11
12
13
14
1 2
2
9
PR706
+GFX_CORE 10_0402_5% PC712
ISUM
AGND
RTN
VDD
VIN
IMON
ISUM+
BOOT
1 2 330P_0402_50V7K PR733
3
2
1
0_0603_5%
7 VSEN UGATE 15 DH_GFX 1 2 DH_GFX1 PL702

0.56UH +-20% PCMC104T-R56MN 25A
6 PU701 16 LX_GFX 1 2
FB ISL62881HRZ-T_QFN28_4X4 PHASE +GFX_CORE
5
5 COMP VSSP 17
1
C 4 VW LGATE 18 DL_GFX C
PR707
PR713
1
PR711 PC717 PR712 2 1 3 19 1 2 +5VALW 2.2_1206_5%
PR710 825K_0402_1% 1000P_0402_50V7K 47K_0402_1% RBIAS VCCP PR708 PR709
0_0603_5% 4
1
10.5K_0402_1% 2 20 3.65K_0603_1% 0_0402_5%
2
PGOOD VID0
2 1 1 2 1 2 2 1
PH701
1000P_0603_50V7K
1 21 PC718
DPRSLPVR
2
CLK_EN# VID1
2
PC716 2.2U_0603_10V7K 1 2 1 2
3
2
1
+GFX_CORE
PC719
100P_0402_50V8J PQ702
VR_ON
PR714
AON6718L 1N DFN 10KB_0603_5%_ERTJ1VR103J
VID6
VID5
VID4
VID3
VID2
1
PC721 2.61K_0402_1%
22P_0402_50V8J (15A,600mils ,Via NO.= 30)
2 1 2 1 1 2 2 1
28
27
26
25
24
23
22
PR717
@1.91K_0402_1%
@10K_0402_1%
1 2
11K_0402_1%
1
1
PC720 PR735 PR734
PR719
PR720
150P_0402_50V8J 17.8K_0402_1% 8.06K_0402_1%
PC722
1 2
2
0.1U_0402_16V7K
32 GFXVR_PW RGD
1 2
PC724
GFXVR_CLKEN#
2
0.1U_0402_16V7K
GFXVR_VID_0 7 PR723 PR725
GFXVR_VID_1 7
GFXVR_VID_2 7 3.01K_0402_1% @100_0402_1%
B PR729 B
GFXVR_VID_3 7 82.5_0402_1%
1
GFXVR_VID_4 7
GFXVR_VID_5 7 1 2 1 2
GFXVR_VID_6 7
2
0_0201_5% 2 1 PR731 PC725
0_0201_5% 2 PR732 GFXVR_EN 7 0.01U_0402_16V7K PC726
1 GFXVR_DPRSLPVR 7
@1200P 50V K X7R 0402
1
ISUM+
ISUM-
A A

VCCGFX
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Version change list (P.I.R. List) Power section Page 1 of 1

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Item Reason for change PG# Modify List Date Phase
To best solve the issue of +15V combo adapter
1 For all SMSC1098 platforms, please change 35 (airline adapter) detect, reserve PR127, Add
the signal "AC_AND_CHG" to "AC_ADP_PRES". 2009/5/4 DB-2
PR128 76.8K +-1% 0402.
PR1042 change the value from 21K +-1% 0402 to 8.06K +-1% 0402.
This is to keep up with AC adapter table changes made 41 PR1059 change the value from 24.9K +-1% 0402 to 45.3K +-1% 0402.
2 in KBC code. 2009/6/29 SI-1
PR1046 change the value from 4.12K +-1% 0402 to 8.66K +-1% 0402.
D D
PR604 change the value from 10K to 20K.

Change PR604 to 15K to resolve +0.75VS to PD601 add the component 1SS355.
38 2009/8/28 SI-2
3 +1.5V_CPU_VDDQ timing issue seen on Cartier/Dior/Versace. PC606 add the component 0.1uF_0402_16V7K.
Add PC316 10U_0805_10V6K

To workaround TPS51125 turn on abnormal issue, PC307 change the value from 10U 6.3V M X5R 0805
4 need to make sure total caps on +5VL rail is at least 36 to 2.2U 10V K X5R 0805. 2009/8/29 SI-2
30uF. Currently only have 20.2uF. PC315 change the vlaue from 10U 10V K X5R 0805
H1.25 to 22UF 6.3V M X5R 0805 H1.25.
5 The +1.8VS power rail is very inefficient and

36 Change +1.8VS VR schematic. 2009/9/16 SI-2B
want to change to a better solution.
Reserve PR229 / 0_0402_5% and

For ULV CPU design reserve. 40 2010/01/04 MV
6 PH203 10KB_0603_5%_ERTJ1VR103J
C C
B B
A A
Security Classification Compal Secret Data

Title
Compal Electronics, Inc.
Issued Date 2008/09/15 Deciphered Date 2010/12/31
Changed-List History
Size D o c ument Number R ev
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LA-4902P 0.9
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WWW.AliSaler.ComI tem Fixed Issue and change item
Reduce un-install parts for XDP-CPU

PA GE
4 Del R4, R6, R8, R11, R40, R41, R43, R48, R49
Mod ify List
M. B. V er.
0.1
<2009.01.12> 1
2 Add test points at XDP-CPU 4 Add T112, T113 0.1
3 Reduce eDP lane to meet panel resolution. 5 Reduce lane1, 2 0.1
D
4 Add 1uf Caps to meet Intel design gude at +VCAP0, +VCAP1 7 add Caps account to 12pcs 0.1 D
5 Add 1uf Caps to meet Intel design gude at +Vccp 8 add Caps account to 24pcs 0.1
6 Add L31 at +VTT_DDR 7 add L31 0.1
7 Add L32 at +VDDQ_CK 7 add L32 0.1
8 Change R171 net name at XDP-PCH 12 Change USB_OC#6 to PCH_XDP_GPIO10 0.1
9 Add R190 at XDP-PCH 12 add R190 & USB_OC#4 0.1
10 Change pull up for Intel Design Guide 13 change pull up to contact to R206 pin1 0.1
11 Remove LVDS for HP request 14 Remove LVDS-A channel 0.1
12 change value for HP request 15 change R270, R274 value to 39ohm 0.1
13 Add Resisters for XDP-PCH 15 Add R351, R265 0.1
14 Change R295 net name at XDP-PCH 15 Change USB_OC#7 to WOW# 0.1

C C
15 Change value 25 Change R451 tolerance to 1% and C441 tolerance 0.1
16 Change value 25 Change C428 value to 1000P 0.1
<2009.01.14> 12 Remove SATA-2 channel

1 Remove E-SATA for HP request 0.1
24 Remove E-SATA support circuit
2 Change USB group for HP request 15 Change USB-1 from Right side to Rear-1 side 0.1
3 Modify Audio circuit 26 Add FET and support circuit for SENSE.
27 Change Audio jack 0.1
pin1 &
4 Add 4.7Kohm pullup to +3V and a 0.01uF capacitor at HDA_RST# 26 Add R703, C637 0.1
5 Change Audio Gain dB 26 R486 & R491 install ; R485 & R492 un-install. 0.1
<2009.01.15> 1 Delete channel-C signals of DP 14 Delete channel-C signals of DP 0.1
B
2 Change power USB control method 24 change Power USB solution to one chip control solution 0.1 B
3 change Audio Dock Line in / out sense circuit 26 change R510, R515 value to 100k and R510, R515 pin1 contact to A-GND 0.1
4 Add Ext-Mic Amp. 27 Add Ext-Mic Amp. 0.1
<2009.01.16> 1 Change XDP-CPU net 4 JP4 [28,30] connect to CFG [10:11]. JP4 [34,36] connect to CFG [6:7]. 0.1
0.1
2 Change eDP_AUXN contact to CPU pin 5 MB_C_DP_AUXN should connect to U1A.D19.
0.1
3 Remove CFG7 (No support) 5 delete R71.
0.1
4 Add pull up for HP request 7 Add 10K (R705) NI pull-up to +VCCP on GFXVR_EN.
0.1
5 GFX_CORE needs high frequency decoupling. 7 Add 16x0402 1uF caps.
6 VTT pins contact wrong power source 7 Change VTT pin to +VCCP 0.1
7 CPU_CORE missing high frequency decoupling. 7 Add 25x0402 1uF caps. 0.1
8 Change LAN power source control method 21 C330 - C333, C329, R383, R386, Q21uninstall and change "LAN_CTRL_18" to "LAN_CTRL_10" 0.1
A A
9 Add USBP6 for support WiMax. 22 Add USB channel 6 0.1
15

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KAT10 from DB-2 to SI-1 LA-5251P REV:0.2 -> 0.3 Modify <2009.06.08.~2009.07.02. >
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Rev. Item Date Impact
0.3 1 6/12 CKT,Layout
Page
29
Change Cause
-To avoid Docking side DP monitor signals back drive PCH during S3/S4/S5 <HP>.
Modify Description
-Change JP30 Pin 8 connection from NC to SLP_S3#
0.3 2 6/12 CKT,Layout 29 -New add SATA_LED# to monitor stand port <HP>. -Change JP30 Pin 39 connection from NC to SATA_LED#
0.3 3 6/14 CKT,BOM,Layout 18,29 -Change CRT Switch design from TI/TS5A3157 to MAXIM/MAX4885E -Add U13,R319 (10K_0402);Remove and Del C550,C551,C552,Q12,U11,U12,U29,U30,U31,R320,R321,R327,R328,R329,R330;Del D5,D6,D7.
for Layout Quality improve also Components reducing. <Compal>
0.3 4 6/16 BOM 19 -Correct the DP design. <HP> -Make R338 & R344 no install. Make R332 & R337 installed.
0.3 5 6/16 CKT,Layout 23 -Current placement of C933 is ineffective to limit inrush current.<HP> -Change net connection and move C933 to in between R1079.2 and R1077.1.
D
0.3 6 6/16 CKT,Layout 13 -Add back the 25MHz XTAL_IN circuit for Intel workaround on sighting #400750 - -Reserve back the 25MHz design circuit. (Reserve Y3, R210,C199); Move R1093 to close to Y3 and C199. D
3306048 - 96MHz jitter.<HP>
0.3 7 6/16 CKT,BOM,Layout 26 -Audio Amp Int. regulator design concern.<HP> -Add R490 (100K_0402) close to U24.25 to connect U24.25 and PLT_RST#.
0.3 8 6/16 CKT,BOM,Layout 15,20 -To leverage the LDO regulator of the camera modules.<HP> -1.Change R365 from 0_0201 to 0_0402. Change R569,R613 from 100K_0201 to 100K_0402.Change R377 from 100K_0201_1% to
100K_0402_1%.
2.Rename WEBCAM_OFF to WEBCAM_ON and connect PCH GPIO37(U7.AB13) through WEBCAM_ON_R by R375(0_0402) to JEDP1.18.
3.Connect +5VS_WEBCAM to +5VS through R304 (0_0603) close to JEDP1.24 and move C316~C319 close to JEDP1.24. Del
Q17,C315,C321,R360-R362,R367,R373.
4.Change U7.AB13 and R287.1 connection from PCH_XDP_GPIO37 to WEBCAM_ON. Change R287 from 10K_0201 to
@10K_0402(uninstall).
5.Change U7.F16 connection from WEBCAM_OFF to USB_OC#2 and add pull-high R301(10K_0201) to +3VALW.
0.3 9 6/17 CKT,Layout 28 -Correct the TouchPoint pin connection.<Compal> -Correct JP27 connection from currently Pin1:+5VS,Pin2:RIGHT,Pin7:GND,Pin8:GND to Pin1:RIGHT,Pin2:NC,Pin7:NC,Pin8:+5VS.
0.3 10 6/18 CKT,Layout 16 -Simplify the reserve circuit.<HP> -Del C277(@10U_0603). Move C276 and related routing to bottom layer 0 mm limit high area without vias.
0.3 11 6/18 CKT,Layout 30 -Design Change for KBC I/F power rail synchronize.<HP> -Change U8.5 power from +3VALW to +3VL.
0.3 12 6/18 CKT,BOM,Layout 24 -Add common mode chokes on all USB walk-up ports to address PCH EMI -Change JP13,JP14,D18,D19,D20 USB pairs net connection and add or reserve R352,R350,R354,R353,R360,R355,L8,L9,L19,L26. Change
issue on full/low speed USB devices.<HP/INTEL> R443,R444 from 0201 to 0402 and also the net connection.
0.3 13 6/18 CKT,BOM,Layout 30 -Design Change for KBC I/F power rail synchronize.<HP> -Change U8.5 power from +3VALW to +3VL.
0.3 14 6/18 CKT,BOM,Layout 19 -Add fuse (0.5A) for DP Safty solution.<Compal> -Add F2(FUSE) between R349.2 and JDP1.20 for Safty solution.
0.3 15 6/22 CKT,Layout 16 -Layout Placement Limitation.<Compal> -Del C277(@10U_0603) and C276, add the test points T126,T127 for the ball pins.
C C
0.3 16 6/25 CKT,Layout 22 -Change 1.8"HDD design from cable to Board to Board connection.<HP> -Del JHDD1 and JHDD2 Cable design. Add JHDD3 B to B directly connect design.
0.3 17 7/1 CKT,Layout 25 -Need to add ESD protection to SC_DATA, SC_RST, & SC_CLK.<HP> -Reserve D54,D55,D56 ESD protection design as what Ricoh recommend.
0.3 18 7/1 CKT,BOM,Layout 11 -Reserve Low Power CLK Gen design.<Compal> -Modify U6 Pin1,17,24 connection from +3VS_CK505 to +3VS_CK505_G (+3VS and +1.5VS option for tuture); Add R143(0ohm_0603)
to +3VS and reserve R120(@0ohm_0603) to +1.5VS but place close to U6.
0.3 19 7/1 CKT,BOM,Layout 12,20 -Make the LID_SW# design change for leakage issue fix.<HP> -Change Q56.5 from DISP_OFF# to LID_SW#; Del D10(DAP202U); Add R361(10K_0402) close to U7; Add D57(CH751H); Remove
R356(10K_0402);Change U7.J30 and R135.2 connection from LID_SW# to LID_SW#_ISO#.
0.3 20 7/1 CKT,BOM,Layout 13 -Fix INTEL Chipset Issue impact DP function. <HP/INTEL> -Del T122, Del R1093(0_0402) and replace by add C200 (18P); Install R210,Y3,C199 by Intel finalized DP workaround and need them.
0.3 21 7/1 CKT,BOM,Layout 13,21 -Follow INTEL Design Change. <HP/INTEL> -Remove R388 (0_0201); Connect U14.48 through add R407 (0_0402) to U7.U4 (R202.2) by INTEL request.
0.3 22 7/1 CKT,BOM,Layout 30 -Follow SMsC KBC Chip Design Change and VCC1 decoupling improve. <HP/SMsC> -Add C565 (0.1U_0402) on and close to U32.14 for VCC1 decoupling improve by SMsC request; Change C559 from 4.7UF_Y5V to 4.7UF_X5R.
0.3 23 7/1 CKT,BOM,Layout 30,14,22 -Design simplify on both EE and PWR from HP. <HP> -Del D37(@CH751H) and related. Remove R246,R422,and delete PR217.
Add 1K VGATE to PGD_IN resistor at PCH pin M6. Connect PGD_IN through add R408 (1Kohm_0402) to PCH U7.M6.
0.3 24 7/1 CKT,BOM,Layout 33 -Add +VCCP and +GFX_CORE discharge circuit. <HP> -Add R699,R702,Q41 for +VCCP and +GFX_CORE discharge
0.3 25 7/1 CKT,BOM,Layout 22 -Half size mini card I/F transfer design reserve for future. <Compal> -Del T87, Add R475 (0_0201) and R453 (0_0402); Reserve R433,R437,R432,R421,R431,R441 close to JP6 bottom layer under the module
area for reworkable.
0.3 26 7/1 CKT,Layout 22 -Update the Symbol and PCBFootprint for meet. <Compal> -Update JODD1 PCB Footprint from ALLTO_C18522-11303-L_13P_NR to TYCO_2023233-3_13P_NR
0.3 27 7/2 CKT,BOM 15 -Simplify the design for save power consumption. <HP> -Change R279 from 10K_0201 to 100K_0201.
0.3 28 7/2 CKT,BOM,Layout 23 -Design change for WWAN Power Rail. <HP> -Change R1077.1,C933.1,Q77.3,J3.2 connection from +3VS to +3VALW for WWAN power rail. Install C933(1000P_0402) in order to slow
+3V_WWAN bring-up
B
0.3 29 7/2 CKT,Layout 15 -Design change for LAN_DIS#. <HP> -LAN_DIS# R298 should be pulled-up to +3VM_LAN instead of +3VALW. B
0.3 30 7/2 CKT,BOM,Layout 12 -Design change for LID_SW#. <HP> -Delete R135 since it is a duplicate. Change R361 to 100K_5%. Add 100K_5% pull-up to +3VL on LID_SW# and close to U32.64.
0.3 31 7/2 CKT,BOM 30 -Update the Board ID setting for SI-1. <HP> -For SI-1 Board ID detect, make R574 installed & make R575 no install.
0.3 32 7/2 CKT,BOM 30 -Simplify the design for save power consumption. <HP> -Remove R589 on KBRST# pull-high to +3VL. Change R607 on PM_RSMRST# from 10K to 100K to reduce current.
0.3 33 7/2 CKT,Layout 31 -Design change the USB I/F FPR ESD solution. <HP> -Change the ESD diode (D39.4) power supply from +3VALW to +5VALW.
0.3 34 7/2 CKT,BOM 31 -Simplify the design for save power consumption. <HP> -Remove R626 (0_0201) since there is an internal pull-down in U34.
0.3 35 7/2 CKT,Layout 28 -Reserve Caps solution on STB_LED# for EMI verify. <Compal EMI> -Reserve C536(1000P_0402) Cap on STB_LED# close to JP22.8 for EMI noise issue verify.
0.3 36 7/3 CKT,Layout 23 -New Card Power Switch design change for portload test improve. <TI> -Connect U17 pin 12 and 14;pin2 and pin4;pin11 and 13;pin3 and 5 for express card portload test.
0.3 37 7/3 CKT,BOM,Layout 12,13 -GPIO13 has internal pull-down which is source of leakage. <HP> -Change U7.J30 connection from LID_SW#_ISO# to T122. Change U7.B9 connection from SMBALERT# to LID_SW#_ISO#. Del R193
(10K_0201) +3VALW PH.
0.3 38 7/3 CKT,Layout 20 -Current draw on INVPWR_B+ could be very high.<HP> -Change JEDP1 pin6 connection from +3VS to INVPWR_B+.
0.3 39 7/3 CKT,BOM,Layout 30 -Save one resistor but also reduce the two long traces.<HP> -Del R594 (220_0402) (PM_PWROK)
A A

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KAT10 from SI1 to SI1-R LA-5251P REV:0.3 -> 0.4 Modify <2009.07.07.~2009.07.14. >
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0.4 1 7/8
Page
CKT,BOM,Layout 32
Change Cause
-To fix INTEL CPL S3 Power Leakage Issue <INTEL>.
Modify Description
--Update U38 Symbol. Add one new signal "VCCP_1.5VSPWRGD" be generated from VCCP_EN through an new add AND gate U77 to R12.2 .
0.4 2 7/8 CKT,BOM,Layout 4,15 -To fix INTEL CPL S3 Power Leakage Issue <INTEL>. --Change R12.2 connection from +1.5V to VCCP_1.5VSPWRGD. Change R12 from 1.1K_0402_1% to 4.99K_0402_1%; Change R13 from
3K_0402_1% to 2.49K_0402_1%. Change U1.BJ12 connection from DRAMRST# to SM_DRAMRST# by add Q52 which control by
PCH_DDR_RST new connect from U7.F10 (PCH GPIO8)(GPIO8-->PCH_DDR_RST) and with add R1093 (1K_0402) PH to +1.5V, add R1092
from @10K_0402 to 100K_0402.
0.4 3 7/8 CKT,BOM,Layout 33 -To fix INTEL CPL S3 Power Leakage Issue <INTEL>. --Add new Power from +1.5V to +1.5VS_CPU_VDDQ by add U45,C624,C625,R1104 close to C152; Add +1.5VS_CPU_VDDQ discharge circuit
by add R1103(470_0402) and Q52B (already exist) close to U45.
D D
0.4 4 7/8 CKT,BOM,Layout 7,10 -To fix INTEL CPL S3 Power Leakage Issue <INTEL>. --Change U1 VDDQ Power source from +1.5V to +1.5VS_CPU_VDDQ but keep C20~C27 at the same place; Del C145,C146,C119,C120
10UF_0603 reserve for U45 and related placement.
0.4 5 7/9 CKT,BOM,Layout 32 -To fix INTEL CPL S3 Power Leakage Issue <INTEL>. --Change U77.1 connection from VCCP_EN to SLP_S3# reserve through R6(@0_0402) or to +3VALW through R4 (8.2K_0402).
0.4 6 7/9 CKT,BOM 33 -To fix INTEL CPL S3 Power Leakage Issue <INTEL>. --Install R693 (470_0201) and Q53 (2N7002).
0.4 7 7/9 CKT,BOM,Layout 4,5 -To fix INTEL CPL S3 Power Leakage Issue <INTEL>. --Change R1092 PD connection from PCH_DDR_RST to SM_DRAMRST# and close to U1.BJ12. Add C6 (470P_0402) close to Q52.2.
0.4 8 7/10 CKT,Layout 7 -To fix INTEL CPL S3 Power Leakage Issue <INTEL>. --Change L32.2 connection from +1.5V to +1.5VS_CPU_VDDQ.
0.4 9 7/10 CKT,BOM,Layout 33 -To fix INTEL CPL S3 Power Leakage Issue <INTEL>. --Add C626,C664 close to JDIMA1;C656,C657 close to JDIMB1.
0.4 10 7/17 CKT,BOM 4 -To meet Intel electrical requirements <INTEL>. --Change back R12 from 4.99K_0402_1% to 1.5K_0402_1%; R13 from 2.49K_0402_1% to 750_0402_1%.
0.4 11 7/17 CKT,BOM,Layout 33 -To meet Intel ramp down timing for 1.5V and 0.75VS <INTEL>. --Change R1103 from 470_0402 to 220_0402; R693 from 470_0201 to 22_0402.
0.4 12 7/17 CKT,BOM 33 -To fix INTEL CPL S3 Power Leakage Issue <INTEL>. --Remove R1092 (100K_0402).
0.4 13 7/17 CKT,BOM,Layout 33 -Toto avoid a glitch while turning on +1.5V_CPU_VDDQ <HP> --Add C505 (@0.01UF_0402) close to U45.4.
0.4 14 7/17 CKT,BOM 24 -Correct BOM <Compal> --Change U18 and U20 from SA000027C00 (G548A2P8U MSOP) to SA00002WY00 (G548A1P8U MSOP) for BOM correct.
0.4 15 7/22 CKT,BOM,Layout 28,30 -Design change ON/OFF# control from PCH directly become through EC. <HP> --Disconnect LANLINK_R# from KBC (GPIO24/KSO16) by through R608(@0_0402) reserve; Rename GPIO24 of KBC to PWRBTN_OUT#;
<KBC will block the PWRBTN# and hold PWRBTN_OUT# HIGH when it receives a Install R550 (Change R550 from 100K_0201 to 100K_0402); Disconnect the PWRBTN# output from the button switch to the PCH by remove
command from the BIOS indicating BOOT BLOCK reprogramming is in progress.> D34; Connect ON/OFFBTN# from KBC GPIO24 to the PCH let KBC can now control the PWRBTN#.
0.4 16 7/22 CKT,BOM,Layout 30 -Design reserve for themal fan table switch for SV/LV CPU type detect. <Compal> --Reserve CPU_SV_ID_DET with R551(@100K_0402)PH and R553(@100K_0402)PD.
C C
0.4 17 7/22 CKT,Layout 15 -Design reserve for themal fan table switch for SV/LV CPU type detect. <Compal> --Add R302(@10K_0201) PD close to R280 on PCH GPIO15.
0.4 18 7/24 CKT,BOM 26 -Increases attenuation of PC beep to an acceptable loudness level. <HP> --Change R484 from 100K_0201 to 300K_0201.
0.4 19 7/24 CKT,BOM 26 -Increases line in attenuation from -6dB to -10dB. <HP> --Change R502, R504 from 4.7K_0402_5% to 6.04K_0402_1% & R503, R505 from 4.7K_0402_5% to 2K_0402_5%.
0.4 20 7/24 CKT,BOM 36 -Per TI's recommendation for 3VLP. <TI> --Change PC307 from 10U_0805_6.3V6M to 2.2U_0805_10V6K.
KAT10 from SI1-R to SI2 LA-5251P REV:0.4 -> 0.5 Modify <2009.08.11.~2009.08.28. >
Rev. Item Date Impact Page Change Cause Modify Description
0.5 1 8/18 CKT,Layout 32 -To avoid the thermal module Assy. risk. <Compal DFx>. --Add back H31 and make the DDR routing modify for this.
0.5 2 8/25 CKT,Layout 20 -To disconnect LID_SW#_ISO# from LID_SW# function. <HP>. --Reserve R366 (@0_0402 ohm NI) resistor between Q56-1 and R361-2.
0.5 3 8/25 CKT,Layout 28 -To fix false CBB button triggering on AC insertion due to noise seen on +3VL --Change JP28-1 from +3VL to +VREG3_51125 power rail.
power rail. <HP>.
0.5 4 8/25 CKT,BOM,Layout 14,31 -Disconnect LPC_PD# from TPM U34. <HP/Intel/Infineon>. --Change U7.P8 connection from LPC_PD# to SUS_STAT# as NC with only T87 test pad only. Add R367 4.7K_0402 with PH +3VS on U34.28.
0.5 5 8/25 CKT,BOM,Layout 15,23 -Rename WOW# (U7F-T15) to CPPE# and connect to JEXP1-17 & U17-10. <HP>. --Change U7.T15 GPIO14 connection through R265(0_0402) from WOW# as NC to CPPE# which connect to ExpressCard JEXP1-17 & U17-10.
0.5 6 8/25 CKT,BOM 26 -Correct the Audio Amp. Gain setting. <Compal>. --Remove R485 (0_0201).
0.5 7 8/28 CKT,BOM 4 -Prevent glitch on DRAMRST#. <HP>. --Change C6 from 470P to .1U_0402.
0.5 8 8/28 CKT,BOM,Layout 26 -Change audio REG_EN pin to +5VALW to prevent pop sound on warm boot. <HP>. --Change R490.2 connection from PLT_RST# to +5VALW.
0.5 9 8/28 CKT,BOM 12 -Remove PCH Debug Port related to save power consumption. <Compal>. --Remove R158,R156,R167,R165.
B
0.5 10 8/28 CKT,BOM,Layout 29 -Cancelled Docking +5VS Caps design reserve before for design simplify. <Compal>. --Del C543 (10U_0805), C544~C546 (0.1U_0402). B
0.5 11 8/28 CKT,Layout 32 -Cancel Skew Hole because of M/E PCB outline change. <Compal>. --Del H27 (H_3P0).
0.5 12 8/28 CKT,BOM,Layout 19 -Cancel Swatch system side Display Port Common Mode Choke reserve for design --Del L12~L16(@WCM-2012-900T_4P),R331,R333,R334,R335,R336,R339,R340,R341,R345,R347(0_0402) and related Net.
simplify and layout space free. <Compal>.
0.5 13 8/28 CKT,Layout 18 -Reserve 10PF caps on VGA_RED_R, VGA_GRN_R, VGA_BLUE_R for EMI backup --Reserve C315,C320,C321(@10P_0402) close to R316,R317,R318.
solution. <Compal>.
0.5 14 8/28 CKT,BOM 23 -Cancel Braidwood support but keep design reserve. <HP>. --Remove R567,R562,C571,C566,JP11.
0.5 15 8/31 CKT,BOM,Layout 12 -Add back PCH GPIO13 Ext. Pull-High to +3VALW. <HP>. --Change U7.J30 connection from T122 to become PCH_GPIO13 and pull-high to +3VLAW through R8(10K_0402).
0.5 16 9/01 CKT,BOM,Layout 28 -WW_LED# Design change for fix WWAN Module LED issue. <HP/Compal>. --Del Q33,Q35,R542 Change R1097,R1098,R1099 value and connection.
0.5 17 9/01 CKT,BOM,Layout 24 -Stakup USB Connector update fro Compal DFb review. <Compal>. --Chaneg JP13 PCB Footprint from SUYIN_020122MR008S51CZL_8P to SUYIN_020122GR008S51CZL_8P-T.
0.5 18 9/03 CKT,BOM 15 -Cancel Braidwood support but keep design reserve. <HP>. --Remove R257 (@32.4_0402_1%).
0.5 19 9/03 CKT,BOM 23 -To resolve slow turn off of +3V_WWAN. <HP>. --Install R1077 (10K_0402_5%).
0.5 20 9/03 CKT,BOM 26 -To fix EQ setting make the changes. <HP>. --Remove R491 (@100K_0201) ; Add R485,R486 (0_0201_5%).
0.5 21 9/10 CKT,BOM -- -To correct the symbol inside information to make value match with SMT BOM for --Change U8 from SA000023O00 to SA00003FF00; Q13 Q14 Q15 Q16 Q29 Q30 Q31 Q32 Q36 Q40 Q41 Q43 Q44 Q45 Q46 Q47 Q48
long-term. <Compal>. Q49 Q50 Q51 Q52 Q56 from SB570025280 to SB00000AR10; U17 from SA00001SL00 to SA00001SL20; U18,U20 from SA00002WY00
to SA000037P00; Q19, Q22, Q23, Q26, Q38, Q39 from SB923010030 to SB00000H500; U14 from SA00002MO10 to SA00002MO40; U6
from SA00002WX00 to SA00003NM00; U2 from SA000021J00 to SA00002ZT00; Change U46 from SA097010020 to SA097010040;
Correct L31 Value from TDK-MPZ140BS300A 0603 to 0_0603_5% for match; Correct L32 Value from 1UH_SQV322520T-1R0M-N_20% to
0_0603_5% for match; Install R551 (100K_0402) as default setting; Remove R143(@0_0603) and add R120(0_0603) for LP CLK Gen.
A A
power as default setting; Remove &U1 for SMT BOM Match
0.5 22 9/11 CKT,BOM 23 -To reduce power consumption. <HP>. --Remove R1077 (@10K_0402)

5 4 3 2 1
5 4 3 2 1
KAT10 from SI2 to SI2-R LA-5251P REV:0.5 -> 0.6 Modify <2009.09.11.~2009.09.29. >
WWW.AliSaler.Com
0.6 1 9/21
Page
CKT,BOM,Layout
Change Cause
11,24 -To fix BT turn off time (>250mS spec) <HP>.
Modify Description
--Change CLK Gen CK_PWRGD from Q7(2N7002_SOT23-3) to Q55(2N7002DWH 2N SOT363-6); Add Q55B 2N7002 discharge FET on
+3VAUX_BT; Add R135 (470_0402) series resistor between drain of FET and +3VAUX_BT. Reserve C506 (@0.1UF_0402) for tune.
0.6 2 9/22 CKT,BOM 7 -Move +GFX_CORE Bulk Caps from Power related to EE related. <Compal>. --Change PC713,PC714 location name to C973,C974.
0.6 3 9/28 CKT,Layout 20 -To prevent inrush current problem seen on some panels. <HP>. --Reserve Q28(SI2301),C975,C976,R1105,R1106 close to JEDP1.
0.6 4 9/28 CKT,Layout 20 -To reserve the EMI solution for verify. <Compal-EMC>. --Reserve Reserve R372,C665 close to JEDP1.
0.6 5 10/01 CKT,BOM 21 -To fix crystal frequency stability risk. <INTEL>. --Change C341 and C342 from 27P_0402 to 33P_0402.
D D
KAT10 from SI2-R to PV LA-5251P REV:0.6 -> 0.7 Modify <2009.10.13.~2009.11.4. >
0.7 1 10/13 CKT,BOM,Layout 24 -Change one of the USB Bulk Cap from 150UF to 220UF. <Compal>. --Change C406 from 150U_B2_6.3VM_R35M (P/N:SGA00002N80) to 220U_6.3V_M (P/N:SF000002Y00).
0.7 2 10/13 CKT,Layout 15,22 -Delete USB20_N6/P6 from WLAN slot. WiMAX is dead. <HP>. --Delete USB20_N6/P6 between WLAN slot JP6.36/38 and PCH U7.M22/N22.
0.7 3 10/19 CKT,Layout 32 -Delete and modify Skew Hole PCB Footprint for M/E Drawing update. <Compal>. --Delete H13 (H_3P0); change H2 from H_4P7 to H_4P4; H28 from H_4P9 to H_4P8.
0.7 4 10/19 CKT,BOM,Layout 15,22,31 -Simplify the CLK_PCI_DB and CLK_PCI_DEBUG design and routing for improve --Design change and del R270 to simplify that become CLK_PCI_DEBUG; Add R477 0 ohm to separate for JP6.19 option
EE signals quality and EMI Issue. <Compal>. CLK_PCI_DEBUG connection.
0.7 5 10/21 CKT,Layout 15 -Modify RP1 Pin1,2,3 connection for layout routing smoothly. <Compal>. --Modify RP1 Pin1,2,3 connection for layout routing smoothly.
0.7 6 11/03 CKT,BOM,Layout 21 -M/E Design change the RJ-45 connector. <Compal>. --M/E Design change JRJ45 DC234003O00(TYCO_2006067-1_13P) to DC020910201(FOX_JM36111-R2225-7H_13P-T).
0.7 7 11/03 CKT,BOM,Layout 24 -Add the RC delay circuit between SLP_S4# and SLP_S4_R to fix dual USB --Del R697(0_0201); Add R11(470K_0402) and C7(0.01UF) close to U33 pin3 and pin4.
can not power on issue. <Compal>.
0.7 8 11/05 CKT,BOM,Layout 29 -Add the isolate circuit for Skagen side Monitor Stand HDD LED light on issue fix. --Design in the isolate circuit on SATA_LED# by add Q79 (2N7002) and R49 (10K) PH close to Docking Connector JP30.39.
<Compal>.
0.7 9 11/05 CKT,BOM 29 -Schematic BOM change for actual and common. <Compal>. --BOM change on Q30, Q19, U6.
0.7 10 11/06 CKT,BOM 30 -Schematic BOM change for CBB Reset function. <HP>. --BOM change to install R605 (0_0201).
0.7 11 11/06 CKT,BOM,Layout 18 -Add +3VS PH on CRT_DDC_CLK &C RT_DDC_DATA for design change.. <MAXIM>. --Add R53,R57(2.2K) +3VS pull-high on CRT_DDC_CLK &C RT_DDC_DATA for MAXIM CRT switch design change.
C
0.7 12 11/06 CKT,BOM,Layout 4 -Cancel REMOTE thermal sensor reserve. <HP/Compal>. --Delete REMOTE2+/- traces & Q1. Move C5 close to pins 16/15 of U2. C
0.7 13 11/11 CKT,BOM,Layout 14,28 -Add 0.1UF cap for EMI issue fix. <Compal>. --Add C669 (0.1UF) close to R215; C668 (0.1UF) close to JP22.2.
0.7 14 11/11 CKT,BOM 20 -Install EMI INV_PWM reserve solution for issue fix. <Compal>. --Install R372 (22_0402) and C665 (220P_0402).
0.7 15 11/11 CKT,BOM,Layout 28 -Add 0.1UF CAP on ON/OFF# for ESD issue fix. <Compal>. --Add C670 (0.1UF_0402) close to JP20.2's via.
0.7 16 11/12 CKT,BOM,Layout 28 -Add 0 ohm resistor for CBB reset function pin ground to avoid floating. <SMsC/Compal>. --Add R60 (0_0402) close JP28 pin 3 for CBB reset function reserve.
0.7 17 11/12 CKT,BOM,Layout 38 -To resolve glitch seen on +0.75VS power rail during S0->G3 transition. <HP/Compal>. --Add power jumper options for +1.5VS_CPU_VDDQ(PJP605) & +1.5V(PJP604) to PU601.1. Make PJP605 option installed.
0.7 18 11/12 CKT,Layout 29 -To resolve Docking Connector (JP30) SMT soldering issue. <HP/Compal>. --Update the symbol and PCB Footprint FOX_QL1044L-D261A1-7H_82P-T for fix.
0.7 19 11/12 CKT,BOM -- -Schematic BOM change for actual and common. <Compal>. --BOM change on C68,C69,C70,C71,C72,C92,C93,C94,C113,C114,C115,C140, C63,C64,C65,C66,C67,C85,C86,C87,C88,C89,C90,C91; C29,
C60,C48,C62; C30;
0.7 20 11/13 CKT,BOM,Layout 32 -M/E Screw hole size modify. <Compal/HP>. --Change H2 from H_4P4 to H_4P7; H28 from H_4P8 to H_4P9.
0.7 21 11/13 CKT,BOM 25 -To fix CBB auto active caused by +3VS leakage issue. <Compal>. --Change Q28 from AP2301(SB000007H10) to AP2309(SB00000MI00).
0.7 22 11/13 CKT,BOM 13 -To follow INTEL Design Guide requirement. <INTEL>. --Change C193,C194,C195,C196,C197,C198 from 0.1U_0402_16V4Z(SE070104Z80) to 0.1U_0402_25V4K(SE00000G880).
0.7 23 11/14 CKT,BOM,Layout 28,30 -Cancel CAP_RST related design reserve to avoid the ESD issuet. <HP/SMsC>. --Del CAP_RST Net and also R60,R605, leave the KBC pin63 (GPIO35) alone as NC.
0.7 24 11/27 CKT,BOM 14,18 -BOM change for CRT EMI and EE SVTP fail issue. <HP/Compal>. --Remove R247,R248,R249 (150_0402); Install C232,C233,C234 (18P_0402); Remove C235,C236,C237 (18P_0402); Change L2,L4,L6
from 0805CS-111XJLC_0805 to 0_0603_5%; Change L1,L3,L5 from 0805CS-111XJLC_0805 to HLC0603CSCC33NJT_0603;
Remove R322,R323,R324 (150_0402_1%); Install C321,C320,C315 (75_0402_1%)
0.7 25 11/27 CKT,BOM 7 -To fix INTEL Leakage circuit sequence issue. <HP/Compal>. --Change C26,C27 from 10UF(SE093106M80) to 22UF(SE000000I10); also change the soldering pad from PJP604 to PJP605.
B B
KAT10 from PV-R to Pre-MV LA-5251P REV:0.8 -> 0.9 Modify <2009.12.29.~2010.01.05. >
0.9 1 01/04 CKT,BOM,Layout 30,31 -Need rotate the BIOS Socket for new type one implement without repair and SMT --1. Cancel 16pin BIOS reserve (Del U36 and R696); 2. Cancel Board ID Detect reserve circuit (Del U8,Q37,R571,R572,R574,R575);
interfere issue. <Compal>. 3. Rotate 8 pin BIOS Socket 90 degree.
0.9 2 01/04 Layout 29 -To final Foxconn Docking Connector layout footprint. <Compal>. --Update PCB Footprint (FOX_QL1044L-D261A1-7H_82P-T) from Compal Server --> No change and same as PV phase.
0.9 3 01/04 CKT,Layout 32 -Cancel H17 Screw Hole for M/E design change. <Compal>. --Cancel H17 Screw Hole for M/E design change.
0.9 4 01/04 CKT,BOM,Layout 4,14,28 -Add Caps for ESD CBB issue fixed. <Compal>. --Add C119 between JP4 pin 37 and 41; Add C120 close to R20.1; Add C145 close to R231 pin 1; Add C146 close to D34 pin 1.
0.9 5 01/04 CKT,BOM,Layout 14 -Reduce L1~L6 package size for fix repair and SMT issue. <Compal>. --1. Change L2,L4,L6 PCB Footprint from TAIYO_LB2012T100MR_L2012_2P to R_0603 for final.
2. Change L1,L3,L5 from TAIYO_LB2012T100MR_L2012_2P to KC_HLC0603CSCCR11JT_2P for final.
0.9 6 01/05 CKT,BOM,Layout 33 -Add Cut Mode Caps for EMI PCI issue fix. <Compal>. --Add 4 pcs 0.1UF Cut Mode Caps (C666,C667,C671) which located around the canceled Braidwood module. for EMI PCI issue fix.
A A

5 4 3 2 1

HP EliteBook 2540P Compal LA-5251P Swatch-UMA Rev 0.9 Schematics

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HP EliteBook 2540P Compal LA-5251P Swatch-UMA Rev 0.9 Schematics

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A B C D E

INTEL Auburndale BGA with IBEX core logic

Security Classification Compal Secret Data Compal Electronics, Inc.

RGB Thermal Sensor

Audio CKT TPA6047A4RHBR

RTC CKT. LED

SMBUS Control Table

Security Classification Compal Secret Data Compal Electronics, Inc.

Layout rule 10mil width trace

H _CPURST# 1 R 18 2 H_ CPURST#_R N70 T67 X DP_TCK

JTAG & MBP

+VCCP XDP_BPM#6 0_0201_5% 1 2 R40 XDP_BPM#6_R 33 34 1K_0201_5%

0.1U_0402_16V4Z HOOK1 ITPCLK#/HOOK5 1K_0201_5%

FDI_CTX_PRX_N5 R7 A27 CF G15 AF8 AH66

CFG Straps for PROCESSOR

PCI-Express Configuration Select

CFG3 R69 1 2 @ 3.01K_0402_1%

CFG3-PCI Express Static Lane Reversal

CFG4 R70 1 2 3.01K_0402_1%

9 DDR_B _D[0..63] SB_CK[0] BU33 M _CLK_DDR2 9

DDR_ A_D31 SA_DQ[30] DDR_ B_D39 SB_DQ[38] SB_DQS#[4]

DDR SYSTEM MEMORY - B

Security Classification Compal Secret Data Compal Electronics, Inc.

A AN23 AF46 BD48 AW12 A

AK14 AH69 AB48 AU51 H_V ID6 D66 AN17

1.1V RAIL POWER

VTT1_2 VDDQ20 VCC_42 +VCAP1 VTT0_5

PEG & DMI

U19 VTT1_4 VDDQ22 BD19 N48 VCC_44 VTT0_7 AY60

VTT1_5 VDDQ23 VCC_45 VCAP1_1 +C PU_CORE VTT0_8

AK60 G55 AU37 4.7U_0603_6.3V6K C37 C 38 R37 W24

1 1 1 1 1 AK59 VCAP2_3 2 G51 VCC_60 VCAP1_16 AR44 VTT0_55 W23

R60 VCAP2_18 VTT1_15 AB12 D48 VCC_75 VTT0_70 R24

11/13 update W17 1 1 1 1 D45 C 50 AY10 VTT0_72

VTT1_19 W14 B60 VCC_79 2

1 1 1 1 R15 B53 INTEL_AUBURNDALE_1288

0112 Add to follow design guide

BH57 AU15 AD4 U57 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K

DDR3 SO-DIMM B +1.5V

DDR_B _D0 5 6 DDR_B _D5

1 1 DDR_B _D1 7 8 +V _D DR_CPU_REF

6 DDR_CKE2_DIMMB DDR_CKE2_DIM MB 73 74 DDR_CKE3_DIM MB

DDR_ B_D32 129 130 DDR_ B_D36

DDR_ B_D33 131 132 DDR_ B_D37

133 VSS VSS 134 1

DD R_B_DQS#4 135 136 DD R_B_DM4 1

DQ57 VSS DD R_B_DQS#7

1 2 201 202 SMB _CLK_S3 SMB_CLK_S3 4,10,11,13,24

1 1 203 VTT VTT 204 +0.75VS

L Bottom Side H:5.2mm DDRIII-SODIMM SLOT1

+V _ DDR_CPU_REF_A 6 DDR _A_DM[0..7]

D 201 202 SMB _CLK_S3 D

1 1 203 VTT VTT 204 +0.75VS

205 GND1 GND2 206

1 32 SMB _CLK_S3 SMB_CLK_S3 4,9,10,13,24

Close to U2 within 500mil

Security Classification Compal Secret Data Compal Electronics, Inc.

PCH_RTCX1 1 2 S M_INTRUDER# R1 22 1 2 10K_0201_5% S I RQ

C 180 CLR P1 PCH_RTCX2 D13 B33 1 R1 27

FWH2 / LAD2 LPC_LAD2 22,30,31 + -

C 183 CLR P2 INTRUDER# LDRQ1# / GPIO23 2

@ 1 2 HDA_BIT_CLK_MDC R1 29 1 2 33_0402_5% HDA_BIT_CLK A30

PCH_JTA G_TCK M3 AD3 SATA_PRX_DTX_N5

30 KBC_SPI_CLK_R BA2 SPI_CLK