Exam Name : 16EC209 / 15EC209 - Microprocessors

Total Questions : 32

Q.1 The result of MOV AL, 66 is to store QuestionID : 645577 Marks: 1

No Options Details Select Option

1 store 0100 0010 in AL

2 store 41H in AL

3 store 40H in AL

4 store 0100 0001 in AL

Q.2 The register that stores all the interrupt requests in it in order to serve them one by Marks: 1
one on a priority basis in PIC architecture is QuestionID : 645578

No Options Details Select Option

1 Interrupt Request Register

2 In-Service Register

3 Priority resolver

4 Interrupt Mask Register

Q.3 Marks: 1
Which of the following is not an arithmetic instruction?

QuestionID : 645579

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1 INC (increment)

2 SUB (subtract)

3 ROL (rotate left)

4 DEC (decrement)

Q.4 Marks: 1
Identify the method that bypasses the CPU for certain types of data transfer?

QuestionID : 645580

No Options Details Select Option

1 Software interrupts

2 Interrupt-driven I/O

3 Polled I/O

4 Direct memory access (DMA)

Q.5 The 16 bit flag of 8086 microprocessor is responsible to indicate QuestionID : 645581 Marks: 1

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1 the condition of result of ALU operation

2 the condition of memory

3 the result of subtraction

4 the result of addition

Q.6 The push source copies a word from source to QuestionID : 645582 Marks: 1

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1 stack

2 memory

3 register

4 destination
Q.7 When A0 = 0 and A1 = 1, which port is selected in 8255 PPI. QuestionID : 645583 Marks: 1

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1 Port A

2 Port B

3 Port C

4 Control Port

Q.8 The total number of hardware and software interrupts available in 8086 Marks: 1
microprocessor QuestionID : 645584

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1 256

2 258

3 512

4 264
Q.9 What is the standardized data rate of USB 2.0? QuestionID : 645585 Marks: 1

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1 420 Mbit/s

2 460 Mbit/s

3 480 Mbit/s

4 440 Mbit/s

Q.10 Which of the following is not a disadvantage of RS-232C, QuestionID : 645586 Marks: 1

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1 limited speed of communication

2 low-voltage level signaling

3 bulky communication adapters

4 high-voltage level signaling

Q.11 The computer architecture aimed at reducing the time of execution of instructions is Marks: 1
QuestionID : 645587

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1 CISC

2 RISC

3 ISA

4 ANNA

Q.12 Which of the following is not a type of segment descriptor in 80386? QuestionID : Marks: 1
645588

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1 Code or data segment descriptors

2 System descriptors

3 Gate descriptors

4 Global descriptors
Q.13 List the instructions which control the interrupt structure of the 8085 microprocessor. Marks: 2
QuestionID : 645589

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1 DI, EI, HOLD, READY, SID

2 DI, EI, SIM, READY

3 DI, EI, RIM, SIM

4 DI, EI, SID, READY

Q.14 How many memory locations can be addressed by a microprocessor with 12 address Marks: 2
lines? QuestionID : 645590

No Options Details Select Option

1 4096

2 4092

3 4094

4 4000
Q.15 Marks: 2
The following instruction MOV AX, 50H [BX] [SI] is an example for

QuestionID : 645591

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1 Intrasegment direct mode

2 Relative Based Indexed

3 Based Indexed

4 Intrasegment indirect mode

Q.16 Marks: 2
.

QuestionID : 645592

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1 Option A

2 Option B

3 Option C

4 Option D
Q.17 Find the control word to be written in the CWR register to initialize port A as output Marks: 2
port, Port B as I/P port and Port C as O/P port during the interfacing of an 8255 chip
with 8086 to work as an I/O port. QuestionID : 645593

No Options Details Select Option

1 82H

2 88H

3 84H

4 86H

Q.18 In 8255 BSR mode control word, the bits responsible for bit select and don’t care bits Marks: 2
are, QuestionID : 645594

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1 D4, D5, D6 and D1, D2, D3

2 D1, D2 and D4, D6

3 D1, D2, D3 and D4, D5, D6

4 D0, D1 and D4, D5, D6

Q.19 Marks: 2
.

QuestionID : 645595

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1 i-ii. ii-i, iii-iv, iv-iii

2 i-i. ii-ii, iii-iv, iv-iii

3 i-iii. ii-iv, iii-ii, iv-i

4 i-iii. ii-iv, iii-i, iv-ii

Q.20 Marks: 2
In MODE 1 (Strobed I/O mode) of 8255, the data available at 8 input port is loaded into
input latches, when

QuestionID : 645596

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1 STB BAR is set to logic 1

2 STB BAR is reset to logic 0

3 IBF is set to logic 1

4 IBF is set to logic 0

Q.21 Marks: 2
In Mode 0 (Basic Input/Output) of 8255 which of the following statement is not true.

QuestionID : 645597

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1 8-bit and 100ns

2 16-bit and 100ns

3 8-bit and 100µs

4 16-bit and 100µs

Q.22 Which of the following is not a field in the start of frame token of USB. QuestionID : Marks: 2
645598

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1 SYNC and PID

2 CRC and EOP

3 Frame number and endpoint

4 ACK and NAK

Q.23 Marks: 2
.

QuestionID : 645599

No Options Details Select Option

1 i-iv, ii-i, iii-ii, iv-iii

2 i-iv, ii-i, iii-iii, iv-ii

3 i-i, ii-iv, iii-ii, iv-iii

4 i-i, ii-iv, iii-iii, iv-ii

Q.24 The 80386DX processor supports _______________ bit data operations and Marks: 2
_______________ TBytes of memory. QuestionID : 645600

No Options Details Select Option

1 8/16/32 and 32

2 16/32 and 64

3 8/16/32 and 64

4 16/32 and 32
 Subjective Questions

Q.1 Marks: 3
Describe what happens to the status flags as the sequence of instructions that follows is
executed in 8086 microprocessor architecture. Assume that flags ZF, SF, CF, AF, OF
and PF are initially reset.

MOV AX, 5234H

MOV BX, 6A2BH

CMP AX, BX

Answer:

Q.2 Marks: 3
Write a program to add a data byte located at offset 0500H in 2000H segment to
another data byte available at 0600H in the same segment and store the result at 0700
H in the same segment.

Answer:
 Subjective Questions

Q.3 Marks: 3
Find the number of the T-states required for the execution of the given instruction using
corresponding timing diagram.

2500H: MVI A, 08H (Opcode of the given instruction is 3EH)

Answer:
 Subjective Questions

Q.4 Marks: 3
The ALP to move a byte string, 16-bytes long, from the offset 0200H to 0300H in the
segment 0700H is given below. Identify the errors in the program.

MOV AX, 0700H

MOV DS, AX

MOV SI, 0200H

MOV DI, 0300H

MOV CX, 000DH

BACK: MOV AL, SI

MOV [DI], AL

INC SI

INC DI

LOOP

HLT

Answer:
 Subjective Questions

Q.5 Marks: 3
The mode word register of 8251 USART chip contains a count of CEH. If the baudrate
for transmitter and receiver are required to be 2400 and 600 respectively, what will be
the format of the transmitted character and what should be the frequencies applied to
TXC and RXC to get the desired baudrate.

Answer:
 Subjective Questions

Q.6 Marks: 3
The ALP to generate a saw tooth waveform of period 1 ms with Vmax 5V using a DAC
7523 interfaced with an 8086 CPU running at 8 MHz is given below. Identify the errors in
the program.

ASSUME CS : CODE

CODE SEGMENT

START: MOV AL, 80h

OUT CWR, AL

AGAIN: AL, 05H

BACK: OUT PORTA, AL

INC AL

CMP AL, 0F2H

JB

JMP

CODE ENDS

END START

Answer:
 Subjective Questions

Q.7 Marks: 3
The ALP to interface ADC 0808 with 8086 using 8255 ports is given. Use Port A of 8255
for transferring digital data output of ADC to the CPU and Port C for control signals.
Assume that an analog input is present at I/P2 of the ADC and a clock input of suitable
frequency is available for ADC.

MOV AL, 98 H

OUT CWR

MOV AL, 02 H

OUT Port, AL

MOV AL, 00H

OUT Port C, AL

MOV AL, 01H

OUT Port C, AL

Wait: IN AL, PortC

JNC Wait

IN AL, PortA

HLT

Identify the errors in the program.

Answer:
 Subjective Questions

Q.8 Marks: 3
Initialize the Operation Command Words (OCWs) of 8259 to operate with IR3 masked,
IR6 as bottom priority level, with Non-specific EOI mode. Reset the special mask mode
of 8259. Also read IRR and ISR into particular registers of 8086. (Values should be
specified in the order OCW1, OCW2, OCW3)

Answer: