Dell 3590 La-G716p

A B C D E
PCB R1
COMPAL CONFIDENTIAL ZZZ ZZZ
MODEL NAME :
FDI40 N3-14", FDI4A V3-14", FDI43 N5-14",
CML-U+MEC1418 DAZ2QM00100
PCB_SBDR_R1@
DAZ2RF00300
PCB_NBRD_R1@
1
FDI50 N3-15", FDI5A V3-15", FDI53 N5-15",
FDI70 N3-17"
2019-06-20 PCB FDI40 LA-G716P LS-F112P/F114P/G711P
PCB R3
PCB FDI43 LA-G716P LS-G718P
1
PCB NO : DA8001K6000 (SBDR) REV : 1.0 (A00) ZZZ
DAZ2QM00101
ZZZ
DAZ2RF00301
DA8001K6100 (NBDR) PCB_SBDR_R3_GCE@ PCB_NBRD_R3_GCE@
PCB FDI40 LA-G716P LS-F112P GOLD A31 ! PCB FDI43 LA-G716P LS-G718P GOLD A31 !
BOM P/N : ZZZ ZZZ
SBDR-DIS NBDR-DIS X4E DAZ2QM00102 DAZ2RF00302
431AJ431L51 431AJ431L01 X4EAJ431L51(N3) PCB_SBDR_R3_TRI@ PCB_NBRD_R3_TRI@
431AJ431L52 431AJ431L02 X4EAJ431L52(V3) PCB FDI40 LA-G716P LS-F112P TRIPOD A31 ! PCB FDI43 LA-G716P LS-G718P TRIPOD A31 !
ZZZ ZZZ
431AJ431L53 X4EAJ431L01(N5) DAZ2QM00103 DAZ2RF00303
431AJ431L54 @ : Un-pop Component
PCB_SBDR_R3_HAN@ PCB_NBRD_R3_HAN@
DIS@ : GPU Support
PCB FDI40 LA-G716P LS-F112P HANNS A31 !, PCB FDI43 LA-G716P LS-G718P HANNS A31 !
INSPIRON@/VOSTRO@ : Inspiron/Vostro
ZZZ ZZZ
2
CML@/CNL@ : CML/CNL 2
DAZ2QM00104 DAZ2RF00304
BASE@/PREM@ : Pentium,Celeron / i3,i5,i7
PCB_SBDR_R3_TMT@ PCB_NBRD_R3_TMT@
EXO@/TOPAZ@ : R17M-M1-30/R17M-M2-50
PCB FDI40 LA-G716P LS-F112P T-MAC A31 ! PCB FDI43 LA-G716P LS-G718P T-MAC A31 !
EC@ : EC Support
JP@/PJP@ : JUMP
100@/1000@: Lan
CPU R1 CPU R3
EMI@/ESD@/RF@ : EMI, ESD and RF Component
UC1
i3-10110U
UC1
i3-10110U
@EMI@/@ESD@/@RF@ : EMI, ESD and RF Un-POP Component
SA0000CU31L SA0000CU32L CMC@ : XDP Component
CML_2.1G_R1@ CML_2.1G_R3@ CONN@ : Connector Component
S IC FJ8070104307606 SRGL0 V0 2.1G BGA S IC FJ8070104307606 SRGL0 V0 2.1G A31! KBBL@ : KB Backlight
TPM@/FTPM@ : HW TPM/SW TPM
UC1
i5-10210U
UC1
i5-10210U
750_CTPM@:750 and china TPM
SA0000CST2L SA0000CST3L ST_CTPM@:ST and china TPM
3 CML_1.6G_R1@ CML_1.6G_R3@ CTPM@:China TPM 3
S IC FJ8070104307504 SRGKY V0 1.6G BGA S IC FJ8070104307504 SRGKY V0 1.6G A31! FFS@ : Free Fall Sensor
TYPEC@ : TypeC
UC1
i7-10510U
UC1
i7-10510U
TYPEC@EMI@/TYPEC@ESD@: EMI, ESD ,TypeC Component
SA0000CU22L SA0000CU21L M1_30@/M2_50@ : R17M-M1-30/R17M-M2-50
CML_1.8G_R1@ CML_1.8G_R3@ 2G_G5@/2G_H@/2G_S@/2G_M@ : VRAM type
S IC FJ8070104303905 SRGKW V0 1.8G FCBGA S IC FJ8070104303905 SRGKW V0 1.8G A31! PCB@/PCB_R1@/PCB_R3_G@/PCB_R3_T@/PCB_R3_H@/PCB_R3_TM@: PCB MB
PCB_NBDR_R1@: PCB MB DAZ for NBDR

TS_NON@/TS_USB@/TS_I2C@: Touch Screen Interface Select
Layout Dell logo
SBDR@/NBDR@: SBDR/ NBDR Select
4 4
Security Classification
2019/06/20
Compal Secret Data
2020/06/30 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
COPYRIGHT 2014 Cover Page
ALL RIGHT RESERVED THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
REV: X01 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
PWB: 9HTP8 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-G716P
Date: Thursday, June 20, 2019 Sheet 1 of 101
A B C D E
A B C D E
Block Diagram
DDR4
4GB/8GB
DDR4 2400MHz Channel A
GPU SODIMM A
P23
1 1
VRAM(GDDR5)* 2 AMD R520/R530

2GB GDDR5 R17M-M1-30/R17M-M2-50 PCIe x 4
(15"/17") DDR4
P35~36
18W 4GB/8GB
DDR4 2400MHz Channel B
P27~31
SODIMM B
P24
Intel CPU
USB2.0 x 1
Comet Lake/ Port 1 (USB3.0 Type-A)
eDP 1.2 Whiskey Lake-U/ USB3.0 x 1 Gen1
P71
eDP connector
P38 Cannon Lake-U
USB2.0 x 1
HDMI connector , 1.4a DDI x 4 Port 3 (USB3.0 Type-A)
P40 USB3.0 x 1 Gen1
P71
VGA # VGA converter DP x 2 # DP re-driver DDI x 2

Connector RTD2166 PS8330B 15W USB2.0 x 1 Port 2 (USB2.0 Type-A)
P40 P73
BGA 1528 balls
46 x 24 mm
USB3.0 x 1 Type-C MUX USB3.0 x 1 Gen1
TUSB542
USB Type-C Reserved P42
2 2
Connector
USB2.0 x 1 (Port4)
Reserved
P43
*Pentium/Celeron Only Card reader

CC USB2.0 x 1 SD 3.0 SD Card slot
I2C
RTS5144
P73
5V@3A TPS25810 Touch screen USB2.0 x 1 (Port8) USB2.0 x 1

P50 BT with WLAN
Reserved Reserved P42 P38
PCIe x 1 / CNVi
P52
RJ45 Transformer
LAN 10/100 PCIe x 1
Connector # LAN 10/100/1000 USB2.0 x 1 Camera
P51 P51 P51
P38
M.2 SSD (NVMe) PCIe x 4
P68 PCH-LP
ODD SATA x 1 Gen1

USB2.0 x 1 Finger print
P67
P66
3 3
2.5" SATA x 1
HDD/SSD #dTPM
SPI
P67
NPCT750
P66
# FFS SMBus
SPI ROM
P67
16 MB
P8
RTC
2CH SPEAKER
(2CH 2W/4ohm)
Precision
HDA CODEC HDA I2C
Touchpad
RING2/SLEEVE Realtek ALC3204-CG Click Pad
P62
HP_R/L
P6~17
P56
Universal Jack
P56
eSPI PS/2
# ----> V3 only
4
SMSC KBC 1418 4
MEC1418-NU
Battery RTC P58
Charger Daughter board
Keyboard PWM FAN Thermal sensor

NCT7718W
P62 P77 P66
Security Classification Compal Secret Data
Title
Issued Date 2019/06/20 Deciphered Date 2020/06/30
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagram
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-G716P
A B C D E
WWW.AliSaler.Com
5 4 3 2 1
POWER STATES
Signal SLP SLP SLP ALW AYS SUS RUN
USB 2.0 DESTINATION
S3# S4# S5# PLANE PLANE PLANE CLOCKS
State 1 USB2.0 port1
S0 (Full ON) / M0 HIGH HIGH HIGH ON ON ON ON

2 USB2.0 Port2
3 USB2.0 Port, IO/B
S3 (Suspend to RAM) / M3 LOW HIGH HIGH ON ON OFF OFF
4* Touch screen
D D
S4 (Suspend to DISK) / M3 LOW LOW HIGH ON OFF OFF OFF 5 Finger printer
S5 (SOFT OFF) / M3 LOW LOW LOW ON OFF OFF OFF

6 Camera
7 Card reader , IO/B
G3 OFF OFF OFF OFF OFF OFF OFF
8* Reserved
DS3 --- --- --- --- --- --- --- 9 NA
10 BT
Voltage Rails Board ID & Model ID Table
Power Plane Descript i on S0 S3 S4/S5
+19V_ADPIN Adapter power supply N/A N/A N/A
# Pull-down Pull-up Voltage Board ID Model ID
+17.4V_BATT++ Bat t ery po wer s uppl y N/A N/A N/A
+19VB AC or bat t ery po wer r ail f or Syst e m N/A N/A N/A 1 100 10.0 3.000 EVT SBDR-UMA
+RTC_CELL RTC power ON ON ON DVT1
2 100 17.8 2.801
+3VALW_DSW +3VALW power for PCH DSW rails ON ON ON*
+5VALW System +5V always on power rail ON ON ON* 3 100 27.0 2.598 NBDR-UMA
+3VALW System +3V always on power rail ON ON ON* DVT2
4 100 37.4 2.402
C
+1.8V_PRIM System +1.8V always on power rail ON ON ON* C
+1.0V_PRIM System +1.0V always on power rail ON ON ON* 5 100 49.9 2.201 SBDR-DSC
+1.2V_DDR DDR4 +1.2V power rail ON ON OFF Pilot
6 100 64.9 2.001
+2.5V_MEM DDR4 +2.5V power rail ON ON OFF
+0.6V_DDR_VTT DDR +0.6VS power rail for DDR terminator ON OFF OFF 7 100 82.5 1.808 NBDR-DSC
+VCCST +1.05 VCCST power rail ON ON OFF
8 100 107.0 1.594
+VCCSTG +1.05 VCCSTG power rail ON OFF OFF
+VCCIO +1.05 VCCIO power rail ON OFF OFF 9 100 154.0 1.299
+VCC_CORE Core voltage for CPU ON OFF OFF
10 100 200.0 1.100
+VCC_GT Sliced graphics power rail ON OFF OFF
+VCC_SA System Agent power rail ON OFF OFF
+3VLP +19VB to +3VLP power rail for suspend power ON ON ON
+3VALW_PCH +3VALW power for PCH suspend rails ON ON ON*
+5VS System +5VS power rail ON OFF OFF
+3VS System +3VS power rail ON OFF OFF
+1.35V_MEM_GFX +1.35V power rail for GPU ON OFF OFF
+3VGS +3V power rail for GPU ON OFF OFF
+1.8VGS +1.8V power rail for GPU ON OFF OFF
+0.95VSDGPU +0.95V power rail for GPU ON OFF OFF
B Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF B
USB3.0 PCIE SATA DESTINATION

USB3.0-1 PCIE-1 USB3.0 port1
USB3.0-2 PCIE-2 NA
USB3.0-3 PCIE-3 USB3.0 port2
USB3.0-4 PCIE-4 TypeC

USB3.0-5 PCIE-5 GPU
USB3.0-6 PCIE-6 GPU
PCIE-7 GPU
PCIE-8 GPU
PCIE-9 LOM
PCIE-10 WLAN
A A
PCIE-11 SATA-0 SATA HDD

PCIE-12 SATA-1A SATA ODD
PCIE-13 NVME SSD
PCIE-14 NVME SSD Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2019/06/20 Deciphered Date 2020/06/30 Title
PCIE-15 SATA-1B NVME SSD Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
1.0
PCIE-16 SATA-2 NVME SSD DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5 4 3 2 1
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5 4 3 2 1
https://shop62935598.taobao.com
SIO_SLP_S4 #
FUSE 1.5A_24V +VCCST

(F1) +DCBAT_LCD
EM5209VF
(UZ1)
D +VCCSTG D
SIO_SLP_S3 #
CPU_C10_GATE#
PJPH01 PRIM_PW RGD PJPH02
RT6228AGQUF TPS22961 0ohm 0603
(PUH01) +1.05VALWP +1.05V_PRIM (UZ2) +VCCIO (R23) +TPAN_VDD
JP10
EM5209VF DGPU_PW R_EN 0ohm 0805
(UZ6) +0.95VSDGPU (RA1) +5V_PVDD
PJPW01 DGPU_PW ROK PJPW02

RT6226AGQUF
(PUW01) +1.35VGPUP +1.35V_MEM_GFX JP6 +5V_HDD
SY6288D20AAC
(UU1) USB30_VCCA
JP7 +5V_ODD
PJP501 PJP502
EN_5V PJP503 USB_EN#
SY8180CRAC SY6288D20AAC
(PU501) +5VALW P +5VALW (UU2) USB_EN# USB30_VCCB FUSE 1.5A_6V
(FI1) +5V_HDMI
SIO_SLP_S3 #
CPU PWR PJP301 EM5209VF FUSE 0.5A_13.2V
(UZ3) +5VS (F3) +5V_KB_BL
GPU PWR SY8286BRAC BAS40C
(PU301) +3VLP (D1) +RTC_CELL
Peripheral Device PWR
OVP_T RIP_P 1
SY6861A1AAC
(UT3) +CCG_VBUS
EN_3V
+RTC_VCC
ADAPTER
+3VALW P
+PW R_SRC
(+19VB)
PJP302
LCD_VCC_TEST_EN
C or C
SIO_SLP_S3 # EDP_VDD_EN
EM5209VF SY6288C20AAC
CHARGER +3VALW (UZ3) +3VS (U1) +LCDVDD
ISL88739HRZ-T
(PUB01) JP9
PCH_PW R_EN DGPU_PW R_EN
TPS22967DSGR TPS22967DSGR
(UZ4) +3VALW_PCH (UZ5) +3VGS
0ohm 0603 0ohm 0603

(RM1) +3V_EMMC (RM2) +1.8V_EMMC
BATTERY
JP11
PJP1801 PCH_PRIM_EN PJP1802 DGPU_PW R_EN
RT8061AZQW EM5209VF
(PU1801) +1.8VALWP +1.8V_PRIM (UZ6) +1.8VGS
PJP2501 SIO_SLP_S4 # PJP2502

RT9059GSP
(PU2501) +2.5VP +2.5V_MEM
+2.5V_PG
PJPM01 PJPM02
RT8207PGQW
(PUM01) +1.2VP +1.2V_DDR
0.6V_DDR_VTT_ON PJPM03
+0.6VSP +0.6V_DDR_VTT
NCP302045MNTXG
B
(PUI01) B
DRVON
PWM1_2ph_CPU
+VCC_CORE
NCP302045MNTXG
(PUI02)
RSHUNT +VCC_CORE_GT
DRVON
PWM_1a_CPU
NCP302045MNTXG
(PUG01) +VCC_GT
DRVON
PWM_1b_CPU
NCP81253MNTBG
(PUA01) +VCC_SA
DGPU_PW R_EN
ISL62771HRTZ-T
(PUV01) +VGA_CORE
A A
2019/06/20
Compal Secret Data
2020/06/30 Title
Power MAP
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
Timing Diagram for S5 to S0 mode CPU +VCC_CORE

VCC
10b +19VB
VCCIO
+VCCIO
IMVP_VR_ON +VCC_GT
+VCC_SA VCCGT
NCP81218 +VCC_CORE VCCGTX
+VCC_GT
D +1.2V_DDR D
VDDQ
VCCPLL_OC
+VCCST
ADAPTER +19VB VCCST VCCSTG
VCCPLL
DDR_VTT_CNTL VCCSTG
DDR_VTT_CTL
a ISL88739 +VCC_SA
b VCCSA
HW_ACAV_IN
BATTERY ACOK VCCOPC
VCC_OPC_1P8
VCCEOPIO
CFL-U 43e only
+RTC_SOC PCH PCH_RSMRST#_Q

c VCCRTC RSMRST#
DSW_PWROK
PCH_DPW ROK 5b
+3VALW_PCH +3VALW_DSW
VCCDSW _3P3
+3V_HDA PWRBTN#
SIO_PW RBTN# 6
BAT-->1 VCCHDA
AC-->2 +3.3V_SPI SIO_SLP_S5#
VCCSPI SLP_S5#
C
7 C
POWER_SW_IN# VCCPRIM_3P3
+1.8V_PRIM +1.05V_PRIM
VCCPRIM_1P8
SIO_SLP_S4#
8a
SLP_S4# EM5209 +VCCST
+19VB
b HW_ACAV_IN
2b +1.05V_PRIM
+3VALW
EN_5V VL VCCAPLL_1P05
SIO_PW RBTN# SY8180 VCCDUSB_1P05
6 +5VALW VCCA_BCLK_1P05 VPP
VCCA_SRC_1P05 RT9059 +2.5V_MEM
VCCPRIM_1P05
VCCPRIM_CORE 8b
+2.5V_PG
PRIM_PW RGD +19VB PGOOD
5 2a c +1.0V_MPHYGT
DDR4
EN_3V
VCCMPHYGT_1P0 +19VB
PCH_RSMRST# +3VLP +1.05V_PRIM VCCSRAM_1P0
5a SY8286 VCCAMPHYPLL_1P0
+3VALW 3
EC 1416 VCCAPLLEBB
RT8207
+1.2V_DDR VDDQ
POK
+3VALW 0.6V_DDR_VTT_ON
+1.05V_PRIM +1.05V_MPHYPLL VTT
VCCDSW _EN PCH_PRIM_EN VCCAMPHYPLL_1P05 PGOOD
+0.6V_DDR_VTT
AND RT8061 +1.8V_PRIM
RUNPW ROK +1.05V_MPHY
ALL_SYS_PW RGD
10a 4 VCCPRIM_MPHY_1P05 8c
+19VB +1.05V_XTAL 1.2V_VTT_PW RGD
VCCA_XTAL_1P05
PRIM_PW RGD
11 RESET_OUT# 5 RT6228 +1.05V_PRIM +5VALW
B B
+3VALW 9a +5VS
12 SYS_PWROK
10b VCCST_PW RGD VCCST_PW RGOOD SLP_S3#
SIO_SLP_S3#
EM5209
TPS22967 +3VALW_PCH +3VS
11 RESET_OUT#
PCH_PW ROK
+3VALW
12 SYS_PWROK
SYS_PWROK
9b +1.05V_PRIM
AND EM5209 +VCCSTG

CPU_C10_GATE#
PCH_PLTRST#
13 PLTRST#
+1.05V_PRIM
TPS22961 +VCCIO
9C
A A
2019/06/20
Compal Secret Data
2020/06/30 Title
Platform Power Sequence
1.0
5 4 3 2 1
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
https://shop62935598.taobao.com PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5 4 3 2 1
l
+VCCSTG
l
1 2 H_PROCHOT#
RC1 1K_0402_5%
+VCCST
UC1A
D
AL5 AG4 D
1 2 H_THERMTRIP# [40] CPU_DP1_N0 AL6 DDI1_TXN_0 EDP_TXN_0 AG3 EDP_TXN0 [38]
RC2 1K_0402_5% [40] CPU_DP1_P0 AJ5 DDI1_TXP_0 EDP_TXP_0 AG2 EDP_TXP0 [38]
[40] CPU_DP1_N1 DDI1_TXN_1 EDP_TXN_1 EDP_TXN1 [38]
e
1 @ 2 CATERR# AJ6 AG1
RC3 49.9_0402_1% [40] CPU_DP1_P1 AF6 DDI1_TXP_1 EDP_TXP_1 AJ4 EDP_TXP1 [38]
[40] CPU_DP1_N2 AF5 DDI1_TXN_2 EDP EDP_TXN_2 AJ3
[40] CPU_DP1_P2 AE5 DDI1_TXP_2 EDP_TXP_2 AJ2
[40] CPU_DP1_N3 AE6 DDI1_TXN_3 EDP_TXN_3 AJ1
[40] CPU_DP1_P3 DDI1_TXP_3 DDI EDP_TXP_3
COMPENSATION FOR EDP_COMP AC4
RC4 CNL@ [40] CPU_DP2_N0 AC3 DDI2_TXN_0 AH4
[40] CPU_DP2_P0 AC1 DDI2_TXP_0 EDP_AUX_N AH3 EDP_AUXN [38]
100_0402_1%
+VCCIO [40] CPU_DP2_N1 DDI2_TXN_1 EDP_AUX_P EDP_AUXP [38]
SD034100080 AC2
[40] CPU_DP2_P1 AE4 DDI2_TXP_1 AM7
DDI2_TXN_2 DISP_UTILS TP1
AE3
1 CML@ 2 EDP_COMP AE1 DDI2_TXP_2 AC7
RC4 24.9_0402_1% AE2 DDI2_TXN_3 DDI1_AUX_N AC6
DDI2_TXP_3 DDI1_AUX_P AD4
DDI2_AUX_N CPU_DP2_AUXN [40]
CAD note: AD3
D
DDI2_AUX_P CPU_DP2_AUXP [40]
Trace width=5 mils, Spacing=25mils AG7
DISPLAY SIDEBANDS DDI3_AUX_N AG6
Max length=600mils EDP_COMP DDI3_AUX_P
AM6
DISP_RCOMP
CPU_DP1_CTRL_CLK CC8 CN6
[40] CPU_DP1_CTRL_CLK CPU_DP1_CTRL_DATA GPP_E18/DPPB_CTRLCLK/CNV_BT_HOST_WAKE# GPP_E13/DDPB_HPD0/DISP_MISC0 CPU_DP2_HPD CPU_DP1_HPD [40]
CC9 CM6
[40] CPU_DP1_CTRL_DATA GPP_E19/DPPB_CTRLDATA GPP_E14/DDPC_HPD1/DISP_MISC1 CPU_DP2_HPD [40]
CP7
CH4 GPP_E15/DPPD_HPD2/DISP_MISC2 CP6
CPU_DP2_CTRL_DATA CH3 GPP_E20/DPPC_CTRLCLK GPP_E16/DPPE_HPD3/DISP_MISC3 CM7
GPP_E21/DPPC_CTRLDATA GPP_E17/EDP_HPD/DISP_MISC4 EDP_HPD [38]
+3VS CP4 CK11 BKLT_IN_EC
[38] TOUCH_SCREEN_RST CN4 GPP_E22/DPPD_CTRLCLK EDP_BKLTEN CG11 BKLT_IN_EC [58]
GPP_E23/DPPD_CTRLDATA EDP_VDDEN CH11 EDP_VDD_EN [38]
r
1 2 TOUCH_PAD_INT# CR26 EDP_BKLTCTL EDP_BKLT_CTRL [38]
RC5 10K_0402_5% CP26 GPP_H16/DDPF_CTRLCLK
1 @ 2 TOUCH_PANEL_PD# GPP_H17/DDPF_CTRLDATA
RC6 10K_0402_5% +3VS
C 1 2 TOUCH_SCREEN_INT# C
TOUCH_SCREEN_INT# [38]
RC203 10K_0402_5%
WHL-U42_BGA1528 CPU_DP1_CTRL_CLK 2 1
RC7 2.2K_0402_5%
1 of 20 CPU_DP1_CTRL_DATA 2 1
RC8 2.2K_0402_5%
CPU_DP2_CTRL_DATA 2
o
1
RC9 2.2K_0402_5%
f
CPU_DP2_HPD 2 1
RC12 100K_0402_5%
BKLT_IN_EC 2 1
RC13 100K_0402_5%
UC1D
CATERR# AA4 T6 CPU_XDP_TCK0
CATERR# PROC_TCK SOC_XDP_TDI CPU_XDP_TCK0 [80]
AR1 U6
1 2 [58] PECI_EC H_PROCHOT#_R Y4 PECI CPU MISC PROC_TDI Y5 SOC_XDP_TDO SOC_XDP_TDI [80]
JTAG
[58,82,84,88] H_PROCHOT# H_THERMTRIP# PROCHOT# PROC_TDO SOC_XDP_TMS SOC_XDP_TDO [80]
RC160 499_0402_1% BJ1 T5
THRMTRIP# PROC_TMS SOC_XDP_TRST# SOC_XDP_TMS [80]
AB6
XDP_BPM#0 PROC_TRST# SOC_XDP_TRST# [80]
U1
y
TP2 XDP_BPM#1 BPM#_0
U2
TP3 XDP_BPM#2 BPM#_1
U3 W6
TP4 XDP_BPM#3 BPM#_2 PCH_TCK SOC_XDP_TDI PCH_JTAG_TCK1 [80]
U4 U5
TP5 BPM#_3 PCH_TDI SOC_XDP_TDO
DZ1 W5
RB751S40T1G_SOD523-2 PCH_TDO P5 SOC_XDP_TMS
B 1 2 CAM_EN# CE9 PCH_TMS Y6 SOC_XDP_TRST# B
l
[58,63] TP_WAKE_KBC# TP6 TOUCH_SCREEN_INT# GPP_E3/CPU_GP0 PCH_TRST# CPU_XDP_TCK0
CN3 P6
TOUCH_PAD_INT# CB34 GPP_E7/CPU_GP1 PCH_JTAGX
TOUCH_SCREEN_PD# 1 @ 2 TOUCH_PANEL_PD# CC35 GPP_B3/CPU_GP2
[38] TOUCH_SCREEN_PD# GPP_B4/CPU_GP3 XDP_PREQ#
RC14 0_0201_5% W2
PROC_PREQ# XDP_PRDY# TP7
W1
CPU_POPIRCOMP PROC_PRDY# TP8
BP27
PCH_POPIRCOMP BW25 PROC_POPIRCOMP
PCH_OPIRCOMP
L5
RSVD70
1
n
N5
49.9_0402_1%
49.9_0402_1%
RSVD71
RC15
RC16
WHL-U42_BGA1528
4 of 20
2
L5,N5 are required for CFL U43e only.
COMPENSATION FOR OPIRCOMP

CAD Note:
O
Min trace width=10 mils, Max trace length=500 mils
A A
Security Classification Compal Secret Data Compal Electronics, Inc.

CPU(1/12))DDI,MSIC,XDP,EDP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
WWW.AliSaler.Com
Custom 1.0
5 4 3 2 1
5 4 3 2 1
l
DDR4 Interleaved Memory
[23]
[23]
DDR_A_D[0..15]
DDR_A_D[16..31]
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
A26
D26
D28
C28
B26
C26
B28
A28
B30
D30
B33
D32
A30
C30
B32
C32
H37
H34
K34
K35
UC1B
Interleave / Non-Interleaved
DDR0_DQ_0/DDR0_DQ_0
DDR0_DQ_1/DDR0_DQ_1
DDR0_DQ_2/DDR0_DQ_2
DDR0_DQ_3/DDR0_DQ_3
DDR0_DQ_4/DDR0_DQ_4
DDR0_DQ_5/DDR0_DQ_5
DDR0_DQ_6/DDR0_DQ_6
DDR0_DQ_7/DDR0_DQ_7
DDR0_DQ_8/DDR0_DQ_8
DDR0_DQ_9/DDR0_DQ_9
DDR0_DQ_10/DDR0_DQ_10
DDR0_CKN_0/DDR0_CKN_0
DDR0_CKP_0/DDR0_CKP_0
DDR0_CKE_0/DDR0_CKE_0
DDR0_CKE_2/NC
DDR0_CKE_3/NC
DDR0_CS#_0/DDR0_CS#_0
DDR0_ODT_0/DDR0_ODT_0
NC/DDR0_ODT_1
DDR0_CAB_9/DDR0_MA_0
LPDDR3 / DDR4
V32
V31
T32
T31
U36
U37
U34
U35
AE32
AF32
AE31
AF31
AC37
AC36
AC34
AC35
DDR_A_CLK#0
DDR_A_CLK0
DDR_A_CLK#1
DDR_A_CLK1
DDR_A_CKE0
DDR_A_CKE1
DDR_A_CKE2
DDR_A_CKE3
DDR_A_CS#0
DDR_A_CS#1
DDR_A_ODT0
DDR_A_ODT1
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_CLK#0
DDR_A_CLK0
DDR_A_CLK#1
DDR_A_CLK1
DDR_A_CKE0
DDR_A_CKE1
TP9
TP11
DDR_A_CS#0
DDR_A_CS#1
DDR_A_ODT0
DDR_A_ODT1
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
[23]
[23]
[23]
[23]
[23]
[23]
[23]
[23]
[23]
[23]
[23]
[23]
[23]
[24]
[24]
DDR_B_D[0..15]
DDR_B_D[16..31]
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
J22
H25
G22
H22
F25
J25
G25
F22
D22
C22
C24
D24
A22
B22
A24
B24
G31
G32
H29
UC1C
lnterleave /
Non-lnterleaved
LPDDR3 / DDR4
DDR1_CKE_2/NC
DDR1_CKE_3/NC
DDR1_ODT_0/DDR1_ODT_0
NC/DDR1_ODT_1
NC/DDR1_MA_3
AF28
AF29
AE28
AE29
T28
T29
V28
V29
AL37
AL35
AL36
AL34
AG36
AG35
AF34
AG37
AE35
DDR_B_CLK#0
DDR_B_CLK0
DDR_B_CLK#1
DDR_B_CLK1
DDR_B_CKE0
DDR_B_CKE1
DDR_B_CKE2
DDR_B_CKE3
DDR_B_CS#0
DDR_B_CS#1
DDR_B_ODT0
DDR_B_ODT1
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
e l
DDR_B_CLK#0
DDR_B_CLK0
DDR_B_CLK#1
DDR_B_CLK1
DDR_B_CKE0
DDR_B_CKE1
TP10
TP12
DDR_B_CS#0
DDR_B_CS#1
DDR_B_ODT0
DDR_B_ODT1
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
[24]
[24]
[24]
[24]
[24]
[24]
[24]
[24]
[24]
[24]
[24]
[24]
[24]
[24]
D
D
DDR_A_D20 DDR0_DQ_19/DDR0_DQ_35 NC/DDR0_MA_3 DDR_A_MA4 DDR_A_MA3 [23] DDR_B_D19 DDR1_DQ_18/DDR0_DQ_50 NC/DDR1_MA_4 DDR_B_MA5 DDR_B_MA4 [24]
H36 AA35 H28 AF35
DDR_A_D21 DDR0_DQ_20/DDR0_DQ_36 NC/DDR0_MA_4 DDR_A_MA5 DDR_A_MA4 [23] DDR_B_D20 DDR1_DQ_19/DDR0_DQ_51 DDR1_CAA_0/DDR1_MA_5 DDR_B_MA6 DDR_B_MA5 [24]
H35 AB35 G28 AE37
DDR_A_D22 DDR0_DQ_21/DDR0_DQ_37 DDR0_CAA_0/DDR0_MA_5 DDR_A_MA6 DDR_A_MA5 [23] DDR_B_D21 DDR1_DQ_20/DDR0_DQ_52 DDR1_CAA_2/DDR1_MA_6 DDR_B_MA7 DDR_B_MA6 [24]
K36 AA37 G29 AC29
K37 AA36 H31 AE36
N36 AB34 H32 AB29
N34 W36 L31 AG34
DDR_A_D26 DDR0_DQ_25/DDR0_DQ_41 DDR0_CAA_1/DDR0_MA_9 DDR_A_MA10 DDR_A_MA9 [23] DDR_B_D25 DDR1_DQ_24/DDR0_DQ_56 DDR1_CAB_7/DDR1_MA_10 DDR_B_MA11 DDR_B_MA10 [24]
R37 Y31 L32 AC28
DDR_A_D27 DDR0_DQ_26/DDR0_DQ_42 DDR0_CAB_7/DDR0_MA_10 DDR_A_MA11 DDR_A_MA10 [23] DDR_B_D26 DDR1_DQ_25/DDR0_DQ_57 DDR1_CAA_7/DDR1_MA_11 DDR_B_MA12 DDR_B_MA11 [24]
R34 W34 N29 AB28
N37 AA34 N28 AK35
DDR_A_D29 DDR0_DQ_28/DDR0_DQ_44 DDR0_CAA_6/DDR0_MA_12 DDR_A_MA13 DDR_A_MA12 [23] DDR_B_D28 DDR1_DQ_27/DDR0_DQ_59 DDR1_CAB_0/DDR1_MA_13 DDR_B_MA13 [24]
N35 AC32 L28
DDR_A_D30 DDR0_DQ_29/DDR0_DQ_45 DDR0_CAB_0/DDR0_MA_13 DDR_A_MA13 [23] DDR_B_D29 DDR1_DQ_28/DDR0_DQ_60 DDR_B_WE#
R36 L29 AJ35
DDR_A_D31 DDR0_DQ_30/DDR0_DQ_46 DDR_A_WE# DDR_B_D30 DDR1_DQ_29/DDR0_DQ_61 DDR1_CAB_2/DDR1_MA_14 DDR_B_CAS# DDR_B_WE# [24]
R35 AC31 N31 AK34
[23] DDR_A_D[32..47] DDR_A_D32 DDR0_DQ_31/DDR0_DQ_47 DDR0_CAB_2/DDR0_MA_14 DDR_A_CAS# DDR_A_WE# [23] DDR_B_D31 DDR1_DQ_30/DDR0_DQ_62 DDR1_CAB_1/DDR1_MA_15 DDR_B_RAS# DDR_B_CAS# [24]
AN35 AB32 N32 AJ34
DDR_A_D33 DDR0_DQ_32/DDR1_DQ_0 DDR0_CAB_1/DDR0_MA_15 DDR_A_RAS# DDR_A_CAS# [23] [24] DDR_B_D[32..47] DDR_B_D32 DDR1_DQ_31/DDR0_DQ_63 DDR1_CAB_3/DDR1_MA_16 DDR_B_RAS# [24]
AN34 Y32 AJ29
DDR_A_D34 DDR0_DQ_33/DDR1_DQ_1 DDR0_CAB_3/DDR0_MA_16 DDR_A_RAS# [23] DDR_B_D33 DDR1_DQ_32/DDR1_DQ_16 DDR_B_BA0
AR35 AJ30 AJ37
r
DDR_A_D35 DDR0_DQ_34/DDR1_DQ_2 DDR_A_BA0 DDR_B_D34 DDR1_DQ_33/DDR1_DQ_17 DDR1_CAB_4/DDR1_BA_0 DDR_B_BA1 DDR_B_BA0 [24]
AR34 W32 AM32 AJ36
DDR_A_D36 DDR0_DQ_35/DDR1_DQ_3 DDR0_CAB_4/DDR0_BA_0 DDR_A_BA1 DDR_A_BA0 [23] DDR_B_D35 DDR1_DQ_34/DDR1_DQ_18 DDR1_CAB_6/DDR1_BA_1 DDR_B_BG0 DDR_B_BA1 [24]
AN37 AB31 AM31 W29
DDR_A_D37 DDR0_DQ_36/DDR1_DQ_4 DDR0_CAB_6/DDR0_BA_1 DDR_A_BG0 DDR_A_BA1 [23] DDR_B_D36 DDR1_DQ_35/DDR1_DQ_19 DDR1_CAA_5/DDR1_BG_0 DDR_B_BG0 [24]
AN36 V34 AM30
DDR_A_D38 DDR0_DQ_37/DDR1_DQ_5 DDR0_CAA_5/DDR0_BG_0 DDR_A_BG0 [23] DDR_B_D37 DDR1_DQ_36/DDR1_DQ_20 DDR_B_BG1
AR36 AM29 Y28
DDR_A_D39 DDR0_DQ_38/DDR1_DQ_6 DDR_A_ACT# DDR_B_D38 DDR1_DQ_37/DDR1_DQ_21 DDR1_CAA_9/DDR1_BG_1 DDR_B_ACT# DDR_B_BG1 [24]
AR37 V35 AJ31 W28
C DDR_A_D40 DDR0_DQ_39/DDR1_DQ_7 DDR0_CAA_8/DDR0_ACT# DDR_A_BG1 DDR_A_ACT# [23] DDR_B_D39 DDR1_DQ_38/DDR1_DQ_22 DDR1_CAA_8/DDR1_ACT# DDR_B_ACT# [24] C
AU35 W35 AJ32
DDR_A_D41 DDR0_DQ_40/DDR1_DQ_8 DDR0_CAA_9/DDR0_BG_1 DDR_A_BG1 [23] DDR_B_D40 DDR1_DQ_39/DDR1_DQ_23 lnterleave / Non-lnterleaved DDR_B_DQS#0
AU34 AR31 H24
DDR_A_D42 DDR0_DQ_41/DDR1_DQ_9 Interleave / Non-Interleaved DDR_A_DQS#0 DDR_B_D41 DDR1_DQ_40/DDR1_DQ_24 DDR1_DQSN_0/DDR0_DQSN_2 DDR_B_DQS0 DDR_B_DQS#0 [24]
AW35 C27 AR32 G24
DDR_A_D43 DDR0_DQ_42/DDR1_DQ_10 DDR0_DQSN_0/DDR0_DQSN_0 DDR_A_DQS0 DDR_A_DQS#0 [23] DDR_B_D42 DDR1_DQ_41/DDR1_DQ_25 DDR1_DQSP_0/DDR0_DQSP_2 DDR_B_DQS#1 DDR_B_DQS0 [24]
AW34 D27 AV30 C23
DDR_A_D44 DDR0_DQ_43/DDR1_DQ_11 DDR0_DQSP_0/DDR0_DQSP_0 DDR_A_DQS#1 DDR_A_DQS0 [23] DDR_B_D43 DDR1_DQ_42/DDR1_DQ_26 DDR1_DQSN_1/DDR0_DQSN_3 DDR_B_DQS1 DDR_B_DQS#1 [24]
AU37 D31 AV29 D23
AU36 C31 AR30 G30
AW36 J35 AR29 H30
AW37 J34 AV32 L30
o
[23] DDR_A_D[48..63] DDR_A_D48 DDR0_DQ_47/DDR1_DQ_15 DDR0_DQSP_2/DDR0_DQSP_4 DDR_A_DQS#3 DDR_A_DQS2 [23] DDR_B_D47 DDR1_DQ_46/DDR1_DQ_30 DDR1_DQSN_3/DDR0_DQSN_7 DDR_B_DQS3 DDR_B_DQS#3 [24]
BA35 P34 AV31 N30
DDR_A_D49 DDR0_DQ_48/DDR1_DQ_32 DDR0_DQSN_3/DDR0_DQSN_5 DDR_A_DQS3 DDR_A_DQS#3 [23] [24] DDR_B_D[48..63] DDR_B_D48 DDR1_DQ_47/DDR1_DQ_31 DDR1_DQSP_3/DDR0_DQSP_7 DDR_B_DQS#4 DDR_B_DQS3 [24]
BA34 P35 BA32 AL31
BC35 AP35 BA31 AL30
BC34 AP34 BD31 AU31
BA37 AV34 BD32 AU30
BA36 AV35 BA30 BC31
BC36 BB35 BA29 BC30
BC37 BB34 BD29 BH31
DDR_A_DQS6 [23]
f
DDR_A_D56 DDR0_DQ_55/DDR1_DQ_39 DDR0_DQSP_6/DDR1_DQSP_4 DDR_A_DQS#7 DDR_B_D55 DDR1_DQ_54/DDR1_DQ_54 DDR1_DQSN_7/DDR1_DQSN_7 DDR_B_DQS7 DDR_B_DQS#7 [24]
BE35 BF34 BD30 BH30
DDR_A_D57 DDR0_DQ_56/DDR1_DQ_40 DDR0_DQSN_7/DDR1_DQSN_5 DDR_A_DQS7 DDR_A_DQS#7 [23] DDR_B_D56 DDR1_DQ_55/DDR1_DQ_55 DDR1_DQSP_7/DDR1_DQSP_7 DDR_B_DQS7 [24]
BE34 BF35 BG31
DDR_A_D58 DDR0_DQ_57/DDR1_DQ_41 DDR0_DQSP_7/DDR1_DQSP_5 DDR_A_DQS7 [23] DDR_B_D57 DDR1_DQ_56/DDR1_DQ_56 DDR_B_ALERT#
BG35 BG32 Y29
DDR_A_D59 DDR0_DQ_58/DDR1_DQ_42 DDR_A_ALERT# DDR_B_D58 DDR1_DQ_57/DDR1_DQ_57 NC/DDR1_ALERT# DDR_B_PAR DDR_B_ALERT# [24]
BG34 LPDDR3 / DDR4
W37 BK32 AE34
DDR_A_D60 DDR0_DQ_59/DDR1_DQ_43 NC/DDR0_ALERT# DDR_A_PAR DDR_A_ALERT# [23] DDR_B_D59 DDR1_DQ_58/DDR1_DQ_58 NC/DDR1_PAR DDR_DRAMRST# DDR_B_PAR [24]
BE37 W31 BK31 BU31
DDR_A_D61 DDR0_DQ_60/DDR1_DQ_44 NC/DDR0_PAR DDR_A_PAR [23] DDR_B_D60 DDR1_DQ_59/DDR1_DQ_59 DRAM_RESET# DDR_DRAMRST# [23]
BE36 BG29
DDR_A_D62 BG36 DDR0_DQ_61/DDR1_DQ_45 F36 DDR_B_D61 BG30 DDR1_DQ_60/DDR1_DQ_60 BN28 SM_RCOMP0
DDR_A_D63 DDR0_DQ_62/DDR1_DQ_46 DDR_VREF_CA +V_DDR_REFA_R DDR_B_D62 DDR1_DQ_61/DDR1_DQ_61 DDR_RCOMP_0 SM_RCOMP1
BG37 D35 CAD Note: BK30 BN27
DDR0_DQ_63/DDR1_DQ_47 DDR0_VREF_DQ_0 D37 DDR_B_D63 BK29 DDR1_DQ_62/DDR1_DQ_62 DDR_RCOMP_1 BN29 SM_RCOMP2
DDR0_VREF_DQ_1 +V_DDR_REFB_R Min trace width=20 mils, spacing of adjacent signal=20 mils DDR1_DQ_63/DDR1_DQ_63 DDR_RCOMP_2
E36
DDR1_VREF_DQ C35 DDR_VTT_CNTL
DDR_VTT_CTL W HL-U42_BGA1528
W HL-U42_BGA1528
3 of 20
2 of 20
y
B B
l
Buf f er w
i t h Open Dr ai n Out put For VTT po wer c ontr ol DDR4 COMPENSATION SIGNALS RC17 CNL@
100_0402_1%
SD034100080
+1.2V_DDR +3VS SM_RCOMP0 RC17 1 CML@ 2 121_0402_1%
0.1U_0402_16V7K 2 1 CC1 SM_RCOMP1 RC18 1 CML@ 2 80.6_0402_1% RC18 CNL@
1
100_0402_1%
UC2 RC19 SM_RCOMP2 RC20 1 2 100_0402_1% SD034100080
1 5 200K_0402_1%
n
NC VCC
DDR_VTT_CNTL 2
CAD Note:
2
A 4
3 Y
1
0.6V_DDR_VTT_ON [86] Trace width=15 mils, Spacing=25 mils(Within Group 20mils)
GND @ Max trace length= 500 mils
74AUP1G07GW _TSSOP5 CC2
100P_0402_50V8J
2
5
O 4 3
Issued Date 2019/06/20
Compal Secret Data
Deciphered Date 2020/06/30
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
Title
Size
Custom
Date:
Document Number
CPU(2/12)DDR4
LA-G716P
Thursday, June 20, 2019
1
Sheet 7 of 101
Rev
1.0
A
5 4 3 2 1
l
+3VS
RC21~RC25 place colse to Device
UC1E QC1A
SMB -> DDR4, FFS, VGA
2
L2N7002DW1T1G_SC88-6
CPU_SPI_CLK RC21 1 @ 2 0_0402_5% CPU_SPI_0_CLK CH37 CK14 MEM_SMBCLK
[66] CPU_SPI_CLK CPU_SPI_D1 RC22 1 @ 2 0_0402_5% CPU_SPI_0_D1 CF37 SPI0_CLK GPP_C0/SMBCLK CH15 MEM_SMBDATA MEM_SMBCLK 6 1
[66] CPU_SPI_D1 CPU_SPI_D0 CPU_SPI_0_D0 SPI0_MISO GPP_C1/SMBDATA GPP_C2 PCH_SMBCLK [23,24,40,67]
RC23 1 @ 2 0_0402_5% CF36 CJ15
[66] CPU_SPI_D0
5
CPU_SPI_D2 RC24 1 @ 2 0_0402_5% CPU_SPI_0_D2 CF34 SPI0_MOSI GPP_C2/SMBALERT# QC1B
CPU_SPI_D3 RC25 1 @ 2 0_0402_5% CPU_SPI_0_D3 CG34 SPI0_IO2 SPI - FLASH CH14 SML0_SMBCLK L2N7002DW1T1G_SC88-6
D CPU_SPI_0_CS#0 CG36 SPI0_IO3 SMBUS , SMLINK GPP_C3/SML0CLK CF15 SML0_SMBDATA MEM_SMBDATA 3 4 D
CPU_SPI_0_CS#1 SPI0_CS0# GPP_C4/SML0DATA GPP_C5 PCH_SMBDATA [23,24,40,67]
CG35 CG15
RC21 TPM@ RC24 TPM@ CH34 SPI0_CS1# GPP_C5/SML0ALERT#
e
10_0402_1% 10_0402_1% [66] CPU_SPI_0_CS#2 SPI0_CS2# CN15 SML1_SMBCLK
GPP_C6/SML1CLK SML1_SMBDATA SML1_SMBCLK [28,58,66]
SD034100A80 SD034100A80 CM15
GPP_C7/SML1DATA GPP_B23 SML1_SMBDATA [28,58,66]SML1 -> EC, THM, GPU
CF20 CC34
[66] TPM_SPI_IRQ# FFS_INT1 GPP_D1/SPI1_CLK/BK1/SBK1 GPP_B23/SML1ALERT#/PCHHOT#
CG22
[67] FFS_INT1 GPP_D2/SPI1_MISO_IO1/BK2/SBK2
RC22 TPM@ RC25 TPM@ CF22
10_0402_1% 10_0402_1% CG23 GPP_D3/SPI1_MOSI_IO0/BK3/SBK3 CA29 ESPI_IO0
SD034100A80 SD034100A80 CH23 GPP_D21/SPI1_IO2 SPI - TOUCH GPP_A1/LAD0/ESPI_IO0 BY29 ESPI_IO1 ESPI_IO0 1 2
HDD_DET# GPP_D22/SPI1_IO3 GPP_A2/LAD1/ESPI_IO1 ESPI_IO2 ESPI_IO1 ESPI_IO0_R [58]
CG20 BY27 RC192 1 2 15_0402_5%
[67] HDD_DET# GPP_D0/SPI1_CS0#/BK0/SBK0 GPP_A3/LAD2/ESPI_IO2 ESPI_IO3 ESPI_IO2 ESPI_IO1_R [58]
BV27 RC193 1 2 15_0402_5%
GPP_A4/LAD3/ESPI_IO3 ESPI_IO3 ESPI_IO2_R [58]
RC23 TPM@ CA28 RC194 1 2 15_0402_5%
GPP_A5/LFRAME#/ESPI_CS# ESPI_RST# ESPI_CS# [58] ESPI_IO3_R [58]
10_0402_1% CA27 RC195 15_0402_5%
SD034100A80 CH7 LPC , ESPI GPP_A14/SUS_STAT#/ESPI_RESET# ESPI_RST# [58]
CH8 CL_CLK
CL_DATA C LINK
RC21 FTPM@ CH9 BV32 ESPI_CLK 1 EMI@ 2
S RES 1/16W 5.6 +-5% 0402 CL_RST# GPP_A9/CLKOUT_LPC0/ESPI_CLK BV30 RC26 33_0402_5% ESPI_CLK_R [58]
D
SD028560B80 BV29 GPP_A10/CLKOUT_LPC1 BY30
BV28 GPP_A0/RCIN#/TIME_SYNC1 GPP_A8/CLKRUN#
GPP_A6/SERIRQ 1
RC22 FTPM@ CC3 @RF@
+3VS S RES 1/16W 5.6 +-5% 0402 10P_0402_50V8J
SD028560B80 WHL-U42_BGA1528 +3VS
2
FFS_INT1 5 of 20
1 2 RC23 FTPM@
RC27 10K_0402_5% S RES 1/16W 5.6 +-5% 0402 PCH_SMBDATA 2 1
1 2 HDD_DET# SD028560B80 2.2K_0402_5% RC28
RC206 10K_0402_5% PCH_SMBCLK 2 1
RC24 FTPM@ 2.2K_0402_5% RC29
r
S RES 1/16W 5.6 +-5% 0402
SD028560B80 ESPI_RST# 2 1
RC205 100K_0402_5% +3VALW_PCH
C +3VALW_PCH +3.3V_SPI RC25 FTPM@ C
S RES 1/16W 5.6 +-5% 0402
1 @ 2 SD028560B80 SML1_SMBCLK 2 1
RC30 0_0603_5% RC196 1K_0402_5%
SML1_SMBDATA 2 1
RC197 1K_0402_5%
MEM_SMBCLK 2 1
o
+3.3V_SPI RC198 1K_0402_5%
MEM_SMBDATA 2 1
RC199 1K_0402_5%
1 @ 2 CPU_SPI_0_CS#0
RC31 4.7K_0402_5% RC32 1 CMC@ 2 1K_0402_1% CPU_SPI_D0
[80] XDP_HOOK3
Reserve For EC Auto Load Code
f
RC40 place to within 1100 mil of SPIO_MOSI/SPI0_IO2 pin for XDP SML0_SMBCLK 2 1
+3.3V_SPI RC33 1K_0402_5%
SML0_SMBDATA 2 1
RC34 1K_0402_5%
1 2 CPU_SPI_0_D0
RC35 100K_0402_5%
1 2 CPU_SPI_0_D2
RC36 100K_0402_5% Weak Int. PD.
1 2 CPU_SPI_0_D3 +3VALW_PCH
RC37 100K_0402_5%
GPP_C2 2 1
Follow 566439 RC38 4.7K_0402_5%
1 2 CPU_SPI_0_CLK
y
RC187 100K_0402_5% TLS CONFIDENTIALITY
B +3.3V_SPI LOW(DEFAULT) DISABLE B
HIGH ENABLE
l
1 2
CC4 0.1U_0402_10V7K Weak Int. PD.
UC3 +3VALW_PCH
CPU_SPI_0_CS#0 1 8
CPU_SPI_D2 RC39 1 FTPM@ 2 49.9_0402_1% SPI_D2_ROM 3 CS# VCC 6 SPI_CLK_ROM RC40 1 FTPM@ 2 49.9_0402_1% CPU_SPI_CLK
CPU_SPI_D3 RC41 1 FTPM@ 2 49.9_0402_1% SPI_D3_ROM 7 WP# SCLK 5 SPI_D0_ROM RC42 1 FTPM@ 2 49.9_0402_1% CPU_SPI_D0 GPP_C5 2 1
4 HOLD# SI/SIO0 2 SPI_D1_ROM RC43 1 FTPM@ 2 49.9_0402_1% CPU_SPI_D1 RC44 4.7K_0402_5%
GND SO/SIO1 RC39 TPM@ RC177 TPM@ SPI_CLK_ROM
W25Q64JVSSIQ_SO8 33_0402_1% 33_0402_1%
n
SD034330A80 SD034330A80 EC interface
64Mb Flash ROM
2
33_0402_5%
RC40 TPM@ RC178 TPM@ LOW(DEFAULT) LPC
RC45
@EMI@
33_0402_1% 33_0402_1%
SD034330A80 SD034330A80 HIGH eSPI
+3.3V_SPI UC3 place colse to UX1 RC41 TPM@ RC179 TPM@
1
33_0402_1% 33_0402_1%
2 CPU_SPI_0_CS#1 +3.3V_SPI
33P_0402_50V8J
1 SD034330A80 SD034330A80
RC207 4.7K_0402_5% +3VALW_PCH
CC5
@EMI@
RC42 TPM@ RC180 TPM@
33_0402_1% 33_0402_1%
1 2 SD034330A80 SD034330A80 GPP_B23 2 CMC@ 1
1
CC74 0.1U_0402_10V7K RC46 4.7K_0402_5%
O
UC11 RC43 TPM@ RC181 TPM@
CPU_SPI_0_CS#1 1 8 33_0402_1% 33_0402_1%
CPU_SPI_D2 RC177 1 FTPM@ 2 49.9_0402_1% SPI_D2_ROM2 3 CS# VCC 6 SPI_CLK_ROM2 RC178 1 FTPM@ 2 49.9_0402_1% CPU_SPI_CLK SD034330A80 SD034330A80
CPU_SPI_D3 RC181 1 FTPM@ 2 49.9_0402_1% SPI_D3_ROM2 7 WP# SCLK 5 SPI_D0_ROM2 RC180 1 FTPM@ 2 49.9_0402_1% CPU_SPI_D0 Intel DCI-OOB
4 HOLD# SI/SIO0 2 SPI_D1_ROM2 RC179 1 FTPM@ 2 49.9_0402_1% CPU_SPI_D1
LOW(DEFAULT) DISABLE
A GND SO/SIO1
W25Q128JVSIQ_SO8
place colse to UC3 HIGH ENABLE
A
128Mb Flash ROM
UC11 place colse to UX1 Security Classification Compal Secret Data Compal Electronics, Inc.
CPU(3/12)SPI,ESPI,SMB,LPC
Custom 1.0
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
ME_FWP
l
LOW = ENABLE -->ME lock, can't update ME
HIGH = DISABLE -->ME un-lock, can update ME
UC1G
RC47 1 2 33_0402_5% HDA_SYNC BN34
l
[56] HDA_SYNC_R 1 2 HDA_BIT_CLK BN37 HDA_SYNC/I2S0_SFRM CH36
RC48 33_0402_5%
[56] HDA_BIT_CLK_R HDA_SDOUT HDA_BCLK/I2S0_SCLK GPP_G0/SD_CMD
RC49 1 2 33_0402_5% BN36 AUDIO SDIO / SDXC CL35
[56] HDA_SDOUT_R HDA_SDO/I2S0_TXD GPP_G1/SD_DATA0
[58] ME_FWP RC50 1 2 1K_0402_5% BN35 CL36
[56] HDA_SDIN0 BL36 HDA_SDI0/I2S0_RXD GPP_G2/SD_DATA1 CM35
BL35 HDA_SDI1/I2S1_RXD/SNDW1_DATA GPP_G3/SD_DATA2 CN35
CK23 HDA_RST#/I2S1_SCLK/SNDW1_CLK GPP_G4/SD_DATA3 CH35
GPP_D23/I2S_MCLK GPP_G5/SD_CD# CK36
D HDA_BIT_CLK BL37 GPP_G6/SD_CLK CK34 KB_LED_BL_DET [63] D
+3V_HDA BL34 I2S1_SFRM/SNDW2_CLK GPP_G7/SD_WP +1.8V_PRIM
Weak Int. PD. I2S1_TXD/SNDW2_DATA
e
1
@RF@
1 @ 2 HDA_SDOUT CC6 CNV_RF_RESET# CJ32
RC51 4.7K_0402_5% 2.2P_0201_25V8C [52] CNV_RF_RESET# CH32 GPP_H1/I2S2_SFRM/CNV_BT_I2S_BCLK/CNV_RF_RESET#
GPP_H0/I2S2_SCLK/CNV_BT_I2S_SCLK
1
2 CLKREQ_CNV# CH29
[52] CLKREQ_CNV# CH30 GPP_H2/I2S2_TXD/CNV_BT_I2S_SDI/MODEM_CLKREQ BW36 INSPIRON@ @
GPP_H3/I2S2_RXD/CNV_BT_I2S_SDO GPP_A17/SD_VDD1_PWR_EN#/ISH_GP7 BY31 RC52 RC53
CP24 GPP_A16/SD_1P8_SEL 10K_0402_5% 10K_0402_5%
Flash Descriptor Security override CN24 GPP_D19/DMIC_CLK0/SNDW4_CLK
2
GPP_D20/DMIC_DATA0/SNDW4_DATA CK33 PROJECT_ID1
LOW(DEFAULT) ENABLE TPM_ID SD_1P8_RCOMP SD_RCOMP RC54 2 PROJECT_ID3
CK25 CM34 1 200_0402_1%
HIGH DISABLE DGPU_PWROK CJ25 GPP_D17/DMIC_CLK1/SNDW3_CLK SD_3P3_RCOMP
[27,92,94] DGPU_PWROK GPP_D18/DMIC_DATA1/SNDW3_DATA
1
SPKR CF35 VOSTRO@
[56] SPKR GPP_B14/SPKR RC55 RC56
WHL-U42_BGA1528 10K_0402_5% 10K_0402_5%
D
+3VALW_PCH
Weak Int. PD. COMPENSATION FOR SD_RCOMP
2
7 of 20
1 @ 2 SPKR
CAD Note:
RC57 4.7K_0402_5% Min trace width=10 mils, Spacing=12 mils
Max trace length=500 mils
RC53,RC56
eMMC SKU Opt i onal
Top Swap Override
LOW Standard
LOW(DEFAULT) DISABLE UC1I HIGH Narrow Border
HIGH ENABLE
r
CR30 CNVio CN27
[52] CNV_CRX_DTX_N0 CNV_WR_D0N GPP_H18/CPU_C10_GATE# CPU_C10_GATE# [78]
CP30
[52] CNV_CRX_DTX_P0 CNV_WR_D0P CM27
CM30 GPP_H19/TIMESYNC_0
C [52] CNV_CRX_DTX_N1 CNV_WR_D1N GPP_H21 C
CN30 CF25
[52] CNV_CRX_DTX_P1 CNV_WR_D1P GPP_H21/XTAL_FREQ_SELECT
CN32 CN26
[52] CNV_CTX_DRX_N0 CNV_WT_D0N GPP_H22 GPP_H23
CM32 CM26
[52] CNV_CTX_DRX_P0 CNV_WT_D0P GPP_H23
GPP_F10
CK17 GPD PU to DSW PWR rail +3VALW_DSW
CP33
+3VALW_PCH [52] CNV_CTX_DRX_N1 CNV_WT_D1N
CN33 BV35 GPD7
[52] CNV_CTX_DRX_P1 CNV_WT_D1P GPD7 PROJECT_ID3
o
CN20 GPD7 2 1
CN31 GPP_F3 RC58 100K_0402_5%
[52] CLK_CNV_CRX_DTX_N CNV_WR_CLKN WIFI_RF_EN
CP31 CG25
[52] CLK_CNV_CRX_DTX_P CNV_WR_CLKP GPP_D4/IMGCLKOUT0/BK4/SBK4 WIFI_RF_EN [52]
1
CP34 CH25
[52] CLK_CNV_CTX_DRX_N CNV_WT_CLKN GPP_H20/IMGCLKOUT_1
FTPM@ CN34
[52] CLK_CNV_CTX_DRX_P CNV_WT_CLKP
RC59 CR20
10K_0402_5% 1 2 CNV_WT_RCOMP CP32 GPP_F12/EMMC_DATA0 CM20
CR32 CNV_WT_RCOMP_0 GPP_F13/EMMC_DATA1 CN19
f
RC60 150_0201_1% Weak Int. PD.
2
TPM_ID CP20 CNV_WT_RCOMP_1 EMMC GPP_F14/EMMC_DATA2 CM19 +3VALW_PCH

Follow RVP GPP_F0/CNV_PA_BLANKING GPP_F15/EMMC_DATA3 CN18
PROJECT_ID1 CK19 GPP_F16/EMMC_DATA4 CR18
GPP_F1 GPP_F17/EMMC_DATA5
1
PROJECT_ID2 CG17 CP18 GPP_H21 2 1

TPM@ GPP_F2 GPP_F18/EMMC_DATA6 CM18 RC62 4.7K_0402_5%
RC63 COMPENSATION FOR CNV_WT_RCOMP CR14 GPP_F19/EMMC_DATA7
10K_0402_5% BLUETOOTH_EN CP14 GPP_C8/UART0_RXD
CAD Note: [52] BLUETOOTH_EN CN14 GPP_C9/UART0_TXD CM16
XTAL Frequency Select
Min trace width=10 mils, Spacing=15 mils [38] LCD_CBL_DET#
2
BOARD_ID2 CM14 GPP_C10/UART0_RTS# GPP_F20/EMMC_RCLK CP16

Max trace length=500 mils GPP_C11/UART0_CTS# GPP_F21/EMMC_CLK CR16
LOW(DEFAULT) 38.4MHz
CJ17 GPP_F11/EMMC_CMD CN16 HIGH 24MHz
CH17 GPP_F8/CNV_MFUART2_RXD GPP_F22/EMMC_RESET#
GPP_F9/CNV_MFUART2_TXD CK15 EMMC_RCOMP 1 2
1 @ 2 A4WP_PRESENT CF17 EMMC_RCOMP RC64 200_0402_1%
RC61 10K_0402_5% GPP_F23/A4WP_PRESENT
Weak Int. PD. +3VALW_PCH
y
WHL-U42_BGA1528
9 of 20 COMPENSATION FOR EMMC_RCOMP GPP_H23 2 @ 1

CAD Note: RC65 4.7K_0402_5%
B Min trace width=10 mils, Spacing=12 mils B
l
+3VALW Max trace length=500 mils eSPI Flash Sharing Mode
LOW(DEFAULT) MAF EABLE
1 @ 2 BLUETOOTH_EN HIGH SAF EABLE
RC174 10K_0402_5%
1 @ 2 WIFI_RF_EN
RC175 10K_0402_5%
+3VALW_PCH
+3VS
n
+1.8V_PRIM
1
1 2 DGPU_PWROK BASE@
RC68 10K_0402_5% RC69 RC70
1
10K_0402_5% 10K_0402_5%
2
BOARD_ID2 RC200
10K_0402_5%
RC200,RC201
[11] BOARD_ID1 DIS/UMA SKU Opt i onal
2
1
PROJECT_ID2
LOW(DEFAULT) UMA
PREM@ @
RC71 RC72 HIGH DIS
1
10K_0402_5% 10K_0402_5%
@
2
1 CNV@ 2 CNV_RF_RESET# RC201
O
RC74 75K_0402_1% 10K_0402_5%
2
1 @ 2 CLKREQ_CNV#
RC73 71.5K_0402_1%
CPU ID BOARD_ID2 BOARD_ID1

(GPP_C11) (GPP_C12)
A
CML-U --- RC70 A
WHL-U(Reserved) --- RC72

Pentium/Celeron RC69 ---
i3/i5/i7 RC71 ---
CPU(4/12)HDA,EMMC,SD
Custom 1.0
5 4 3 2 1
5 4 3 2 1
RC78,RC81,RC85,RC88 close to Device
l
+RTC_SOC
UC1J
CLOCK SINGNALS CLK_ITPXDP_N PCH_SRTCRST#
AW2 AU1 TP14 2 1
[27] CLK_PEG_N0 AY3 CLKOUT_PCIE_N_0 CLKOUT_ITPXDP_N AU2 CLK_ITPXDP_P TP15 RC77 20K_0402_5%
[27] CLK_PEG_P0 CF32 CLKOUT_PCIE_P_0 CLKOUT_ITPXDP_P
GPU---> 1 2
l
[28] CLKREQ_PEG#0 1 2 10K_0402_5% GPP_B5/SRCCLKREQ0# BT32 1 CNV@ 2
RC78 SUSCLK CC7 1U_0201_6.3V6M
+3VS GPD8/SUSCLK SUSCLK_WLAN [52]
BC1 RC79 0_0201_5% 1 2
[52] CLK_PCIE_N1 CLKOUT_PCIE_N_1 XTAL24_IN
BC2 CK3 1 @ 2 @ CLRP1 SHORT PADS
[52] CLK_PCIE_P1 CE32 CLKOUT_PCIE_P_1 XTAL_IN CK2 XTAL24_OUT SUSCLK_EC [58]
WLAN---> RC80 0_0201_5% CLR all register bits
[52] CLKREQ_PCIE#1 GPP_B6/SRCCLKREQ1# XTAL_OUT PCH_RTCRST#
RC81 1 2 10K_0402_5% 2 1
+3VS XCLK_BIASREF
BD3 CJ1 RC83 1 2 60.4_0402_1% RC82 20K_0402_5%
[51] CLK_PCIE_N2 CLKOUT_PCIE_N_2 XCLK_BIASREF REFCLK_CNV_R
BC3 CM3 1 2 1 2
D [51] CLK_PCIE_P2 CLKOUT_PCIE_P_2 CLKIN_XTAL REFCLK_CNV [52] D
CF30 RC84 CNV@ 0_0201_5% CC8 1U_0201_6.3V6M
LAN---> [51] CLKREQ_PCIE#2
RC85 1 2 10K_0402_5% GPP_B7/SRCCLKREQ2# BN31 PCH_RTCX1 1 2
+3VS RTCX1 PCH_RTCX2
e
BH3 BN32 @ CLRP2 SHORT PADS
CLKOUT_PCIE_N_3 RTCX2 CLRP1, CLRP2
1
BH4 CLR CMOS
CLKOUT_PCIE_P_3 PCH_SRTCRST#
CE31
GPP_B8/SRCCLKREQ3# SRTCRST#
BR37
BR34 PCH_RTCRST#
RC86 Always Open
RTCRST# 10K_0402_5%
BA1 INTRUDER# 2 1
[68] CLK_PCIE_N4 CLKOUT_PCIE_N_4
BA2 RC87 1M_0402_5%
[68] CLK_PCIE_P4
2
CE30 CLKOUT_PCIE_P_4
SSD---> [68] CLKREQ_PCIE#4
RC88 1 2 10K_0402_5% GPP_B9/SRCCLKREQ4#
+3VS
BE1
BE2 CLKOUT_PCIE_N_5
CF31 CLKOUT_PCIE_P_5
GPP_B10/SRCCLKREQ5# COMPENSATION FOR XCLK_BIASREF CC9
RC89 1 EMI@ 2 33_0402_5% XTAL24_IN_R 1 2
WHL-U42_BGA1528
10 of 20
CAD Note:
Min trace width=10 mils, Spacing=15 mils
1
Max trace length=1000 mils 15P_0201_25V8J
200K_0402_1%
D
3
4
RC90
YC1
24MHZ_12PF_X3G024000DC1H
1
2
PCH_PLTRST# XTAL24_IN
XTAL24_OUT
RC91
1 EMI@ 2
33_0402_5%
XTAL24_OUT_R 1
CC10
2
+3VS 15P_0201_25V8J
UC4 change CPN &
Description only
5
r
Jason 2019-04-26
PCH_PLTRST# 1
P
IN1 4 CC11
O PLTRST# [27,51,52,58,66,68] PCH_RTCX1
2
IN2 0.1U_0402_10V7K 1 2
G
PCH_RTCX2
100K_0402_5%
UC4 1
C C
RC94
MC74VHC1G08EDFT2G_SC70 6.8P_0402_50V8C
3
CC75
ESD@
1
YC2
2 RC95 32.768KHZ_9PF_X1A000141000200
2
10M_0402_5% 20ppm / 9pF

07/4 ESD require ESR <50kohm (MAX)
2
o
1
CC12
1 2
6.8P_0402_50V8C
+3VALW_DSW
f
SIO_SLP_S3#
SYS_PWROK SIO_SLP_S4# TP17
1 2
TP18 PCH_BATLOW# 2 1
CC79 0.1U_0402_10V7K
@ESD@ UC1K RC96 10K_0402_5%
AC_PRESENT 2 @ 1
07/4 ESD require SYSTEM POWER MANAGEMENT BJ37 SIO_SLP_S0# RC97 10K_0402_5%
PCH_PLTRST# BJ35 GPP_B12/SLP_S0# BU36 SIO_SLP_S3# TP16 SIO_PWRBTN# 2 @ 1
[80] PCH_RSMRST#_Q SYS_RESET# GPP_B13/PLTRST# GPD4/SLP_S3# SIO_SLP_S4# SIO_SLP_S3# [78]
CN10 BU27 RC98 100K_0402_5%
PCH_RSMRST#_Q SYS_RESET# GPD5/SLP_S4# SIO_SLP_S5# SIO_SLP_S4# [78,86]
RC75 1 2 10K_0402_5% BR36 BT29
RSMRST# GPD10/SLP_S5# SIO_SLP_S5# [84]
+3VALW_PCH TP20 H_CPUPWRGD_R RC76 1 @ 2 1K_0402_5% H_CPUPWRGD AR2 BU29 SIO_SLP_SUS#
PROCPWRGD SLP_SUS# TP19
RC99 1 2 62_0402_1% VCCST_PWRGD BJ2 BT31 SIO_SLP_LAN# AC_PRESENT 2 1
[78] H_VCCST_PWRGD VCCST_PWRGOOD SLP_LAN# BT30 SIO_SLP_WLAN# TP21
RC66 10K_0402_5%
SYS_RESET# GPD9/SPL_WLAN# SIO_SLP_A# TP22 SIO_SLP_S3#
1 2 CR10 BU37 2 1
[58] SYS_PWROK SYS_PWROK GPD6/SLP_A# TP23
RC100 10K_0402_5% BP31 RC10 100K_0402_5%
PCH_RSMRST#_Q [58] RESET_OUT# PCH_DPWROK PCH_PWROK SIO_PWRBTN# SIO_SLP_S4#
1 @ 2 BP30 BU28 2 1
y
RC101 0_0201_5% DSW_PWROK GPD3/PWRBTN# BU35 AC_PRESENT SIO_PWRBTN# [58]
RC11 100K_0402_5%
WHL
BV34 GPD1/ACPRESENT BV36 PCH_BATLOW# need PD
BY32 GPP_A13/SUSWARN#/SUSPWRDACK GPD0/BATLOW# 1 2
GPP_A15/SUSACK# CC76 0.1U_0402_10V7K
1 @ 2 PCH_PCIE_WAKE# BU30 BR35 INTRUDER# @ESD@
[51,52,58,68] PCIE_WAKE# WAKE# INTRUDER#
B RC102 0_0201_5% BU32 07/4 ESD require B
l
BU34 GPD2/LAN_WAKE# CC37 EXT_PWR_GATE#
+3VALW_DSW [58] LANWAKE# GPD11/LANPHYPC GPP_B11/EXT_PWR_GATE# TP24
CC36
GPP_B2/VRALERT# +3VALW_DSW
BT27 INPUT3VSEL
1 2 PCH_PCIE_WAKE# INPUT3VSEL
RC92 4.7K_0402_5% INPUT3VSEL 2 @ 1
1 2 LANWAKE# RC103 4.7K_0402_5%
RC93 10K_0402_5% WHL-U42_BGA1528 1 2
11 of 20 RC104 4.7K_0402_5%
n
3.0V Select
LOW 0: 3.3V supply is 3.3V +- 5%
HIGH 1: 3.3V supply is 3.0V +- 5%
O
POK RSMRST circuit +3VALW
@ CC13
1 2
1
1M_0402_5%
1U_0201_6.3V6M
1 0.1U_0402_10V7K
5
CC14
RC105
A A
1
P
2 [58] PCH_RSMRST# IN1 PCH_RSMRST#_Q

4
2
POK 2 O
[78,82,85] POK IN2
G
UC5 change CPN & UC5

3
Description only MC74VHC1G08EDFT2G_SC70

Jason 2019-04-26

CPU(5/12)CLK,GPIO
WWW.AliSaler.Com
Custom 1.0
5 4 3 2 1
5 4 3 2 1
l
+1.8V_PRIM
1 CNV@ 2 CNV_BRI_CRX_DTX
RC121 20K_0402_5%
1 CNV@ 2 CNV_RGI_CRX_DTX
l
RC122 20K_0402_5%
1 @ 2 CNV_BRI_CTX_DRX
RC202 20K_0402_5%
D D
+3VS
e
UC1F
CC27
1 2 DBC_PANEL_EN CC32 GPP_B15/GSPI0_CS0# CN22
RC106 10K_0402_5% CE28 GPP_A7/PIRQA#/GSPI0_CS1# GPP_D9/ISH_SPI_CS#/GSPI2_CS0# CR22 DGPU_HOLD_RST# DGPU_HOLD_RST# 1 DIS@ 2
VRAM_ID1 CE27 GPP_B16/GSPI0_CLK GPP_D10/ISH_SPI_CLK/GSPI2_CLK CM22 CAM_DET# DGPU_HOLD_RST# [27]
RC107 10K_0402_5%
NRB_BIT CE29 GPP_B17/GSPI0_MISO ISH GPP_D11/ISH_SPI_MISO/GSPI2_MISO CP22 RTC_DET# CAM_DET# [38]
GPP_B18/GSPI0_MOSI GPP_D12/ISH_SPI_MOSI/GSPI2_MOSI RTC_DET# [66]
DBC_PANEL_EN CA31 CK22
[38] DBC_PANEL_EN GPP_A11 GPP_B19/GSPI1_CS0# GPP_D5/ISH_I2C0_SDA
CA32 CH20
TP25 TOUCH_I2C_DET# CC29 GPP_A11/PME#/GSPI1_CS1#/SD_VDD2_PWR_EN# GPP_D6/ISH_I2C0_SCL
CC30 GPP_B20/GSPI1_CLK CH22
+1.8V_PRIM [38] PCH_3.3V_TS_EN SD_READ_MODE CA30 GPP_B21/GSPI1_MISO GPP_D7/ISH_I2C1_SDA CJ22
[73] SD_READ_MODE GPP_B22/GSPI1_MOSI GPP_D8/ISH_I2C1_SCL
CNV_BRI_CRX_DTX CK20
[52] CNV_BRI_CRX_DTX GPP_F5/CNV_BRI_RSP
1 CNV@ 2 CNV_RGI_CTX_DRX CNV_RGI_CTX_DRX CG19 CJ27
D
[52] CNV_RGI_CTX_DRX CNV_BRI_CTX_DRX GPP_F6/CNV_RGI_DT GPP_H10/I2C5_SDA/ISH_I2C2_SDA
RC162 20K_0402_5% CJ20 CJ29
[52] CNV_BRI_CTX_DRX CNV_RGI_CRX_DTX GPP_F4/CNV_BRI_DT GPP_H11/I2C5_SCL/ISH_I2C2_SCL +3VS
1 @ 2 CH19
[52] CNV_RGI_CRX_DTX GPP_F7/CNV_RGI_RSP DGPU_PWR_EN
RC108 4.7K_0402_5% CM24
GPP_D13/ISH_UART0_RXD CN23 VRAM_ID2 DGPU_PWR_EN [37,92]
CR12 GPP_D14/ISH_UART0_TXD CM23 CAM_DET# 2 1
CP12 GPP_C20/UART2_RXD GPP_D15/ISH_UART0_RTS#/GSPI2_CS1# CR24 IO_CBL_DET# [73]
M.2 CNV Mode Select RC204 10K_0402_5%
SIO_EXT_WAKE# GPP_C21/UART2_TXD GPP_D16/ISH_UART0_CTS#/SML0BALERT# VGA_CBL_DET# [40] FFS_INT2
CN12 2 1
[58] SIO_EXT_WAKE# KB_DET# GPP_C22/UART2_RTS#
CNVi ENABLE CM12 CG12 RC109 10K_0402_5%
LOW [63] KB_DET# GPP_C23/UART2_CTS# GPP_C12/UART1_RXD/ISH_UART1_RXD CH12 FFS_INT2 BOARD_ID1 [9]
HIGH CNVi DISABLE CM11 I2C , UART GPP_C13/UART1_TXD/ISH_UART1_TXD CF12 UART1_RTS# FFS_INT2 [67]
[63] I2C_0_SDA GPP_C16/I2C0_SDA GPP_C14/UART1_RTS#/ISH_UART1_RTS# UART1_CTS# TP26 +3VALW_PCH
CN11 CG14
[63] I2C_0_SCL GPP_C17/I2C0_SCL GPP_C15/UART1_CTS#/ISH_UART1_CTS# TP27
CK12 BW35
r
[38] I2C_1_SDA GPP_C18/I2C1_SDA GPP_A18/ISH_GP0 KB_DET#
CJ12 BW34 2 1
+3VALW_PCH Weak Int. PD. [38] I2C_1_SCL GPP_C19/I2C1_SCL GPP_A19/ISH_GP1 CA37 RC110 10K_0402_5%
CF27 GPP_A20/ISH_GP2 CA36 RTC_DET# 2 1
CF29 GPP_H4/I2C2_SDA GPP_A21/ISH_GP3 CA35 RC111 100K_0402_5%
C 1 @ 2 NRB_BIT GPP_H5/I2C2_SCL GPP_A22/ISH_GP4 CA34 SIO_EXT_WAKE# 2 1 C
RC112 4.7K_0402_5% I2C_3_SDA CH27 GPP_A23/ISH_GP5 BW37 RC113 10K_0402_5%
PWR MONITOR I2C_3_SCL CH28 GPP_H6/I2C3_SDA GPP_A12/ISH_GP6/BM_BUSY#/SX_EXIT_HOLDOFF#
GPP_H7/I2C3_SCL
NO REBOOT Mode CJ30
CJ31 GPP_H8/I2C4_SDA
GPP_H9/I2C4_SCL
o
+3VS
LOW(DEFAULT) DISABLE WHL-U42_BGA1528
HIGH ENABLE
1
6 of 20
Weak Int. PD. RC114 DIS@

+3VALW_PCH
f
36K_0402_5%
2
DGPU_PWR_EN
1 @ 2 SD_READ_MODE
2
RC115 4.7K_0402_5%
RC116 DIS@
150K_0402_5%
Boot BIOS Strap
1
+3VALW_PCH +3VALW_PCH
LOW(DEFAULT) SPI
HIGH LPC
1
1
TS_NON@ Change Touch screen @ @
+3VALW_PCH RC208 detect strap pin define RC117 RC118
y
10K_0402_5% Jason 2019-06-18 10K_0402_5% 10K_0402_5%
2
2
1 2 I2C_3_SDA TOUCH_I2C_DET#
I2C_3_SDA [79] VRAM_ID2
RC182 4.7K_0402_5%
1 2 I2C_3_SCL VRAM_ID1
I2C_3_SCL [79]
1
B RC183 4.7K_0402_5% B
l 1
1
TS_I2C@
RC209 2G_G5@ 2G_G5@
10K_0402_5% RC119 RC120
10K_0402_5% 10K_0402_5%
2
n
RC208,RC209
Touch panel interface
LOW I2C VRAM ID VBIOS_ID2 VBIOS_ID1
HIGH USB (PCBA VRAM Size Config.) (GPP_CN23) (GPP_CE27)
2G GDDR5 0 0
Reserved 0 1
Reserved 1 0
Reserved 1 1
*Combine in X76
5
O 4 3
Compal Secret Data
2
Title
Custom
Date:
Size Document Number

CPU(6/12)GPIO
LA-G716P
1
Sheet 11 of 101
R ev
1.0
A
5 4 3 2 1
PEG_CRX_GTX_N[5..8]
[27] PEG_CRX_GTX_N[5..8]
l
PEG_CRX_GTX_P[5..8]
[27] PEG_CRX_GTX_P[5..8]
PEG_CTX_GRX_N[5..8]
[27] PEG_CTX_GRX_N[5..8]
PEG_CTX_GRX_P[5..8] UC1H
l
[27] PEG_CTX_GRX_P[5..8] CB5
PEG_CRX_GTX_N5 PCIE1_RXN/USB31_1_RXN USB3_CRX_DTX_N1 [71]
BW9 CB6
PEG_CRX_GTX_P5 PCIE5_RXN/USB31_5_RXN PCIE1_RXP/USB31_1_RXP USB3_CRX_DTX_P1 [71]
BW8 CA4
PEG_CTX_GRX_N5 BW4 PCIE5_RXP/USB31_5_RXP PCIE / USB3.1 / SATA PCIE1_TXN/USB31_1_TXN CA3 USB3_CTX_DRX_N1 [71] ---> USB3.0 (MB)
PEG_CTX_GRX_P5 BW3 PCIE5_TXN/USB31_5_TXN PCIE1_TXP/USB31_1_TXP USB3_CTX_DRX_P1 [71]
PCIE5_TXP/USB31_5_TXP BY8
D USB3_CRX_DTX_N2 [71] D
PEG_CRX_GTX_N6 BU6 PCIE2_RXN/USB31_2_RXN/SSIC_1_RXN BY9
PEG_CRX_GTX_P6 PCIE6_RXN/USB31_6_RXN PCIE2_RXP/USB31_2_RXP/SSIC_1_RXP USB3_CRX_DTX_P2 [71]
BU5 CA2
e
PEG_CTX_GRX_N6 BU4 PCIE6_RXP/USB31_6_RXP PCIE2_TXN/USB31_2_TXN/SSIC_1_TXN CA1 USB3_CTX_DRX_N2 [71] ---> USB3.0 (MB)
PEG_CTX_GRX_P6 BU3 PCIE6_TXN/USB31_6_TXN PCIE2_TXP/USB31_2_TXP/SSIC_1_TXP USB3_CTX_DRX_P2 [71]
PCIE6_TXP/USB31_6_TXP BY7
PEG_CRX_GTX_N7 BT7 PCIE3_RXN/USB31_3_RXN BY6
GPU ---> PEG_CRX_GTX_P7 BT6 PCIE7_RXN PCIE3_RXP/USB31_3_RXP BY4
PEG_CTX_GRX_N7 BU2 PCIE7_RXP PCIE3_TXN/USB31_3_TXN BY3
PEG_CTX_GRX_P7 BU1 PCIE7_TXN PCIE3_TXP/USB31_3_TXP
PCIE7_TXP BW6
PEG_CRX_GTX_N8 PCIE4_RXN/USB31_4_RXN USB3_CRX_MTX_N4 [42]
BU9 BW5
PEG_CRX_GTX_P8 PCIE8_RXN PCIE4_RXP/USB31_4_RXP USB3_CRX_MTX_P4 [42]
BU8 BW2
PEG_CTX_GRX_N8 BT4 PCIE8_RXP PCIE4_TXN/USB31_4_TXN BW1 USB3_CTX_MRX_N4 [42] ---> TYPE C
PEG_CTX_GRX_P8 BT3 PCIE8_TXN PCIE4_TXP/USB31_4_TXP USB3_CTX_MRX_P4 [42]
PCIE8_TXP
D
CE3 USB20_N1 [71]
BP5 USB2_1N CE4
[51]
[51]
PCIE_CRX_DTX_N9
PCIE_CRX_DTX_P9
BP6 PCIE9_RXN USB2_1P USB20_P1 [71] -----> USB2.0 (MB)
BR2 PCIE9_RXP USB2.0 CE1
LOM ---> [51] PCIE_CTX_DRX_N9 BR1 PCIE9_TXN USB2_2N CE2
USB20_N2 [71]
[51] PCIE_CTX_DRX_P9 PCIE9_TXP USB2_2P USB20_P2 [71] -----> USB2.0 (M/B)
BN6 CG3 USB20_N3 [73]
[52] PCIE_CRX_DTX_N10 PCIE10_RXN USB2_3N
BN5 CG4
[52] PCIE_CRX_DTX_P10
BR4 PCIE10_RXP USB2_3P USB20_P3 [73] -----> USB2.0 (IO/B)
WLAN ---> [52] PCIE_CTX_DRX_N10 BR3 PCIE10_TXN CD3 USB20_N4 [43]
[52] PCIE_CTX_DRX_P10 PCIE10_TXP USB2_4N
r
CD4
[67] SATA_CRX_DTX_N0 BN10 USB2_4P USB20_P4 [43] -----> Touch Screen
BN8 PCIE11_RXN/SATA0_RXN CG5
SATA HDD ---> [67] SATA_CRX_DTX_P0
BN4 PCIE11_RXP/SATA0_RXP USB2_5N CG6
USB20_N5 [66]
C [67] SATA_CTX_DRX_N0 BN3 PCIE11_TXN/SATA0_TXN USB2_5P USB20_P5 [66] -----> Finger Printer C
[67] SATA_CTX_DRX_P0 PCIE11_TXP/SATA0_TXP CC1
BL6 USB2_6N CC2
USB20_N6 [38] Port 4, 8
[67] SATA_CRX_DTX_N1
BL5 PCIE12_RXN/SATA1A_RXN USB2_6P USB20_P6 [38] -----> CCD Colay Opt i onal
SATA ODD ---> [67]
[67]
SATA_CRX_DTX_P1
SATA_CTX_DRX_N1 BN2 PCIE12_RXP/SATA1A_RXP CG8 USB20_N7 [73]
PCIE12_TXN/SATA1A_TXN USB2_7N
o
BN1 CG9
[67] SATA_CTX_DRX_P1 PCIE12_TXP/SATA1A_TXP USB2_7P USB20_P7 [73] -----> Card Reader (IO/B)
[68] PCIE_CRX_DTX_N13 BK6 CB8 USB20_N8 [43]
BK5 PCIE13_RXN USB2_8N CB9
[68]
[68]
PCIE_CRX_DTX_P13
PCIE_CTX_DRX_N13 BM4 PCIE13_RXP USB2_8P USB20_P8 [43] (Reserved)
BM3 PCIE13_TXN CH5
[68] PCIE_CTX_DRX_P13
f
PCIE13_TXP USB2_9N CH6
BJ6 USB2_9P
[68] PCIE_CRX_DTX_N14 PCIE14_RXN
[68] PCIE_CRX_DTX_P14 BJ5 CC3 USB20_N10 [52]
BL2 PCIE14_RXP USB2_10N CC4
[68]
[68]
PCIE_CTX_DRX_N14
PCIE_CTX_DRX_P14 BL1 PCIE14_TXN USB2_10P USB20_P10 [52] -----> BT
PCIE14_TXP CC5 USB2_COMP RC123 1 2 113_0402_1%
PCIE SSD ---> [68] PCIE_CRX_DTX_N15 BG5 USB2_COMP CE8 USB2_ID RC124 1 @ 2 0_0402_5%
BG6 PCIE15_RXN/SATA1B_RXN USB2_ID CC6 USB2_VBUSSENSE RC125 1 @ 2 0_0402_5%
[68] PCIE_CRX_DTX_P15 PCIE15_RXP/SATA1B_RXP USB2_VBUSSENSE
[68] PCIE_CTX_DRX_N15 BL4
BL3 PCIE15_TXN/SATA1B_TXN CK6 USB_OC0#
[68] PCIE_CTX_DRX_P15 PCIE15_TXP/SATA1B_TXP GPP_E9/USB2_OC0#/GP_BSSB_CLK USB_OC0# [71]
CK5 USB_OC1#
GPP_E10/USB2_OC1#/GP_BSSB_DI USB_OC2# USB_OC1# [73]
[68] PCIE_CRX_DTX_N16 BE5 CK8
BE6 PCIE16_RXN/SATA2_RXN GPP_E11/USB2_OC2# CK9 USB_OC3#
[68] PCIE_CRX_DTX_P16 PCIE16_RXP/SATA2_RXP GPP_E12/USB2_OC3# USB_OC3# [50] COMPENSATION FOR USB2_COMP
y
[68] PCIE_CTX_DRX_N16 BJ4
BJ3 PCIE16_TXN/SATA2_TXN CP8
[68] PCIE_CTX_DRX_P16 PCIE16_TXP/SATA2_TXP GPP_E4/DEVSLP0 CR8 HDD_DEVSLP [67] CAD Note:
RC126 1 2 100_0402_1% PCIE_RCOMPN CE6 GPP_E5/DEVSLP1 CM8 Min trace width=50 Ohm, Spacing=15 mils
PCIE_RCOMPP CE5 PCIE_RCOMP_N GPP_E6/DEVSLP2 SSD_DEVSLP [68] Max trace length=500 mils
l
B PCIE_RCOMP_P CN8 B
CR28 GPP_E0/SATAXPCIE0/SATAGP0 CM10
GPP_H12/M2_SKT2_CFG_0 GPP_E1/SATAXPCIE1/SATAGP1 SATA_ODD_PRSNT# [67]
CP28 CP10
COMPENSATION FOR PCIE_RCOMP CN28 GPP_H13/M2_SKT2_CFG_1 GPP_E2/SATAXPCIE2/SATAGP2 M2_SSD_PEDET [68]
CM28 GPP_H14/M2_SKT2_CFG_2 CN7 SATA_LED#
CAD Note: GPP_H15/M2_SKT2_CFG_3 GPP_E8/SATALED#/SPI1_CS1# SATA_LED# [63,68]
Min trace width=10 mils AR3
Max trace mismatch=5 mils RSVD_69
W HL-U42_BGA1528
n
+3VS
8 of 20
GPIO DEVICE CONTROL SATA_LED# 1 2

RC127 10K_0402_5%
USB_OC0# USB Port (MB)
USB_OC1# USB Port (DB)
USB_OC2# NA
USB_OC3# USB Port (Type-C)
+3VALW_PCH
O
DEVSLP0 HDD
DEVSLP1 NA USB_OC3# 1 2
USB_OC0# RC188 1 2 10K_0402_5%
DEVSLP2 M.2 SSD USB_OC1# RC189 1 2 10K_0402_5%
USB_OC2# RC190 1 2 10K_0402_5%
A
RC191 10K_0402_5% A

CPU(7/12)PCIE,USB,SATA
WWW.AliSaler.Com
Custom 1.0
5 4 3 2 1
5 4 3 2 1
l
+VCCIO
+1.2V_DDR
UC1N
l
AK24 4.066A
CPU POWER 3 OF 4 VCCIO1
3.3A AD36 AK26
AH32 VDDQ1 VCCIO2 AL24
AH36 VDDQ2 VCCIO3 AL25
D AM36 VDDQ3 VCCIO4 AL26 D
AN32 VDDQ4 VCCIO5 AL27
AW32 VDDQ5 VCCIO6 AM25 +VCCST +VCCPLL_OC +VCCST +VCCSTG
VDDQ6 VCCIO7
e
AY36 AM27
BE32 VDDQ7 VCCIO8 BH24
VDDQ8 VCCIO9
PSC Side, BR11,BT11 PSC Side, BL27,BM26 PSC Side, BP11,BP2 PSC Side, BG1,BG2
BH36 BH25
R32 VDDQ9 VCCIO10 BH26
Y36 VDDQ10 VCCIO11 BH27
VDDQ11 VCCIO12
1U_0201_6.3V6M
0.1U_0201_6.3V6K
1U_0201_6.3V6M
1U_0201_6.3V6M
22U_0603_6.3V6M
1U_0201_6.3V6M
BJ24 1 1 1 1 1 @ 1
VCCIO13 BJ26
VCCIO14
CC15
CC16
CC17
CC18
CC72
CC19
BP16
BC28 VCCIO15 BP18
RSVD1 VCCIO16 2 2 2 2 2 2
+VCCST 60 BP11 BG8 +VCC_SA
BP2 VCCST1 VCCSA2 BG10
D
VCCST2 VCCSA1 BH9
VCCSA3
6A
BJ8
BG1 VCCSA5 BJ9
+VCCSTG 20 VCCSTG1 VCCSA6
BG2 BJ10
VCCSTG2 VCCSA4 BK8
BL27 VCCSA9 BK25 +VCCIO
+VCCPLL_OC 120 VCCPLL_OC1 VCCSA7
BM26 BK27 BSC Side PSC Side
VCCPLL_OC2 VCCSA8 BL8
BR11 VCCSA13 BL9
C +VCCST 130 VCCPLL1 VCCSA14 C
r
BT11 BL10
VCCPLL2 VCCSA10 BL24
VCCSA11 BL26
VCCSA12
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
BM24 1 1 1 1 1 1 1 1 1 1 1 @ 1 @ 1 @ 1 @
VCCSA15 BN25
VCCSA16
CC20
CC21
CC22
CC23
CC24
CC25
CC26
CC27
CC28
CC29
CC30
CC31
CC32
CC33
BP28 VCCIO_SENSE
VCCIO_SENSE BP29 VSSIO_SENSE TP30 2 2 2 2 2 2 2 2 2 2 2 2 2 2
VSSIO_SENSE TP31
o
BE7
VSSSA_SENSE BG7
VCCSA_SENSE
1
WHL-U42_BGA1528 RC165 +VCCIO : 10UF/6.3V/0402 *6
f
100_0402_1% 1UF/6.3V/0402 * 8
14 of 20 1 2
+VCC_SA
RC164 100_0402_1%
2
+1.2V_DDR
PSC Side BSC Side
VSA_SEN- [88]
VSA_SEN+ [88]
B B
Trace Length Match< 25 mils
y
10U_0402_6.3V6M
10U_0402_6.3V6M
22U_0603_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1 1 1 1 1 1 1 1 1 1 1 1 1 1
CC34
CC35
CC36
CC37
CC38
CC39
CC40
CC41
CC42
CC43
CC44
CC45
CC46
CC47
2 2 2 2 2 2 2 2 2 2 2 2 2 2
n l +1.2V_VDDQ : 22UF/6.3V/0603 *1
10UF/6.3V/0603 *9
1UF/6.3V/0402 * 4
O
CPU(8/12)POWER
B 1.0
5 4 3 2 1
5 4 3 2 1
+1.05V_PRIM
l
+1.05V_PRIM
Close to BP20
1U_0402_6.3V6K
1
UC1P
CC48
1 @ 2 +1.05V_MPHY 1.625A
l
CPU POWER 4 OF 4
RC128 0_0603_5% BP20 CB16
2 VCCPRIM_1P05_1 VCCPRIM_3P3_3 +3VALW_PCH
Close to BV12 BW16
VCCPRIM_1P05_9 +RTC_SOC
22U_0603_6.3V6M
1 BW18
BW19 VCCPRIM_1P05_10
D VCCPRIM_1P05_11 D
CC49
BY16 BR23 2 Close BR23
CA14 VCCPRIM_1P05_12 VCCRTC
2 VCCPRIM_1P05_14
0.1U_0402_10V7K
1U_0201_6.3V6M
BY20 1 1
VCCPRIM_1P05_13 +1.05V_PRIM
CC51
+1.8V_PRIM 696 CC15 BP24 CC50 1 @ 2 1U_0201_6.3V6M
VCCPRIM_1P8_1 DCPRTC
CC52
CD15 Intenal VRM Close to BP24
CD16 VCCPRIM_1P8_4
+1.05V_PRIM CP17 VCCPRIM_1P8_5 BR20 2 2
VCCPRIM_1P8_8 VCCPRIM_1P05_3 +1.05V_PRIM
+3VALW_PCH CB22 BT12

1 2 CB23 VCCPRIM_3P3_4 VCCAPLL_1P05_3
+1.05V_MPHYPLL VCCPRIM_3P3_5
RC129 0_0603_5% CC22 BP14 9
CC23 VCCPRIM_3P3_6 VCCA_BCLK_1P05
Close to BV2 VCCPRIM_3P3_7
1U_0402_6.3V6K
47U_0603_6.3V6M
1 CD22 BR14 102
VCCPRIM_3P3_8 VCCAPLL_1P05_1
1
+1.05V_PRIM CD23
VCCPRIM_3P3_9
CC53
CC54 CP29
D
VCCPRIM_3P3_10 BU12 42
2
2 BU15 VCCA_SRC_1P05
Close to BV18 4.26A VCCPRIM_CORE1
BU22 CP5 2
VCCPRIM_CORE2 VCCA_XTAL_1P05 +1.05V_XTAL
1U_0201_6.3V6M
1 BV15
@ BV16 VCCPRIM_CORE3 BY24
VCCPRIM_CORE4 VCCDPHY_1P24_2 610 +VCCLDOSRAM_1P24
CC55
BV18 CA24
+1.05V_PRIM BV19 VCCPRIM_CORE5 VCCDPHY_1P24_4
2 BV20 VCCPRIM_CORE6 BY23 VCCDPHY_1P24
BV22 VCCPRIM_CORE7 VCCDPHY_1P24_1 CA23
C VCCPRIM_CORE8 VCCDPHY_1P24_3 C
r
1 2 BW20 CP25 Intenal VRM Close to CP25
+1.05V_XTAL VCCPRIM_CORE9 VCCDPHY_1P24_5
RC130 0_0603_5% BW22
CA12 VCCPRIM_CORE10 BT23
Close to CP5 VCCPRIM_CORE11 VCCDSW_3P3_2 +3VALW_DSW 1
1U_0402_6.3V6K
47U_0603_6.3V6M
4.7U_0402_6.3V6M
CC58
1 CA16
VCCPRIM_CORE12
1
CA18 BR12 27 +1.05V_PRIM

VCCPRIM_CORE13 VCCA_19P2_1P05
CC56
CC57
CA19
CA20 VCCPRIM_CORE14 2
2
2 CB12 VCCPRIM_CORE15
VCCPRIM_CORE16
o
+1.05V_VCCDSW CB14
CB15 VCCPRIM_CORE17 CC18
VCCPRIM_CORE18 VCCPRIM_1P8_2 +1.8V_PRIM
CC19
BT24 VCCPRIM_1P8_3 CD18
Close to BT24 24 Intenal VRM VCCDSW_1P05 VCCPRIM_1P8_6
+3VALW_PCH CD19
VCCPRIM_1P8_7
1U_0201_6.3V6M
BU14 CP23
f
1 +1.05V_PRIM VCCAPLL_1P05_4 VCCPRIM_1P8_9
+1.8V_PRIM
CC59
1 @ 2 2.878A BV12 BW23 199
+3V_HDA +1.05V_MPHY VCCPRIM_MPHY_1P05_1 VCCPRIM_3P3_2 +3VALW_PCH
RC131 0_0402_5% BW12 Close to CP23
2 BW14 VCCPRIM_MPHY_1P05_3
Close to BT20 VCCPRIM_MPHY_1P05_4
1U_0201_6.3V6M
1U_0201_6.3V6M
1 BY12 1
BY14 VCCPRIM_MPHY_1P05_5 BP23
VCCPRIM_MPHY_1P05_6 VCCPRIM_3P3_1
CC60
CC61
@
BV2 CB36 PRIMCORE_VID0
2 +1.05V_MPHYPLL 152 VCCAMPHYPLL_1P05 GPP_B0/CORE_VID0 PRIMCORE_VID1 TP28 2
CB35
BR15 GPP_B1/CORE_VID1 TP29
B +1.05V_PRIM B
+3VALW_PCH VCCAPLL_1P05_2
280 CC12
y
VCCDUSB_1P05
1 @ 2 1 BR24
+3VALW_DSW +3VALW_DSW VCCDSW_3P3_1
RC132 0_0402_5%
+1.05V_PRIM 6 BT20
Close to BR24 +3V_HDA VCCHDA
l
1U_0201_6.3V6M
1
@ +3.3V_SPI 2 BV23
VCCSPI +VCCLDOSRAM_1P24 VCCDPHY_1P24
CC63
BT18
BT19 VCCPRIM_1P05_4
2 VCCPRIM_1P05_5
1U_0201_6.3V6M
1 BU18
BU19 VCCPRIM_1P05_7 1 CNV@ 2
VCCPRIM_1P05_8
CC62
RC133 0_0402_5%
BT22
2 VCCPRIM_1P05_6
n
BP22
VCCPRIM_1P05_2
BV14
+1.05V_MPHY VCCPRIM_MPHY_1P05_2
+1.8V_PRIM +3VALW_PCH WHL-U42_BGA1528
16 of 20
Close to CP29
Close to CP17
1U_0201_6.3V6M
1U_0201_6.3V6M
0.1U_0201_6.3V6K
A 1 1 1 A
@ @
CC64
CC65
CC66
O
2 2 2 Security Classification Compal Secret Data Compal Electronics, Inc.
CPU(9/12)Power
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B LA-G716P 1.0
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
+VCC_CORE +VCC_CORE +VCC_GT

70A 31A +VCC_GT
l
UC1L UC1M
CPU POWER 1 OF 4 CPU POWER 2 OF 4
AN9 AW24 A5 D15
AN10 VCCCORE5 VCCCORE35 AW25 A6 VCCGT8 VCCGT58 D17
l
AN27 VCCCORE3 VCCCORE38 AY24 Jason 2019-04-24 A12 VCCGT1 VCCGT61 E4
AP2 VCCCORE4 VCCCORE44 AY26 A14 VCCGT2 VCCGT64 F5
AP9 VCCCORE6 VCCCORE45 BA5 A15 VCCGT3 VCCGT69 F6
VCCCORE9 VCCCORE48 +VCC_CORE VCCGT4 VCCGT70
AP24 BA7 A17 F7
AP26 VCCCORE7 VCCCORE49 BA8 A18 VCCGT5 VCCGT71 F8
D D
AR5 VCCCORE8 VCCCORE50 BA25 A20 VCCGT6 VCCGT72 F11
AR6 VCCCORE13 VCCCORE46 BA27 VCCGT7 VCCGT65 F14
e
AR7 VCCCORE14 VCCCORE47 BB2 AA9 ES1/ES2 VCCGT66 F17
AR8 VCCCORE15 VCCCORE51 BB26 AB2 VCCGT11/VCCCORE75 VCCGT67 F20
AR10 VCCCORE16 VCCCORE52 BC5 AB8 VCCGT13/VCCCORE76 VCCGT68 G11
AT9 VCCCORE12 VCCCORE58 BC9 AC8 VCCGT12/VCCCORE79 VCCGT75 G15
AT24 VCCCORE19 VCCCORE59 BC10 AD9 VCCGT16/VCCCORE80 VCCGT76 G17
AT26 VCCCORE17 VCCCORE53 BC26 AE8 VCCGT17/VCCCORE81 VCCGT77 G18
AU5 VCCCORE18 VCCCORE54 BC27 AE9 VCCGT19/VCCCORE82 VCCGT78 G20
AU6 VCCCORE24 VCCCORE55 BD5 AE10 VCCGT20/VCCCORE83 VCCGT79 H5
AU7 VCCCORE25 VCCCORE63 BD8 AF2 VCCGT18/VCCCORE84 VCCGT87 H6
AU8 VCCCORE26 VCCCORE64 BD10 AF8 VCCGT22/VCCCORE85 VCCGT88 H7
VCCCORE27 VCCCORE60 VCCGT23/VCCCORE86 VCCGT89
D
AU9 BD25 AF10 H8
AU24 VCCCORE28 VCCCORE61 BD27 AG8 VCCGT21/VCCCORE87 VCCGT90 H11
AU25 VCCCORE20 VCCCORE62 BE9 AG9 VCCGT24/VCCCORE88 VCCGT80 H12
AU26 VCCCORE21 VCCCORE69 BE24 AH9 VCCGT25/VCCCORE89 VCCGT81 H14
AU27 VCCCORE22 VCCCORE65 BE25 AJ8 VCCGT26/VCCCORE90 VCCGT82 H15
AV2 VCCCORE23 VCCCORE66 BE26 +VCC_CORE AJ10 VCCGT28/VCCCORE91 VCCGT83 H17
AV5 VCCCORE30 VCCCORE67 BE27 AK2 VCCGT27/VCCCORE92 VCCGT84 H18
AV7 VCCCORE32 VCCCORE68 BF2 AK9 VCCGT29//VCCCORE93 VCCGT85 H20
1
AV10 BF9 AL8 J7
AV27 VCCCORE29 VCCCORE73 BF24 RC167 AL9 VCCGT32/VCCCORE95 VCCGT95 J8
r
AW5 BF26 100_0402_1% AL10 J11
AW6 VCCCORE39 VCCCORE72 BG27 AM8 VCCGT31/VCCCORE97 VCCGT91 J14
AW7 VCCCORE40 VCCCORE74 V2 VCCGT34/VCCCORE98 VCCGT92 J17
2
AW8 VCCCORE41 AN6 Y10 VCCGT115/VCCCORE99 VCCGT93 J20
VCCCORE42 VCC_SENSE VCCSENSE [88] VCCGT119/VCCCORE100 VCCGT94
C AW9 AN5 Y8 K2 C
VCCCORE43 VSS_SENSE VSSSENSE [88] VCCGT120/VCCCORE101 VCCGT98
AW10 K11
VCCCORE34 VCCGT97
1
AA3 VIDALERT# Trace Length Match< 25 mils B3 L7
VIDALERT# RC168 B4 VCCGT39 VCCGT100 L8
BB9 AA1 B6 VCCGT40 VCCGT101 L10
RSVD3 VIDSCK VIDSCLK [88] 100_0402_1% VCCGT41 VCCGT99
o
BC24 B8 M9
AY9 RSVD4 AA2 VIDSOUT B11 VCCGT42 VCCGT102 N7
2
BB24 RSVD1 VIDSOUT B14 VCCGT35 VCCGT104 N8
RSVD2 Y3 B17 VCCGT36 VCCGT105 N9
RSVD5 B20 VCCGT37 VCCGT106 N10
BG3 C2 VCCGT38 VCCGT103 P2
+VCCSTG
f
VCCSTG1 C3 VCCGT49 VCCGT107 P8
W HL-U42_BGA1528 C6 VCCGT51 VCCGT108 R9
C7 VCCGT52 VCCGT109 T8
12 of 20
C12 VCCGT43 VCCGT110 U8 +VCC_GT
C14 VCCGT44 VCCGT114 U10
C15 VCCGT45 VCCGT113
VCCGT46
1
C17 V9
C18 VCCGT47 VCCGT116 W8 RC169
+VCCST C20 VCCGT48 VCCGT117 W9
VCCGT50 VCCGT118 100_0402_1%
D4
D7 VCCGT62
SVID ALERT
2
VCCGT63
y
CAD Note: Place the PU resistors close to CPU D11 E3
VCCGT55 VCCGT_SENSE VCC_GT_SENSE [88]
1
D12 D2
RC134 close to CPU 3000mils D14 VCCGT56 VSSGT_SENSE VSS_GT_SENSE [88]
VCCGT57
1
56_0402_5% Trace Length Match< 25 mils
RC170
l
B W HL-U42_BGA1528 B
100_0402_1%
2
13 of 20
2
VIDALERT# 1 2 (To VR) UC1O
RC135 220_0402_5% VIDALERT_N [88]
RESERVED SIGNALS
K12 AA24
K14 RSVD48 RSVD38 AA26
K15 RSVD49 RSVD39 AB25
n
K17 RSVD50 RSVD40 AC24
K18 RSVD51 RSVD41 AC25
RSVD52 RSVD42 RSV for +VCC_EDRAM_EOPIO
+VCCST K20 AC26
SVID DATA L25 RSVD53
RSVD54
RSVD43
RSVD44
AD24
M24 AD26
M26 RSVD55 RSVD45 V25
RSVD56 RSVD46
1
CAD Note: Place the PU resistors close to CPU RSV for +VCC_OPC P24 T25
RC136 P26 RSVD57 RSVD47
100_0402_1%
close to CPU 3000mils R24 RSVD58
R25 RSVD59
R26 RSVD60
2
RSVD61
O
VIDSOUT VIDSOUT [88] (To VR) W25
V24 RSVD62
Y25 RSVD63
Y24 RSVD64
RSVD65
A A
W HL-U42_BGA1528
15 of 20

CPU(10/12)POWER,SVID
1.0
5 4 3 2 1
5 4 3 2 1
UC1R UC1S UC1T

BT35 BY25
l
GND 1 OF 3 GND 2 OF 3 GND 3 OF 3
CR34 BL7 D6 VSS_145 VSS_217 J18 N6 CF23
BT5 VSS_1 VSS_73 AE25 AL32 VSS_146 VSS_218 AU32 B37 VSS_290 VSS_362 V4
BY5 VSS_2 VSS_74 BM33 BT36 VSS_147 VSS_219 BY28 CB3 VSS_291 VSS_363 BE30
CP35 VSS_3 VSS_75 CM5 D8 VSS_148 VSS_220 J21 P10 VSS_292 VSS_364 CF28
l
CM37 VSS_4 VSS_76 AE27 AL7 VSS_149 VSS_221 AV25 B5 VSS_293 VSS_365 W10
CK37 VSS_5 VSS_77 BM35 D9 VSS_150 VSS_222 BY33 CB33 VSS_294 VSS_366 BE31
AW1 VSS_6 VSS_78 CM9 AM10 VSS_151 VSS_223 J24 P3 VSS_295 VSS_367 CF3
CM1 VSS_7 VSS_79 AE30 BU11 VSS_152 VSS_224 AV28 B7 VSS_296 VSS_368 W27
D BD6 VSS_8 VSS_80 BM36 E23 VSS_153 VSS_225 BY35 CB4 VSS_297 VSS_369 CF4 D
AY4 VSS_9 VSS_81 CN13 AM28 VSS_154 VSS_226 J33 P33 VSS_298 VSS_370 W30
B34 VSS_10 VSS_82 AE7 E27 VSS_155 VSS_227 AV3 B9 VSS_299 VSS_371 BF3
VSS_11 VSS_83 VSS_156 VSS_228 VSS_300 VSS_372
e
E35 BM9 AM33 BY36 CB7 CG33
A4 VSS_12 VSS_84 CN17 BU23 VSS_157 VSS_229 J36 P36 VSS_301 VSS_373 W7
AE24 VSS_13 VSS_85 AF27 E29 VSS_158 VSS_230 AV33 BA10 VSS_302 VSS_374 BF33
AE26 VSS_14 VSS_86 BN30 AM35 VSS_159 VSS_231 J6 CC11 VSS_303 VSS_375 CG7
AF25 VSS_15 VSS_87 CN21 BU24 VSS_160 VSS_232 AV36 P4 VSS_304 VSS_376 BF36
AG24 VSS_16 VSS_88 AF3 E31 VSS_161 VSS_233 C1 BA28 VSS_305 VSS_377 Y26
AG26 VSS_17 VSS_89 BN7 BU25 VSS_162 VSS_234 K21 P7 VSS_306 VSS_378 BF4
AH24 VSS_18 VSS_90 CN25 E33 VSS_163 VSS_235 AV4 BA3 VSS_307 VSS_379 CH31
AH25 VSS_19 VSS_91 AF30 AN25 VSS_164 VSS_236 C21 CC20 VSS_308 VSS_380 Y27
B2 VSS_20 VSS_92 CN29 BU7 VSS_165 VSS_237 K22 R27 VSS_309 VSS_381 BG25
B36 VSS_21 VSS_93 AF33 E9 VSS_166 VSS_238 AV6 BB3 VSS_310 VSS_382 Y30
C36 VSS_22 VSS_94 BP15 AN28 VSS_167 VSS_239 C25 CC25 VSS_311 VSS_383 BG28
D
C37 VSS_23 VSS_95 AF36 BV11 VSS_168 VSS_240 K24 R28 VSS_312 VSS_384 CJ11
CN1 VSS_24 VSS_96 AF4 F12 VSS_169 VSS_241 AV8 BB33 VSS_313 VSS_385 Y33
CN2 VSS_25 VSS_97 CN5 AN29 VSS_170 VSS_242 C29 CC28 VSS_314 VSS_386 CJ14
CN37 VSS_26 VSS_98 AF7 F15 VSS_171 VSS_243 K25 R29 VSS_315 VSS_387 Y35
CP2 VSS_27 VSS_99 BP25 AN30 VSS_172 VSS_244 AW28 BB36 VSS_316 VSS_388 BH28
D1 VSS_28 VSS_100 CN9 F18 VSS_173 VSS_245 C33 CC31 VSS_317 VSS_389 CJ19
A32 VSS_29 VSS_101 AG10 AN31 VSS_174 VSS_246 K27 R30 VSS_318 VSS_390 Y7
F33 VSS_30 VSS_102 BP3 BV3 VSS_175 VSS_247 AW29 BB4 VSS_319 VSS_391 BH29
A3 VSS_31 VSS_103 CP1 F2 VSS_176 VSS_248 C4 CC7 VSS_320 VSS_392 CJ23
C VSS_32 VSS_104 VSS_177 VSS_249 VSS_321 VSS_393 C
r
BJ7 BP32 AN7 K28 R31 BH32
CJ36 VSS_33 VSS_105 CP11 BV31 VSS_178 VSS_250 AW3 BC25 VSS_322 VSS_394 CJ28
A36 VSS_34 VSS_106 AH27 F21 VSS_179 VSS_251 C9 CD11 VSS_323 VSS_395 BH33
BK10 VSS_35 VSS_107 BP33 AN8 VSS_180 VSS_252 K29 T27 VSS_324 VSS_396 CJ33
CJ4 VSS_36 VSS_108 CP13 BV33 VSS_181 VSS_253 AW30 CD12 VSS_325 VSS_397 BH35
AB27 VSS_37 VSS_109 AH28 F24 VSS_182 VSS_254 CA11 T30 VSS_326 VSS_398 CJ35
BK2 VSS_38 VSS_110 BP4 BV4 VSS_183 VSS_255 K3 BC29 VSS_327 VSS_399 BP19
CK1 VSS_39 VSS_111 CP15 F3 VSS_184 VSS_256 AW31 CD14 VSS_328 VSS_400 BR16
o
AB3 AH29 AP3 CA15 T33 BY18
BK28 VSS_41 VSS_113 BP7 BW11 VSS_186 VSS_258 K30 T35 VSS_330 VSS_402 BY19
AB30 VSS_42 VSS_114 CP19 F4 VSS_187 VSS_259 AY33 BC32 VSS_331 VSS_403 CC16
BK3 VSS_43 VSS_115 AH30 AP33 VSS_188 VSS_260 CA22 CD24 VSS_332 VSS_404 BU16
CK4 VSS_44 VSS_116 CP21 BW15 VSS_189 VSS_261 K31 T36 VSS_333 VSS_405 CC14
AB33 VSS_45 VSS_117 AH31 G21 VSS_190 VSS_262 AY35 CD25 VSS_334 VSS_406 BR22
f
BK33 VSS_46 VSS_118 BR19 AP36 VSS_191 VSS_263 K32 T7 VSS_335 VSS_407 BU20
CK7 VSS_47 VSS_119 CP27 G27 VSS_192 VSS_264 B12 BC8 VSS_336 VSS_408 CD20
AB36 VSS_48 VSS_120 AH33 AP4 VSS_193 VSS_265 K4 CE33 VSS_337 VSS_409 BT14
BK4 VSS_49 VSS_121 BR25 G33 VSS_194 VSS_266 B15 U26 VSS_338 VSS_410 BP12
CL2 VSS_50 VSS_122 AH35 AR28 VSS_195 VSS_267 CA25 BD28 VSS_339 VSS_411 CB24
AB4 VSS_51 VSS_123 CP37 G35 VSS_196 VSS_268 K9 CE35 VSS_340 VSS_412 CC24
BK7 VSS_52 VSS_124 AJ25 G36 VSS_197 VSS_269 B18 U7 VSS_341 VSS_413 J5
CM13 VSS_53 VSS_125 BT15 AT33 VSS_198 VSS_270 CB11 BD33 VSS_342 VSS_414 U24
AB7 VSS_54 VSS_126 AJ28 BW24 VSS_199 VSS_271 L27 CE36 VSS_343 VSS_415 BD7
BL25 VSS_55 VSS_127 BT16 G9 VSS_200 VSS_272 B21 V26 VSS_344 VSS_416 AR4
B B
CM17 VSS_56 VSS_128 CP9 AT35 VSS_201 VSS_273 L33 BD35 VSS_345 VSS_417 AU4
AC10 VSS_57 VSS_129 AJ7 H21 VSS_202 VSS_274 B23 CE7 VSS_346 VSS_418 AW4
y
BL28 VSS_58 VSS_130 CR2 AT36 VSS_203 VSS_275 L35 V27 VSS_347 VSS_419 BA6
CM21 VSS_59 VSS_131 AK3 BW7 VSS_204 VSS_276 B25 BD36 VSS_348 VSS_420 BC4
AC27 VSS_60 VSS_132 CR36 H27 VSS_205 VSS_277 CB18 CF11 VSS_349 VSS_421 BE4
BL29 VSS_61 VSS_133 AK33 AT4 VSS_206 VSS_278 L36 V3 VSS_350 VSS_422 BE8
l
CM25 D21 BY11 B27 BE10 BA4
AC30 VSS_63 VSS_135 AK36 AU10 VSS_208 VSS_280 CB19 CF14 VSS_352 VSS_424 BD4
BL30 VSS_64 VSS_136 BT25 BY15 VSS_209 VSS_281 L6 V30 VSS_353 VSS_425 BG4
CM29 VSS_65 VSS_137 D25 H9 VSS_210 VSS_282 B29 BE28 VSS_354 VSS_426 CJ2
BL31 VSS_66 VSS_138 AK4 AU28 VSS_211 VSS_283 CB2 CF19 VSS_355 VSS_427 CJ3
CM31 VSS_67 VSS_139 BT28 BY22 VSS_212 VSS_284 N25 V33 VSS_356 VSS_428 AM5
AD33 VSS_68 VSS_140 AL28 J12 VSS_213 VSS_285 B31 BE29 VSS_357 VSS_429 CM4
BL32 VSS_69 VSS_141 BT33 AU29 VSS_214 VSS_286 CB20 CF2 VSS_358 VSS_430 AC5
n
CM33 D5 J15 N27 V36 AG5
AD35 VSS_71 VSS_143 AL29 VSS_216 VSS_288 CB25 BE3 VSS_360 VSS_432 CR6
VSS_72 VSS_144 VSS_289 VSS_361 VSS_433
WHL-U42_BGA1528 WHL-U42_BGA1528 WHL-U42_BGA1528

18 of 20 19 of 20
17 of 20
A A
O
CPU(11/12)GND
1.0
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
Ref 575418
l
UC1Q
1 @ 2 CFG0 RESERVED SIGNALS
RC137 1K_0402_1% F37
CFG0 T4 RSVD_TP5 F34
l
CFG1 R4 CFG_0 RSVD_TP4
TPC11 T3 CFG_1 CP36 IST_TRIG
CFG2
CFG_2 IST_TRIG TP32
CFG3 R3 CN36
[80] CFG3 CFG4 J4 CFG_3 RSVD_TP3
D Reset sequence af t er PC U PLL i s l ocked TPC12
CFG5 M4 CFG_4 BJ36 D
CFG6 J3 CFG_5 RSVD15 BJ34
CFG7 M3 CFG_6 RSVD14
1 : (DEFAULT) Normal Operat i on; No St all CFG_7
e
CFG0 TPC13
CFG8 R2 BK34
0 : Stall CFG9 N2 CFG_8 TP_1 BR18
TPC14 CFG_9 TP_2
CFG10 R1
TPC15 N1 CFG_10
CFG11
1 2 TPC16 J2 CFG_11
@ CFG2 CFG12
TPC17 CFG_12
RC138 1K_0402_1% CFG13 L2 BT9
TPC18 J1 CFG_13 RSVD21 BT8
CFG14
TPC19 CFG_14 RSVD20
CFG15 L1
TPC20 CFG_15 BP8
CFG16 L3 RSVD18 BP9
TPC21 CFG_16 RSVD19
CFG18 N3
PCI Express Stat i c Lane Reversal For All PE G Ports TPC22
CFG17 L4 CFG_18 CR4
D
TPC23 CFG_17 RSVD29
CFG19 N4
TPC24 CFG_19 CP3
CFG2 1 : (DEFAULT) Normal Operat i on RSVD26 CR3
0 : Lane Reversal 2 1 CFG_RCOMP AB5 RSVD27
RC139 49.9_0402_1% CFG_RCOMP
W4
1 2 CFG4 [80] XDP_ITP_PMODE ITP_PMODE BP36
RC140 CG2 VSS_434
1K_0402_1% RSVD25
CG1
C RSVD24 C
r
AT3
RSVD12 AU3
RSVD13
Display Port Presence Strap H4
H3 RSVD34
0 : Enabled; RSVD33 AN1
An external Display Port device is connected to the Embedded Display Port BV24 RSVD8 AN2
RSVD22 RSVD9
o
CFG4 BV25
RSVD23 AN4
1 : Disabled; RSVD11 AN3
No Physical Display Port at t ac hed t o E mbedded Dis pl ay Port RSVD10
@ AL2
2 RC171 1 G3 RSVD72 AL1
f
1 @ 2 CFG6 0_0201_5% G4 RSVD66 RSVD73
RC141 1K_0402_1% RSVD67
1 @ 2 CFG5 AL4
RC142 1K_0402_1% RSVD74 AL3
BK36 RSVD75
BK35 RSVD17 BP34
RSVD16 TP_4 BP35
W3 TP_3
AM4 RSVD35
PCI Express Bifurcat i on RSVD7 C34 1 @ 2
B B
AM3 RSVD68 RC172 0_0201_5%
— 00 = 1 x8, 2 x4 PCI Expr ess * RSVD6 A34
y
— 01 = r es erved RSVD_TP1 B35
CFG[6:5] — 10 = 2 x8 PCI Expr ess * RSVD_TP2
— 11 = 1 x16 PCI Expr ess * CR35
RSVD28 TP34
A35
RSVD1
l
D34
RSVD30 AH26
1 @ 2 CFG7 G2 RSVD36 AJ27
RC143 1K_0402_1% G1 RSVD32 RSVD37
RSVD31 E1 SKTOCC# 1 @ 2
SKTOCC# RC173 0_0201_5%
WHL-U42_BGA1528
n
PEG Training 20 of 20
1 : (default) PEG Train immediately

CFG7 following RESET# de-assert i on.
0 : PEG Wait for BIOS for training.
A A
O
CPU(12/12)RSVD
1.0
5 4 3 2 1
5 4 3 2 1
l
Main Function:
l
D D
D e C
B
Reserve
f o r B
n l y A
O
RSVD
B 1.0
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
l
Main Function:
l
D D
D e C
B
Reserve
f o r B
n l y A
O
(RSVD)
B 1.0
5 4 3 2 1
5 4 3 2 1
Main Function:
e l l D
Reserve r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
(RSVD)
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
Main Function:
e l l D
Reserve
r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
(RSVD)
5 4 3 2 1
5 4 3 2 1
Main Function:
e l l D
Reserve
r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
(RSVD)
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
Main Func = DDR

[7] DDR_A_D[0..63]
[7] DDR_A_MA[0..13]
l
[7] DDR_A_DQS#[0..7]
[7] DDR_A_DQS[0..7] +1.2V_DDR JDIMM1 CONN@
Layout Note: Layout Note: +1.2V_DDR
1 2
Place near JDIMM1.257,259 Place near JDIMM1.258 DDR_A_D10 3 VSS1 VSS2 4 DDR_A_D8
5 DQ5 DQ4 6
VSS3 VSS4
l
DDR_A_D13 7 8 DDR_A_D12
9 DQ1 DQ0 10
DDR_A_DQS#1 11 VSS5 VSS6 12
DDR_A_DQS1 13 DQS0_c DM0_n/DBI0_n 14
+0.6V_DDR_VTT 15 DQS0_t VSS7 16 DDR_A_D9
+2.5V_MEM DDR_A_D15 17 VSS8 DQ6 18
19 DQ7 VSS9 20 DDR_A_D11
DDR_A_D14 21 VSS10 DQ2 22
D
Layout Note: DQ3 VSS11 DDR_A_D6 D
23 24
Place near JDIMM1.255 DDR_A_D3 VSS12 DQ12
1U_0201_6.3V6M
1U_0201_6.3V6M
10U_0402_6.3V6M
25 26
DQ13 VSS13 DDR_A_D2
1U_0201_6.3V6M
10U_0402_6.3V6M
1 1 1 27 28
e
DDR_A_D7 29 VSS14 DQ8 30
1 1 DQ9 VSS15 DDR_A_DQS#0
CD3
CD4
CD5
31 32
VSS16 DQS1_c DDR_A_DQS0
CD1
CD2
33 34
2 2 2 35 DM1_n/DBI_n DQS1_t 36
2 2 DDR_A_D5 37 VSS17 VSS18 38 DDR_A_D0
+3VS 39 DQ15 DQ14 40
DDR_A_D1 41 VSS19 VSS20 42 DDR_A_D4
43 DQ10 DQ11 44
47 DQ21 DQ20 48
DDR_A_D21 VSS23 VSS24 DDR_A_D20
0.1U_0402_16V7K~D
2.2U_0402_6.3V6M
49 50
51 DQ17 DQ16 52
1 1 DDR_A_DQS#2 VSS25 VSS26
CD6
CD7
53 54
57 DQS2_t VSS27 58 DDR_A_D18
2 2 DDR_A_D22 59 VSS28 DQ22 60
61 DQ23 VSS29 62 DDR_A_D23
DDR_A_D19 VSS30 DQ18
D
Layout Note: 63 64
65 DQ19 VSS31 66 DDR_A_D29
Place near JDIMM1 DDR_A_D24 67 VSS32 DQ28 68
69 DQ29 VSS33 70 DDR_A_D25
DDR_A_D28 71 VSS34 DQ24 72
73 DQ25 VSS35 74 DDR_A_DQS#3
75 VSS36 DQS3_c 76 DDR_A_DQS3
+1.2V_DDR 77 DM3_n/DBI3_n DQS3_t 78
81 DQ30 DQ31 82
DQ26 DQ27
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
85 86
87 VSS41 VSS42 88
1 1 1 1 1 1 1 1 CB5/NC CB4/NC
89 90
VSS43 VSS44
r
CD8
CD9
CD10
CD11
CD12
CD13
CD14
CD15
91 92
93 CB1/NC CB0/NC 94
2 2 2 2 2 2 2 2 95 VSS45 VSS46 96
97 DQS8_c DM8_n/DBI_n/NC 98
99 DQS8_t VSS47 100
101 VSS48 CB6/NC 102
C 103 CB2/NC VSS49 104 C
105 VSS50 CB7/NC 106
107 CB3/NC VSS51 108 DDR_DRAMRST#_R
DDR_A_CKE0 VSS52 RESET_n DDR_A_CKE1 DDR_DRAMRST#_R [24]
109 110
[7] DDR_A_CKE0 CKE0 CKE1 DDR_A_CKE1 [7]
111 112
+1.2V_DDR DDR_A_BG1 113 VDD1 VDD2 114
[7] DDR_A_BG1 DDR_A_BG0 BG1 ACT_n DDR_A_ALERT# DDR_A_ACT# [7]
o
115 116
[7] DDR_A_BG0 BG0 ALERT_n DDR_A_ALERT# [7]
117 118
DDR_A_MA12 119 VDD3 VDD4 120 DDR_A_MA11
DDR_A_MA9 121 A12 A11 122 DDR_A_MA7
123 A9 A7 124
DDR_A_MA8 VDD5 VDD6 DDR_A_MA5
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1 125 126
@ DDR_A_MA6 127 A8 A5 128 DDR_A_MA4
1 1 1 1 1 1 1 1 A6 A4
+ CD24 129 130
DDR_A_MA3 VDD7 VDD8 DDR_A_MA2
CD16
CD17
CD18
CD19
CD20
CD21
CD22
CD23
f
330U_D2_2V_Y 131 132
DDR_A_MA1 133 A3 A2 134 2 RD1 1
+1.2V_DDR All VREF traces should
2 2 2 2 2 2 2 2 2 135 A1 EVENT_n/NF 136 240_0402_1%
DDR_A_CLK0 VDD9 VDD10 DDR_A_CLK1
have 10 mil trace width
137 138
[7] DDR_A_CLK0 DDR_A_CLK#0 CK0_t CK1_t/NF DDR_A_CLK#1 DDR_A_CLK1 [7]
139 140
[7] DDR_A_CLK#0 CK0_c CK1_c/NF DDR_A_CLK#1 [7]
141 142
DDR_A_PAR 143 VDD11 VDD12 144 DDR_A_MA0
[7] DDR_A_PAR DDR_A_BA1 PARITY A0 DDR_A_MA10
145 146
[7] DDR_A_BA1 BA1 A10/AP
147 148
DDR_A_CS#0 149 VDD13 VDD14 150 DDR_A_BA0
[7] DDR_A_CS#0 DDR_A_WE# CS0_n BA0 DDR_A_RAS# DDR_A_BA0 [7]
151 152
[7] DDR_A_WE# WE_n/A14 RAS_n/A16 DDR_A_RAS# [7]
153 154
DDR_A_ODT0 155 VDD15 VDD16 156 DDR_A_CAS#
[7] DDR_A_ODT0 DDR_A_CS#1 ODT0 CAS_n/A15 DDR_A_MA13 DDR_A_CAS# [7]
[7]
157 158
DDR_A_CS#1 CS1_n A13
159 160
DDR_A_ODT1 161 VDD17 VDD18 162 TP46
[7] DDR_A_ODT1 ODT1 C0/CS2_n/NC +V_DDR_REFA
163 164
165 VDD19 VREFCA 166 DIMM_CHA_SA2
C1, CS3_n,NC SA2
y
TP47 167 168
DDR_A_D36 VSS53 VSS54 DDR_A_D33
0.1U_0402_16V7K~D
169 170
171 DQ37 DQ36 172
DDR_A_D37 VSS55 VSS56 DDR_A_D32 1
CD25
173 174
175 DQ33 DQ32 176
DDR_A_DQS#4 177 VSS57 VSS58 178
DDR_A_DQS4 179 DQS4_c DM4_n/DBI4_n 180 +1.2V_DDR 2
l
B +3VS +3VS +3VS +1.2V_DDR DDR_A_D38 183 VSS60 DQ39 184 B
185 DQ38 VSS61 186 DDR_A_D35
DDR_A_D39 187 VSS62 DQ35 188
189 DQ34 VSS63 190 DDR_A_D43
VSS64 DQ45
1
DDR_A_D45 191 192

DQ44 VSS65
1
RD8 193 194 DDR_A_D40

RD2 RD4 RD6 470_0402_1% DDR_A_D41 195 VSS66 DQ41 196
@ @ @ 197 DQ40 VSS67 198 DDR_A_DQS#5
0_0201_5% 0_0201_5% 0_0201_5% VSS68 DQS5_c DDR_A_DQS5
199 200
+1.2V_DDR
2
201 DM5_n/DBI5_n DQS5_t 202

2
n
DIMM_CHA_SA0 DIMM_CHA_SA1 DIMM_CHA_SA2 DDR_DRAMRST#_R 1 @ 2 205 DQ46 DQ47 206
DDR_DRAMRST# [7] DDR_A_D42 VSS71 VSS72 DDR_A_D46
RD9 0_0201_5% 207 208
209 DQ42 DQ43 210
VSS73 VSS74
1
DDR_A_D48 211 212 DDR_A_D53

1 DQ52 DQ53
RD3 RD5 RD7 ESD@ 213 214
@ @ @ CD26 DDR_A_D52 215 VSS75 VSS76 216 DDR_A_D49
0_0201_5% 0_0201_5% 0_0201_5% DQ49 DQ48
S CER CAP 10P 50V J NPO 0201 217 218
2 DDR_A_DQS#6 219 VSS77 VSS78 220
+1.2V_DDR
2

DDR_A_D55 225 VSS80 DQ54 226
227 DQ55 VSS81 228 DDR_A_D51
DDR_A_D50 229 VSS82 DQ50 230
231 DQ51 VSS83 232 DDR_A_D56
DDR_A_D57 233 VSS84 DQ60 234
235 DQ61 VSS85 236 DDR_A_D61
DDR_A_D60 237 VSS86 DQ57 238
+V_DDR_REFA_R +1.2V_DDR 239 DQ56 VSS87 240 DDR_A_DQS#7
O
241 VSS88 DQS7_c 242 DDR_A_DQS7
VSS89 VSS90
1
DDR_A_D62 245 246 DDR_A_D59

RD10 247 DQ62 DQ63 248
1K_0402_1%~D DDR_A_D63 249 VSS91 VSS92 250 DDR_A_D58
20mil 251 DQ58 DQ59 252
PCH_SMBCLK 253 VSS93 VSS94 254 PCH_SMBDATA
[8,24,40,67] PCH_SMBCLK PCH_SMBDATA [8,24,40,67]
2
255 SCL SDA 256 DIMM_CHA_SA0

+V_DDR_REFA +3VS VDDSPD SA0
RD11 1 2 2_0402_1% +2.5V_MEM
257 258
+0.6V_DDR_VTT
259 VPP1 VTT 260 DIMM_CHA_SA1
261 VPP2 SA1 262
1 GND1 GND2
1
A A
CD27 RD12
0.022U_0402_25V7K 1K_0402_1%~D
2
1
RD13
24.9_0402_1% LOTES_ADDR0206-P001A02~D
DEREN_40-42271-26001RHF
SP07001CY0L
2

DDR4 DIMMA_RVS
5 4 3 2 1
5 4 3 2 1
Main Func = DDR

+1.2V_DDR
l
[7] DDR_B_D[0..63] JDIMM2 CONN@
+1.2V_DDR
[7] DDR_B_MA[0..13]
[7] DDR_B_DQS#[0..7]
1 2
DDR_B_D12 3 VSS1 VSS2 4 DDR_B_D13
Layout Note: Layout Note: [7] DDR_B_DQS[0..7] DQ5 DQ4
5 6
Place near JDIMM2.257,259 Place near JDIMM2.258 DDR_B_D9 7 VSS3 VSS4 8 DDR_B_D8
9 DQ1 DQ0 10
VSS5 VSS6
l
DDR_B_DQS#1 11 12
DDR_B_DQS1 13 DQS0_c DM0_n/DBI0_n 14
15 DQS0_t VSS7 16 DDR_B_D14
DDR_B_D15 17 VSS8 DQ6 18
+0.6V_DDR_VTT 19 DQ7 VSS9 20 DDR_B_D11
+2.5V_MEM DDR_B_D10 21 VSS10 DQ2 22
23 DQ3 VSS11 24 DDR_B_D3
DDR_B_D7 25 VSS12 DQ12 26
D
Layout Note: DQ13 VSS13 DDR_B_D0 D
27 28
Place near JDIMM2.255 DDR_B_D2 VSS14 DQ8
1U_0201_6.3V6M
1U_0201_6.3V6M
10U_0402_6.3V6M
29 30
DQ9 VSS15 DDR_B_DQS#0
1U_0201_6.3V6M
10U_0402_6.3V6M
1 1 1 31 32
e
33 VSS16 DQS1_c 34 DDR_B_DQS0
1 1 DM1_n/DBI_n DQS1_t
CD30
CD31
CD32
35 36
DDR_B_D1 VSS17 VSS18 DDR_B_D5
CD28
CD29
37 38
2 2 2 39 DQ15 DQ14 40
2 2 DDR_B_D6 41 VSS19 VSS20 42 DDR_B_D4
+3VS 43 DQ10 DQ11 44
47 DQ21 DQ20 48
51 DQ17 DQ16 52
DDR_B_DQS#2 VSS25 VSS26
0.1U_0402_16V7K~D
2.2U_0402_6.3V6M
53 54
DDR_B_DQS2 55 DQS2_c DM2_n/DBI2_n 56
1 1 DQS2_t VSS27 DDR_B_D19
CD33
CD34
57 58
DDR_B_D23 59 VSS28 DQ22 60
61 DQ23 VSS29 62 DDR_B_D18
2 2 DDR_B_D22 63 VSS30 DQ18 64
65 DQ19 VSS31 66 DDR_B_D25
DDR_B_D29 VSS32 DQ28
D
Layout Note: 67 68
69 DQ29 VSS33 70 DDR_B_D28
Place near JDIMM2 DDR_B_D24 71 VSS34 DQ24 72
73 DQ25 VSS35 74 DDR_B_DQS#3
77 DM3_n/DBI3_n DQS3_t 78
+1.2V_DDR 81 DQ30 DQ31 82
85 DQ26 DQ27 86
87 VSS41 VSS42 88
CB5/NC CB4/NC
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
89 90
91 VSS43 VSS44 92
1 1 1 1 1 1 1 1 CB1/NC CB0/NC
93 94
VSS45 VSS46
r
CD35
CD36
CD37
CD38
CD39
CD40
CD41
CD42
95 96
97 DQS8_c DM8_n/DBI_n/NC 98
2 2 2 2 2 2 2 2 99 DQS8_t VSS47 100
101 VSS48 CB6/NC 102
103 CB2/NC VSS49 104
105 VSS50 CB7/NC 106
C 107 CB3/NC VSS51 108 DDR_DRAMRST#_R C
DDR_B_CKE0 VSS52 RESET_n DDR_B_CKE1 DDR_DRAMRST#_R [23]
109 110
[7] DDR_B_CKE0 CKE0 CKE1 DDR_B_CKE1 [7]
111 112
DDR_B_BG1 113 VDD1 VDD2 114
[7] DDR_B_BG1 DDR_B_BG0 BG1 ACT_n DDR_B_ALERT# DDR_B_ACT# [7]
115 116
+1.2V_DDR [7] DDR_B_BG0 BG0 ALERT_n DDR_B_ALERT# [7]
117 118
DDR_B_MA12 VDD3 VDD4 DDR_B_MA11
o
119 120
DDR_B_MA9 121 A12 A11 122 DDR_B_MA7
123 A9 A7 124
DDR_B_MA8 125 VDD5 VDD6 126 DDR_B_MA5
DDR_B_MA6 127 A8 A5 128 DDR_B_MA4
A6 A4
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
129 130
DDR_B_MA3 131 VDD7 VDD8 132 DDR_B_MA2
1 1 1 1 1 1 1 1 DDR_B_MA1 A3 A2
133 134 2 RD14 1
A1 EVENT_n/NF +1.2V_DDR
CD43
CD44
CD45
CD46
CD47
CD48
CD49
CD50
f
135 136 240_0402_1%
DDR_B_CLK0 137 VDD9 VDD10 138 DDR_B_CLK1
[7] DDR_B_CLK0 DDR_B_CLK1 [7] All VREF traces should
2 2 2 2 2 2 2 2 DDR_B_CLK#0 139 CK0_t CK1_t/NF 140 DDR_B_CLK#1
[7] DDR_B_CLK#0 CK0_c CK1_c/NF DDR_B_CLK#1 [7] have 10 mil trace width
141 142
DDR_B_PAR 143 VDD11 VDD12 144 DDR_B_MA0
[7] DDR_B_PAR DDR_B_BA1 PARITY A0 DDR_B_MA10
145 146
[7] DDR_B_BA1 BA1 A10/AP
147 148
DDR_B_CS#0 149 VDD13 VDD14 150 DDR_B_BA0
[7] DDR_B_CS#0 DDR_B_WE# CS0_n BA0 DDR_B_RAS# DDR_B_BA0 [7]
151 152
[7] DDR_B_WE# WE_n/A14 RAS_n/A16 DDR_B_RAS# [7]
153 154
DDR_B_ODT0 155 VDD15 VDD16 156 DDR_B_CAS#
[7] DDR_B_ODT0 DDR_B_CS#1 ODT0 CAS_n/A15 DDR_B_MA13 DDR_B_CAS# [7]
[7]
157 158
DDR_B_CS#1 CS1_n A13
159 160
DDR_B_ODT1 161 VDD17 VDD18 162 TP48
[7] DDR_B_ODT1 ODT1 C0/CS2_n/NC +V_DDR_REFB
163 164
165 VDD19 VREFCA 166 DIMM_CHB_SA2
TP49 167 C1, CS3_n,NC SA2 168
DQ37 DQ36
y
171 172
DDR_B_D33 VSS55 VSS56 DDR_B_D39
0.1U_0402_16V7K~D
173 174
175 DQ33 DQ32 176
DDR_B_DQS#4 VSS57 VSS58 1
CD51
177 178
DDR_B_DQS4 179 DQS4_c DM4_n/DBI4_n 180 +1.2V_DDR
181 DQS4_t VSS59 182 DDR_B_D37
DDR_B_D34 183 VSS60 DQ39 184 2
l
185 DQ38 VSS61 186 DDR_B_D36
B DDR_B_D35 187 VSS62 DQ35 188 B
189 DQ34 VSS63 190 DDR_B_D41
DDR_B_D40 191 VSS64 DQ45 192
+3VS +3VS +3VS 193 DQ44 VSS65 194 DDR_B_D45
DDR_B_D44 195 VSS66 DQ41 196
VSS69 VSS70
1
DDR_B_D47 203 204 DDR_B_D42

RD15 RD17 RD19 205 DQ46 DQ47 206
@ @ @ DDR_B_D46 207 VSS71 VSS72 208 DDR_B_D43
0_0201_5% 0_0201_5% 0_0201_5%
n
209 DQ42 DQ43 210
2
213 DQ52 DQ53 214

DIMM_CHB_SA0 DIMM_CHB_SA1 DIMM_CHB_SA2 DDR_B_D52 215 VSS75 VSS76 216 DDR_B_D53
217 DQ49 DQ48 218
DDR_B_DQS#6 219 VSS77 VSS78 220
DQS6_c DM6_n/DBI6_n +1.2V_DDR
1
DDR_B_DQS6 221 222

RD16 RD18 RD20 223 DQS6_t VSS79 224 DDR_B_D55
@ @ @ DDR_B_D50 225 VSS80 DQ54 226
0_0201_5% 0_0201_5% 0_0201_5% DQ55 VSS81 DDR_B_D54
227 228
DDR_B_D51 229 VSS82 DQ50 230
2
231 DQ51 VSS83 232 DDR_B_D57

DDR_B_D56 233 VSS84 DQ60 234
235 DQ61 VSS85 236 DDR_B_D60
DDR_B_D61 237 VSS86 DQ57 238
O
247 DQ62 DQ63 248
+V_DDR_REFB_R +1.2V_DDR 251 DQ58 DQ59 252
PCH_SMBCLK 253 VSS93 VSS94 254 PCH_SMBDATA
[8,23,40,67] PCH_SMBCLK SCL SDA DIMM_CHB_SA0 PCH_SMBDATA [8,23,40,67]
255 256
+3VS VDDSPD SA0
1
257 258
+2.5V_MEM VPP1 VTT DIMM_CHB_SA1 +0.6V_DDR_VTT
RD21 259 260
1K_0402_1%~D 261 VPP2 SA1 262
GND1 GND2
20mil
2
A A
RD22 1 2 2_0402_1% +V_DDR_REFB
1
1 LOTES_ADDR0205-P001A02~D
RD23 DEREN_40-42261-26001RHF
CD52 1K_0402_1%~D SP07001HW0L
0.022U_0402_25V7K
2
2
1
RD24
24.9_0402_1% Compal Secret Data
2019/06/20 2020/06/30 Title
2
WWW.AliSaler.Com 5 4 3
2
Size
Date:
Document Number
DDR4 DIMMB_STD
LA-G716P
1
Sheet 24 of 101
Rev
1.0
5 4 3 2 1
Main Function:
e l l D
Reserve r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
(RSVD)
5 4 3 2 1
5 4 3 2 1
Main Function:
e l l D
Reserve r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
(RSVD)
5 4 3 2 1
WWW.AliSaler.Com
1 2 3 4 5
Main Func = GPU PEG_CRX_GTX_N[5..8]

[12] PEG_CRX_GTX_N[5..8]
l
PEG_CRX_GTX_P[5..8]
[12] PEG_CRX_GTX_P[5..8] No Use GPU Display Port outpud
PEG_CTX_GRX_N[5..8]
[12] PEG_CTX_GRX_N[5..8] @
PEG_CTX_GRX_P[5..8] UV1F
[12] PEG_CTX_GRX_P[5..8] +VGA_CORE_TOPAZ
l
@ AB11
UV1A VARY_BL AB12
DIGON
A A
AL15
e
TXCAP_DPA3P AK14
PEG_CTX_GRX_P5 DIS@ 2 1 CV9 0.22U_0201_6.3V6M PEG_CTX_C_GRX_P5 AF30 AH30 PEG_CRX_C_GTX_P5 DIS@ 2 1 CV1 0.22U_0201_6.3V6M PEG_CRX_GTX_P5 TXCAM_DPA3N
PEG_CTX_GRX_N5 DIS@ 2 1 CV10 0.22U_0201_6.3V6M PEG_CTX_C_GRX_N5 AE31 PCIE_RX0P PCIE_TX0P AG31 PEG_CRX_C_GTX_N5 DIS@ 2 1 CV2 0.22U_0201_6.3V6M PEG_CRX_GTX_N5 AH16
PCIE_RX0N PCIE_TX0N TX0P_DPA2P AJ15
TX0M_DPA2N
PEG_CTX_GRX_P6 DIS@ 2 1 CV11 0.22U_0201_6.3V6M PEG_CTX_C_GRX_P6 AE29 AG29 PEG_CRX_C_GTX_P6 DIS@ 2 1 CV3 0.22U_0201_6.3V6M PEG_CRX_GTX_P6 AL17
PEG_CTX_GRX_N6 DIS@ 2 1 CV12 0.22U_0201_6.3V6M PEG_CTX_C_GRX_N6AD28 PCIE_RX1P PCIE_TX1P AF28 PEG_CRX_C_GTX_N6 DIS@ 2 1 CV4 0.22U_0201_6.3V6M PEG_CRX_GTX_N6 TX1P_DPA1P AK16
PCIE_RX1N PCIE_TX1N TX1M_DPA1N
AH18
PEG_CTX_GRX_P7 DIS@ 2 1 CV13 0.22U_0201_6.3V6M PEG_CTX_C_GRX_P7 AD30 AF27 PEG_CRX_C_GTX_P7 DIS@ 2 1 CV5 0.22U_0201_6.3V6M PEG_CRX_GTX_P7 TX2P_DPA0P AJ17
PEG_CTX_GRX_N7 DIS@ 2 1 CV14 0.22U_0201_6.3V6M PEG_CTX_C_GRX_N7AC31 PCIE_RX2P PCIE_TX2P AF26 PEG_CRX_C_GTX_N7 DIS@ 2 1 CV6 0.22U_0201_6.3V6M PEG_CRX_GTX_N7 TX2M_DPA0N
PCIE_RX2N PCIE_TX2N AL19
NC_TXOUT_L3P AK18
PEG_CTX_GRX_P8 DIS@ 2 1 CV15 0.22U_0201_6.3V6M PEG_CTX_C_GRX_P8 AC29 AD27 PEG_CRX_C_GTX_P8 DIS@ 2 1 CV7 0.22U_0201_6.3V6M PEG_CRX_GTX_P8 NC_TXOUT_L3N
PEG_CTX_GRX_N8 DIS@ 2 1 CV16 0.22U_0201_6.3V6M PEG_CTX_C_GRX_N8 AB28 PCIE_RX3P PCIE_TX3P AD26 PEG_CRX_C_GTX_N8 DIS@ 2 1 CV8 0.22U_0201_6.3V6M PEG_CRX_GTX_N8
PCIE_RX3N PCIE_TX3N
D
TMDP
AB30 AC25 AH20

AA31 PCIE_RX4P PCIE_TX4P AB25 TXCBP_DPB3P AJ19
PCIE_RX4N PCIE_TX4N TXCBM_DPB3N
AL21
AA29 Y23 TX3P_DPB2P AK20
Y28 PCIE_RX5P PCIE_TX5P Y24 TX3M_DPB2N
PCIE_RX5N PCIE_TX5N AH22
TX4P_DPB1P AJ21
Y30 AB27 TX4M_DPB1N
GPU R1/R3 W31 PCIE_RX6P

PCIE_RX6N
PCIE_TX6P
PCIE_TX6N
AB26
TX5P_DPB0P
AL23
AK22
r
TX5M_DPB0N
UV1 W29 Y27 AK24
V28 PCIE_RX7P PCIE_TX7P Y26 NC_TXOUT_U3P AJ23
PCIE_RX7N PCIE_TX7N NC_TXOUT_U3N
B SA0000B1W0L B
M2_50@ V30 W24
U31 NC#V30 NC#W24 W23
NC#U31 NC#W23
S IC 216-0889004 A0 R17M-M2-50 FCBGA 0FD 216-0842024-A11-MAR_FCBGA631
?
U29 V27
NC#U29 NC#V27
o
UV1 T28 U26
NC#T28 NC#U26
PCI EXPRESS INTERFACE

SA0000B1W1L
T30 U24
M2_50_R3@ R31 NC#T30 NC#U24 U23
NC#R31 NC#U23
S IC 216-0889004 A0 R17M-M2-50 WESTON XT BGA 631P GPU A31 !
f
R29 T26
P28 NC#R29 NC#T26 T27
UV1 NC#P28 NC#T27
R610 R1
SA000087T5L P30 T24
N31 NC#P30 NC#T24 T23
M1_30_R1@ NC#N31 NC#T23
S IC 216-0890010 A0 R17M-M1-30 631P R610 N29 P27

M28 NC#N29 NC#P27 P26
UV1 NC#M28 NC#P26
R610 R3
SA000087T6L M30 P24
L31 NC#M30 NC#P24 P23
M1_30_R3@ NC#L31 NC#P23
y
S IC 216-0890010 A0 R17M-M1-30 R610 A31! L29 M27
K30 NC#L29 NC#M27 N26
NC#K30 NC#N26
C CLOCK C
l
CLK_PEG_P0 AK30
[10] CLK_PEG_P0 CLK_PEG_N0 PCIE_REFCLKP
AK32
[10] CLK_PEG_N0 PCIE_REFCLKN +0.95VSDGPU
CALIBRATION
Y22 RV1 1 DIS@ 2 1.69K_0402_1%
PCIE_CALR_TX
RV2 1 DIS@ 2 1K_0402_1% N10 AA22 RV3 1 DIS@ 2 1K_0402_1%
TEST_PG PCIE_CALR_RX
PLT_RST_VGA# AL27
n
PERSTB
2160856030-A0_FCBGA631
+3VGS
@
+3VGS CV32 1 2 0.1U_0402_10V6K
UV3 @
MC74VHC1G08EDFT2G_SC70
5
UV2 change CPN & UV2
Description only DIS@ PLT_RST_VGA# 1
O
IN1
5
PLT_RST# Jason 2019-04-26 4 1 @ 2

O VGA_POK [92]
1 2 RV166 8.2K_0402_5%
P
[10,51,52,58,66,68] PLTRST# IN1 [9,92,94] DGPU_PWROK IN2G

4
O PLT_RST_VGA# [58]
2 UV3 change CPN &
[11] DGPU_HOLD_RST#
3
IN2
G
1
Description only
1
DGPU_HOLD_RST#(GPP_D10) Jason 2019-04-26 RV165

3
RV4 10K_0402_1%
MC74VHC1G08EDFT2G_SC70 100K_0402_5% @
D D
DIS@
2
2

Title
Issued Date 2019/06/20 Deciphered Date 2020/06/30 MESO_(1/5)_PCIE/DP
Date:
LA-G716P
Thursday, June 20, 2019 Sheet 27 of 101
1 2 3 4 5
1 2 3 4 5
Main Func = GPU

+3VGS
Resistor Divider Lookup Lable
l
@
UV1B +1.8VGS
U? 0402 1% resistors are equired PS_0[3:1]=001 Strap Name :
R_pu (ohm) R_pd (ohm) Bitd [3:1] PS_0[5:4]=11
1
RV5 RV6 AF2 DIS@
PS_0[1] ROM_CONFIG[0]
NC#AF2
5
4.7K_0402_5% 4.7K_0402_5% AF4 NC 4.75k 000 RV8 PS_0[2] ROM_CONFIG[1]
G
QV1B DIS@ DIS@ NC#AF4 8.45K_0402_1%
l
DIS@ TP56 N9 AG3 8.45k 2k 001 PS_0[3] ROM_CONFIG[2]
2
TP57 L9 DBG_DATA16 NC#AG3 AG5 PS_0
3 4 VGA_SMB_DA3 TP58 AE9 DBG_DATA15 NC#AG5
DPA 4.53k 2k 010 PS_0[4] N/A
S
[8,58,66] SML1_SMBDATA DBG_DATA14
1
TP59 Y11 AH3
D
1
0.68U_0402_10V
TP60 AE8 DBG_DATA13 NC#AH3 AH1 DIS@
DBG_DATA12 NC#AH1 6.98k 4.99k 011 PS_0[5] AUD_PORT_CONN_PINSTRAP[0]
2
L2N7002DW1T1G_SC88-6 TP61 AD9 CV28 RV9
G
QV1A TP62 AC10 DBG_DATA11 AK3 @ 2K_0402_1%
DIS@ TP63 AD7 DBG_DATA10 NC#AK3 AK1
4.53k 4.99k 100 2
2
TP64 AC8 DBG_DATA9 NC#AK1
A
6 1 VGA_SMB_CK3 TP65 AC7 DBG_DATA8 DVO
AK5
3.24k 5.62k 101 A
S
[8,58,66] SML1_SMBCLK DBG_DATA7 NC#AK5
TP66 AB9 AM3
D
TP67 AB8 DBG_DATA6 NC#AM3 3.4k 10k 110
e
L2N7002DW1T1G_SC88-6 TP68 AB7 DBG_DATA5 AK6
TP69 AB4 DBG_DATA4 NC#AK6 AM5
4.75k NC 111
TP70 AB2 DBG_DATA3 NC#AM5
DPB
TP71 Y8 DBG_DATA2 AJ7
TP72 Y7 DBG_DATA1 NC#AJ7 AH6 +1.8VGS Strap Name :
DBG_DATA0 NC#AH6 PS_1[3:1]=001
AK8
Capacitor Divider Lookup Lable
NC#AK8 PS_1[5:4]=11 PS_1[1] STRAP_BIF_GEN3_EN_A
1
AL7
NC#AL7 DIS@
Cap (nF) Bitd [5:4] RV11
PS_1[2] TRAP_BIF_CLK_PM_EN
W6 8.45K_0402_1% PS_1[3] N/A
V6 NC#W6
680nF 00
2
NC#V6 V4 PS_1
AC6 NC#V4 U5
PS_1[4] STRAP_TX_CFG_DRV_FULL_SWING
NC#AC5 NC#U5 82nF 01
1
AC5 PS_1[5] STRAP_TX_DEEMPH_EN
0.68U_0402_10V
NC#AC6 1
W3 DIS@
AA5 NC#W3 V2
10nF 10 CV29 RV12
AA6 NC#AA5 NC#V2 @ 2K_0402_1%
NC#AA6 DPC
Y4
NC 11 2
2
+1.8VGS NC#Y4 W5
D
NC#W5
RV82 2 TOPAZ@1 4.7K_0402_5% BP_0 U1 AA3 PLL_Analog_out
TP73 FB_VDDCI W1 NC#U1 NC#AA3 Y2
NC#W1 NC#Y2
1
RV81 2 TOPAZ@1 4.7K_0402_5% BP_1 U3
Y6 NC#U3 J8 RV83
TP74 PLL_Analog_in AA1 NC#Y6 NC#J8 16.2K_0402_1% +1.8VGS
NC#AA1 TOPAZ@
PS_2[3:1]=000 Strap Name :
PS_2[5:4]=11
1
+VGA_CORE +VGA_CORE_TOPAZ
@
PS_2[1] N/A
I2C RV13 PS_2[2] N/A
TOPAZ@ 8.45K_0402_1%
RV24 1 2 0_0603_5% TP75 R1 PS_2[3] STRAP_BIOS_ROM_EN
2
TP76 R3 SCL PS_2
SDA
PS_2[4] STRAP_BIF_VGA_DIS
1
AM26
r
0.082U_0402_16V
R 1
+VGA_CORE_TOPAZ AK26 DIS@
TP77 U6
GENERAL PURPOSE I/O AVSSN#AK26 +3VGS CV30 RV14
PS_2[5] N/A
U10 GPIO_0 AL25 @ 4.75K_0402_1%
T10 GPIO_1 G AJ25 2
2
GPIO_2 AVSSN#AJ25
1
RV80 2 DIS@ 1 4.7K_0402_5% VGA_SMB_DA3 U8
B +3VGS VGA_SMB_CK3 SMBDATA B
U7 AH24 RV162
T9 SMBCLK B AG25 4.7K_0402_5%
[58] GPU_PWR_LEVEL GPIO_5_AC_BATT AVSSN#AG25
T8 @
T7 GPIO_6 DAC1 AH26
2
P10 GPIO_7_BLON HSYNC AJ27 WAKEB
P4 GPIO_8_ROMSO VSYNC
GPIO_9_ROMSI
1
P2 +1.8VGS
Reduce 3.3V TO 1.8V level shif t f or EX O. N6 GPIO_10_ROMSCK AD22 RV163
PS_3[3:1]=000 Strap Name :
GPIO_11 RSET
o
+VGA_CORE_TOPAZ N5 4.7K_0402_5%
GPIO_12 PS_3[5:4]=11
1
N3 AG24 DIS@ PS_3[1] BOARD_CONFIG[0] (Memory ID)
Y9 GPIO_13 AVDD AE22 @
VRAM Type
2
SVI2_SVD 1 2 GPU_VID3 N1 GPIO_14_HPD2 AVSSQ RV15 PS_3[2] BOARD_CONFIG[1] (Memory ID)
JTAG RV44 EXO@ 0_0402_5% M4
R6
GPIO_15_PWRCNTL_0
GPIO_16 VDD1DI
AE23
AD23
8.45K_0402_1%
PS_3[3] BOARD_CONFIG[2] (Memory ID)
Need reference
X76 Schemat i c
2
W10 GPIO_17_THERMAL_INT VSS1DI PS_3
2 TOPAZ@1 GPIO19_CTF M2 GPIO_18
GPIO_19_CTF FutureASIC/SEYMOUR/PARK PS_3[4] AUD_PORT_CONN_PINSTRAP[1]
1
+3VGS SVI2_SVC 1 2 RV151GPU_VID1 10K_0402_5% P8 AM12
0.68U_0402_10V
GPIO_20_PWRCNTL_1 CEC_1 1
f
RV45 EXO@ 0_0402_5% P7 @ PS_3[5] AUD_PORT_CONN_PINSTRAP[2]
1 @ 2 N8 GPIO_21 CV31 RV16
RV17 1 @ 2 5.1K_0402_1% RV152 10K_0402_5% AK10 GPIO_22_ROMCSB AK12 RV155 1 TOPAZ@ 2 0_0402_5% SVI2_SVD @ 4.75K_0402_1%
GPIO_29 RSVD#AK12 SVI2_SVT SVI2_SVD [92] 2
AM10 AL11 RV156 1 TOPAZ@ 2 0_0402_5% SD034475180
SVI2_SVT [92]
2
1 @ 2 CLKREQ_PEG#0_R N7 GPIO_30 RSVD#AL11 AJ11 RV157 1 TOPAZ@ 2 0_0402_5% SVI2_SVC
[10] CLKREQ_PEG#0 CLKREQB RSVD#AJ11 SVI2_SVC [92]
RV18 1 DIS@ 2 1K_0402_1% TESTEN RV153 0_0402_5%
JTAG_TRSTB L6
JTAG_TDI_GPU L5 JTAG_TRSTB
JTAG_TCK L3 JTAG_TDI
JTAG_TMS_GPU L1 JTAG_TCK AL13
JTAG_TDO_GPU K4 JTAG_TMS GENLK_CLK AJ13
TESTEN K7 JTAG_TDO GENLK_VSYNC
+3VGS AF24 TESTEN
+VGA_CORE_TOPAZ NC#AF24 AG13
@ SWAPLOCKA AH12
1 8 JTAG_TDO_GPU AB13 SWAPLOCKB
2 7 JTAG_TDI_GPU W8 GENERICA
3 6 JTAG_TMS_GPU W9 GENERICB
4 5 JTAG_TRSTB W7 GENERICC AC19 PS_0
AD10 GENERICD PS_0
RP34 10K_0804_8P4R_5% AJ9 GENERICE AD19 PS_1
y
TP78 AL9 NC#AJ9 PS_1
NC#AL9 AE17 PS_2
AC14 PS_2
TP79 PX_EN AB16 HPD1 AE20 PS_3
2 @ 1 JTAG_TCK PX_EN PS_3
RV19 10K_0402_5%
C AE19 C
TS_A
l
AC16
DBG_VREFG
DDC/AUX
AE6
PLL/CLOCK DDC1CLK AE5
DDC1DATA
AD2
RV20 DIS@ AUX1P AD4 +VGA_CORE_TOPAZ
1M_0402_5% AUX1N
XTALOUT XTALIN AC11
DDC2CLK AC13
YV1 DIS@ +3VGS DDC2DATA
Disable MLPS
n
27MHZ_10PF_7V27000050 XTALIN AM28 AD13
10P change to 8.2P 7/4 XTALOUT AK28 XTALIN AUX2P AD11
3 1 RV22 1 @ 2 10K_0402_5% XTALOUT AUX2N
3 1 RV29 1 DIS@ 2 10K_0402_5% AC22 AD20 FB_GND RV158 1 TOPAZ@ 2 0_0402_5% VSSSENSE_VGA
1 GND GND 1 XO_IN NC#AD20 FB_VDDC VCCSENSE_VGA VSSSENSE_VGA [92]
CV18 CV17 RV59 1 DIS@ 2 10K_0402_5% AB22 AC20 RV159 1 TOPAZ@ 2 0_0402_5%
XO_IN2 NC#AC20 VCCSENSE_VGA [92]
8.2P 50V D NPO 0402 8.2P 50V D NPO 0402 RV21 1 EXO@ 2 10K_0402_5% GPIO28
DIS@ 4 2 DIS@ AE16
2 2 NC#AE16 AD16
NC#AD16
Enable MLPS SEYMOUR/FutureASIC AC1 +1.8VGS +3VGS
T4 DDCVGACLK AC3
T2 DPLUS THERMAL DDCVGADATA
+1.8VGS
DMINUS +VGA_CORE 1 TOPAZ@ 2 1 EXO@ 2 M2-50 use +1.8v
RV25 0_0402_5% RV26 0_0402_5%
LV2 DIS@ GPIO28 R5
1 2 13mA +TSVDD AD17 GPIO28_FDO VCCSENSE_VGA 1 EXO@ 2
BLM15BD121SN1D_0402 AC17 TSVDD VSSSENSE_VGA RV42 1 EXO@ 2 10_0402_5%
TSVSS
2
RV43 10_0402_5%
DIS@ DIS@ @
CV20 2 1 1U_0201_6.3V6M RV84 RV87
O
216-0842024-A11-MAR_FCBGA631
10K_0402_5% 10K_0402_5% Boot-VID Code
?
Voltage
1
TOPAZ Thermal Address-->0x82 SVC SVD
SVI2_SVD Selected (V)
SVI2_SVC
0 0 1.1
0 1 1.0
2
D D
@ DIS@
RV89 RV88 1 0 0.9
10K_0402_5% 10K_0402_5%
1 1 0.8
1
Title
Issued Date 2019/06/20 Deciphered Date 2020/06/30 MESO_(2/5)_MSIC
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
WWW.AliSaler.Com
Date:
LA-G716P
1 2 3 4 5
1 2 3 4 5
Main Func = GPU
l
370mA (HDMI)
+1.8VGS
188mA (Display Port) @ No Use GPU Display Port output
RV27 1 @ 2 0_0603_5% +DP_VDDR UV1G U?
CV26
CV27
NC/DP POWER
Crystal Pad DP POWER
2.2uF
1 1 +VGA_CORE 10uF 0.1uF
l
Analog Supply (40mA)DIS@ DIS@
AG15
AG16 DP_VDDR#AG15 NC#AE11
AE11
AF11 1uF
AF16 DP_VDDR#AG16 NC#AF11 AE13
1U_0201_6.3V6M
10U_0402_6.3V6M
2 2 AG17 DP_VDDR#AF16 NC#AE13 AF13
A AG18 DP_VDDR#AG17 NC#AF13 AG8 VDDC 6 16 0 A
AG19 DP_VDDR#AG18 NC#AG8 AG10
AF14 DP_VDDR#AG19 NC#AG10
DP_VDDR#AF14
VDDCI 2 3 2
AG20 AF6 @
AG21 DP_VDDC#AG20 NC#AF6 AF7 UV1D +1.8VGS
e
+0.95VSDGPU AF22 DP_VDDC#AG21 NC#AF7 AF8 +1.35V_MEM_GFX
U? 100mA
280mA AG22 DP_VDDC#AF22 NC#AF8 AF9 AM30
+DP_VDDC DP_VDDC#AG22 NC#AF9 2A MEM I/O PCIE_PVDD
PCIE
RV30 1 2 0_0603_5% AD14
CV49
CV50
@
DP_VDDC#AD14 H13 AB23
VDDR1 NC#AB23 1 1
H16 AC23
CV33
CV34
H19 VDDR1 NC#AC23 AD24
CV40
CV41
CV42
CV43
CV44
CV45
CV46
CV47
1 1 DIS@ DIS@
AG14 AE1 J10 VDDR1 NC#AD24 AE24
10U_0402_6.3V6M
1U_0201_6.3V6M
DP_VSSR NC#AE1 1 1 1 1 1 1 1 1 VDDR1 NC#AE24 2 2
DIS@ DIS@ AH14 AE3 J23 AE25
AM14 DP_VSSR NC#AE3 AG1 DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ J24 VDDR1 NC#AE25 AE26
1U_0201_6.3V6M
0.1U_0201_6.3V6K
2 2 AM16 DP_VSSR NC#AG1 AG6 J9 VDDR1 NC#AE26 AF25
10U_0402_6.3V6M
0.01U_0402_16V7K
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
+0.95VSDGPU 10uF 1uF 0.1uF
0.1U_0201_6.3V6K
AM18 DP_VSSR NC#AG6 AH5 2 2 2 2 2 2 2 2 K10 VDDR1 NC#AF25 AG26
AF23 DP_VSSR NC#AH5 AF10 K23 VDDR1 NC#AG26
AG23 DP_VSSR NC#AF10 AG9 K24 VDDR1
AM20 DP_VSSR NC#AG9 AH8 K9 VDDR1 L23
AM22 DP_VSSR NC#AH8 AM6 PCIE_VDDC 1 6 0 L11 VDDR1 PCIE_VDDC L24
AM24 DP_VSSR NC#AM6 AM8 L12 VDDR1 PCIE_VDDC L25
AF19 DP_VSSR NC#AM8 AG7 L13 VDDR1 PCIE_VDDC L26
AF20 DP_VSSR NC#AG7 AG11 L20 VDDR1 PCIE_VDDC M22 +0.95VSDGPU
AE14 DP_VSSR NC#AG11 BIF_VDDC 1 2 0 L21 VDDR1 PCIE_VDDC N22 1A
DP_VSSR L22 VDDR1 PCIE_VDDC N23 +PCIE_VDDC 2 @ 1
D
VDDR1 PCIE_VDDC N24
CV54
CV55
CV56
CV57
CV58
CV59
CV60
RV23 0_0603_5%
PCIE_VDDC R22
AF17 AE10 SPLL_VDDC 1 1 1 PCIE_VDDC T22
1 1 1 1 1 1 1
DPAB_CALR NC#AE10 +1.8VGS 13mA LEVE L PCIE_VDDC U22 DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@
T RANSLAT ION PCIE_VDDC V22
10U_0402_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
RV7 1 @ 2 0_0603_5% +VDD_CT AA20 PCIE_VDDC 2 2 2 2 2 2 2
216-0842024-A11-MAR_FCBGA631
+DP_VDDC 0 1 1 AA21 VDD_CT
? AB20 VDD_CT AA15
CV64
AB21 VDD_CT CORE VDDC N15
B 1 VDD_CT VDDC B
N17
DIS@ +3VGS VDDC R13
@ 25mA I/O VDDC R16
1U_0201_6.3V6M
UV1E 2 RV10 1 @ 2 0_0603_5% +VDDR3 AA17 VDDC R18
U?
AA18 VDDR3 VDDC Y21
+1.35V_MEM_GFX 10uF 2.2uF 0.1uF 0.01uF AB17 VDDR3 VDDC T12
CV65
AB18 VDDR3 VDDC T15 +VGA_CORE
1
r
AA27 A3 VDDR3 VDDC T17
AB24 GND GND A30 DIS@ V12 VDDC T20
AB32 GND GND AA13 VDDR1 1 5 1 1 Y12 VDDR4 VDDC U13
CV67
CV68
CV69
CV70
CV71
CV72
CV73
CV74
CV75
CV76
CV77
CV78
1U_0201_6.3V6M
AC24 GND GND AA16 2 U12 VDDR4 VDDC U16
GND GND VDDR4 VDDC 1 1 1 1 1 1 1 1 1 1 1 1
AC26 AB10 U18
AC27 GND GND AB15 VDDC V21 DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@
AD25 GND GND AB6 VDDC V15
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
AD32 GND GND AC9 VDDC V17 2 2 2 2 2 2 2 2 2 2 2 2
AE27 GND GND AD6 +3VGS 10uF 1uF 0.1uF VDDC V20
GND GND VDDC
POWER
AF32 AD8 Y13
AG27 GND GND AE7 VDDC Y16
AH32 GND GND AG12 VDDC Y18
K28 GND GND AH10 VDDR3 0 1 0 VDDC AA12
K32 GND GND AH28 VDDC M11
o
L27 GND GND B10 VDDC N12
M32 GND GND B12 VDDC U11
N25 GND GND B14 VDDC
CV100
CV101
CV102
CV103
CV104
CV105
CV106
CV107
CV108
CV109
N27 GND GND B16 +1.8VGS
P25 GND GND B18 LV6 DIS@ 90mA PLL
1 1 1 1 1 1 1 1 1 1
P32 GND GND B20 1 2 +MPLL_PVDD DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@
R27 GND GND B22 BLM15BD221SN1D_2P
CV81
CV82
CV83
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
T25 GND GND B24 2 2 2 2 2 2 2 2 2 2
T32 GND GND B26
1 1 1
R21 800mA
GND GND +1.8VGS 10uF 1uF 0.1uF BIF_VDDC +BIF_VDDC
f
U25 B6 DIS@ DIS@ DIS@ U21
U27 GND GND B8 BIF_VDDC
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6M
V32 GND GND C1 2 2 2 L8
W25 GND GND C32 +1.8VGS MPLL_PVDD
W26 GND GND E28 PCIE_PVDD 1 1 0 LV7 DIS@ 75mA ISOLAT E D
W27 GND GND F10 1 2 +SPLL_PVDD
CORE I/O
Y25 GND GND F12 BLM15BD121SN1D_0402 M13
CV84
CV85
C GND GND VDDCI C
Y32 F14 H7 M15
GND GND F16 MPLL_PVDD 2 1 0 1 1 SPLL_PVDD VDDCI M16
GND F18 DIS@ DIS@ VDDCI M17
GND F2 +0.95VSDGPU VDDCI M18 +VGA_CORE
10U_0402_6.3V6M
1U_0201_6.3V6M
GND F20 2 2 LV8 DIS@ 100mA VDDCI M20
M6 GND F22 SPLL_PVDD 1 1 0 1 2 +SPLL_VDDC H8 VDDCI M21
N13 GND GND F24 SPLL_VDDC VDDCI N20
CV91
CV92
CV93
CV86
CV87
CV88
CV89
CV90
BLM15BD121SN1D_0402
CV120
CV121
N16 GND GND F26 J7 VDDCI
GND GND 1 1 1 SPLL_PVSS 1 1 1 1 1 1 1
N18 F6
N21 GND GND
GND F8 VDDR4 (NC) 0 0 0 DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@
P6 GND GND G10
10U_0402_6.3V6M
1U_0201_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
0.1U_0201_6.3V6K
0.1U_0201_6.3V6K
0.1U_0201_6.3V6K
P9 GND GND G27 2 2 2 2 2 2 2 2 2 2
GND GND 216-0842024-A11-MAR_FCBGA631
R12 G31 ?
R15 GND GND G8 VDD_CT 0 1 0
GND GND
y
R17 H14
R20 GND GND H17
T13 GND GND H2
T16 GND GND H20 +TSVDD 0 1 0 +0.95VSDGPU
T18 GND GND H6
T21 GND GND J27 +BIF_VDDC 2 @ 1
T6 GND GND J31 RV31 0_0603_5%
U15 GND GND K11 +DP_VDDR 1 1 0
CV61
CV62
CV63
l
U17 GND GND K2
GND GND 1 1 1
U20 K22
U9 GND GND K6 DIS@ DIS@ DIS@
V13 GND GND
10U_0402_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
V16 GND 2 2 2
V18 GND
Y10 GND
Y15 GND
Y17 GND
Y20 GND
R11 GND A32
T11 GND VSS_MECH AM1
AA11 GND VSS_MECH AM32
M12 GND VSS_MECH
n
N11 GND
D GND D
V11
GND
216-0842024-A11-MAR_FCBGA631
?

Title
Issued Date 2019/06/20 Deciphered Date 2020/06/30 MESO_(4/5)_Power
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
Date: Thursday, June 20, 2019
LA-G716P
Sheet 29 of 101
1 2 3 4 5
O
5 4 3 2 1
Power-Up/Down Sequence 1. All the ASIC supplies must reach their respective nominal voltages within 20 ms
l
of the start of the ramp-up sequence, though a shorter ramp-up duration is
preferred. The maximum slew rate on all rails is 50 mV/μ s. Samsung 2G
2. It is recommended that the 3.3-V rail ramp up first. UV13 UV15
3. It is recommended that the 0.95-V rail reach at least 90% of its nominal value
no later than 2 ms from the start of VDDC ramping up. SA00009TA2L SA00009TA2L
l
4. The power rails that are shared with other components on the system should be S8_R1@ S8_R1@
gated for the dGPU so that when the dGPU is powered down (for example S IC D5 256M32 K4G80325FC-HC25 FBGA 170P S IC D5 256M32 K4G80325FC-HC25 FBGA 170P
AMD PowerXpress? idle state), all the power rails are removed from the dGPU.
The gate circuits must meet the slew rate requirement (such as ? 50 mV/μ s). UV13 UV15
D
5. VDDC and VDD_CT should not ramp up simultaneously. For example, VDDC D
should reach 90% before VDD_CT starts to ramp up (or vice versa). SA00009TA3L SA00009TA3L
S8_R3@ S8_R3@
e
6. For power down, reversing the ramp-up sequence is recommended.
S IC D5 256M32 K4G80325FC-HC25 FBGA 170P A31 ! S IC D5 256M32 K4G80325FC-HC25 FBGA 170P A31 !
< 20mS < 20mS

Hynix 2G
VDDR3(3.3V) UV13 UV15
>10uS
+3VGS
(DGPU_PWR_EN) SA0000C170L SA0000C170L
H8_R1@ H8_R1@
PCIE_VDDC(0.95V)
+0.95VSDGPU S IC D5 256M32 H5GC8H24AJR-R2C BGA 170P S IC D5 256M32 H5GC8H24AJR-R2C BGA 170P
D
(DGPU_PWR_EN with RC delay)
UV13 UV15
1.8V_IO(1.8V)
+1.8VGS SA0000C171L SA0000C171L
(DGPU_PWR_EN with RC delay) H8_R3@ H8_R3@
VDDC/VDDCI(0.8~1.15V) S IC D5 256M32 H5GC8H24AJR-R2C BGA A31! S IC D5 256M32 H5GC8H24AJR-R2C BGA A31!

+VGA_CORE
(DGPU_PWR_EN)
VMEMIO(1.35V or 1.5V)
+1.35V_MEM_GFX > 100mS > 100mS (SW)
r
(DGPU_PWROK with RC delay) Micron 2G
PWRGOOD
DGPU_PWROK UV13 UV15
C C
SA00009TI2L SA00009TI2L
> 100uS
PERSTb M8_R1@ M8_R1@
PLT_RST_VGA# Asserted Before PERSTb S IC D5 256M32 MT51J256M32HF-80:B FBGA S IC D5 256M32 MT51J256M32HF-80:B FBGA
REFCLK
o
UV13 UV15
CLK_PEG_VGA/CLK_PEG_VGA#
SA00009TI3L SA00009TI3L
Device in Device Hardware Reset Device CFG Accessible Device Powering down Device Powered down M8_R3@ M8_R3@
DEVICE Reset or Working
S IC D5 256M32 MT51J256M32HF-80:B A31! S IC D5 256M32 MT51J256M32HF-80:B A31!
No requirements
AND
y GPU
f
Samsung 2G
RV16 2G_S@
4.75K_0402_1%
SD034475180
Hynix 2G
RV15 2G_H@
3.4K_0402_1%
SD034340180
RV16 2G_H@
10K_0402_1%
SD034100280
Micron 2G
RV15 2G_M@
4.75K_0402_1%
SD034475180
l
B B
GPP_B13 PCH_PLTRST# PLTRST#

MCP GATE AND PLT_RST_VGA# PERSTB
GATE
GPP_D10 DGPU_HOLD_RST#
GPP_D13 DGPU_PWR_EN
n
GPP_D18 DGPU_PWROK
For AMD R17M-M1-30 VRAM
Memory ID 8Gb R3 P/N Vendor Conf i gur a t i o
n Size
000 SA00009TA3L SAMSUNG S IC D5 256M32 K4G80325FC-HC25 FBGA 170P A31 ! 2GB
+3VS +3VGS
110 SA0000C171L Hynix S IC D5 256M32 H5GC8H24AJR-R2C BGA A31! 2GB
DGPU_PWR_EN
LD O 1 111 SA00009TI3L Micron S IC D5 256M32 MT51J256M32HF-80:B A31! 2GB
O
+1.05V_PRIM +0.95VSDGPU +1.8V_PRIM +1.8VGS
DGPU_PWR_EN
LD O 2 DGPU_PWR_EN
LD O 2
B+ +VGA_CORE B+ +1.35V_MEM_GFX
A
DGPU_PWR_EN
PWM 3 DGPU_PWROK
PWM 3 A

MESO_Note
WWW.AliSaler.Com
5 4 3 2 1
1 2 3 4 5
Main Func = GPU
l
M_DA[63..0]
l
[35,36] M_DA[63..0]
M_MAA0_[8..0]
[35] M_MAA0_[8..0]
M_MAA1_[8..0]
[36] M_MAA1_[8..0]
A A
e
@
UV1C U?
GDDR5/DDR3 GDDR5/DDR3
M_DA0 K27 K17 M_MAA0_0
M_DA1 J29 DQA0_0 MAA0_0/MAA_0 J20 M_MAA0_1
M_DA2 H30 DQA0_1 MAA0_1/MAA_1 H23 M_MAA0_2
M_DA3 H32 DQA0_2 MAA0_2/MAA_2 G23 M_MAA0_3
M_DA4 G29 DQA0_3 MAA0_3/MAA_3 G24 M_MAA0_4
M_DA5 F28 DQA0_4 MAA0_4/MAA_4 H24 M_MAA0_5
M_DA6 F32 DQA0_5 MAA0_5/MAA_5 J19 M_MAA0_6
+1.35V_MEM_GFX +1.35V_MEM_GFX M_DA7 F30 DQA0_6 MAA0_6/MAA_6 K19 M_MAA0_7
M_DA8 C30 DQA0_7 MAA0_7/MAA_7 G20 M_MAA0_8
M_DA9 F27 DQA0_8 MAA0_8/MAA_13 L17
M_DA10 DQA0_9 MAA0_9/MAA_15
D
A28
DQA0_10
1
1
M_DA11 C28 J14 M_MAA1_0
M_DA12 E27 DQA0_11 MAA1_0/MAA_8 K14 M_MAA1_1
RV33 RV32 M_DA13 G26 DQA0_12 MAA1_1/MAA_9 J11 M_MAA1_2
40.2_0402_1% 40.2_0402_1% M_DA14 D26 DQA0_13 MAA1_2/MAA_10 J13 M_MAA1_3
DIS@ DIS@ M_DA15 F25 DQA0_14 MAA1_3/MAA_11 H11 M_MAA1_4
2
M_DA16 A25 DQA0_15 MAA1_4/MAA_12 G11 M_MAA1_5

+MVREFDA +MVREFSA M_DA17 C25 DQA0_16 MAA1_5/MAA_BA2 J16 M_MAA1_6
M_DA18 E25 DQA0_17 MAA1_6/MAA_BA0 L15 M_MAA1_7
M_DA19 D24 DQA0_18 MAA1_7/MAA_BA1 G14 M_MAA1_8
DQA0_19 MAA1_8/MAA_14
1
M_DA20 E23 L16
MEMORY INTERFACE
1 1 M_DA21 DQA0_20 MAA1_9/RSVD
DIS@ DIS@ F23
RV34 CV94 RV35 CV95 M_DA22 D22 DQA0_21 E32 M_WCKA0_0
r
100_0402_1% 1U_0201_6.3V6M 100_0402_1% 1U_0201_6.3V6M M_DA23 F21 DQA0_22 WCKA0_0/DQMA0_0 E30 M_WCKA#0_0 M_WCKA0_0 [35]
DIS@ 2 DIS@ 2 M_DA24 E21 DQA0_23 WCKA0B_0/DQMA0_1 A21 M_WCKA0_1 M_WCKA#0_0 [35]
2
M_DA25 D20 DQA0_24 WCKA0_1/DQMA0_2 C21 M_WCKA#0_1 M_WCKA0_1 [35]

M_DA26 F19 DQA0_25 WCKA0B_1/DQMA0_3 E13 M_WCKA1_0 M_WCKA#0_1 [35]
B M_DA27 A19 DQA0_26 WCKA1_0/DQMA1_0 D12 M_WCKA#1_0 M_WCKA1_0 [36] B
M_DA28 D18 DQA0_27 WCKA1B_0/DQMA1_1 E3 M_WCKA1_1 M_WCKA#1_0 [36]
M_DA29 F17 DQA0_28 WCKA1_1/DQMA1_2 F4 M_WCKA#1_1 M_WCKA1_1 [36]
M_DA30 A17 DQA0_29 WCKA1B_1/DQMA1_3 M_WCKA#1_1 [36]
M_DA31 C17 DQA0_30 H28 M_EDCA0
M_DA32 E17 DQA0_31 EDCA0_0/QSA0_0 C27 M_EDCA1 M_EDCA0 [35]
M_DA33 DQA1_0 EDCA0_1/QSA0_1 M_EDCA2 M_EDCA1 [35]
o
D16 A23
M_DA34 F15 DQA1_1 EDCA0_2/QSA0_2 E19 M_EDCA3 M_EDCA2 [35]
M_DA35 A15 DQA1_2 EDCA0_3/QSA0_3 E15 M_EDCA4 M_EDCA3 [35]
M_DA36 D14 DQA1_3 EDCA1_0/QSA1_0 D10 M_EDCA5 M_EDCA4 [36]
M_DA37 F13 DQA1_4 EDCA1_1/QSA1_1 D6 M_EDCA6 M_EDCA5 [36]
RV36 DIS@ RV37 DIS@ M_DA38 A13 DQA1_5 EDCA1_2/QSA1_2 G5 M_EDCA7 M_EDCA6 [36]
49.9_0402_1% 10_0402_1% M_DA39 C13 DQA1_6 EDCA1_3/QSA1_3 M_EDCA7 [36]
VRAM_RST# M_DA40 DQA1_7 M_DBIA0
f
1 2 2 1 E11 H27
[35,36] VRAM_RST#_R M_DA41 A11 DQA1_8 DDBIA0_0/QSA0_0B A27 M_DBIA1 M_DBIA0 [35]
M_DA42 C11 DQA1_9 DDBIA0_1/QSA0_1B C23 M_DBIA2 M_DBIA1 [35]
DQA1_10 DDBIA0_2/QSA0_2B M_DBIA2 [35]
1
M_DA43 F11 C19 M_DBIA3

1 1 M_DA44 DQA1_11 DDBIA0_3/QSA0_3B M_DBIA4 M_DBIA3 [35]
DIS@ DIS@ @ A9 C15
CV96 RV38 CV97 M_DA45 C9 DQA1_12 DDBIA1_0/QSA1_0B E9 M_DBIA5 M_DBIA4 [36]
120P_0402_50V8J 5.1K_0402_1% 68P_0402_50V8J M_DA46 F9 DQA1_13 DDBIA1_1/QSA1_1B C5 M_DBIA6 M_DBIA5 [36]
2 2 M_DA47 D8 DQA1_14 DDBIA1_2/QSA1_2B H4 M_DBIA7 M_DBIA6 [36]
2
M_DA48 E7 DQA1_15 DDBIA1_3/QSA1_3B M_DBIA7 [36]

M_DA49 A7 DQA1_16 L18 M_ABIA0
M_DA50 C7 DQA1_17 ADBIA0/ODTA0 K16 M_ABIA1 M_ABIA0 [35]
M_DA51 F7 DQA1_18 ADBIA1/ODTA1 M_ABIA1 [36]
M_DA52 A5 DQA1_19 H26 M_CLKA0
M_DA53 E5 DQA1_20 CLKA0 H25 M_CLKA#0 M_CLKA0 [35]
M_DA54 C3 DQA1_21 CLKA0B M_CLKA#0 [35]
M_DA55 E1 DQA1_22 G9 M_CLKA1
Place close to GPU (within 25mm) DQA1_23 CLKA1 M_CLKA1 [36]
y
M_DA56 G7 H9 M_CLKA#1
and place componment close to each other M_DA57 G6 DQA1_24 CLKA1B M_CLKA#1 [36]
M_DA58 G1 DQA1_25 G22 M_RASA#0
M_DA59 G3 DQA1_26 RASA0B G17 M_RASA#1 M_RASA#0 [35]
M_DA60 J6 DQA1_27 RASA1B M_RASA#1 [36]
M_DA61 J1 DQA1_28 G19 M_CASA#0
C C
l
M_DA62 J3 DQA1_29 CASA0B G16 M_CASA#1 M_CASA#0 [35]
M_DA63 J5 DQA1_30 CASA1B M_CASA#1 [36]
DQA1_31 H22 M_CSA#0
+MVREFDA K26 CSA0B_0 J22 M_CSA#0 [35]
+MVREFSA J26 MVREFDA CSA0B_1
MVREFSA G13 M_CSA#1
J25 CSA1B_0 K13 M_CSA#1 [36]
RV39 1 DIS@ 2 120_0402_1% K25 NC#J25 CSA1B_1
MEM_CALRP0 K20 M_CKEA0
CKEA0 J17 M_CKEA1 M_CKEA0 [35]
CKEA1 M_CKEA1 [36]
n
G25 M_WEA#0
VRAM_RST# L10 WEA0B H10 M_WEA#1 M_WEA#0 [35]
DRAM_RST WEA1B M_WEA#1 [36]
RV40 @ 1 2 51.1_0402_1% CV98 @1 2 0.1U_0402_16V4Z K8
RV41 @ 1 2 51.1_0402_1% CV99 @1 2 0.1U_0402_16V4Z L7 CLKTESTA
CLKTESTB
Route 50ohms single-ended/100ohm dif f and keep s hort

debug only, for clock observat i on,if not need, DNI. 216-0842024-A11-MAR_FCBGA631
?
1
O 2 3
Compal Secret Data
4
Title
Size
Date:
MESO_(5/5)_MEM
Document Number
LA-G716P
Thursday, June 20, 2019 Sheet
5
31 of 101
Rev
1.0
D
5 4 3 2 1
Main Function:
e l l D
Reserve r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
(RSVD)
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
Main Function:
e l l D
Reserve r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
(RSVD)
5 4 3 2 1
5 4 3 2 1
Main Function:
e l l D
Reserve r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
(RSVD)
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
Main Func = GDDR5
l
M_DA[0..31]
[31] M_DA[0..31]
UV13 @ MF=0
MF=0 MF=1 MF=1 MF=0
A4 M_DA2
l
C2 DQ24 DQ0 A2 M_DA0
[31] M_EDCA0 EDC0 EDC3 DQ25 DQ1 M_DA3
C13 B4
R13 B2
R2 E4 L
+1.35V_MEM_GFX [31] M_EDCA2 EDC3 EDC0 DQ28 DQ4 M_DA7
E2
DQ29 DQ5 F4 M_DA5 BYTE0
D DQ30 DQ6 M_DA4 D
D2 F2
[31] M_DBIA0 DBI0# DBI3# DQ31 DQ7 M_DA15
D13 A11
M_CLKA0 [31] M_DBIA1 DBI1# DBI2# DQ16 DQ8 M_DA13
1 DIS@ 2 P13 A13
RV78 60.4_0402_1% P2 B11
B13 L
M_CLKA0 DQ19 DQ11 M_DA10
e
J12 E11
[31] M_CLKA0 M_CLKA#0 J11 CK DQ20 DQ12 E13 M_DA12 BYTE1
1 DIS@ 2 M_CLKA#0 [31] M_CLKA#0 J3 CK# DQ21 DQ13 F11 M_DA8
[31] M_CKEA0 CKE# DQ22 DQ14 M_DA14
RV79 60.4_0402_1% F13
DQ23 DQ15 U11 M_DA30
H11 DQ8 DQ16 U13 M_DA28
[31] M_MAA0_2 BA0/A2 BA2/A4 DQ9 DQ17 M_DA31
K10 T11
K11 T13
H10 N11 H
N13
DQ13 DQ21 M11 M_DA24 BYTE3
K4 DQ14 DQ22 M13 M_DA25
[31] M_MAA0_7 A8/A7 A10/A0 DQ15 DQ23 M_DA19
H5 U4
H4 U2
K5 T4
J5 T2 H
[31] M_MAA0_8 A12/RFU/NC DQ3 DQ27 M_DA18
N4
A5 DQ4 DQ28 N2 M_DA21 BYTE2
U5 VPP/NC DQ5 DQ29 M4 M_DA16
D
VPP/NC DQ6 DQ30 M2 M_DA23
DQ7 DQ31
RV134 2 DIS@ 1 1K_0402_1% J1 +1.35V_MEM_GFX
RV135 2 DIS@ 1 1K_0402_1% J10 MF
RV123 2 DIS@ 1 121_0402_1% J13 SEN B1
ZQ VDDQ D1
VDDQ F1
J4 VDDQ M1
[31] M_ABIA0 ABI# VDDQ
G3 P1
[31] M_RASA#0 RAS# CAS# VDDQ
G12 T1
[31] M_CSA#0 CS# WE# VDDQ
L3 G2
[31] M_CASA#0 CAS# RAS# VDDQ
L12 L2
[31] M_WEA#0 WE# CS# VDDQ
C B3 C
VDDQ D3
VDDQ F3
r
D5 VDDQ H3
[31] M_WCKA#0_0 WCK01# WCK23# VDDQ
D4 K3
[31] M_WCKA0_0 WCK01 WCK23 VDDQ M3
P5 VDDQ P3
+1.35V_MEM_GFX P4 T3
[31] M_WCKA0_1 WCK23 WCK01 VDDQ E5
VDDQ N5
+FB0_VREFDL VDDQ
2.37K_0402_1%
A10 E10
1
U10 VREFD VDDQ N10

+FB0_VREFCL VREFD VDDQ
RV52 DIS@
J14 B12
VREFC VDDQ D12
VDDQ F12
VDDQ H12
o
2
J2 VDDQ K12
[31,36] VRAM_RST#_R RESET# VDDQ M12
+FB0_VREFDL VDDQ P12
VDDQ T12
VDDQ
1U_0201_6.3V6M
5.49K_0402_1%
G13
1
VDDQ
CV150
1 H1 L13
VSS VDDQ
RV53 DIS@
K1 B14
B5 VSS VDDQ D14
f
G5 VSS VDDQ F14
2 VSS VDDQ
DIS@
L5 M14
2
T5 VSS VDDQ P14

B10 VSS VDDQ T14
D10 VSS VDDQ
G10 VSS
L10 VSS A1
P10 VSS VSSQ C1
T10 VSS VSSQ E1
+1.35V_MEM_GFX H14 VSS VSSQ N1
K14 VSS VSSQ R1
+1.35V_MEM_GFX VSS VSSQ U1
VSSQ
2.37K_0402_1%
H2
1
G1 VSSQ K2
B VDD VSSQ B
RV54 DIS@
L1 A3
G4 VDD VSSQ C3
L4 VDD VSSQ E3
C5 VDD VSSQ N3
2
R5 VDD VSSQ R3
VDD VSSQ
y
C10 U3
+FB0_VREFCL R10 VDD VSSQ C4 +1.35V_MEM_GFX
D11 VDD VSSQ R4
VDD VSSQ
1U_0201_6.3V6M
5.49K_0402_1%
G11 F5
1
VDD VSSQ
CV151
1 L11 M5
VDD VSSQ
RV55 DIS@
P11 F10
CV161
CV162
CV163
CV164
CV165
CV166
CV167
CV168
CV169
CV170
G14 VDD VSSQ M10
VDD VSSQ 1 1 1 1 1 1 1 1 1 1
l
L14 C11
2 VDD VSSQ
DIS@
R11
2
VSSQ A12
VSSQ C12 2 2 2 2 2 2 2 2 2 2
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
VSSQ E12
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
VSSQ N12
VSSQ R12
170-BALL VSSQ U12
VSSQ H13
SGRAM GDDR5 VSSQ K13
VSSQ A14
VSSQ C14
VSSQ E14
n
VSSQ N14
VSSQ R14
St itchi ng Caps OPTI ONf or ME Msi gnal s t hat have a change of r ef er ence pl ane volt age
VSSQ U14 Add st itchi ng caps when r equi r ed, one cap per t hr ee si gnal s
VSSQ
H5GC4H24AJR-R0C_BGA170
+1.35V_MEM_GFX
CV152
CV153
CV154
CV155
CV156
CV157
CV158
CV159
CV160
A A
1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
10U_0402_6.3V6M
DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@
O
MESO_GDDR5_A0
5 4 3 2 1
5 4 3 2 1
Main Func = GDDR5
l
M_DA[32..63]
[31] M_DA[32..63]
UV15 @ MF=0
l
MF=0 MF=1 MF=1 MF=0
A4 M_DA38
C2 DQ24 DQ0 A2 M_DA37
+1.35V_MEM_GFX [31] M_EDCA4 EDC0 EDC3 DQ25 DQ1 M_DA36
D
C13 B4 D
R13 B2 L
R2 E4
[31] M_EDCA6 EDC3 EDC0 DQ28 DQ4 E2 M_DA35 BYTE4
DQ29 DQ5 F4 M_DA32
1 DIS@ 2 M_CLKA1 D2 DQ30 DQ6 F2 M_DA34
e
RV85 60.4_0402_1% D13 A11
P13 A13
P2 B11
M_CLKA#1 [31] M_DBIA6 DBI3# DBI0# DQ18 DQ10 M_DA42
1 DIS@ 2 B13 L
RV86 60.4_0402_1% M_CLKA1 J12 DQ19 DQ11 E11 M_DA44
[31] M_CLKA1 M_CLKA#1 J11 CK DQ20 DQ12 E13 M_DA45 BYTE5
[31] M_CLKA#1 J3 CK# DQ21 DQ13 F11 M_DA46
[31] M_CKEA1 CKE# DQ22 DQ14 M_DA47
F13
DQ23 DQ15 U11 M_DA62
H11 DQ8 DQ16 U13 M_DA61
K10 T11
K11 T13 H
H10 N11
[31] M_MAA1_3 BA3/A3 BA1/A5 DQ12 DQ20 N13 M_DA58 BYTE7
DQ13 DQ21 M11 M_DA56
K4 DQ14 DQ22 M13 M_DA59
H5 U4
H4 U2
K5 T4
D
J5 T2 H
[31] M_MAA1_8 A12/RFU/NC DQ3 DQ27 M_DA54
N4
A5 DQ4 DQ28 N2 M_DA50 BYTE6
U5 VPP/NC DQ5 DQ29 M4 M_DA53
VPP/NC DQ6 DQ30 M2 M_DA49
DQ7 DQ31
RV117 2 DIS@ 1 1K_0402_1% J1 +1.35V_MEM_GFX
RV119 2 DIS@ 1 1K_0402_1% J10 MF
RV121 2 DIS@ 1 121_0402_1% J13 SEN B1
ZQ VDDQ D1
VDDQ F1
J4 VDDQ M1
[31] M_ABIA1 ABI# VDDQ
C G3 P1 C
[31] M_RASA#1 RAS# CAS# VDDQ
G12 T1
[31] M_CSA#1 CS# WE# VDDQ
L3 G2
r
[31] M_CASA#1 CAS# RAS# VDDQ
L12 L2
[31] M_WEA#1 WE# CS# VDDQ
+1.35V_MEM_GFX B3
VDDQ D3
VDDQ F3
D5 VDDQ H3
2.37K_0402_1%
D4 K3
[31] M_WCKA1_0
1
WCK01 WCK23 VDDQ M3

VDDQ
RV48 DIS@
P5 P3
P4 T3
[31] M_WCKA1_1 WCK23 WCK01 VDDQ E5
VDDQ N5
2
+FB1_VREFDL A10 VDDQ E10

+FB1_VREFDL U10 VREFD VDDQ N10
o
+FB1_VREFCL J14 VREFD VDDQ B12
VREFC VDDQ
1U_0201_6.3V6M
5.49K_0402_1%
D12
1
VDDQ
CV171
1 F12
VDDQ
RV49 DIS@
H12
J2 VDDQ K12
[31,35] VRAM_RST#_R RESET# VDDQ M12
2 VDDQ
DIS@
P12
2
VDDQ T12
f
VDDQ G13
H1 VDDQ L13
K1 VSS VDDQ B14
B5 VSS VDDQ D14
G5 VSS VDDQ F14
L5 VSS VDDQ M14
+1.35V_MEM_GFX T5 VSS VDDQ P14
B10 VSS VDDQ T14
D10 VSS VDDQ
VSS
2.37K_0402_1%
G10
1
L10 VSS A1
VSS VSSQ
RV50 DIS@
P10 C1
T10 VSS VSSQ E1
H14 VSS VSSQ N1
B VSS VSSQ B
K14 R1
2
+1.35V_MEM_GFX VSS VSSQ U1

VSSQ H2
+FB1_VREFCL G1 VSSQ K2
L1 VDD VSSQ A3
VDD VSSQ
y
1U_0201_6.3V6M
5.49K_0402_1%
G4 C3
1
VDD VSSQ
CV172
1 L4 E3
VDD VSSQ
RV51 DIS@
C5 N3 +1.35V_MEM_GFX
R5 VDD VSSQ R3
C10 VDD VSSQ U3
2 VDD VSSQ
DIS@
R10 C4
2
D11 VDD VSSQ R4
CV182
CV183
CV184
CV185
CV186
CV187
CV188
CV189
CV190
CV191
VDD VSSQ
l
G11 F5 1 1 1 1 1 1 1 1 1 1
L11 VDD VSSQ M5
P11 VDD VSSQ F10
G14 VDD VSSQ M10
L14 VDD VSSQ C11 0.1U_0201_10V6K 2 2 2 2 2 2 2 2 2 2
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
VDD VSSQ R11
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
VSSQ A12
VSSQ C12
VSSQ E12
VSSQ N12
VSSQ R12
170-BALL VSSQ U12
VSSQ H13
n
SGRAM GDDR5 VSSQ K13
VSSQ A14
VSSQ C14
St itchi ng Caps OPTI ONf or ME Msi gnal s t hat have a change of r ef er ence pl ane volt age
VSSQ E14 Add st itchi ng caps when r equi r ed, one cap per t hr ee si gnal s
VSSQ N14
+1.35V_MEM_GFX VSSQ R14
VSSQ U14
VSSQ
H5GC4H24AJR-R0C_BGA170
CV173
CV174
CV175
CV176
CV177
CV178
CV179
CV180
CV181
A 1 1 1 1 1 1 1 1 1 A
2 2 2 2 2 2 2 2 2
10U_0402_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@
O
MESO_GDDR5_A1
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
Main Func = GPU
D
+3V/+0.95V/+1.8V for GPU
CZ24 2
@
1
1U_0201_6.3V6M
Maximum Output Current 4A
1
UZ5
7 +3VGS_OUT 1
1
DIS@
CZ27 0.1U_0402_10V7K
JP9
2
PJP@
2 25mA
e l l D
D
+3VS VIN VOUT 1 2 +3VGS
2 8
VIN VOUT JUMP_43X79 JP9
RZ5 1 DIS@ 2 0_0402_5% +3VGS_GPU_ON 3 6 Always Short
[11,92] DGPU_PWR_EN ON CT
2 1
@ +5VALW 4
CZ25 VBIAS 5 CZ28 DIS@
1 GND
0.1U_0402_16V7K @ 9 100P_0402_50V8J
1 CZ26 GND 2
C C
r
0.1U_0402_10V7K
2 TPS22967DSGR_SON8_2X2
DIS@
o
DIS@
@ CZ34 0.1U_0402_10V7K
CZ29 2 1 1 2
1U_0201_6.3V6M
1
UZ6
14 +0.95VSDGPU_OUT 1
JP10 PJP@
2
1900mA
f
+1.05V_PRIM
2 VIN1 VOUT1 13 1 2 +0.95VSDGPU JP10
VIN1 VOUT1
DGPU_PWR_EN RZ6 1 DIS@ 2 10K_0402_5% +0.95VSDGPU_ON 3 12 2
CZ35 DIS@
1 330P_0402_50V7K
JUMP_43X79 Always Short
@ ON1 CT1
+5VALW
CZ32 1DIS@ 2 0.1U_0402_16V7K CZ30 2 1 4 11
0.1U_0402_10V7K VBIAS GND
RZ7 1 DIS@ 2 10K_0402_5% +1.8VGS_GPU_ON 5 10 2 1 CZ36 DIS@
ON2 CT2 330P_0402_50V7K JP11 PJP@
CZ33 1DIS@ 2 0.1U_0402_16V7K 6 9 +1.8VGS_OUT 1 2
B
+1.8V_PRIM
7 VIN2
VIN2
VOUT2
VOUT2
8 1 2
JUMP_43X79
+1.8VGS
331mA B
@
1
15
1 JP11
y
GPAD
CZ31
1U_0201_6.3V6M EM5209VF_DFN14_3X2
CZ37 DIS@ Always Short
0.1U_0402_10V7K
2 DIS@ 2
n l Maximum Output Current 6A
O
GPU Power
5 4 3 2 1
5 4 3 2 1
Main Func = LCD Main Func = CAM&MIC, TS
l
Pin 5,6,9 Cable side NC INVERTER POWER
Pin 4 for 17" CAMERA +3VS +3VS_CAM
JEDP1 CONN@ +19VB +DCBAT_LCD
1
+DCBAT_LCD
60 mils 1 2
41 1 2 F1 R95 S FUSE T0603FF1000TM 1A 65V UL FAST
42 G1 2 3 1 2
l
G2 3 4 CAM_DET#_R R96 1 @ 2 0_0201_5%
4 5 +LCDVDD_LCD CAM_DET# [11]
1.5A_24V_SMD1812P150TF-24 1
1
5 6 R96 close JEDP! @ 08/15 C5 C6
6 7 60 mils
@
+MIC_VCC +3VS_CAM
7 8
0.1U_0402_50V7K
1000P_0402_50V7K
RF@
2
8 9 2
9 10 1 1
1
LCD_TST_C
0.1U_0402_16V7K
1U 6.3V M X5R 0201
82P_0402_50V8J
2 @ 1
D 10 11 DBC_PANEL_EN_R D
C7
C8
C9
R83 0_0402_5%
11 12 EDP_HPD
EDP_HPD [6] 1 1
2
12 13 2 2
e
13 14 LCD_CBL_DET# C39 @ C36
14 15 EDP_AUXP_C LCD_CBL_DET# [9] +LCDVDD_LCD +LCDVDD 1U_0201_6V3M 0.1U_0402_10V7K
15 16 EDP_AUXN_C 2 2
16 17
17 18 EDP_TXN0_C 1 2
18 19 EDP_TXP0_C R8 0_0603_5%
19 20
20 21 EDP_TXN1_C
C36: colse to JEDP1.29
21 22 EDP_TXP1_C
22 23 EE note: Never change R8 to short pad after MP
23 24
24 25 TOUCH_SCREEN_INT# [6]
25 26 TOUCH_SCREEN_RST [6]
26 27 LCD_BRIGHTNESS +MIC_VCC
27 28 BLON_OUT_C +TS_VDD_IN +TS_VDD
28 29
+3VS_CAM
D
29 30 DMIC_DATA_EDP 1 2
30 31 DMIC_CLK_EDP DMIC_DATA_EDP [56]
DMIC_CLK_EDP [56] R67 0_0603_5%
31 32
32 33 USB20_N6_R Change TouchScreen
33 34 USB20_P6_R PWR path
34 35 Jason 2019-06-18 +TS_VDD_IN
35 36 USB20_N8_R TS_USB@
36 37 USB20_P8_R 1 2 BKLT_CTRL 1 2 +TS_VDD
37 38 BLON_OUT_C +5VS
R75 1 2 100K_0402_5% R81 TS_I2C@ 0_0603_5%
38 39 TS_EN R76 1 2 100K_0402_5% EDP_HPD 1 2
39 40 +3VS
R77 100K_0402_5% R82 0_0603_5% U2 @
40 +TS_VDD
2 @ 1 20 mils 5 1 20mil
ACES_51540-04001-P01 1 @ 2 C35 1U_0201_6V3M IN OUT
r
SP010029F00 R11 0_0201_5% 2 1
GND
D2
Brightness 4 3 C37 @
PANEL_BKEN_EC [58] [11] PCH_3.3V_TS_EN EN OC
2 1U_0201_6V3M
DMIC_CLK_EDP BLON_OUT_C 1 2 EDP_BKLT_CTRL [6] 2
SY6288C20AAC_SOT23-5
1
C
LCD_BRIGHTNESS R78 1 2 100_0402_5% BKLT_CTRL 1 C
DMIC_DATA_EDP LCD_TST_C R79 1 2 100_0402_5% LCD_TST R72 @
R80 100_0402_5% 3 LCD_TST 100K_0402_5%
LCD_TST [58]
BAT54C_SOT23-3~D
EC (BIST MODE)
2
3
o
3
ED4 @ESD@
L03ESDL5V0CG3-2_SOT-523-3
1
f
1
D3
1 2
[58,77] LID_CL_SIO#
RB551V-30_SOD323-2
R14
TS_EN 1 2
TOUCH_SCREEN 1 33_0402_5%
TOUCH_SCREEN_PD# [6]
R13 1 @ 2 0_0201_5% DBC_PANEL_EN_R
[11] DBC_PANEL_EN
C18 @
10P_0402_50V8J
+3VS +LCDVDD 2
EDP_TXN0_C
y
C12 1 2 0.1U_0402_16V7K
[6] EDP_TXN0 EDP_TXP0_C
[6] EDP_TXP0 C13 1 2 0.1U_0402_16V7K
U1
C16 2 1 5 1 40mil
IN OUT +3VS
C14 1 2 0.1U_0402_16V7K EDP_TXN1_C 1U_0201_6.3V6M 2
[6] EDP_TXN1 EDP_TXP1_C GND
C15 1 2 0.1U_0402_16V7K R15
l
B [6] EDP_TXP1 USB20_N8_R B
4 3 2 1
EN OC 10K_0402_5% TS_USB@
SY6288C20AAC_SOT23-5 USB20_P8_R 1 2
C17 1 2 0.1U_0402_16V7K EDP_AUXN_C D4 R18 0_0402_5%
[6] EDP_AUXN EDP_AUXP_C
[6] EDP_AUXP C19 1 2 0.1U_0402_16V7K 2
[6] EDP_VDD_EN
1 LCDVDD_EN L4 @EMI@
2
USB20_P8_R 2 1 USB20_P8_RR [43]
3
High Active
2
[58] LCD_VCC_TEST_EN
1
BAT54C_SOT23-3~D R17 USB20_N8_R 3 4

EC (BIST MODE)
n
USB20_N8_RR [43]
100K_0402_5% ED2 @ESD@
L03ESDL5V0CG3-2_SOT-523-3 MCM1012B900F06BP_4P
2
1
TS_USB@
1 2
1
R19 0_0402_5%
I2C Touch Screen (Reserved)

Close to JEDP1
TS_I2C@ USB20_P6_R 1 @EMI@ 2
1 2 USB20_N8_R R10 0_0402_5%
[11] I2C_1_SDA USB20_N6_R
R84 TS_I2C@ 0_0201_5%
1 2 USB20_P8_R
[11] I2C_1_SCL
O
R85 0_0201_5% L3 EMI@
USB20_P6_R 2 1 USB20_P6 [12]
2
+3VS
TS_I2C@ USB20_N6_R 3 4
2
I2C_1_SDA USB20_N6 [12]
1 2
R86 TS_I2C@ 4.7K_0402_5% MCM1012B900F06BP_4P
1 2 I2C_1_SCL ED3 @ESD@
R87 TS_I2C@ 4.7K_0402_5% L03ESDL5V0CG3-2_SOT-523-3
1 2 TOUCH_SCREEN_RST 1 @EMI@ 2
1
A R88 10K_0402_5% R12 0_0402_5% A
1
+3VS
1 @ 2 LCD_CBL_DET#
R90 10K_0402_5%
2019/06/20
Compal Secret Data
2020/06/30 Title
LCD/Cam/MIC/T.Panel
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
Main Function:
e l l D
Reserve r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
(RSVD)
5 4 3 2 1
5 4 3 2 1
Main Func = HDMI HDMI_CLKP

RI1 EMI@
HDMI_L_CLKP HDMI_TX_N0
RI2 EMI@
HDMI_L_TX_N0
1 2 1 2
l
5.6_0402_1% 5.6_0402_1%
LI1 @EMI@ LI2 @EMI@
1
CI1 1 2 0.1U_0402_10V7K HDMI_CLKN 3 4 2 1
[6] CPU_DP1_N3 CI2 1 2 0.1U_0402_10V7K HDMI_CLKP RI3 EMI@
[6] CPU_DP1_P3 RI4 EMI@
300_0402_5%
CI3 1 2 0.1U_0402_10V7K HDMI_TX_N0 2 1 3 4 300_0402_5%
[6] CPU_DP1_N2 CI4 1 2 0.1U_0402_10V7K HDMI_TX_P0 RI3 change value from "150_0402_5%"
D D
2
[6] CPU_DP1_P2 HCM1012GH900BP_4P to "300_0402_5%" for EMI request HCM1012GH900BP_4P RI4 change value from "150_0402_5%"
Jason 2019-06-14 to "300_0402_5%" for EMI request
Jason 2019-06-14
e
CI5 1 2 0.1U_0402_10V7K HDMI_TX_N1
[6] CPU_DP1_N1 CI6 1 2 0.1U_0402_10V7K HDMI_TX_P1 RI5 EMI@ RI6 EMI@
[6] CPU_DP1_P1 HDMI_CLKN 1 2 HDMI_L_CLKN HDMI_TX_P0 1 2 HDMI_L_TX_P0
CI7 1 2 0.1U_0402_10V7K HDMI_TX_N2
[6] CPU_DP1_N0 CI8 1 2 0.1U_0402_10V7K HDMI_TX_P2 5.6_0402_1% 5.6_0402_1%
[6] CPU_DP1_P0
RI17
RI18
RI19
RI20
RI21
RI22
RI23
RI24
RI7 EMI@ RI8 EMI@
HDMI_TX_P2 1 2 HDMI_L_TX_P2 HDMI_TX_P1 1 2 HDMI_L_TX_P1
1
1
1
1
1
1
1
1
5.6_0402_1% 5.6_0402_1%
D
LI3 @EMI@ LI4 @EMI@
2
2
2
2
2
2
2
2
2
3 4 3 4
HDMI_PLL_GND
470_0402_5%
470_0402_5%
470_0402_5%
470_0402_5%
470_0402_5%
470_0402_5%
470_0402_5%
470_0402_5%
RI9 EMI@ RI10 EMI@
300_0402_5% 300_0402_5%
2 1 2 1
RI9 change value from "150_0402_5%" RI10 change value from "150_0402_5%"
1
+5VS HCM1012GH900BP_4P to "300_0402_5%" for EMI request HCM1012GH900BP_4P to "300_0402_5%" for EMI request
1
Jason 2019-06-14 Jason 2019-06-14

D QI1
2 2N7002K_SOT23-3
r
C C
G +5VS
S RI11 EMI@ RI12 EMI@
HDMI_TX_N2 1 2 HDMI_L_TX_N2 HDMI_TX_N1 1 2 HDMI_L_TX_N1
3
1
5.6_0402_1% 5.6_0402_1%
DI1
BAW56W_SOT323-3 ZZZ @
o
3
2
+5VS +5V_HDMI RO0000002HM
2
2
+3VS
RI14 RI15
W=20mils
2.2K_0402_5% 2.2K_0402_5% 2 1 ROYALTY HDMI W/LOGO
f
2
FI1 1
1
1
1.5A_6V_1206L150PR~D
G
1 6 HDMI_CTRL_CLK CI9
[6] CPU_DP1_CTRL_CLK
S
QI3B 0.1U_0402_10V7K
5
L2N7002DW1T1G_SC88-6 2
G
4 3 HDMI_CTRL_DAT
[6] CPU_DP1_CTRL_DATA
S
QI3A JHDMI1 CONN@

L2N7002DW1T1G_SC88-6 19
18 HP_DET
17 +5V
HDMI_CTRL_DAT 16 DDC/CEC_GND
B SDA B
HDMI_CTRL_CLK 15
SCL
y
14
13 Reserved
HDMI_L_CLKN 12 CEC
+3VS 11 CK-
HDMI_L_CLKP 10 CK_shield
CK+
l
HDMI_L_TX_N0 9
Main Func = VGA HDMI_L_TX_P0
8
7
D0-
D0_shield
D0+
1
HDMI_L_TX_N1
1M_0402_5%
6
JVGA1 CONN@ 5 D1-
HDMI_L_TX_P1 D1_shield
RI13
1 4 20
2 1 HDMI_L_TX_N2 3 D1+ GND 21
[6] CPU_DP2_P0 2 D2- GND
3 2 22
[6] CPU_DP2_N0
2
3 D2_shield GND
2
HDMI_L_TX_P2
G
4 1 23
4 D2+ GND
n
[6] CPU_DP2_P1
5
6 5 3 1 HDMI_HPD CONCR_099AKAC19NBLCNF
[6] CPU_DP2_N1 6 [6] CPU_DP1_HPD
7
D
[11] VGA_CBL_DET# 7 DC021702131
8
[6] CPU_DP2_AUXP 8
1
20K_0402_5%
9
[6] CPU_DP2_AUXN 9 QI2
10
10
RI16
11 2N7002KW_SOT323-3
[8,23,24,67] PCH_SMBDATA 11
12
[8,23,24,67] PCH_SMBCLK 12
13
2
[6] CPU_DP2_HPD 14 13
+3VS 14
15
16 15
A +5VS 16 A
O
17
18 GND17
GND18
+3VS ACES_51625-01601-001
2019/06/20
Compal Secret Data
2020/06/30 Title
VGA_CBL_DET# 2 1
R91 10K_0402_5%
HDMI L.Shifter/Conn
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
Main Function:
e l l D
Reserve r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
(RSVD)
5 4 3 2 1
5 4 3 2 1
e l l D
r D C
o
Main Func = Typec MUX
f
+1.8V_PRIM
RT13 1 @ 2 4.7K_0402_5% CFG_A1
RT14 1 @ 2 4.7K_0402_5% CFG_B1
RT15 1 @ 2 4.7K_0402_5% CFG_A2
CFG_B2
Ultra Low-Power Architecture +1.8V_PRIM
RT16 1 TYPEC@ 2 4.7K_0402_5%
– Active 100 mA
– U2/U3 1.3 mA TYPEC@
RT17 1 TYPEC@ 2 4.7K_0402_5% CFG_A1 – No Connection 300 μ A 1 2
y
CT11 4.7U_0402_6.3V6M
RT18 1 @ 2 4.7K_0402_5% CFG_B1 TYPEC@
1 2
RT19 1 TYPEC@ 2 4.7K_0402_5% CFG_A2 CT6 0.1U_0402_10V7K
RT20 1 @ 2 4.7K_0402_5% CFG_B2 TYPEC@
5
UT2
l
B B
VDD18
TYPEC@
CFG_A1 1 6 USB3_1_MTX_DRX_P4 CT7 1 2 0.1U_0402_10V7K
CNFG_A1 TX-CON_1+ USB3_1_MTX_C_DRX_P4 [43]
CFG_B1 4 7 USB3_1_MTX_DRX_N4 CT8 1 2 0.1U_0402_10V7K
CNFG_B1 TX-CON_1- USB3_1_MTX_C_DRX_N4 [43]
TYPEC@
2 9 USB3_2_MRX_DTX_P4 [43]
[43] USB3_1_MRX_DTX_P4 RX_CON_1+ RX-CON_2+
3 8 USB3_2_MRX_DTX_N4 [43]
[43] USB3_1_MRX_DTX_N4 RX_CON_1- RX-CON_2- TYPEC@
n
CFG_A2 13 12 USB3_2_MTX_DRX_P4 CT9 1 2 0.1U_0402_10V7K
CNFG_A2 TX_CON_2+ USB3_2_MTX_C_DRX_P4 [43]
CFG_B2 10 11 USB3_2_MTX_DRX_N4 CT10 1 2 0.1U_0402_10V7K
CNFG_B2 TX_CON_2- USB3_2_MTX_C_DRX_N4 [43]
TYPEC@
TYPEC@ TYPEC@
CT2 1 2 0.1U_0402_10V7K USB3_CTX_C_MRX_P4 14 17 USB3_CRX_C_MTX_N4 0.1U_0402_10V7K 2 1 CT4
[12] USB3_CTX_MRX_P4 TX_AP+ RX_AP- USB3_CRX_MTX_N4 [12]
SOC TX [12] USB3_CTX_MRX_N4
CT3 1 2 0.1U_0402_10V7K USB3_CTX_C_MRX_N4 15
TX_AP- RX_AP+
18 USB3_CRX_C_MTX_P4 0.1U_0402_10V7K 2 1 CT5
USB3_CRX_MTX_P4 [12]
SOC RX
TYPEC@ TYPEC@
SEL 16 19
SEL Thermal pad
+1.8V_PRIM TUSB542RWQR_X2QFN18_2X2P4
O
1
+3VALW RT12 TYPEC@

47K_0402_5%
1
TYPEC@ RT23 SEL

100K_0402_5%
3
QT1B TYPEC@
2
A L2N7002DW1T1G_SC88-6 A
5
4
6
QT1A TYPEC@
TPS25810_POL# 2
[50,58] TPS25810_POL#
1
2019/06/20
Compal Secret Data
2020/06/30 Title
Dual Role Mux/Power Switch
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
Main Func = USB2 Mux

+CCG_VBUS
l
+CCG_VBUS
2
l
TYPEC@ CT12
EU7 @ESD@
10U_0603_25V6M
1 L30ESD24VC3-2_SOT23-3
D
USB port optional D
1
e
1 @ 2 USB20_N4_RR
[12] USB20_N4
R57 0_0402_5%
1 @ 2 USB20_P4_RR
[12] USB20_P4
R58 0_0402_5%
1 2
R59 0_0402_5% +CCG_VBUS +CCG_VBUS
1 2
D
R60 0_0402_5%
JUSBC1
A1 B12
GND1 GND3
A2 B11
[42] USB3_1_MTX_C_DRX_P4 SSTXP1 SSRXP1 USB3_1_MRX_DTX_P4 [42]
A3 B10 USB3_1_MRX_DTX_N4 [42]
[42] USB3_1_MTX_C_DRX_N4 SSTXN1 SSRXN1
CT15 2 1 A4 B9 1 2 CT17
0.47U_0402_50V6K TYPEC@ VBUS1 VBUS3 TYPEC@ 0.47U_0402_50V6K
TYPEC_CC1 A5 B8
[50] TYPEC_CC1 CC1 SUB2
[12] USB20_N8 1 @ 2 USB20_N8_RR [38]
R61 0_0402_5% USB20_P4_R A6 B7 USB20_N4_R
USB20_N4_R A7 DP1 DN2 B6 USB20_P4_R
DN1 DP2
r
[12] USB20_P8 1 @ 2 USB20_P8_RR [38]
R62 0_0402_5% A8 B5 TYPEC_CC2
Bottom
SUB1 CC2 TYPEC_CC2 [50]
TOP
CT16 2 1 A9 B4 1 2 CT18
0.47U_0402_50V6K TYPEC@ VBUS2 VBUS4 TYPEC@ 0.47U_0402_50V6K
C A10 B3 USB3_2_MTX_C_DRX_N4 [42] C
[42] USB3_2_MRX_DTX_N4 A11 SSRXN2 SSTXN2 B2
[42] USB3_2_MRX_DTX_P4 SSRXP2 SSTXP2 USB3_2_MTX_C_DRX_P4 [42]
A12 B1
GND2 GND4
1 4
o
2 GND5 GND8 5
3 GND6 GND9 6
GND7 GND10
JAE_DX07S024JJ2R1300~D
CONN@
y f 1 @EMI@ 2
RT21
LT1
0_0402_5%
TYPEC@EMI@
USB20_P4_R
USB20_N4_R
TYPEC_CC1
TYPEC_CC2
2
USB20_N4_RR 3 4 USB20_N4_R
EU10 EU11
2
AZC199-02SPR7G_SOT23-3 AZC199-02SPR7G_SOT23-3
USB20_P4_RR 2 1 USB20_P4_R TYPEC@ESD@ TYPEC@ESD@
1
MCM1012B900F06BP_4P
l
1
1
B B
1 @EMI@ 2
RT22 0_0402_5%
n
EU8 EU9
USB3_1_MRX_DTX_P4 1 1 10 9
USB3_1_MRX_DTX_P4 USB3_2_MRX_DTX_N4 1 1 10 9
USB3_2_MRX_DTX_N4
USB3_1_MRX_DTX_N4 2 2 9 8 USB3_1_MRX_DTX_N4 USB3_2_MRX_DTX_P4 2 2 9 8 USB3_2_MRX_DTX_P4
USB3_1_MTX_C_DRX_P4 4 4 7 7
USB3_1_MTX_C_DRX_P4 USB3_2_MTX_C_DRX_N4 4 4 7 7 USB3_2_MTX_C_DRX_N4
USB3_1_MTX_C_DRX_N4 5 5 6 6
USB3_1_MTX_C_DRX_N4 USB3_2_MTX_C_DRX_P4 5 5 6 6 USB3_2_MTX_C_DRX_P4
3 3 3 3
8 8
S DIO(BR) AZ1045-04F.R7G DFN2510P10E ESD S DIO(BR) AZ1045-04F.R7G DFN2510P10E ESD

TYPEC@ESD@ TYPEC@ESD@
5
O 4 3
Compal Secret Data
Deciphered Date
2
2020/06/30 Title
Size
Date:
TYPE-C
Document Number
LA-G716P
1
Sheet 43 of 101
Rev
1.0
A
5 4 3 2 1
Main Function: TYPE-C_Port1 (1/2)
e l l D
Reserve r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
TYPE-C_Port1 (1/2)(RSVD)
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
e l l D
Reserve
r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
5 4 3 2 1
5 4 3 2 1
e l l D
Reserve r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
e l l D
Reserve r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
TYPE-C_Port2 (2/2)(RSVD
5 4 3 2 1
5 4 3 2 1
e l l D
Reserve r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
e l l D
Reserve r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
5 4 3 2 1
5 4 3 2 1
Main Function: TYPE-C_Power Path
D
Main Func = Power Switch
5V@3A
e l l D
C
+5VALW
1
TYPEC@
RT1 2
0_0603_5%
Close to Pin2,3,4
r D TPS25810_POL# 1 TYPEC@2
+3VALW
C
10U_0603_10V6M
22U_0603_6.3V6M
0.1U_0402_10V7K
47U_0603_6.3V6M
1 1
1
RT10 100K_0402_5%
TPS25810_UFP# 1 TYPEC@2
CT13 TYPEC@
CT14 TYPEC@
CT20 TYPEC@
CT1 TYPEC@
RT11 100K_0402_5%
2
2 2 +CCG_VBUS
UT1 TYPEC@
o
+5VALW_25810 2
IN1 OUT
14 W=120 mils
3 15
4 IN1 OUT
IN2 +3VALW
USB_OC3# [12]
5
f
High Active AUX
FAULTb
1
20
RT5 1 TYPEC@2 0_0201_5%
RT6 1 2 100K_0402_5%
6 LD_DETb TYPEC@
[58] TPS25810_EN EN
TYPEC@
20 mils
1
RT2 1 2 10K_0402_5% 7 11 TYPEC_CC1 [43]

TYPEC@ RT9 RT3 1 2 100K_0402_1% 8 CHG CC1 13
CHG_HI CC2 TYPEC_CC2 [43]
100K_0402_5% TYPEC@
B 16 RT7 1 TYPEC@2 100K_0402_5% B

2
RT4 1 2 100K_0402_1% 10 DEBUGb 17 RT8 1 TYPEC@2 100K_0402_5%

TYPEC@ REF AUDIOb 18 TPS25810_POL#
y
POLb TPS25810_UFP# TPS25810_POL# [42,58]
TPS25810_POL#(for Ti TPS25810)
19 TPS25810_UFP# [58] TPS25810_UFP#(for Ti TPS25810)
9 UFPb
12 GND1 21
GND2 powerpad
l
TPS25810RVCR_QFN20_4X3
WWW.AliSaler.Com
5
O n 4
Compal Secret Data
3 2
Title
Size
Date:
TYPE-C_Power Path(RSVD)
Document Number
LA-G716P
1
50 of 101
Rev
1.0
A
5 4 3 2 1
Main Func = LAN
l
Layout:
For RTL8111H-CG CL3: close to Pin8
* Place CL3,CL4,CL5,CL6 close to each VDD10 pin 8, 30, 3, 22 CL4: close to Pin30
For RTL8106E CL5: close to Pin3
CL2,RL1: * Place CL3,CL4 close to each VDD10 pin 8, 30 CL6: close to Pin22
Only for
RTL8111 LDO mode.
1000@
l
REGOUT RL1 1 2 0_0603_5% VDD10 40 mils
CL2
CL3
CL4
CL5
CL6
CL1
LANXIN_R
D
1 1 1 1 1
LAN CHIP 10/100/1000 UL1 1000@ 2
12P_0402_50V8J
1
YL1
RL2
1 EMI@ 2 LANXIN
33_0402_5% D
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
1 2
2 2 2 2 2 XTAL0 GND0
1000@
1000@
1000@
3 4
XTAL1 GND1
RTL8111H-CG_QFN32_4X4
RTL8111H-CG RTL8106E-CG
SA000080P00 CL7 25MHZ_10PF_7V25000014
LANXOUT_R 1 EMI@
e
2 1 2 LANXOUT
RL3 33_0402_5%
SA000080P00 SA000065Y00 UL1 100@ 12P_0402_50V8J
LDO mode LDO mode

+3VS
Layout:
For RTL8111H-CG 10/100/1000M 10/100M
* Place CL10 and CL11 and CL12 close to each VDD33 pin 11, 23 , 32 RTL8106E-CG_QFN32_4X4
For RTL8106E SA000065Y00
1
* Place CL11 and CL12 close to each VDD33 pin 23, 32 RL8
1K_0402_5%
+LAN_VDD33 VDDREG
CL8, CL9 close to UL1 Pin 17, 18
CL13, CL14 close to UL1 Pin 13, 14
2
UL1 @
40 mils 1 @ 2 ISOLATE#
RL4 0_0603_5% LAN_MDIP0 1 17 PCIE_CRX_C_DTX_P9 CL8 2 1 0.1U_0402_10V7K
LAN_MDIP1 MDIP0 HSOP PCIE_CRX_C_DTX_N9 PCIE_CRX_DTX_P9 [12]
CL10
CL11
CL12
4 18 CL9 2 1 0.1U_0402_10V7K PCIE_CRX_DTX_N9 [12]
LAN_MDIN0 MDIP1 HSON
1
2
D
1 1 1 LAN_MDIN1 MDIN0
CL12: close to Pin23 RL9 5
15K_0402_1% MDIN1 13 PCIE_CTX_C_DRX_P9 CL13 2 1 0.1U_0402_10V7K
CL10: close to Pin11 HSIP PCIE_CTX_C_DRX_N9 PCIE_CTX_DRX_P9 [12]
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
14 CL14 2 1 0.1U_0402_10V7K
2 2 CL11: close to Pin32 2 VDD10 8 HSIN PCIE_CTX_DRX_N9 [12]
2
AVDD10
1000@
VDD10 30
+LAN_VDD33 32 AVDD10 19
AVDD33 PERSTB PLTRST# [10,27,52,58,66,68]
VDDREG 23
DVDD33 20 ISOLATE#
15 ISOLATEB "PCIE_WAKE#" PU 1k on CPU side
[10] CLK_PCIE_P2 16 REFCLK_P 21
[10] CLK_PCIE_N2 REFCLK_N LANW AKEB PCIE_WAKE# [10,52,58,68]
C CLKREQ_PCIE#2_R C
[10] CLKREQ_PCIE#2 1 @ 2 12 26 LED1 RL6 2 @ 1 10K_0402_5% +LAN_VDD33
RL5 0_0201_5% LANXIN 28 CLKREQB GPO 1 @ 2
CKXTAL1 LOM_CABLE_DETECT [58]
LANXOUT 29 RL16 0_0201_5%
CKXTAL2 3 VDD10
NC LAN_MDIP2
r
+LAN_VDD33 TP53 27 6
TP54 25 LED0 NC 7 LAN_MDIN2
LED1 NC 9 LAN_MDIP3
2.49K_0402_1%~D 1 2 RL7 31 NC 10 LAN_MDIN3
RSET NC 11 +LAN_VDD33
1 1 NC
CL15 CL17 33 22 VDD10 CL16 1 2 1U_0201_6V3M
4.7U_0402_6.3V6M
@
4.7U_0402_6.3V6M
@
+LAN_VDD33 Rising time (10%~90%) need GND NC
NC
24 REGOUT
CL18 1 2 0.1U_0402_10V7K
MCT3
MCT2
2 2
>0.5mS and <100mS. RTL8106E-CG_QFN32_4X4
RTL8106E-CG_QFN32_4X4-S
MCT1
MCT0
1000@
1000@
Layout: JP5
o
CL15: close to Pin32
CL17: close to Pin11 Always Open
2
RL12
RL13
RL14
RL15
+3VALW +LAN_VDD33
CL20
75_0603_5%
75_0603_5%
75_0603_5%
75_0603_5%
JP5
1
2 1 SE00000UO00
Main Func = LAN LAN TransFormer 10/100M x2
f
W=40mils 2MM W=40mils 100EMI@
MCT
JP@
10P 2KV J NPO 1206 H1.25
CL20 1
TL2 1000@ SE00001OW00 CL20 @
+3VALW +LAN_VDD33 LAN_MDIN3 16 1 RJ45_MDIN3 33P 2KV J NPO 1206 H1
LAN_MDIP3 15
14
RX+
RX-
RD+
RD-
2
3 MCT3
RJ45_MDIP3
TL1 TOP, TL2 BOT @EMI@ 2
B RCT2 RCT1 B
UL2 13 4 33P 2KV J U2J 1206 H1
CL19 2 1 5 1 12 NC4 NC1 5
IN OUT +3VALW 11 NC3 NC2 6 MCT2 "SE00001OW00" change from
1U_0201_6.3V6M 2 LAN_MDIN2 10 TCT2 TCT1 7 RJ45_MDIN2 "1000EMI@" to "@EMI@"
GND LAN_MDIP2 TX+ TD+ RJ45_MDIP2 for reserve. Giga & 10/100
9 8 all used "SE00000UO00"
4 3 2 RL10 1 TX- TD-
[58] AUX_ON EN OC 10K_0402_5% NS681611H LAN Jason 2019-06-20
SY6288C20AAC_SOT23-5
High Active JLAN1 CONN@
2
12
y
RL11 GND 11
100K_0402_5% GND 10
TL1 GND 9
LAN_MDIP0 16 1 RJ45_MDIP0 RJ45_MDIP0 1 GND
1
LAN_MDIN0 15 RX+ RD+ 2 RJ45_MDIN0 PR1+

14 RX- RD- 3 MCT0 RJ45_MDIN0 2
13 RCT2 RCT1 4 PR1-
l
12 NC4 NC1 5 RJ45_MDIP1 3
11 NC3 NC2 6 MCT1 PR2+
LAN_MDIP1 TCT2 TCT1 RJ45_MDIP1 RJ45_MDIP2
LOM_TCT
10 7 4
LAN_MDIN1 9 TX+ TD+ 8 RJ45_MDIN1 PR3+
TX- TD- RJ45_MDIN2 5
NS681611H LAN PR3-
RJ45_MDIN1 6
PR2-
Layout note: RJ45_MDIP3 7
30 mil spacing between MDI differential pairs. PR4+
1.0V Source RL1 CL2 CL5 CL6 CL10 CL12 Layout note: RJ45_MDIN3 8
PR4-
1 30 mil spacing between MDI differential pairs.
n
CL21
0.01U_0402_16V7K SANTA_130460-N
2 DC021702130
RTL8111H-CG
LDO O O O O O X Main:
RTL8111G-CGT Follow Reference Schematic 0.01uF~0.4uF SP050006H00, S X'FORM_ NS0014 LF LAN
A
(71.08111.U03) 2nd: A
SP050006W00, S X'FORM_ HD-245 10/100 PC CARD LAN
RTL8106E-CG X X X X X O
(071.08106.0003) LDO
Title
Issued Date 2019/06/20 Deciphered Date 2020/06/30
O
LAN RTL8111/RTL8106
5 4 3 2 1
5 4 3 2 1
Main Func = WLAN E Key CONN
l
+3VS +3VALW_PCH +3.3V_WLAN
l
1 2 +3.3V_WLAN
RW1 0_0603_5%
D D
1A
1 @ 2
RW2 0_0603_5%
10U_0402_6.3V6M
0.1U_0402_10V7K
0.1U_0402_10V7K
10P_0402_50V8J
1 1 1 1
CW1
CW2 @
e
CW3
CW4 RF@
2 2 2 2
Change to "@" for DTC

Jason 2019-04-25
D
+3.3V_WLAN
JWLAN1
1 2
3 GND1 3.3V1 4
C [12] USB20_P10 USB_D+ 3.3V2 C
[12] USB20_N10 5 6
USB_D- LED1# TP51
7 8
9 GND2 PCM_CLK/I2S_SCK 10
[9] CNV_CRX_DTX_N1 SDIO_CLK PCM_SYNC/I2S_W S CNV_RF_RESET# [9]
11 12
[9] CNV_CRX_DTX_P1 13 SDIO_CMD PCM_IN/I2S_SD_IN 14 1.8V
r
SDIO_DAT0 PCM_OUT/I2S_SD_OUT CLKREQ_CNV# [9]
15 16
[9] CNV_CRX_DTX_N0 SDIO_DAT1 LED2# TP52
17 18
[9] CNV_CRX_DTX_P0 19 SDIO_DAT2 GND3 20
21 SDIO_DAT3 UART_W AKE# 22 CNV_BRI_CRX_DTX_R RW3 1 CNV@ 2 22_0402_5%
[9] CLK_CNV_CRX_DTX_N SDIO_W AKE# UART_RXD CNV_BRI_CRX_DTX [11]
[9] CLK_CNV_CRX_DTX_P 23
SDIO_RESET#
RW4 1 @ 2 0_0402_5%
HOST_DEBUG_TX [58]
32 CNV_RGI_CTX_DRX_R RW5 1 CNV@ 2 75_0402_5%
o
UART_TXD CNV_RGI_CRX_DTX_R CNV_RGI_CTX_DRX [11]
33 34 RW6 1 CNV@ 2 22_0402_5%
PCIE_CTX_C_DRX_P10 GND4 UART_CTS CNV_BRI_CTX_DRX_R CNV_RGI_CRX_DTX [11]
[12] PCIE_CTX_DRX_P10 0.1U_0402_10V7K CW5 1 2 35 36 RW7 1 CNV@ 2 75_0402_5%
PCIE_CTX_C_DRX_N10 PETp0 UART_RTS CNV_BRI_CTX_DRX [11]
[12] PCIE_CTX_DRX_N10 0.1U_0402_10V7K CW6 1 2 37 38
39 PETn0 VENDER_DEFINED1 40
[12] PCIE_CRX_DTX_P10
41
43
GND5
PERp0
VENDOR_DEFINED2
VENDOR_DEFINED3
42
44
RW5,RW7 close to CPU
f
[12] PCIE_CRX_DTX_N10 45 PERn0 COEX3 46
47 GND6 COEX2 48
[10] CLK_PCIE_P1 REFCLKP0 COEX1
[10] CLK_PCIE_N1
49 50
REFCLKN0 SUSCLK(32kHz) SUSCLK_WLAN [10]
B 51 52 B
CLKREQ_PCIE#1_R GND7 PERST0# BLUETOOTH_EN_R PLTRST# [10,27,51,58,66,68]
1 @ 2 53 54
[10] CLKREQ_PCIE#1 CLKREQ0# W_DISABLE2#
RW8 1 @ 2 0_0201_5% PCIE_WAKE#_R 55 56 WIFI_RF_EN_R
[10,51,58,68] PCIE_WAKE# PEW AKE0# W_DISABLE1#
RW10 0_0201_5% 57 58
59 GND8 I2C_DATA 60
[9] CNV_CTX_DRX_N1 RESERVED/PETp1 I2C_CLK
[9] CNV_CTX_DRX_P1
61 62
63 RESERVED/PETn1 ALERT# 64
GND9 RESERVED REFCLK_CNV [10]
[9] CNV_CTX_DRX_N0 65 66
67 RESERVED/PERp1 UIM_SW P/PERST1# 68 +3.3V_WLAN
[9] CNV_CTX_DRX_P0 RESERVED/PERn1UIM_POW ER_SNK/CLKREQ1#
69 70
GND10 UIM_POW ER_SRC/GPIO1/PEW AKE1#
y
[9] CLK_CNV_CTX_DRX_N
71 72
73 RESERVED/REFCLKP1 3.3V3 74
[9] CLK_CNV_CTX_DRX_P RESERVED/REFCLKN1 3.3V4
75
GND11 76 BLUETOOTH_EN_R 2 1
GND12 BLUETOOTH_EN [9]
77
GND13
l
DW1 @ RB751S40T1G_SOD523-2
CONN@ LOTES_APCI0136-P001A
WIFI_RF_EN_R 2 1
WIFI_RF_EN [9]
DW2 @ RB751S40T1G_SOD523-2
n
A A
2019/06/20
Compal Secret Data
2020/06/30 Title
NGFF_WLAN CONN
5 4 3 2 1
WWW.AliSaler.Com O
5 4 3 2 1
Main Function: WIGIG / WIDI
e l l D
Reserve r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
WIGIG / WIDI(RSVD)
5 4 3 2 1
5 4 3 2 1
Main Function:
e l l D
Reserve r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
(RSVD)
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
Main Function:
e l l D
Reserve r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
(RSVD)
5 4 3 2 1
5 4 3 2 1
Main Func = Audio EMI@, RF@, @EMI@, @ESD@, @RF@
moat
l
moat
+1.8V_PRIM +1.8V_AVDD
+5VS 2A
+5V_PVDD +5V_AVDD +5VS QA1
LN2306LT1G_SOT23-3
RA1 1 @ 2 0_0805_5% 2 @ 1 1 3 1 @ 2
S
DMIC_DATA
l
RA4 1 2 33_0402_5% RA3 0_0603_5% RA2 0_0402_5%
CA4 [38] DMIC_DATA_EDP
1 CA5 CA6 1 CA7 1 2
1
EMI@ CA1 CA2
G
2
DMIC_CLK
.1U_0402_16V7K
.1U_0402_16V7K
10U_0603_10V6M
10U_0603_10V6M
LA5 1 2 BLM15PX221SN1D_2P CA3
[38] DMIC_CLK_EDP
Place close to Pin 20 +3VS 10U_0402_6.3V6M
10U_0603_10V6M
2 2 2 1
CA4,LA5 place colse to UA1.3
.1U_0402_16V7K
1 1 Close pin33
CA8 CA9
10P_0402_50V8J 6.8P_0402_50V AUD_AGND
@RF@ @RF@
D 2 2 D
+1.8V_CPVDD
Layout Note: Layout Note: AUD_AGND
e
Close pin39 Close pin34
1 @ 2
RA5 0_0402_5%
2 1 CA11
.1U_0402_16V7K
CA10
+3VS 25mA
+3V_DVDD 10U_0402_6.3V6M
1 2
1 @ 2 Close pin29
RA6 0_0402_5%
2 1
CA12 CA13
+3V_DVDD +5V_PVDD +5V_AVDD
10U_0402_6.3V6M
.1U_0402_16V7K
1 2
Close pin8
+1.8V_AVDD
1 1 +1.8V_CPVDD
CA14 CA15
10U_0402_6.3V6M .1U_0402_16V7K
34
39
D
20
33
29
1
8
2 2 UA1
DVDD
CPVDD
DVDD-IO
PVDD1
PVDD2
AVDD1
AVDD2
+LINE1_VREFO_L
24 +MIC2-VREFO
HDA_BIT_CLK_R LINE1-VREFO-L
9 23
[9] HDA_SYNC_R 5 SYNC MIC2-VREFO 22 AUD_VREF 1 2
[9] HDA_BIT_CLK_R BIT-CLK VREF AUD_AGND +3VALW +RTC_CELL
4 28 CBN CA16 2.2U_0402_6.3V6M
[9] HDA_SDOUT_R HDA_SDIN0_R SDATA-OUT CBN
2
33_0402_5%
1 2 7 30 CBP 1 2
[9] HDA_SDIN0 SDATA-IN CBP moat
RA8
@EMI@
RA7 33_0402_5% CA17 1U_0603_16V7 RA9 1 @ 2 0_0402_5%

1 @ 2 10 16 V3D3_STB 1 2
RA10 0_0402_5% DMIC_DATA 2 DC_DET VD33STB RA11 0_0402_5%
DMIC_CLK GPIO0/DMIC-DATA12 10 mils 10 mils
1 @ 2 3 27 CPVEE 1 2
+3V_DVDD
1
RA12 100K_0402_5% 40 GPIO1/DMIC-CLK CPVEE CA18 1U_0603_16V7

[58] EC_MUTE# PDB
33P_0402_50V8J
1 2 Layout Note:
r
RA13 100K_0402_5% Width>40mil, to improve Headpohone Crosstalk noise
LDO1_CAP
2
CA20
@EMI@
AUD_AGND CA19 1 2 10U_0402_6.3V6M 21 Change it to sharp will be better.

CA21 1 2 10U_0402_6.3V6M LDO2_CAP 32 LDO1-CAP 13 RING2
LDO3_CAP LDO2-CAP MIC2-L/RING2
Add 2 vias (>0.5A) when trace layer change.
CA22 1 2 10U_0402_6.3V6M 6 14 SLEEVE
1
LDO3-CAP MIC2-R/SLEEVE 15 MIC_CAP 1 2

MIC2-CAP AUD_AGND
CA23 10U_0402_6.3V6M
C
AUD_SPK_L+ 35 C
AUD_SPK_L- 36 SPK-OUT-LP 18 LINE1_L
RA8,CA20: close to UA1.5 Layout Note: AUD_SPK_R- SPK-OUT-LN LINE1-L LINE1_R
Speaker trace width >40mil @ 2W4ohm speaker power 37 17
AUD_SPK_R+ 38 SPK-OUT-RN LINE1-R 11 AUD_PC_BEEP
SPK-OUT-RP PCBEEP 25 AUD_HP1_JACK_L moat
1 2 AUD_SENSE_A 12 HP-OUT-L 26 AUD_HP1_JACK_R
[56] JACK_PLUG RA14 200K_0402_1% HP/LINE1_JD1 HP-OUT-R
AUD_SENSE_A
+3V_DVDD RA15 2 1 100K_0402_5% Layout Note: Place close to Pin 12 19 1 2
AVSS1 31 RA16 1 20_0402_5%
o
AVSS2 41 RA17 1 20_0402_5%
1 THERMAL_PAD RA18 0_0402_5%
@ CA24 CA25 1 2 0.1U_0402_10V7K
moat .1U_0402_16V7K ALC3204-CG_MQFN40_5X5
2 EMI@
AUD_AGND
AUD_AGND
AUD_AGND
f
Layout Note:
Tied at point only under
Codec or near the Codec
Place on the moat between GND & GNDA.
DA3
Layout Note: [9] SPKR 2
Speaker trace width >40mil @ 2W4ohm speaker power Speaker AUD_PC_BEEP_C AUD_PC_BEEP
1 1 2 1 2
CONN Pin Net name RA23 1K_0402_5% CA32 0.1U_0402_16V7K
JSPK1 [58] BEEP 3
AUD_SPK_R+ RA19 1 EMI@ 2 BLM15PD800SN1D_2P AUD_SPK_R+_C 1
AUD_SPK_R- AUD_SPK_R-_C 1 Pin1 SPK_R+
1
RA20 1 EMI@ 2 BLM15PD800SN1D_2P 2 BAT54C_SOT23-3~D
AUD_SPK_L+ RA21 1 EMI@ 2 BLM15PD800SN1D_2P AUD_SPK_L+_C 3 2
AUD_SPK_L- AUD_SPK_L-_C 3 Pin2 SPK_R-
RA22 1 EMI@ 2 BLM15PD800SN1D_2P 4 RA24
y
5 4 10K_0402_5%
G1 Pin3 SPK_L+
6
2
G2
Pin4 SPK_L-
ACES_50224-00401-001
3
CONN@
SP02000GC10
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
1 1 1 1
EMI@ CA31
EMI@ CA28
EMI@ CA29
EMI@ CA30
L03ESDL5V0CC3-2_SOT23-3
l
B B
DA1
DA2
2 2 2 2
@ESD@
@ESD@
CLOSE TO JHP1
1
HPOUT_R
HPOUT_L
JACK_PLUG
JACK_PLUG_DET
n
Universal Jack
(Global Headset Jack + mic phone in + line in support)
3
2
ESD@
DA6
@ESD@
DA7
JHP1 CONN@
SLEEVE_R 3
HPOUT_L 1 G/M
L/R
Main Func = Audio Jack
Universal Jack [56] JACK_PLUG
JACK_PLUG 5
5
(Global Headset Jack + mic phone in + line in support) JACK_PLUG_DET 6
1
6
HPOUT_R 2
R/L
RING2_R 4
7 M/G
GND
RA25 1 2 2.2K_0402_5% YUQIU_PJ753-F07J1BE-B
+MIC2-VREFO
2
10K_0402_5%
RA33
10K_0402_5%
RA34
1 1 1 1 1 1 DC021512140
JACK_PLUG_DET
100P_0402_50V8J
CA35 EMI@
100P_0402_50V8J
CA36 EMI@
680P_0402_50V8J
CA37 ESD@
680P_0402_50V8J
CA38 ESD@
ESD@
AZ5123-02S.R7G_SOT23-3
DA5
680P_0402_50V8J
CA39 @ESD@
680P_0402_50V8J
CA40 @ESD@
RA26 1 2 2.2K_0402_5% AUD_AGND
O
@ @
RING2 LA1 1 ESD@ 2 BLM15PX330SN1D_2P RING2_R 10 mils
AUD_HP1_JACK_L RA27 1 2 10_0402_1% AUD_HP1_JACK_L1 LA2 1 ESD@ 2 BLM15PX330SN1D_2P HPOUT_L 1 2 2 2 2 2 2
2
LINE1_L 1 2 LINE1-L_C
DA4 RA28 1 2 1K_0402_5% RA35
2 CA33 10U_0603_10V6M RA29 1 2 4.7K_0402_5% @ 0_0201_5%
1 AUD_HP1_JACK_R RA30 1 2 10_0402_1% AUD_HP1_JACK_R1 LA3 1 ESD@ 2 BLM15PX330SN1D_2P HPOUT_R
+LINE1_VREFO_L
2
1
LINE1_R 1 2 LINE1-L_R RA31 1 2 1K_0402_5% LA4 1 ESD@ 2 BLM15PX330SN1D_2P SLEEVE_R
3 CA34 10U_0603_10V6M RA32 1 2 4.7K_0402_5%
BAT54ATB_SOT-523-3 SLEEVE
AUD_AGND
AUD_AGND AUD_AGND AUD_AGND AUD_AGND
A A
Layout Note:
Close to UA1

Issued Date 2019/06/20 2020/06/30 Title
Deciphered Date
WWW.AliSaler.Com THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Audio Codec ALC3204
Size Document Number Re v
5 4 3 2 1
5 4 3 2 1
Main Function:
e l l D
Reserve r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
(RSVD)
5 4 3 2 1
5 4 3 2 1
1.8V or 3.3V I/O Pins RE3 SBDR@ RE3 NBDR@ RE1 EC@ +3VALW_EC +3VALW_EC
Main Func = EC ‧ GPI O061/ LPCPD#/ ESPI _ RESET#
‧ VT R_33_18
SD034100280
SD034178280
10K_0402_1%
17.8K_0402_1% Model ID Board ID
1
‧ GPI O063/ SER_I RQ/ ESPI _ ALERT# SD034270280 27K_0402_1%
‧ GPI O064/ L RESET#
l
SD034374280 37.4K_0402_1% RE3 RE1
‧ GPI O034/ PCI _ CL K/ ESPI _ CL K SD034499280 49.9K_0402_1% Ra 100K_0402_1% Ra 100K_0402_1%
+3VALW_EC ‧ GPI O044/ LF RAME#/ ESPI _ CS#
‧ GPI O040/ LAD0/ ESPI _I O0 49.9K_0402_1% 82.5K_0402_1% 64.9K_0402_1% SD034649280 64.9K_0402_1% @ @
‧ GPI O041/ LAD1/ ESPI _I O1 SD000002780 82.5K_0402_1%
2
SD034107380 107K_0402_1% MODEL_ID BOARD_ID
+3VALW 1 2
‧ GPI O042/ LAD2/ ESPI _I O2 SD034499280 SD000002780 SD034649280
+3VALW @ ‧ GPI O043/ LAD3/ ESPI _I O3 SD034154380 154K_0402_1%
RE5 0_0603_5% ‧ GPI O067/ CL KRUN# SD034200380 200K_0402_1% 1 1
2
10U_0402_6.3V6M
0.1U_0402_10V7K
1000P_0402_50V7K
@ CE3
l
1000P_0402_50V7K
@ CE4
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
CE10
0.1U_0402_10V7K
CE11
1 1 2 2 1 1 1 1 1
1 2 KSI0 Rb RE4 Rb
CE1
CE2
CE5
CE6
CE7
CE8
CE9
RE66 1 2 10K_0201_5% KSI1 100K_0402_1% RE2
RE67 1 2 10K_0201_5% KSI2 UE1 EC@ RE3 for RE1 for 2 2 100K_0402_1%
RE68 1 2 10K_0201_5% KSI3 2 2 1 1 2 2 2 2 2
Model ID Select Board ID Select
1
RE69 10K_0201_5%
EC Chip CPN SBDR-UMA 10.0K EVT 10.0K
NBDR-UMA 27.0K DVT1 17.8K
D D
1 2 KSI7 SBDR-DSC 49.9K DVT2 37.4K
RE70 1 2 10K_0201_5% KSI6 MEC1418-NU-D0 VTQFP 128P NBDR-DSC 82.5K Pilot 64.9K EC_AGND EC_AGND
RE71 1 2 10K_0201_5% KSI5 SA0000CEW00
e
RE72 1 2 10K_0201_5% KSI4
RE73 10K_0201_5%
+3VALW_EC +1.8V_PRIM +1.8VALW_EC +3VALW_EC
1 2 KSO0 1 @ 2 +RTC_CELL_VBAT 1 2
RE74 1 2 100K_0201_5% KSO1 +RTC_CELL RE6 0_0603_5% RE7 0_0603_5% PBAT_CHG_SMBDAT 1 2
1
RE75 1 2 100K_0201_5% KSO2 RE8 4.7K_0402_5%
RE76 1 2 100K_0201_5% KSO3 CE12 PECI_EC PBAT_CHG_SMBCLK 1 2
PECI_EC [6]
RE77 100K_0201_5% 0.1U_0402_10V7K RE9 4.7K_0402_5%
1
2 SML1_SMBDATA 1 @ 2
122
103
RE10 2.2K_0402_5%
43
82
19
65
5
1 2 KSO4 UE1 CE13 SML1_SMBCLK 1 @ 2
RE78 1 2 100K_0201_5% KSO5 54 1 2 DE1 RE11 2.2K_0402_5%
VBAT
VTR
VTR
VTR
VTR
VTR
VTR
RE79 1 2 100K_0201_5% KSO6 VTR_33_18 AZ5125-01H.R7G_SOD523-2 TP_WAKE_KBC# 1 2
RE80 1 2 100K_0201_5% KSO7 0.1U_0402_10V7K @ RE12 100K_0402_5%
RE81 100K_0201_5% KSO0 2 SSD_SCP# 1 2
KSO1 14 GPIO027/KSO00/PVT_IO1 8 PBAT_CHG_SMBDAT RE60 100K_0402_5%
2
GPIO015/KSO01/PVT_CS# GPIO007/SMB01_DATA/SMB01_DATA18 PBAT_CHG_SMBCLK PBAT_CHG_SMBDAT [83,84]
D
KSO2 15 9
1 2 16 GPIO016/KSO02/PVT_SCLK GPIO010/SMB01_CLK/SMB01_CLK18 11 SML1_SMBDATA PBAT_CHG_SMBCLK [83,84]
KSO10 KSO3
GPIO017/KSO03/PVT_IO0 GPIO012/SMB02_DATA/SMB02_DATA18 SML1_SMBCLK SML1_SMBDATA [8,28,66]
RE82 1 2 100K_0201_5% KSO11 KSO4 37 12
GPIO045/BCM_INT1#/KSO04 GPIO013/SMB02_CLK/SMB02_CLK18 SML1_SMBCLK [8,28,66]
RE83 1 2 100K_0201_5% KSO12 KSO5 38 89
GPIO046/BCM_DAT1/KSO05 GPIO130/SMB03_DATA/SMB03_DATA18 TPS25810_EN [50]
RE84 1 2 100K_0201_5% KSO13
[63] KSI[0..7]
KSO6 39 91
50 GPIO047/BCM_CLK1/KSO06 GPIO131/SMB03_CLK/SMB03_CLK18 96 TPS25810_POL# [42,50]
RE85 100K_0201_5% KSO7
KSO8 46 GPIO025/KSO07/PVT_IO2 GPIO141/SMB04_DATA/SMB04_DATA18 97
[63] KSO[0..16] 68 GPIO055/PWM2/KSO08/PVT_IO3 GPIO142/SMB04_CLK/SMB04_CLK18
KSO9
1 2 KSO8 KSO10 72 GPIO102/KSO09[CR_STRAP] 40 FAN1_TACH +3VS
GPIO106/KSO10 GPIO050/TACH0 FAN1_TACH [77]
RE86 1 2 100K_0201_5% KSO15 KSO11 74 41
GPIO110/KSO11 GPIO051/TACH1 LOM_CABLE_DETECT [51]
RE87 1 2 100K_0201_5% KSO14 KSO12 75
RE88 1 2 100K_0201_5% KSO16 KSO13 76 GPIO111/KSO12 44 FAN1_TACH 1 2
RE89 100K_0201_5% KSO14 77 GPIO112/PS2_CLK1A/KSO13 MEC1416 GPIO053/PWM0 45 KB_LED_PWM [63]
+RTC_CELL RE16 10K_0402_5%
KSO15 86 GPIO113/PS2_DAT1A/KSO14 GPIO054/PWM1 BEEP [56] FAN1_PWM 1 2
GPIO125/KSO15 FAN1_PWM
r
2 1 KSO9 KSO16 92 47 RE17 10K_0402_5%
GPIO132/KSO16 GPIO056/PWM3 FAN1_PWM [77]
1
100K_0402_5%
RE18 100K_0402_5% 93 34
USB_EN# [63] CAP_LED# GPIO140/KSO17 GPIO030/BCM_INT0#/PWM4
RE20
2 1 35
98 GPIO031/BCM_DAT0/PWM5 36 LANWAKE# [10]
RE19 100K_0402_5% KSI0
2 1 BAT1_LED# KSI1 99 GPIO143/KSI0/DTR# GPIO032/BCM_CLK0/PWM6 4 PCIE_WAKE# PS_ID [82]
6 GPIO144/KSI1/DCD# GPIO002/PWM7 PCIE_WAKE# [10,51,52,68] SYS_PWROK 1 2
C RE21 100K_0402_5% KSI2 C
2
2 1 BAT2_LED# KSI3 7 GPIO005/SMB00_DATA/SMB00_DATA18/KSI2 1 BAT2_LED# RE22 10K_0402_5%
104 GPIO006/SMB00_CLK/SMB00_CLK18/KSI3 GPIO157/LED0/TST_CLK_OUT 106 BAT1_LED# BAT2_LED# [63] POWER_SW_IN# 1 2 RESET_OUT# 1 2
RE23 100K_0402_5% KSI4
1 2 VCCDSW_EN 105 GPIO147/KSI4/DSR# GPIO156/LED1 70 BAT1_LED# [63] POWER_SW#_MB [77]
KSI5 RE25 100_0402_5% RE24 10K_0402_5%
RE58 100K_0402_5% KSI6 107 GPIO150/KSI5/RI# GPIO104/LED2 PCH_RSMRST# 1 2
GPIO151/KSI6/RTS#
2.2U_0402_6.3V6M
KSI7 108 80 RE26 10K_0402_5%
GPIO152/KSI7/CTS# GPIO116/TFDP_DATA/UART_RX 81 HOST_DEBUG_TX ME_FWP [9]
GPIO117/TFDP_CLK/UART_TX HOST_DEBUG_TX [52] 1
o
CE14
78
[63] CLK_TP_SIO 79 GPIO114/PS2_CLK0 90
[63] DAT_TP_SIO 52 GPIO115/PS2_DAT0 GPIO035/SB-TSI_CLK 94 H_PECI PTP_DIS#
1 2 [63] PECI_EC
[10] SIO_PWRBTN# VCCDSW_EN 88 GPIO026/PS2_CLK1B GPIO033/PECI_DAT/SB_TSI_DAT 2
RE27 43_0402_1%
[78] VCCDSW_EN GPIO127/PS2_DAT1B 95 VREF_CPU
ESPI_IO0_R VREF_CPU +1.05V_PRIM
59 1 2
[8] ESPI_IO0_R ESPI_IO1_R 60 GPIO040/LAD0/ESPI_IO0 101 ICSP_CLK CE15 0.1U_0402_10V7K
[8] ESPI_IO1_R ESPI_IO2_R 61 GPIO041/LAD1/ESPI_IO1 GPIO145(ICSP_CLOCK) 102 ICSP_DAT
+3VALW
[8] ESPI_IO2_R ESPI_IO3_R GPIO042/LAD2/ESPI_IO2 GPIO146(ICSP_DATA) ICSP_CLR
f
62 87
[8] ESPI_IO3_R ESPI_CS# 58 GPIO043/LAD3/ESPI_IO3 ICSP_MCLR
[8] ESPI_CS# GPIO044/LFRAME#/ESPI_CS#
1
NB_MUTE#
100K_0402_5%
56 119 RE29 1 @ 2 0_0201_5%

[63] MASK_SATA_LED# 57 GPIO064/LRESET# BGPO/GPIO004 120 SYSPWR_PRES EC_MUTE# [56] 1 2
[8] ESPI_CLK_R GPIO034/PCI_CLK/ESPI_CLK SYSPWR_PRES/GPIO003 +3VLP
RE28
63 121 RE30 1K_0402_5%

SYS_LED_MASK# GPIO067/CLKRUN# VCI_OUT/GPIO036 VCI_IN1# ALWON [85] 1
RE95 2 @ 1 0_0402_5% 55 126 2
+RTC_CELL
[63] MASK_BASE_LEDS# 10 GPIO063/SER_IRQ/ESPI_ALERT# VCI_IN1#/GPIO162 127 POWER_SW_IN# RE31 100K_0402_5%
2
[28] GPU_PWR_LEVEL GPIO011/nSMI/nEMI_INT VCI_IN0#/GPIO163
1
HW_ACAV_IN
100K_0402_5%
49 128
LID_CL_SIO# [63] TP_EN# 53 GPIO060/KBRST VCI_OVRD_IN/GPIO164 HW_ACAV_IN [82,84]
[8] ESPI_RST# LID_CL_SIO# GPIO061/LPCPD#/ESPI_RESET#
RE32
66 23 +3VALW_EC
[38,77] LID_CL_SIO# GPIO100/nEC_SCI GPIO160/DAC_0 PLT_RST_VGA# [27]
0.047U_0402_16V4Z
24
32 GPIO161/DAC_1 22 +3VALW_EC
2
[50] TPS25810_UFP# GPIO126/SHD_SCLK DAC_VREF
1
+3VALW_EC
CE16
0.1U_0402_10V7K
28 1
[10] SYS_PWROK 29 GPIO133/SHD_IO0 85 CMP_VOUT0
@
[82,83,84] PBAT_PRES# GPIO134/SHD_IO1 GPIO124/CMP_VOUT0 CMP_VOUT0 [85]
1
CMP_VIN0
CE17
1 30 20 1 @ 2
2
[87] PRIM_PWRGD GPIO135/SHD_IO2 GPIO020/CMP_VIN0 VCIN0_PH [66]
1
31 25 VCREF0 RE34 0_0201_5% RE36
CE18 [66] RTCRST_ON PCH_RSMRST# 27 GPIO136/SHD_IO3 GPIO165/CMP_VREF0 2 RE35 100K_0402_5%
[10] PCH_RSMRST# GPIO123/SHD_CS#[BSS_STRAP] 83
100P_0402_50V8J PROCHOT 10K_0402_1%
2 GPIO120/CMP_VOUT1 SSD_SCP#
y
[6]
67 21
BKLT_IN_EC
2
69 GPIO101/SPI_CLK GPIO021/CMP_VIN1 26 SSD_SCP# [67,68] CMP_VIN0 1 2 CMP_VOUT0
@
2
ESPI_CLK_R [84] AC_DIS 71 GPIO103/SPI_IO0 GPIO166/CMP_VREF1/UART_CLK LCD_TST [38]
VCREF0 RE38 100K_0402_5%
GPIO105/SPI_IO1 CMP_STRAP0
0.1U_0402_10V7K
[66]
42 118 RE94 1 2 10K_0402_5%
FPR_SCAN# GPIO052/SPI_IO2 GPIO024/ADC7 +3VALW_EC
1
TP_WAKE_KBC# 33 117
[6,63] TP_WAKE_KBC# GPIO062/SPI_IO3 GPIO023/ADC6/A20M PANEL_BKEN_EC [38] 1
3 116 RE40
[51] AUX_ON GPIO001/SPI_CS#/32KHZ_OUT GPIO022/ADC5 SIO_EXT_WAKE# [11]
2
MODEL_ID
33_0402_5%
CE19
109 10K_0402_1%
l
B USB_EN# GPIO153/ADC4 I_ADP B
RE39
@EMI@
13 110
[71,73] USB_EN# nRESET_IN/GPIO014 GPIO154/ADC3 BOARD_ID 2
[78] ALL_SYS_PWRGD RE41 1 @ 2 0_0201_5% RUNPWROK 48 111
2
RESET_OUT# GPIO057/VCC_PWRGD GPIO155/ADC2
VSS_VBAT
73 113
[10] RESET_OUT# GPIO107/nRESET_OUT GPIO122/ADC1 I_BATT LCD_VCC_TEST_EN [38]
VR_CAP
114
1
RE42 2 1 0_0402_5% MEC_XTAL2 125 GPIO121/ADC0 115

AVSS
[10] SUSCLK_EC @ +3VALW_EC

XTAL2 ADC_VREF
VSS
VSS
VSS
VSS
VSS
MEC_XTAL1 RE43 2 MEC_XTAL1_R

33P_0402_50V8J
@ 1 0_0402_5% 123
XTAL1
0.1U_0402_10V7K
2
CE20
@EMI@
@ 1
124
84
51
17
64
100
EC_AGND 112
18
MEC1416-NU-D0_VTQFP128_14X14
CE21
+3VS
1
2
1
n
CE22
Close to UE1.57 UE2 change CPN &
Description only
0.1U_0402_10V7K 32 KHz Clock VR_CAP 1 2
Jason 2019-04-26 2 1 @ 2 EC_AGND
YE1 RE44 0_0603_5% CE23 1U_0402_16V6K
5
UE2 MEC_XTAL1 1 2 MEC_XTAL2

NL17SZ06EDFT2G_SOT-353 VCC
Close UE1
4 OUT Y 2 PROCHOT
ESR <100m ohms
INA 32.768KHZ_9PF_X1A000141000200
[6,82,84,88] H_PROCHOT#
1 20ppm / 9pF 1 Close UE1
GND
2
NC ESR <50kohm (MAX) EC_AGND

RE45 CE25 CE27 I_ADP 1 RE46 2
1
1
I_ADP_R [84]
100K_0402_5% 12P_0402_50V8J 12P_0402_50V8J 1 300_0402_5%
CE24 2 2
47P_0402_50V8J CE26
1
2
2200P_0402_25V7K
2
EMI@
FAN1_TACH 1 2
O
EC_AGND CE28 56P_0402_50V
CE28 change to POP and change value
+3VALW_EC from "220P_0402_50V" to "56P_0402_50V"
for EMI request Jason 2019-06-14
+3VALW_EC
Debug Connector
1
I_BATT
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
1 RE47 2
I_BATT_R [84]
RE48 300_0402_5% @
RESET_OUT#
RE90
RE91
RE92
RE93
+3VALW_EC 49.9_0402_1% 1 2
1
1
1
10K_0402_5%
100K_0402_5%
10K_0402_5%
10K_0402_5%
A CE30 1000P_0402_50V7K A
@ RE50
@ RE52
JDEG1 CONN@ CE31

2
HW_ACAV_IN
RE49
RE51
JESPI1 CONN@ 1 2200P_0402_25V7K 2 1

1 1 2 JTAG_TDI RE53 1 @ 2 0_0201_5% ICSP_CLK 2 CE32 100P_0402_50V8J
1 2 2 3 JTAG_TMS RE54 1 @ 2 0_0201_5% ICSP_CLR
2
2 3 ESPI_IO0_R 3 4 JTAG_CLK
3 4 ESPI_IO1_R 4 5 JTAG_TDO 1 2 0_0201_5% ICSP_DAT Close to UE1 each pin
RE55 @ EC_AGND
4 5 ESPI_IO2_R 5 6 MSCLK
5 6 ESPI_IO3_R 6 7 MSDATA
6 7 ESPI_CS# 7 8 HOST_DEBUG_TX
7 8 2 @ 1 11 8 9
11 8 9 PLTRST# [10,27,51,52,66,68] 12 GND 9 10
RE65 0_0201_5%
GND 9 10 GND 10 Security Classification Compal Secret Data Compal Electronics, Inc.
1
12 ESPI_CLK_R Pin8 5085_TXD for EC Debug

GND 10 JXT_FP241AH-010GAAM pin9 5048_TXD for SBIOS RE57
debug Issued Date 2019/06/20 Deciphered Date 2020/06/30 Title
JXT_FP241AH-010GAAM 10K_0402_5%
SP010021O00
SP010021O00
EC MEC1418
Size Document Number Rev
WWW.AliSaler.Com
2
5 4 3 2 1
5 4 3 2 1
Main Function:
e l l D
Reserve r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
(RSVD)
5 4 3 2 1
5 4 3 2 1
Main Function:
e l l D
Reserve r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
(RSVD)
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
Main Function:SMB/I2C Block Diagrams
D
WHL-U
SMBCLK
SMBDATA
SML0CLK
SML0DATA
CK14 MEM_SMBCLK
CH15 MEM_SMBDATA
CH14 SML0_SMBCLK
CF15 SML0_SMBDATA
1k ohm
1k ohm
1k ohm
1k ohm
1k ohm
+3VALW_PCH
+3VALW_PCH
DMN66D
+3VALW_PCH
DIS@
4.7k ohm
DIS@
PCH_SMBCLK
PCH_SMBDAT
+3VGS
2.2k ohm
2.2k ohm +3VS
PCH_SMBCLK
PCH_SMBDATA
PCH_SMBCLK
PCH_SMBDATA
PCH_SMBCLK
253
254
253
254
4
SCL
SDA
SCL
SDA
SCL
DIMMA
DIMMB
FFS
DDR4
DDR4
SMBus Address: 000
SMBus Address: 010
e l l D
D
1k ohm 4.7k ohm PCH_SMBDATA SDA LNG2DM
SMBus Address: 0101001b
CN15 SML1_SMBCLK U7
SML1CLK VGA_SMB_CK3 SMBCLK
12
CM15 SML1_SMBDATA DMN66D U8 dGPU PCH_SMBCLK SCL
SML1DATA VGA_SMB_DA3 R520/R530 VGA
SMBDATA 11
PCH_SMBDATA SDA
SMBus Address: 0x41 / 0x41
r
CN11 CM11
I2C_0_SDA
C C
I2C_0_SCL
o
2.2k ohm @ 2.2k ohm
+3VALW_EC 2.2k ohm @ 2.2k ohm +3VS

8
SML1_SMBCLK SML1_SMBCLK THM_SML1_CLK SCL Thermal
f
DMN66D 7 NCT7718W
SML1_SMBDATA SML1_SMBDATA THM_SML1_DATA SDA
SMBus Address: 1001100xb (x is R/W bit)
12 11
SMB02_CLK SMB02_DATA 4.7k ohm 2.2k ohm
4.7k ohm +3VS 2.2k ohm +TP_VDD
y
KBC I2C_0_SCL
DMN66D
I2C_0_SCL_R
7
MEC 1416 I2C_0_SDA I2C_0_SDA_R
TP CONN
1
l
B 4.7k ohm CLK_TP_SIO B
2
+TP_VDD DAT_TP_SIO
4.7k ohm
78
PS2_CLK0 CLK_TP_SIO
79
n
PS2_DAT0 DAT_TP_SIO
4.7k ohm
4.7k ohm +3VALW_EC
9 100 ohm 4
SMB01_CLK PBAT_CHG_SMBCLK CLK_SMB SCL
SMB01_DATA 8 100 ohm 5 BATT CONN
PBAT_CHG_SMBDAT DAT_SMB SDA
O
0 ohm 3
SDA
0 ohm 4 Charger
SCL ISL88739
SMBus Address: 1001100 (R/W#)
A A
2019/06/20
Compal Secret Data
2020/06/30 Title
SMB/I2C Block Diagrams
1.0
5 4 3 2 1
5 4 3 2 1
Main Function:
e l l D
Reserve r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
(RSVD)
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
Main Func = KB Main Func = TPAD

[58] KSI[0..7]
Keyboard Backlight (N3 only)
+TP_VDD +3VS
l
KB Backlight Power Consumption: 285mA max.
[58] KSO[0..16] +5VS Q5 change CPN &
F3 KBBL@ +5V_KB_BL
Description only
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
1
1
2 1 Jason 2019-06-14
+3VALW +TP_VDD
R34
R35
R36
R37
JKB1 CONN@ 1
1 0.5A_13.2V_MF-NSMF050-2 KBBL@ +TP_VDD Discharge
l
[11] KB_DET# KSI7 2 1 C22
KSI6 3 2 .1U_0402_16V7K Q5
2
KSI4 4 3 2 LP2301ALT1G_1P_SOT-23-3 +TP_VDD
KSI2 5 4 DAT_TP_SIO
5 [58] DAT_TP_SIO
D
KSI5 6 3 1 2 1
KSI1 7 6
7
KBBL@ JKBBL1 EC/PS2 [58] CLK_TP_SIO
CLK_TP_SIO
1 R39
KSI3 8 R38 1 100_0402_5%
KSI0 9 8 1 2 KB_LED_DET_C 2 1 I2C_0_SDA C23
G
[11] I2C_0_SDA
2
[9] KB_LED_BL_DET
1
D KSO5 10 9 51K_0402_5% 3 2 5 .1U_0402_16V7K D
PCH/I2C
1
KSO4 11 10 KB_BL_CTRL# 4 3 G1 6 I2C_0_SCL 2 D Q6
11 4 G2 [11] I2C_0_SCL
KSO7 12 [58] TP_EN#
1 2 2 2N7002K_SOT23-3
12
e
@ESD@ C24
@ESD@ C25
KSO6 13 R40 ACES_51575-00401-001 R41 20K_0402_5% G
13
10P_0402_50V8J
10P_0402_50V8J
KSO8 14 100K_0402_5% CONN@ S
KSO3 15 14
3
1
1
KSO1 16 15
KSO2 17 16
KSO0 18 17
2
KSO12 19 18
1
KSO16 20 19 D Q7 +TP_VDD +TP_VDD
KSO15 21 20 2 KBBL@
KSO13 22 21 [58] KB_LED_PW M G
1
KSO14 23 22
S
3
KSO9 24 23 LN2306LT1G_SOT23-3 R42
KSO11 25 24
25 ESD depop locat i on 10K_0402_5%
KSO10 26
2
CAP_LED 27 26
2
28 27
29 28 31 1 3 INT_TP#
30 29GND31 32 [6,58] TP_W AKE_KBC#
S
30GND32
D
HEFEN_AFB02-S30F1A-HF Q8 LN2306LT1G_SOT23-3
SP021707030 +TP_VDD
+3VS
1
R43 Change to "@" for DTC +TP_VDD
2.2K_0402_5% Jason 2019-04-25
@ CONN@
2
2 1 SP01001A900
2
Q10B 0.1U_0402_16V7K C26 ACES_51524-0080N-001
G
I2C_0_SCL 1 6 I2C_0_SCL_R +TP_VDD
8
D
L2N7002DW 1T1G_SC88-6
r
1
1 2 I2C_0_SDA_R 7 8 10
R45 R46 100K_0402_5% I2C_0_SCL_R 6 7 G2 9
+3VS 2.2K_0402_5% 5 6 G1
5
Q10A D5 INT_TP# 4 5
1 2 TP_LOCK# 3 4
G
[58] PTP_DIS#
2
C I2C_0_SDA 4 3 I2C_0_SDA_R DAT_TP_SIO 2 3 C
+5VS CLK_TP_SIO 1 2
D
L2N7002DW 1T1G_SC88-6 RB551V-30_SOD323-2
1
1
R47 JTP1
100K_0402_5%
CAP LED Control
3
LOW actived from KBC GPIO

2
2
G
o
R2
3 1 CAP_LED_R# 2 Q12
[58] CAP_LED# DDTA144VCA-7-F_SOT23-3
S
R1
Q9
LN2306LT1G_SOT23-3
1
f
R48
CAP_LED_Q 1 2 CAP_LED
1K_0402_5%
Main Func = Battery LED BJT

+3VALW
R1: 47 K
Low actived from KBC GPIO R2: 10 K
1
+5VALW
y
R89
100K_0402_5%
2
LED1
1 2 1 2
+1.8V_PRIM
3
W HITE_LED_BAT
l
B R26 @ 10K_0402_5% RC158 10K_0402_5% 2 1 2 1 B
2
R27 200_0402_5% W
R2
1 6 CHG_AMBER_LED_R# 2 Q2 AMBER_LED_BAT 2 1 4 3
[58] BAT1_LED#
DDTA144VCA-7-F_SOT23-3 R28 200_0402_5% Y
[58] MASK_SATA_LED# R1
Q15A
L2N7002DW 1T1G_SC88-6 LTW -295DSKS-5A_YEL-W HITE~D
2
G
[58] MASK_BASE_LEDS#
1
SATA_LED#_R 3 1 BATT_W HITE_LED_R#

3
S
AMBER_LED_BAT
R2
n
Q3 4 3 BATT_W HITE_LED_R# 2 Q4 W HITE_LED_BAT 1 2
LN2306LT1G_SOT23-3 [58] BAT2_LED#
DDTA144VCA-7-F_SOT23-3 C21 1U_0402_10V6K
R1
Q15B
L2N7002DW 1T1G_SC88-6
1
W HITE_LED_BAT
+3VS
1
R30
100K_0402_5%
+3VS
2
1
SATA_LED#_R
O
R31
100K_0402_5%
3
Q16B
2
L2N7002DW 1T1G_SC88-6
5
4
6
Q16A
A A
L2N7002DW 1T1G_SC88-6
2
[12,68] SATA_LED#
1
2019/06/20
Compal Secret Data
2020/06/30 Title
Keyboard/Touch Pad/Thermal/FAN
5 4 3 2 1
5 4 3 2 1
Main Function:
e l l D
Reserve
r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
(RSVD)
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
Main Function:
e l l D
Reserve
r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
(RSVD)
5 4 3 2 1
5 4 3 2 1
RX19 1 CTPM@ 2 0_0402_5%

Main Func = FPR +3VS
+3VS
Main Func = TPM UX1 RX18 1 TPM@ 2 0_0402_5%
l
+3VALW
0.1U_0402_10V7K
10U_0402_6.3V6M
SA0000AQ260 1 1
CX1
CX2
R5 TPM_JAB@
@ 0_0402_5% +3VS CX1, CX2: close to Pin1
Main Func = OTP S IC NPCT750JABYX QFN 32P TPM
2 2
TPM@
TPM@
D D
2
TPM_SPI_IRQ#
l
1 TPM@ 2
1 2 +FP_VCC RX1 10K_0402_5%
C4 0.1U_0402_16V7K JFP1
8
7 8 10 Close to KBC UX1 TPM_JAA@ +3VS
6 7 G2 9 1 RX10 1 @ 2 0_0402_5%
[12] USB20_N5
5 6 G1 Put below CPU CMP_VIN0 for system thermal sensor 29 VSB
[12] USB20_P5 5 SDA/GPIO0
4 30 8 RX12 1 2 750_CTPM@ 0_0402_5%
3 4 +3VALW_EC GPIO1/SCL VHIO 22 RX15 1 TPM@ 2 0_0402_5% +3VS
3 VHIO
0.1U_0402_10V7K
10U_0402_6.3V6M
2 6 1 1
[58] FPR_SCAN# 2 TP80 GPIO3
3
0.1U_0402_10V7K
0.1U_0402_10V7K
10U_0402_6.3V6M
1 2 1 1 1
1 NC
1
SPI_D1_TPM
CX3
CX4
RX5 1 TPM@ 2 33_0402_1% 24 3 1 @ 2
3
2
[8] CPU_SPI_D1 SPI_D0_TPM MISO NC +3VALW_PCH
RX11
CX5
CX6
CX7
ACES_51522-00801-001 R52 RX6 1 TPM@ 2 33_0402_1% 21 5 RX16
e
[8] CPU_SPI_D0 MOSI/GPIO7 NC
2
CONN@ 6.49K +-1% 0402 TPM_SPI_IRQ# 18 7 0_0402_5% 2 2
[8] TPM_SPI_IRQ# SPI_IRQ#/GPIO2 NC TP81
2
2 2 2
ST_CTPM@
TPM@
TPM@
EU5 ESD@ SP01001AE00 9
NC
0_0402_5%
TPM@
@
L03ESDL5V0CG3-2_SOT-523-3 10
2
SPI_CLK_TPM NC
RX21 0_0402_5%
[8] CPU_SPI_CLK RX9 1 TPM@ 2 33_0402_1% 19 11 CX5, CX6, CX7: colse to Pin22
SCLK NC
2
CTPM@
1
[8] CPU_SPI_0_CS#2 20 12
1
EU6 @ESD@ 17 SCS#/GPIO5 NC 14 1 @ 2
[10,27,51,52,58,68] PLTRST# +3VALW_PCH
1
VCIN0_PH [58] 27 RESET# NC 15 RX17 0_0402_5%

L03ESDL5V0CG3-2_SOT-523-3
13 NC NC 26 1 CTPM@ 2
GPIO4/SINT# NC +3VS CX3, CX4: colse to Pin8
1
1
1 1 25 RX20 0_0402_5%
1
RH1 @ NC 28
1
100K_0402_1%_B25/50 4250K C31 C32 4 NC 31
0.1U_0402_16V7K PP/GPIO6 NC 32 RX22 2 CTPM@ 1 0_0402_5%
100P_0402_50V8J
2 2 NC
2
16 RX13 1 2 750_CTPM@ 0_0402_5%
C VD_IN1_C R53 1 @ 2 0_0402_5% HW TPM:TPM@ GND 23 RX14 1 2 750_CTPM@ 0_0402_5%
C
GND
SW TPM:fTPM@ PGND
33 UX1
+3VS S IC NPCT750JAAYX QFN 32P TPM SA0000AQ270

TPM@
D
FPR_SCAN# 2 1
R6 10K_0402_5% S IC NPCT750JABYX QFN 32P TPM FW 7.2.1.0
UX1 place colse to UC3
Main Func = Thermal

+3VS Main Func = RTC
RTC power gat i ng circ ui t
+3VS
r
+3VS +RTC_SOC +RTC_CELL
1
Q17
R49 LP2301ALT1G_SOT23-3
R54 1 2 18.7K_0402_1% ALERT# 2.2K_0402_5% +RTC_VCC +3VLP
+RTC_CELL 1 3
S
B B
2
+3VS R55 1 2 2K_0402_1% T_CRIT# D1
2
Q11B R1 2
G
anode
1
THM_SML1_DATA
10K_0402_5%
6 1 1K_0402_5% 1
G
[8,28,58] SML1_SMBDATA
2
+RTC_PWR 3 cathode
1U_0201_6.3V6M
R63
L2N7002DW1T1G_SC88-6 2 1 1
anode
1
1 1
C3
R50 BAS40C_SOT23-3
C28 2.2K_0402_5% C1 @
2
5
Q11A 2
0.1U_0402_16V7K 0.47U_0402_6.3V6K
2 2 D8
2
o
3 4 THM_SML1_CLK RB751S40T1G_SOD523-2
[8,28,58] SML1_SMBCLK
1
D
S
L2N7002DW1T1G_SC88-6 2 1
R2
10M_0402_5%
1
NCT7718_DXP D
2N7002KW 1N SOT323-3
R64
2
Q13 U3 2 RTCRST_ON_R 1 2 RTCRST_ON
RTCRST_ON [58]
2
THM_SML1_CLK
G
1 1 1 8 G
VDD SCL 1M_0402_5%
1
Q18
LMBT3904LT1G_SOT23-3
C @ S
3
THM_SML1_DATA
100K_0402_5%
0.1U_0402_10V7K
2 C29 C30 2 7 3 1 RTC_DET# [11]
D+ SDA
2
f
22P_0402_50V8J
@
B 470P_0603_50V8J 2200P_0402_25V7K
D
1
1
2 2
R65
E 3 6 ALERT#
3
NCT7718_DXN D- ALERT#
C2
C33
T_CRIT# 4 5 Q1
2
T_CRIT# GND 2N7002K_SOT23-3 2
DIMM CPU Core
1
NCT7718W_MSOP8
Layout Note:
A
Layout Note: C30 close U3
A
DXN and DXP routing width and spacing is 10 mil / 10

mil.
2019/06/20
Compal Secret Data
2020/06/30 Title
TPM/RTC/Screw hole
1.0
y
5 4 3 2 1
n l
WWW.AliSaler.Com O
Main Func = HDD&FFS
l
JHDD1
1
CS15 1 2 0.01U_0402_16V7K SATA_CTX_C_DRX_P0 2 1
[12]
[12]
SATA_CTX_DRX_P0
SATA_CTX_DRX_N0 CS16 1 2 0.01U_0402_16V7K SATA_CTX_C_DRX_N0 3 2 CONN FFC
4 3
l
+5VS +5V_HDD CS17 1 2 0.01U_0402_16V7K SATA_CRX_C_DTX_N0 5 4
[12] SATA_CRX_DTX_N0 CS18 1 2 0.01U_0402_16V7K SATA_CRX_C_DTX_P0 6 5 GND S1 1
[12] SATA_CRX_DTX_P0 7 6
1 2 HDD_DEVSLP_R 8 7
80 mils 1 2 80 mils [12] HDD_DEVSLP
RS28 0_0201_5% FFS_INT2_Q 9 8 A+ S2 2
RS32 0_1206_5% 1 @ 2 10 9
[8] HDD_DET# +5V_HDD 10
1000P_0402_50V7K
0.1U_0402_10V7K
10U_0603_10V6M
RS33 0_0201_5% 11
1 1 1 12 11 A- S3 3
e
12
CS29
CS30
CS31
13
14 GND GND S4 4
2 2 2 GND
ACES_51625-01201-001
CONN@ B- S5 5
B+ S6 6
+3VS GND S7 7
D
DEVSLP P3 8
+5V_HDD
0.1U_0402_10V7K
10U_0603_10V6M
5V P7 10
CS32 FFS@
CS33
1 1
1
US2 FFS@
+3VS RS31 FFS@
@
LNG2DM 100K_0402_5% 5V P8 11
2 2 10 5
VDD_IO RES
1
9
5V P9 12
2
VDD 12 FFS@ RS30 FFS_INT2_Q
r
3 INT 1 11 FFS_INT2 FFS_INT1 [8] 100K_0402_5%
SDO/SA0 INT 2 FFS_INT2 [11]
3
4
8,23,24,40] PCH_SMBDATA
1 SDA/SDI/SDO 6 QS1B FFS@ GND P10
[8,23,24,40] PCH_SMBCLK
2
SCL/SPC GND 7 L2N7002DW1T1G_SC88-6
2 GND 8 5 Device
CS GND
Act i vi t y P11 9
4
6
LNG2DMTR_LGA12_2X2
QS1A FFS@
o
[58,68] SSD_SCP# 1 @ 2 FFS_INT2 2
RS29 0_0201_5%
1
Main Func = ODD
y f CONN
GND
A+
S1
S2
FFC
1
2
l
A- S3 3
GND S4 4
JODD1 B- S5 5
+5VS 1 2
1 2
n
SATA_CTX_C_DRX_P1 3 4 SATA_CTX_C_DRX_P1 CO4 1 2 0.01U_0402_16V7K
SATA_CTX_C_DRX_N1 5 3 4 6 SATA_CTX_C_DRX_N1 CO5 1 2 0.01U_0402_16V7K
SATA_CTX_DRX_P1
SATA_CTX_DRX_N1
[12]
[12]
B+ S6 6
7 5 6 8
SATA_CRX_C_DTX_N1 9 7 8 10 SATA_CRX_C_DTX_N1 CO6 1 2 0.01U_0402_16V7K
60 mils 60 mils SATA_CRX_C_DTX_P1 11 9 10 12 SATA_CRX_C_DTX_P1 CO7 1 2 0.01U_0402_16V7K
SATA_CRX_DTX_N1
SATA_CRX_DTX_P1
[12]
[12]
GND S7 7
13 11 12 14
SATA_ODD_PRSNT# 13 14 SATA_ODD_PRSNT#
1000P_0402_50V7K
0.1U_0402_10V7K
10U_0603_10V6M
15 16
1 1 1 +5VS 17 15 16 18 +5VS
SATA_ODD_PRSNT# [12] PRSNT P1 8
19 17 18 20
19 20
CO1
CO2
CO3
21 22 1 2
SATA_ODD_DA# 23 21 22 24 SATA_ODD_DA# TP55 RO1 10K_0402_5%
+3VS 5V P2 9
2 2 2 23 24
25 26
10
GNDGND 5V P3 11
O
ACES_50673-0120N-P01
SP01002HK00 At t ent i o
n P4 12
CONN@
GND P5
GND P6
2019/06/20
Compal Secret Data
2020/06/30 Title
HDD/FFS/ODD
5 4 3 2 1
Main Func = SSD M Key CONN
D
+3VS_SSD
l l 80 mils 2
RS3
1
+3VS
10U_0603_10V6M
0.1U_0402_10V7K
1000P_0402_50V7K
22U_0603_6.3V6M
0_0603_5%
@ 1 1 1
CS1
CS3
CS4
CS5
2
2 2 2
NGFF Key M
+3VS_SSD
JSSD1
1 2
D
3 GND1 3.3VAUX1 4
5 GND2 3.3VAUX2 6
[12] PCIE_CRX_DTX_N13 7 PETn3 N/C1 8 1 2
[12] PCIE_CRX_DTX_P13 PETp3 N/C2 SSD_SCP# [58,67]
9 10 RS2 1 @ 20_0201_5%
CS7 1 2 0.22U_0402_16V7K PCIE_CTX_C_DRX_N13 11 GND3 DAS/DSS# 12 RS34 0_0201_5% SATA_LED# [12,63]
[12] PCIE_CTX_DRX_N13 PCIE_CTX_C_DRX_P13 PERn3 3.3VAUX3 7/6 add
CS8 1 2 0.22U_0402_16V7K 13 14
[12] PCIE_CTX_DRX_P13 15 PERp3 3.3VAUX4 16
17 GND4 3.3VAUX5 18
[12] PCIE_CRX_DTX_N14 19 PETn2 3.3VAUX6 20
C [12] PCIE_CRX_DTX_P14 PETp2 N/C3 C
r
21 22
CS9 1 2 0.22U_0402_16V7K PCIE_CTX_C_DRX_N14 23 GND5 N/C4 24
[12] PCIE_CTX_DRX_N14 1 2 PCIE_CTX_C_DRX_P14 25 PERn2 N/C5 26
CS10 0.22U_0402_16V7K
[12] PCIE_CTX_DRX_P14 27 PERp2 N/C6 28
29 GND6 N/C7 30
[12] PCIE_CRX_DTX_N15 31 PETn1 N/C8 32
[12] PCIE_CRX_DTX_P15 33 PETp1 N/C9 34
[12] PCIE_CTX_DRX_N15 PCIE_CTX_C_DRX_P15 PERn1 N/C11
o
CS12 1 2 0.22U_0402_16V7K 37 38
[12] PCIE_CTX_DRX_P15 PERp1 DEVSLP SSD_DEVSLP [12]
39 40
41 GND8 N/C12 42
[12] PCIE_CRX_DTX_P16 43 PETn0/SATA-B+ N/C13 44
[12] PCIE_CRX_DTX_N16 45 PETp0/SATA-B- N/C14 46
f
[12] PCIE_CTX_DRX_N16 PCIE_CTX_C_DRX_P16 PERn0/SATA-A- N/C16
CS14 1 2 0.22U_0402_16V7K 49 50
[12] PCIE_CTX_DRX_P16 51 PERp0/SATA-A+ PERST# 52 PLTRST# [10,27,51,52,58,66]
53 GND10 CLKREQ# 54 CLKREQ_PCIE#4 [10]
[10] CLK_PCIE_N4 55 REFCLKN PEWake# 56 PCIE_WAKE# [10,51,52,58]
[10] CLK_PCIE_P4 57 REFCLKP N/C17 58
1 RS1 2 GND11 N/C18
+3VS_SSD
10K_0402_5% Key M
B 67 68 B
69 N/C19 SUSCLK(32kHz)(O)(0/3.3V) 70
[12] M2_SSD_PEDET 71 PEDET(OC-PCIe/GND-SATA) 3.3VAUX7 72
y
73 GND13 3.3VAUX8 74
75 GND15 3.3VAUX9
GND17
l
77 76
PEDET Module Type PTH2 PTH1
LCN_DAN05-67306-0103
0 SATA CONN@
n
1 PCIE
A A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
NVME SSD
5 4 3 2 1
WWW.AliSaler.Com
A B C D E F G H
Main Func = eMMC
e l l 1
r D 2
f o
y
3 3
n l
4
A
O
B C D
Compal Secret Data
E F G
Title
Size
Date:
eMMC (RSVD)
Document Number
LA-G716P
H
69 of 101
R ev
1.0
4
5 4 3 2 1
Main Function:
e l l D
Reserve r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
(RSVD)
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
Main Func = USB3.0 Port1
l
EU1
W=80mils USB3.0 Port1
USB3_CRX_L_DTX_N1 1 1 USB3_CRX_L_DTX_N1 +USB3_VCC
10 9
USB3_CRX_L_DTX_P1 2 2 USB3_CRX_L_DTX_P1
9 8 JUSB1
l
1 @EMI@ 2 USB3_CTX_L_DRX_P1 9
USB3_CTX_L_DRX_N1 4 4 USB3_CTX_L_DRX_N1 STDA_SSTX+
RU1 0_0402_5% 7 7 1 Layout Note: Close JUSB1
USB3_CTX_L_DRX_N1 8 VBUS +USB3_VCC
USB3_CTX_L_DRX_P1 5 5 USB3_CTX_L_DRX_P1 USB20_P1_R STDA_SSTX-
6 6 3
LU1 EMI@ 4 D+
[12] USB20_N1
2 1 USB20_N1_R 3 3 USB20_N1_R 2 GND_1 100 mils
USB3_CRX_L_DTX_P1 6 D-
STDA_SSRX+ 1
8 7 1 1 1
D USB20_P1_R USB3_CRX_L_DTX_N1 GND_2 D
4.7U_0402_6.3V
22U_0603_6.3V6M
22U_0603_6.3V6M
100U_A_6.3VM_R70M
3 4 5 +
[12] USB20_P1 STDA_SSRX-
CU4 @
CU5 @
CU6 @
CU7
S DIO(BR) AZ1045-04F.R7G DFN2510P10E ESD
MCM1012B900F06BP_4P ESD@ ESD@ 10
2
e
EU2 11 GND1 2 2 2 2
AZC199-02SPR7G_SOT23-3 12 GND2
GND3
1
1 @EMI@ 2 13
RU2 0_0402_5% GND4
1
ACON_TARAN-9R1391
CONN@
Change to "@" for DTC
Jason 2019-04-25
1 2 USB3_CTX_C_DRX_P1 2 EMI@ 1 USB3_CTX_L_DRX_P1 2 EMI@ 1 USB3_CRX_L_DTX_P1

[12] USB3_CTX_DRX_P1 [12] USB3_CRX_DTX_P1
CU1 0.1U_0402_10V7K RU3 0_0402_5% RU4 0_0402_5%
LU2 @EMI@ LU3 @EMI@

2 1 2 1
D
3 4 3 4
HCM1012GH900BP_4P HCM1012GH900BP_4P
1 2 USB3_CTX_C_DRX_N1 2 EMI@ 1 USB3_CTX_L_DRX_N1 2 EMI@ 1 USB3_CRX_L_DTX_N1

[12] USB3_CTX_DRX_N1 [12] USB3_CRX_DTX_N1
CU2 0.1U_0402_10V7K RU5 0_0402_5% RU6 0_0402_5%
r
C C
Maximum Output
Current 2A
o
+5VALW +USB3_VCC
UU1
f
1
5 OUT
IN 2
4 GND
[58,73] USB_EN# EN 3
1 OCB USB_OC0# [12]
CU13
1U_0201_6V3M SY6288D20AAC_SOT23-5
2
y
Main Func = USB3.0 Port2
USB3.0 Port2
l
B B
+USB3_VCC
JUSB2
1 @EMI@ 2 USB3_CTX_L_DRX_P2 9
RU7 0_0402_5% EU3 1 STDA_SSTX+
USB3_CRX_L_DTX_N2 USB3_CRX_L_DTX_N2 USB3_CTX_L_DRX_N2 VBUS +USB3_VCC
Layout Note: Close JUSB2
1 1 10 9 8
USB20_P2_R 3 STDA_SSTX-
USB3_CRX_L_DTX_P2 2 2 USB3_CRX_L_DTX_P2 D+
LU4 EMI@ 9 8 4
[12] USB20_P2
2 1 USB20_P2_R USB20_N2_R 2 GND_1 100 mils
USB3_CTX_L_DRX_N2 4 4 USB3_CTX_L_DRX_N2 USB3_CRX_L_DTX_P2 D-
7 7 6 1
n
7 STDA_SSRX+ @
USB20_N2_R USB3_CTX_L_DRX_P2 USB3_CTX_L_DRX_P2 USB3_CRX_L_DTX_N2 GND_2 1 1 1
4.7U_0402_6.3V
22U_0603_6.3V6M
22U_0603_6.3V6M
100U_A_6.3VM_R70M
3 4 5 5 6 6 5 +
[12] USB20_N2 STDA_SSRX-
CU9
CU10
CU11
CU12
2
3
MCM1012B900F06BP_4P 3 3 10
2 11 GND1 2 2 2 2
3
ESD@ GND2
8 12
1 @EMI@ 2 AZC199-02SPR7G_SOT23-3 13 GND3
GND4
1
RU8 0_0402_5% S DIO(BR) AZ1045-04F.R7G DFN2510P10E ESD EU4

ESD@ ACON_TARAN-9R1391
1
CONN@
O
1 2 USB3_CTX_C_DRX_P2 2 EMI@ 1 USB3_CTX_L_DRX_P2 2 EMI@ 1 USB3_CRX_L_DTX_P2
[12] USB3_CTX_DRX_P2 [12] USB3_CRX_DTX_P2
CU14 0.1U_0402_10V7K RU9 0_0402_5% RU10 0_0402_5%
LU5 @EMI@ LU6 @EMI@

2 1 2 1
3 4 3 4
A A
HCM1012GH900BP_4P HCM1012GH900BP_4P
1 2 USB3_CTX_C_DRX_N2 2 EMI@ 1 USB3_CTX_L_DRX_N2 2 EMI@ 1 USB3_CRX_L_DTX_N2

[12] USB3_CTX_DRX_N2 [12] USB3_CRX_DTX_N2
CU15 0.1U_0402_10V7K RU11 0_0402_5% RU12 0_0402_5%
2019/06/20
Compal Secret Data
2020/06/30 Title
USB3.0
5 4 3 2 1
5 4 3 2 1
Main Function:
e l l D
Reserve r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
(RSVD)
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
D Main Func = USB2.0 Port3 + Card Reader on IO/B
+5VALW
5
UU2
OUT
1
+USB2_VCC
[12] USB20_P7
IO_CBL_DET#
2
1 @EMI@ 2
RU13
LU7 EMI@
R92
0_0402_5%
2
1
1
+3VS
10K_0402_5%
USB20_P7_R
USB2.0/Card Reader connector
CardReader
[11] SD_READ_MODE
USB20_P7_R
1
2
3
1
2
e l
JIOB1 CONN@
l D
D
IN 2 USB20_N7_R 4 3
4 GND 5 4
[58,71] USB_EN# EN 3 3 4 USB20_N7_R USB20_P3_R 6 5
CU16
1
OCB
SY6288D20AAC_SOT23-5
USB_OC1# [12] [12] USB20_N7
MCM1012B900F06BP_4P
USB2.0 Port USB20_N3_R 7
8
6
7
8
1U_0201_6V3M 9
[11] IO_CBL_DET# 10 9
2 +USB2_VCC 1 @EMI@ 2 11 10
+RTC_VCC 11
RU14 0_0402_5% +3VS 12
13 12
+USB2_VCC 13
1 1 @EMI@ 2 14
CU17 RU15 0_0402_5% 15 14
22U_0603_6.3V6M 80 mils 16 15
16
r
@
2 LU8 EMI@ 17
3 4 USB20_P3_R 18 GND
[12] USB20_P3 GND
ACES_51524-0160N-001
C 2 1 USB20_N3_R C
[12] USB20_N3
MCM1012B900F06BP_4P
1 @EMI@ 2
RU16 0_0402_5%
f o
B
n l y B
5
O 4 3
Compal Secret Data
2
Title
Size
Date:
Finger Print & I/O CONN
Document Number
LA-G716P
1
Sheet 73 of 101
Rev
1.0
A
5 4 3 2 1
Main Function:
e l l D
r D C
B
Reserve
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
DOCK(RSVD)
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
Main Function:
e l l D
Reserve r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
(RSVD)
5 4 3 2 1
5 4 3 2 1
Main Function:
e l l D
Reserve r D C
f o B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
(RSVD)
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
Main Func = Power BTN Low actived from KBC GPIO
[38,58]
[58]
LID_CL_SIO#
POWER_SW#_MB
R25 1 2 100_0402_5%
1 @ESD@
LID_CLOSE#
POWER_SW#_MB
LID_CLOSE#
+3VALW
1
2
3
4
5
6
JPWR1
1
2
3
4
GND1
GND2
CONN@
JXT_FP226H-004S1AM
SP01002BJ00
e l l D
2
1000P_0402_50V7K
TST71-N-220-T170-S017_2P
EC1
2
SW1
@ ED1
@ESD@
1
D
For EMI Reserved
@ESD@
LID_CLOSE# EC2 1 2 0.1U_0402_10V7K
r
C C
Screw hole/FD FAN +5VS
o
H1 H3 H4 H5 H6 H7 1
22U_0603_6.3V6M
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
C27
2
f
1
H_3P0-G H_5P0 H_3P0 H_3P0-G H_3P0-G H_3P0-G

JFAN1
H8 H9 H10 H11 H12 H13 H14 1
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA 2 1
[58] FAN1_PWM 2
3
[58] FAN1_TACH 3
4
5 4
PU 10k on EC side
1
6 G1
H_5P6N G2
ACES_50224-00401-001
H_3P3-G H_3P5 H_3P5 H_3P2-G H_3P2-G H_3P0X4P0
y
CONN@
SP02000GC10
l
B B
HCPU1 HCPU2 HCPU3 HCPU4
HOLEA HOLEA HOLEA HOLEA
1
H_3P9 H_3P9 H_3P9 H_3P9
FD1 FD2 FD3 FD4
n
1
5
O 4
Compal Secret Data
3 2
Size
Title
Date:
PWRBTN/PCB PN//SCREW/FAN
Document Number
LA-G716P
1
77 of 101
Rev
1.0
A
5 4 3 2 1
Main Func = DC/DC
l
+5VS/+3VS for System
+5VALW
l
+5VS
UZ3
+VCCPLL_OC source
CZ13 2 1 1 14 1 2
2 VIN1 VOUT1 13 CZ15 0.1U_0402_10V7K +1.2V_DDR +VCCPLL_OC
1U_0201_6V3M VIN1 VOUT1
3 12 1 2
D ON1 CT1 CZ16 470P_0402_50V7K RZ11 1 2 0_0402_5% D
4 11
VBIAS GND +VCCPLL_OC
e
5 10 1 2
[10,78] SIO_SLP_S3# ON2 CT2 +1.2V_DDR
CZ17 470P_0402_50V7K
0.1U_0201_6.3V6K
1 6 9 1@
+3VALW +3VS
0.1U_0402_10V7K
VIN2 VOUT2
@ESD@
7 8 UZ7 @
CZ41 VIN2 VOUT2 1
CZ40
15 CZ38 2 @ 1 2 VIN1
2 1 GPAD 1 VIN2 2
07/4 ESD require CZ14 @
1U_0201_6.3V6M EM5209VF_DFN14_3X2 CZ18 1U_0201_6.3V6M 7 6 1 RZ12 2
VIN thermal VOUT +VCCPLL_OC
0.1U_0402_10V7K 0_0402_5%
2 2 3
+5VALW VBIAS
CZ39 2 @ 1 4 5
ON GND
1U_0201_6V3M
TPS22961DNYR_WSON8
+3VALW_PCH for System
D
[58] VCCDSW_EN
RZ10 1 @ 2 0_0402_5%
[78] VCCSTG_IO_EN
DZ2
1 2 1 @ 2 PCH_PRIM_EN
JP8 [10,82,85] POK
RZ8 0_0201_5%
CZ19 2 1
Always Short +3VALW_PCH
RB751S40T1G_SOD523-2
UZ4
1U_0201_6.3V6M JP8 PJP@
1 7 +3VALW_PCH_OUT 1 2
+3VALW VIN VOUT 1 2
2 8
VIN VOUT JUMP_43X79
RZ4 1 2 0_0402_5% 3 6 1 DZ7
[87] PCH_PRIM_EN ON CT
r
CZ23 1 2
[10,78,86] SIO_SLP_S4# +2.5V_PG [86]
1 1 0.1U_0402_10V7K
@ +5VALW 4 RB751S40T1G_SOD523-2
CZ20 VBIAS 5 CZ22 2
1 GND
0.1U_0402_10V7K CZ21 9 1000P_0402_50V7K 1 @ 2
2 1U_0201_6V3M GND 2 RZ9 0_0201_5%
C C
2 TPS22967DSGR_SON8_2X2
o
+1.05V_PRIM TO +VCCST /+VCCSTG
Buffer with Open Drain Output For ALL_SYS_PWRGD
+3VALW
CC67
f
+5VALW +1.05V_PRIM DZ4 0.1U_0402_16V7K 2 1
1 2
UC6
RB751S40T1G_SOD523-2 1 5
NC VCC
1U_0201_6V3M
1U_0201_6.3V6M
1 1 JP1,JP2 SIO_SLP_S3# 1 RC144 2 2

A ALL_SYS_PWRGD
Always Short
CZ1
CZ2
10K_0402_1% 4
1
CC68 3 Y
2 2 GND 1
JP1 PJP@
1 2 74AUP1G07GW_TSSOP5 CC69
+VCCST
2
DZ5 1U_0402_6.3V6K @ 100P_0402_50V8J
1 2
1
UZ1
14 +VCCST_OUT
PAD-OPEN1x1m 190mA 2
RB751S40T1G_SOD523-2 2 VIN1 VOUT1 13 1 2

RZ1 VIN1 VOUT1 @ CZ5 0.1U_0402_10V7K
1 2 1.0V_VCCST_EN 3 12 1 2 Buffer with Open Drain Output For H_VCCST_PWRGD
[10,78,86] SIO_SLP_S4# ON1 CT1
0 +-1% 0402 CZ6 1000P_0402_50V7K
y
+3VALW +VCCST
0.1U_0402_10V7K
1 4 11
VBIAS GND
CZ3
@
VCCSTG_IO_EN 5 10 CZ7 1 2 1000P_0402_50V7K 0.1U_0402_16V7K 2 1 CC70
1
ON2 CT2 JP2 PJP@
2 6 9 +VCCSTG_OUT 1 2 UC8 RC145
1 VIN2 VOUT2 +VCCSTG
7 8 1 5 100K +-5% 0402
CZ4 @ VIN2 VOUT2 PAD-OPEN1x1m NC VCC
l
B
0.1U_0402_10V7K 15 1 20mA ALL_SYS_PWRGD 2 B
2
2 GPAD A 4
Y 1 H_VCCST_PWRGD [10]
EM5209VF_DFN14_3X2 CZ8 3
GND
0.1U_0402_10V7K
0.1U_0402_10V7K 2 CC71
2
@ESD@
CC78
74AUP1G07GW_TSSOP5 @ 100P_0402_50V8J
2
20mohm/6A
1
07/4 ESD require
n
+1.05V_PRIM TO +VCCIO +3VS
1
RC146
10K_0402_5%
+1.05V_PRIM
JP3
2
1 @ 2 ALL_SYS_PWRGD
[86] 1.2V_VTT_PWRGD ALL_SYS_PWRGD [58]
1
UZ2 Always Short RC147 0_0201_5%
2 VIN1 1 @ 2
VIN2 IMVP_VR_ON [88]
0.1U_0402_10V7K
JP3 PJP@ 2 RC148 0_0201_5%

+5VALW +VCCIO_OUT
@ESD@
CC77
7 6 1 2
VIN thermal VOUT 1 2 +VCCIO
07/4 ESD require
O
3 1 JUMP_43X79
VBIAS 1
1U_0201_6.3V6M
1
4.066A
1U_0201_6V3M
1 4 5 CZ12 RZ2
ON GND
CZ9
0.1U_0402_10V7K 0_0201_5%
2
CZ10
1 2
2 S IC EM5201V DFN3X3 8P LOAD SWITCH
2 +3VALW
4.4mohm/6A
TR=12.5us@Vin=1.05V
5
A 1 A
P
[10,78] SIO_SLP_S3# IN1 4 VCCSTG_IO_EN

VCCSTG_IO_EN 1 VCCSTG_IO_EN_R O VCCSTG_IO_EN [78]
2 2
[9] CPU_C10_GATE#
G
RZ3 49.9K_0402_1% IN2 UC9 change CPN &

1
UC9 @ Description only
3
1 2 CZ11 MC74VHC1G08EDFT2G_SC70 Jason 2019-04-26

0.1U_0402_10V7K
DZ6 2
RB751S40T1G_SOD523-2
2019/06/20
Compal Secret Data
2020/06/30 Title
DC/DC
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
Main Func = Power Monitor
RB1 Close to F1
RB2 Close to R8
RB3 Close to R8
+DCBAT_LCD
+LCDVDD
+LCDVDD_LCD
RB1
RB2
RB3
1
1
1
@
@
@
+19VB_DB
2 0_0201_5%
2 0_0201_5%
2 0_0201_5%
1
3
5
7
9
JDB1 CONN@
1
3
5
7
2 4
4 6
6 8
2
8 10
RB7
RB8
RB9
1
1
1
@
@
@
2 0_0201_5%
2 0_0201_5%
2 0_0201_5%
VCCGT_B+
+5VS
+5V_HDD
RB7 Close to PJPG01
RB8 Close to RS32
RB9 Close to RS32
e l l D
D
[11] I2C_3_SDA 9 10 12 I2C_3_SCL [11]
RB4 Close to PCI23 +3VALW 11 RB10 Close to PJPM01
RB4 1 @ 2 0_0201_5% 13 11 12 14 RB10 1 @ 2 0_0201_5%
RB5 Close to PRB01 +19VB_CPU
15 13 14 16 +19VB_1.2V RB11 Close to PJPA01
RB6 Close to PRB01 +17.4V_BATT+_R RB5 1 @ 2 0_0201_5% 17 15 16 18 RB11 1 @ 2 0_0201_5% VCCSA_B+
RB12 Close to PJPA01
RB6 1 @ 2 0_0201_5% 19 17 18 20 +19VB_DB RB12 1 @ 2 0_0201_5%
+17.4V_BATT+ 19 20 +19VB
HRS_BM20B-20DS-0P4V
C C
f o r B
n l y A
O
2019/06/20
Compal Secret Data
2020/06/30 Title
Power Monitor
5 4 3 2 1
5 4 3 2 1
Main Func = XDP
D
PortConnector Less Routing Topology
Follow KBL DCI Link

RC152 need POP
RC156 need POP
+3.3V_SPI
+VCCSTG
RC149 1 CMC@ 2 1K_0402_5% XDP_HOOK3
[6]
[6]
[6]
[6]
SOC_XDP_TDO
CPU_XDP_TCK0
PCH_JTAG_TCK1
SOC_XDP_TMS
TPC1
TPC2
TPC3
TPC4
e l l D
D
RC150 1 CMC@ 2 51_0402_5% SOC_XDP_TMS
TPC5
1 CMC@ 2 51_0402_5% SOC_XDP_TDI [6] SOC_XDP_TDI
RC151 TPC6
[6] SOC_XDP_TRST#
Place to CPU side TPC7
1 CMC@ 2 100_0402_5% SOC_XDP_TDO [17] XDP_ITP_PMODE
RC152
C C
r
+1.05V_PRIM TPC8
[8] XDP_HOOK3
RC153 1 CMC@ 2 1.5K_0402_1% XDP_ITP_PMODE
o
1 @ 2 XDP_PRSENT_CPU TPC9
[17] CFG3
RC154 1.5K_0402_1%
1 CMC@ 2 XDP_HOOK0 TPC10
f
[10] PCH_RSMRST#_Q
RC155 1K_0402_5%
RC156 2 CMC@ 1 51_0402_5% CPU_XDP_TCK0

Place to CPU side
RC157 2 @ 1 51_0402_5% PCH_JTAG_TCK1
B B
n l y A
O
XDP
B 1.0
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
e l l D
r D C
Reserve
f o
B
n l y B
5
O 4 3
2
Title
Size
Date:
Reserve for PWR
Document Number

1
Sheet 81 of
Rev
100
1.0
A
A B C D
Main Func = DCIN CONN 1

@ PJP1
2
1 2
SPEC = 6KV PSID@ PQ1
l
JUMP_43X79
+19V_VIN FDV301N-G_SOT23-3
PSID@ PR1
@ PJPDC1 EMI@ PL1 1 3 33_0402_5%
S
D
5A Z150 20M 1210_2P PSID-2 PSID-3 1 2 PS_ID [25]
8 +19V_ADPIN 1 2
GND 7
GND
l
1000P_0402_50V7K
1
6
100P_0402_25V8K
PSID@ PR4
2
2200P_0402_50V7K
1000P_0402_50V7K
2200P_0402_50V7K
10P_0402_25V8J
100K_0402_1%
6
1
TVNST52302AB0_SOT523-3
5
100P_0402_25V8K
10K_0402_1% PR5 PSID@
5
@ESD@ PC6
PSID@ PR3
4 2 1 2.2K_0402_5%
4
+5VALW
3
EMI@ PC1
EMI@ PC2
@ESD@ PC5
EMI@ PC3
EMI@ PC4
@RF@ PC15
3
3 2
2
2
MMST3904-7-F_SOT323-3
@ESD@ PD1
1 1 2
2
1
+3VALW
1
@EMI@ PL2 C
1 1
PQ2
5A Z150 20M 1210_2P PSID-1 2
ACES_50458-00601-001 B
1
e
@PJP2 E @ PR7
3
+5VALW
1
PR6 PSID@
1 2 3
PSID@
100_0402_5%
15K_0402_1%
1 2 1 2 1
JUMP_43X79 EMI@ PL3 2
BLM15AG102SN1D_2P
PSID 1 2 @ PD2
2
BAV99W_SC70-3
1
@ PD3
BAV99W_SC70-3
3
D
+5VALW
Bat t er y Bot Si de
r
PIN1 GND
PIN2 GND
2 PIN3 GND 2
PIN4 SYS_PRES
PIN5 BATT_PRS
PIN6 DAT_SMB
PIN7 CLK_SMB
o
PIN8 Bat t +
PIN9 Bat t +
PIN10 Bat t +
SP021412220
f
ACES_50458-01001-P01_10P-T
n l y Adapter protect i on:

if battery removed, adaptor only,
then trigger the H_PROCHOT#,
keep @ in BOM since battery can not
Bat t er y pr ot ec t i on
:
asserts H_PROCHOT# when adaptor is
unplugged, keep low for 10ms
till SW PROCHOT# is issued by EC
Erp lot6 Circuit
@ PR31
+19V_VIN
3
1
be removed by end user [25,56] HW_ACAV_IN 0_0402_5%
3.3K_1206_5%
1
1 2
H_PROCHOT#
@ PR32
+19V_VIN +3VALW
10K_0402_1%
[6,25,56,61] H_PROCHOT# @ PR34
1
1M_0402_1%
3 2
PR33
@ PR35
2
3
PC13 0_0402_5%
L2N7002DW1T1G SC88-6
.1U_0402_16V7K 1 2
2N7002KDW_SOT363-6
O 1
PQ12B
@ PQ13B
2
PR36 1 2 5 POK [10,36,57] 5
6
@ PC14 1M_0402_1%
1
.1U_0402_16V7K
2N7002KDW_SOT363-6
L2N7002DW1T1G SC88-6
4
1
1
D
@ PQ13A
2
PBAT_PRES#
PQ12A
1 2 2 @ PQ11 PR40 2 @ PR38
[83] G 2N7002KW_SOT323-3 2 100K_0402_1% 1M_0402_1%
1
100K_0402_1%
S
3
2
1
2
@ PR45
2
PR43
PR44 1M_0402_1%
4 1M_0402_1% 4
2
@
2
1
PWR_DCIN CONN
WWW.AliSaler.Com A B
C
Size
Date:
Document Number

D
Sheet 82 of 100
Rev
1.0
A B C D
Main Func = BATT CONN
e l l 1
D
+17.4V_BATT+
1
@ PJP3
2
+17.4V_BATT++
1 2
JUMP_43X79
EMI@ PL4
5A Z150 20M 1210_2P
1 2
Bat t er y Bot Si de
1
1000P_0402_50V7K
0.01U_0402_25V7K
1
r
EMI@ PC11
EMI@ PC12
@ESD@ PD5 @ESD@ PD6
L03ESDL5V0CG3-2 SOT523 L03ESDL5V0CG3-2 SOT523
PIN1 GND
2
PIN2 GND
3
2 PIN3 GND 2
PBAT_PRES# [25,82]
PIN4 SYS_PRES
PIN5 BATT_PRS
@ PBATT1
PIN6 DAT_SMB 1
1
PIN7 CLK_SMB
o
2
2 3 PR39 PR41
PIN8 Bat t + 3
4
4 SYS_PRES PR37 200_0402_5% 10K_0402_1% +3VALW
5 PBAT_PRES#_R 100_0402_5% 1 2 1 2
PIN9 Bat t + 5 6 DAT_SMB 1 2
PIN10 Bat t + 6
7
7 CLK_SMB 1 2
8
SP021412220 8 9 PR42
f
9 10 100_0402_5%
10 11
ACES_50458-01001-P01_10P-T GND 12 PBAT_CHG_SMBCLK [25,56]
GND
ACES_50458-01001-P01_10P-T
PBAT_CHG_SMBDAT [25,56]
99.9
n l y 3
A
O B
Compal Secret Data
C
Title
Size
Date:
PWR_BATT CONN
Document Number

D
Sheet 83 of 100
Rev
1.0
4
A B C D
Main Func = CHARGER
1M_0402_1%
2
PRB04
l
PRB02
PQB11 PQB12 0.01_1206_1% +19VB
2N7002KW_SOT323-3
EMB04N03H_EDFN5X6-8-5 EMB04N03H_EDFN5X6-8-5
1
1 1 1 4 EMI@ PLB02
1
2 D 2 5A_Z80_0805_2P
+CHARGER_SRC
l
+19V_VIN
PQB30
5 3 2 3 5 2 3 1 2
2200P_0402_25V7K
1000P_0402_25V8J
1000P_0402_25V8J
G
0.1U_0402_25V7K
@ PJPB01
15U_B2_25VM_R100M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
S
3
1 PRB03 2
3M_0402_5%
1 1 2
4
@ 1 2
PRB06
1
PCB70
PCB20
PCB21
PCB22
PCB23
EMI@ PCB24
EMI@ PCB25
@EMI@ PCB26
@EMI@ PCB27
+ JUMP_43X118
2 1
1 1
2
@ 2
0_0402_5%
@ @
0.1U_0402_25V6
PCB01 @
e
1
1
2
3
PRB11 PRB12
1_0402_1% 2_0402_5% @ESD@ PDB13
AZ4024-02S_SOT23
5
CSIP_CHG
CSIN_CHG
PQB13
D
EMB04N03H_EDFN5X6-8-5
1
PD14
PCB03
0.1U_0402_25V6 3
1 2 BGATE_CHG 4 1
1
1
PRB07 PRB08 @
4.02K_0402_1% 4.02K_0402_1% +19V_VIN PCB04 PCB05 AZ4024-02S_SOT23
0.47U_0402_25V6K
3
2
1
1
0.033U_0402_25V7K 1U_0402_25V6K @ESD@
2
2
PCB28
ASGATE_CHG
CMSRC_CHG
0.1U_0402_25V7K
2
1
@
2
PCB06
PRB09
r
374K_0402_1%
LRB715FT1G_SOT323-3
1
2
PDB01
2
BA_PWR 3
100K_0402_5%
@
1
2
1 PRB14 2
PRB13
2
0.01UF_0402_25V7K
0_0603_5%
1
+19V_VIN
PCB02
PRB10
2N7002KW_SOT323-3
1
D
52.3K_0402_1%
1
PQB31
2
[25] AC_DIS
G
2
5
BOOT1_CHG
o
S
3
2
1
PCB71 PRB45
ACIN_CHG
NTC_CHG
UG1_CHG
LX1_CHG
LG1_CHG
AON7408L_DFN8-5
1
1U_0402_25V6K 100K_0402_1% PRB39

2 1 4.7_0402_5%
2 VDD_CHG
PQB26
PRB15 1
10_0805_1% UG1_CHG 4
2
PCB07 PUB01
16
15
14
13
12
11
10
33
2
9
1U_0402_25V6K ISL95522HRZ-T_TQFN32_4X4
+17.4V_BATT+_R
f
2 1 DCIN_CHG ACIN
CSIN
NTC
GND
BOOT
CSIP
UGATE
PHASE
LGATE
3
2
1
PCB19
PRB16
2 1 75K_0402_1% 17 8 VDDP_CHG 1 2 PRB01
PCB08 DCIN VDDP PLB01
0.01_1206_1%
1 2 VDD_CHG 18 7 ASGATE_CHG 4.7UH_5.5A_20%_7X7X3_M
150K_0402_1%
PRB17 VDD ASGATE 2.2U_0402_6.3V6K LX1_CHG 1 2 1 4
1
1 2 PROG_CHG 19 6 QPCN_CHG
2.2U_0402_6.3V6K PROG QPCN
2
PRB18 200K_0402_1%
1 ACLIN_CHG 20 5 CMSRC_CHG
2 3 +17.4V_BATT+
PRB25 PCB18
ACLIM CMSRC
1
499K_0402_1% @ PRB19 0_0402_5% 0.47U_0402_25V6K
4.7_1206_5%
5
QPCP_CHG
@EMI@ PRB40
1 2 21 4 1 2
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
0.1U_0402_25V7K
AON7506_DFN33-8-5
2
[25,55] PBAT_CHG_SMBDAT @ PRB20 0_0402_5% SDA QPCP

[25,55] HW_ACAV_IN 1 2 22 3 FSET_CHG 1 2
SCL FSET
1
[25,55] PBAT_CHG_SMBCLK
PCB30
PCB31
PCB32
PCB33
PCB34
PCB35
1SNUB1_CHG 2
1
CSOP_CHG
PQB25
1@ PRB21 2 0_0402_5% 23 2
768K_0402_1%
PRB38
[6,25,55,61] H_PROCHOT# PROCHOT# CSOP LG1_CHG 4
PRB26
22.6K_0402_1%
y
2
2
CSON_CHG
BATGONE
PROH 24 1
ACOK CSON
680P_0603_50V7K
BGATE
CCLIM
BMON
AMON
COMP
1 ACOK_CHG @
PSYS
2
VBAT
2
@ PRB22 0_0402_5%
3
2
1
@EMI@ PCB29
@ PRB23 PCB09
l
25
26
27
28
29
30
31
32
3 100K_0402_1% 10P_0402_50V8J 3
2
PRB24 1 2 1 2
100K_0402_1%
BGATE_CHG
COMP_CHG
BATGONE_CHG
VBAT_CHG
2 1
[25,55] PBAT_PRES#
PRB31 1K_0402_1%
PRB27 200K_0402_1%
1
VDD_CHG 1 2 PQB28
3
LMUN5113T1G_SOT323-3
0_0603_5%
PRB28 100K_0402_1%
PRB41
1 2
2
n
2
@ PRB29 0_0402_5% @ PCB17

1 2 1U_0402_25V6K @
2
[25] I_BATT_R 1 2
PQB29
2200P_0402_25V7K
1
100_0402_5%
LTC015EUBFS8TL_UMT3F
1
1
0_0402_5%
PRB36 2_0402_5%
10.5K_0402_1%
1
PCB10
PRB30
PRB33
1 2
0.1U_0402_25V6
0.1U_0402_25V6
560P_0402_50V7K
1
1
1
PRB34
PCB13
PCB15
2
[10]
2
BA_PWR
PCB12
@ PRB32 @ @ PRB37 0_0402_5%

2
SIO_SLP_S5#
2
0_0402_5% @ 1 2
0.033U_0402_25V7K
2
1
3
PCB11
Delay adaptor OC H_PROCHOT#

2
@ PCB16
2
2ms while hybrid power

I_ADP_R
1 2
O
transit i on 0.22U_0402_25V6K
+17.4V_BATT+
+3VALW [61] 2 1
VDD_CHG I_SYS
PRB35
H_PROCHOT# 100_0402_5%
1
PRB42
1
10K_0402_5% PRB43 I_ADP_R [25]

160K_0402_1%
1
PRB44 D
4 4
2
10K_0402_5% 1 2 2 PQB32
G Close to EC ADP_I pin
0.047U_0402_25V7K
RUM002N02GT2L_VMT3
2
1
RUM002N02GT2L_VMT3
1
@ PCB14
PCB36
D S
3
PQB33
PROH 2 0.1U_0402_25V6
2
G
2
S
3
LA-F611PR01_0531B.DSN
I_SYS change to TSENSE_PSYS(P.72 PUZ01.24) PWR_CHARGER
WWW.AliSaler.Com A B
C
Size
Date:
Document Number

D
LA-F711P
Sheet 84 of 100
Rev
1.0
A B C D E
Main Func = 3.3VALWP/5VALWP
@EMI@ PL311
5A_Z120_25M_0805_2P
1 2
@ PJP301 @ PR301 0_0603_5%

PC307
0.1U_0402_10V7K
ENLDO_3V5V
PR302
499K_0402_1%
1 2 +19VB
e l l 1
1
+19VB_3V BST_3V 2 BST_3V_R 1
150K_0402_1%
1 2 1 2
+19VB
1
PR303
JUMP_43X39 PC317
2200P_0402_50V7K
1000P_0402_25V8J
1000P_0402_25V8J
4.7U_0603_25V6K
4.7U_0603_25V6K
0.1U_0402_25V6
PU301 1U_0402_25V6K
2
5
1
SY8286BRAC_QFN20_3X3
2
BS
IN
IN
IN
IN
1
1
@EMI@ PC301
EMI@ PC302
PC303
PC304
EMI@ PC305
@EMI@ PC306
LX_3V 6 20
D
PL301
2 LX LX 1.5UH_9A_20%_7X7X3_M
2
7 19 LX_3V 1 2
GND LX +3VALWP
@EMI@ PR305
8 18
GND GND
4.7_1206_5%
+3VLP
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
9 17
PG LDO
1
PC310
PC311
PC312
PC313
PC314
PC316
10 16
NC NC
4.7U_0402_6.3V6M
3VALWP
OUT
2
EN2
EN1
21
NC
FF
GND
1
TDC 6 A
PC308
r
1 SN_3V 2
PR304
Peak Current 8.5 A
11
12
13
14
15
680P_0603_50V7K
10K_0402_1%
@EMI@ PC309
+3VALWP
1 2
OCP Current 10 A
ENLDO_3V5V
2 2
2
[10,36,55] POK
o
@ PJP302
150K_0402_1%
PC315 PR306 1 2
+3VALWP 1 2 +3VALW
1
@ PR307
1000P_0402_25V8J 1K_0402_5%
EN_3V FB_3V 1 2 FB_3V_R 1 2 JUMP_43X118
f
@EMI@ PL511
2
5A Z150 20M 1210_2P
1 2
1
150K_0402_1%
@ PJP502
@ PR308
1 2
@ PJP501 @ PR501 PC507 +5VALWP 1 2 +5VALW
1 2 +19VB_5V BST_5V 1 2 BST_5V_R 1 2 JUMP_43X79
+19VB 1 2
2
JUMP_43X79 0_0603_5% 0.1U_0402_10V7K @ PJP503
2200P_0402_50V7K
1000P_0402_25V8J
1000P_0402_25V8J
1 2
PU501 1 2
10U_0603_25V6M
10U_0603_25V6M
0.1U_0402_25V6
1
SY8180CRAC_QFN20_3X3 JUMP_43X79
1
1
@EMI@ PC501
EMI@ PC502
PC503
PC504
EMI@ PC505
@EMI@ PC506
BS
IN
IN
IN
IN
y
LX_5V 6 20 PL501
2
LX LX 1.5UH_9A_20%_7X7X3_M
7 19 LX_5V 1 2
GND LX +5VALWP
4.7_1206_5%
8 18
l
GND GND
1
3 3
@EMI@
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
PR505
9 17 1 2
PG VCC
1
PC510
PC511
PC514
PC512
PC519
PC513
PC520
PC521
10 16 PC508
@ PR502 NC NC 4.7U_0402_6.3V6M
OUT
LDO
1 SN_5V 2
2
EN2
EN1
0_0402_5% 21
FF
EN_3V 1 2 GND
680P_0603_50V7K
11
12
13
14
15
@ PR503 @ PR504
VL
@EMI@
PC509
0_0402_5% 10K_0402_1%
n
EN_5V 1 2 +3VALWP 1 2
ENLDO_3V5V
4.7U_0402_6.3V6M
2
1
4.7U_0402_6.3V6M
1
EN_5V
PC2506
PC515
POK
PR506
2
2.2K_0402_5%
5VALWP
2
150K_0402_1%
1 2
[25] ALWON
TDC=8 A
1
@ PR510
@
@ PR507
0_0402_5%
PD501 Peak Current 11 A
[25] CMP_VOUT0
1 2 1 2 OCP current 13 A
2
4.7U_0402_6.3V6M
RB751V-40_SOD323-2
1
O
1
1
150K_0402_1%
PC516
PR508 PC517 PR509
@ PR511
1M_0402_5% 1000P_0402_25V8J 1K_0402_5%
FB_5V 1 2 FB_5V_R 1 2
2
2
4 4

PWR_3.3VALWP/5VALWP
A B C D E
A B C D
Main Func = +1.2V_DDR/+0.6V_DDR_VTT/+2.5VP
l
PRM02
@EMI@ PLM11 2.2_0603_5%
5A_Z120_25M_0805_2P BST_1.2V_R 2 1 BST_1.2V
1 2
0.6Volt +/- 5%
l
1
@ PJPM01
+19VB_1.2V TDC 1.2A
1 2 PCM12 +1.2VP Peak Current 1.5A
0.1U_0402_10V7K
2
JUMP_43X39
1 1
+19VB +19VB_1.2V UG_1.2V
1 4
e
+0.6VSP
2 3
10U_0603_25V6M
10U_0603_25V6M
1000P_0402_50V7K
1000P_0402_50V7K
2200P_0402_50V7K
0.1U_0402_25V6
@ PRM12
22U_0603_6.3V6M
1
1
LX_1.2V
@EMI@ PCM22
@EMI@ PCM23
EMI@ PCM01
EMI@ PCM02
PCM03
PCM04
0.01_1206_1%
PCM20
16
17
18
19
20
2
2
PUM01
2
VLDOIN
PHASE
UGATE
BOOT
VTT
21
PAD
LG_1.2V 15 1
LGATE VTTGND
D
PRM03
8.2K_0402_5% 14 2
PGND VTTSNS
1
2 1
PQM01
D1
D1
D1
G1
AONH36334_DFN3X3A8-10 CS_1.2V 13 3
PCM13 CS RT8207PGQW _W QFN20_3X3 GND
10 9 2.2U_0402_6.3V6K
D1 D2/S1 2 1 VDDP_1.2V 12 4 VTTREF_1.2V
PRM04 VDDP VTTREF
r
5.1_0603_5%
G2
S2
S2
S2
1 2 VDD_1.2V 11 5
VDD VDDQ +1.2VP
1
PGOOD
5
8
2 1 PCM19
TON
2 +5VALW 0.033U_0402_16V7K 2
FB
S5
S3
2
1
PDM01
1
RB751V-40_SOD323-2 PRM05
10
6
PCM14 2.2_0603_5%
2.2U_0402_6.3V6K
2
o
@ PCM17
EN_0.6VSP
EN_1.2V
FB_1.2V
2
TON_1.2V
220P_0402_25V8J
1 2
PLM01 +5VALW
1UH_11A_20%_7X7X3_M
1 2 [18] 1.2V_VTT_PWRGD PRM10
f
+1.2VP 6.04K_0402_1%
@ PRM06 PRM07 1 2
10K_0402_1% +19VB_1.2V 1 2 +1.2VP
1 2
+1.2V_DDR
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
453K_0402_1%
+3VALW
1
1
@ PCM18 TDC 4.9 A
1
1
PCM05
PCM06
PCM07
PCM08
PCM09
PCM10
@EMI@ PRM01 PRM08 PRM11

4.7_1206_5% 0_0402_5% 10K_0402_1%
.1U_0402_16V7K Peak Current 7 A
2
[36,60] +2.5V_PG
1 2 OCP Current 8.4 A
2
2
@
1
@ PCM15
SN_1.2V
0.1U_0402_10V7K
2
y
PRM09
1
0_0402_5%
@EMI@ PCM11 1 2
[7] 0.6V_DDR_VTT_ON
680P_0402_50V7K
l
2
1
3 @ PCM16 3
1 2 +5VALW _VDD 0.1U_0402_10V7K
+5VALW @ PJPM02
2
PR2504 1 2
+1.2VP 1 2 +1.2V_DDR
1
2.2_0402_1% PC2504
2.2U_0402_6.3V6K JUMP_43X118
2
4 5
n
GND
@ PJP2501 VDD NC
+3VALW
1 2 +3VALW _2.5V 3
VIN VOUT
6 +2.5VP
@ PJPM03
JUMP_43X39 2 7 ADJ_2.5V 1 2
22U_0603_6.3V6M
22U_0603_6.3V6M
EN ADJ
+0.6VSP +0.6V_DDR_VTT
1
1
1
1 8 JUMP_43X39
PC2501
PC2502
PGOOD GND PR2502 @ PC2505
21.5K_0402_1% 0.01U_0402_25V7K
2
2
PU2501
2
RT9059GSP_SO8
O
PR2501 +2.5V_PG [36,58] Vref=0.8V
1
2 1 EN_2.5V @ PJP2502
[10,18,36] SIO_SLP_S4#
2
1 2
22K_0402_1% PR2505 PR2503 +2.5VP +2.5V_MEM +2.5V
10K_0402_1% 10K_0402_1% JUMP_43X39 TDC 0.32 A
0.1U_0402_10V6K
1
PC2503
Peak Current 0.45 A

2
1
2
4 4
+3VALW

Issued Date 2020/06/30 Title
2019/06/20 Deciphered Date
PWR_+1.2V_MEN/+0.6V_/+2.5VP
WWW.AliSaler.Com
A B C D
A B C D
Main Func = +1.8VALWP /+1.05VALWP
+3VALW
@ PL1811
5A_Z120_25M_0805_2P
1
1
2
@ PJP1801
JUMP_43X39
2
22U_0603_6.3V6M
+3VALW_1.8V
11
10
7
TP
PVIN
PVIN
SVIN
PU1801
NC
LX
LX
1
4
LX_1.8V
PRIM_PWRGD [25,59]
PL1801
1UH_6.6A_20%_5X5X3_M
1 2
+1.8VALWP
+1.8VALWP
e l l 1
@ PJP1802
JUMP_43X79
1 2
2
+1.8V_PRIM 1
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
NC PGOOD
1
PC1801 PC1807
1
6 5
PC1802
PC1803
PC1804
2 FB EN PR1803 @EMI@ PR1804 22P_0402_50V8J +1.8V_PRIM
2
100K_0402_5% 4.7_1206_5% TDC 1.6 A
2
RT8061AZQW_WDFN10_3X3
Peak Current 2.3 A
2
EN_1.8V
1
FB=0.6Volt OCP Current 2.8A
2 1
PR1801 +3VALW
D
0_0402_5% PR1807
1 2 20K_0402_1%
[36] PCH_PRIM_EN
1
@EMI@ PC1806
0.1U_0402_10V7K
1
680P_0402_50V7K PR1805
PC1805
2
1
@ PR1802 10K_0402_1%
1M_0402_5%
2
2
2
FB_1.8V
r
2 2
o
+1.05VALWP
TDC 6.7 A
Peak Current 9.5 A
OCP Current 12 A Fix by IC
f
+3VALW TYP MAX
Choke DCR 11.0mohm , 12.0mohm
1
PRH06 PCH12
@ PRH05 10_0402_1% 0.1U_0402_10V6K
100K_0402_5% 1 2 BST_1.05V_R 1 2
2
BST_1.05V
@EMI@ PLH11
5A_Z120_25M_0805_2P
1 2
@ PJPH01 PUH01
7
+19VB_1.05V
y
1 2 RT6228AGQUF_UQFN12_3X3 PLH01
+19VB 1UH_11A_20%_7X7X3_M
PGOOD
BOOT
JUMP_43X39
5 2 LX_1.05V 1 2
10U_0603_25V6M
10U_0603_25V6M
1000P_0402_50V7K
1000P_0402_50V7K
2200P_0402_50V7K
VIN LX +1.05VALWP
0.1U_0402_25V6
1
1
@EMI@ PCH15
@EMI@ PCH16
EMI@ PCH01
EMI@ PCH02
PCH03
PCH04
l 22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
3
10 FB_1.05V @ PCH14
3
2
1
FB 330P_0402_50V7K
PCH05
PCH06
PCH07
PCH08
6 11 2 1 +5VALW @EMI@ PRH07
2
EN BYP PRH11 4.7_1206_5%
2
12 9 2.2_0402_1%
1
ILMT VCC
PGND
AGND
2
1
@ PRH12
PCH10
PCH11
LX
1U_0402_10V6K
1U_0402_10V6K
1K_0402_1%
R1
2
2
4
PRH01
Vf b=0. 6
2
0_0402_5% 1 2
n
1 2 EN_1.05V
[25,60] PRIM_PWRGD
SN_1.05V
LX_1.05V
PRH08
7.5K_0402_1%
1
1
@ PCH09
ILMT_1.05V
1M_0402_1%
0.1U_0402_25V6
PRH09
@ PRH02
R2
2
10K_0402_1%
+3VALW @EMI@ PCH13
2
680P_0603_50V7K @ PJPH02
2
1 2
+1.05VALWP 1 2
+1.05V_PRIM
1
JUMP_43X118
@ PRH03
0_0402_5%
2
O
1
@ PRH04
0_0402_5%
2
4 4

Issued Date 2020/06/30 Title
2019/06/20 Deciphered Date
PWR_+1.8VALWP / +1.05VALWP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.0
A B C D
A B C D
Main Func = CPU
I_SYS [56]
1 1
PRZ01
PCZ01
1.5K_0402_1%
OCP for VCCSA 1 2 1 2 PCZ02
2200P_0402_50V7K
8200P_0402_25V7K 1 2
PCZ04 COMP_1b_CPU 1 2
1000P_0402_50V7K PCZ03
1 2 15P_0402_50V8J PRZ06
@ PRZ03 10_0402_5% [62] CSN_1b_VCCSA
0_0402_5% PRZ04 2 1
18.7K_0402_1%
1000P_0402_50V7K
2
1.74K_0402_1%
2
1 2 VSPP_1b_CPU_R 1 2 VSP_1b_CPU
PCZ05
PRZ05
[13] VSA_SEN+
1
Close to SA choke
1
PHZ01
0.01U_0402_25V7K
1
PCZ06 PRZ08 100K_0402_1%_B25/50 4250K
2200P_0402_25V7K
1
1000P_0402_50V7K 1K_0402_1%
1
1 2 VSNN_1b_CPU_R 1 2 VSN_1b_CPU
PCZ08
PCZ09
[13] VSA_SEN-
12
@ PRZ07 1 2 PRZ10
2
0_0402_5% PCZ07 2200P_0402_25V7K
CSP_1b_VCCSA
12K_0402_1% +3VS
1 2 [62] CSP_1b_VCCSA_R
2
@ PRZ14 PRZ15 2 1
1
0_0402_5% PRZ11 20K_0402_1% 57.6K_0402_1%
1 2 VSP_2ph_CPU 1 2 PRZ13 PRZ16
[15] VCCSENSE
7.5K_0603_1% 10K_0402_1%
1
1 2
PCZ10 U22@ PRZ19 PCZ12 470P_0402_50V7K
2
1000P_0402_50V7K 1K_0402_1%
2
1 2 VSN_2ph_CPU_R 1 2 VSN_2ph_CPU
[15] VSSSENSE
@ PRZ18 0_0402_5% 1 2 +VCCST
PCZ11 3300P_0402_25V7K
1
U42@ PRZ21
2 1K_0402_1% PRZ20 U42@ PRZ23 U42@ PRZ19 2
1
49.9_0402_1% 25.5K _0402_1% 1.54K_0402_1%
U22@ @ PRZ22
PRZ21 1 2 IMVP_VR_ON [18]
110_0402_1%
100_0402_1%
45.3_0402_1%
1 2
IOUT_1b_CPU
619_0402_1%
RIOUT@GT
ILIM_1b_CPU
0_0402_5%
470P_0402_50V7K
2
PCZ13 PRZ50 U42@
EN_CPU
PWM_1b_CPU [62]
1
470P_0402_50V7K 93.1K +-1% 0402
2
CSCOMP_2ph_CPU_R
2
Close to VCORE1 choke
1
U22@ PRZ23 PRZ43 @ PRZ44
PCZ14
DRVON [62]
4.75K_0402_1%
1
26.7K_0402_1% PCZ24 110_0402_1% 7.5K_0603_1%
1
PHZ02 2 1
49
48
47
46
45
44
43
42
41
40
39
38
37
0.1U_0402_25V6 CSP_1a_VGT_R [62]
PRZ24
2
220K_0402_5%_B25/50 4700K U42@ @
1
1
1 2 PRZ28 PRZ45
VSN_2ph
VSP_2ph
VSP_1b
VSN_1b
COMP_1b
ILIM_1b
CSN_1b
CSP_1b
IOUT_1b
EN
TAB
PSYS
VR_RDY
2
15K_0402_1% PCZ15 PUZ01 H_PROCHOT# [6,25,55,56] 12K_0402_1%
PRZ40
PRZ41
PRZ42
1 2
15P_0402_50V8J NCP81218MNTXG_QFN48_6X6 2 1
PRZ26 PRZ27 2 IOUT_2ph_CPU 1 36 PRZ46 PCZ25 CSN_1a_VGT_NTC
0.022U_0402_16V7K
0.01UF_0402_25V7K
165K_0402_1% 75K_0402_1% DIFFOUT_2ph_CPU 2 IOUT_2ph PWM_1b 35 49.9_0402_1% 470P_0402_50V7K
DIFFOUT_2ph DRVON
1
1 2 1 2 1 2 U22@ PRZ28 PCZ16 FB_2ph_CPU 3 34 SCLK_CPU 1 2 1 2
[62] CSP1_VCORE1 VIDSCLK [15]
Close to
2
FB_2ph SCLK
1
1
PRZ25 100K_0603_1% 7.32K_0402_1% 2200P_0402_50V7K COMP_2ph_CPU 4 33 ALERT#_CPU @ PRZ47 1 20_0402_5%
PCZ26
PCZ27
ILIM_2ph_CPU COMP_2ph ALERT# SDIO_CPU PRZ48 1 VIDALERT_N [15]
[62] CSP2_VCORE2 1
PRZ29
2
100K_0603_1%
PCZ17 @ PCZ18
1000P_0402_50V7K
1 2
CSCOMP_2ph_CPU
5
6 ILIM_2ph SDIO
32
31 VR_HOTL# PRZ49 1
2 10_0402_1%
2 100_0402_1%
VIDSOUT [15] U22@ PRZ50
133K_0402_1%
PHZ03VCC_GT choke
100K_0402_1%_B25/50 4250K
1000P_0402_50V7K
2
2
CSSUM_2ph_CPU 7 CSCOMP_2ph VR_HOT# 30 IOUT_1a_CPU 1 2 PRZ51
2
1 2 CSREF_2ph_CPU 8 CSSUM_2ph IOUT_1a 29 CSP_1a_VCORE 10_0402_5%
[62] CSN2_VCORE2 CSP2_2ph_CPU CSREF_2ph CSP_1a
PRZ30 U42@ 10_0402_1% 9 28 2 1 CSN_1a_VGT [62]
1 2 CSP1_2ph_CPU 10 CSP2_2ph CSN_1a 27 ILIM_1a_CPU
ROSC_COREGT
0.1U_0402_25V6
[62] CSN1_VCORE1 CSP1_2ph ILIM_1a

1
TSENSE_2ph_CPU_R 1 2 TSENSE_2ph_CPU 11 26 COMP_1a_CPU
ADDR_VBOOT
U42@
PRZ31 10_0402_1%
10K_0402_1%
10K_0402_1%
0.1U_0402_25V6
2200P_0402_50V7K
1000P_0402_50V7K
TSENSE_1ph
TSENSE_2ph COMP_1a
RSOC_SAUS
1
1
ICCMAX_2ph
1 2 12 25 1 2
PCZ32
ICCMAX_1a
ICCMAX_1b
PWM1_2ph
PWM2_2ph
VRMP VSN_1a
1
1
PCZ19 @ PRZ34 0_0402_5% PRZ35 PCZ28 3300P_0402_50V7-K
VRMP_CPU
@ PRZ32
PCZ20
@ PRZ33
+19VB_CPU
PWM_1a
1
VSN_1a_CPU_R
VSP_1a
0.1U_0402_25V6 1K_0402_1% 1 2 PCZ33
PCZ31
15P_0402_50V8J
2
2
1
PRZ36 2200P_0402_50V7K
PCZ21
PCZ30
VCC
2
1 2
1
1
PHZ04 61.9K_0402_1% PCZ22 PRZ52
PRZ56
52.3K_0402_1%
2
1000P_0402_50V7K 1K_0402_1% @ PRZ53
1
CSP1_VCORE1 1 2 PCZ23 VSN_1a_CPU
1 2 1 2 VSS_GT_SENSE [15]
2
2
13
14
1ROSC_SAUS_CPU 15
16
17
18
19
20
21
22
23
24
PRZ37 2.15K_0402_1% 100K_0402_1%_B25/50 4250K 0.01U_0402_50V7K
PRZ55
2
1
CSP2_VCORE2 1 2 PCZ29 0_0402_5%
2K_0402_1%
2
PRZ38 U42@ 2.15K_0402_1% 1000P_0402_50V7K
ICCMAX_2ph_CPU
ADDR_VBOOT_CPU
2
VCC_CPU
ICCMAX_1a_CPU
ICCMAX_1b_CPU
2
PRZ57 PRZ58
3
1 2 Close to VCORE1 MOS 2_0402_1% 4.32K_0402_1% @ PRZ59
3
+5VALW U22@ PRZ39 1 2 2 1VSP_1a_CPU_R 2 1 VCC_GT_SENSE [15] OCP for VCC_GT

1K_0402_1% +5VALW VSP_1a_CPU2
1ROSC_COREGT_CPU
1 2 1 0_0402_5%
24K_0402_1%
1
PCZ35 PRZ61
PRZ60
PCZ34 1000P_0402_50V7K 3.65K_0402_1%
1U_0603_10V6K @ PRZ63 0_0402_5%
2
TSENSE_1ph_CPU 1 2 TSENSE_1ph_CPU_R
1000P_0402_50V7K
PCZ36
24K_0402_1%
61.9K_0402_1%
1
1
Fsw for SA
2
PWM_1a_CPU [62] PHZ05
PRZ64
PRZ65
100K_0402_1%_B25/50 4250K
51.1K_0402_1%
97.6K_0402_1%
19.1K_0402_1%
35.7K_0402_1%
Fsw for CORE & GT
2
2
Close to VGT MOS
1
1
U22@ PRZ66
U42@ PRZ67
PRZ68
PRZ69
2
PRZ66 U42@
110K_0402_1%
If VCC_CORE not ready
can change PRZ69 to 51.1K for test.
PRZ67 U22@
75K +-1% 0402
PWM2_2ph_CPU [62]
4 PWM1_2ph_CPU [62] 4

https://shop62935598.taobao.com Issued Date 2019/06/20 Deciphered Date 2020/06/30 Title
PWR_CPU
WWW.AliSaler.Com
A B C D
A B C D
1 4
Main Func = CPUcore IA/GT/SA 2 3
@ PRI24
0.01_1206_1%
+19VB_CPU VCC_core (U42)
l
EMI@ PLI11
5A Z150 20M 1210_2P +19VB Loadline : 2.4m-ohm
2 1
2200P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
@ PJPI01
TDC 49A
33U_D2_25VM_R40M
0.1U_0402_25V6
1 1 2 1
2 1
33U_25V_M
Peak Current 70A
1
+ +
EMI@ PCI07
PCI01
PCI02
PCI03
PCI04
@EMI@ PCI05
EMI@ PCI06
@EMI@ PCI08
PCI13
PCI14
JUMP_43X79
l
OCP current 84A
Choke DCR 0.67 +-5%m ohm (7*7*4)
2
2@ 2
VCC_core (U22)
1 Loadline : 2.4m-ohm 1
+19VB_CPU
TDC 22A
2200P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
Peak Current 32A
0.1U_0402_25V6
e
U42@EMI@ PCI21
U42@EMI@ PCI22
@U42@EMI@ PCI27
@U42@EMI@ PCI28
OCP current 38A
U42@ PCI23
U42@ PCI24
U42@ PCI25
U42@ PCI26
1
1
Choke DCR 0.67 +-5%m ohm (7*7*4)
PRI02
2
2_0402_1%
1 2 VCC_VCORE1 U42@ PRI22
+5VALW 2_0402_1%
VCC_VCORE2
1 1 2
PCI10 PRI01 PCI09 +5VALW
1
1U_0402_16V6K 4.7_0603_1% 0.47U_0402_25V6K
PUI01
2
1 2 BST_VCORE1_R 1 2 U42@ PCI30 U42@ PRI21 U42@ PCI29

3 8 1U_0402_16V6K 4.7_0603_1% 0.47U_0402_25V6K
2
VCCD_VCORE1 15 VCC VIN 9 U42@ PUI02 1 2 BST_VCORE2_R 1 2
VCCD VIN 3 8
17 5 BST_VCORE1 PLI01 VCCD_VCORE2 15 VCC VIN 9
PHASE_VCORE1
1
16 THW N BOOT 7 0.15UH_NA__36A_20% VCCD VIN

[61,62] DRVON DISB# PHASE BST_VCORE2
PCI11 1 17 5 U42@ PLI02
[61] PWM1_2ph_CPU LX_VCORE1 PHASE_VCORE2
1
1U_0402_16V6K 2 PW M 11 1 4 16 THW N BOOT 7 0.15UH_NA__36A_20%
+VCC_CORE [61,62] DRVON
2
SMOD# SW 12 U42@ PCI31 1 DISB# PHASE
D
+5VALW SW 2 3 1U_0402_16V6K
[61] PWM2_2ph_CPU
2 PW M 11 LX_VCORE2 1 4
+VCC_CORE
2
4 SMOD# SW 12
CGND +5VALW SW
1
10 2 3
14 PGND PRI03 4
PGND CGND
1
13 6 4.7_1206_5% 10
19 GL NC 18 14 PGND U42@ PRI23
GL AGND 13 PGND 6 4.7_1206_5%
2
19 GL NC 18
NCP302045MNTXG_PQFN33_5X5 CSN1_VCORE1 [61] GL AGND
2
1
PCI12 NCP302045MNTXG_PQFN33_5X5 CSN2_VCORE2 [61]
2 2
1
680P_0603_50V8J
2
U42@ PCI32
CSP1_VCORE1 [61] 680P_0603_50V8J
2
CSP2_VCORE2 [61]
r
EMI@ PLG11
5A Z150 20M 1210_2P
2 1
VCCGT_B+ +19VB
@ PJPG01
2 1
2 1
JUMP_43X79
1 4
2 3
VCC_SA
o
InputCapacitor: @ PRG04
0.01_1206_1%
Loadline : 10.3m-ohm
10uF_0805_X5R_25V
VCCGT_B+ VCC_GT TDC 4A
Peak Current 6A
2200P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
U22 - 15W
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
33U_D2_25VM_R40M
0.1U_0402_25V6
1
Loadline : 3.1m-ohm OCP current 7A
1
1
+
Choke DCR 6.2 +-5%m ohm (5*5*3)
PCG01
PCG02
PCG03
PCG04
EMI@PCG05
EMI@ PCG06
@EMI@ PCG07
@EMI@ PCG08
PCG13
f
@ PJPA01
2
2
2
U22-15W 2 1
TDC 18A VCCSA_B+ +19VB
JUMP_43X39
Peak Current 31A
OCP current 37A
Choke DCR 0.67 +-5%m ohm (7*7*4) VCCSA_B+
1000P_0402_50V7K
2200P_0402_50V7K
1000P_0402_50V7K
3
1 4 3
10U_0603_25V6M
10U_0603_25V6M
0.1U_0402_25V6
2 3
1
PCA01
EMI@ PCA03
@EMI@ PCA06
PCA02
EMI@ PCA04
@EMI@ PCA05
@ PRA03
PRG02 PRA01 PCA07 0.01_1206_1%
2
2_0402_1% 2.2_0603_5% 0.47U_0402_25V6K
1 2 VCC_VGT1 1 2 BST_VCCSA_R 1 2
+5VALW
BST_VCCSA
1
PCG10 PRG01 PCG09 UG_VCCSA
y
1U_0402_16V6K 4.7_0603_1% 0.47U_0402_25V6K AONH36334
PUG01
2
1 2 BST_VGT1_R 1 2
3 8 Rds(on)=12.4~15.8m ohm
VCCD_VGT1 15 VCC VIN 9 PUA01 PQA01
VCCD VIN
1
NCP81253MNTBG_DFN8_2X2 AONH36334_DFN3X3A8-10
17 5 BST_VGT1 PLG01
D1
D1
D1
G1
THW N BOOT PHASE_VGT1
1
16 7 0.15UH_NA__36A_20% 1 8
l
[61,62] DRVON DISB# PHASE BST DRVH PLA01
PCG11 1
[61] PWM_1a_CPU
1U_0402_16V6K 2 PW M 11 LX_VGT1 1 4 [61] PWM_1b_CPU 2 7 10 9 LX_VCCSA 1 4 +VCC_SA
+VCC_GT
2
SMOD# SW 12 PW M SW D1 D2/S1
SW 2 3 3 6 2 3
[61,62] DRVON EN GND
4
G2
S2
S2
S2
CGND
1
1
10 4 5
PAD
14 PGND PRG03 +5VALW VCC DRVL 0.47UH_NA__12.2A_20%
8
13 PGND 6 4.7_1206_5% PRA02
1
19 GL NC 18 4.7_1206_5%
9
GL AGND PCA08
2
2
2.2U_0402_16V6K
2
NCP302045MNTXG_PQFN33_5X5 CSN_1a_VGT [61] SNB_VCCSA
1
1
n
PCG12
680P_0603_50V8J LX_VCCSA
2
PCA09
2
CSP_1a_VGT_R [61]
LG_VCCSA 680P_0603_50V7K
4 4
CSP_1b_VCCSA_R CSN_1b_VCCSA
[61] [61]

2019/06/20 2020/06/30 Title
O
PWR_CPUcore IA/GT/SA
A B C D
4
3
2
1
+VCC_CORE
2 1 2 1 2 1 2 1 2 1
2
1
PCI171 PCI161 PCI151 @PCI121 PCI101 +
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 47U_0603_6.3V6M 22U_0603_6.3V6M PCI186
330U_D2_2V_Y
+VCC_CORE
2 1 2 1 2 1 2 1 2 1 2
1
+
PCI172 PCI162 PCI152 @PCI122 PCI102
A
A
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 47U_0603_6.3V6M 22U_0603_6.3V6M @ PCI187

330U_D2_2V_Y
2 1 2 1 2 1 2 1 2 1 2 1
2
1
+
PCI173 PCI163 PCI153 @PCI123 PCI113 PCI103

1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 47U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M @ PCI188
330U_D2_2V_Y
2 1 2 1 2 1 2 1 2 1 2 1
2
1
+

1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 47U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M PCI189
330U_D2_2V_Y
2 1 2 1 2 1 2 1 2 1 2 1

1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 47U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1 2 1 2 1 2 1
PCI181 PCI176 PCI166 PCI156 @PCI126 PCI116 PCI106

1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 47U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1 2 1 2 1 2 1
PCI182 PCI177 PCI167 PCI157 @PCI127 PCI117 PCI107

2 1 2 1 2 1 2 1 2 1 2 1 2 1
Main Func = CPU/ VGA / SA MLCC
PCI183 PCI178 PCI168 PCI158 @ PCI128 PCI118 PCI108
O
2 1 2 1 2 1 2 1 2 1 2 1 2 1
4 X 330uF_D2
42 X 1uF_0201
10 X 47uF_0603
22 X 22uF_0603

WWW.AliSaler.Com
2 1 2 1 2 1 2 1 2 1 2 1 2 1
B
B

Total VCORE Output Capacitor:
n
+VCC_GT
2 1 2 1 2 1 2 1
l
PCG131 PCG121 PCG111 PCG101
1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1
@ PCG135 PCG122 PCG112 PCG102

1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1

22U_0603_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M PCG171
330U_D2_2V_Y
2 1 2 1 2 1 2 1
2
1
+
+VCC_GT
y
PCG172
@
22U_0603_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

330U_D2_2V_Y
2 1 2 1 2 1 2 1
2
1
+

22U_0603_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1
C
C
PCG126 PCG116 PCG106

1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1

1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
Issued Date
2 1 2 1 2 1
f PCG128 PCG118 PCG108
1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1

11X 1uF_0201
2 X 330uF_D2
1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1
23X 22uF_0603_X5R

1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2019/06/20
o
Total VCCGT Output Capacitor:
+VCC_CORE
+VCC_SA
r
2 1
Compal Secret Data
D
D
Deciphered Date
PCA101
22U_0603_6.3V6M
2 1
2 1 2 1
PCC03
22U_0603_6.3V6M @ PCA110 PCA102
2 1 1U_0201_6.3V6M 22U_0603_6.3V6M
PCC04 2 1 2 1
22U_0603_6.3V6M
@ PCA111 PCA103
2020/06/30
1U_0201_6.3V6M 22U_0603_6.3V6M
11 X 22uF_0603
2 1 2 1
2 1
@ PCA112 PCA104
PCI138 1U_0201_6.3V6M 22U_0603_6.3V6M
1U_0201_6.3V6M
2 1 2 1
2 1
@ PCA113 PCA105
PCI139 1U_0201_6.3V6M 22U_0603_6.3V6M
Total VCCSA Output Capacitor:
1U_0201_6.3V6M
Size
Title
Date:
2 1 2 1
2 1
@ PCA114 PCA106
PCI140 1U_0201_6.3V6M 22U_0603_6.3V6M
D
1U_0201_6.3V6M
2 1 2 1
2 1
@ PCA115 PCA107
PCI134 1U_0201_6.3V6M 22U_0603_6.3V6M
Document Number
1U_0201_6.3V6M
2 1 2 1
2 1
PCC01 PCA108
PCI135 22U_0603_6.3V6M 22U_0603_6.3V6M
1U_0201_6.3V6M 2 1
2 1
E
E
2 1 PCC02
+VCC_CORE
22U_0603_6.3V6M PCA109
e
PCI136 22U_0603_6.3V6M
1U_0201_6.3V6M
Sheet
2 1
2 1
PCA117
PCI137 22U_0603_6.3V6M
90
1U_0201_6.3V6M
2 1
PWR_CPU / VGA / SA MLCC
of
l
PCA118
22U_0603_6.3V6M
100
Rev
1.0
l
4
3
2
1
5 4 3 2 1
e l l D
r D C
f o
B
n l y B
5
O 4 3
2
Title
Size
Date:
Reserve for PWR
Document Number
1
Sheet 91 of
Rev
100
1.0
A
5 4 3 2 1
Main Func = VGA CORE
D D
10K_0402_1%
10K_0402_1%
32.4K_0402_1%
2
2
@ PRV02
VGA@ PRV04
VGA@ PRV05
+5VALW
1
VGA@
41
40
39
38
37
36
35
34
33
32
31
PUV01
TP
ISUMP_NB
ISUMN_NB
VSEN_NB
FB_NB
COMP_NB
PGOOD_NB
LGATE_NB
PHASE_NB
UGATE_NB
BOOT_NB
VGA@ PRV10 100K_0402_1%
2 1 1 30 BST2_VGA BST2_VGA [93]
VGA@ PRV09 100K_0402_1% NTC_NB BOOT2 VGA_CORE (M2-50)
UG2_VGA
2 1 2
IMON_NB UGATE2
29 UG2_VGA [93] TDC 30A
[46] SVI2_SVC
3
SVC PHASE2
28 LX2_VGA LX2_VGA [93] Peak Current(EDC) 60A
4 27 LG2_VGA LG2_VGA [93]
+5VALW OCP current 72A
VR_HOT_L LGATE2
@VGA@ PRV12 5 26
0_0402_5%
[46] SVI2_SVD SVD ISL62771HRTZ-T_TQFN40_5X5 VDDP VGA@ PRV13 FSW=300kHz
1 2 VDDIO_VGA 6 25 2 1
+1.8VGS VDDIO VDD 1_0603_5%
1U_0603_10V6K
1
VGA@ PRV14 0_0402_5% 7 24 LG1_VGA [93] LG1_VGA

[46] SVI2_SVT
1
C 1 2 @VGA@ PRV15 SVT LGATE1 C
1U_0603_10V6K
+3VGS 1 2ENABLE_VGA8 23 LX1_VGA [93] LX1_VGA
VGA@ PCV11
PCV12
DGPU_PW R_EN
2
VGA@ PCV10 0_0402_5% ENABLE PHASE1

[11,44]
2
0.1U_0402_25V6K PW RGD_VGA 1 2 VGA_POK 9 22 UG1_VGA [93] UG1_VGA
PWROK UGATE1
IMON_VGA 10 BST1_VGA
VGA@
2 1 @VGA@ PRV37 21 [93]
0_0402_5% IMON BOOT1
BST1_VGA
PGOOD
VGA@ PRV16
+3VS
ISUMN
ISUMP
COMP
ISEN2
ISEN1
VGA_POK
VSEN
133K_0402_1%
NTC
RTN
<44> VGA_POK
2 1 FB
1
VGA@ PCV20 VGA@ PRV18 VGA@ PRV19
11
12
13
14
15
16
17
18
19
1000P_0402_50V7K 150K_0402_1% 13.3K_0402_1% 20

2 1 2 1 @ PRV17 @VGA@ PRV20
100K_0402_1%
0_0402_5%
2
ISEN2_VGA PW RGD_VGA 1 2
2 1 [93]
[9,65] DGPU_PW ROK
@ PHV01 VGA@ PCV22
470K_0402_5%_TSM0B474J4702RE 0.22U_0402_10V6K
2 1 ISEN2_VGA
VGA@ PCV23
0.22U_0402_10V6K
VSUM-_VGA 2 1 ISEN1_VGA
VGA@ VGA@ VGA@ PCV26

ISEN1_VGA PCV25 PRV26 180P_0402_50V8J @ PRV27
[93] 1000P_0402_50V7K 301_0402_1% 121K_0402_1%
VSUM+_VGA VSUM+_VGA 1 2 1 2 1 2 1 2
[93]
330P_0402_50V7K
@ PCV27
VGA@ VGA@
2.61K_0402_1%
1
VGA@ PRV29 PRV31 PCV29

10K_0402_5%_ERTJ0ER103J
VGA@ PRV28
0.033U_0402_16V7K
0.15U_0402_16V7K
1.37K_0402_1% 22.1K_0402_1% 390P_0402_50V7K

11K_0402_1%
1
1 2 1 2 1 2
2
1
1
VGA@ PRV30
VGA@ PCV28
VGA@ PCV30
VGA@ VGA@
1 2
PRV32 PCV31
2
2
VGA@ PHV02
2K_0402_1% 330P_0402_50V
2
1 2 1 2
B B
VGA@ PRV33
2
665_0402_1%
VSUM-_VGA VSUM-_VGA 1 2
[93]
@VGA@ PRV34
1
VGA@ @ PRV35 0_0402_5%

PCV32 100_0402_1% 2 1
0.1U_0402_25V6 1 2 1 2 VCCSENSE_VGA [46]
2
@ PCV33
820PF_0402_50V7K 2 1
VSSSENSE_VGA [46]
@VGA@ PRV36
0.01U_0402_50V7K
1
VGA@ PCV34
0_0402_5%
2
A A
https://shop62935598.taobao.com Security Classification Compal Secret Data Compal Electronics, Inc.

WWW.AliSaler.Com 5 4 3
2
Size
Date:
Document Number
PWR_VGA_CORE

1
Sheet 92 of 100
Rev
1.0
5 4 3 2 1
Main Func = VGA CORE
l
@ PJPV01
2 1
2 1
+19VB_VGA JUMP_43X79
VGA@EMI@ PLV11
l
5A Z150 20M 1210_2P
2 1 +19VB
2200P_0402_50V7K
2200P_0402_50V7K
4.7U_0603_25V6K
4.7U_0603_25V6K
UG2_VGA UG2_VGA
0.1U_0402_25V6K
0.1U_0402_25V6K
[92]
10U_0603_25V6M
10U_0603_25V6M
1
1
VGA@ PCV01
VGA@ PCV02
VGA@ PCV03
VGA@ PCV35
@VGA@EMI@ PCV04
@VGA@EMI@ PCV05
VGA@EMI@ PCV06
VGA@EMI@ PCV07
VGA@ PQV03
G1
D1
D AON6994_DFN5X6D-8-7 D
2
7
D2/S1
e
G2
S2
S2
S2
VGA@ PLV02
6
0.22UH_24A_20%_7X7X4_MOLDING
LX2_VGA 4 1
LG2_VGA LG2_VGA
+VGA_CORE
[92] VGA@ PRV03 3 2
@EMI@ [92] ISEN2_VGA 10K_0402_1%
1
UG2_VGA UG2_VGA PRV06 ISEN2_VGA 2 1
[92] 4.7_1206_5%
2
VGA@ PRV07
2
LX2_VGA PCV08 VGA@ [92] VSUM+_VGA 3.65K_0603_1%
VGA@ PQV04 @EMI@ VSUM+_VGA 2 1
[92] 0.22U_0402_16V7K
G1
D1
1 2
AON6994_DFN5X6D-8-7 PCV09
680P_0603_50V7K VGA@ PRV08
2
7 @VGA@ 1_0402_1%
D
D2/S1 PRV01 VSUM-_VGA 2 1
2
0_0603_5%
[92] VSUM-_VGA
G2
S2
S2
S2
1
3
BST2_VGA
VGA_CORE (M2-50)
TDC 30A
LG2_VGA
Peak Current(EDC) 60A
OCP current 72A
BST2_VGA
+19VB_VGA
r
[92]
LG2_VGA
[92] FSW=300kHz
UG1_VGA UG1_VGA
2200P_0402_50V7K
2200P_0402_50V7K
4.7U_0603_25V6K
4.7U_0603_25V6K
C C
[92]
0.1U_0402_25V6
0.1U_0402_25V6
10U_0603_25V6M
10U_0603_25V6M
1
1
VGA@ PCV13
VGA@ PCV14
VGA@ PCV15
VGA@ PCV36
@VGA@EMI@ PCV16
@VGA@EMI@ PCV17
VGA@EMI@ PCV18
PCV19
G1
D1
VGA@ PQV01
2
7
o
AON6994_DFN5X6D-8-7
D2/S1
VGA@EMI@
G2
S2
S2
S2
3
6
VGA@ PLV01
0.22UH_24A_20%_7X7X4_MOLDING
f
LG1_VGA LG1_VGA
LX1_VGA 4 1 +VGA_CORE
[92] VGA@ PRV22 3 2
@EMI@ [92] ISEN1_VGA 10K_0402_1%
1
PRV23 ISEN1_VGA 2 1
UG1_VGA UG1_VGA
+VGA_CORE 4.7_1206_5%
2
[92] VGA@ PRV24
PCV21 VGA@ [92] VSUM+_VGA 3.65K_0603_1%
2
@EMI@ VSUM+_VGA 2 1
0.22U_0402_16V7K
1 2
LX1_VGA PCV24
G1
D1
VGA@ PQV02 [92] 680P_0603_50V7K VGA@ PRV25
2
1 1 @VGA@ 1_0402_1%
AON6994_DFN5X6D-8-7 7 PRV21 VSUM-_VGA 2 1
560U_D2_2VM_R4.5M
560U_D2_2VM_R4.5M
2
+ + D2/S1
VGA@ PCV171
VGA@ PCV172
0_0603_5%
[92] VSUM-_VGA
G2
S2
S2
S2
BST1_VGA 1
2 2
6
y LG1_VGA
For VGACORE BST1_VGA
l
[92]
B B
LG1_VGA
[92]
O n Security Classification
Compal Secret Data
Deciphered Date 2020/06/30 Title
Size
Date:
Document Number
GPU_Decoupling

Rev
1.0
A
5 4 3 2 1
A B C D
Main Func = +1.35VGPUP
+3VS +1.35VGPUP
TDC 6 A
Peak Current 7.8A
e l l 1
1
@VGA@
PRW05
OCP Current 10 A Fix by IC
100K_0402_5% TYP MAX
VGA@ PRW06 VGA@ PCW12
Choke DCR 11.0mohm , 12.0mohm
2
10_0402_1% 0.1U_0402_10V6K
BST_+1.35VGPU
1 2 BST_+1.35VGPU_R 1 2
D
@VGA@EMI@ PLW11
5A_Z120_25M_0805_2P VGA@ @ PJPW02
1 2 PUW01 1 2
+1.35V_MEM_GFX
1
1 2
RT6226AGQUF_UQFN12_3X3 +1.35VGPUP
VGA@ PLW01 JUMP_43X118
PGOOD
BOOT
@ PJPW01 1UH_6.6A_20%_5X5X3_M
1 2 +19VB_+1.35VGPU 5 2 LX_+1.35VGPU 1 2
+19VB VIN LX +1.35VGPUP
JUMP_43X39
10U_0603_25V6M
10U_0603_25V6M
0.1U_0402_25V6
1000P_0402_50V7K
1000P_0402_50V7K
2200P_0402_50V7K
1
@VGA@ PCW14
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
10 330P_0402_50V7K
@VGA@EMI@ PCW15
@VGA@EMI@ PCW16
VGA@EMI@ PCW01
VGA@EMI@ PCW02
VGA@ PCW03
VGA@ PCW04
1
FB @VGA@EMI@
VGA@ PCW05
VGA@ PCW06
VGA@ PCW07
VGA@ PCW08
@VGA@ PCW17
@VGA@ PCW18
@VGA@ PCW19
@VGA@ PCW20
+5VALW
2
r
6 11 2 1 PRW07
2
EN BYP VGA@ PRW11 4.7_1206_5%
2
1
12 9 2.2_0402_1%
ILMT VCC
PGND
AGND
@VGA@ PRW13
1U_0402_10V6K
1U_0402_10V6K
2
1
1
1K_0402_1%
NC
VGA@ PCW10
VGA@ PCW11
Vfb=0.6
SNUB_+1.35VGPU
2 2
R1
LIMT_+1.35VGPU
2
4
3
FB__+1.35VGPU 1 2
LX_+1.35VGPU
VGA@ PRW09
1
39.2K_0402_1%
VGA@ PRW01 VGA@ PRW10
1
o
0_0402_5% @VGA@EMI@ 31.6K_0402_1%
1 2 EN_+1.35VGPU PCW13
R2
[9,64] DGPU_PWROK 680P_0603_50V7K
2
1
@VGA@ PCW09
VGA@ PRW02 0.1U_0402_25V6 +3VALW
1M_0402_1%
2
f
2
PRW03
@VGA@
0_0402_5%
2
1
PRW04
@VGA@
0_0402_5%
2
n l y 3
WWW.AliSaler.Com A
O B
Compal Secret Data
Deciphered Date
C
2020/06/30 Title
Size
Date:
Document Number
PWR_+1.35VGPUP

D
Sheet 94 of 100
Rev
1.0
4
5 4 3 2 1
e l l D
r D C
Reserve
f o
B
n l y B
5
O 4 3
2
Title
Size
Date:
Reserve for PWR
Document Number

1
Sheet 95 of
Rev
100
1.0
A
5 4 3 2 1
e l l D
r D C
Reserve
f o
B
n l y B
5
O
WWW.AliSaler.Com 4 3
2
Title
Size
Date:
Reserve for PWR
Document Number

1
Sheet 96 of
Rev
100
1.0
A
5 4 3 2 1
e l l D
r D C
Reserve
f o
B
n l y B
5
O 4 3
2
Title
Size
Date:
Reserve for PWR
Document Number

1
Sheet 97 of
Rev
100
1.0
A
5 4 3 2 1
e l l D
r D C
Reserve
f o
B
n l y B
5
O
WWW.AliSaler.Com 4 3
2
Title
Size
Date:
Reserve for PWR
Document Number

1
Sheet 98 of
Rev
100
1.0
A
5 4 3 2 1
e l l D
r D C
Reserve
f o
B
n l y B
5
O 4 3
2
Title
Size
Date:
Reserve for PWR
Document Number

1
Sheet 99 of
Rev
100
1.0
A
5 4 3 2 1
l
V ersion Change L ist ( P. I. R . L ist )
D
Item
1.
2.
Page#
P84-PWR_CHARGER
P84-PWR_CHARGER
D ate
2018
06/12
2018
06/12
R eq u e s t
O w n er
Compal
Compal
Iss u e
D e s c rip t io n
Vendor suggest
Downsize
S o lu t io n
D e s c rip t io n
Change the PRB11 from 2Ohm to 1Ohm
Change the PCB06 and PCB18 to 0.47U_0402
e l R ev.
X01
X01
D
D
2018
3. P84-PWR_CHARGER 06/12 Compal Vendor suggest Change the PCB11 to 0.33U
X01
2018
4. P89-PWR_CPU_Stage 06/14 Compal Downsize PCA07, PCG09, PCI09, PCI29 change to 0.47U_0402 X01
r
C C
5. P92-PWR_ 2018 Change PCV30 to 0.15U_0402
VGA_CORE(ISL62771) 06/14 Compal
Downsize X01
Change PCV32 to 0.1U_0402
o
2018 Compal Factory suggest Change the PDM01 to SCS00000Z00 X01
6. P86-PWR_1.2V_DDR 07/05
f
2018
7. P83-BATT CONN 07/05 Compal ESD request Change the PD5,PD6 to SCA00002A00 X01
2018
8. P84-PWR_CHARGER 07/09 Compal Modify for AC detect Change the PRB10 from 47K to 52.3K
X01
9. P90-PWR_CPU MLCC 2018 move PCI134,PCI135,PCI136,PCI137,PCI138,

Compal Change for PI simulat i on X01
y
07/09 PCI139,PCI140 to +VCC_CORE_GT
P84-PWR_CHARGER 2018
07/11 Compal Factory request Add PCB71, PCB07 change to 1U_0402
10. X01
l
B B
2018
11. P92-PWR_VGA_CORE
07/17 Compal Downsize Change the PCV30 to SE000011G00 0.15U 16V
X01
n
Change the PRZ25, PRZ29 to SD014100380 100K
2018 Compal Change the PRZ23 to SD034255200 25.5K
12. P88-PWR_CPU 07/17 Change for CPU EA test X01
WWW.AliSaler.Com 5
O 4 3
2
Title
Size
Date:
PWR P.I.R
Document Number

1
Sheet 100 of
Rev
100
1.0
A
5 4 3 2 1
V ersion Change L ist ( P. I. R . L ist )
e l l D
r D C
f o
B
n l y B
5
O 4 3
Compal Secret Data
2
Title
Size
Date:
EE_Change list
Document Number
LA-G716P
1
Sheet 101 of 101
Rev
1.0
A

Dell 3590 La-G716p

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A B C D E

PCB NO : DA8001K6000 (SBDR) REV : 1.0 (A00) ZZZ

DA8001K6100 (NBDR) PCB_SBDR_R3_GCE@ PCB_NBRD_R3_GCE@

BOM P/N : ZZZ ZZZ

SBDR-DIS NBDR-DIS X4E DAZ2QM00102 DAZ2RF00302

431AJ431L51 431AJ431L01 X4EAJ431L51(N3) PCB_SBDR_R3_TRI@ PCB_NBRD_R3_TRI@

PCB_NBDR_R1@: PCB MB DAZ for NBDR

VRAM(GDDR5)* 2 AMD R520/R530

VGA # VGA converter DP x 2 # DP re-driver DDI x 2

BGA 1528 balls

*Pentium/Celeron Only Card reader

5V@3A TPS25810 Touch screen USB2.0 x 1 (Port8) USB2.0 x 1

M.2 SSD (NVMe) PCIe x 4

ODD SATA x 1 Gen1

Charger Daughter board

Keyboard PWM FAN Thermal sensor

S0 (Full ON) / M0 HIGH HIGH HIGH ON ON ON ON

S5 (SOFT OFF) / M3 LOW LOW LOW ON OFF OFF OFF

USB3.0 PCIE SATA DESTINATION

USB3.0-4 PCIE-4 TypeC

PCIE-11 SATA-0 SATA HDD

FUSE 1.5A_24V +VCCST

PJPW01 DGPU_PW ROK PJPW02

0ohm 0603 0ohm 0603

PJP2501 SIO_SLP_S4 # PJP2502

Timing Diagram for S5 to S0 mode CPU +VCC_CORE

+RTC_SOC PCH PCH_RSMRST#_Q

AND EM5209 +VCCSTG

https://shop62935598.taobao.com PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

L5,N5 are required for CFL U43e only.

COMPENSATION FOR OPIRCOMP

Security Classification Compal Secret Data Compal Electronics, Inc.

128Mb Flash ROM

TPM_ID CP20 CNV_WT_RCOMP_1 EMMC GPP_F14/EMMC_DATA2 CM19 +3VALW_PCH

PROJECT_ID2 CG17 CP18 GPP_H21 2 1

BOARD_ID2 CM14 GPP_C10/UART0_RTS# GPP_F20/EMMC_RCLK CP16

9 of 20 COMPENSATION FOR EMMC_RCOMP GPP_H23 2 @ 1

B Min trace width=10 mils, Spacing=12 mils B

1 CNV@ 2 CNV_RF_RESET# RC201

CPU ID BOARD_ID2 BOARD_ID1

WHL-U(Reserved) --- RC72

RC78,RC81,RC85,RC88 close to Device

10M_0402_5% 20ppm / 9pF

2 [58] PCH_RSMRST# IN1 PCH_RSMRST#_Q

UC5 change CPN & UC5

Description only MC74VHC1G08EDFT2G_SC70

Security Classification Compal Secret Data Compal Electronics, Inc.

Weak Int. PD. RC114 DIS@

Size Document Number

GPIO DEVICE CONTROL SATA_LED# 1 2

Security Classification Compal Secret Data Compal Electronics, Inc.

+3VALW_PCH CB22 BT12

CA18 BR12 27 +1.05V_PRIM

+VCC_CORE +VCC_CORE +VCC_GT

Security Classification Compal Secret Data Compal Electronics, Inc.

UC1R UC1S UC1T

WHL-U42_BGA1528 WHL-U42_BGA1528 WHL-U42_BGA1528

1 : (default) PEG Train immediately

Main Func = DDR

DDR_A_D45 191 192

RD8 193 194 DDR_A_D40

201 DM5_n/DBI5_n DQS5_t 202

DDR_A_D44 203 VSS69 VSS70 204 DDR_A_D47