NTF3055L108,

NVF3055L108

MOSFET – Power,
N-Channel, Logic Level,
SOT-223
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3.0 A, 60 V
Designed for low voltage, high speed switching applications in power 3.0 A, 60 V
supplies, converters and power motor controls and bridge circuits.
RDS(on) = 120 mW
Features
• NVF Prefix for Automotive and Other Applications Requiring N−Channel
Unique Site and Control Change Requirements; AEC−Q101 D
Qualified and PPAP Capable
• These Devices are Pb−Free and are RoHS Compliant

Applications G
• Power Supplies
• Converters S
• Power Motor Controls
• Bridge Circuits
4
SOT−223
MAXIMUM RATINGS (TC = 25°C unless otherwise noted) CASE 318E
1
Rating Symbol Value Unit 2 STYLE 3
3
Drain−to−Source Voltage VDSS 60 Vdc
Drain−to−Gate Voltage (RGS = 1.0 MW) VDGR 60 Vdc MARKING DIAGRAM

Gate−to−Source Voltage
− Continuous VGS ± 15 Vdc
3055L = Device Code AYW
− Non−repetitive (tp ≤ 10 ms) ± 20 Vpk
A = Assembly Location 3055LG
Drain Current Adc Y = Year G
− Continuous @ TA = 25°C (Note 1) ID 3.0 W = Work Week
− Continuous @ TA = 100°C (Note 2) ID 1.4 Apk G = Pb−Free Package
− Single Pulse (tp ≤ 10 ms) IDM 9.0 (Note: Microdot may be in either location)
Total Power Dissipation @ TA = 25°C (Note 1) PD 2.1 Watts
Total Power Dissipation @ TA = 25°C (Note 2) 1.3 Watts
PIN ASSIGNMENT
Derate above 25°C 0.014 W/°C
4 Drain
Operating and Storage Temperature Range TJ, Tstg −55 °C
to 175

Single Pulse Drain−to−Source Avalanche EAS 74 mJ

Energy − Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 5.0 Vdc,
IL(pk) = 7.0 Apk, L = 3.0 mH, VDS = 60 Vdc)
1 2 3
Thermal Resistance °C/W Gate Drain Source
−Junction−to−Ambient (Note 1) RqJA 72.3
−Junction−to−Ambient (Note 2) RqJA 114
Maximum Lead Temperature for Soldering TL 260 °C ORDERING INFORMATION
Purposes, 1/8″ from case for 10 seconds See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.

© Semiconductor Components Industries, LLC, 2016 1 Publication Order Number:

May, 2019 − Rev. 9 NTF3055L108/D
 NTF3055L108, NVF3055L108

1. When surface mounted to an FR4 board using 1″ pad size, 1 oz.

(Cu. Area 1 in2).
2. When surface mounted to an FR4 board using minimum recommended pad
size, 2 oz. (Cu. Area 0.272 in2).

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2
 NTF3055L108, NVF3055L108

ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)

Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage (Note 3) V(BR)DSS Vdc
(VGS = 0 Vdc, ID = 250 mAdc) 60 68 −
Temperature Coefficient (Positive) − 68 − mV/°C

Zero Gate Voltage Drain Current IDSS mAdc

(VDS = 60 Vdc, VGS = 0 Vdc) − − 1.0
(VDS = 60 Vdc, VGS = 0 Vdc, TJ = 150°C) − − 10
Gate−Body Leakage Current (VGS = ± 15 Vdc, VDS = 0 Vdc) IGSS − − ± 100 nAdc
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage (Note 3) VGS(th) Vdc
(VDS = VGS, ID = 250 mAdc) 1.0 1.68 2.0
Threshold Temperature Coefficient (Negative) − 4.6 − mV/°C

Static Drain−to−Source On−Resistance (Note 3) RDS(on) mW

(VGS = 5.0 Vdc, ID = 1.5 Adc) − 92 120

Static Drain−to−Source On−Resistance (Note 3) VDS(on) Vdc

(VGS = 5.0 Vdc, ID = 3.0 Adc) − 0.290 0.43
(VGS = 5.0 Vdc, ID = 1.5 Adc, TJ = 150°C) 0.250 −

Forward Transconductance (Note 3) (VDS = 7.0 Vdc, ID = 3.0 Adc) gfs − 5.7 − Mhos

DYNAMIC CHARACTERISTICS
Input Capacitance Ciss − 313 440 pF
(VDS = 25 Vdc, VGS = 0 V,
Output Capacitance Coss − 112 160
f = 1.0 MHz)
Transfer Capacitance Crss − 40 60

SWITCHING CHARACTERISTICS (Note 4)

Turn−On Delay Time td(on) − 11 25 ns
Rise Time (VDD = 30 Vdc, ID = 3.0 Adc, tr − 35 70
VGS = 5.0 Vdc,
Turn−Off Delay Time RG = 9.1 W) (Note 3) td(off) − 22 45
Fall Time tf − 27 60
Gate Charge QT − 7.6 15 nC
(VDS = 48 Vdc, ID = 3.0 Adc,
Q1 − 1.4 −
VGS = 5.0 Vdc) (Note 3)
Q2 − 4.0 −

SOURCE−DRAIN DIODE CHARACTERISTICS

Forward On−Voltage (IS = 3.0 Adc, VGS = 0 Vdc) VSD Vdc
(IS = 3.0 Adc, VGS = 0 Vdc, − 0.87 1.0
TJ = 150°C) (Note 3) − 0.72 −
Reverse Recovery Time trr − 35 − ns

(IS = 3.0 Adc, VGS = 0 Vdc, ta − 21 −

dIS/dt = 100 A/ms) (Note 3) tb − 14 −
Reverse Recovery Stored Charge QRR − 0.044 − mC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2.0%.
4. Switching characteristics are independent of operating junction temperatures.

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 NTF3055L108, NVF3055L108

TYPICAL ELECTRICAL CHARACTERISTICS

6 6
VGS = 3.4 V VDS > = 10 V
ID, DRAIN CURRENT (AMPS)

ID, DRAIN CURRENT (AMPS)

5 VGS = 3.5 V 5

VGS = 4.5 V VGS = 3.2 V

4 4

VGS = 6 V
3 VGS = 3 V 3
TJ = 100°C
2 VGS = 10 V 2
VGS = 2.8 V
TJ = 25°C
1 VGS = 2.5 V 1
TJ = −55°C
0 0
0 0.5 1 1.5 2 2.5 3 1 1.5 2 2.5 3 3.5 4 4.5 5
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)

0.16 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 0.16

VGS = 5 V VGS = 10 V
TJ = 100°C
0.14 0.14

0.12 0.12 TJ = 100°C

TJ = 25°C
0.1 0.1
TJ = 25°C
0.08 0.08
TJ = −55°C
0.06 0.06 TJ = −55°C

0.04 0.04

0.02 0.02
0 1 2 3 4 5 6 0 1 2 3 4 5 6
ID, DRAIN CURRENT (AMPS) ID, DRAIN CURRENT (AMPS)

Figure 3. On−Resistance vs. Gate−to−Source Figure 4. On−Resistance vs. Drain Current and
Voltage Gate Voltage

2 10000
ID = 1.5 A VGS = 0 V
RDS(on), DRAIN−TO−SOURCE RESISTANCE

1.8 VGS = 5 V
TJ = 150°C
1000
IDSS, LEAKAGE (nA)

1.6

1.4
(NORMALIZED)

100
1.2
TJ = 100°C
1
10
0.8

0.6 1
−50 −25 0 25 50 75 100 125 150 175 0 10 20 30 40 50 60
TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

Figure 5. On−Resistance Variation with Figure 6. Drain−to−Source Leakage Current

Temperature vs. Voltage

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4
 NTF3055L108, NVF3055L108

TYPICAL ELECTRICAL CHARACTERISTICS

VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)

VDS = 0 V VGS = 0 V TJ = 25°C
1000
QT
5
C, CAPACITANCE (pF)

800 Ciss VGS

4 Q1
600 Q2
3
Crss
400 Ciss
2
Coss
200
1 ID = 3 A
Crss
TJ = 25°C
0 0
10 5 VGS 0 VDS 5 10 15 20 25 0 1 2 3 4 5 6 7 8
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE Qg, TOTAL GATE CHARGE (nC)
(VOLTS)
Figure 7. Capacitance Variation Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
1000 3.2
VDS = 30 V VGS = 0 V
ID = 3 A 2.8
IS, SOURCE CURRENT (AMPS)
TJ = 25°C
VGS = 5 V
2.4
100
t, TIME (ns)

tr 2
1.6
tf
td(off) 1.2
10
td(on)
0.8

0.4

1 0
1 10 100 0.54 0.58 0.62 0.66 0.7 0.74 0.78 0.82 0.86 0.9
RG, GATE RESISTANCE (W) VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)

Figure 9. Resistive Switching Time Variation Figure 10. Diode Forward Voltage vs. Current
vs. Gate Resistance
EAS, SINGLE PULSE DRAIN−TO−SOURCE

10 80
100 ms ID = 7 A
70
ID, DRAIN CURRENT (AMPS)

AVALANCHE ENERGY (mJ)

1 ms
1 60
10 ms
50

0.1 40
VGS = 20 V dc 30
SINGLE PULSE
0.01 TC = 25°C 20
RDS(on) LIMIT
THERMAL LIMIT 10
0.001 PACKAGE LIMIT
0
0.1 1 10 100 1000 25 50 75 100 125 150 175
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) TJ, STARTING JUNCTION TEMPERATURE (°C)

Figure 11. Maximum Rated Forward Biased Figure 12. Maximum Avalanche Energy vs.
Safe Operating Area Starting Junction Temperature

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5
 NTF3055L108, NVF3055L108

TYPICAL ELECTRICAL CHARACTERISTICS

100
r(t), EFFECTIVE TRANSIENT THERMAL

D = 0.5

0.2
RESPONSE RESISTANCE

10 0.1
0.05
0.02
1
0.01

0.1

Single Pulse
0.01
0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
t, TIME (s)

Figure 13. Thermal Response

ORDERING INFORMATION
Device Package Shipping†
NTF3055L108T1G SOT−223 (TO−261)
1000 / Tape & Reel
(Pb−Free)

NVF3055L108T1G SOT−223 (TO−261) 1000 / Tape & Reel

(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.

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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS

SOT−223 (TO−261)
CASE 318E−04
ISSUE R
SCALE 1:1 DATE 02 OCT 2018

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98ASB42680B Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: SOT−223 (TO−261) PAGE 1 OF 2

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.

© Semiconductor Components Industries, LLC, 2018 www.onsemi.com

 SOT−223 (TO−261)
CASE 318E−04
ISSUE R
DATE 02 OCT 2018

STYLE 1: STYLE 2: STYLE 3: STYLE 4: STYLE 5:

PIN 1. BASE PIN 1. ANODE PIN 1. GATE PIN 1. SOURCE PIN 1. DRAIN
2. COLLECTOR 2. CATHODE 2. DRAIN 2. DRAIN 2. GATE
3. EMITTER 3. NC 3. SOURCE 3. GATE 3. SOURCE
4. COLLECTOR 4. CATHODE 4. DRAIN 4. DRAIN 4. GATE

STYLE 6: STYLE 7: STYLE 8: STYLE 9: STYLE 10:

PIN 1. RETURN PIN 1. ANODE 1 CANCELLED PIN 1. INPUT PIN 1. CATHODE
2. INPUT 2. CATHODE 2. GROUND 2. ANODE
3. OUTPUT 3. ANODE 2 3. LOGIC 3. GATE
4. INPUT 4. CATHODE 4. GROUND 4. ANODE

STYLE 11: STYLE 12: STYLE 13:

PIN 1. MT 1 PIN 1. INPUT PIN 1. GATE
2. MT 2 2. OUTPUT 2. COLLECTOR
3. GATE 3. NC 3. EMITTER
4. MT 2 4. OUTPUT 4. COLLECTOR

GENERIC
MARKING DIAGRAM*

AYW
XXXXXG
G
1

A = Assembly Location
Y = Year
W = Work Week
XXXXX = Specific Device Code
G = Pb−Free Package
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98ASB42680B Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: SOT−223 (TO−261) PAGE 2 OF 2

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.

© Semiconductor Components Industries, LLC, 2018 www.onsemi.com

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A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
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