A Bridgeless Power Factor Correction
Using Cuk Converter
R. Karthigayini
PG scholar/ EEE Department
SNS College of Engineering, Coimbatore, India
Karthigayini29@gmail.com
Abstract: In this proposed project a new efficient bridgeless
Cuk rectifier is used for Power factor correction (PFC). It has
only two semiconductor switches in the current flowing path.
During each interval of the switching cycle it result in less
conduction losses and an improved thermal management
compared to the conventional Cuk PFC rectifier. To achieve
almost unity power factor and low total harmonic distortion of
input current, the topologies are designed to work in
discontinuous conduction mode (DCM). The DCM has additional
advantage such as zero-current turn-on in the power switches,
zero current turn-off in the output diode.
Index Terms - Bridgeless rectifier, Cuk converter, low
conduction losses, power factor correction (PFC).
I. INTRODUCTION
For power supplies with active power factor
correction (PFC) technique are becoming necessary for many
types of electronic equipment to meet harmonic regulations.
Most of the PFC rectifiers utilize a boost converter at their
front end. A conventional PFC technique has lower efficiency
because of significant losses in the diode bridge. A
conventional PFC Cuk rectifier is shown in fig 1. The current
flows through two rectifier bridge diodes and the power switch
(Q) during the switch ON-time, and through two rectifier
bridge diodes and the output diodes (D0) during the switch
OFF- time.
During each switching cycle, the current flows
through three semiconductor devices. As a result, a significant
conduction loss, caused by the forward voltage drop across the
bridge diode. In a bridgeless PFC circuits, where the number
of semiconductors generating losses will be reduced by
eliminating the full bridge input diode rectifier. A bridgeless
PFC rectifier allows the current to flow through a minimum
number of switching devices compared to the conventional
Cuk rectifier. It also reduces the converter conduction losses
and which improves the efficiency and reducing the cost. A
bridgeless power factor correction rectifier is introduced to
improve the rectifier power density and/or to reduce noise
emission via soft-switching techniques or coupled magnetic
topologies. The Cuk converter has several advantages in
power factor correction applications, such as easy
implementation of transformer isolation, natural protection
against inrush current occurring at start-up or overload current,
lower input current ripple, and less electromagnetic
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D. Gokilapriya
Associate professor/EEE Department
SNS College of Engineering, Coimbatore, India
priyaduraiswamy@gmail.com
interference(EMI) associated with discontinuous conduction
mode topology.
Fig 1. Conventional Cuk Rectifier
Thus for applications, which require a low current
ripple at the input and output ports of the converter, Cuk
converter is efficient. In this paper, two topologies of
bridgeless Cuk power factor correction rectifiers are proposed.
This proposed rectifier is compared based on driver circuits,
gain capability, harmonics, component count, and efficiency.
II. PROPOSED BRIDGELESS CUK POWER FACTOR
CORRECTION RECTIFIERS
The two bridgeless power factor correction rectifiers
are shown in fig 2. The proposed topology is formed by
connecting two dc-dc Cuk converters. Note that there are one
or two semiconductors in current flowing path. Hence, the
current stresses in the active and passive switches are further
reduced and the circuit efficiency is improved compared to the
conventional Cuk rectifier. Here, the output voltage bus is
always connected to the input ac line through the slow-
recovery diodes Dp and Dn.
The proposed bridgeless rectifiers of fig 2. Consists
of two semiconductor switches (Q1 and Q2). However, the two
semiconductor switches can be driven by the same control
circuitry. Compared to conventional Cuk converter topology,
the structure of proposed topologies utilizes additional
inductor, which is often described as a disadvantage in terms
of size and cost. However, a better thermal performance can
be achieved with the two inductors compared to a single
inductor.
 (a)
(b)
Fig 2. Proposed bridgeless Cuk PFC rectifiers. (a) Type 1. (b)
Type 2.
It should be mentioned here that the three inductors
in the proposed topologies can be coupled on same magnetic
core allowing considerable size and cost reduction.
Additionally, the “near zero-ripple-current” condition at input
or output port of the rectifier can be achieved without
compromising performance.
III. PRINCIPLE OF OPERATION
The proposed bridgeless type 2 Cuk rectifier of fig
2(b) will be considered in this paper. Type 1 is similar to type
2, except for the output stage stresses. The converter is
operating at a steady state in addition to the following
assumptions: pure sinusoidal input voltage, ideal lossless
components, and all ripples are negligible during the switching
period Ts. Here, the output filter capacitor C0 has a large
capacitance such that the voltage across it is constant over the
entire line period.
The operational circuits during positive and negative
half-line period for the proposed bridgeless cuk rectifiers of
fig 2(a)&(b) are shown in fig 3 & 4. Note that by refering fig 3
& 4, there are one or two semiconductors in the current
flowing path; therefore, the current stresses in the active and
passive switches are reduced and the circuit efficiency is
improved. During the positive half-line cycle as shown in fig
4(a), the first dc-dc cuk circuit, L1-Q1-C1-L01-D01, is the active
through diode Dp, which connects the input ac source to the
output.
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Fig 3 equivalent circuits for type-1 rectifier. (a) During
positive half-line period. (b) During negative half-line period
of the input voltage.
During the negative half-line cycle as shown in fig
4(b), the second dc-dc cuk circuit, L2-Q2-C2-L02-D02, is active
through diode Dn, which connects the input ac source to the
output.The average voltage across capacitor C1 during the line
cycle can be expressed as follows:
{ (1)
Due to the symmetry of the circuit, it is sufficient to
analyze the circuit during the positive half cycle of the input
voltage. The operation of the proposed rectifiers of fig 2 will
be explained assuming that the three inductors are operating in
DCM. By operating the rectifier in DCM, there are several
advantages can be gained. These advantages included natural
near-unity power factor, the power switches are turned ON at
zero current, and the output diodes are considerably reduced.
DCM operation significantly increases the conduction losses
due to the increased current stress through circuit components.
The circuit operation in DCM can be divided into
three distinct operating stages during one switching period T s,
as similar to the conventional cuk converter. Equivalent
circuits over a switching period T s in positive half-line period
of fig 4(a) is shown in fig 5. The topological stages of type 2
over a switching cycle can be briefly described as follows.
Stage 1[t0, t1], [Fig 5(a)]: This stage starts when the switche Q1
is turned ON. Diode Dp is forward biased by the inductor
current iL1. As a result, the diode Dn is reverse biased by the
 input voltage. The output diode D01 is reverse voltage
(Vac+V0), while D02 is reverese biased by the output voltage
V0. In this stage, the current through inductors L1 and L01
increase linearly with the input voltage, while the current
through L02 is zero due to the constant voltage across C2. The
inductor currents of L1 and L01 during this stage are given by
Stage 3[t2, t3] [Fig 5(c)]: During this interval, only the diode
Dp conducts to provide a path for i L1. Accordingly, the
inductors in this interval behave as constant current sources.
Hence, the voltage across the three inductors is zero, the
capacitor C1 is being charged by the inductor current i L1. This
period ends when Q1 is turned ON. By applying inductor volt-
second across L1 and L01, the normalized length of the second
stage period can be expressed as follows:

Where is the line angular frequency, and M is the voltage

conversion ratio (M=V0/Vm).

Fig 4. equivalent circuits for type-2 rectifier. (a) during

positive half-line period. (b) during negative half-line period
of the input voltage.
Accordingly, the peak current through the active switch Q1 is
given by

Where Vm is peak amplitude of the input voltage Vac, D1 is the

switch duty cycle, and Le is the parallel combination of
inductors L1 and L01.
Stage 2[t1,t2] [Fig 5(b)]: This stage starts when the switch Q1 is
turned OFF and the diode D01 is turned ON simultaneously
providing a path for the inductor currents i L1 and iL1. Diode
D02 remains reverse biased during this interval. This interval
ends when iD01 reaches zero and D01 becomes reversed biased.
Note that the diode D01 is switched OFF at zero current.
Similarly, the inductor currents of L1 and L01 during this stage
can be represented as follows: Fig 5 Topological stages over one switching period Ts for the
converter of fig 4(a). (a)switch Q1 is ON (b) switch Q1 is OFF
(C)DCM

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 Since, the diode continuously conducts throughout Table II presents a comparison between topologies of
the entire switching period, the average voltage across C2 is interest. It should be noted that type 1 has the advantage of a
equal to the output voltage V0. As a result, a negligible ac lower component count, but a higher current peak. Whereas,
current will flow though C2 and L02. Therefore, the current type 2 has a higher component count, but lower stresses. In
through L2 during positive half cycle of the input voltage is conclusion, the converter of choice is an application
equal to the negative current through the body diode of Q 2. It dependent. It is evident from fig 7 that the efficiency of type-2
should be noted that the body diode of the inactive switch Q 2 topology is higher than that of the conventional PFC Cuk
is always conducting current during the positive half cycle of rectifier for the provided output power levels
the input voltage. This is due to the low impedance of the
input inductors (L1 and L2) at the line frequency. Therefore,
the input diode Dp and body diode of Q2 appear in parallel
configuration to share the return current. A large portion of
return current will pass through the diode that has a lower
voltage drop. The efficiency of the converter can be slightly
improved by using synchronous rectification to turn ON the
switch Q2 during the positive half cycle of the input voltage,
which eliminates its body-diode conduction.

IV. LOAD RESISTANCE CALCULATION

We know that, input voltage = 100 Vrms
Then Vpeak = √2*Vrms = √2*100rms = 141.14V
Therefore, the input voltage is 141.14V
Output Power = 150W
Output Voltage = 48V Fig 7 simulated efficiency (solid lines) PFC Cuk, type-1
Power (W) = Voltage (V) * Current (I) rectifier and type-2 rectifier operating in DCM.
150W = 48V * Current (I)
I = 150/48 = 3.125A
We get current I = 3.125A V. SIMULATION RESULTS
To find the load resistance RL
We know that, Type 2 converter of fig 2(b) has been simulated using
Output Voltage (V) = Output Current (I) * Resistance (RL) MATLAB for the following input and output data
48V = 3.125A * RL specifications: Vac = 100 Vrms, V0 = 48 V, Pout = 150W and fs
RL = 48/3.125 = 15.36Ω = 50 kHZ. The circuit components used in the simulation are
So, we get the load resistance as 15.36Ω the same as those in Table I. Fig 8 & 9 shows the simulation
To find switch duty cycle, D1 diagram of Type-1 & Type-2.
D1= M * √2Ke In order to compare the differences between type-1
Ke = and type-2 topologies, a prototype of type-1 has also been
built and tested with the same specifications and circuit
M= = ( ) parameters as for type-2.it should be mentioned here that type-
Re = 1 topology requires two switches with unidirectional current
capabilities. Accordingly, a low voltage drop with very low
Where, Ke = dimensionless conduction parameter reverse leakage current Schottky barrier diode is connected in
Le = effective inductance series with power MOSFETs to prevent any current from
M = voltage conversion ratio flowing through the MOSFET body diode.
RL = load resistance
TS = 1/switching frequency Fig 10-11 shows the simulation input voltage, current
Re = input resistance of the converter and power factor of type-1. Fig 12 shows that output voltage
V0 = output voltage and current of type-1. Fig 13 shows type-2 input voltage,
Vm = maximum input voltage current and power factor. Fig 14 shows that simulated output
voltage and current of type-2. Compared to type-2, the
reduction in efficiency in type-1 topology is mainly due to the
V. COMPARISION STUDY BETWEEN THE PROPOSED increased conduction losses introduced by the extra diodes
AND CONVENTIONAL CUK CONVERTER connected in series with Q1 and Q2. A power MOSFET with
The proposed topologies are compared with respect series-connected diode presents very low ON-state
to their components count, efficiency, driver circuitry characteristics, which lead to low conduction losses in a
complexity, and voltage gain range. Table I shows the details converter that requires reverse-blocking voltage switches.
of the components used in the simulation. The converters were
simulated for an output voltage of 48V under a minimum The measured efficiency for type-1 topology came
nominal input voltage of 100 Vrms condition. close to 92% at full rated load. Compared to type-2, the

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 reduction in efficiency in type-1 topology is mainly due to the
increased conduction losses introduced by the extra diodes
connected in series with Q1 and Q2.

It is worth mentioning here that using the newly

available reverse-blocking isolated gate bipolar transistor
instead of using a power MOSFET with series-connected
diode presents very low ON-state characteristics, which lead
to low conduction losses in a converter that requires reverse-
blocking voltage switches.

IL01
Goto4
Discrete, Display2 i +
Ts = 1e-006 s. V -
PF L01
powergui I

POWER FACTOR

i
- +

Vac,Iac,PF C1 C2
Fig 10 Type-1 Input Voltage, Current and Power Factor
IL1
Goto2
+i i +
- -
a

+v
L1 D01 C0 RL -
m
k

OUTPUT VOLTAGE & CURRENT

AC +v Q1 Q2
INPUT VOLTAGE, CURRENT & -
POWER FACTOR From From1
IL2
Goto3
i
-+
L2
D

D
g

g
k

k
m

Q1 Q2 Q2
Dp Dn
a

Goto1
S

Q1

Goto

Fig 8 Type-1 Simulation Diagram

IL01
Fig 11 Type-1 Output Voltage and Current
Goto4
Discrete, Display2 i +
Ts = 1e-006 s. V -
PF L01
powergui I
IL02
POWER FACTOR
Goto5
i
VC1 Goto9 -+
Goto8 VC2 L02
i
-+

v+
-
+
Vac,Iac,PF C1 C2 - v

IL1
Goto2
+i i +
- -
a

+v
L1 D01 D02 C0 RL -
m

m
k

OUTPUT VOLTAGE & CURRENT

AC +v Q1 Q2
-
<Diode current> <Diode current> Vac
INPUT VOLTAGE , CURRENT & From From1
POWER FACTOR Vac IL2 From7
Goto7 Goto3 Vac
i +
- VC1
L2
Vac,ID01,ID02
VC2
D

D
g

Q2 Vac,Vc1,Vc2
k

k
m

Dp Dn Q1 Q2 IL1
Goto1
a

m
S

IL2

<Diode current> <Diode current> IL01

Vac IL02
<MOSFET current> <MOSFET current>
Q1 From2 -K- IL1,IL2,IL01 & IL02
Vac
Gain
Goto From6
Vac,IDp,IDn
Vac,IQ1,IQ2

Fig 12 Type-2 Input Voltage, Current and Power Factor

Fig 9 Type-2 Simulation Diagram

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Fig 13 Type-2 Output Voltage and Current
VI. CONCLUSION
This paper presents two single-phase ac-dc bridgeless
rectifiers based on Cuk topology. It was clear from the result
the efficiency of proposed single-phase ac-dc bridgeless
rectifier is improved when compared with conventional Cuk
PFC rectifier. By operating the rectifier in DCM, there are
several advantages, which includes natural near-unity power
factor. Thus, the losses due to turn- ON switching and the
reverse recovery of the output diodes are considerably
reduced. In the proposed bridgeless topology will improve the
power factor, efficiency and reduction in the size of PFC
inductor and EMI filter could be achieved. The performance
of two types of proposed topologies was verified in the
simulation. In this proposed new single-phase ac-dc bridgeless
rectifier based on Cuk topology, type two have a better
efficiency and power factor when compared to the other type.
The results are observed with simulation result.
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