An Efficient Bridgeless Power Factor
Correction Boost Converter
Suja C. Rajappan1 and Neetha JOhn2
Sri Shakthi Institute of Engineering and Technology, Coimbatore, India
I 2
E-mail: suja_cr88@yahoo.co.in; neethajohn62@yahoo.com
Abstract-Dc power supplies are extensively used inside
most of electrical and electronic appliances such as in
computers, televisions, audio sets and others. In this paper
a bridgeless power factor correction boost converter is
proposed which results in improved power factor and
reduced harmonics content in input line currents as compared
to conventional boost converter topology. Bridgeless power
factor correction boost converter eliminates the line-voltage
bridge rectifier in conventional boost power factor
correction converter, so that the conduction loss is reduced.
A good tradeoff between efficiency, dc bus capacitor voltage
stress, and harmonic content can be achieved by properly
tuning the converter parameters.
Keywords: Power Factor Correction (PFC), Conventional Boost
Converter, Bridgeless PFC Boost Converter, Total Hannonic
Distortion (THD), Power Factor.
I. INTRODUCTION
The extensive use of dc power supplies inside most of
electrical and electronic appliances lead to an increasing
demand for power supplies that draw current with low
harmonic content and also have power factor close to unity.
Power-factor correction (PFC) has been an active research
topic in power electronics, and significant efforts have been
made on the developments of the PFC converters.
Dc power supplies are extensively used inside most of
electrical and electronic appliances such as in computers,
televisions, audio sets and others. The presence of non­
linear loads produce voltage fluctuations, harmonic currents
and an imbalance in network system which results into low
power factor operation of the power system. The basic
block in many power electronic converters are uncontrolled
diode bridge rectifiers with capacitive filter. Due to the non­
linear nature of bridge rectifiers, non-sinusoidal current is
drawn from the utility and harmonics are injected into the
utility lines. The bridge rectifiers contribute to high THD, low
PF, and low efficiency to the power system. These harmonic
currents cause several problems such as voltage distortion,
heating, noises etc. which results in reduced efficiency of
the power system. Due to this fact, there is a need for power
supplies that draw current with low harmonic content and
also have power factor close to unity.
978-1-4673-4603-0/12/$31.00 ©2012 IEEE
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The AC mains utility supply ideally is supposed to be
cleaned and free from high voltage spikes and current
harmonics. Discontinuous input current that exists on the
AC mains due to the non-linearity of the rectification
process should be shaped to follow the sinusoidal form of
the input voltage. Power factor correction techniques are of
two types - passive and active. While, passive power factor
correction techniques are the best choice at low power, cost
sensitive applications, the active power factor correction
techniques are used in majority of the applications due to
their superior performance.
The continuous-conduction mode (CCM) conventional boost
topology has been widely used as a PFC converter because
of its simplicity and high power capability. Recently, in
order to improve the efficiency of the front-end PFC
rectifiers, many power supply manufacturers have started
looking into bridgeless PFC circuit topologies. Generally,
the bridgeless PFC topologies, also known as dual boost PFC
rectifiers, reduce the conduction loss by reducing the nwnber
of semiconductor components in the line current path.
II. CONVENTIONAL PFC BOOST CONVERTER
The conventional input stage for single phase power supplies
operates by rectifying the ac line voltage and filtering with
large electrolytic capacitors. This process results in a distorted
input current waveform with large harmonic content. As a
result, the power factor becomes very poor (around 0.6). The
reduction of input current harmonics and operation at high
power factor (close to unity) are important requirements for
power supplies.
The conventional boost topology is the most widely used
topology for PFC applications. It consists of a front-end
full-bridge diode rectifier followed by the boost converter.
The diode bridge rectifier is used to rectify the AC input
voltage to DC, which is then fed to the boost section. This
approach is good for a low to medium power range. As the
power level increases, the diode bridge becomes an
important part of the application and it is necessary to deal
with the problem of heat dissipation in limited surface area.
The dissipated power is important from a efficiency point of
view.
 56 Proceedings of7'h International Conference on Intelligent Systems and Control (ISCO 2013)

Ln
Du goes through only two semiconductor devices, but in
conventional PFC circuit the inductor current goes through
three semiconductor devices. The two slow diodes of the
conventional PFC converter are replaced by one MO SFET
body diode in bridgeless PFC converter. Since both the
circuits operates as a boost DC/DC converter; the switching

RL
loss of the converters are same. Thus, the efficiency
CD
improvement in bridge less PFC converter relies on the
conduction loss difference between the two slow diodes and
the body diode of the MO SFET. The bridgeless PFC
D.j converter also reduces the total components count as
compared to a conventional PFC converter.

FIG. 1: CONVENTIONAL PFC BOOS RECTIFIER

III. BRlDGELESS PFC BOOST CONVERTER LB'

The bridgeless PFC Boost Converter is shown in Figure 2.

From a functional point of view, the circuit is similar to the
common boost converter. In the conventional boost
CD
topology, current flows through two of the bridge diodes in
series, whereas, in the bridgeless PFC configuration, current
flows through only one diode with the Power MO SFET
providing the return path.

02

LB.
FIG. 3: PROPOSED BRlDGELESS PFC BOOST CONVERTER

To reduce the common-mode noise, the bridgeless PFC

boost rectifier is modified so that it always provides a low
RL
CD
frequency (LF) path between the ac source and the positive
or negative terminal of the output. In Fig.3, in addition to
diodes D3 and D4, which are slow recovery diodes, a
second inductor is also added. Inductor LB I operates during
positive half cycle and inductor LB2 operates during
negative half cycle.

Switches Sl and S2, in both bridgeless PFC boost rectifiers

can be driven with the same PWM signal, which simplifies
FIG. 2: BRlDGELESS PFC BOOAR XONCWERWE
the implementation of the control circuit.

When the AC input voltage goes positive, the gate of Sl is
driven high and current flows from the input through the
inductor LB, storing energy. When Sl turns off, energy
stored in the inductor gets discharged and the current flows
through diode Dl, through the load and returns through the
body diode of switch S2. During the negative half cycle,
switch S2 is operated. When switch S2 turns on, current
flows through the inductor, storing energy. When S2 turns
off, energy stored in inductor is released as current flows
through D2, through the load and back to the mains through
the body diode of Sl.
The main drawback of the bridgeless PFC boost converter
in Figure 3 is that it requires two inductors. However, two
inductors compared to a single inductor provide better thermal
performance.
A. Operation of BridgeJess PFC Boost Converter
The operation of bridgeless power factor correction boost
converter can be divided into four modes. Modes I and II
comes under positive half cycle of input voltage and modes III
and IV comes under the negative half cycle of input voltage.

Thus, in each half line cycle, one of the MO SFET operates

as an active switch and the other one operates as a diode. (i) Positive Half Cycle
The difference between the bridgeless PFC and conventional During the positive half cycle of the input voltage, the first
PFC is that in bridgeless PFC converter the inductor current dc/dc boost circuit, LBl-Dl-Sl is active through diode D4,

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 An Efficient Bridgeless Power Factor Correction Boost Converter 57

which connects the ac source to the output ground. The

"'
positive half cycle operation can be divided into two modes
(Mode I and Mode II). LBI

During mode I operation, the switch Sl is in on condition.

When switch Sl turns on, inductor LBI stores energy
through the path Vin-LBI-SI-D4.
Co RL

., ., ••

I
LBI

Co RL

FIG. 3(c): MODEL III

., '"

I
During mode IV operation, the switch S2 is in off condition.
When switch S2 turns off, the energy stored in the inductor
LB2 gets discharged and the current flows through diode D2,
through the load and returns through the diode D3.

FIG. 3(A): MODE I

During mode II operation, the switch Sl is in off condition.

LBI
When switch S 1 turns off, the energy stored in the inductor
LBlgets discharged and the current flows through diode Dl,
through the load and returns through the diode D4.

CD

.,
., ••

I j
., •• FIG. 3(D): MODEL IV

I J
IV. SIMULATION RESULTS
The computer simulation of conventional power factor
correction boost rectifier and proposed bridgeless PFC boost
converter are done using Matlab/Simulink and the results are
FIG. 3(B): MODEL II
presented.

(ii) Negative Half Cycle

B. Conventional PFC Boost Rectifier
During the negative half cycle of the input voltage, the
second dc/dc boost circuit, LB2-D2-S2 is active through Simulation circuit of conventional PFC boost rectifier is shown

diode D3, which connects the ac source to the output in Figure 4 (a).
ground. The negative half cycle operation can be divided Simulated line voltage and line current waveforms of
into two modes (Mode III and Mode IV). conventional PFC boost rectifier operating at 230-Vrms line

During mode III operation, the switch S2 is in on condition. voltage are shown in Figure 4(b). The power factor is

When switch S2 turns on, inductor LB2 stores energy obtained as 0.8866. FFT analysis of input current waveform

through the path Vin-LB2-S2-D3. is shown in Figure 4(c).

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 58 Proceedings of7'h International Conference on Intelligent Systems and Control (ISCO 2013)

I �"ti""'" I
[ I l�
pov.ergui
Power

1
T
�
� �
.Y ...
sco s

FIG. 4 (D) : SIMULATION OF BRlDGELESS PFC BOOST CONVERTER

FIG. 4(A): SIMULATION OF BOOST CONVERTER

FIG. 4(E): INPUT VOLTAGE AND INPUT CURRENT WAVEFORM

FIG. 4(8): INPUT VOLTAGE AND INPUT CURRENT WAVEFORM Simulated line voltage and line current waveforms of
bridgeless PFC boost rectifier operating at 230-Vrms line
- FFT a nalys is -------..., voltage are shown in figures 4 (b) and 4(c) respectively. The

F u ndamental (50Hz) = 6.851 , THD= 27. 1 5% output voltage waveform is shown in figure 4 (d). FFT
analysis of input current waveform is shown in figure 4(t).
20
The THD percentage obtained in the simulation is < 1 0%
"iii and the power factor is obtained as 0.9 1 06.
"E 15
.,
E
-l'l
"
::l
LL 10
'0
�
.,'"
5

.1.1 ......
�

0
0 5 10 15 20
�almonic olde I

FIG. 4(C): FFT ANALYSIS OF INPUT CURRENT WAVEFORM

C. Bridgeless PFC Boost Converter !II

Simulation circuit of bridgeless PFC boost converter is

os
shown in FigA (c). The controlled switch implemented is
the power MO SFET which has inherently slow body diode. FIG. 4(F): OUTPUT VOLTAGE WAVEFORM

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 An Efficient Bridgeless Power Factor Correction Boost Converter 59

FFT analysis -------, [5] U. Moriconi, "A bridgeless PFC configuration based on
L49S1 PFC controller," Application Note AN 1606, ST
Fundamental (50Hz) = 7.385 , THD= 8.95%
Microelectronics, IIIS- IS/IS, Nov.2002.
8 [6] L. Rossetto, G. Spiazzi, and P. Tenti, "Boost PFC with 100-Hz

� switching frequency providing output voltage stabilization

E 6 and compliance with EMC standards," IEEE Trans. Ind.

i Applications . vol.3 6, pp.lSS-193,Jan.lFeb.2000.

[7] R. Martinez and P. N. Enjeti, "A high performance single
u..

'0 4
phase AC to DC rectifier with input power factor
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pp.311- 317, Mar. 1996.

o
1 1 1 l [S] H. Ye, Z. Yang, J. Dai, C. Yan, X. Xin, and J. Ying, "Common
o 5 10 15 20
mode noise modeling and analysis of dual PFC circuit,"
Harmonic order
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FIG. 4(G): FFT ANALYSIS OF INPUT CURRENT WAVEFORM
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