On Board Communication Unit-Iv: B.Tech, ETM, II Year, II Semester

MICROPROCESSORS
&MICROCONTROLLERS
On board Communication
UNIT-IV
B.Tech, ETM,
II Year, II Semester
N.Ramakrishna
Dept. of Electronics and Telematics Engineering
GNITS, Hyderabad
16 March 2020 ES- N.Ramakrishna

Syllabus
Unit IV
• SPI
• I2C
• Basics of USB
16 March 2020 MPMC-N.Ramakrishna

Reference
Reference websites
• SPI
https://learn.sparkfun.com/tutorials/serial-peripheral-
interface-spi
• I2C
http://www.byteparadigm.com/applications/introduction-
to-i2c-and-spi-protocols/
http://www.embedds.com/programming-avr-i2c-interface/

Reference
Reference websites
• Basics of USB
http://www.eeherald.com/section/design-
guide/esmod14.html

Communication Interface
 Essential for communicating with various subsystems of the

embedded(Microcontroller) system and with the external world
 For an embedded product, the communication interface can be viewed in
two different perspectives;
1. Device/board level communication interface (Onboard Communication
Interface)
2. Product level communication interface (External Communication
Interface)
 Embedded product is a combination of different types of components

(chips/devices) arranged on a Printed Circuit Board (PCB).
 The communication channel which interconnects the various components
within an embedded product is referred as Device/board level
communication interface (Onboard Communication Interface)

Communication Interface
Onboard Communication Interface

Serial interfaces like I2C, SPI, UART, 1-Wire etc
 Parallel bus interface
The ‘Product level communication interface’ (External Communication Interface)
responsible for data transfer between the embedded system and other devices or
modules .
External communication interface
The wireless media The wired media
Infrared (IR), RS-232C/RS-422/RS 485,
Bluetooth (BT),  USB,
Wireless LAN (Wi-Fi), Ethernet (TCP-IP),
 Radio Frequency waves (RF), IEEE 1394 port,
GPRS etc Parallel port,
CF-II Slot,
SDIO, PCMCIA etc

On-board Communication Interface - I2C
Inter Integrated Circuit Bus (I2C - Pronounced ‘I square C’)

 synchronous bi-directional half duplex (one-directional communication at a
given point of time).
 Two wire serial interface bus
 The concept of I2C bus was developed by ‘Philips Semiconductors’ in the
early 1980’s.
 The original intention of I2C was to provide an easy way of connection
between a microprocessor/microcontroller system and the peripheral chips
in Television sets
 The I2C bus is comprised of two bus lines,
namely; Serial Clock – SCL and Serial Data – SDA.
SCL line is responsible for generating synchronization clock pulses.
SDA is responsible for transmitting the serial data across devices.

I2C bus is a shared bus system to which many number of I2C devices can be
connected.
Devices connected to the I2C bus can act as either ‘Master’ device or ‘Slave’ device.
The ‘Master’ device is responsible for controlling the communication by

initiating/terminating data transfer, sending data and generating necessary
synchronization clock pulses.
‘Slave’ devices wait for the commands from the master and respond upon receiving
the commands.‘ Master’ and ‘Slave’ devices can act as either transmitter or receiver.
Regardless whether a master is acting as transmitter or receiver, the synchronization

clock signal is generated by the ‘Master’ device only.
I2C supports multi masters on the same bus

SCL SDA Vcc

2.2K
SDA
2.2K
Port Pins SCL
Slave 1
SCL I2C Device
Master SDA (Eg: Serial
(Microprocessor/ EEPROM)
Controller)
SCL Slave 2
SDA I2C Device
I2C Bus

I2C Bus Definitions
• Master:
– Initiates a transfer by generating
start and stop conditions
– Generates the clock
– Transmits the slave address
– Determines data transfer direction
• Slave:
– Responds only when addressed
– Timing is controlled by the clock line
First Byte in Data Transfer on the I2C Bus
MSB LSB
R / Wr
7 – Bit Slave Address ACK
R/Wr
0 – Write Operation
1 – Read Operation
ACK – Generated by the slave whose address has been output.

I2C Bus Connections
• Masters can be
– Transmitter only
– Transmitter and receiver
• Slaves can be
– Receiver only
– Receiver and transmitter

Data Formats
Master writing to a Slave
A A A

Data Formats Cont’d.
Master reading from a Slave :
Master is Receiver of data and Slave is Transmitter of data.

Data Formats Cont’d.
Combined Format
 A repeatedstart avoids releasing the bus and therefore

prevents another master from taking over the bus
The sequence of operation :

1.Master device pulls the clock line (SCL)
SCL SDA Vcc
of the bus to ‘HIGH’ 2.2K
2.Master device pulls the data line (SDA)
‘LOW’, when the SCL line is at logic ‘HIGH’ SDA
2.2K
(This is the ‘Start’ condition for data Port Pins SCL
transfer) Slave 1
SCL I2C Device
3.Master sends the address (7 bit or 10 bit Master (Eg: Serial
SDA
wide) of the ‘Slave’ device to which it (Microprocessor/ EEPROM)
Controller)
wants to communicate over the SDA line.
4.Clock pulses are generated at the SCL
line for synchronizing the bit reception by SCL Slave 2
the slave device. SDA I2C Device
5.The MSB of the data is always

transmitted first.
I2C Bus


4. Master sends the Read or Write bit SCL SDA Vcc
2.2K
(Bit value = 1 Read Operation;
Bit value = 0 Write Operation) according to
SDA
the requirement. Port Pins
2.2K
SCL
5.Master waits for the acknowledgement Slave 1
bit from the slave device whose address is SCL I2C Device
Master (Eg: Serial
sent on the bus along with the Read/Write (Microprocessor/
SDA
EEPROM)
operation command. Controller)
Slave devices connected to the bus
compares the address received with the
SCL Slave 2
address assigned to them. I2C Device
SDA
6. The Slave device with the address
requested by the master device responds
by sending an acknowledge bit (Bit value
=1) over the SDA line. I2C Bus


7 Upon receiving the acknowledge bit,
SCL SDA Vcc
master sends the 8bit data to the slave 2.2K
device over SDA line, if the requested
operation is ‘Write to device’. SDA
2.2K
8. If the requested operation is ‘Read from Port Pins SCL
device’, the slave device sends data to the Slave 1
SCL I2C Device
master over the SDA line Master (Eg: Serial
SDA
9.Master waits for the acknowledgement (Microprocessor/ EEPROM)
Controller)
bit from the device upon byte transfer
complete for a write operation and sends
an acknowledge bit to the slave device for a SCL Slave 2
read operation. SDA I2C Device
10.Master terminates the transfer by

pulling the SDA line ‘HIGH’ when the clock
line SCL is at logic ‘HIGH’ (Indicating the I2C Bus
‘STOP’ condition)
On-board Communication Interface
–
Serial Peripheral Interface (SPI) Bus
The Serial Peripheral Interface Bus (SPI) is a synchronous bi-directional full duplex
four wire serial interface bus.
The concept of SPI is introduced by Motorola.
SPI is a single master multi-slave system. It is possible to have a system where more
than one SPI device can be master, provided the condition only one master device is
active at any given point of time, is satisfied.
SPI requires four signal lines for communication. They are:
 Master Out Slave In (MOSI): Signal line carrying the data from master to slave
device. It is also known as Slave Input/Slave Data In (SI/SDI).
Master In Slave Out (MISO): Signal line carrying the data from slave to master
device. It is also known as Slave Output (SO/SDO).

On-board Communication Interface
–
Serial Peripheral Interface (SPI) Bus
MOSI SCL MISO
SPI requires four signal lines for
communication. They are:
MISO
SCL
Serial Clock (SCLK): Signal line carrying the MOSI MOSI Slave 1
clock signals. SCL SPI Device
Master
Slave Select (SS): Signal line for slave device (Microprocessor/
MISO (Eg: Serial
SS\ EEPROM)
select. It is an active low signal. Controller)
SS1\
SS2\
MOSI
Slave 2
SCL
SPI Device
MISO
(Eg: LCD)
SS\
SPI Bus

On-board Communication Interface– SPI Bus
On-board Communication Interface – Serial Peripheral Interface (SPI) Bus
MOSI SCL MISO
MISO
SCL
MOSI MOSI Slave 1
SCL SPI Device
Master
MISO (Eg: Serial
(Microprocessor/
SS\ EEPROM)
Controller)
SS1\
SS2\
MOSI
Slave 2
SCL
SPI Device
MISO
(Eg: LCD)
SS\
SPI Bus

 The master device is responsible for generating the clock signal. Master
device selects the required slave device by asserting the corresponding slave
device’s slave select signal ‘LOW’.
 The data out line (MISO) of all the slave devices when not selected floats at
high impedance state .
 The serial data transmission through SPI Bus is fully configurable. SPI devices
contain certain set of registers for holding these configurations.
 The Serial Peripheral Control Register holds the various configuration

parameters like master/slave selection for the device baud rate selection for
communication, clock signal control etc.

 The status register holds the status of various conditions for transmission and
reception.
SPI works on the principle of ‘Shift Register’. The master and slave devices contain a
special shift register for the data to transmit or receive.
 The size of the shift register is device dependent. Normally it is a multiple of 8.

 During transmission from the master to slave, the data in the master’s shift register
is shifted out to the MOSI pin and it enters the shift register of the slave device
through the MOSI pin of the slave device.
 At the same time the shifted out data bit from the slave device’s shift register
enters the shift register of the master device through MISO pin.

On-board Communication Interface –
Universal Asynchronous Receiver Transmitter (UART)
TXD TXD
UART UART
RXD RXD
TXD: Transmitter Line

RXD: Receiver Line

On-board Communication Interface – (UART)
 Universal Asynchronous Receiver Transmitter (UART) based data

transmission is an asynchronous form of serial data transmission.
 The serial communication settings (Baudrate, No. of bits per byte, parity, No.
of start bits and stop bit and flow control) for both transmitter and receiver
should be set as identical.
 The start and stop of communication is indicated through inserting special

bits in the data stream.
 While sending a byte of data, a start bit is added first and a stop bit is added
at the end of the bit stream. The least significant bit of the data byte follows
the start bit.

The ‘Start’ bit informs the receiver that a data byte is about to arrive. The receiver
device starts polling its ‘receive line’ as per the baudrate settings.
If parity is enabled for communication, the UART of the transmitting device adds
a parity bit .
The UART of the receiving device calculates the parity of the bits received and
compares it with the received parity bit for error checking.
The UART of the receiving device discards the ‘Start’, ‘Stop’ and ‘Parity’ bit from
the received bit stream and converts the received serial bit data to a word


External Communication Interface –
Universal Serial Bus (USB)
USB Logo
April
16 March
4, 2016
2020 ES- N.Ramakrishna
USB –Universal Serial Bus

• Set of interface specifications for high speed wired communication
between electronics systems peripherals and devices with or without
PC/computer.
• Originally developed in 1995 by many of the industry leading companies
like Intel, Compaq, Microsoft, Digital, IBM, and Northern Telecom.


The major goal of USB was to define an external expansion bus to add peripherals
to a PC in easy and simple manner.
The new external expansion architecture, highlights,

1. PC host controller hardware and software
2. Robust connectors and cable assemblies
3. Peripheral friendly master-slave protocols
4. Expandable through multi-port hubs.
ES- N.Ramakrishna 31
16 March 2020
USB – Universal Serial Bus

• USB offers users simple connectivity.
• It eliminates the mix of different connectors for different devices like
printers, keyboards, mice, and other peripherals.
• USB-bus allows many peripherals to be connected using a single
standardized interface socket.
• In USB environment, DIP-switches are not necessary for setting peripheral
addresses and IRQs.
• It supports all kinds of data, from slow mouse inputs to digitized audio
and compressed video.
April
16 March
4, 2016
2020 MPMC-
ES-
Moorthy
N.Ramakrishna
Muthukrishnan

• USB already replaced RS232
• Most successful serial interconnect in PC and consumer electronics
• Used to connect devices such as mouse, keyboard, PDA, printer, scanner,
etc.
• USB sends data in serial mode
i.e. the parallel data is serialized before sending and de-serialized after
receiving.
April
16 March
4, 2016
2020 MPMC-
ES-
Moorthy
N.Ramakrishna
Muthukrishnan

The benefits of USB
• Low cost
• Expandability
• Auto-configuration
• Hot-plugging
• Outstanding performance.
• Also provides power to the bus, enabling many peripherals to operate
without the added need for an ac power adapter.
April
16 March
4, 2016
2020 MPMC-
ES-
Moorthy
N.Ramakrishna
Muthukrishnan

Versions of USB:
• USB 1.0
Original release, 12 Mbps, 127 devices
• USB 1.1 – Full-speed USB
Rectify adoption problems with hubs
• USB 2.0 – Hi-speed USB
Data rate up to 480 Mbps
Support low-bandwidth devices – mice, etc. and high-bandwidth devices
– webcams, scanners, etc.
April
16 March
4, 2016
2020 MPMC-
ES-
Moorthy
N.Ramakrishna
Muthukrishnan

Versions of USB:
• USB 3.0
Super-Speed USB having a data transfer rate of 4.8 G bit/s (600 MB/s).
April
16 March
4, 2016
2020 MPMC-
ES-
Moorthy
N.Ramakrishna
Muthukrishnan

• The USB system is made up of a host, multiple numbers of USB ports, and
multiple peripheral devices connected in a tiered-star topology.
• To expand the number of USB ports, the USB hubs can be included in the
tiers, allowing branching into a tree structure with up to five tier levels.
• Addressable bus system, with a seven-bit address code. So it can support
up to 127 different devices or nodes at once.
April
16 March
4, 2016
2020 MPMC-
ES-
Moorthy
N.Ramakrishna
Muthukrishnan
External Communication Interface – Universal Serial
Bus (USB)
 Universal Serial Bus (USB) is a wired high speed
serial bus for data communication.
Peripheral
 The USB communication system follows a star Device 2
topology with a USB host at the center and one or
more USB peripheral devices/USB hosts connected Peripheral USB Host Peripheral
to it. Device 1 (Hub) Device 3
 A USB host can support connections up to 127, USB Host

(Hub)
including slave peripheral devices and other USB
hosts. Peripheral Peripheral
Device 4 Device 5

External Communication Interface – Universal Serial
Bus (USB)
 USB transmits data in packet format. Each data
packet has a standard format. The USB
communication is a host initiated one
Peripheral
Device 2
 The USB Host contains a host controller which is
responsible for controlling the data communication, Peripheral USB Host Peripheral
including establishing connectivity with USB slave Device 1 (Hub) Device 3
devices, packetizing and formatting the data packet.

USB Host
(Hub)
 There are different standards for implementing the
USB Host Control interface; namely Peripheral Peripheral
Device 4 Device 5
 Open Host Control Interface (OHCI)
 Universal Host Control Interface (UHCI)

 Each USB device contains a Product ID (PID) and a Vendor ID (VID).
 The PID and VID are embedded into the USB chip by the USB device manufacturer.
 The VID for a device is supplied by the USB standards forum.
 PID and VID are essential for loading the drivers corresponding to a USB device for
communication.

USB –Connectors and power supply
Type A connectors head upstream Type B connectors head downstream

toward the computer and connect to individual devices
Cable length : 5 meters for 12 Mbps, 3 m for 1.5 Mbps
April
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4, 2016
Pin No: Signal Color of the cable

1 +5V power Red
2 - Data White / Yellow
3 +Data Green / Blue
4 Ground Black/Brown
April
16 March
4, 2016
2020 MPMC-
ES-
Moorthy
N.Ramakrishna
Muthukrishnan

• 4 wires
• +5V, GND
• 2 wires (twisted pair) carry data
• Can supply upto 500 mA
• Devices can draw up to 100 mA
• For device drawing > 500 mA, need to have own power supply
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4, 2016
USB
• The serial data is sent along the USB in differential
or push-pull mode, with opposite polarities
on the two signal lines.
• This improves the signal-to-noise ratio by doubling the effective signal amplitude
and also allowing the cancellation of any common-mode noise induced into the
cable.
• The data is sent in non-return-to-zero (NRTZ) format.
April
16 March
4, 2016
2020 MPMC-
ES-
Moorthy
N.Ramakrishna
Muthukrishnan
USB – Data transfer Process

• The USB connectors are designed so that power and ground are applied before
the signal lines are connected.
• When the Host powers up it polls each of the Slave devices in turn (using the
reserved address 0), it assigns each one a unique address and finds out from each
device what its Speed is and the and type of data transfer it wishes to perform.
• This process is called enumeration and it also takes place whenever a device is
plugged into an active network.
• The connectors design (contact to power then signal) along with the process of
enumeration and a lot of host software allows devices to be described as "Plug-
and-Play".
April
16 March
4, 2016
2020 MPMC-
ES-
Moorthy
N.Ramakrishna
Muthukrishnan

• A typical transaction will consist of a number of packets
- A token indicating the type of data that the Host is sending or requiring, the
data and in some cases an acknowledgment.
• Each packet is preceded by a sync field and followed by
an end of packet marker.
These transactions are used to provide
four basic data transfer mechanisms
Control
• Used by the host to send commands or query parameters.
• Packet lengths are 8 bytes for Low speed, 8-64 bytes for
Full speed and 64 bytes for High Speed devices.
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4, 2016
2020 MPMC-
ES-
Moorthy
N.Ramakrishna
Muthukrishnan Unit V Part 2 46

Interrupt
• Badly named it is in fact a polled message from the Host which has to request
specific data of the Device.
• Used by Devices which will be sending small amounts of data (e.g. mice or
keyboards).
Bulk
• Used by Devices that send or receive data in quantity
such as a printer.
• Variable length blocks of data are sent or requested by the Host (max length is 64-
byte- full speed, 512 -high speed), are verified with a CRC and their receipt is
acknowledged.
• This mechanism is not used by time critical peripherals as it takes whatever
bandwidth is left by the other mechanisms.
April
16 March
4, 2016
2020 MPMC-
ES-
Moorthy
N.Ramakrishna
Muthukrishnan

Isochronous
• Used for devices that stream data in real time without any error recovery such as
audio channels.
• For them losing some data occasionally is better than the glitch resulting from a
retransmit.
• Packet sizes can be up to 1024 bytes.
April
16 March
4, 2016
2020 MPMC-
ES-
Moorthy
N.Ramakrishna
Muthukrishnan

• USB allows hot swapping- Devices can be plugged in and unplugged without
turning off the devices.
April
16 March
4, 2016

On Board Communication Unit-Iv: B.Tech, ETM, II Year, II Semester

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MICROPROCESSORS

16 March 2020 ES- N.Ramakrishna

16 March 2020 MPMC-N.Ramakrishna

16 March 2020 MPMC-N.Ramakrishna

16 March 2020 MPMC-N.Ramakrishna

 Essential for communicating with various subsystems of the

 Embedded product is a combination of different types of components

16 March 2020 ES- N.Ramakrishna

Onboard Communication Interface

16 March 2020 ES- N.Ramakrishna

Inter Integrated Circuit Bus (I2C - Pronounced ‘I square C’)

16 March 2020 ES- N.Ramakrishna

The ‘Master’ device is responsible for controlling the communication by

Regardless whether a master is acting as transmitter or receiver, the synchronization

I2C supports multi masters on the same bus

16 March 2020 ES- N.Ramakrishna

SCL SDA Vcc

16 March 2020 ES- N.Ramakrishna

7 – Bit Slave Address ACK

ACK – Generated by the slave whose address has been output.

16 March 2020 ES- N.Ramakrishna

16 March 2020 ES- N.Ramakrishna

16 March 2020 ES- N.Ramakrishna

16 March 2020 ES- N.Ramakrishna

 A repeatedstart avoids releasing the bus and therefore

The sequence of operation :

5.The MSB of the data is always

16 March 2020 ES- N.Ramakrishna

The sequence of operation :

16 March 2020 ES- N.Ramakrishna

The sequence of operation :

10.Master terminates the transfer by

SPI requires four signal lines for communication. They are:

16 March 2020 ES- N.Ramakrishna

16 March 2020 ES- N.Ramakrishna

On-board Communication Interface – Serial Peripheral Interface (SPI) Bus

MOSI SCL MISO

16 March 2020 ES- N.Ramakrishna

 The Serial Peripheral Control Register holds the various configuration

16 March 2020 ES- N.Ramakrishna

 The size of the shift register is device dependent. Normally it is a multiple of 8.

16 March 2020 ES- N.Ramakrishna

TXD: Transmitter Line

16 March 2020 ES- N.Ramakrishna

 Universal Asynchronous Receiver Transmitter (UART) based data

 The start and stop of communication is indicated through inserting special

16 March 2020 ES- N.Ramakrishna

16 March 2020 ES- N.Ramakrishna

16 March 2020 ES- N.Ramakrishna

USB –Universal Serial Bus

16 March 2020 ES- N.Ramakrishna

USB –Universal Serial Bus

The new external expansion architecture, highlights,

USB – Universal Serial Bus

USB –Universal Serial Bus

USB –Universal Serial Bus

USB –Universal Serial Bus

USB –Universal Serial Bus

USB –Universal Serial Bus

 A USB host can support connections up to 127, USB Host

16 March 2020 ES- N.Ramakrishna

devices, packetizing and formatting the data packet.