TRIBHUVAN UNIVERSITY

INSTITUTE OF ENGINEERING
HIMALAYA COLLEGE OF
ENGINEERING CHYASAL-6, LALITPUR

Department of Electronics and Communication and

Information
Lab Report - 03
8255 PPI Programming

Submitted By: Sumip Chaudhary

HCE077BEI022
TITLE: Programming in 8255 in Mode 0 and BSR mode.
OBJECTIVES: To configure 8255A and
INSTRUMENTS USED:

 Dyna 85
 Dyna log 8255 PPI

THEORY:
PPI 8255 is a general purpose programmable I/O device designed to interface the CPU with its outside
world such as ADC, DAC, keyboard etc. We can program it according to the given condition. It can be
used with almost any microprocessor. It is used to parallel data transfer between processor and slow
peripheral devices like ADC, DAC, keyboard.

The 8255 has three ports:

Port-A (8-bit) - one 8-bit output latch/buffer and one 8-bit input buffer.

Port-B (8-bit) - similar to PORT A.

Port-C - Port-C upper (PC4-PC7 ) -4bit, Port-C lower (PC0-PC3)-4bit.

The three ports are further grouped as follows:

Group A consisting of port A and upper part of port C.

Group B consisting of port B and lower part of port C.

Operational modes of 8255 :

1. Bit Set/Reset mode (BSR mode).

2. Input/Output mode (I/O mode)
Bit Set/Reset (BSR) mode:

The Bit Set/Reset (BSR) mode is available on port C only. Each line of port C (PC7 - PC0) can be set or
reset by writing a suitable value to the control word register. BSR mode and I/O mode are independent
and selection of BSR mode does not affect the operation of other ports in I/O mode.
Input/Output mode :

This mode is selected when D7 bit of the Control Word Register is 1. There are three I/O modes

1. Mode 0
2. Mode 1
3. Mode 2

Mode 0: This mode is the simple input output mode of 8255 which allows the programming of each port
as either input or output port. The two halves of port C can be either used together as an additional 8-
bit port, or they can be used as individual 4-bit ports. Since the two halves of port C are independent,
they may be used such that one-half is initialized as an input port while the other half is initialized as an
output port. It does not support handshaking or interrupt capability and input ports are buffered while
outputs are latched.
 Base 0 0 1 1 0 0 0 0 :30H PA Address:

0 1 :31H PB
1 0 :32H PB
1 1 :33H CR

Q.N.1) WAP to enable alternate LED’s of PA.

Control word: 90H

D7 D6 D5 D4 D3 D2 D1 D0
1 0 0 0 X X X X X=0

Addres Mnemonics Hex Code

s Program
C000 MVI A, 90H 3E MVI A, 90H
C001 80 OUT 33H
C002 OUT 33H D3 MVI A, AAH
C003 33 OUT 30H
C004 MVI A, AAH 3E RST1
C005 AA
C006 OUT 30H D3
C006 30
C007 RST1 FF
Hence, Alternate LEDs in the P A section were turned on.

Q.N.2 WAP to read I/P from PB and display in PA.

Control word: 82H

D7 D6 D5 D4 D3 D2 D1 D0
1 0 0 0 X 0 1 X X=0
 Addres Mnemonics Hex Code
s
PROGRAM
C000 MVI A, 82H 3E
MVI A, 82H
C001 82
OUT 33H
C002 OUT 33H D3 IN 31H
C003 33 OUT 30H
C004 IN 31H DB RST1
C005 31
C006 OUT 30H D3
C006 30
C007 RST1 FF
Data in P A : A2H

Data in PB : A2H

Hence, Data from P A was read and displayed in PB

Q.N.3] WAP to set bit 2 of Pc.

Control word: 05H

D7 D6 D5 D4 D3 D2 D1 D0
0 X X X 0 1 0 1 X=0

Addres Mnemonics Hex Code

s
PROGRAM
C000 MVI A, 80H 3E
MVI A, 80H
C001 82
OUT 32H
C002 OUT 32H D3
MVI A, 05H
C003 33 OUT 33H
C004 MVI A, 05H DB RST1
C005 05H
C006 OUT 33H D3
C006 33
C007 RST1 FF

Before Execution: PC11111111

After Execution: PC00000100

Hence, every bit except the D2 was reset and D 2 was set.

Q.N.4) WAP to send data 55H and A0H to PB.

Control word: 82H

D7 D6 D5 D4 D3 D2 D1 D0
1 0 0 0 0 0 1 0 X=0

Address Mnemonics Hex Code Program

C000 MVI A, 80H 3E MVI A, 82H
C001 80 OUT 33H
C002 OUT 33H D3 MVI A, 55H
C003 33 OUT 31H
C004 MVI A, 55H 3E MVI A, A0H
C005 55 OUT 31H
C006 OUT 31H D3 RST1
C007 31
C008 MVI A, A0H 3E
C009 A0
C00A OUT , 31H D3
C00B 31
C00C RST1 FF
Q.N.4] WAP to read data from PCL and display to PCU.
Control word: 81H

D7 D6 D5 D4 D3 D2 D1 D0
1 0 0 0 0 0 0 1 X=0

Addres Mnemonics Hex Code

s
C000 MVI A, 6FH 3E
C001 0F
C002 OUT 33H D3
C003 33
C004 MVI A, 81 H 3E
C005 81
C006 OUT 33H D3
C007 33
C008 IN 32H DB
C009 32
C00A ANI 0FH E6
C00B 0F
C00C RLC 07
C00D RLC 07
 C00E RLC 07
C00F RLC 07
C010 OUT 32H D3
C011 32
C012 RST1 FF

Program
MVI A, 81H
OUT 33H
IN 32H
ANI 0FH
RLC
RLC
RLC
RLC
OUT 32H
RST1

Before execution:
Pc :11001001

After execution:
Pc :10010000

Hence, data was taken from P C Land sent to P Cu .

Discussion and Conclusion
Hence, we became familiar with 8255 A, it’s modes and operations. During this lab session, we
learnt input and output data from different ports as well as set and reset them in BSR mode.
The results were observed in 8255 A and coding was done with the help of 8085
microprocessor. Some logical errors occurred while coding and compiling which was overcome
with the help of the teacher.