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DIGITAL LOGIC

2 BOOLEAN ALGEBRA & MINIMIZATION

1. LOGIC OPERATIONS

All algebraic functions performed in Boolean algebra are logical. The AND, OR and NOT are the
basic operations that are performed in Boolean algebra. There are some derived operations
such as NAND, NOR, EX-OR, EX-NOR that are also performed in Boolean algebra.
1.1. NOT operation:
Symbol:

NOT
A ⎯⎯⎯⎯ → A or A  (Complementation law)

and A = A ⇒ Double complementation law

Truth table for NOT operation:

Input Output
A Y=A
0 1
1 0

A buffer is a simple logic gate that transfers its input to its output unchanged. It behaves
in the opposite way that a NOT gate does.
The primary function of a buffer is to restore the input signal, which is normally
accomplished by using a strong high and a strong low. Buffers are often used to drive
huge capacitive loads, which increases the propagation delay of circuits.

Input Output
0 0
1 1

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1.2. AND operation:
Symbol:

A.A = A, A.0 = 0, A.1 = A, AA = 0

Truth table for AND operation:

Input Output

A B Y = AB

0 0 0

0 1 0

1 0 0

1 1 1
1.3. OR operation:
Symbol:

A + A = A, A + 0 = A, A + 1 = 1, A + A = 1
Truth table for OR operation:

Input Output

A B Y = A+B

0 0 0

0 1 1

1 0 1

1 1 1

Example 1.1:
Reduce the combinational logic circuit shown figure such that the desired output can be
obtained using only one gate.

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Solution:

P = A, Q = B, R = C

S = A· B · C

V = U = ABC

X=U+V+D

= ABC + ABC + D
=A+B+C+D

Enable or Disable Input:

Enable:
When the control signal is HIGH, enable a signal to pass.
When the control signal is LOW, prevent a signal from passing.
When the control signal is HIGH, disable it to prevent a signal from passing.
When the control signal is LOW, allow a signal to pass.
Enable and Disable Functions:
AND and OR gates can both be used to enable or disable a transmitted waveform.

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For a two input AND gate:
• One input is the signal and the other input is the enable pulse.
• The enable of an AND gate is high active. That is, when the enable is high the input
signal will appear on the output.
• When the AND gate enable input is low, the output will remain a constant low signal.
For a two input OR gate:
• A two OR gate can also be used with one input the desired signal and the other input is
the enable.
• The enable input an OR gate is low active. This means that the output will be copy of
the input signal when the enable is low.
• When the enable input of an OR gate is high, the output of the gate will be constant
high signal.
Example 1.2:
Show the control enable and disable outputs for AND and OR gate.
Solution:
Control ‘0’ disable

Control ‘1’ enable (Buffer)

Control ‘0’ enable (Buffer)

Control ‘1’ Always enable

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1.4. Venn Diagram:
A Output

A 0 1
NOT
1 0

A B Output

0 0 0

A.B 0 1 0

AND 1 0 0

1 1 1

A B Output

0 0 0

OR A+B 0 1 1

1 0 1

1 1 1

2. LOGIC GATES

Logic gates are the fundamental building blocks of digital systems.

Types of logic gates:
There are three basic logic gates, namely
• OR gate
• AND gate
• NOT gate
And other logic gates that are derived from these basic gates are:
• NAND gate
• NOR gate
• Exclusive OR gate
• Exclusive NOR gate
2.1. NAND gate:
The term NAND implies NOT-AND
Symbol:

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Truth table of 2-input NAND gate.

Input Output
A B Y = AB
0 0 1
0 1 1
1 0 1
1 1 0

Example 2.1:
With the given input waveforms at A, B, and Control, draw the output waveform at X for
the NAND gate shown in Fig. 2(a).

Fig. 2(a)
Fig. 2 (a) Timing analysis of a NAND gate with a control input: (a) logic symbol; (b)
waveforms.
Solution: The control input waveform is used to enable/disable the NAND gate in Fig.
2(a). The performance is stuck HIGH when it is LOW. When A and B both go Up, the
performance will respond by going LOW.

Fig. 2(b)

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NAND gate acts as Universal Gate
Logic Gates using only NAND Gates

All the logic gate functions can be created using only NAND gates. Therefore, it is also
known as a Universal logic gate.
2.2. NOR gate:
A NOR gate is equivalent to OR gate followed by a NOT gate.
Symbol:

Truth Table for 2-input NOR gate

Input Output

A B Y = A +B
0 0 1
0 1 0
1 0 0
1 1 0

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Example 2.2:
Sketch the output waveform at X for the NOR gate shown in Fig. 2(c) with the given
input waveforms in Fig. 2(d).

Fig. 2(c)
Solution:
Fig. 2(c) NOR gate timing analysis.

Fig. 2(d)
NOR gate acts as Universal Gate.
Logic Gates using only NOR Gates

All the logic gate functions can be created using only NOR gates. Therefore, it is also
known as a Universal logic gate.

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2.3. EX-OR gate:
An EX-OR gate (Exclusive OR gate) is a digital logic gate with two or more inputs and one
output that performs exclusive disjunction.
The logic function implemented by a 2-input Ex-OR is given as either: “A OR B but NOT
both” will give an output at Y.
The result of EX-OR operator is 1 whenever odd number of variables are 1, hence it is
named as odd function.
2 input EX-OR Gate is inequality checking Gate.
Symbol of two input XOR gate

̅𝐁
̅+𝐀
𝐀 ⊕ 𝐁 = 𝐀𝐁

Truth table for 2-input EX-OR gate:

The truth table of EX-OR gate is shown in the below table. From this , it is clear that EX-
OR gate produces a low logic that is logic ‘0’ , at its output , when both the inputs are
same .When the two inputs are different it produces a logic high value i.e logic ‘1’ at its
output.
Input Output
A B Y = A ⨁B
0 0 0
0 1 1
1 0 1
1 1 0

EX-OR Gate Equivalent circuit:

A B C
0 0 0
0 1 1
1 0 1
1 1 0

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(
Y = ( A + B) A + B )
= AB + AB

= A B
EX-OR Gate using basic Logic Gates:
• NOR Gate:
y = A B

= AB + AB

= AB + AB + A A + BB

(
= ( A + B) A + B )
Implementing this using NOR Gates:

• NAND Gate:
y = A B

= AB + AB

= ((AB’ +A’B)’)’
= ((AB’)’(A’B)’)’
Implementing this using NAND Gates:

3-input Ex-OR Gate:

The Boolean function for the 3- input XOR gate is
Q = A  B  C = ABC + A’B’C + A’BC’ + AB’C’.

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3-Input Ex-OR gate logic symbol:

Truth table of 3 input EX-OR gate:

EX-OR gates have HIGH input when odd numbers of inputs are at HIGH level. So, the 3-
input OR gate is called as “Odd functioned OR gate”.
3-input XOR gate
A B C Output
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 1
1 0 1 0
1 1 0 0
1 1 1 1

Laws:
a. Commutative Law:
This law is also used in mathematics and applied in different binary logic gate operations
and it takes the operations multiplication and addition.
Symbolically, it can be written as follows as:
ab=ba
a+b=b+a
Let us assume that two inputs of an XOR gate are A & B then,
A  B = AB + AB

Now:
For commutative law:
A  B = AB + B A

and
B  A = B A + AB

Since A  B = B  A

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Therefore: EX-OR is commutative
b. Associative Laws:
Symbolically, it can be written as follows as:
a(bc)=(ab)c
a+(b+c)=(a+b)+c
let us assme EX-OR gate with three inputs A, B and C
there,
A  (B  C) = A  (B C + B C)

= A (B C + B C) + B C + B C A

(
= A B C + A B C + B C.B C A [ ) A + B = A .B using Demorgan’s law]

= A B C + A B C + (B + C).(C + B) A  A = A

 

= A B C + A B C + (BC + BB + CC + C B) A

= A B C + ABC + (BC + 0 + 0 + C B) A  A A = 0
 

= A B C + A B C + ABC + AB C

And
(A  B)  C = (AB + BA)  C

= A B + B A C + (A B + B A)C

( )
= AB + B A C + ABC + B AC

= ( A + B ) . (B + A )  C + A B C + A B C
 

= (A + B) . (B + A) C + A B C + A B C

= (AB + AA + BB + A B) C + A B C + A B C

= (AB + 0 + 0 + A B)C + A B C + A B C

= A B C + A B C + ABC + A B C

Since; A  (B  C) = (A  B)  C

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Example 2.3: For the circuit given below F is given by:

Solution:
Output of 1 is F1 = x  x = 0

Output of 2 is F2 = x  0 = x

Output of 3 is F = x  x = 0
i.e. F = 0
2.4. EX-NOR gate:
Exclusive NOR – is a digital logic gate whose function is the logical complement of the
exclusive OR (XOR) gate. Logically, an EXNOR gate is a NOT gate followed by a EXOR
gate. The output of EXOR gate is inverted in EXNOR gate. In XOR operation, the output
is only 1 when only one input is 1. The output is logical 0 when both inputs are same that
means they are either 1 or 0.
It is also known as equality checking gate or coincidence logic gate.
Symbol for two input X-NOR gate

Truth table for 2-input X-NOR gate

Input Output
A B Y=A⨀B
0 0 1
0 1 0
1 0 0
1 1 1

Boolean expression for EX-NOR gate is Y = A  B

Apply De-Morgan's theorem:

( )(
A  B = AB + AB = AB. AB = A + B A + B = AB + AB)
The output of a two input EX-NOR gate is logic '1' when the inputs are same and a logic
'0' when they are different.

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X-NOR gate using AND OR and NOT gate

Truth Table:
A B Y
0 0 1
0 1 0
1 0 0
1 1 1

𝑌 = (𝐴 + 𝐵̄ )(𝐴̄ + 𝐵̄ ) =  𝐴𝐵 + 𝐴̄𝐵̄ = 𝐴 ⊙ 𝐵

2.5. EX-OR & EX-NOR Properties:

A⨀A=1 A⊕A=0

A ⨀ 0 = A’ A ⊕ 0 =A

A⨀1=A A ⊕ 1 = A’

A ⨀ A’ = 0 A ⊕ A’= 1

A’ ⨀ B’ = A ⨀ B A’ ⊕ B’ = A ⊕ B

If A ⊕ B = C
If A⨀B = C
Then, B ⊕ C = A
Then A ⨀ C = B
A⊕C=B
B⨀C=A
A⊕B⊕C=C⊕C
A⨀B⨀C=1
=0

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2.6. Venn Diagram:

A B Output

0 0 1

NAND A ·B 0 1 1

1 0 1

1 1 0

A B Output

0 0 1

NOR A +B 0 1 0

1 0 0

1 1 0

A B Output

0 0 0

XOR AB 0 1 1

1 0 1

1 1 0

3. ALTERNATE LOGIC GATE REPRESENTATION

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Example 3.1: In the following circuit, find the output Z?

Solution:
From the given circuit, we can observe that input to last XNOR is same, so, the XNOR output
is given by (let input is X)

Z = X.X + X.X = X + X = 1

i.e. the output will be high [logic 1] irrespective of the inputs A and B.
Example 3.2: The gate G1 and G2 in figure shown below have propagation delays of 10ns and
20ns respectively.

If input Vi makes an abrupt change from logic 0 to 1 at t = t 0, then find the output waveform
V0?
Here, t1 = t0 + 10 ns, t2 = t1 + 10ns, t3 = t2 + 10 ns.
Solution:
Let the output of G1 = X
The output waveform will be as shown in figure below.

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4. BOOLEAN FUNCTION

Binary variables, the constants 0 and 1, and the logic operation symbols make up a Boolean
function represented by an algebraic expression. The function can be either 1 or 0 for a given
value of the binary variables. A truth table can be used to describe a Boolean function. The
truth table has 2n rows, where n denotes the number of variables in the equation.
4.1. LAWS OF BOOLEAN ALGEBRA
4.1.1. Commutative Law:
The commutative law allows change in position of variables around (.) and (+)
operator. There are two commutative laws.
A +B =B+ A
A B = B  A

4.1.2. Associative Law:

( A + B ) + C = A + (B + C )
( A  B )  C = A  (B  C )
4.1.3. Distributive Law:
The distributive law allows factoring or multiplying out of expressions. There are two
distributive laws.
A.(B + C) = A.B + A.C
A + B.C = (A + B).(A + C)
4.1.4. Idempotence Law:
Idempotence means the same value. These are two idempotence laws.
AA = A
A+A=A

4.1.5. Absorption Law:

There are two absorption laws.
A + AB = A (1 + B ) = A
A ( A + B) = A

4.1.6. Consensus theorem:

There are two consensus theorems
AB + AC + BC = AB + AC

( A + B) ( A + C ) (B + C ) = ( A + B ) ( A + C )
4.1.7. Involution Law:
This law states that, for any variable A

A = ( A  ) = A

4.1.8. De-Morgan's theorem:

De-Morgan’s theorem represents two of the most important rules of Boolean algebra.

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I. A .B = A + B

II. A + B = A .B
The above two laws can be extended for 'n' variables as,
A1.A2.A3... + An = A1 + A2 + ...An

and A1 + A2 + ... + An = A1.A2...An

( ) (
Example: Prove that: ( A + B ) B + C ( C + A ) = ( A + B ) B + C . )
Solution: Taking L.H.S:

( A + B ) (B + C ) ( C + A )
( )
= AB + AC + BC ( C + A )

= ABC + AC + BC + AB + AC + ABC

= AC + BC + AB

( )
Now, R.H.S = ( A + B ) B + C = AB + AC + BC = L.H.S

4.1.9. Duality theorem:

Duality Theorem states that,
a) Change each OR sign by an AND sign and vice versa.
b) Compliment any '0' or '1' appearing in expression
c) keep literals as it is.
n
NOTE: With N variables, maximum possible distinct self-dual possible = 2 2
Example: What is the dual of x + xy = x + y ?
Solution:
Apply duality theorem in the given expression x + xy = x + y .
Now, Interchanging the ‘+’ and ‘·’ operator in the given expression.
So, expression becomes x ( x + y ) = xy

Basic Rules of Boolean Algebra

1. A + 0 = A 7. A · A = A

2. A + 1 = 1 8. A · A = 0

3. A · 0 = 0 9. A = A

4. A · 1 = A 10. A + AB = A

5. A + A = A 11. A + AB = A + B

6. A + A = 1 12. (A + B) (A + C) = A + BC

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5. REPRESENTATION OF BOOLEAN FUNCTIONS

Any Boolean expression can be expressed in two forms

• Sum of Product form (SOP)
• Product of Sum form (POS)
5.1. SOP form:
The SOP expression usually takes the forms of two or more variables ANDed together.
Y = ABC + AB + AC

Y = AB + BC
SOP forms are used to write logical expression for the output becoming logic '1'.
Example:

Input (3-variables) Output (Y)

A B C Y
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 1

∴ Notation of SOP expression is:

f(A, B, C) = Σm(3, 5, 6, 7)
Y = m 3 + m 5 + m6 + m7
Also, Y = ABC + ABC + ABC + ABC
5.2. POS form:
The POS expression usually takes the form of two or more OR variables within
parentheses, ANDed with two or more such terms.
Example 5.1:

( )(
Y = A + B + C BC + D )
Each individual term in standard POS form is called maxterm.
POS forms are used to write logical expression for output be coming logic '0'.
we get f(A, B, C) = πM(0, 1, 2, 4)
Y = M0.M1.M2.M4

( )( )(
Y = ( A + B + C) A + B + C A + B + C A + B + C )
∴ We can also conclude from Table 2 and from above equations:
if Y = Σm(3, 5, 6, 7) or Y = πM(0, 1, 2, 4)

6. CANONICAL FORMS

We can use the Boolean function in two different ways. The minterm canonical form and the
maxterm canonical form are two of these methods. A Boolean function is said to be in its
canonical form if it can be represented as a sum of minterms or a product of maxterms.

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6.1. Literal
A Literal signifies the Boolean variables including their complements. Such as B is a
boolean variable and its complements are ~B or B', which are also the literals.
6.2. Minterm
The product of all literals, either with complement or without complement, is known as
minterm.
Any Boolean function can be expressed as a sum (OR) of its 1- minterms.
A shorthand notation:
F(list of variables) = Σ(list of 1-minterm indices)
Ex. F = x' y z + x y' z + x y z' + x y z
= m3 + m5 + m6 + m7
or
F (x, y, z) = Σ(3, 5, 6, 7)
The inverse of the function can be expressed as a sum (OR) of its 0- minterms.
A shorthand notation:
F'(list of variables) = Σ(list of 0-minterm indices)
Ex. F ' = x' y' z' + x' y' z + x' y z' + x y' z'
= m0 + m1 + m2 + m4
or
F ' (x, y, z) = Σ(0, 1, 2, 4)
6.3. Maxterm
The sum of all literals, either with complement or without complement, is known as
maxterm.
Any Boolean function can be expressed as a product (AND) of its 0- maxterms.
A shorthand notation:
F(list of variables) = Π(list of 0-maxterm indices)
Ex. F = (x+y+z) • (x+y+z') • (x+y'+z) • (x'+y+z)
= M0 • M1 • M2 • M4
Or
F (x, y, z) = Π(0, 1, 2, 4)
The inverse of the function can be expressed as a product (AND) of its 1-maxterms.
A shorthand notation:
F(list of variables) = Π(list of 1-maxterm indices)
Ex. F ' = (x+y'+z') • (x'+y+z') • (x'+y'+z) • (x'+y'+z')
= M3 • M5 • M6 • M7
or
F ' (x, y, z) = Π(3, 5, 6, 7)

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6.4. Conversion between Canonical Forms:
The number of minterms in the complement of a function equals the sum of minterms
absent from the original function. This is due to the fact that the original function is
represented by those minterms that make the function equal to 1, while its complement
is a 1 for those minterms that make the function equal to 0.
F(A,B,C) = Σ(1, 4, 5, 6, 7)
This function has a complement that can be expressed as
F’(A,B,C) = Σ(0, 2, 3) = m0 + m2 + m3
Now, if we take the complement of F’ by DeMorgan’s theorem, we obtain F in a different
form:
F = (m0 + m2 + m3)’ = m0’.m2’.m3’ = M0M2M3 = Π(0,2,3)
The last conversion follows from the definition of minterms and maxterms is shown as:
m j ’ = Mj
That is, the maxterm with subscript j is a complement of the minterm with the same
subscript j and vice versa.

7. KARNAUGH MAP (K-MAP)

The K-map is a graphical method which provides a systematic method for simplifying the
Boolean expressions. In n variable K-map, there are 2n cells.
A binary variable can appear in either its regular (x) or complement (x') form. Consider the
combination of two binary variables, x and y, and the AND procedure. There are four possible
variations since each variable can appear in either form: x'y', x'y, xy', and xy. A minterm, or
regular product, is the name given to each of these four AND words. 2n minterms can be
formed by combining variables.
7.1. Two variable K-map:

7.2. Three variable K-map:

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7.3. Four Variable K-map:

7.4. Five variable K-map:

• 32 cells
• 32 Minterms (Maxterms)
Here, we have f(A, B, C, D, E)

8. SIMPLIFICATION RULES

1. Construct the K-map and place 1's in those cells corresponding to the 1's in the truth table.
Place the 0's in the other cells.
2. Examine the map for adjacent 1's and loop those 1's which are not adjacent to any other
1's. These are called isolated 1's.
3. Next, look for those 1's which are adjacent to only one other 1. Loop any pair containing
such a 1.
4. Loop any octet even if it contains some 1's that have already been looped.
5. Loop any quad that contains one or more 1's which have not already been looped, making
sure to use the minimum number of loops.
6. Form the OR sum of all the terms generated by each loop.

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Example 3.1: Simply a four variable logic function using K-map
f(A, B, C, D) = Σm(0, 1, 2, 4, 5, 6, 8, 9, 12, 13, 14) also implement the simplified expression
with AND-OR logic.
Solution:

f = C + AD + BD
  
∴ octet quad − II quad − I

⇒ Gate implementation:

9. REDUNDANT GROUP

If all the 1's in a group are already involved in some other groups, then that group is caused
as a redundant group. A redundant group has to be eliminated, because it increases the no of
gates required.

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10. DON'T CARE CONDITION

The combinations for which the values of the expression are not specified are called don't care
conditions.
Example 5.1:
Simply the given equation in part (i) and (ii)
(i) In terms of SOP. and don't care conditions
f(A, B, C, D) = Σm(1, 3, 7, 11, 15) + d(0, 2, 5)
(ii) In terms of POS and don't care conditions.
f(A, B, C, D) = πM(4, 5, 6, 7, 8, 12) + d(1, 2, 3, 9, 11, 14)
Solution:
(i)

(ii)

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11. IMPLICANTS, PRIME IMPLICANTS AND ESSENTIAL PRIME IMPLICANTS

11.1. Implicants:
Implicants is a product term on the given function for that combination the function
output must be 1.
11.2. Prime Implicant (PI)
Prime implicant is a smallest possible product term of the given function,
11.3. Essential Prime Implicants (EPI)
EPI is a prime implicant it must cover at least one minterms, which is not covered by
other PI.
If EPIs are covering all the min term then the function will have unique minimal form.
Example 6.1: For the given K-map, find Implicant, PI and EPI

Solution:
Here, total no of 1's = 5
∴ Implicants = 5

( )( ) ( )(
∴ Implicants = A B C . A B C ( ABC ) A B C ABC )
and prime implicant = A B, A C, AB, BC

and EPI = A B, AB

PI = 4
EPI = 2
11.4. Cyclic Prime Implicant:
If every min-term is covered exactly by two Prime Implicants, corresponding K-map is
called as cyclic prime implicant.
Properties of Cyclic functions:
• Every prime Implicant is of same size.
• Number of Prime Implicants are equal to number of minterms.
• Every minterm is covered by at least two prime Implicants (which means no
essential prime Implicants).

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• Each prime implicant is having n-1 number of literals in it’s product form where n is
the number of variables of the given function.
• For a cyclic function we can have two minimal forms with no overlapping of prime
Implicants.

****

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