2/9/2021 EEE312 - Midterm Exam - Part 1 - Google Forms 2/9/2021 EEE312 - Midterm Exam - Part 1 - Google Forms

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EEE312 - Midterm Exam - Pa 1

Queencie F.Cuenca
Questions Responses 17 Total points: 50

Roy John D. Hilado

17 responses Erick S. Pastolero

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Melodino G Pacardo Jr.

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Sherwin L Bedrejo

John Fritz N. Magdael

Summary Question Individual

Jay Mark C. Labordo

Insights

The output of an AND gate with three inputs, A, B, and C, is HIGH when ________.
Average Median Range 16 / 17 correct responses
42.47 / 50 points 44 / 50 points 36 - 48 points

A. A = 1, B = 1, C = 0 1 (5.9%)
Total points distribution

B. A = 0, B = 0, C = 0 0 (0%)

✓ C. A = 1, B = 1, C = 1 16 (94.1%)

D. A = 1, B = 0, C = 1 0 (0%)

0 5 10 15 20
3
nts

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2/9/2021 EEE312 - Midterm Exam - Part 1 - Google Forms 2/9/2021 EEE312 - Midterm Exam - Part 1 - Google Forms

If a 3-input NOR gate has eight input possibilities, how many of those possibilities will The output of an OR gate with three inputs, A, B, and C, is LOW when ________.
result in a HIGH output? 13 / 17 correct responses

15 / 17 correct responses

✓ A. A = 0, B = 0, C = 0 13 (76.5%)
✓ A. 1 15 (88.2

B. A = 0, B = 0, C = 1 0 (0%)

B. 2 0 (0%)

C. A = 0, B = 1, C = 1 3 (17.6%)

C. 7 2 (11.8%)

D. all of the above 1 (5.9%)

D. 8 0 (0%)
0 5 10 15

0 5 10 15

Which of the following logical operations is represented by the + sign in Boolean algebra?
If a signal passing through a gate is inhibited by sending a LOW into one of the inputs, and 16 / 17 correct responses
the output is HIGH, the gate is a(n):
11 / 17 correct responses
A. inversion 0 (0%)

A. AND 2 (11.8%) B. AND 1 (5.9%)

✓ B. NAND 11 (64.7%) ✓ C. OR 16 (94.1%)

C. NOR 3 (17.6%) D. complementation 0 (0%)

0 5 10 15 20
D. OR 1 (5.9%)

0.0 2.5 5.0 7.5 10.0 12.5

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2/9/2021 EEE312 - Midterm Exam - Part 1 - Google Forms 2/9/2021 EEE312 - Midterm Exam - Part 1 - Google Forms

Output will be a LOW for any case when one or more inputs are zero for a(n): The output of a NOR gate is HIGH if ________.
16 / 17 correct responses 16 / 17 correct responses

A. OR gate 0 (0%) A. all inputs are HIGH 0 (0%)

B. NOT gate 1 (5.9%) B. any input is HIGH 1 (5.9%)

✓ C. AND gate 16 (94.1%) C. any input is LOW 0 (0%)

D. NOR gate 0 (0%) ✓ D. all inputs are LOW 16 (94.1%)

0 5 10 15 20 0 5 10 15 20

TTL operates from a ________. The format used to present the logic output for the various combinations of logic inputs to
17 / 17 correct responses a gate is called a(n):
16 / 17 correct responses

A. 9-volt supply 0 (0%)

A. Boolean constant 0 (0%)

B. 3-volt supply 0 (0%)

B. Boolean variable 1 (5.9%)

C. 12-volt supply 0 (0%)

✓ C. truth table 16 (94.1%)

✓ D. 5-volt supply 17 (100%)

D. input logic function 0 (0%)

0 5 10 15 20
0 5 10 15 20

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2/9/2021 EEE312 - Midterm Exam - Part 1 - Google Forms 2/9/2021 EEE312 - Midterm Exam - Part 1 - Google Forms

If a 3-input AND gate has eight input possibilities, how many of those possibilities will What does the small bubble on the output of the NAND gate logic symbol mean?
result in a HIGH output? 17 / 17 correct responses

13 / 17 correct responses

A. open collector output 0 (0%)

✓ A. 1 13 (76.5%)

B. tristate 0 (0%)

B. 2 0 (0%)

✓ C. The output is inverted. 17 (100%)

C. 7 4 (23.5%)

D. none of the above 0 (0%)

D. 8 0 (0%)
0 5 10 15 20

0 5 10 15

The output of a NOT gate is HIGH when ________.

The Boolean expression for a 3-input AND gate is ________. 17 / 17 correct responses

11 / 17 correct responses

✓ A. the input is LOW 17 (100%)

A. X = AB 0 (0%)

B. the input is HIGH 0 (0%)

✓ B. X = ABC 11 (64.7%)
C. power is applied to the gate's
0 (0%)
IC
C. X = A + B + C 6 (35.3%)
D. power is removed from the
0 (0%)
gate's IC
D. X = AB + C 0 (0%)
0 5 10 15 20

0.0 2.5 5.0 7.5 10.0 12.5

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2/9/2021 EEE312 - Midterm Exam - Part 1 - Google Forms 2/9/2021 EEE312 - Midterm Exam - Part 1 - Google Forms

If the input to a NOT gate is A and the output is X, then ________. If the output of a three-input AND gate must be a logic LOW, what must the condition of
16 / 17 correct responses the inputs be?
15 / 17 correct responses

A. X = A 0 (0%)
A. All inputs must be LOW. 1 (5.9%)

✓ B. X = A' 16 (94.1%)

B. All inputs must be HIGH. 1 (5.9%)

C. X = 0 0 (0%)
✓ C. At least one input must be
15 (88.2
LOW.
D. none of the above 1 (5.9%)
D. At least one input must be
0 (0%)
HIGH.
0 5 10 15 20
0 5 10 15

How many inputs of a four-input AND gate must be HIGH in order for the output of the
logic gate to go HIGH? Logically, the output of a NOR gate would have the same Boolean expression as a(n):
14 / 17 correct responses 17 / 17 correct responses

A. NAND gate immediately

A. any one of the inputs 0 (0%) 0 (0%)
followed by an inverter

✓ B. OR gate immediately
B. any two of the inputs 3 (17.6%) 17 (100%)
followed by an inverter

C. AND gate immediately

C. any three of the inputs 0 (0%) 0 (0%)
followed by an inverter

D. NOR gate immediately

✓ D. all four inputs 14 (82.4%) 0 (0%)
followed by an inverter

0 5 10 15 0 5 10 15 20

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2/9/2021 EEE312 - Midterm Exam - Part 1 - Google Forms 2/9/2021 EEE312 - Midterm Exam - Part 1 - Google Forms

What is the Boolean expression for a three-input AND gate? A truth table illustrates how the input level of a gate responds to all the possible output
15 / 17 correct responses level combinations.
10 / 17 correct responses

A. X = A + B + C 2 (11.8%)

✓ B. X = A · B · C 15 (88.2 A. True 7 (41.2%)

C. A – B – C 0 (0%)

D. A $ B $ C 0 (0%) ✓ B. False 10 (58.8

0 5 10 15

0 2 4 6 8 10

Which of the following gates has the exact inverse output of the OR gate for all possible
input combinations? A NOR gate output is LOW if any of its inputs is LOW.
17 / 17 correct responses 13 / 17 correct responses

✓ A. NOR 17 (100%)

A. True 4 (23.5%)

B. NOT 0 (0%)

C. NAND 0 (0%)

✓ B. False 13 (76.5%)

D. AND 0 (0%)

0 5 10 15 20 0 5 10 15

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2/9/2021 EEE312 - Midterm Exam - Part 1 - Google Forms 2/9/2021 EEE312 - Midterm Exam - Part 1 - Google Forms

A NOR gate and an OR gate operate in exactly the same way. An AND gate output is LOW if all the inputs are HIGH.
15 / 17 correct responses 15 / 17 correct responses

A. True 2 (11.8%) A. True 2 (11.8%)

✓ B. False 15 (88.2 ✓ B. False 15 (88.2

0 5 10 15 0 5 10 15

A NAND gate output is LOW only if all the inputs are HIGH. An exclusive-NOR gate output is HIGH when the inputs are unequal.
9 / 17 correct responses 11 / 17 correct responses

✓ A. True 9 (52.9%) A. True 6 (35.3%)

B. False 8 (47.1%) ✓ B. False 11 (64.7%)

0 2 4 6 8 10 0.0 2.5 5.0 7.5 10.0 12.5

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