RAD750 SpaceVPX ®

single board computer

The RAD750® SpaceVPX single board computer
SpaceVPX
(SBC) integrates the RAD750 V2 or V3 processor connector

components with the RADNET™ SpW-RB4

bridge application specific standard product FPGA RADNET
SpW-RB4 ASSP
(ASSP). It can optionally integrate with the 1
MByte L2 cache multi-chip module, along with 128 MB standard
random-access
volatile and non-volatile memory on a 6U-220 memory with
RAD750
processor
format module compliant to the ANSI/VITA error-correcting
code
78.00 SpaceVPX standard. L2 cache
Point-of-load
MCM
The SBC is designed to support operation as a system converters

controller in a SpaceVPX backplane for moderately sized

systems. With the RADNET SpW-RB4 bridge ASSP, the MIL-STD-1553B
SBC provides four SpaceWire links at 256 Mbits/second transceiver/
transformers
to the backplane with an on-die SpaceWire router as well
as a redundant MIL-STD-1553B interface that can be
directed either to the backplane or to the card header.
The SBC includes up to 128 MBytes of radiation-hardened
SRAM with error correction at 83 MTransfers/second and
512 MBytes of triple modular redundant non-volatile flash
memory. The flash memory and inter-integrated circuit
(I2C) interfaces are provided through a radiation-tolerant
fuse-based FPGA. Optionally, a 33 MHz, 32-bit peripheral
component interconnect (PCI) bus is provided to the
backplane for interface to legacy modules.

Key SE Utility plane

P0/J0 I2C+
Utility S
E Diff
plane P1/J1
RADNET™ I/O FPGA RADNET™ RADNET™ RADNET™ I/O RADNET™
User defined SPW-RB4 FPGA FPGA 1616-XP SPW-RB4 1616-XP FPGA SpW-RB4
User S Diff ASSP ASSP ASSP ASSP ASSP
defined E P2/J2
SRAM SRAM I/O
Key Power Processor Peripheral Power SpaceUM Payload Switch Controller Payload Peripheral Heritage
User defined
S Diff Control plane supply module module module module module module module module module compact
E
P3/J3 SpaceWire PCI module
DDR3 DDR3
Diff
4 thin pipes, L2 CACHE DRAM L2 CACHE DRAM
S
E P4/J4
9 thin pipes
Reserved RAD750® RADNET™ RADNET™ RADNET™ RAD750® RAD5545™ RADNET™
processor SPW-EP SRIO-EP 1848-PS processor processor SPW-EP
ASSP ASSP ASSP ASSP
S SE Expansion plane
E P5/J5 RapidIO
32-bit PCI bus Data
Control SpaceWire Control SpaceWire
To S Diff Utility
E P6/J6 16 pairs plane Utility I2C Utility I2C
SpaceUM
Key 8 pairs I2C+ Expansion PCI Expansion XAUI PCI
Possible small system solution Representative SpaceVPX network (redundant modules not shown)

baesystems.com/space
Key features and benefits Specifications
• RAD750 V2 or V3 processor throughput of up to 500 SpaceVPX Slot profiles:
Dhrystone million instructions per second offers up to 2x System controller without data plane
higher throughput than earlier RAD750 SBCs Module profiles:
• With the optional 1 MByte L2 cache, the RAD750 V2 Controller: MOD6-CON-4T12U-12.6.2-21-22
can efficiently handle larger programs and data at lower Mechanical size: 6U-220
latency for enhanced system performance Card pitch: 1.2 inches
• Radiation-hardened SRAM with error correction and Cooling: conduction
up to 128 Mbytes of capacity offer the largest high Power profile
reliability main memory capacity of any RAD750-based 5.0 V (+/- 10%): 2.163 Amps
SBC, supporting more complex applications in very 3.3 V AUX: 0.033 Amps
stringent environments User-defined I/O: Differential
• Designed for insertion into the SpaceVPX backplane Temperature Operating at -55 to +125 degrees Celsius
to support the SpaceWire control plane and system Radiation- Total ionizing dose: 100 Krad (Si)
management inter-integrated circuit utility plane for hardness Single event upset: 3.5e-3 upsets/card-day
interoperability with other SpaceVPX-compliant boards (with L2 cache and 128 MB of SRAM)
Latchup immune
• Triple modular redundant flash memory enables high-
density non-volatile storage with high reliability Power 10.9 Watts at 95 degrees Celsius and +5 percent
dissipation voltage
• Redundant MIL-STD-1553B and 32-bit parallel PCI Interfaces Up to 4 SpaceWire serial links to the backplane up
interfaces provide connection to legacy hardware,
to 256 Mb/s each
supporting backwards compatibility with existing
components and systems I2C and related utility plane control signals
Redundant A/B MIL-STD-1553B
• For flexibility, the MIL-STD-1553B interface may be sent 32-bit, 33 MHz parallel PCI
either to the backplane or the header
JTAG test and debug

Hardware block diagram

L2 Bus OSC
0.5 GB 128 GB RAD750® L2 cache 80 MHz
TMR MB processor 66 MHz
Flash SRAM 50 MHz
60X Bus

Utility RADNET™ XCVR /

FPGA Memory, test, SpW-RB4 XFRMRS
and low speed POLs with
interfaces sequencer

Utility PCI Bus LVDS

plane Test 32-bit SpaceWire
(P2 and P6) 1553 3.3V AUX 5V
(x5) (P5) 4x 256 Mbps
A&B (P0)
(x1 on P0) (P4)
(P2 or Header)
(x4 on P6)

For more information contact: Disclaimer and copyright

This document gives only a general description of the product(s) and service(s) and,
BAE Systems except where expressly provided otherwise, shall not form any part of any contract.
9300 Wellington Road From time to time, changes may be made in the products or the conditions of supply.
Manassas , Virginia 20110-4122
T: 571 364 7777 BAE Systems reserves the right to restrict component sales based on application and
volume. Please contact the factory for more information.
E: space.contact@baesystems.com
W: baesystems.com/space BAE SYSTEMS is a registered trademark of BAE Systems plc.
©2018 BAE Systems. All rights reserved.
Cleared for open publication on 07/19 CS-17-F04

BAE Systems | RAD750® single-board computer