Professional Documents
Culture Documents
Issue 1.0
FMJ CD23
Compact Disc Player (Text)
ARCAM
Contents List
! Service guide
o Fault diagnostics
o Power supply test points
o Hints & tips
o Circuit description
o Component overlay
o Parts list
o Circuit diagrams
o Circuit description
o Component overlay
o Parts list
o Circuit diagrams
! Transformer specifications
o L859TX
o L860TX
o L883TX
! General assembly
o Parts list
Service Guide
Contents
! Fault diagnostics
Fault diagnostics
Fault Action
No power Check mains fuse
Check power supply rails
No Audio output Check for digital output, if ok then
check power supply voltages
Check DAC chip
Intermittent noise on output Check Dac chip
Fails to respond to commands Check supply to remote circuit
Check remote flex foil cable
Check for +4.9volts on RX201 o/p
Fails to read disc Check mech supply
Check clock signal
Laser optic moves to end stop Caused by failure of clock signal to
position the mech
Check mech supply
Check clock signal
No Display Check filament voltage 3.1vac
Check flex foil cable
Check for dry joints on micro and
display
Spurious display readout Check for dry joints on display board
Position Voltage
DGND 0 volts
PL202 +12 volts
PL204 -12 volts
IC200 o/p +7.3 volts - mech supply
IC203 o/p +5 volts - DAC supply
IC202 o/p +5 volts - Digital supply
IC204 o/p -30 volts
Between R227 & R228 3.1 volts AC – display filament
Contents
! Circuit description
! Component overlay
! Parts list
! Circuit diagrams
CD23 (text) Circuit Description Clock Buffering
The clock and data signals LRCK, ADATA and BCLK from the
Power Supplies Transformers mechanism connector SK300 are double buffered by IC300
before being delivered to the DAC.
115/230 VAC:
! Main board - part number L859TX
! Toroid - part number L860TX Power-On/Reset
100 VAC: The power-on reset signal XRST (or RESET) is generated by
! Main board - part number L862TX R409, C410 and IC404. When the power is turned on, C410 is
! Toroid - part number L883TX initially uncharged and pin 11 of IC404 is at high voltage, and
thus the output is low. After a short time, C410 is charged via
Main board transformer secondary windings: R409; IC404 pin 11 is then low, and the output switches high
(RESET is de-asserted).
1. 9V-0V-32V to produce the digital, motor drive and
fluorescent display grid supplies
+11V(U) Unregulated supply for relay drive and System Clock
+5V(D) supply
+7V (IC200) Mechanism and motor driver The system clock is generated on the DAC board.
supply The clock and data signals LRCK, ADATA and BCLK from the
+5V(D) (IC202) General digital logic supply mechanism connector SK300 are double buffered by IC300 before
+5V(A) (IC203) Supply to DAC being delivered to the DAC. The system clock is delivered to the
-30V (IC204) Display grid voltage. mech via two-position jumper PL300.
Motor Driver
Digital Output
The status of the drawer is indicated to the micro by two micro
switches ‘INSW’ and ‘OUTSW’ on SK205. The micro controls The decoder on the mechanism assembly generates an SPDIF
the drawer motor via driver IC303. format digital output signal. This is passed to buffer IC500A.
IC500B through E are used in parallel to provide a transformer
less 75-ohm source impedance to a single phono socket SK501.
Optical digital output via IC502 is also tapped off the digital
output signal via IC500F.
CAM Products 2000(TM):
L935 Main Board Parts List Issue 4.0
0V_MOT 0V_1
0V_DIG 0V_3
0V_2
SP100
STARPOINT
EMC2
PCB IC302SW
S/W
PCB
L825SW
L935PB_4
DRAWING TITLE
CD23T - TOP LEVEL SCHEMATIC
Filename: L935C6_4.0.prj
23425 Notes: 02_E011 WAF 22/1/02 PCB REMOTE SNAP OFF CHANGE 4.0
A & R Cambridge Ltd. 01_1171 CL 04/10/01 ADMINISTRATIVE ISSUE CHANGE, PCB TO ISS3 FOR AIWA REQ 3.0
Pembroke Avenue
ECO No. INITIALS DATE DESCRIPTION OF CHANGE ISSUE
Waterbeach
Cambridge CB5 9PB Contact Engineer: Travis Pierce Contact Tel: (01223) 203 200 Printed: 23-Jan-2002 Sheet 6 of 6 DRAWING NO. L935CT
SK201
MOLEXPWR4
SK200 EL200 (FOR AUX TOROID)
IEC3
2
EARTH LEAD
8M101
N E L EARTH LEAD
(IEC INLET TO CHASSIS)
N
4
E
TX200 TX_16 +12V(A)
C200 C201 SW200A L859TX
MAINS_SW A1010 + C211 + C223
3N3(X1Y2) 3N3(X1Y2)
BR201 1M0 25V 1M0 25V
DF01M
NEUTRAL2
R202 1 D200
NEUTRAL 1M5 VR25 LIVE LIVE2 SW200B
MAINS_SW A1010 TX_18 0V_1
EMC2 2 1N4148 + C212 + C224
BRN BRN
C203 7 IC200 1M0 25V 1M0 25V
220N(X2) +11V(U) LM1086-ADJ HS201 +7V
TO220HS30REG
L200 L201 C202 11 AC1 I O
Vin Vout
6U8H 6U8H 115V 6 BR200 Motor drive supply -12V(A)
A ADJ
3N3(X1Y2) DF01M + C210 R203 D201
NEUTRAL2 EMC2 3M3 EL 330R MF 1N4148
BLU
FS200
115V C206
CA1 4 100N CD + C228
BLU
SK202 1M0 10V
3 6 L920CA T250MA115V + C218 R214
L920CA 115V ONLY 5 13 AC2 100U EL 1K6 MF
2 5 10
1 4 FS201
230V 9 C207 + C225 + C226 R215 R217
MOLEXPWR6 100N CD D213 100U EL 100V 100U EL 100V 22K MF 33K MF 0V_2 +11V(U) D206
(FOR AUX TOROID) T160MA
230V 15 R211
AC_3
230V ONLY 10R FU + C227
19 TX_19 1N4003 100U EL 100V IC202 1N4148 HS200
ADJ A
R210 1R0 FU R216 D214 TO220HS08REG +5V(D)
C208 1K0 MF 5V1 400MW I LM317T O
R212 100N CD Vin Vout
20 TX_20 Digital +5V
ADJ
1R0 FU I O R218 D208
Vin Vout 1N4148
LM337T 270R MF + C220
HS
IC204 -30VF Filiament supply 100U EL
A
NB: A CABLE GOES BETWEEN BRN BRN AND BLU BLU
D205
FROM MAINS SWITCH TO BACK OF PCB FILA
R227 + C219 R220
100R MF C209 100U EL 820R MF
1N4148 100N CD
R228
FILB
100R MF
0V_2
Y200
TX WIRE CLIP D211
ADJ
22 R219 D212
Y201 Y202 1N4148
SCREW HF4V09B SCREW HF4V09B 21 270R MF + C229
20 1M0 10V
A
R226 -12V(A) 19
TR204
10K MF BC557B 18
17 + C222 R221
Y203 Y204 C215
+5V(A) 16 100U EL 820R MF
SCREW HF4V09B SCREW HF4V09B R229 D215 100N PE
15
1K5 MF 1N4148 14
TR200 13
R222 BC549B +5V(D) 12 0V_1
470K MF 11
+ TR201 10
C221 BC549B R230 RLYPWR 9
100U EL 10K MF 8
7
D209 0V_3 +11V(U) 6
AC1 5
4
1N4148 3
D210 TR202 2
AC2 R213 R224 R223 BC549B TR203 1
10R FU 10K MF 10K MF BC549B
1N4148 + C231 + R225 FFC23V
C230 10U EL 2K2 MF Power connector for 9DAC PCB
100U EL
0V_DIG
E922MC
DRAWING TITLE
MC201
CD23T - POWER SUPPLIES
E923MC
Filename: L935C2_4.0.sch
E923MC 23425 Notes: 02_E011 WAF 22/1/02 PCB REMOTE SNAP OFF CHANGE 4.0
A & R Cambridge Ltd. 01_1171 CL 04/10/01 ADMINISTRATIVE ISSUE CHANGE, PCB TO ISS3 FOR AIWA REQ 3.0
Pembroke Avenue
ECO No. INITIALS DATE DESCRIPTION OF CHANGE ISSUE
Waterbeach
Cambridge CB5 9PB Contact Engineer: Travis Pierce Contact Tel: (01223) 203 200 Printed: 23-Jan-2002 Sheet 2 of 6 DRAWING NO. L935CT
Data connector to DAC PCB Flexfoil connector to Display PCB
SK301 SK302
FFC32V FFC32V
+5V(D) +5V(D)
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
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8
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5
4
3
2
1
32
31
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9
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6
5
4
3
2
1
14
EMPHASIS
LOADSW
IC300G 0V_DIG
AMUTE
AMUTE
LDOUT
C300 74HCU04 C301 R315
IREYE
SCOR
DEEM
DEEM
SQCK
SUBQ
LDON
HDCD
HDCD
SENS
XRST
XRST
DATA
RMIN
100N CD 100N CD
LDIN
10K MF
RA0
RB6
RB5
RB4
RB0
CLK
LPH
XLT
7
IC300A IC300B
BCLK 1 2 3 4 R300
56R MF -30VF 0V_DIG
0V_DIG C309
74HCU04 74HCU04 10P CD 0V_DIG
FILA
FILB
NF
0V_DIG
IC300C IC300D
Flex connector from CDM14BL-5BD25 mech
SK300 ADATA 5 6 9 8 R304
FFC23V 56R MF
23 CLK C310
74HCU04 74HCU04 10P CD
22 XRST
21 DATA NF
20 LDON 0V_DIG
19 SENS
18 XLT
+5V(D) 17 SUBQ
16
15
DIGOP IC300E IC300F
14
13 SQCK LRCK 11 10 13 12 R306
12 AMUTE 56R MF
0V_DIG 11 BCLK C311
74HCU04 74HCU04 10P CD
10 SCOR
9 ADATA NF
8 LRCK 0V_DIG
+7V 7
6 17MHz Master Clock (From 9 DAC PCB)
5
4
3
2 LPH
0V_DIG 1
R314 +5V(D)
10K MF
+5V(D)
R303
0V_DIG 6K8 MF
R311 Motor Drive
100K MF IC302 IC303 SK303
PIC16C54XT LB1641 8K2005
+5V(D) RA0 17 6 RB0 10 1
RA0 RB0 O/P 'Out' LOADOUT
AMUTE 18 RA1 RB1 7 2 LOADIN
DEEM 1 8 9 3
D300 RA2 RB2 GND
RMIN 2 9 +7V LOADSW 4
1N4148 RA3 RB3 C307 INSW
R313 RB4 10 RB4 Vcc 8 0V_MOT 5 OUTSW
100K MF 3 11 RB5 + C306 10N CD
RTCC RB5 R312
12 RB6 7 C303 100U EL
RC5 IP RB6 Vcc
+5V(D) XRST 4 13 100N CD 6K8 MF
C304 MCLR RB7 6 LDOUT
100P CD LoadOut
OSC1
15 OSC2
VDD
VSS
R308 R309 5 LDIN C308
10K MF 10K MF 0V_DIG LoadIn
RESET D301 100N CD
+5V(D) 4
16
14
Bias
3 4V7 400MW
TR301 X300
BC549B CST4.00 2
O/P 'In'
+ C305
TR300 C302 100U EL 1
R307 100N CD GND
IREYE BC549B
10K MF 0V_MOT
R310
10K MF
0V_DIG
0V_DIG
DRAWING TITLE
CD23T - MECH, MOTOR & MICRO
Filename: L935C3_4.0.sch
23425 Notes: 02_E011 WAF 22/1/02 PCB REMOTE SNAP OFF CHANGE 4.0
A & R Cambridge Ltd. 01_1171 CL 04/10/01 ADMINISTRATIVE ISSUE CHANGE, PCB TO ISS3 FOR AIWA REQ 3.0
Pembroke Avenue
ECO No. INITIALS DATE DESCRIPTION OF CHANGE ISSUE
Waterbeach
Cambridge CB5 9PB Contact Engineer: Travis Pierce Contact Tel: (01223) 203 200 Printed: 23-Jan-2002 Sheet 3 of 6 DRAWING NO. L935CT
L400
7F003 +5V(D)
14
R439
IC404G + C410 1M0 MF
C400 74HCU04 C414 100U EL
100N CD 100N CD
R432 11 10 13 12
7
10K MF
D400 R409
1N4148 10K MF IC404E IC404F
74HCU04 74HCU04
RESET
0V_DIG
1 2
IC404A
74HCU04
3 4
IC404B
74HCU04
5 6
IC404C
74HCU04
9 8
DRAWING TITLE
IC404D
74HCU04 CD23T - RESET CIRCUIT
0V_DIG
Filename: L935C4_4.0.sch
23425 Notes: 02_E011 WAF 22/1/02 PCB REMOTE SNAP OFF CHANGE 4.0
A & R Cambridge Ltd. 01_1171 CL 04/10/01 ADMINISTRATIVE ISSUE CHANGE, PCB TO ISS3 FOR AIWA REQ 3.0
Pembroke Avenue
ECO No. INITIALS DATE DESCRIPTION OF CHANGE ISSUE
Waterbeach
Cambridge CB5 9PB Contact Engineer: Travis Pierce Contact Tel: (01223) 203 200 Printed: 23-Jan-2002 Sheet 4 of 6 DRAWING NO. L935CT
CARRIER FILTER AND DEMODULATOR +5V(D)
R508 R509
10K MF 10K MF
2
1
R511 R512
8
SK500 3
470R MF 100K MF IC501C
C513 LM393A C500
IC501A
100P CD R504 D500 L500 R502 100N CD
JACK3.5 1K0 MF 4V7 400MW 27mH C508 1K8 MF LM393A R513
4
C509 680P PP 100K MF
100N CD
EMC1
R514 C507
R507 1K5 MF 100N CD
10K MF
5
7
RC5RP R510
6
IC501B 10K MF
LM393A C503
R503 1N0 CD
C510 1K8 MF
100P CD
0V_DIG
+5V(D)
R501
+5V(D) 10R MF
OPTICAL OUTPUT
R500
R505
2
10R MF 13 12
VCC
120R MF
1
I/P
GND
IC500F
14
74HCU04 + C506
C501
GP1FA550TZ 22U EL OS
3
C502 R506 10N CD
11 10 IC502
470N PE 1K2 MF
IC500G
7
74HCU04 IC500E
74HCU04
0V_DIG
0V_DIG 9 8 R516
1K2 MF
IC500D
74HCU04
1 2 5 6 R517 SK501
DIGOP
1K2 MF PHONO1
EMC COAXIAL OUTPUT
IC500A IC500C C505
74HCU04 74HCU04
IC500B
74HCU04 R519 R515
100R MF C512 10K MF
470P CD
C511
100N CD
0V_DIG
DRAWING TITLE
CD23T - RC5 INPUT & DIGITAL OUT
Filename: L935C5_4.0.sch
23425 Notes: 02_E011 WAF 22/1/02 PCB REMOTE SNAP OFF CHANGE 4.0
A & R Cambridge Ltd. 01_1171 CL 04/10/01 ADMINISTRATIVE ISSUE CHANGE, PCB TO ISS3 FOR AIWA REQ 3.0
Pembroke Avenue
ECO No. INITIALS DATE DESCRIPTION OF CHANGE ISSUE
Waterbeach
Cambridge CB5 9PB Contact Engineer: Travis Pierce Contact Tel: (01223) 203 200 Printed: 23-Jan-2002 Sheet 5 of 6 DRAWING NO. L935CT
FIX107 FIX108
FIXING HOLE 3.5 FIXING HOLE 3.2 +5VREM RX100 +5VREM REMOTE CUSTOM CODE DIODE MATRIX
D100
LK101A PIC-26043TM2 DISP100
1 D102 D105 DISPLAY 14-ST-20GK
3
2 IREYEREM 1N4148
3
+5V
C116 C117 1N4148 1N4148
1N0 CD 1N0 CD 4 C108 + C110
1 O/P
L814CA 10U EL D103
0VREM 0VREM 100N CD
GND
14G
13G
12G
11G
10G
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
P20
P21
HDCD LED
NC
9G
8G
7G
6G
5G
4G
3G
2G
1G
P1
P2
P3
P4
P5
P6
P7
P8
P9
F1
F1
42 F2
F2
LED101 SP104
LED ULTRARED D101 1N4148
1
2
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
41
IR RX
SUPPORT PAD
D104 F1 F2
0VREM 1N4148
IR RX SUPPORT PAD 1N4148
+5V DECOUPLING CAPACITORS FOR IC100
D106
R100
220R MF
+ C103 1N4148
(NEAR SK100)
100U EL C112 C104 C105 C106
CMO4
CMO3
CMO2
CMO1
100N CD 100N CD 100N CD 100N CD
LED100
LED GREEN
POWER LED
0V
C107
100N CD +5V
-30V LK101B
1 R114 10K MF +5V
2 IREYE_DISP
3 R115 10K MF
100
4
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
R116 10K MF
L814CA
S1
S2
S3
S4
S5
S6
S7
9G
8G
7G
6G
5G
4G
3G
2G
1G
VDD
12G
11G
10G
0V R117 10K MF
Connector to main PCB 1 80
13G S8
SK100 2 14G S9 79
FFC32H 3 78
NC S10
32 F1 +5V 0V 4 77
CMI1 S11
31 5 SCOR S12 76
30 SCOR_DISP 6 75
CMI2 S13
29 7 74
CMI3 S14
28 8 73
27 9 RMIN S15 72
CMI4 S16
26 RMIN_DISP 10 71
NC S17
25 LDOUT_DISP 11 70
24 LDIN_DISP 12 NC S18 69
LDOUT S19
23 SENS_DISP 13 68
LDIN S20
22 14 67
21 XLT_DISP 15 SENS S21 66
XLT NC
20 AMUTE_DISP 16 65
AMUTE NC
19 17 64
PGML NC
18 18 NC NC 63
17 19 62
NC NC
16 20 61
TIMER NC
15 21 NC NC 60
14 CLK_DISP 0V 22 59
CLK NC
13 LDON_DISP 23 58
LDON EMPHASIS
12 DATA_DISP 24 DATA CMO4 57 CMO4
11 SQCK_DISP 25 56 CMO3
SQCK CMO3
10 SUBQ_DISP 26 55 CMO2
SUBQ CMO2
9 LOADSW_DISP +5V 27 54 CMO1
8 XRST_DISP 28 NC CMO1 53
AVREF NC
ADJ/AFADJ
7 -30V 29 52
KEY0 NC
LOADSW
6 30 51
KEY1 NC
EXTAL
5 DEEM_DISP C109 R104
AVSS
KEY2
KEY3
XTAL
R105
VDD
VDP
RST
VSS
LPH
4 HDCD_DISP 100N CD 6K8 MF
NC
NC
NC
NC
NC
NC
NC
NC
3 LPH_DISP 6K8 MF IC100
2 F2 0V CXP82832
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
1 IREYE_DISP R106
SP103 R101 R103 R108 R109 R110 R111 R112
6K8 MF
10K MF 6K8 MF 3K3 MF 2K2 MF 1K5 MF 1K0 MF 680R MF R107
70mm x 25mm PIN 1 TO LEFT TACTSW A1510 0V +5V -30V
DOUBLE SIDED CABLE POINTING DOWN SW100 SW101 6K8 MF
SW102 SW103 SW104 SW105 SW106 SW107
STICKY GASKET 0V C129 R102
70X25_DS STICKY TAPE FIX105 FIX106 10N CD 10K MF
FIXING HOLE 3.5FIXING HOLE 3.5 R113 TACTSW A1510 TACTSW A1510 TACTSW A1510 X100
10R MF
0V NEXT PREV FF FR PAUSE STOP PLAY OPEN CST8.00
TACTSW A1510 TACTSW A1510 TACTSW A1510 TACTSW A1510
C114 C115 0V
1N0 CD 1N0 CD
E1 0V 0V
CD23TXT VFD SUPPORT FIX102 FIX103 FIX100 FIX101 FIX104
FIXING HOLE 3.5 FIXING HOLE 3.5 FIXING HOLE 3.2 FIXING HOLE 3.5 FIXING HOLE 3.5
E930MC
DRAWING TITLE
CHASSIS3 CD23T - DISPLAY AND MICRO
1
Contents
! Circuit description
! Component overlay
! Parts list
! Circuit diagrams
DAC Circuit description FPGA noise shaper
The FPGA (IC61) is programmed by the PROM (IC31), which
Refer to L912 circuit diagrams holds the configuration code, to perform the function of reading
in the 8x over-sampled audio data from the HDCD filter and
The DAC PCB converts Sony format digital audio data at output the noise-shaped and encoded data to drive the ring
44.1KHz sampling rate to unbalanced audio outputs. There is a DACs. This happens after the PRGMN line and the GO signal
Pacific Microsonics PMD-200 HDCD filter which is goes high.
programmed by a dedicated on board PIC micro (IC406) to
accept a variety of data formats. Ring DAC
Digital Filter/HDCD decoder The ring DAC (IC 63) re-latches the data from the FPGA to a
clean latching signal gated by U21 to the system clock. The data
The FPGA receives two control lines from the main board PIC, is then driven through buffers into resistor rings, which
RB0 and RB6. effectively form the 48 current sources, into a virtual earth point.
Bias currents are also injected to compensate for the way the
RB5 MS1, Serial data mode select 1. Used just after switch-on. ring data is encoded. The earth point is held at half the voltage
RB4 MS2, Serial data mode select 2. Used just after switch-on. reference voltage 2.5V or 1.25V depending on the HDCD gain
shift state. This level is generated by a matched resistor divider
The PMD 200 (IC 400) receives Sony format serial digital audio on the chip.
data (after re latching) mute and de-emphasis control signals
from the main board. The output from this is 8x over-sampled Voltage References
filtered audio data with a 24 bit word length. The HDCD filter
output is in serial form BCKO, WCKO, DOL and DOR. The current switches in the DAC need two reference voltage
levels per channel to switch each of the resistors between, 0V
Data Re-latching and +2.5/5V. The second reference can be switched between
+2.5 and +5V depending on the gain required by the HDCD
The PMD 200 (IC 400) requires that the input data is timed with filter. The reference points must be kept at a very quiet DC level
respect to the system clock, however the data edges are not well since any noise on these points is directly represented at the
defined when clocking at the system clock frequency so a re- audio outputs. To keep these points quiet, op-amp servos, IC 8,
latching circuit, IC300, IC 401, IC402 and IC403, re-clocks IC 9, IC 24 and IC 25 drive them through discreet buffers. A
SER_CLK, SER_DIN and SER_CH to double the bit clock second connection is made to the point on the chip which the
frequency. The phase of the latching clock is nudged if it’s op-amp uses as a sense line.
rising edge gets too close to the bit clock transitions.
DC Bias
Reset Signal
Because of the way the ring DAC works, not all the 48 current
The XRST reset signal from the mother board is buffered by IC sources are switched on at any one time in each ring. On each
300D & E to produce the GO signal. C127 at the input of the channel, one ring has an average of 14 sources on and the other,
buffer delays GO from falling when the unit is switched off so the compliment, has an average of 34. DC bias needs to be
that the mute relay has chance to close before any clicks occur. injected into the virtual earths to null the current offsets. This is
The GO signal enables the clock output, initiates PMD 200 and done by applying a DC voltage through on-chip matched
FPGA programming and enables power and bias to the DAC resistors. The applied voltages must be either side of the virtual
ASIC. earth voltage which is half the reference voltage. The DC levels
must also be proportional to the reference voltage. The bias
voltages are sourced by IC 4 and IC 23.
Power Supplies
TR7 and TR5 regulate the supply to +/-13V with about 0.2V Voltage Servo
drop-out margin.
A voltage servo, IC 22, ensures the audio output DC offset is
nulled by varying one of the DC bias levels slightly via R16 and
Voltage Reference R115.
To ensure the servo has stabilized by the time the mute relays
A voltage reference, IC 62, is used to derive the +/-13V rails as
are opened, the time constant of the servo is drastically reduced
mentioned above and also a clean 5V supply to the DAC from
while the mute relay is active by JFETs TR 27 and TR 28.
IC 5. The reference is filtered and can be divided by two if TR
19 is switched on to provide the 6dB gain shift required by the
HDCD filter(IC 400). This reference is used to drive the DAC Analogue Stages
reference point and the bias sources for the DAC.
The DAC has two pairs of complimentary outputs. Each output
is in the form of a virtual earth point which are then passed
Mute Relay through a current feedback I/V stage (IC2 and IC6). The gain
setting feedback resistor for the I/V stage is on the DAC chip
The mute relay is controlled from the PIC micro on the
matched to the resistors in the DAC ring.
motherboard via RA0 after switch-on. In Standby mode, XRST
The complementary signals are then passed through a
is low which interrupts the relay via TR 25. RA0 is low when
differential 4 pole passive LP filter with a bessel characteristic
the CD player comes out of standby mode and goes high after a
which removes a large amount of digital (ultrasonic) noise while
short settling delay. TR 18 is also used to interrupt the relay
causing minimum disruption to the audio band. They are then
while the FPGA is not fully programmed.
combined with a low distortion differential buffer amplifier to
The power rail, RLYPWR, is un-regulated and has a small
produce a single ended output (IC 3 and IC 7).
reservoir capacitor (on the mother board) so that the relay is
released very soon after the mains is disconnected from the CD
player before the other power supply rails collapse.
Specifications
Type of DAC : DCS-designed ring DAC ASIC with a 4 rings of 48 current sources.
DAC source : Encoded current source drive from FPGA. 14 of 48 current sources active on average on
two rings & 34 of 48 on the other two.
0dB Output Level : 2.3V rms (4.6V for HDCD mode) +/- 0.2V rms @ 1KHz.
Signal to Noise : Better than 93dB CCIR uwtd ref 1KHz 0dB,
Better than 97dB A weighted ref 1KHz 0dB. (Hoping to improve, please consult SJB
before publishing).
VCCD
ASSEMBLY DETAILS
L912C10_2.2.Sch C88
100N SM 28
VCC
GO 14
GO GND
POWER SUPPLY
DONE R144 * 22
OE/VPP
L912C7_2.2.SCH 0R0 SM 20
CE
GAIN
GAIN
A0 10 11 D0
A0 D0
D A1 9 12 D1 D
A1 D1
A2 8 13 D2
A2 D2
A3 7 15 D3
A3 D3
A4 6 16 D4
A4 D4
A5 5 17 D5
A5 D5
A6 4 18 D6
A6 D6
A7 3 19 D7
A7 D7
CLK_DAC A8 25
CLK17M_5V_DAC CLK17M A8
CLK_LATCH A9 24
CLK17M_3V_LATCH A9
CLK_PMD200 A10 21 D[0..7]
CLK17M_3V_PMD200 A10
XRST CLK_FPGA A11 23 IC31
XRST CLK17M_5V_FPGA A11
A12 2 27C512
A12
CLKMECH A13 26
CLKMECH A13
A14 27
A14
GO A15 1
GO A15
CLOCK
L912C8_2.2.SCH VCCD
Power ON/OFF MUTE relay RLYPWR
BAS16W SM
15K SM
RLY 51SB12T
15K SM
VCCD RA0
R145
R162
TR18
RLY1C
D3
R4 R12 VCCD
BC849B
10K SM 10K SM
C163
D[0..7] LDC +
D[0..7] LDC 220U EL
INTR
100K SM
4K7 SM
C INTR MUTERLY C
R166
CCLK TR25
R74
CCLK BC849B
GO
GO R23 TR1
WR
WR BC849B
DONE 2K2 SM
DONE
SER_CLK
4K7 SM
SER_DIN
FPGA
R8
SER_CH
VCCD L912C2_2.2.SCH
R114
SK3 XRST
1 R13 M2 A[0..15]
100K SM
M2 A[0..15] 100K SM
2 CLKMECH CLKMECH 10K SM
3 M0
M0
R9
4 SER_CLK SER_CLK RLY_GND
SER_DIN R28
5 DSP
SER_DIN SER_CLK DSP
6 SER_DIN 0R0 SM
SER_CH
7
0R0 SM
8 SER_CH SER_CH RE-LATCH RB0 AA[0..15] MUTERLY
MODE0 AA[0..15] AA[0..15] MUTERLY
9 L912C9_2.2.SCH RB6
* MODE1
R3
10 CLK_LATCH L[0..15]
CLK17M_3V_LATCH L[0..15] L[0..15]
11 MUTE MUTE HDCD
HDCD
12 XRST XRST CLK_PMD200 MUTE R[0..15]
CLK17M_3V_PMD200 MUTE R[0..15] R[0..15]
10N SM
13 C170
C171
14 10N SM
HDCD
HDCD * CLK_FPGA
CLK17M_5V_FPGA SEL[0..2]
SEL[0..2]
SEL[0..2]
15 HDCDLED
HDCDLED
16 DEEMPH DEEMPH
B 17 BCKO THL6 THL4 THL5 B
BCKO BCKO A/D A/D
18 RA0 RA0 WCKO TOOLING TOOLINGFIXING HOLE
WCKO WCKO NMODE NMODE
19 RB7 RB7 DOL
DOL DOL PMODE PMODE
20 RB6 RB6 DOR
MUTE DOR DOR
21 RB5 RB5 +5VCLK
DEEMPH
22 RB4 RB4 GAIN
GAIN RDYO R111 THL1 THL2 THL3
23 RB0 RB0
GND ASIC DAC FIXING HOLE 3.0 FIXING HOLE 3.0FIXING HOLE 3.0
24 RB1 RB1 10R SM L912C4_2.2.SCH
25 RB2 RB2 GO L11
GO
26 RB3 RB3
27 10UH SM
RDYO
28 C132 C133 C134
29 1N 0805 1N 0805 1N 0805
30 HDCDLED HDCDLED IC21
5
31 74AHC1G00 SM 1
32 RB[0..7] 4 RDY THL7 THL8 THL9
RDY
CLK_DAC 2 FIXING HOLE 3.0 FIXING HOLE 3.0FIXING HOLE 3.0
FFC32V
RB4
RB5
10N SM
3
VCCD VCCD
DGND
C110
FIDUCIAL FIDUCIAL FIDUCIAL FIDUCIAL
10K SM
1K0 SM
R117
10K SM
A PCB DD1 A
9 CD DAC PCB Top
R87
R85
A3 Vertical 01_E031 WAF 19/12/01 HEATSINK SCREW CHANGE, RING DAC NAME UPDATED 2.1
L912PB_2 Paper Marker
DD_A3V 23425 Circuit Diagram 01_1112 CW 9-6-01 2.0
A & R Cambridge Ltd.
DD3 Notes:
DD2 Pembroke Avenue 01_1084 CW 30-4-01 Listening component changes 1.1
PCB MATERIAL Drilling DSP HDCD Denny Industrial Centre
FR4, 1 OZ Cu Waterbeach 01_1078 CW 1-5-01 Production release 1.0
MULTI LAYER Detail PCB ID Cambridge CB5 9PB
ECO No. INITIALS DATE DESCRIPTION OF CHANGE ISSUE
DRILL_DWG
FR4_MULTI Filename Date Printed Drawn by:
Sheet 1 of 8
J:\Change_Control\ECO_AGENDA\02_E014 A9 DAC l912AY AND L100 AY\L912_2.2.ddb - Documents\L912C1_2.2.prj 23-Jan-2002 CW DRAWING NO. L912CT
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
BCKO
BCKO
WCKO A/D
WCKO A/D
DOL NMODE
DOL NMODE
D DOR PMODE D
DOR PMODE
AA10
AA11
AA12
AA13
AA14
AA15
CCLK
RB6
RB0
AA8
AA9
A15
A14
A13
A12
A11
A10
CCLK VFPGA
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
VCCD
L6 VFPGA
VCCD
100U 25V ZA EL
33UH 2A RA
R41
10N SM
10N SM
10N SM
10N SM
+
10R SM
C89
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
AA[0..15]
IO42
IO41
IO40
IO38
IO36
IO35
IO32
IO31
IO30
IO28
IO27
IO24
IO23
IO22
IO20
IO19
IO18
IO16
IO15
IO12
IO11
IO10
IO8
IO7
IO4
IO3
IO1
GND
CCLK
VSS5
VDD3
VSS4
VDD2
VSS3
VDD1
IO9/A3
IO6/A2
IO5/A1
IO2/A0
VSS2
VSS1
IO43/A15
IO39/A14
IO37/A13
IO34/A12
IO33/A11
IO29/A10
IO26/A9
IO25/A8
IO21/A7
IO17/A6
IO14/A5
IO13/A4
GND AA[0..15]
C91 C49 C45 C92 A[0..15]
A[0..15]
53 208
VSS6 RD_DT TR_16
54 207
VSS7 VSS21
MRESET must be tied LOW 55 206 TR_15
TR_12 IO44/A16 IO171/TCK
56 205
IO45 IO170
WR 57 204
WR IO46 IO169 TR_13
R0 58 203 INTR
IO47 IC61 IO168 INTR
59 202
TR_11 IO48/A17 ATT2C002 IO167/TMS
R1 60 201 SEL[0..2]
IO49 IO166 SEL[0..2]
R2 61 200
IO50 IO165/TDI TR_14
R3 62 199
IO51 IO164
R4 63 198
IO52 IO163
R5 64 197
IO53 IO162
65 196
VDD4 VDD10
R6 66 195 RDYO
C IO54 IO161/DOUT RDYO C
R7 67 194
IO55 IO160
R8 68 193 SEL2
IO56 IO159
R9 69 192
IO57 IO158
R10 70 191 D0
IO58 IO157/D0
R11 71 190
IO59 IO156
RB0 R12 72 189
MODE0 IO60 IO155
R13 73 188 D1
IO61 IO154/D1
RB6 74 187
MODE1 VSS8 VSS20
R14 75 186 D2
IO62 IO153/D2
R15 76 185
IO63 IO152
D[0..7] L15 77 184 SEL1
D[0..7] IO64 IO151
L14 78 183 SEL0
IO65 IO150
79 182
VSS9 VSS19
L13 80 181 D3
IO66 IO149/D3
L12 81 180
IO67 IO148 MUTE
L11 82 179
IO68 IO147
L10 83 178
IO69 IO146 HDCD
84 177
VSS10 VSS18
L9 85 176 D4
IO70 IO145/D4
L8 86 175
IO71 IO144
L7 87 174
IO72 IO143
L6 88 173
IO73 IO142
89 172 D5
TR_10 IO74/HDC IO141/D5
15K SM
L5 90 171
IO75 IO140 TR_6
L4 91 170
R53
IO115/CS1
IO119/CS0
IO126/WR
DONE DONE VSS16
IO123/RD
IO87/M0
IO91/M1
IO95/M2
IO99/M3
RESET
R47
VSS12
VSS13
VSS14
VSS15
RD/CF
PGRM
L[0..15]
IO100
IO101
IO102
IO103
IO104
IO105
IO106
IO107
IO108
IO109
IO110
IO111
IO112
IO113
IO114
IO116
IO117
IO118
IO120
IO121
IO122
IO124
IO125
IO127
IO128
VDD6
VDD7
VDD8
L[0..15]
IO88
IO89
IO90
IO92
IO93
IO94
IO96
IO97
IO98
15K SM
R[0..15]
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
R[0..15]
R48
TR_1 TR_8
15K SM
TR_5
GO
AA3
AA0
AA1
AA2
AA4
AA5
AA6
AA7
D23
D22
D21
D20
D19
D18
D17
D16
D15
D14
D13
D12
D11
GO
M0
M2
CLK17M_5V_FPGA
M0 M2
DRAWING TITLE 02_E014 WAF 23/1/02 L100AY INCORPORATED INTO DESIGN AS SHEET 10 OF CT 2.2
A A
9 CD DAC DRIVER 01_E031 WAF 19/12/01 HEATSINK SCREW CHANGE, RING DAC NAME UPDATED 2.1
VDDAC
33UH 2A RA
R15
10R SM
RDY
L1
RDY
SEL[0..2]
SEL[0..2]
15K SM
15K SM
SEL2
SEL1
SEL0
R49
R77
D VCCA D
R76
0R0 SM
VASICDIG
AA[0..15]
AA[0..15] C139 C50
4N7 PP
100N 0805
AA0
AA1
AA2
AA3
AA4
AA5
AA6
AA7
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
L[0..15]
VCCD
GNDD
SPRL1
SPRL2
A0
A1
A2
A3
A4
A5
A6
A7
SEL2
SEL1
SEL0
RDY
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
GNDA2
VCCA2
GNDA1L
GND1L(2)
VCCA1L(2)
VCCA1L
0VREFL
5VREFL
L[0..15]
144 VCCA1L
BIAS_L VCCA1L
37 143 VCCA1L(2)
GNDD IN1L VCCA1L(2)
38 142 GNDA1L(2) MUTERLY
VCCD OUT1L GNDA1L(2) MUTERLY
L0 39 141 GNDA1L
L0 OUT2L GNDA1L
L1 40 140
L1 OUTC_L
L2 41 139
L2 OUT1L
L3 42 138 SK2B
F
L3 OUT2L
L4 43 137 PHONO4G
L4 IN1L
L5 44 136 MID_L
L5 MID_L MID_L
L6 45 135 Left Audio Stage AUDIO_L
L6 FBCKLSNS(2) FLN AUDIO_L
L7 46 134 L912C6_2.2.SCH
C L7 FBCKLSNS(2) FL C
L8 47 133 FBCKLSNS
OUTR
10K SM
OUTL
L8 FBCKLSNS FBCKLSNS SH1
L9 48 132 FBCKLSNS EMC Shield
L9 FBCKLSNS FBCKLSNS
R120
L10 49 131
L10 NC
L11 50 130 FBCKL
TR29
L11 FBCKL FBCKL
L12 51 129 FBCKL
BC859B
L12 FBCKL FBCKL RLY1A
L13 52 128 DCSET_L
L13 DCSET_L DCSET_L
L14 53 127 DCSET_L
L14 DCSET_L DCSET_L SERVQK
L15 54 IC63
L15 RLY 51SB12T
R15 55 RING DAC
GNDAN
R15
R14 56 126 DCSET_R
R14 DCSET_R DCSET_R SERVQK
R13 57 125 DCSET_R RLY1B
100K SM
R13 DCSET_R DCSET_R
R12 58 124 FBCKR
R12 FBCKR FBCKR
R132
R11 59 123 FBCKR
R11 FBCKR FBCKR EMCPHONO
R10 60 122 RLY 51SB12T
R10 NC
R9 61 121 FBCKRSNS C66
R9 FBCKRSNS FBCKRSNS
R8 62 120 FBCKRSNS
R8 FBCKRSNS FBCKRSNS
R7 63 119 -13V
R7 FBCKRSNS(2) FR
R6 64 118 Right Audio Stage 1N0 SM
R6 FBCKRSNS(2) FRN AUDIO_R
R5 65 117 MID_R L912C5_2.2.SCH
R5 MID_R MID_R R70
R4 66 116
R4 IN1R
1
R3 67 115 10R SM
R3 OUT2R
R2 68 114 C164
R2 OUT1R
F
R1 69 113
R1 OUTC_R
R0 70 112 EMC
R0 OUT2R GNDA1R SK2A
71 111 1N0 SM
VCCD OUT1R GNDA1R(2) PHONO4G
GNDA1R(2)
VCCA1R(2)
72 110
GNDD IN1R VCCA1R(2)
GNDA1R
VCCA1R
109
0VREFR
5VREFR
NMODE
PMODE
GNDA2
BIAS_R VCCA1R
VCCA2
SPRR1
SPRR2
GNDD
VCCD
B CHASS B
A10
A11
A12
A13
A14
A15
A/D
R[0..15]
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
A8
A9
R[0..15]
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
AA10
AA11
AA12
AA13
AA14
AA15
VCCA1R
AA8
AA9
VCCA1R(2)
GNDA1R(2)
GNDA1R
100U CERAFINE
A/D
NMODE
PMODE
DRAWING TITLE 02_E014 WAF 23/1/02 L100AY INCORPORATED INTO DESIGN AS SHEET 10 OF CT 2.2
A A
9 CD DAC ASIC 01_E031 WAF 19/12/01 HEATSINK SCREW CHANGE, RING DAC NAME UPDATED 2.1
FBCKR
FBCKR
D D
IC6B
FBKRSNS REF/4
FBCKRSNS 7 L5 L10
FBCKRSNS COLDR R61 R14
10 Cold_R
6 1K0 SM 4M7H RADIAL 1M5H RADIAL 1K0 SM
R71
LM6182 SM 3K9 SM
NOT FITTED C52
3N3 PP
-13V R54
FBCKR 2K2 SM
FBCKR
MID_R
MID_R
MIDR C61
C20 330P PP
100N PE C72
1N0 PP
R43
R20
1K5 SM
1K0 SM
IC6A
FBKRSNSN REF/4 IC7A
FBCKRSNS 2 L7 L14 SERVO_R
FBCKRSNS HOTR R62 R19 IC7B
15 Hot_R 2
3 1 R21 6
1K0 SM 4M7H RADIAL 1M5H RADIAL 1K0 SM
R72 3 7 R46 AUDIO_R
1K0 SM AUDIO_R
LM6182 SM 3K9 SM 5 47R SM
C NOT FITTED C55 OPA2134PA SM C
3N3 PP OPA2134PA SM
-13V
USE GUARD RAIL AROUND INVERTING I/PS
7
C22 C31 C67 IC7C C34 C95 100N PE
100N SM 100N SM 100P SM 100N PE 100N PE GND4 Distortion Cancelation
IC6C IC23C IC24B IC25B
LM6182 SM OP275 SM AD797A SM AD797A SM R172
FBCKR
OPA2134PA SM 2M2 SM
1
4
8
9
4
16
C100 C111
C23 C32 C68 C33 100N PE 100N PE GRSNS
100N SM 100N SM 100P SM L19 100N PE L20 GNDA1R(2) R92
GNDA1R(2)
IC1-V 470R SM
7F004 7F004
-13V -13V -5V
IC23B C120
B B
5
DCR DCSET_R REFx2 7 47P SM
DCSET_R
6 +8V9 +8V9 REF TR22
R118 RFRSNS DAC 0V Reference
VCCA1R(2) BC857B
470R SM
150R SM
OP275 SM L12 IC25A
R125 VCCA1R(2) DAC 5V Reference
R107
GNDAR 0R0 SM AD797A SM
470R SM
0V
R123
SERVO_R TR20 TR23
BAS16W SM
10K 0805 0.1% GNDA1R
BC857B 2
5
IC24A
C114 6
TR27 R102 10K SM AD797A SM C97 GNDA1R
3
MMBFJ113
8
TR24 C93
2M2 SM
1
DC Servo
1
22K1 0805 0.1%
100N PE 3
8
R97
C500 6
R128
6N8 PP
REFR 2
D7
5
C117
BAS16W SM
R124
150R SM
R129 VCCA1R REF L13
TR21 100N SM BC847B
VCCA1R
D10
R119
100N PE 0R0 SM 47P SM
10K 0805 0.1%
R108 C98 BC847B
IC22A C108
10K 0805 0.1% 2 6N8 PP
C115 R115 1 10U NP R101
DCNR 220K SM 3 470R SM -5V
100N PE
C501 TL072 SM
DC Bias DRAWING TITLE 02_E014 WAF 23/1/02 L100AY INCORPORATED INTO DESIGN AS SHEET 10 OF CT 2.2
A 1N 0805 GND7 SERVQK A
2 9 CD DAC Right Audio Stage 01_E031 WAF 19/12/01 HEATSINK SCREW CHANGE, RING DAC NAME UPDATED 2.1
DCSET_R 1
DCSET_R
3
-REF/2 Circuit Diagram 01_1112 CW 9-6-01 2.0
IC23A 23425 Notes:
OP275 SM 01_1084 CW 30-4-01 Listening component changes 1.1
A & R Cambridge Ltd.
Pembroke Avenue 01_1078 CW 1-5-01 Production release 1.0
Denny Industrial Centre
ECO No. INITIALS DATE DESCRIPTION OF CHANGE ISSUE
Waterbeach Drawn by:
Cambridge CB5 9PB Filename Date Printed
Sheet 4 of 8 L912CT
23-Jan-2002
J:\Change_Control\ECO_AGENDA\02_E014 A9 DAC l912AY AND L100 AY\L912_2.2.ddb - Documents\L912C5_2.2.SCH CW DRAWING NO.
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
FBCKL
FBCKL
D D
IC2A
FBKLSNS
2 L8 L15
FBCKLSNS
FBCKLSNS
REF/4 COLDL R63 R26
15 Cold_L
3 1K0 SM 4M7H RADIAL 1M5H RADIAL 1K0 SM
R73
LM6182 SM 3K9 SM
NOT FITTED C57
3N3 PP
R55
-13V 2K2 SM
FBCKL
FBCKL
MID_L
MID_L
C62
MIDL 330P PP
C35 C73
100N PE
1N0 PP
R45
R36
1K5 SM
1K0 SM SERVO_L
IC2B
FBKLSNSN IC3A
7 L9 L16
FBCKLSNS
FBCKLSNS
REF/4 HOTL R64 R30 IC3B
10 Hot_L 2
6 1 R42 6
1K0 SM 4M7H RADIAL 1M5H RADIAL 1K0 SM
R78 3 7 R50 AUDIO_L
1K0 SM AUDIO_L
LM6182 SM 3K9 SM 5 47R SM
C NOT FITTED C59 OPA2134PA SM C
3N3 PP OPA2134PA SM
-13V
USE GUARD RAIL AROUND INVERTING I/PS
+13V
L21 L22 +13V +8V9
7F004 7F004
C5
13
7
C40 C43 C70 C48 C60 C44 100N PE
100N SM 100P SM IC3C 100N PE 100N PE 100N PE GND5 Distortion Cancellation
IC2C IC4C IC22C IC8B IC9B
100N SM
LM6182 SM OP275 SM TL072 SM AD797A SM AD797A SM R171
FBCKL
2M2 SM
1
4
8
9
4
16
IC4A C13
B B
3
DCSET_L REFx2 1 47P SM
DCSET_L
2 +8V9 +8V9 REF TR10
DCL R24 RFLSNS DAC 0V Reference
VCCA1L(2) BC857B
470R SM
150R SM
OP275 SM L3 IC9A
R6 VCCA1L(2) DAC 5V Reference GNDAL 0R0 SM AD797A SM
470R SM
R25
SERVO_L TR15 0V TR11
BAS16W SM
R18
10K 0805 0.1% GNDA1L
BC857B 2
5
IC8A
C19 6
TR28 R109 10K SM AD797A SM GNDA1L
C30 3
MMBFJ113
8
TR9 C46
2M2 SM
1
DC Servo
1
R104
22K1 0805 0.1%
100N PE 3
8
BC847B 10U NP 6N8 PP BC857B
10K 0805 0.1%
C600 6
REFL 2
D6
R2
5
C116
REF
BAS16W SM
150R SM
R5
R1 VCCA1L L2 BC847B
VCCA1L TR12 100N SM
100N PE 47P SM
D8
0R0 SM
R10
10K 0805 0.1%
R27 C38 BC847B
IC22B
10K 0805 0.1% 6 C51
C24 R16 7 10U NP 6N8 PP R29
DCNL 220K SM 5 470R SM -5V
100N PE TL072 SM
C601 DC Bias DRAWING TITLE 02_E014 WAF 23/1/02 L100AY INCORPORATED INTO DESIGN AS SHEET 10 OF CT 2.2
A 1N 0805 SERVQK A
6 9 CD DAC Left Audio Stage 01_E031 WAF 19/12/01 HEATSINK SCREW CHANGE, RING DAC NAME UPDATED 2.1
DCSET_L 7 GND6
DCSET_L
5
-REF/2 Circuit Diagram 01_1112 CW 9-6-01 2.0
23425
IC4B
OP275 SM Notes:
01_1084 CW 30-4-01 Listening component changes 1.1
A & R Cambridge Ltd.
Pembroke Avenue 01_1078 CW 1-5-01 Production release 1.0
Denny Industrial Centre
ECO No. INITIALS DATE DESCRIPTION OF CHANGE ISSUE
Waterbeach Drawn by:
Cambridge CB5 9PB Filename Date Printed
Sheet 5 of 8 L912CT
23-Jan-2002
J:\Change_Control\ECO_AGENDA\02_E014 A9 DAC l912AY AND L100 AY\L912_2.2.ddb - Documents\L912C6_2.2.SCH CW DRAWING NO.
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+13V
R700
10K 0805
TR700
FMMT497
VDDAC
100R SM
VDAC VP18 C26 + C700 R701
4K7 SM
SK1 TR7 IC5A 10U EL 22K 0805
R7
BAV99W DUAL SM
R22
D FFC23V 470P PP 2SA1964 +13V OP27 SM D
1
D5
+5VCLK TR3 VP13V 3 TR701
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
8
BC859B 6 FMMT497
2
5
1K0 SM
11K SM
C141 VCCA VCCA
C11
R155
R39
TR14 100P NPO 0805
VP18V
BC849B 470P PP R69
100U SILMIC
VDIG
VN18V
C1
7
470U EL 25V
100R 0805
+ + C27
100N SM
IC5B
C37
10U NP
C7
4N7 PP OP27 SM
10K SM
VN18 TR6
4
R44
R32
RLYPWR BC849B + C12
6K8 SM
1K5 SM
RLY_GND RLYPWR C10 100U EL
C15
+ C56 R33
R38
100U EL -5V
33UH 2A RA
100R FU 330P PP
10R SM
GND1
R40
VCCD
L4
HS1B
VCCD
100U SILMIC
100R FU
R31
470U EL 25V
RLY_GND IC36
BAV99W DUAL SM
* Fit to HDCD version only
1K5 SM
LM317T +13V + +
C36
C9
R34
C6
O I ** Fit to DSP version only
10K SM
Vout Vin
+13V TR4 TR13
3V9 0W5 SM
330P PP
ADJ
C8 BC859B BC859B
R37
Not Fitted
R168
D1
D4
1N0 PP VN13V +13V +13V
220R SM Heatsink HS1
Not Fitted TR2
* Shared between
1K0 SM
PSU for DAC references
+8V9 BC849B
P8V9 Q5 and Q7.
1K5 SM
10K SM
R146
TR5
4K7 SM
R66
R169 R170 C25 2SC5248 -13V
100R SM
R59
C2 + REF
R17
C122
R11
+ C165 VN18 470P PP
100U EL R67
10U EL GO
1N0 PP 2K7 SM 2K7 SM 1K0 SM
R75 *
TR30 *
4K7 SM
1K0 SM TR16
BC849B R141 * R135 * TR19*
22U SILMIC
R58
GAIN BC847B TR17
+ C4 BC849B
ZRB500F01
VR
100U EL C16 R133 * 100R SM 1K0 SM
+ C107
C28
1K5 SM C135 + 100U EL +
N5V LGAIN C65
IC62
*
GND
1N0 PP 100U EL 6N8 PP
*
G
*
1K5 SM
1K0 SM
1K5 SM
-5V
R136
R134
Not Fitted
*
GND
R65
D2
O I
Vout Vin GND2
IC35
-13V 7905 -13V
VCCD C18
C96
1N0 PP
100N SM
B Not Fitted B
100U EL
+3V3
C21
IC10
10N SM
+ VCCD
LM1086 3.3V SM FLT1
C75
I O 7G002
Vin Vout
GND
+ C125
+ C124 C104 C109 C119
10U EL
10U EL 100N SM 100N SM 100N SM
GND3
DRAWING TITLE 02_E014 WAF 23/1/02 L100AY INCORPORATED INTO DESIGN AS SHEET 10 OF CT 2.2
A A
9 CD DAC PSU 01_E031 WAF 19/12/01 HEATSINK SCREW CHANGE, RING DAC NAME UPDATED 2.1
VP18
47R SM
IC302C
R300
9 8 R309
CLK17M_5V_DAC
100R SM
10
74VHC125 SM C325 NOT FITTED
+5VCLK
L300 22P SM
33UH SM
D D
IC303B
+5VCLK
74VHC125 SM
C309 5 6 R308 CLKLAT
100N SM L303 CLK17M_3V_LATCH
IC301 100R SM
FLT300 7F004
78L05 P5VCLK
4
I O 7G002 R305 C324 NOT FITTED
Vin Vout 22P SM
100R SM
GND
C308
R51
100N SM IC303A
0R0 SM
G
74VHC125 SM
R304
74AHC1GU04 SM R307
4K7 SM 2 3
IC305 CLK17M_3V_PMD200
5
C318 100R SM
R801 R802 2 4
1
0R0 SM 330R SM C323 NOT FITTED
100P SM 22P SM
3
TR300
BFS17H
+ C312 + C313 IC302B
C301 10U EL C303 22U EL OS C304 74VHC125 SM
C71
100N SM 100N SM 100N SM R68 R314 R803 R804
82P SM 5 6
16.9344MHZNO_GR R306
0R0 SM 4M7 SM 330R SM 100R SM 2 3
X300 CLK17M_5V_FPGA
100R SM
4
R52
1
470R SM IC302A C322 NOT FITTED
R303 22P SM
74VHC125 SM
10K SM
C C
C317
47P SM
C316 L305
47P SM 10UH SM
IC302D
GND8 74VHC125 SM
12 11 R800
100R SM
13
D300 VCCD
BAV99W DUAL SM
R302 L307
XRST
10K SM
C314 VCCD 1U0H SM
R301 GO R315
L306 CLKMECH
C307 CLKMECH
1M0 SM 100N SM 100R SM
100N SM 2U2H SM
5
GO IC304
1
IC300E IC300D C320 C321
4
11 10 9 8 2 82P SM 47P SM
74AHC1G00 SM
3
74HCU04 SM 74HCU04 SM
B B
VCCD +3V3
L302 L304
7F004 7F004
IC303E
IC303C
VCCD IC303D
14
14
74VHC125 SM 74VHC125 SM
L301
IC302E
12 11 9 8
IC300F C306 C305 C311 C310
14
7F004 74VHC125 SM
74HCU04 SM 100N SM 100N SM 100N SM 100N SM 74VHC125 SM
13
10
IC300G 13 12
7
7
74HCU04 SM C300 C302
100N SM 100N SM
7
23425 Circuit Diagram 01_1103 MGM 5/6/01 ADMIN CHANGE SCHEMATIC UPDATED TO LIBRARY TO CHANGE C320 (2C082) TO1.1A
50V
A & R Cambridge Ltd.
Notes:
Pembroke Avenue 01_1084 CW 30-4-01 Listening component changes 1.1
Denny Industrial Centre
Waterbeach 01_1078 CW 1-5-01 Production release 1.0
Cambridge CB5 9PB
ECO No. INITIALS DATE DESCRIPTION OF CHANGE ISSUE
Filename Date Printed Drawn by:
J:\Change_Control\ECO_AGENDA\02_E014 A9 DAC l912AY AND L100 AY\L912_2.2.ddb - Documents\L912C8_2.2.SCH 23-Jan-2002 CW Sheet 7 of 8 DRAWING NO. L912CT
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
IC403B
+3V3 +3V3 +3V3
10
74VHC74MX SM
12 9 IC401C L400 IC402C L402 IC403C L403
SD
D Q
74VHC74MX SM 74VHC74MX SM 74VHC74MX SM
14
14
14
11
10
CLK 7F004 7F004 7F004
4
IC402B
VCC
VCC
VCC
GND
GND
GND
2 5 12 9 8 C407 C410 C409 C412 C413 C414
SD
SD
CD
D Q D Q Q 100N SM 100N SM 100N SM 100N SM 100N SM
100N SM
3 11
13
7
CLK17M_3V_LATCH CLK CLK
D D
IC402A 6 8
CD
CD
Q Q 74VHC74MX SM
74VHC74MX SM
+3V3
13
+3V3 +3V3
1K0 SM
74HCU04 SM SW400
L26
R400
D11 1 16
On b0
BAS16W SM +3V3 2 15 b1
7F004 3 14 b2
10N 0805 10N 0805 10N 0805 10N 0805 10N 0805 10N 0805 10N 0805 10N 0805 10N 0805 L401 4 13 b3
10N 0805 10N 0805 10N 0805 10N 0805 10N 0805 10N 0805 10N 0805 10N 0805 10N 0805 5 12 b4
7F004 6 11 b5
C74 C76 C77 C79 C80 C82 C83 C86 C87 C90 C94 C99 C101C102C103C105C106C112 + C422 7 10 b6
C81 C113 100U EL 8 9 b7
10N 0805 10N 0805
SW DIL 8WAY SM A1601
ONE CAPACITOR PER VCC PIN
L25 HDCD
HDCD
7F004 +3V3
C C
+3V3 C421
C420
31
11
37
66
87
15
35
61
89
48
55
63
71
79
42
21
92
95
8
10N SM 10N SM IC400 R57
IC403A 1K0 SM
VCCqc
VCCqc
VCCqc
VCCqc
VCCc
VCCs
VCCs
VCCs
VCCp
VCCqh
VCCqh
VCCqh
VCCqh
VCCa
VCCa
VCCa
VCCa
VCCd
VCCg
4
74VHC74MX SM TR32
SER_CLK 2 5 7 6 BCKO R56 BC856B
SD
SER_CH Q DEEMP
13 DTRANN SM R60
SMUTE
17 220R SM
1
HMUTE
+3V3 94
ZERO
3 91 HDCDLED
MODEA HDCD HDCDLED
IC401B 2 96
10
D Q I2C/SPI
29 10K SM PIC16C54XT
RESET
11 24 17 6 b0
CLK MOSI/HA0 RA0 RB0
28 23 18 7 b1
PINIT SS/HA2 RA1 RB1
8 25 1 8 b2
CD
RB4
+3V3 34 27 3 11 b5
EXTAL HREQ RTCC RB5
12 b6
GNDg(HCKT)
RB6
IC401A RESET 4 13 b7
R408 MCLR RB7
4
GNDp
GNDq
GNDq
GNDq
GNDq
GNDa
GNDa
GNDa
GNDa
GNDd
GNDg
GNDg
GNDg
GNDg
GNDg
GNDg
GNDg
GNDg
GNDg
SD
GNDc
GNDs
GNDs
GNDs
OSC1
OSC2
D Q
VDD
VSS
3
CLK
10K SM 10K SM PMD200
33
12
36
65
88
49
56
64
72
80
43
9
22
93
10
38
75
76
77
78
81
82
83
84
16
15
14
6 10K SM 10K SM 10K SM +3V3
CD
Q
X400
1
CST4.00
+3V3 C411
DEEMPH R404
DEEMPH C127 C128 C129 C130 C131
22K SM
MUTE
R401 RESET 100N 0805 100N 0805 100N 0805
100N 0805 100N 0805 C127 to C131 to be placed as close to pins 31 and 33 of Z400 as possible
GO
0R0 SM
+ C401
10U EL
CLK17M_3V_PMD200
DRAWING TITLE 02_E014 WAF 23/1/02 L100AY INCORPORATED INTO DESIGN AS SHEET 10 OF CT 2.2
A A
9 CD DAC Re-clocking & PMD-200 01_E031 WAF 19/12/01 HEATSINK SCREW CHANGE, RING DAC NAME UPDATED 2.1
IC CMOS 27C512
IC501
IC406
IC PIC 16C54X
IC PIC 16C54XT
PAD500
SORBOTHANE PAD
15 X 6 X 3 mm USED ON IC63
SC500
E806MC
SUB CHASSIS
E806MC
CA500
L805CA
CA501
Y500
SCREW HF4V09B
Y501
SCREW HF4V09B 3
Y502
SCREW HF4V09B
Y504
SCREW HF4V09B 4
Y505
SCREW HF4V09B
Y506
SCREW HA3A06A 12
CENTRE OF PCB FIXING 6
1
2
11
Notes
DRAWING TITLE
A9CD DAC ASSEMBLY DETAILS
Filename: L912C10_2.2.Sch
23425 Notes:
A & R Cambridge Ltd. 02_E014 WAF 23/1/02 L100AY INCORPORATED INTO DESIGN AS SHEET 10 OF CT 2.2
Pembroke Avenue ECO No. INITIALS DATE DESCRIPTION OF CHANGE ISSUE
Waterbeach
Cambridge CB5 9PB Contact Engineer: EngNameXXXX Contact Tel: (01223) 203XXX tel No Printed: 23-Jan-2002 Sheet 10 of 10 DRAWING NO. L912CT
Transformer
Specifications
Contents
! L859TX
! L860TX
! L883TX
Mechanical
Assembly
Contents
! General assembly
parts list
CD23 (TEXT) General Assembly Parts List
ITEM 230V 115V 100V WFC23P 8 WFC23P 8B DESCRIPTION WHERE USED QTY
SILVER BLACK
L815RC REMOTE CONTROL 1
L859TX L859TX L862TX FMJ PCB TRANSFORMER 1
E850PM E850PMB FMJ MAINS BUTTON 1
E887PM DiVA POWER BUTTON ADAPTER 1
E069AY E069AYB DRAWER FRONT 1
E073AY E073AYB FASCIA ASSEMBLY 1
E843CP E843CPB COVER PLATE 1
HA4V06S HA4V06B M/C TORX M4X6 SIDE COVER TO CHASSIS 4
B2012 SONY MECH 1
C11166 C11256 C11316 MAINS FUSE 1
E100AY DAC SUB-CHASSIS ASSY 1
E71501 FOAM DOUBLE SIDED TAPE ON MECH 100MM
E074AY REAR PANEL ASSEMBLY 1
E082AY CHASSIS ASSEMBLY 1
E939MC DAMPING PLATE FIT TO INSIDE CHASSIS 1
E808MI MAINS INSULATOR UNDER MOTHER PCB 1
E811AP FMJ CD DRAWER ADHESIVE PAD 1
E822PM1 FOOT 4
E879SL PRODUCT CONFIGURATION CONTROL LABEL CHASSIS 1
E887SL FMJ CD23 FUSE LABEL 1
F022 FUSE HOLDER COVER FOR FUSE HOLDERS 2
F065 CABLE CLIP TORROID CABLES TO DAC FIXINGS 4
F203 50MM TOROID CLAMP TOROID TRANSFORMER 1
F204 50MM NEOPRENE WASHER TOROID TRANSFORMER 2
H037 44MM STAND OFF SUB CHASSIS FIXING
HA3V10A M3 x 10mm MACHINE SCREW MOTHER, DISP, IR PCBS TO CHASSIS 17
HA4A12B M/C PAN SUPA M4X12 STBK (500) EARTH LEAD TO CHASSIS 1
HA3V05B M/C TORX M3X5 MECH 3
HA5L25A M5 x 25mm HEX CAP SCREW TOROID TO CHASSIS 1
HE6V06B No. 6 x 6mm SELF TAPPER FACIA ASSEMBLY TO CHASSIS 4
HF4V09B No. 4 x 9mm SELF TAPPER REAR PAN, DAC ASSY 15
HJ4A00A NUT M4 FULL STZP (1000) EARTH LEAD TO CHASSIS 1
L805CA 23-WAY FLEX-FOIL DAC PCB 1
L806CA 5-WAY RIBBON & CONNS CD MECH. 1
L807CA 32-WAY FLEX-FOIL (ENDS FACING SAME WAY) DAC PCB 1
L860CA 32-WAY FLEXFOIL (ENDS FACING OPP WAY) DISPLAY PCB 1
L811CA3 23-WAY FLEX-FOIL CD MECH. 1
L860TX L860TX L883TX FMJ CD TOROID TRANSFORMER 1
L935AY WFC23T 1A CD23T MOTHER PCB 1
SL025 LASER WARNING FOR REAR PANEL 1
SL115 LASER LABEL FOR INSIDE OF CHASSIS 1
ARCAM
All parts can be ordered via spares@arcam.co.uk