A B C D E

LCFC Confidential
1 1

CGx20 M/B Schematics Document

2

NM-A805 REV:0.1 2

Intel Braswell M-Processor with DDRIIIL

2015-10-09
3
REV:0.1 3

4 4

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 Cover Page
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. CGx20
Date: Tuesday, December 08, 2015 Sheet 1 of 57
A B C D E
 A B C D E

Memory BUS (DDR3L)

Dual Channel MD 16x DDR3L 8Pcs
HDMI
HDMI Conn. 1.35V DDR3L 1600 MT/s UP TO 8G Page 14
Page 34

1 1

USB 3.0 1x USB Left 3.0 Conn

eDP Conn eDP x2 Lane USB 3.0 Port1
USB 2.0 1x
Page 41 USB 2.0 Port1
Int. Camera USB 2.0 1x
Braswell-M (4.5W)
USB 2.0 Port3

Page 33
BGA-1170
25mm*27mm USB 2.0 1x USB Left 2.0 Conn
Page 45 USB 2.0 Port0
SATA HDD SATA Gen3
Page 42 SATA Port0
2 2

SATA ODD SATA Gen1 USB 2.0 1x Cardreader Realtek

RTS5170 SD/MMC Conn.
Page 42 SATA Port1
Page 30 USB 2.0 Port3

LAN
RJ45 Conn. Realtek RTL8107E PCIe 1x
Page 38 (10M/100M) USB2.0 1x
NGFF Card WLAN&BT
Page 37 PCIe Port3
PCIe 1x PCIe Port2
Page 40 USB 2.0 Port2

HD Audio
Page 4~12

3 3

LPC BUS
Codec SPK Conn.
Realtek ALC3240
Page 43 Page 43

EC TPM
ITE IT8886E-LQFP ST33ZP24AR28PVSP
Page 44
Sub-board ( for 15")
Mic HP&Mic Combo Conn.

Touch Pad Int.KBD SPI ROM ODD Board

Page 45 Page 45 8MB

4 4

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 Block Diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. CGx20
Date: Tuesday, December 08, 2015 Sheet 2 of 57
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 A B C D E

Voltage Rails ( O --> Means ON , X --> Means OFF )

+5VS
SIGNAL
Power Plane +3VS STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
+1.5VS
+3VALW_SOC Full ON HIGH HIGH HIGH HIGH ON ON ON ON
B+ +3VALW +1.0VALW +1.35V
+0.68VS S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
1
+3VL +5VALW +1.8VALW CPU_CORE 1
S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
State GFX_CORE
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF

S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF

S0 O O O O O
USB Port Table
S3 O O O O X XHCI Port Port device
BOM Structure Table
0
S5 S4/AC Only O O O X X USB 3.0
USB Port (Left Side) BOM Structure BTO Item
1 AOAC@ AOAC support part
USB3.0 Card Reader
OPT@ GPU Part
S5 S4 O X X X X UMA@ UMA SKU ID part
Battery only 0 USB Port (Left Side) 14@ For 14" part
S5 S4 1
AC & Battery X X X X X USB 2.0 USB Port (Right Side) 15@
100M@
For 15" part
100M LAN part
2 2 BT 2
don't exist 3 Camera N15SGT@ N15SGT Part

4 USB Port (Right Side) N15VGM@ N15GSM Part

SIGNAL 1 GIGA@ GIGA LAN Part
STATE SLP_S1# SLP_S3# SLP_S4# +VALW +VALW_PCH +V +VS Clock USB HUB
2 GC6@ GPU GC6 Part
Full ON HIGH HIGH HIGH ON ON ON ON ON 3 TS@ Touch Screen part

S1(Power On Suspend) LOW HIGH HIGH ON ON ON ON LOW

4 RANKA@ GPU VRAM RANKA PART
RANKB@ GPU VRAM RANKB PART
S3 (Suspend to RAM) LOW LOW HIGH ON ON ON OFF OFF ME@ Connector

S4 (Suspend to Disk) LOW LOW LOW ON ON OFF OFF OFF

CD@ COST DOWN
@ Not stuff
S5 (Soft OFF) LOW LOW LOW ON ON OFF OFF OFF

PCIE PORT LIST

SMBUS Control Table Port Device
H4T@ Hynix VRAM Part

WLAN Thermal TP 1 Discrete GPU M4T@ Micron VRAM Part

PCH
3
SOURCE VGA BATT IT8986E SODIMM WiMAX Sensor Module charger 2 Discrete GPU S4T@@ Samsung VRAM Part 3

3 WLAN
4 LAN
EC_SMB_CK1 EC V
EC_SMB_DA1 +3VALW X V +3VALW X X X X X V 5
6
7
EC_SMB_CK2 EC V V V
EC_SMB_DA2 +3VS +3VGS X +3VS X X +3VS
X X X 8

PCH_SMB_CLK PCH
PCH_SMB_DATA +3VALW_PCH X X X V V X V X X
+3VS +3VS +3VALW_PCH
DDI PORT LIST
Port Device
DDI0 DP TO VGA
EC SM Bus1 address EC SM Bus2 address PCH SM Bus address DDI1
Device Address eDP
4
Device Device Address DDR DIMMA 1010 000Xb DDI2 HDMI 4
Smart Battery 0001 011X b Thermal Sensor EMC1403-2 1001_100xb(reserve)
Charger need to update VGA 0x9E(base on NV default) W lan Rsvd
TP need to update

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 Notes List
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. CGx20
Date: Tuesday, December 08, 2015 Sheet 3 of 57
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 5 4 3 2 1

DDI0_RCOMP_P
? CHV_MCP_EDS
1 UC1C DDR3_M0_DQ_63
+1.8VALW
RC1
402_0402_1%
EDP_HPD
M44
RSVD_M44
2

DDI0_RCOMP_N K44
RSVD_K44
K48 EDP_HPD# 2 1 RC9290
DDI1_RCOMP_P D50 RSVD_K48 K47 1K_0402_5%
DDI0_TXP_0 V1P0 RSVD_K47
C51

MCSI and Camera interface

DDI0_TXN_0 V1P0
1

V1P24MCSI_1_CLKP T44
RC2 H49 T45
DDI0_TXP_1 V1P0 V1P24MCSI_1_CLKN
D 402_0402_1% H50 D
DDI0_TXN_1 V1P0
V1P24MCSI_1_DP_0
Y47
DDI0

6
DP TO VGA Converter F53 V1P0 V1P24MCSI_1_DN_0
Y48 QC4A D
DDI0_TXP_2
2

DDI1_RCOMP_N F52 V45 2

DDI0_TXN_2 V1P0 V1P24MCSI_1_DP_1 CPU_EDP_HPD 33
V1P24MCSI_1_DN_1
V47 G
G53 V1P0 V1P24MCSI_1_DP_2 V50
G52 DDI0_TXP_3 V48 S 2N7002KDWH_SOT363-6
DDI0_TXN_3 V1P0 V1P24MCSI_1_DN_2

1
V1P24MCSI_1_DP_3 T41
H47 T42 RC4
0604
DDI0_AUXP V1P0 V1P24MCSI_1_DN_3
H46 V1P0 100K_0402_5%
DDI0_AUXN P50
V1P24MCSI_2_CLKP 0604
W51 V1P8A V1P24MCSI_2_CLKN
P48
HV_DDI0_HPD

2
Y51 V1P8 V1P24MCSI_2_DP_0 P47
Y52 HV_DDI0_DDC_SCL P45
HV_DDI0_DDC_SDA V1P8 V1P24MCSI_2_DN_0
V1P24MCSI_2_DP_1
M48
V52 V1P8 V1P24MCSI_2_DN_1
M47
V51 PANEL0_BKLTEN
PANEL0_BKLTCTL V1P8
W53 V1P8 T50
DDI0_RCOMP_P F38 PANEL0_VDDEN MSCI_3_CLKP T48
DDI0_RCOMP_N G38 DDI0_PLLOBS_P MSCI_3_CLKN PCH_ENBKL
DDI0_PLLOBS_N
V1P24 MCSI_COMP
P44 1 RC24 2 PCH_ENBKL 33
CPU_EDP_TX0+ J51
33 CPU_EDP_TX0+ CPU_EDP_TX0- H51 DDI1_TXP_0 V1P0
AB41 150_0402_1% PCH_ENBKL can direct connect to EC for costdown
33 CPU_EDP_TX0- CPU_EDP_TX1+ DDI1_TXN_0 V1P0 GP_CAMERASB00
K51 AB45
33 CPU_EDP_TX1+ CPU_EDP_TX1- DDI1_TXP_1 GP_CAMERASB01
33 CPU_EDP_TX1- K52 V1P0 AB44
DDI1_TXN_1 V1P0 GP_CAMERASB02 AC53
L53 GP_CAMERASB03 AB51
EDP L51 DDI1_TXP_2 V1P0
V1P0
DDI1 GP_CAMERASB04 AB52 +3VALW
+3VS
M52 DDI1_TXN_2 GP_CAMERASB05 AA51
M51 DDI1_TXP_3 V1P0 GP_CAMERASB06 AB40
DDI1_TXN_3 V1P0 GP_CAMERASB07 Y44 GPIO_CAM_8
CPU_EDP_AUX GP_CAMERASB08 GPIO_CAM_8 12

4
3
C M42 C
33 CPU_EDP_AUX DDI1_AUXP
CPU_EDP_AUX# K42 V1P0 Y42 RPC26
33 CPU_EDP_AUX# DDI1_AUXN GP_CAMERASB09 GPIO_CAM_9 12
V1P0 Y41 10K_0404_4P2R_5%
EDP_HPD# R51 GP_CAMERASB10 V40
HV_DDI1_HPD V1P8A GP_CAMERASB11 GPIO_CAM_11 12

1
2
PCH_ENBKL P51
PCH_BKLT_CTRL_Q P52 PANEL1_BKLTEN V1P8 PCH_EDP_PWM 33
PCH_ENVDD R53 PANEL1_BKLTCTL V1P8 M7
33 PCH_ENVDD DDI1_RCOMP_P PANEL1_VDDEN V1P8 SDMMC1_CLK
F47 V1P8
DDI1_RCOMP_N F49 DDI1_PLLOBS_P P6

D2 3
DDI1_PLLOBS_N V1P8 SDMMC1_CMD QC2B
HDMI_TX2+ F40 M6 5 G2
34 HDMI_TX2+ DDI2_TXP_0 V1P8 SDMMC1_D0 PJT138K_SOT363-6
HDMI_TX2- G40 V1P0 M4
HDMI D2 34 HDMI_TX2- DDI2_TXN_0 V1P8 SDMMC1_D1
V1P0
V1P8
P9
HDMI_TX1+ SDMMC1_D2

4 S2
J40 P7
HDMI D1 34 HDMI_TX1+ HDMI_TX1- K40 DDI2_TXP_1 V1P0 SDMMC1
V1P8SDMMC1_D3_CD_N
T6

D1 6
34 HDMI_TX1- HDMI_TX0+ DDI2_TXN_1 V1P0 V1P8SMMC1_D4_SD_WE
34 HDMI_TX0+ F42 V1P8 T7 QC2A
HDMI_TX0- DDI2_TXP_2 SMMC1_D5 PCH_BKLT_CTRL_Q
HDMI D0 34 HDMI_TX0- G42
DDI2_TXN_2
V1P0 DDI2 V1P8 SMMC1_D6
T10 2 G1 PJT138K_SOT363-6
V1P0
V1P8
T12
HDMI_CLK+ D44 SMMC1_D7 T13
34 HDMI_CLK+ V1P0 V1P8
HDMI_CLK- F44 DDI2_TXP_3 SMMC1_RCLK 1 RC106 2

1 S1
34 HDMI_CLK- V1P0 V1P8 SDMMC1_RCOMP
P13
DDI2_TXN_3
HDMI CLK D48
DDI2_AUXP V1P0 100_0402_1%
C49 V1P0 V1P8
K10
DDI2_AUXN SDMMC2_CLK K9
V1P8 SDMMC2_CMD
U51
34 HDMI_HPD HV_DDI2_HPD V1P8A
V1P8
M12
T51 SDMMC2_D0 M10
34 DDPB_CLK HV_DDI2_DDC_SCL V1P8 V1P8 SDMMC2_D1
T52 V1P8 V1P8 K7
34 DDPB_DATA HV_DDI2_DDC_SDA SDMMC2_D2 K6
B53 SDMMC2
V1P8SDMMC2_D3_CD_N
V1P8
A52 RSVD_B53 3 OF 13 V1P8 F2
B E52 RSVD_A52 V1P8 SDMMC3_CLK D2 B
D52 RSVD_E52 ? SDMMC3_CMD K3
B50 RSVD_D52 V1P8 SDMMC3_CD_N
RSVD_B50
B49 NC's V1P8 J1
DDI PORT LIST E53
C53
RSVD_B49
RSVD_E53
SDMMC3_D0
SDMMC3_D1
J3
H3
RSVD_C53 V1P8 SDMMC3_D2
A51 V1P8
G2
A49 RSVD_A51 SDMMC3_D3
Port Device G44 RSVD_A49 K2
RSVD_G44 SDMMC3
V1P8
V1P8
SDMMC3_1P8_EN L3
SDMMC3_PWR_EN_N
DDI0 NA
V1P8 SDMMC3_RCOMP
P12
RC107
1 2
80.6_0402_1%
DDI1 eDP
DDI2 HDMI BRASWELL_FCBGA151170 REV = 1.2
@

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 SOC (DDI,EDP,HDMI)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. CGx20
Date: Tuesday, December 08, 2015 Sheet 4 of 57
5 4 3 2 1
 5 4 3 2 1

DDRA_DQ[63:0] 14
DDRB_DQ[63:0] 15
DDRA_MA[15:0] 14
DDRB_MA[15:0] 15
DDRA_DQS[7:0] 14
DDRB_DQS[7:0] 15
DDRA_DQS#[7:0] 14
DDRB_DQS#[7:0] 15
DDRA_DM[7:0] 14
DDRB_DM[7:0] 15

?
CHV_MCP_EDS ?
CHV_MCP_EDS
UC1A DDR3_M0_DQ_63 UC1B DDR3_M0_DQ_63
DDRA_MA15 DDRA_DQ55 DDRB_MA15 DDRB_DQ63
DDRA_MA14
BD49
DDR3_M0_MA_15 DDR3_M0_DQ_63
BG33
DDRA_DQ54 DDRB_MA14
BD5
DDR3_M1_MA_15 DDR1 DDR3_M1_DQ_63
BG21
DDRB_DQ62
BD47 BH28 BD7 BH26
DDRA_MA13 BF44 DDR3_M0_MA_14 DDR3_M0_DQ_62 BJ29 DDRA_DQ53 DDRB_MA13 BF10 DDR3_M1_MA_14 DDR3_M1_DQ_62 BJ25 DDRB_DQ61
DDRA_MA12 BF48 DDR3_M0_MA_13 DDR0 DDR3_M0_DQ_61 BG28 DDRA_DQ52 DDRB_MA12 BF6 DDR3_M1_MA_13 DDR3_M1_DQ_61 BG26 DDRB_DQ60
DDRA_MA11 BB49 DDR3_M0_MA_12 DDR3_M0_DQ_60 BG32 DDRA_DQ51 Group 6 DDRB_MA11 BB5 DDR3_M1_MA_12 DDR3_M1_DQ_60 BG22 DDRB_DQ59
D DDRA_MA10 BJ45 DDR3_M0_MA_11 DDR3_M0_DQ_59 BH34 DDRA_DQ50 DDRB_MA10 BJ9 DDR3_M1_MA_11 DDR3_M1_DQ_59 BH20 DDRB_DQ58 D
DDRA_MA9 BE52 DDR3_M0_MA_10 DDR3_M0_DQ_58 BG29 DDRA_DQ49 DDRB_MA9 BE2 DDR3_M1_MA_10 DDR3_M1_DQ_58 BG25 DDRB_DQ57
DDRA_MA8 BD44 DDR3_M0_MA_9 DDR3_M0_DQ_57 BJ33 DDRA_DQ48 DDRB_MA8 BD10 DDR3_M1_MA_9 DDR3_M1_DQ_57 BJ21 DDRB_DQ56
DDRA_MA7 BE46 DDR3_M0_MA_8 DDR3_M0_DQ_56 DDRB_MA7 BE8 DDR3_M1_MA_8 DDR3_M1_DQ_56
DDRA_MA6 BB46 DDR3_M0_MA_7 BD28 DDRA_DQ63 DDRB_MA6 BB8 DDR3_M1_MA_7 BD26 DDRB_DQ55
DDRA_MA5 BH48 DDR3_M0_MA_6 DDR3_M0_DQ_55 BF30 DDRA_DQ62 DDRB_MA5 BH6 DDR3_M1_MA_6 DDR3_M1_DQ_55 BF24 DDRB_DQ54
DDRA_MA4 BD42 DDR3_M0_MA_5 DDR3_M0_DQ_54 BA34 DDRA_DQ61 DDRB_MA4 BD12 DDR3_M1_MA_5 DDR3_M1_DQ_54 BA20 DDRB_DQ53
DDRA_MA3 BH47 DDR3_M0_MA_4 DDR3_M0_DQ_53 BD34 DDRA_DQ60 DDRB_MA3 BH7 DDR3_M1_MA_4 DDR3_M1_DQ_53 BD20 DDRB_DQ52
DDRA_MA2 BJ48 DDR3_M0_MA_3 DDR3_M0_DQ_52 BD30 DDRA_DQ59 Group 7 DDRB_MA2 BJ6 DDR3_M1_MA_3 DDR3_M1_DQ_52 BD24 DDRB_DQ51
DDRA_MA1 BC42 DDR3_M0_MA_2 DDR3_M0_DQ_51 BA32 DDRA_DQ58 DDRB_MA1 BC12 DDR3_M1_MA_2 DDR3_M1_DQ_51 BA22 DDRB_DQ50
DDRA_MA0 BB47 DDR3_M0_MA_1 DDR3_M0_DQ_50 BC34 DDRA_DQ57 DDRB_MA0 BB7 DDR3_M1_MA_1 DDR3_M1_DQ_50 BC20 DDRB_DQ49
DDR3_M0_MA_0 DDR3_M0_DQ_49 BF34 DDRA_DQ56 DDR3_M1_MA_0 DDR3_M1_DQ_49 BF20 DDRB_DQ48
BF52 DDR3_M0_DQ_48 BF2 DDR3_M1_DQ_48
14 DDRA_BS2# AY40 DDR3_M0_BS_2 AV32 DDRA_DQ47 15 DDRB_BS2# AY14 DDR3_M1_BS_2 AV22 DDRB_DQ47
14 DDRA_BS1# BH46 DDR3_M0_BS_1 DDR3_M0_DQ_47 AV34 DDRA_DQ46 15 DDRB_BS1# BH8 DDR3_M1_BS_1 DDR3_M1_DQ_47 AV20 DDRB_DQ46
14 DDRA_BS0# DDR3_M0_BS_0 DDR3_M0_DQ_46 BD36 DDRA_DQ45 15 DDRB_BS0# DDR3_M1_BS_0 DDR3_M1_DQ_46 BD18 DDRB_DQ45
BG45 DDR3_M0_DQ_45 BF36 DDRA_DQ44 BG9 DDR3_M1_DQ_45 BF18 DDRB_DQ44
14 DDRA_CAS# BA40 DDR3_M0_CAS_N DDR3_M0_DQ_44 AU32 DDRA_DQ43 15 DDRB_CAS# BA14 DDR3_M1_CAS_N DDR3_M1_DQ_44 AU22 DDRB_DQ43
14 DDRA_RAS# DDR3_M0_RAS_N DDR3_M0_DQ_43 DDRA_DQ42 Group 5 15 DDRB_RAS# DDR3_M1_RAS_N DDR3_M1_DQ_43 DDRB_DQ42
BH44 AU34 BH10 AU20
14 DDRA_WE# AU38 DDR3_M0_WE_N DDR3_M0_DQ_42 BA36 DDRA_DQ41 15 DDRB_WE# AU16 DDR3_M1_WE_N DDR3_M1_DQ_42 BA18 DDRB_DQ41
AY38 DDR3_M0_CSB_1 DDR3_M0_DQ_41 BC36 DDRA_DQ40 AY16 DDR3_M1_CSB_1 DDR3_M1_DQ_41 BC18 DDRB_DQ40
14 DDRA_CS0# DDR3_M0_CSB_0 DDR3_M0_DQ_40 15 DDRB_CS0# DDR3_M1_CSB_0 DDR3_M1_DQ_40
BD38 BH38 DDRA_DQ39 BD16 BH16 DDRB_DQ39
BF38 DDR3_M0_CK_1 DDR3_M0_DQ_39 BH36 DDRA_DQ38 BF16 DDR3_M1_CK_1 DDR3_M1_DQ_39 BH18 DDRB_DQ38
AY42 DDR3_M0_CKB_1 DDR3_M0_DQ_38 BJ41 DDRA_DQ37 AY12 DDR3_M1_CKB_1 DDR3_M1_DQ_38 BJ13 DDRB_DQ37
DDR3_M0_CKE_1 DDR3_M0_DQ_37 BH42 DDRA_DQ36 DDR3_M1_CKE_1 DDR3_M1_DQ_37 BH12 DDRB_DQ36
BD40 DDR3_M0_DQ_36 BJ37 DDRA_DQ35 Group 4 BD14 DDR3_M1_DQ_36 BJ17 DDRB_DQ35
14 DDRA_CLK0 BF40 DDR3_M0_CK_0 DDR3_M0_DQ_35 BG37 DDRA_DQ34 15 DDRB_CLK0 BF14 DDR3_M1_CK_0 DDR3_M1_DQ_35 BG17 DDRB_DQ34
14 DDRA_CLK0# BB44 DDR3_M0_CKB_0 DDR3_M0_DQ_34 BG43 DDRA_DQ33 15 DDRB_CLK0# BB10 DDR3_M1_CKB_0 DDR3_M1_DQ_34 BG11 DDRB_DQ33
14 DDRA_CKE0 DDR3_M0_CKE_0 DDR3_M0_DQ_33 BG42 DDRA_DQ32 15 DDRB_CKE0 DDR3_M1_CKE_0 DDR3_M1_DQ_33 BG12 DDRB_DQ32
AT30 DDR3_M0_DQ_32 AT24 DDR3_M1_DQ_32
AU30 RSVD_AT30 BB51 DDRA_DQ31 AU24 RSVD_AT24 BB3 DDRB_DQ31
RSVD_AU30 DDR3_M0_DQ_31 DDRA_DQ30 Del CS_2(chip select: 1 per Rank) RSVD_AU24 DDR3_M1_DQ_31 DDRB_DQ30
AW53 Del CKE_2(chip select: 1 per Rank) AW1
AV36 DDR3_M0_DQ_30 BC52 DDRA_DQ29 AV18 DDR3_M1_DQ_30 BC2 DDRB_DQ29
14 DDRA_ODT0 BA38 DDR3_M0_ODT_0 DDR3_M0_DQ_29 AW51 DDRA_DQ28 15 DDRB_ODT0 BA16 DDR3_M1_ODT_0 DDR3_M1_DQ_29 AW3 DDRB_DQ28
DDR3_M0_ODT_1 DDR3_M0_DQ_28 AV51 DDRA_DQ27 DDR3_M1_ODT_1 DDR3_M1_DQ_28 AV3 DDRB_DQ27
DDR3_M0_DQ_27 DDRA_DQ26 Group 3 DDR3_M1_DQ_27 DDRB_DQ26
AT28 BC53 AT26 BC1
AU28 DDR3_M0_OCAVREF DDR3_M0_DQ_26 AV52 DDRA_DQ25 AU26 DDR3_M1_OCAVREF DDR3_M1_DQ_26 AV2 DDRB_DQ25
DDR3_M0_ODQVREF DDR3_M0_DQ_25 BD52 DDRA_DQ24 DDR3_M1_ODQVREF DDR3_M1_DQ_25 BD2 DDRB_DQ24
C
DDRA_DRAMRST#_R BA42 DDR3_M0_DQ_24 DDRB_DRAMRST#_R BA12 DDR3_M1_DQ_24 C
DDR_PWROK AV28 DDR3_M0_DRAMRST_N AV42 DDRA_DQ15 DDR_CORE_PWROK AV26 DDR3_M1_DRAMRST_N AV12 DDRB_DQ23
DDR3_DRAM_PWROK DDR3_M0_DQ_23 AP41 DDRA_DQ14 55 DDR_CORE_PWROK DDR3_VCCA_PWROK DDR3_M1_DQ_23 AP13 DDRB_DQ22
M0_RCOMPPD BA28 DDR3_M0_DQ_22 AV41 DDRA_DQ13 M1_RCOMPPD BA26 DDR3_M1_DQ_22 AV13 DDRB_DQ21
DDR3_M0_RCOMPPD DDR3_M0_DQ_21 AT44 DDRA_DQ12 DDR3_M1_RCOMPPD DDR3_M1_DQ_21 AT10 DDRB_DQ20
DDRA_DM6 BH30 DDR3_M0_DQ_20 AP40 DDRA_DQ11 Group 1 DDRB_DM7 BH24 DDR3_M1_DQ_20 AP14 DDRB_DQ19
DDRA_DM7 BD32 DDR3_M0_DM_7 DDR3_M0_DQ_19 AT38 DDRA_DQ10 DDRB_DM6 BD22 DDR3_M1_DM_7 DDR3_M1_DQ_19 AT16 DDRB_DQ18

1
DDRA_DM5 AY36 DDR3_M0_DM_6 DDR3_M0_DQ_18 AP42 DDRA_DQ9 DDRB_DM5 AY18 DDR3_M1_DM_6 DDR3_M1_DQ_18 AP12 DDRB_DQ17
DDRA_DM4 BG41 DDR3_M0_DM_5 DDR3_M0_DQ_17 AT40 DDRA_DQ8 RC35 DDRB_DM4 BG13 DDR3_M1_DM_5 DDR3_M1_DQ_17 AT14 DDRB_DQ16
DDRA_DM3 BA53 DDR3_M0_DM_4 DDR3_M0_DQ_16 182_0402_1% DDRB_DM3 BA1 DDR3_M1_DM_4 DDR3_M1_DQ_16
DDRA_DM1 DDR3_M0_DM_3 DDRA_DQ23 DDRB_DM2 DDR3_M1_DM_3 DDRB_DQ15
1

AP44 AV45 AP10 AV9

RC34 DDRA_DM2 AT48 DDR3_M0_DM_2 DDR3_M0_DQ_15 AY50 DDRA_DQ22 DDRB_DM1 AT6 DDR3_M1_DM_2 DDR3_M1_DQ_15 AY4 DDRB_DQ14

2
182_0402_1% DDRA_DM0 AP52 DDR3_M0_DM_1 DDR3_M0_DQ_14 AT50 DDRA_DQ21 DDRB_DM0 AP2 DDR3_M1_DM_1 DDR3_M1_DQ_14 AT4 DDRB_DQ13
INTEL PDG 182 ohm
SD00001KG00 DDR3_M0_DM_0 DDR3_M0_DQ_13 AP47 DDRA_DQ20 INTEL PDG 182 ohm DDR3_M1_DM_0 DDR3_M1_DQ_13 AP7 DDRB_DQ12
DDRA_DQS6 BH32 DDR3_M0_DQ_12 AV50 DDRA_DQ19 DDRB_DQS7 BH22 DDR3_M1_DQ_12 AV4 DDRB_DQ11
DDR3_M0_DQS_7 DDR3_M0_DQ_11 Group 2 DDR3_M1_DQS_7 DDR3_M1_DQ_11
2

DDRA_DQS#6 BG31 AY48 DDRA_DQ18 DDRB_DQS#7 BG23 AY6 DDRB_DQ10

DDRA_DQS7 BC30 DDR3_M0_DQSB_7 DDR3_M0_DQ_10 AT47 DDRA_DQ17 DDRB_DQS6 BC24 DDR3_M1_DQSB_7 DDR3_M1_DQ_10 AT7 DDRB_DQ9
DDRA_DQS#7 BC32 DDR3_M0_DQS_6 DDR3_M0_DQ_9 AP48 DDRA_DQ16 DDRB_DQS#6 BC22 DDR3_M1_DQS_6 DDR3_M1_DQ_9 AP6 DDRB_DQ8
DDRA_DQS5 AT32 DDR3_M0_DQSB_6 DDR3_M0_DQ_8 DDRB_DQS5 AT22 DDR3_M1_DQSB_6 DDR3_M1_DQ_8
DDRA_DQS#5 AT34 DDR3_M0_DQS_5 AP51 DDRA_DQ7 DDRB_DQS#5 AT20 DDR3_M1_DQS_5 AP3 DDRB_DQ7
DDRA_DQS4 BH40 DDR3_M0_DQSB_5 DDR3_M0_DQ_7 AR53 DDRA_DQ6 For dual rank DDRB_DQS4 BH14 DDR3_M1_DQSB_5 DDR3_M1_DQ_7 AR1 DDRB_DQ6
DDRA_DQS#4 BG39 DDR3_M0_DQS_4 DDR3_M0_DQ_6 AK52 DDRA_DQ5 DDRB_DQS#4 BG15 DDR3_M1_DQS_4 DDR3_M1_DQ_6 AK2 DDRB_DQ5
DDRA_DQS3 AY52 DDR3_M0_DQSB_4 DDR3_M0_DQ_5 AL53 DDRA_DQ4 DDRB_DQS3 AY2 DDR3_M1_DQSB_4 DDR3_M1_DQ_5 AL1 DDRB_DQ4
DDRA_DQS#3 BA51 DDR3_M0_DQS_3 DDR3_M0_DQ_4 AR51 DDRA_DQ3 Group 0 DDRB_DQS#3 BA3 DDR3_M1_DQS_3 DDR3_M1_DQ_4 AR3 DDRB_DQ3
DDRA_DQS1 AT42 DDR3_M0_DQSB_3 DDR3_M0_DQ_3 AT52 DDRA_DQ2 DDRB_DQS2 AT12 DDR3_M1_DQSB_3 DDR3_M1_DQ_3 AT2 DDRB_DQ2
DDRA_DQS#1 AT41 DDR3_M0_DQS_2 DDR3_M0_DQ_2 AL51 DDRA_DQ1 DDRB_DQS#2 AT13 DDR3_M1_DQS_2 DDR3_M1_DQ_2 AL3 DDRB_DQ1
DDRA_DQS2 AV47 DDR3_M0_DQSB_2 DDR3_M0_DQ_1 AK51 DDRA_DQ0 DDRB_DQS1 AV7 DDR3_M1_DQSB_2 DDR3_M1_DQ_1 AK3 DDRB_DQ0
DDRA_DQS#2 AV48 DDR3_M0_DQS_1 DDR3_M0_DQ_0 DDRB_DQS#1 AV6 DDR3_M1_DQS_1 DDR3_M1_DQ_0
DDRA_DQS0 AM52 DDR3_M0_DQSB_1 DDRB_DQS0 AM2 DDR3_M1_DQSB_1
DDRA_DQS#0 AM51 DDR3_M0_DQS_0 DDRB_DQS#0 AM3 DDR3_M1_DQS_0
DDR3_M0_DQSB_0 1 OF 13 DDR3_M1_DQSB_0 2 OF 13
BRASWELL_FCBGA151170 BRASWELL_FCBGA151170
REV = 1.2 ? REV = 1.2 ?
@ @

1
RC9291 2 DDRA_DRAMRST#_R
14 DDRA_DRAMRST# 1 2 DDRB_DRAMRST#_R
RC9292
0_0402_5% 15 DDRB_DRAMRST#
0_0402_5%
B 1 B
1
CC143
0.1u_0201_10V6K CC144
2 @ 0.1u_0201_10V6K
2 @

+3VALW +1.35V
+3VALW +1.35V
1

1
RC9296
10K_0402_5% RC9297 RC9293 RC9294
10K_0402_5% 10K_0402_5% 10K_0402_5%
@
2

@
2

2
DDR_PWROK DDR_CORE_PWROK

1
1
CC18
3

D CC1 D
0.1u_0201_10V6K
5 QC5B 0.1u_0201_10V6K 5 2
G 2N7002KDW H_SOT363-6 2 @ G QC10B
@ 2N7002KDW H_SOT363-6
S S @
4

4
6

D D
2 QC5A 7,44 SYS_PWROK 2
55 VDDQ_PGOOD G 2N7002KDW H_SOT363-6 G QC10A
1
@ 2N7002KDW H_SOT363-6
1 S CC19 S @
1

0.1u_0201_10V6K
CC3 2
CD@
A 0.1u_0201_10V6K A
2@

1
RC9298 2 Title
Security Classification LC Future Center Secret Data
0_0402_5%
Issued Date 2015/10/08 Deciphered Date 2015/03/23 SOC(DDR3L)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
CGx20 0.1

Date: Friday, December 11, 2015 Sheet 5 of 57

5 4 3 2 1
 5 4 3 2 1

+1.8VALW
RPC1
5 4 WLAN_CLKREQ#_Q
6 3 PCIE_CLKREQ_2#
7 2 GPU_CLKREQ#_Q
8 1 LAN_CLKREQ#_Q +3VS

10K_0804_8P4R_5%

2
? RC11
UC1D CHV_MCP_EDS
DDR3_M0_DQ_63 10K_0402_5%
@

1
C24 C31 SATA_PTX_DRX_P0
D PCIE_TXP0 V1P0 V1P8 SATA_TXP0 SATA_PTX_DRX_P0 42 LAN_CLKREQ#_Q D
B24 B30 SATA_PTX_DRX_N0
PCIE_TXN0 V1P0 V1P8 SATA_TXN0 SATA_PRX_DTX_P0 SATA_PTX_DRX_N0 42 HDD @
G20 V1P0 V1P8 N28
J20 PCIE_RXP0 SATA_RXP0 M28 SATA_PRX_DTX_N0 SATA_PRX_DTX_P0 42

3
PCIE_RXN0 V1P0 V1P8 SATA_RXN0 SATA_PTX_DRX_P1 SATA_PRX_DTX_N0 42 D
C29
V1P8 SATA_TXP1 SATA_PTX_DRX_N1 SATA_PTX_DRX_P1 42 5
A25 V1P0 V1P8 A29 2N7002KDWH_SOT363-6 G
C25 PCIE_TXP1 SATA_TXN1 J28 SATA_PRX_DTX_P1 SATA_PTX_DRX_N1 42
D20 PCIE_TXN1 V1P0 V1P8 SATA_RXP1 K28 SATA_PRX_DTX_N1 SATA_PRX_DTX_P1 42 ODD QC22B @
PCIE_RXP1 V1P0 SATA
V1P8 SATA_RXN1 SATA_PRX_DTX_N1 42 S

6
F20 D

4
PCIE_RXN1 V1P0
AH3 2
V1P8 SATA_LED_N 2N7002KDWH_SOT363-6 LAN_CLKREQ# 37
CC103 1 2 0.1u_0201_10V6K PCIE_PTX_DRX_P4 B26 AH2 G
40 PCIE_PTX_C_DRX_P4 PCIE_TXP2 V1P0 V1P8 SATA_GP0
CC104 1 2 0.1u_0201_10V6K PCIE_PTX_DRX_N4 C26 AG3 QC22A
WLAN 40 PCIE_PTX_C_DRX_N4 PCIE_PRX_DTX_P4 D22 PCIE_TXN2 V1P0
PCIe
V1P8 SATA_GP1 AG1 S
40 PCIE_PRX_DTX_P4 PCIE_RXP2 V1P0 V1P8
SATA_GP2/SATA_DEVSLP0

1
PCIE_PRX_DTX_N4 F22 AF3
40 PCIE_PRX_DTX_N4 PCIE_RXN2 V1P0 V1P8
SATA_GP3/SATA_DEVSLP1
CC106 1 2 0.1u_0201_10V6K PCIE_PTX_DRX_P3 A27 N30 SATA_RCOMP_DP
37 PCIE_PTX_C_DRX_P3 PCIE_PTX_DRX_N3 PCIE_TXP3 V1P0 SATA_RCOMP_P SATA_RCOMP_DN
CC105 1 2 0.1u_0201_10V6K C27 M30
37 PCIE_PTX_C_DRX_N3 PCIE_PRX_DTX_P3 PCIE_TXN3 V1P0 SATA_RCOMP_N
LAN 37 PCIE_PRX_DTX_P3 PCIE_PRX_DTX_N3
G24
PCIE_RXP3 V1P0 PCH_SPI_CLK_R
J24 W3 10_0402_1%2 1 RC134
37 PCIE_PRX_DTX_N3 PCIE_RXN3 V1P0 V1P8 FST_SPI_CLK EC_SPI_CLK 44
GPU_CLKREQ#_Q AM10 V4 PCH_SPI_CS0#_R 33_0402_5%2 1 RC135
PCIE_CLKREQ_2# AM12 PCIE_CLKREQ0_NV1P8 V1P8 FST_SPI_CS0_N V6 EC_SPI_CS0# 44
PCIE_CLKREQ1_NV1P8 V1P8 FST_SPI_CS1_N LAN_CLKREQ#_Q RC19 1 2 0_0402_5% LAN_CLKREQ#
WLAN_CLKREQ#_Q AK14 V7
LAN_CLKREQ#_Q AM14 PCIE_CLKREQ2_NV1P8 V1P8 FST_SPI_CS2_N
PCIE_CLKREQ3_NV1P8
V1P8
V2 PCH_SPI_D0_R 10_0402_1%2 1 RC130 LAN_CLKREQ# is OD,Can pull high to 1.8V
A21 FST_SPI_D0 V3 PCH_SPI_D1_R EC_SPI_D0 44
V1P8 10_0402_1%2 1 RC131
CLK_DIFF_P_0 FST_SPI_D1 EC_SPI_D1 44
C21
CLK_DIFF_N_0
FAST
V1P8 SPI FST_SPI_D2 U1 PCH_SPI_D2_R
PCH_SPI_D3_R
10_0402_1%2 1 RC132
EC_SPI_D2 44
C19 U3 10_0402_1%2 1 RC133 +3VS
CLK_DIFF_P_1 V1P8 FST_SPI_D3 EC_SPI_D3 44
B20
CLK_PCIE_WLAN C18 CLK_DIFF_N_1 AF13 HDA_RST_AUDIO#_R 1 RC39 2
V1P5 MF_HDA_RST_N 75_0402_1% HDA_RST_AUDIO# 43
40 CLK_PCIE_WLAN CLK_PCIE_WLAN# B18 CLK_DIFF_P_2 AD6

2
40 CLK_PCIE_WLAN# CLK_PCIE_LAN CLK_DIFF_N_2 V1P5 MF_HDA_SDI1 HDA_BITCLK_AUDIO_R1 RC40 2
C17 V1P5 AD9 75_0402_1%
37 CLK_PCIE_LAN CLK_PCIE_LAN# A17 CLK_DIFF_P_3 MF_HDA_CLK AD7 HDA_BITCLK_AUDIO 43 RC3
C 37 CLK_PCIE_LAN# CLK_DIFF_N_3 V1P5 MF_HDA_SDI0 HDA_SDIN0 43 10K_0402_5% C
C16 AF12 HDA_SYNC_AUDIO_R 1 RC42 2 75_0402_1%
RSVD_C16 V1P5 MF_HDA_SYNC HDA_SDOUT_AUDIO_R1 HDA_SYNC_AUDIO 43
B16 V1P5
AF14 RC43 2 75_0402_1%
RSVD_B16 MF_HDA_SDO AB9 HDA_SDOUT_AUDIO 43

1
PCIE_RCOMP_DP V1P5 MF_HDA_DOCKEN_N WLAN_CLKREQ#_Q
D26 V1P5 MF_HDA_DOCKRST_N
AB7
PCIE_RCOMP_DN F26 PCIE_RCOMP_P
PCIE_RCOMP_N H4
V1P8 SPKR PCH_BEEP 43
AUDIO

3
V14 V1P8
D
Y13 SPI1_CLK AK9 5
SPI1_CS0_N V1P8 GP_SSP_2_CLK 2N7002KDWH_SOT363-6
Y12 AK10 G
V13 SPI1_CS1_N SPI
V1P8 GP_SSP_2_FS AK12 QC8B
SPI1_MISO V1P8 GP_SSP_2_TXD
V12 AK13 S

6
SPI1_MOSI V1P8 GP_SSP_2_RXD D

4
2
2N7002KDWH_SOT363-6 G
WLAN_CLKREQ# 40
REV = 1.2
QC8A
BRASWELL_FCBGA151170 4 OF 13 S

1
@

SATA_RCOMP_DP PCIE_RCOMP_DP
2
2

RC30 RC38
402_0402_1% 402_0402_1%
1

PCIE_RCOMP_DN
1

SATA_RCOMP_DN

B B

+3VALW

RC94 1 2 +VCC_SPI

0_0402_5%

+VCC_SPI +1.8VALW

2 PCH_SPI_CS0# @ PCH_SPI_CS0#_R
RC201 RC84 1 2
@ 0_0402_5%
100K_0402_5%

+VCC_SPI
UC2
PCH_SPI_CS0# 1 8 50mA
CS# VCC
PCH_SPI_D1 2 7 PCH_SPI_D3 2
DO HOLD#
PCH_SPI_D2 3 6 PCH_SPI_CLK CC8
WP# CLK 0.1u_0201_10V6K
1
4 5 PCH_SPI_D0
GND DI

W25Q64FVSSIQ_SO8
A 0605 A

PCH_SPI_CS0#
PCH_SPI_CLK PCH_SPI_CS0# 44
PCH_SPI_D0 PCH_SPI_CLK 44
PCH_SPI_D1 PCH_SPI_D0 44
PCH_SPI_D2 PCH_SPI_D1 44 Security Classification LC Future Center Secret Data Title
PCH_SPI_D3 PCH_SPI_D2 44
PCH_SPI_D3 44 Issued Date 2015/10/08 Deciphered Date 2015/03/23 SOC (PCIE&HDA&SPI&SATA)
SPI ROM THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. CGx20
Date: Tuesday, December 08, 2015 Sheet 6 of 57
5 4 3 2 1
 5 4 3 2 1

+1.8VALW
1,Spec. request 19.2MHz, Cp=12pf, RC=200K
32.768K need change to SJ10000IM00, PMC_PLTRST# 2 RC70 1 @
+1.8VALW +1.8VALW +3VALW
as intel EDS New request 10K_0402_5%
PCH_SMB_ALERT# 2 RC120 1 @
10K_0402_5%
+1.8VALW +3VALW +1.8VALW PMC_RSTBTN# 1 RC73 2 10K_0402_5%

RTC_X2
VCCRTC

XTAL19_OUT
XTAL19_IN
RTC_X1

3
4

3
4
PMC_SUSWARN# 1 RC71 2 100K_0402_5%
@
SRTC_RST# RPC22 RPC23
RC92 1 2 10M_0402_5% RC89 1 2 20K_0402_1%
2

2
2.2K_0404_4P2R_5% 2.2K_0404_4P2R_5% PMC_SUSCLK
RC96 RC97 RC98 @ 1 RC83 2 10K_0402_5%

2
0_0402_5% 0_0402_5% 10K_0402_5% RTC_RST# EC_RSMRST#
YC1 RC93 1 2 200K_0402_5% RC90 1 2 20K_0402_1%

2
1

2
1
TPM@ 2 RC930 1 100K_0402_5%

G1
@
UC3 1 2 PCH_SMB_CLK PCH_SMB_CLK_Q EC_RSMRST# CC132 0.01U_0201_25V6-K
1

1
1 S1 D1 6 @ 1 2
1 6 YC2
VCCA VCCB 32.768KHZ_9PF_X1A000141000200 PMC_SUSWARN# RC75

1U_0402_6.3V6K

1U_0402_6.3V6K
2 2 1 1 1 2 100K_0402_5%

1
CC10
D 2 5 1 4 JCMOS1 D
GND EO CC11 CC12

CC9
OSC1 NC2 SHORT PADS QC20A
SOC_SERIRQ 3 4 7P_0402_50V8-B 7P_0402_50V8-B @ PJT138K_SOT363-6
1 1 1 2 3

2
A4 B4 SERIRQ 32,44 NC1 OSC2 2 2 JCMOS/JCMOS1

G2 5
1 1 1 @
Place under Bottom +3VS
CC13
CC15 CC16 RPC29
G2129TL1U_SC70-6 27P_0402_50V8J CC14
0.1u_0201_10V6K
2 TPM@ 2
0.1u_0201_10V6K CRYSTAL 2 19.2MHZ_12PF_7V19200001
2
27P_0402_50V8J
RTCRST#
Space 15Mil
PCH_SMB_DATA
4 S2 D2 3
PCH_SMB_DATA_Q SMB_CLK_S3
SMB_DATA_S3
4 1
3 2
TPM@ 1,Space 15MIL
TPM@
2,No trace under crystal @
3,place on oppsosit side of MCP for temp influence RTC RST# QC20B
PJT138K_SOT363-6
2.2K_0404_4P2R_5%

NTPM@ +3VS
SOC_SERIRQ 1 2 0_0402_5% SERIRQ
RC33

SERIRQ level shift need IC, not MOS for frequence

CC140

5
SYS_PWROK 1 2

G
? QC6B
EMC@ 0.1u_0201_10V6K UC1E CHV_MCP_ED S
DDR3_M0_DQ_63
PCH_PCI_CLK_R

PCH_SMB_CLK_Q 3 4
XTAL19_IN SMB_CLK_S3 40

S
P24 @

D
XTAL19_OUT M22 OSCIN C11
? S 2N7002KDWH_SOT363-6
UC1G CHV_MCP_ED
DDR3_M0_DQ_63 OSCOUT RSVD_C11 B10 RC123 1 2 0_0402_5%
J26 RSVD_B10 F12
N26 RSVD_J26 RSVD_F12 F10
XDP_TCLK RTC_X1 RC45 ICLK_ICOMP P20 @
RSVD_N26 RSVD_F10

2
TP13 @ 1 AF42 M18 2.49K_0402_1% 2 1
JTAG/ITP

G
1 XDP_TDI AD47 TCK V1P8 RTC_X1 K18 RTC_X2 ICLK_RCOMP N20 ICLKICOMP
TP14 @ 49.9_0402_1% 2 RC44 1
iCLK RESERVED D12 QC6A
1 XDP_TDO AF40 TDI V1P8 RTC_X2 F16 BVCCRTC_EXTPAD CC17 1 2 0.1u_0201_10V6K P26 ICLKRCOMP RSVD_D12 E8
C4932 TP15 @
0.1U_0201_6.3V6-K 1 XDP_TMS AD48 TDO V1P8 RTC_EXTPAD K26 RSVD_P26 RSVD_E8 C7
TP16 @
2 XDP_TRST# AB48 TMS V1P8 RTC_RST# RSVD_K26 RSVD_C7 PCH_SMB_DATA_Q
EMC_NS@ TP17 @ 1 RTC D18
SYS_PWROK RTC_RST# 44 M26 D6 6 1
SMB_DATA_S3 40 +1.8VALW

S
TRST_N V1P8 RTC_RST_N G16 AH45 RSVD_M26 RSVD_D6 @

D
COREPWROK EC_RSMRST# SYS_PWROK 5,44 RSVD_AH45
V3P3 F18 J12 2N7002KDWH_SOT363-6
XDP_PRDY# RSMRST_N SRTC_RST# EC_RSMRST# 44 RSVD_J12
@ 1 AD45 J16 A9 F7

PLTFM CLK's
TP18 V3P3
XDP_PREQ# CX_PRDY_N RTC_TEST_N RTC_INTRUDER MF_PLT_CLK0 RSVD_F7
TP19 @ 1 AF41 G18 C9 V1P8 J14 RC124 1 2 0_0402_5%
M13 CX_PREQ_N RSVD_VSS_G18 B8 MF_PLT_CLK1 V1P8 RSVD_J14 L13
RSVD_M13 AE3 PMC_SUSWARN# B7 MF_PLT_CLK2 V1P8 RSVD_L13
@
RC80 1 2 0_0402_5% PCH_PCI_CLK_RP2 V1P8 SUSPW RDNACK D14 1 @ TP5 B5 MF_PLT_CLK3 V1P8
V1P8 I2C0_SCL
AK6
44 CLK_PCI_EC MF_LPC_CLKOUT0V3P3 V1P8 SUS_STAT_N PMC_SUSCLK MF_PLT_CLK4

2
RC81 1 2 0_0402_5% R3 C15 B4 V1P8 AH7

2.2K_0402_5%

2.2K_0402_5%

2.2K_0402_5%

2.2K_0402_5%

2.2K_0402_5%

2.2K_0402_5%
32 CLK_PCI_TPM MF_LPC_CLKOUT1V3P3 V1P8 PMU_SUSCLK PM_SLP_S4# MF_PLT_CLK5 V1P8 I2C0_SDA
TPM@ T3 C12 V1P8 15@ @ @ @ @ @

RC59

RC58

RC9286

RC9288
RC948

RC949
P3 LPC_CLKRUN_N V3P3 V1P8 PMU_SLP_S4_N B14 PM_SLP_S3# AF6
32,44 LPC_FRAME# LPC_FRAME_N V3P3 V1P8 PMU_SLP_S3_N PMC_RSTBTN# V1P8 I2C1_SCL
PMU

AF2 TP23 @ 1 AM40 AH6

PMC_PLTRST# V1P8 I2C1_SDA
M3 V1P8 PMU_RESETBUTTON_N F14 AM41 GPIO_DFX0
LPC

GPIO_DFX
32,44 LPC_AD0 MF_LPC_AD0 V3P3 PMU_PLTRST_N PMC_BATLOW# PMC_PLTRST# 32,37,40,44 PCB_ID0 GPIO_DFX1

1
M2 V1P8 C14 1 2 AM44 AF9
32,44 LPC_AD1 MF_LPC_AD1 V3P3 PMC_ACIN +1.8VALW PCB_ID1 V1P8 I2C2_SCL PCB_ID0
N3 V1P8 PMU_BATLOW _N C13 RC72 20K_0402_1% AM45 GPIO_DFX2 Internal 20K(H) AF7
32,44 LPC_AD2 MF_LPC_AD2 V3P3 PMC_SLP_S0IX# PCB_ID2 V1P8 I2C2_SDA PCB_ID1
C N1 V1P8 PMU_AC_PRESENT A13 1 @ TP4 AM47 GPIO_DFX3
I2C C
32,44 LPC_AD3 MF_LPC_AD3 V3P3 V1P8 PMU_SLP_S0IX_N B12 PMU_SLP_LAN# 1 @ PCB_ID3 AK48 GPIO_DFX4 AE4 PCB_ID2
100_0402_1%RCOMP_LPC_HVT TP20 V1P8 I2C3_SCL
V1P8 PMU_SLP_LAN_N PMC_PCIE_WAKE# PCB_ID4 GPIO_DFX5 PCB_ID3
RC104 1 2 T4 N16 AM48 V1P8 I2C3_SDA
AD2
SOC_SERIRQ T2 LPC_HVT_RCOMP V1P8 PMU_W AKE_N M16 PBTN_OUT# PCB_ID5 AK41 GPIO_DFX6 PCB_ID4
ILB_SERIRQ V1P8 V1P8 PMU_PWRBTN_N P18 PMC_LAN_WAKE# 1 @ XDP_GPIO_DFX8 AK42 GPIO_DFX7 PCB_ID5
TP21 TP22 @ 1 V1P8 I2C4_SCL
AC1
H5 V1P8PMU_W AKE_LAN_N GPIO_DFX8 AD3
RSVD_H5 CPU_SVID_CLK V1P8 I2C4_SDA
H7 AD42 12 GPIO_SUS_0 AD51
SVID

RSVD_H7 SVID0_CLK CPU_SVID_DAT CPU_SVID_CLK 56,57 GPIO_SUS0 PCH_CMOS_ON#_Q

2
V1P8 AD41 RC9284 1 2 AD52 AB2

2.2K_0402_5%

2.2K_0402_5%

2.2K_0402_5%

2.2K_0402_5%

2.2K_0402_5%

2.2K_0402_5%
SVID0_DATA CPU_SVID_ALERT# CPU_SVID_DAT 56,57 12 GPIO_SUS_1 GPIO_SUS1 V1P8 I2C5_SCL
V1P8 AD40 0_0402_5% AH50 AC3 14@ @ @ @ @ @

RC9287

RC9289
RC950

RC951
RC64

RC62
GPIO_SUS
CPU_SVID_ALERT# 56,57 12 GPIO_SUS_2 V1P8 I2C5_SDA
+1.8VALW V1P8 SVID0_ALERT_N @ 1 AH48 GPIO_SUS2
P28 TP24 AH51 GPIO_SUS3 AA1
RSVD_P28 VCC0_SENSE 12 GPIO_SUS_4 GPIO_SUS4 V1P8 I2C6_SCL
2

P30 AG32 AH52 AB3

Reserved

RSVD_P30 CORE_VCC0_SENSE VSS0_SENSE 12 GPIO_SUS_5 GPIO_SUS5 V1P8 I2C6_SDA

1
Voltage sense

RC48 AF50 AJ32 12,44 EC_SCI# AG51

AF48 RSVD_AF50 CORE_VSS0_SENSE AD29 VCC1_SENSE EC_SMI# AG53 GPIO_SUS6 AA3
20K_0402_5% RSVD_AF48 CORE_VCC1_SENSE VSS1_SENSE GPIO_SUS7 V1P8 RSVD_AA3
@ AF44 AF27 12 GPIO_SUS_9 AF52 Y2
RSVD_AF44 CORE_VSS1_SENSE VCC_AXG_SENSE SEC_GPIO_SUS9 V1P8 RSVD_Y2
AF45 AD24 VCC_AXG_SENSE 57 12 GPIO_SUS_8 AF51
H_PROCHOT# RSVD_AF45 DDI_VGG_SENSE UNCORE_VSS_SENSE SEC_GPIO_SUS8 PCH_SMB_CLK
1

AD50 AD22 UNCORE_VSS_SENSE 57 @ 1 AE51 AM6

44,55 H_PROCHOT# PROCHOT_N V1P8 UNCORE_VSS_SENSE_2 VNN_SENSE TP25 SEC_GPIO_SUS10 V1P8 MF_SMB_CLK PCH_SMB_DATA
AC27 KBRST# AC51 AM7
UNCORE_VSS_SENSE_1 VNN_SENSE 55
2 1 GPIO_RCOMP18 AH40 SEC_GPIO_SUS11 SMBUS
V1P8 MF_SMB_DATA AM9 PCH_SMB_ALERT#
GPIO0_RCOMP V1P8MF_SMB_ALERT_N
RC108 100_0402_1% Y3
GPIO_ALERT PCB ID
RPC5
7 OF 13 VCC0_SENSE 1 4
VSS0_SENSE CPU_VCC_SENSE 56
BRASWELL_FCBGA151170 2 3 PCB_ID0 PCB_ID1 PCB_ID2 PCB_ID3 PCB_ID4 PCB_ID5 Description
CPU_VSS_SENSE 56 5 OF 13
REV = 1.2 ? 100_0404_4P2R_1%
BRASWELL_FCBGA151170 0 X X X X Reserve 14'' SKU
@ REV = 1.2 ?
+CPU_CORE +GFX_CORE RPC6
VCC1_SENSE 1 4 CPU_VCC_SENSE @ 1 X X X X Reserve 15'' SKU
VSS1_SENSE 2 3 CPU_VSS_SENSE
2 RC12 1 100_0402_1% CPU_VCC_SENSE 2 RC28 1 100_0402_1% VCC_AXG_SENSE X 0 X X X Reserve single channel DRAM CHA@
100_0404_4P2R_1%

2 1 100_0402_1% CPU_VSS_SENSE 2 1 100_0402_1% UNCORE_VSS_SENSE X 1 X X X Reserve dual chanel DRAM CHA@ and CHB@
RC13 RC29
CPU_SVID_ALERT# 1 RC66 2 200_0402_1% +1.05VA_SOC_G3
X X 0 0 1 Reserve Samsung 4G(K4B4G1646E-BYK0)
change from 1.05VA for layout X X 0 1 0 Reserve Hynix 4G(H5TC4G63CFR-PBA)

X X 0 1 1 Reserve Micron 4G(MT41K256M16TW-107:P)

X X 1 0 0 Reserve Hynix 8G(H5TC8G63CMR-PBA)

RC65 X X 1 0 1 Reserve Micron 8G(MT41K512M16HA-125:A)
RTC_INTRUDER 1 2

10K_0402_5%

B B

+3VALW +3VS

+1.8VALW +3VALW
+3VS
1

RC9299 RC9300 +1.8VALW +1.8VALW

+3VALW
10K_0402_5% 10K_0402_5%

2
@
RC112 RC933
2

1
10K_0402_5% 10K_0402_5%
PLT_RST# 32,37,40,44
@ RC932
3
4

2
2.2K_0402_5% @

1
G
RPC28 @
RC14 CMOS_ON#
D2 3

10K_0404_4P2R_5% 10K_0402_5% PMC_SUSCLK

2
2

3
QC15B

1
SUSCLK 40
5 G2 RC105

D
PJT138K_SOT363-6
2
1

@ @

1
100K_0402_5%
QC18
QC203
4 S2

1
1

D PJA138K_SOT23-3
D1 6

PJA138K_SOT23-3 EC_SMI# PCH_CMOS_ON#_Q 2

QC15A EC_SMI# 44
PMC_PLTRST# 2 QC168
G1 PJT138K_SOT363-6 G
1 @ S
PMC_PCIE_WAKE# @
S

3
1 S1

C4937 PCIE_WAKE# 40,44

0.1U_0201_6.3V6-K PJA138K_SOT23-3
1
3

2 @
G

+1.8VALW
2

+1.8VALW

+1.8VALW

2
+1.8VALW +3VALW RC61
+1.8VALW

2
2.2K_0402_5%

G
3
4

PMC_ACIN

1
RPC4 AC_PRESENT 44
3
4

D
10K_0404_4P2R_5% RPC2 RC23
1

2
10K_0404_4P2R_5% 10K_0402_5%
@ RC22 RC63 QC207
2
1

A 2.2K_0402_5% @ 10K_0402_5% PJA138K_SOT23-3 A

2
1

1
KBRST#
G

@ @ D QC9
KBRST# 44
2 0605
PMC_SUSWARN# ACIN# 44
2

1
3

PM_SLP_S3# G
SUSWARN# 44
PM_SLP_S3# 44
S

PM_SLP_S4# @ S 2N7002KW_SOT323-3

3
PM_SLP_S4# 44
PBTN_OUT# QC12 @
PBTN_OUT# 44 PJA138K_SOT23-3

Security Classification LC Future Center Secret Data Title

Issued Date 2015/03/23
2015/10/08 Deciphered Date SOC (RTCI&PM&SM&GPIO)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. CGx20
Date: Friday, December 11, 2015 Sheet 7 of 57

5 4 3 2 1
 5 4 3 2 1

+1.8VALW
?
UC1F CHV_MCP_EDS DDR3_M0_DQ_63
RPC18
D USB_OC1# 2 3 D
V1P8 B48 USB_OC0# 1 4
USB30_TX_P0 B32 V1P05A USB_OTG_ID
V1P8 C42 USB20_P0
41 USB30_TX_P0 USB30_TX_N0 C32 USB3_TXP0 V1P05A V1P8USB_DP0 B42 USB20_N0 USB20_P0 41 LEFT USB (3.0) 10K_0404_4P2R_5%
LEFT USB (3.0) 41
41
USB30_TX_N0
USB30_RX_P0
USB30_RX_P0 F28 USB3_TXN0 V1P05A USB_DN0 USB20_N0 41
USB30_RX_N0 D28 USB3_RXP0 V1P05A V1P8 C43 USB20_P1
41 USB30_RX_N0 USB20_P1 41
USB3_RXN0 V1P8USB_DP1
USB_DN1
B44 USB20_N1
USB20_N1 41 LEFT USB (2.0)
A33 V1P05A
C33 USB3_TXP1 V1P05A V1P8 C41 USB20_P2
USB3_TXN1 V1P8USB_DP2 USB20_N2 USB20_P2 30
F30 V1P05A A41
D30 USB3_RXP1 V1P05A USB_DN2 USB20_N2 30 Card reader (2.0)
USB3_RXN1 V1P8 C45 USB20_P3
USB20_P3 40
C34
USB3_TXP2
V1P05A V1P8USB_DP3
USB_DN3
A45 USB20_N3
USB20_N3 40 BT
B34 V1P05A
G32 USB3_TXN2 V1P05A V1P8 B40 USB20_P4
USB20_P4 33
USB3_RXP2 V1P8USB_DP4 USB20_N4 Camera

USB3.0

USB2.0
J32 V1P05A C40
USB3_RXN2 USB_DN4 USB20_N4 33
C35 V1P05A V1P8 P16 USB_OC1#
USB3_TXP3 USB_OC1# 41
A35 V1P05A V1P8USB_OC1_N P14 USB_OC0#
G34 USB3_TXN3 V1P05A USB_OC0_N
J34 USB3_RXP3 V1P05A B46
USB3_RXN3 RSVD_B46 B47 USB_VBUSSNS RC16 1 2 0_0402_5%
USB3_RCOMP_DP D34 USB_VBUSSNS A48 USB_RCOMP RC1931 2 113_0402_1%
USB3_RCOMP_DN F34 USB3_RCOMP_P USB_RCOMP
USB3_RCOMP_N V1P2 M36 PDG 112.5 ohm
C37 V1P2USB_HSIC_0_STROBE N36
RSVD_C37 USB_HSIC_0_DATA Demo 113 ohm
A37

HSIC
F36 RSVD_A37 V1P2 K38 SD00001KH00

RESERVED
D36 RSVD_F36 USB_HSIC_1_STROBE
V1P2 M38
M34 RSVD_D36 USB_HSIC_1_DATA
V1P2 N38 USB_HSIC_RCOMP RC9301 1 @ 2 45.3_0402_1%
M32 RSVD_M34 USB_HSIC_RCOMP
RSVD_M32 V1P8 AD10 UART0_TXD
C C38 V1P8 UART1_TXD AD12 UART0_RXD C
USB3_RCOMP_DP B38 RSVD_C38 V1P8 UART1_RXD AD13

UART
G36 RSVD_B38 V1P8 UART1_CTS_B AD14
RSVD_G36 UART1_RTS_B only for Win7 debug port
2

J36
RC192 RSVD_J36 V1P8 Y6
N34 V1P8 UART2_TXD Y7
402_0402_1% RSVD_N34
P34 V1P8 UART2_RXD V9
RSVD_P34 V1P8 UART2_CTS_N V10
UART2_RTS_N
1

USB3_RCOMP_DN
+1.8VALW
+3VALW
+1.8VALW

6 OF 13
BRASWELL_FCBGA151170
REV = 1.2 ?

3
4

3
4
@
RPC31 RPC32
2.2K_0404_4P2R_5% 2.2K_0404_4P2R_5%
@ @

G2 5
2
1

2
1
UART0_TXD 4 S2 D2 3
UART_TX_DEBUG 40
@
QC11B

2
PJT138K_SOT363-6

G1
UART0_RXD 1 S1 D1 6
UART_RX_DEBUG 40
B @ B

QC11A
PJT138K_SOT363-6 only for Win7 debug port

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 SOC (USB)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. CGx20
Date: Tuesday, December 08, 2015 Sheet 8 of 57
5 4 3 2 1
 5 4 3 2 1

?
UC1H CHV_MCP_EDS DDR3_M0_DQ_63
+VNN_1.05VA_S4
+CPU_CORE
7.7A EDS UNCORE_VNN_S4_1
AA18
AF36 AA19
AG33 CORE_VCC1_3 UNCORE_VNN_S4_2 AA21
AG35 CORE_VCC1_7 UNCORE_VNN_S4_3 AA22
AG36 CORE_VCC1_8 UNCORE_VNN_S4_4 AA24
AG38 CORE_VCC1_9 UNCORE_VNN_S4_5 AA25
AJ33 CORE_VCC1_10 UNCORE_VNN_S4_6 AC18
AJ36 CORE_VCC1_14 UNCORE_VNN_S4_7 AC19
AJ38 CORE_VCC1_15 UNCORE_VNN_S4_8 AC21
CORE_VCC1_16 UNCORE_VNN_S4_9 AC22
AF30 UNCORE_VNN_S4_10 AC24
AG27 CORE_VCC1_2 UNCORE_VNN_S4_11 AC25
D
AG29 CORE_VCC1_4 UNCORE_VNN_S4_12 AD25 D
AG30 CORE_VCC1_5 UNCORE_VNN_S4_13 AD27 +1.05VA_SOC_G3
AJ27 CORE_VCC1_6 UNCORE_VNN_S4_14
AJ29 CORE_VCC1_11 AA30
AJ30 CORE_VCC1_12 RSVD_AA30 V33
AF29 CORE_VCC1_13 VCCSRAMSOCIUN_1P056 AA32
CORE_VCC1_1 VCCSRAMSOCIUN_1P051 AA33
VCCSRAMSOCIUN_1P052 AA35
+GFX_CORE AD16 VCCSRAMSOCIUN_1P053 AA36
AD18 DDI_VGG_1 VCCSRAMSOCIUN_1P054 AC32
AD19 DDI_VGG_2 VCCSRAMSOCIUN_1P055 Y30
AF16 DDI_VGG_3 VCCSRAMSOCIUN_1P057 Y32
DDI_VGG_4 VCCSRAMSOCIUN_1P058 +1.05VA_ICLK_S4
AF18 Y33
AF19 DDI_VGG_5 VCCSRAMSOCIUN_1P059 Y35
AF21 DDI_VGG_6 VCCSRAMSOCIUN_1P0510
AF22 DDI_VGG_7 V19

iCLK
AJ19 DDI_VGG_8 ICLK_GND_OFF_2 V18 +1.05VA_DDR_G3
AG16 DDI_VGG_15 ICLK_GND_OFF_1
AG18 DDI_VGG_9 AM21
AG19 DDI_VGG_10 DDR_V1P05A_G3_1 AM33
AG21 DDI_VGG_11 DDR_V1P05A_G3_4 AM22

DDR
AG22 DDI_VGG_12 DDR_V1P05A_G3_2 AN22
AG24 DDI_VGG_13 DDR_V1P05A_G3_5 AN32
AJ21 DDI_VGG_14 DDR_V1P05A_G3_6 AM32
AJ22 DDI_VGG_16 DDR_V1P05A_G3_3
AJ24 DDI_VGG_17 V22 +1.05VA_MPHY_G3

PCIe
+1.15VA_SOC_G3 AK24 DDI_VGG_18 PCIE_V1P05A_G3_1 V24
DDI_VGG_19 PCIE_V1P05A_G3_2
AK30
AK35 CORE_V1P15_1 U24

SATA
AK36 CORE_V1P15_2 SATA_V1P05A_G3_2 U22
+1.15VA_FUSE_G3 AM29 CORE_V1P15_3 SATA_V1P05A_G3_1
CORE_V1P15_4 +1.05VA_SSIC_G3
+1.15VA_DDI_G3 V27
USB3_V1P05A_G3_2

FUSE USB
AK33 U27
AJ35 FUSE_V1P15_2 USB3_V1P05A_G3_1 V29
AM19 FUSE_V1P15_1 USBSSIC_V1P05A_G3
AK21 VCCSRAMGEN_1P152 N18
C C
VCCSRAMGEN_1P151 FUSE3_V1P05A_G5 U19
FUSE_V1P05A_G3

8 OF 13
REV = 1.2
BRASWELL_FCBGA151170 ?
@

+CPU_CORE +1.05VA
Need
@
short +VNN_1.05VA_S4

6.4 A 2
PJ1
2 1
1 3.5A
1 1 1 1 1 1 JUMP_43X79
CC31 CC32 1 1 1 1 1 1 1 1
CC30 4.7U_0402_6.3V6M 4.7U_0402_6.3V6M CC33 CC34 CC35 CC55 CC56 CC57 CC58 CC59 CC60 CC61 CC62
1
4.7U_0402_6.3V6M 4.7U_0402_6.3V6M 4.7U_0402_6.3V6M 4.7U_0402_6.3V6M 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K
2 2 2 2 2 2 CC145 22U_0603_6.3V6-M
22U_0603_6.3V6-M 22U_0603_6.3V6-M
CD@ 33P_0402_50V8J 2 2 2 2 2 2 2 2
2 RF_NS@ CD@ CD@ @
Note:Place CAP Back of CPU Note:Place CAP Back of CPU

Note:Place CAP Back of CPU Note:Place Close of CPU's Edge

+CPU_CORE

+1.05VA +1.05VA_SOC_G3 +1.05VA +1.05VA_ICLK_S4

1
1 1 1 1 RC9238
CC36 CC37 CC139 RC9241
CC38 CC39 33P_0402_50V8J 1 2 1 2 0_0603_5%
22U_0603_6.3V6-M 22U_0603_6.3V6-M 22U_0603_6.3V6-M 22U_0603_6.3V6-M 2 RF_NS@
2 2 2 2 0_0603_5%
CD@ CD@ @ @ 1 1 1 1 1
B CC63 CC64 CC65 CC66 CC67 1 B
CC68
Note:Place Close of CPU's Edge 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K
1U_0402_6.3V6K
2 2 2 2 2
@ @ 2
+GFX_CORE
+GFX_CORE
Note:Place CAP Back of CPU
11A Note:Place CAP Back of CPU Note:Place Close of CPU's Edge
1
1 1 1 1 1 1
CC138 CC42 CC41
+1.05VA +1.05VA_DDR_G3
CC40 4.7U_0402_6.3V6M 33P_0402_50V8J CC141 CC44 CC45 +1.05VA +1.05VA_MPHY_G3
22U_0603_6.3V6-M 4.7U_0402_6.3V6M 2 RF_NS@ 22U_0603_6.3V6-M 22U_0603_6.3V6-M 22U_0603_6.3V6-M RC9240
2 2 2 2 2 2
CD@ RC9281 0_0603_5% 0_0603_5%
1 2 1 2
Note:Place CAP Back of CPU Note:Place CAP Back of CPU
10uF 0402 change to 4.7uF for cost down 1 1 1 1
CC69 CC70 1 1 1
CC73 CC74 CC75
1U_0402_6.3V6K 1U_0402_6.3V6K CC71 CC72
1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K
+1.15VA_SOC 22U_0603_6.3V6-M 22U_0603_6.3V6-M
+1.15VA_SOC_G3 2 2 2 2
CD@ 2 2 2
CD@
RC9243 0_0603_5%
1 2
Note:Place CAP Back of CPU Note:Place Close of CPU's Edge Note:Place CAP Back of CPU
1 1 1 1 1 1
CC46 CC47 CC48 CC49 CC50 CC51
1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K
2 2 2 2 2 2 +1.05VA +1.05VA_SSIC_G3
CD@ CD@ @ @
RC9242 0_0603_5%
1 2
Note:Place CAP Back of CPU Note:Place Close of CPU's Edge
1 1 1 1 1
CC76 CC77 CC78 CC79 CC80
A +1.15VA_DDI_G3 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K A
+1.15VA_SOC
2 2 2 2 2
@ @ @
RC9244 0_0603_5%
1 2
+1.15VA_SOC +1.15VA_FUSE_G3
Note:Place CAP Back of CPU Note:Place Close of CPU's Edge
1 1 1 RC9279
CC52 CC53 CC54 0_0603_5%
1 2
1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K
2 2 2 Security Classification LC Future Center Secret Data Title
CD@ @
Issued Date 2015/10/08 Deciphered Date 2015/03/23 SOC (Power)
Note:Place CAP Back of CPU Note:Place Close of CPU's Edge THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
CGx20 0.1

Date: Tuesday, December 08, 2015 Sheet 9 of 57

5 4 3 2 1
 5 4 3 2 1

?CHV_MCP_EDS
+1.35V_DDRCLK +1.35V_DDR UC1I DDR3_M0_DQ_63
+1.24VA_DP_G3
+1.35V AN27
DDRSFR_VDDQ_G_S4 DDI_VDDQ_G3_1
V36
AM25 Y36
DDR_VDDQ_G_S4_2 DDI_VDDQ_G3_2 +1.24VA_G3
2.4A EDS BE1
DDR_VDDQ_G_S4_16 MIPI_V1P2A_G3_2
T40
BE53 P40
BJ2 DDR_VDDQ_G_S4_19 MIPI_V1P2A_G3_1 +1.24VA_SIO_G3
BJ3 DDR_VDDQ_G_S4_26 Y27
BJ49 DDR_VDDQ_G_S4_27 ICLK_VSFR_G3_2 Y25 +1.24VA_PLL_G3
BJ5 DDR_VDDQ_G_S4_28 ICLK_VSFR_G3_1
BH50 DDR_VDDQ_G_S4_29 P38
BH5 DDR_VDDQ_G_S4_25 CORE_VSFR_G3_5 V30

DDR
BH49 DDR_VDDQ_G_S4_24 CORE_VSFR_G3_6 AC30
BH4 DDR_VDDQ_G_S4_23 CORE_VSFR_G3_AC30
BE3 DDR_VDDQ_G_S4_22 +1.24VA_CPUPLL_G3
BG51 DDR_VDDQ_G_S4_17 AF35
BG3 DDR_VDDQ_G_S4_21 CORE_VSFR_G3_4 AD35
D BJ51 DDR_VDDQ_G_S4_20 CORE_VSFR_G3_2 AD38 D
BJ52 DDR_VDDQ_G_S4_30 CORE_VSFR_G3_3 AC36
AY10 DDR_VDDQ_G_S4_31 CORE_VSFR_G3_1
AY44 DDR_VDDQ_G_S4_14 +1.24VA_G3
DDR_VDDQ_G_S4_15
AV44
DDR_VDDQ_G_S4_13 USBHSIC_V1P2A_G3
M41 +1.24VA_USB_G3 +1.24VA_G3
AV10 U35
BE51 DDR_VDDQ_G_S4_10 USB_VDDQ_G3_2 V35 +1.24VA_USB2_G3

USB
AV38 DDR_VDDQ_G_S4_18 USB_VDDQ_G3_3 H44
AV16 DDR_VDDQ_G_S4_12 USB_VDDQ_G3_1 P41 +1.8VALW _USB
AU36 DDR_VDDQ_G_S4_11 USBSSIC_V1P2A_G3
AU18 DDR_VDDQ_G_S4_9 AA29
AN36 DDR_VDDQ_G_S4_8 USB_V1P8A_G3 +3VALW _USB_G3
AN35 DDR_VDDQ_G_S4_7 C23
AN19 DDR_VDDQ_G_S4_6 USB_V3P3A_G3_2 B22 VCCRTC
AN18 DDR_VDDQ_G_S4_5 USB_V3P3A_G3_1
AM36 DDR_VDDQ_G_S4_4 C5
AM18 DDR_VDDQ_G_S4_3 RTC_V3P3RTC_G5_2 B6 +3VALW _RTC

RTC
DDR_VDDQ_G_S4_1 RTC_V3P3RTC_G5_1 D4
VCC_LPC_G3 VCC_SD3_S3 RTC_V3P3A_G5_1
RTC_V3P3A_G5_2
E3
E1
SDIO_V3P3A_V1P8A_G3_1
+1.8VALW _FUSE
+1.8VS_HDA_S3 E2
SDIO_V3P3A_V1P8A_G3_2 +1.05VA_FUSE_G3
G1 U16
+1.8VALW _GPIO_E_G3 AH4 SDIO_V3P3A_V1P8A_G3_3 FUSE_V1P8A_G3
+1.8VALW_GPIO_G3 AF4 VCCCFIOAZA_1P802 H10
Y18 VCCCFIOAZA_1P801 FUSE1_V1P05A_G4 G10

FUSE
AD33 GPIO_V1P8A_G3_5 FUSE0_V1P05A_G3 A3
AK18 GPIO_V1P8A_G3_1 RSVD_A3 K20
AF33 GPIO_V1P8A_G3_3 RSVD_K20 M20
AK19 GPIO_V1P8A_G3_2 RSVD_M20
GPIO_V1P8A_G3_4

9 OF 13
BRASWELL_FCBGA151170 REV = 1.2
?
@

+1.35V
C
1.9 A C

+1.24VALW +1.24VA_G3
+1.24VALW +1.24VA_DP_G3 +1.24VALW +1.24VA_SIO_G3
1 1 1 1 1 1 1 1 RC898 0_0603_5%
RC9248 1 2 RC9249
CC81 CC82 CC83 CC84 CC85 CC86 CC87 CC88 1 2 0_0603_5% 1 2 0_0603_5%
2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 330P_0201_25V7-K 22U_0603_6.3V6-M 22U_0603_6.3V6-M 22U_0603_6.3V6-M 22U_0603_6.3V6-M
2 2 2 2 EMC_NS@ 2 2 2 2
@ @ 1 1
1 CC133 CC134 1
Note:Place CAP Back of CPU Note:Place Close of CPU's Edge CC102 1U_0402_6.3V6K 1U_0402_6.3V6K CC135
1U_0402_6.3V6K @ 1U_0402_6.3V6K
2 2
2Note:Place CAP Back of CPU 2
Note:Place CAP Back of CPU
Note:Place CAP Back of CPU
+1.35V
+1.35V
+1.35V_DDR
+1.35V_DDRCLK
+1.24VALW +1.24VA_PLL_G3
RC9246
1 2 0_0603_5% RC9247 0_0603_5%
1 2 RC9250 +1.24VALW +1.24VA_CPUPLL_G3 +1.24VA_G3
1 2 0_0603_5%
1 1 RC9251
CC89 1 1
2 0_0603_5%
CAD NOTE:FOR
CC91 1 PINS M41 1
1U_0402_6.3V6K CC90 1 1
1U_0402_6.3V6K CC92 CC109
22U_0603_6.3V6-M CC136 CC107
2 2 22U_0603_6.3V6-M 1U_0402_6.3V6K
2 2 1U_0402_6.3V6K 1U_0402_6.3V6K
@ 1
Note:Place CAP Back of CPU @ 2
Note:Place CAP Back of CPU 2 2 CC108
@
1U_0402_6.3V6K
Note:Place CAP Back of CPU Note:Place CAP Back of CPU
Note:Place Close of CPU's Edge Note:Place Close of CPU's Edge 2

+1.24VALW +1.24VA_USB_G3
RC9253 +1.24VA_G3
1 2 0_0603_5% +1.24VALW +1.24VA_USB2_G3
VCC_SD3_S3 +3VALW _SOC VCC_LPC_G3 CAD NOTE:FOR
RC9254
+1.8VALW +1.8VS +1.8VS_HDA_S3 1 1 1 2 0_0603_5% PINS P41
RC928 CC110 CC111
RC9283 1 2 0_0402_5%
1 2 0_0402_5% RC905 1U_0402_6.3V6K 1U_0402_6.3V6K 1
1 2 0_0402_5% @ 1 1 CC113
1 RC9278 2 0_0402_5% 2 2
1 1 CC142 CC112 1U_0402_6.3V6K
@
CC93 CC94 +1.8VALW 1 Note:Place CAP Back of CPU 1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K 1U_0402_6.3V6K 1 CC96 2
CC95 2 2
Note:Place CAP Back of CPU CD@
@ 1U_0402_6.3V6K
2 2 1U_0402_6.3V6K @
2 Note:Place CAP Back of CPU
Note:Place CAP Back of CPU 2
B B

+1.8VALW +1.8VALW _USB

RC9256 0_0603_5%
1 2
+3VALW _SOC +3VALW _USB_G3 VCCRTC +3VALW _SOC +3VALW _RTC
1 1 RC9257 RC9282
CC114 CC115 1 2 0_0603_5% 1 2 0_0402_5%
+1.8VALW +1.8VALW_GPIO_G3 +1.8VALW +1.8VALW _GPIO_E_G3 1U_0402_6.3V6K 1U_0402_6.3V6K
2 2 1
RC924 1
1 2 0_0603_5% RC925 CD@
Note:Place CAP Back of CPU 1
1 2 0_0402_5% CC118
CC116 CC117 0.1u_0201_10V6K
1 1 1U_0402_6.3V6K 0.1u_0201_10V6K 2
CC97 CC98 2 @
1U_0402_6.3V6K 1U_0402_6.3V6K 1 1 1 2
CC99 CC100 CC101
@
2 2 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K
@
2 2 2
CD@ +1.8VALW +1.8VALW _FUSE
Note:Place CAP Back of CPU
RC9258
1 2 0_0402_5%
+1.05VA +1.05VA_FUSE_G3
RC9259
1 1 2 0_0402_5%
CC119
1U_0402_6.3V6K
2 Note:Place CAP Back of CPU
1
CC120
1U_0402_6.3V6K
2
@

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 SOC (Power2)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. CGx20 0.1

Date: Tuesday, December 08, 2015 Sheet 10 of 57

5 4 3 2 1
 5 4 3 2 1

? ?
UC1JCHV_MCP_EDS DDR3_M0_DQ_63 CHV_MCP_EDS
UC1K DDR3_M0_DQ_63
Power-VSS Power-VSS

AN3 AF38 AN21 AY9

AN29 VSS_107 VSS_55 AF32 BG30 VSS_103 VSS_166 AY28
AN25 VSS_106 VSS_54 AF25 BG27 VSS_213 VSS_157 AY26
AN24 VSS_105 VSS_53 AF10 BG24 VSS_212 VSS_156 AY24
AN16 VSS_104 VSS_51 AE9 BG20 VSS_211 VSS_155 AY22
AN14 VSS_102 VSS_50 AE8 BG19 VSS_210 VSS_154 AY20
AN12 VSS_101 VSS_49 AE6 BG18 VSS_209 VSS_153 AW35
AN11 VSS_100 VSS_48 AE53 BG16 VSS_208 VSS_151 AW27
AN1 VSS_99 VSS_47 AE50 BG14 VSS_207 VSS_150 AW19
AM50 VSS_98 VSS_46 AE48 BF42 VSS_206 VSS_149 AM13
D
AM42 VSS_97 VSS_45 AE46 BF32 VSS_203 VSS_88 AK29 D
AM4 VSS_96 VSS_44 AE45 BF28 VSS_201 VSS_78 AK22
AM38 VSS_95 VSS_43 AE43 BF27 VSS_200 VSS_75 AV40
AM35 VSS_94 VSS_42 AE42 BF26 VSS_199 VSS_147 AV35
AH44 VSS_93 VSS_41 AE40 BF22 VSS_198 VSS_146 AV30
AM30 VSS_64 VSS_40 AE14 BF12 VSS_197 VSS_145 AV27
AM27 VSS_92 VSS_39 AE12 BE35 VSS_196 VSS_144 AV24
U25 VSS_91 VSS_38 AE11 BE19 VSS_195 VSS_143 AV19
P10 VSS_335 VSS_37 AE1 C20 VSS_194 VSS_142 AV14
AM16 VSS_317 VSS_36 AD44 BD53 VSS_240 VSS_141 AJ18
AD4 VSS_89 VSS_35 AD36 BG7 VSS_193 VSS_69 AU53
AK7 VSS_34 VSS_33 AC29 BD35 VSS_223 VSS_140 AU51
AK50 VSS_87 VSS_26 AD32 BD27 VSS_192 VSS_139 AU3
AK47 VSS_86 VSS_32 AD30 BD19 VSS_191 VSS_138 AU1
AK45 VSS_85 VSS_31 AD21 BD1 VSS_190 VSS_137 AT9
AK44 VSS_84 VSS_30 AC38 BC44 VSS_189 VSS_136 AT51
AK40 VSS_83 VSS_29 AC35 BC40 VSS_188 VSS_135 AT45
AK4 VSS_82 VSS_28 AC33 BC38 VSS_187 VSS_134 AT36
AK38 VSS_81 VSS_27 AC16 BC28 VSS_186 VSS_133 AT35
AK32 VSS_80 VSS_25 AB6 BC26 VSS_185 VSS_132 AT3
AK27 VSS_79 VSS_24 AB50 BC16 VSS_184 VSS_131 AT27
AK25 VSS_77 VSS_23 AB47 BC14 VSS_183 VSS_130 AT19
AM24 VSS_76 VSS_22 AB42 BC10 VSS_182 VSS_129 AT18
AK16 VSS_90 VSS_21 AB4 BB35 VSS_181 VSS_128 AP9
AJ53 VSS_74 VSS_20 AB14 BB27 VSS_178 VSS_127 AP50
AJ51 VSS_73 VSS_19 AB13 BB19 VSS_177 VSS_126 AP45
AJ3 VSS_72 VSS_18 AB12 BA35 VSS_176 VSS_125 AP4
AJ25 VSS_71 VSS_17 AB10 BA30 VSS_175 VSS_124 AN9
AJ16 VSS_70 VSS_16 AA53 BA27 VSS_174 VSS_123 AN8
AJ1 VSS_68 VSS_15 AA38 BA24 VSS_173 VSS_122 AN6
AH9 VSS_67 VSS_14 AA27 BA19 VSS_172 VSS_121 AN53
AH47 VSS_66 VSS_13 AA16 B36 VSS_171 VSS_120 AN51
AH42 VSS_65 VSS_12 A47 B28 VSS_169 VSS_119 AN5
AH41 VSS_63 VSS_8 A43 AY7 VSS_168 VSS_118 AN49
AH14 VSS_62 VSS_7 A39 AY51 VSS_165 VSS_117 AN48
AH13 VSS_61 VSS_6 A31 AY47 VSS_164 VSS_116 AN46
AH12 VSS_60 VSS_5 A23 AY34 VSS_163 VSS_115 AN45
AH10 VSS_59 VSS_4 A19 AY32 VSS_161 VSS_114 AN43
C C
AG25 VSS_58 VSS_3 A15 AY30 VSS_160 VSS_113 AN42
AF47 VSS_57 VSS_2 A11 AY3 VSS_159 VSS_112 AN40
VSS_56 VSS_1 AN30 VSS_158 VSS_111 AN38
10 OF 13 AY45 VSS_108 VSS_110
BRASWELL_FCBGA151170 VSS_162
REV = 1.2
? 11 OF 13
@ ?
BRASWELL_FCBGA151170
REV = 1.2
@

?
UC1L
CHV_MCP_EDS DDR3_M0_DQ_63
Power-VSS

AN33 Y24 CHV_MCP_EDS ?

P32 VSS_109 VSS_369 G30 UC1M DDR3_M0_DQ_63
P27 VSS_321 VSS_272 G28 Power-VSS
VSS_320 VSS_271 F1 W1
P22 G26 VSS_NCTF_F1 VSS_362
VSS_319 VSS_270 C1 V44
P19 G22 VSS_NCTF_C1 VSS_361
VSS_318 VSS_269 BH53 V42
AF24 G14 VSS_NCTF_BH53VSS_360
VSS_52 VSS_268 BH52 V41
N53 G12 VSS_NVTF_BH52VSS_359
VSS_316 VSS_267 BH2 V38
N51 F5 VSS_NCTF_BH2 VSS_358
VSS_315 VSS_266 BH1
N32 F35 VSS_NCTF_BH1
VSS_314 VSS_265 BG53 V32
N24 F32 VSS_NCTF_BG53VSS_357
VSS_313 VSS_264 BG1 V21
N22 F27 VSS_NCTF_BG1 VSS_355
VSS_312 VSS_263 B52 V16
M9 F24 VSS_NCTF_B52 VSS_354
VSS_311 VSS_262 B2 U9
F19 VSS_NCTF_B2 VSS_353
VSS_261 U8
K45 E51 VSS_352
VSS_296 VSS_259 A6 U6
M40 E35 VSS_NCTF_A6 VSS_351
VSS_308 VSS_257 A5 U53
M35 E19 VSS_NCTF_A5 VSS_350
VSS_307 VSS_256 U5
M27 D42 VSS_349
VSS_306 VSS_255 M24 U49
AW13 D40 VSSA VSS_348
VSS_148 VSS_254 A7 U48
M19 D38 VSS_11 VSS_347
VSS_304 VSS_253 BF50 U46
M14 D32 VSS_204 VSS_346
VSS_303 VSS_252 BF4 U45
B L35 D27 VSS_202 VSS_345 B
VSS_301 VSS_251 BB50 U43
L27 D24 VSS_180 VSS_344
VSS_300 VSS_250 U42
L19 D16 VSS_343
VSS_299 VSS_249 BB4 U40
L1 D10 VSS_179 VSS_342
VSS_298 VSS_248 U38
K50 J42 VSS_341
VSS_297 VSS_284 BG47
T47 C47 VSS_219
VSS_328 VSS_247 Y9 U33
K4 C39 VSS_376 VSS_339
VSS_295 VSS_246 Y50 U32
K36 C36 VSS_375 VSS_338
VSS_294 VSS_245 Y45 U30
K34 C30 VSS_374 VSS_337
VSS_293 VSS_244 Y40 U29
K32 C3 VSS_373 VSS_336
VSS_292 VSS_243 Y4
K30 C28 VSS_372
VSS_291 VSS_242 Y38 U21
K24 C22 VSS_371 VSS_334
VSS_290 VSS_241 Y29 U18
K22 AW41 VSS_370 VSS_333
VSS_289 VSS_152 Y22 U36
K16 BJ7 VSS_368 VSS_340
VSS_288 VSS_238 Y21 U14
K14 BJ47 VSS_367 VSS_332
VSS_287 VSS_237 Y19 U12
K12 BJ43 VSS_366 VSS_331
VSS_286 VSS_236 Y16 U11
J53 BJ39 VSS_365 VSS_330
VSS_285 VSS_235 Y14 T9
M45 BJ35 VSS_364 VSS_329
VSS_309 VSS_234 Y10 P42
J38 BJ31 VSS_363 VSS_325
VSS_283 VSS_233 T14
J35 BJ27 VSS_327
VSS_282 VSS_232 P4 R1
J30 BJ23 VSS_324 VSS_326
VSS_281 VSS_231 L41
J27 BJ19 VSS_302
VSS_280 VSS_230 P36 P35
J22 BJ15 VSS_323 VSS_322
J19 VSS_279 VSS_229 BJ11
J18 VSS_278 VSS_228 BG5
H8 VSS_277 VSS_221 BG49
E46 VSS_276 VSS_220 BG40
VSS_258 VSS_218 ?
H35 BG38
H27 VSS_275 VSS_217 BG36 13 OF 13
H19 VSS_274 VSS_216 BG35 BRASWELL_FCBGA151170
M50 VSS_273 VSS_215 BG34 REV = 1.2
V25 VSS_310 VSS_214
VSS_356 @

12 OF 13
BRASWELL_FCBGA151170
REV = 1.2 ?
A @ A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 SOC (VSS)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
CGx20 0.1

Date: Tuesday, December 08, 2015 Sheet 11 of 57

5 4 3 2 1
 5 4 3 2 1

Hardware STRAPS
+1.8VALW
(Follow up CRB)
+1.8VALW

D D

2
RC9263 RC9264 RC9266 RC9265 RC9267
10K_0402_1% 10K_0402_1% 10K_0402_1% 4.7K_0402_5% 1K_0402_1%
@ @ @ @
2

1
RC9273 RC9274 RC9275 RC46 RC9276
100K_0402_5% 100K_0402_5% 10K_0402_5% 4.7K_0402_5% 4.7K_0402_5%
@
@ GPIO_SUS_9 7
1

1
GPIO_SUS_6
EC_SCI# 7,44

GPIO_SUS_0 7 GPIO_CAM_8 4

GPIO_SUS_1 7 GPIO_CAM_9 4

GPIO_SUS_2 7 GPIO_CAM_11 4

GPIO_SUS_4 7

C GPIO_SUS_5 7 C

GPIO_SUS_8 7

2
RC9268 RC9262 RC9270 RC9271
100K_0402_5% 100K_0402_5% 100K_0402_5% 10K_0402_1%
@ @ @ @
2

1
RC9277 RC49 RC51
4.7K_0402_5% 10K_0402_1% 10K_0402_1%
@ @
1

B B

GPIO_SUS_5
0606

2
RC961
4.7K_0402_1%
1
1

D QC214 RC962
2

2 1 2
G PCH_ME_PROTECT 44
ME2
SHORT PADS 0_0402_5%
1

S 2N7002KW_SOT323-3
3

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 SOC (STRAPS & OTHERS)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
CGx20 0.1

Date: Tuesday, December 08, 2015 Sheet 12 of 57

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 MCP (OTHER)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
CGx20 0.1

Date: Tuesday, December 08, 2015 Sheet 13 of 57

5 4 3 2 1
 5 4 3 2 1

+0.675VS

RPD1
DDRA_MA1 1 8
DDRA_MA4 2 7
DDRA_MA2 3 6
DDRA_BS1# 4 5
DDRA_DQ[63:0] 5 U46 U48
Signal voltage level = 0.675 V 82_0804_8P4R_1%
DDRA_MA[15:0] 5 DDRA_MA0 N3 E3 DDRA_DQ12 DDRA_MA0 N3 E3 DDRA_DQ30
PLACE TWO 4.7K RESISTORS CLOSE TO RPD2
DDRA_MA1 P7 A0 DQL0 F7 DDRA_DQ8 DDRA_MA1 P7 A0 DQL0 F7 DDRA_DQ31 DDRA_MA7 1 8
D DDRA_DQS[7:0] 5 DDRA_MA2 P3 A1 DQL1 F2 DDRA_DQ15 DDRA_MA2 P3 A1 DQL1 F2 DDRA_DQ27 DIMMS ON DIMM_VREF_CA / DIMM_VREF_DQ DDRA_MA5 2 7 D
DDRA_MA3 N2 A2 DQL2 F8 DDRA_DQ11 DDRA_MA3 N2 A2 DQL2 F8 DDRA_DQ29 Decoupling caps are needed; one 0.1 μ F placed close to VREF pins DDRA_MA8 3 6
DDRA_DQS#[7:0] 5 DDRA_MA4 A3 DQL3 DDRA_DQ13 DDRA_MA4 A3 DQL3 DDRA_DQ28 DDRA_MA13
P8 H3 P8 H3 4 5
DDRA_MA5 P2 A4 DQL4 H8 DDRA_DQ14 DDRA_MA5 P2 A4 DQL4 H8 DDRA_DQ24
DDRA_DM[7:0] 5 DDRA_MA6 R8 A5 DQL5 G2 DDRA_DQ10 DDRA_MA6 R8 A5 DQL5 G2 DDRA_DQ25
82_0804_8P4R_1%
DDRA_MA7 R2 A6 DQL6 H7 DDRA_DQ9 DDRA_MA7 R2 A6 DQL6 H7 DDRA_DQ26
RPD3
DDRA_MA8 T8 A7 DQL7 D7 DDRA_DQ1 DDRA_MA8 T8 A7 DQL7 D7 DDRA_DQ19 DDRA_CKE0 1 8
DDRA_MA9 A8 DQU0 DDRA_DQ2 DDRA_MA9 A8 DQU0 DDRA_DQ21 Trace width:20 mils DDRA_MA10
R3 C3 R3 C3 2 7
DDRA_MA10 L7 A9 DQU1 C8 DDRA_DQ0 DDRA_MA10 L7 A9 DQU1 C8 DDRA_DQ23
+1.35V
Space:20mils +1.35V
DDRA_BS0# 3 6
DDRA_MA11 R7 A10/AP DQU2 C2 DDRA_DQ3 DDRA_MA11 R7 A10/AP DQU2 C2 DDRA_DQ20 DDRA_MA3 4 5
DDRA_MA12 N7 A11 DQU3 A7 DDRA_DQ4 DDRA_MA12 N7 A11 DQU3 A7 DDRA_DQ22
DDRA_MA13 A12/BC# DQU4 DDRA_DQ7 DDRA_MA13 A12/BC# DQU4 DDRA_DQ16

1
T3 A2 T3 A2 82_0804_8P4R_1%
A13 DQU5 B8 DDRA_DQ5 A13 DQU5 B8 DDRA_DQ18
RD12 RD6 RPD4
DDRA_MA14 T7 DQU6 A3 DDRA_DQ6 DDRA_MA14 T7 DQU6 A3 DDRA_DQ17 DDRA_RAS# 1 8
4.7K_0402_1% +VREF_CA 4.7K_0402_1%
DDRA_MA15 M7 A14 DQU7 DDRA_MA15 M7 A14 DQU7 DDRA_CAS# 2 7
NC5 +1.35V NC5 +1.35V DDRA_WE# 3 6
DDRA_CS0#

2
4 5
B2 B2 +VREF_DQ_DIMMA +VREF_CA
DDRA_BS0# M2 VDD1 D9 DDRA_BS0# M2 VDD1 D9
5 DDRA_BS0# 82_0804_8P4R_1%
DDRA_BS1# BA0 VDD2 DDRA_BS1# BA0 VDD2

1
N8 G7 N8 G7 RPD5
5 DDRA_BS1# DDRA_BS2# BA1 VDD3 DDRA_BS2# BA1 VDD3 DDRA_BS2#
M3 K2 M3 K2 RD14 RD8 1 8
5 DDRA_BS2# BA2 VDD4 BA2 VDD4 DDRA_MA0
K8 K8 4.7K_0402_1% 4.7K_0402_1% 2 7
VDD5 N1 VDD5 N1 DDRA_MA15 3 6
VDD6 N9 VDD6 N9 DDRA_MA12 4 5
DDRA_CLK0 VDD7 DDRA_CLK0 VDD7

2
J7 R1 J7 R1
5 DDRA_CLK0 DDRA_CLK0# CK VDD8 DDRA_CLK0# CK VDD8
K7 R9 K7 R9 82_0804_8P4R_1%
5 DDRA_CLK0# CK# VDD9 CK# VDD9 RPD6
DDRA_MA9 1 8
DDRA_CKE0 K9 A1 DDRA_CKE0 K9 A1 DDRA_MA11 2 7
5 DDRA_CKE0 CKE VDDQ1 CKE VDDQ1 DDRA_MA14
J9 A8 J9 A8 3 6
NC2 VDDQ2 C1 NC2 VDDQ2 C1 DDRA_MA6 4 5
VDDQ3 C9 VDDQ3 C9
DDRA_RAS# J3 VDDQ4 D2 DDRA_RAS# J3 VDDQ4 D2 82_0804_8P4R_1%
5 DDRA_RAS# DDRA_CAS# K3 RAS# VDDQ5 E9 DDRA_CAS# K3 RAS# VDDQ5 E9
5 DDRA_CAS# DDRA_WE# CAS# VDDQ6 DDRA_WE# CAS# VDDQ6
L3 F1 L3 F1
5 DDRA_WE# WE# VDDQ7 WE# VDDQ7
H2 H2
VDDQ8 H9 VDDQ8 H9
DDRA_DQS1 F3 VDDQ9 DDRA_DQS3 F3 VDDQ9
DDRA_DQS#1 G3 DQSL DDRA_DQS#3 G3 DQSL
DQSL# DQSL#

M8 +VREF_CA M8 +VREF_CA
DDRA_DQS0 C7 VREFCA H1 +VREF_DQ_DIMMA DDRA_DQS2 C7 VREFCA H1 +VREF_DQ_DIMMA
DDRA_DQS#0 B7 DQSU VREFDQ DDRA_DQS#2 B7 DQSU VREFDQ
DQSU# DQSU#
1 1
1 1
CD94 CD97
DDRA_DM1 E7 B1 DDRA_DM3 E7 B1
CD93 .047U_0201_6.3V6K CD98 .047U_0201_6.3V6K
DDRA_DM0 D3 DML VSSQ1 B9 2 DDRA_DM2 D3 DML VSSQ1 B9 2
DMU VSSQ2 .047U_0201_6.3V6K DMU VSSQ2 .047U_0201_6.3V6K
D1 2 D1 2
C VSSQ3 D8 VSSQ3 D8 C
VSSQ4 E2 VSSQ4 E2
DDRA_CS0# L2 VSSQ5 E8 DDRA_CS0# L2 VSSQ5 E8 +0.675VS
5 DDRA_CS0# L1 CS# VSSQ6 F9 L1 CS# VSSQ6 F9
NC3 VSSQ7 G1 NC3 VSSQ7 G1
Del CS_2(chip select: 1 per Rank) VSSQ8 G9 VSSQ8 G9
Del CKE_2(chip select: 1 per Rank???) VSSQ9 VSSQ9
DDRA_ODT0 K1 A9 DDRA_ODT0 K1 A9
5 DDRA_ODT0 J1 ODT VSS1 B3 J1 ODT VSS1 B3 DDRA_ODT0 1 2
RD97 82_0402_1%
NC1 VSS2 E1 NC1 VSS2 E1
VSS3 G8 VSS3 G8
VSS4 J2 VSS4 J2
RD64 1 2 240_0402_1% L8 VSS5 J8 RD95 1 2 240_0402_1% L8 VSS5 J8
L9 ZQ VSS6 M1 L9 ZQ VSS6 M1
0603 NC4 VSS7 M9 NC4 VSS7 M9 +0.675VS
VSS8 P1 VSS8 P1
VSS9 P9 VSS9 P9
T2 VSS10 T1 DDRA_DRAMRST# T2 VSS10 T1
5 DDRA_DRAMRST# RESET# VSS11 RESET# VSS11 2
T9 T9
VSS12 VSS12 CD145
H5TC4G63AFR-PBA_FBGA96 H5TC4G63AFR-PBA_FBGA96 0.1U_0201_6.3V6-K
1
change 0.2pf 2 DDRA_CLK0
@ @ RD63 1 2 82_0402_1%
DDRA_CLK0#
CD147 RD59 1 2 82_0402_1%
0.2P_0402_50V8-B 2
1
CD226
U45 U47
0.1U_0201_6.3V6-K
1 @
DDRA_MA0 N3 E3 DDRA_DQ49 DDRA_MA0 N3 E3 DDRA_DQ60
DDRA_MA1 P7 A0 DQL0 F7 DDRA_DQ48 DDRA_MA1 P7 A0 DQL0 F7 DDRA_DQ58
DDRA_MA2 P3 A1 DQL1 F2 DDRA_DQ52 DDRA_MA2 P3 A1 DQL1 F2 DDRA_DQ61
DDRA_MA3 N2 A2 DQL2 F8 DDRA_DQ51 DDRA_MA3 N2 A2 DQL2 F8 DDRA_DQ62
DDRA_MA4 P8 A3 DQL3 H3 DDRA_DQ53 DDRA_MA4 P8 A3 DQL3 H3 DDRA_DQ56
DDRA_MA5 P2 A4 DQL4 H8 DDRA_DQ50 DDRA_MA5 P2 A4 DQL4 H8 DDRA_DQ59
DDRA_MA6 R8 A5 DQL5 G2 DDRA_DQ54 DDRA_MA6 R8 A5 DQL5 G2 DDRA_DQ57
DDRA_MA7 R2 A6 DQL6 H7 DDRA_DQ55 DDRA_MA7 R2 A6 DQL6 H7 DDRA_DQ63
DDRA_MA8 T8 A7 DQL7 D7 DDRA_DQ32 DDRA_MA8 T8 A7 DQL7 D7 DDRA_DQ42
DDRA_MA9 R3 A8 DQU0 C3 DDRA_DQ39 DDRA_MA9 R3 A8 DQU0 C3 DDRA_DQ45
DDRA_MA10 L7 A9 DQU1 C8 DDRA_DQ33 DDRA_MA10 L7 A9 DQU1 C8 DDRA_DQ46
DDRA_MA11 R7 A10/AP DQU2 C2 DDRA_DQ35 DDRA_MA11 R7 A10/AP DQU2 C2 DDRA_DQ40
DDRA_MA12 N7 A11 DQU3 A7 DDRA_DQ37 DDRA_MA12 N7 A11 DQU3 A7 DDRA_DQ43
DDRA_MA13 T3 A12/BC# DQU4 A2 DDRA_DQ38 DDRA_MA13 T3 A12/BC# DQU4 A2 DDRA_DQ41
+1.35V
A13 DQU5 B8 DDRA_DQ36 A13 DQU5 B8 DDRA_DQ47 +0.675VS
DDRA_MA14 DQU6 DDRA_DQ34 DDRA_MA14 DQU6 DDRA_DQ44 (10uF_0603_6.3V)*6
T7 A3 T7 A3
DDRA_MA15 M7 A14 DQU7 DDRA_MA15 M7 A14 DQU7
NC5 +1.35V NC5 +1.35V

10U_0603_6.3V6M
10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
B2 B2 1 1 1 1 1 1 1 1 1 1 1
DDRA_BS0# M2 VDD1 D9 DDRA_BS0# M2 VDD1 D9

CD35

CD36

CD37

CD38

CD39

CD40

CD49

CD50

CD51

CD52

CD63
B DDRA_BS1# N8 BA0 VDD2 G7 DDRA_BS1# N8 BA0 VDD2 G7 B
DDRA_BS2# M3 BA1 VDD3 K2 DDRA_BS2# M3 BA1 VDD3 K2
BA2 VDD4 K8 BA2 VDD4 K8 2 2 2 2 2 2 2 2 2@ 2@ 2
VDD5 N1 VDD5 N1
VDD6 N9 VDD6 N9
DDRA_CLK0 J7 VDD7 R1 DDRA_CLK0 J7 VDD7 R1
DDRA_CLK0# K7 CK VDD8 R9 DDRA_CLK0# K7 CK VDD8 R9
CK# VDD9 CK# VDD9

DDRA_CKE0 K9 A1 DDRA_CKE0 K9 A1
J9 CKE VDDQ1 A8 J9 CKE VDDQ1 A8

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

33P_0402_50V8J

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

33P_0402_50V8J
NC2 VDDQ2 C1 NC2 VDDQ2 C1
VDDQ3 VDDQ3 1 1 1 1 1 1 1 1 1 1 1 1
C9 C9

CD153

CD154

CD155

CD156

CD157

CD159

CD216

CD150

CD149

CD151

CD152

CD220
DDRA_RAS# J3 VDDQ4 D2 DDRA_RAS# J3 VDDQ4 D2
DDRA_CAS# K3 RAS# VDDQ5 E9 DDRA_CAS# K3 RAS# VDDQ5 E9
DDRA_WE# L3 CAS# VDDQ6 F1 DDRA_WE# L3 CAS# VDDQ6 F1 2 2 2 2 2 2 2 2 2 2@ 2@ 2
WE# VDDQ7 H2 WE# VDDQ7 H2
VDDQ8 H9 VDDQ8 H9 RF@
DDRA_DQS6 VDDQ9 DDRA_DQS7 VDDQ9 RF@
F3 F3
DDRA_DQS#6 G3 DQSL DDRA_DQS#7 G3 DQSL
DQSL# DQSL#

M8 +VREF_CA M8 +VREF_CA
DDRA_DQS4 C7 VREFCA H1 +VREF_DQ_DIMMA DDRA_DQS5 C7 VREFCA H1 +VREF_DQ_DIMMA

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

33P_0402_50V8J
DDRA_DQS#4 B7 DQSU VREFDQ DDRA_DQS#5 B7 DQSU VREFDQ
DQSU# DQSU# 1 1 1 1 1 1 1

CD158

CD160

CD161

CD163

CD162

CD165

CD217
1 1
1 1
CD66 CD96
DDRA_DM6 E7 B1 DDRA_DM7 E7 B1 2 2 2 2 2 2 2
CD65 .047U_0201_6.3V6K CD95 .047U_0201_6.3V6K
DDRA_DM4 D3 DML VSSQ1 B9 2 DDRA_DM5 D3 DML VSSQ1 B9 2
.047U_0201_6.3V6K .047U_0201_6.3V6K +1.35V
DMU VSSQ2 D1 2 DMU VSSQ2 D1 2
VSSQ3 VSSQ3 RF@
D8 D8
VSSQ4 E2 VSSQ4 E2
DDRA_CS0# L2 VSSQ5 E8 DDRA_CS0# L2 VSSQ5 E8

0.1U_0201_6.3V6-K

330P_0402_50V7K

330P_0402_50V7K

330P_0402_50V7K

0.1U_0201_6.3V6-K

330P_0402_50V7K

330P_0402_50V7K

0.1U_0201_6.3V6-K
L1 CS# VSSQ6 F9 L1 CS# VSSQ6 F9
NC3 VSSQ7 NC3 VSSQ7 1 1 1 1 1 1 1 1
G1 G1

C4901

C4903

C4902

C4904

C4905

C4906

C4907

C4908
VSSQ8 G9 VSSQ8 G9

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

33P_0402_50V8J
VSSQ9 VSSQ9
DDRA_ODT0 DDRA_ODT0 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2
K1 A9 K1 A9

CD164

CD166

CD167

CD168

CD169

CD170

CD218
J1 ODT VSS1 B3 J1 ODT VSS1 B3
NC1 VSS2 E1 NC1 VSS2 E1
VSS3 G8 VSS3 G8 2 2 2 2 2 2 2 EMC_NS@ EMC_NS@ EMC_NS@ EMC_NS@
VSS4 J2 VSS4 J2 EMC_NS@ EMC_NS@
VSS5 VSS5 EMC_NS@ EMC_NS@
RD61 1 2 240_0402_1% L8 J8 RD93 1 2 240_0402_1% L8 J8 RF@
L9 ZQ VSS6 M1 L9 ZQ VSS6 M1
NC4 VSS7 M9 NC4 VSS7 M9
VSS8 P1 VSS8 P1
VSS9 P9 VSS9 P9
DDRA_DRAMRST# T2 VSS10 T1 DDRA_DRAMRST# T2 VSS10 T1
RESET# VSS11 T9 RESET# VSS11 T9

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

33P_0402_50V8J
A VSS12 VSS12 A
1 1 1 1 1 1 1

CD171

CD173

CD172

CD174

CD176

CD175

CD219
H5TC4G63AFR-PBA_FBGA96 H5TC4G63AFR-PBA_FBGA96
@ @
2 2 2 2 2 2 2

RF_NS@

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 DDRIII SO-DIMM A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. CGx20 0.1

Date: Tuesday, December 08, 2015 Sheet 14 of 57

5 4 3 2 1
 5 4 3 2 1

DDRB_DQ[63:0] 5 U40 U41

DDRB_MA[15:0] 5 DDRB_MA0 N3 E3 DDRB_DQ11 DDRB_MA0 N3 E3 DDRB_DQ4 +0.675VS

DDRB_MA1 A0 DQL0 DDRB_DQ9 DDRB_MA1 A0 DQL0 DDRB_DQ3 Signal voltage level = 0.675 V
P7 F7 P7 F7 PLACE TWO 4.7K RESISTORS CLOSE TO
DDRB_DQS[7:0] 5 DDRB_MA2 P3 A1 DQL1 F2 DDRB_DQ10 DDRB_MA2 P3 A1 DQL1 F2 DDRB_DQ1
DDRB_MA3 N2 A2 DQL2 F8 DDRB_DQ13 DDRB_MA3 N2 A2 DQL2 F8 DDRB_DQ2 DIMMS ON DIMM_VREF_CA / DIMM_VREF_DQ RPD8
DDRB_DQS#[7:0] 5 DDRB_MA4 A3 DQL3 DDRB_DQ15 DDRB_MA4 A3 DQL3 DDRB_DQ0 Decoupling caps are needed; one 0.1 μ F placed close to VREF pins DDRB_MA13
D P8 H3 P8 H3 1 8 D
DDRB_MA5 P2 A4 DQL4 H8 DDRB_DQ12 DDRB_MA5 P2 A4 DQL4 H8 DDRB_DQ7 DDRB_MA3 2 7
DDRB_DM[7:0] 5 DDRB_MA6 A5 DQL5 DDRB_DQ14 DDRB_MA6 A5 DQL5 DDRB_DQ5 DDRB_MA2
R8 G2 R8 G2 3 6
DDRB_MA7 R2 A6 DQL6 H7 DDRB_DQ8 DDRB_MA7 R2 A6 DQL6 H7 DDRB_DQ6 DDRB_MA4 4 5
DDRB_MA8 T8 A7 DQL7 D7 DDRB_DQ28 DDRB_MA8 T8 A7 DQL7 D7 DDRB_DQ18
DCH@
DDRB_MA9 R3 A8 DQU0 C3 DDRB_DQ26 DDRB_MA9 R3 A8 DQU0 C3 DDRB_DQ17
Trace width:20 mils 82_0804_8P4R_1%
DDRB_MA10 L7 A9 DQU1 C8 DDRB_DQ25 DDRB_MA10 L7 A9 DQU1 C8 DDRB_DQ23
Space:20mils RPD9
DDRB_MA11 R7 A10/AP DQU2 C2 DDRB_DQ24 DDRB_MA11 R7 A10/AP DQU2 C2 DDRB_DQ16 DDRB_MA5 1 8
+1.35V
DDRB_MA12 N7 A11 DQU3 A7 DDRB_DQ27 DDRB_MA12 N7 A11 DQU3 A7 DDRB_DQ20 DDRB_MA9 2 7
DDRB_MA13 T3 A12/BC# DQU4 A2 DDRB_DQ29 DDRB_MA13 T3 A12/BC# DQU4 A2 DDRB_DQ19 DDRB_MA11 3 6
A13 DQU5 DDRB_DQ30 A13 DQU5 DDRB_DQ21 DDRB_MA0

1
B8 B8 4 5
DDRB_MA14 T7 DQU6 A3 DDRB_DQ31 DDRB_MA14 T7 DQU6 A3 DDRB_DQ22
RD11 DCH@
DDRB_MA15 M7 A14 DQU7 DDRB_MA15 M7 A14 DQU7 4.7K_0402_1% 82_0804_8P4R_1%
NC5 +1.35V NC5 +1.35V DCH@ RPD10
DDRB_MA8 1 8
DDRB_MA7

2
B2 B2 2 7
DDRB_BS0# M2 VDD1 D9 DDRB_BS0# M2 VDD1 D9 +VREF_DQ_DIMMB DDRB_MA14 3 6
5 DDRB_BS0# DDRB_BS1# BA0 VDD2 DDRB_BS1# BA0 VDD2 DDRB_MA6
N8 G7 N8 G7 4 5
5 DDRB_BS1# DDRB_BS2# BA1 VDD3 DDRB_BS2# BA1 VDD3

1
M3 K2 M3 K2 DCH@
5 DDRB_BS2# BA2 VDD4 BA2 VDD4
K8 K8 RD13 82_0804_8P4R_1%
VDD5 N1 VDD5 N1 4.7K_0402_1% RPD11
VDD6 N9 VDD6 N9 DDRB_MA1 1 8
DCH@
DDRB_CLK0 J7 VDD7 R1 DDRB_CLK0 J7 VDD7 R1 DDRB_MA12 2 7
5 DDRB_CLK0 DDRB_CLK0# CK VDD8 DDRB_CLK0# CK VDD8 DDRB_BS2#

2
K7 R9 K7 R9 3 6
5 DDRB_CLK0# CK# VDD9 CK# VDD9 DDRB_MA15 4 5
DCH@
DDRB_CKE0 K9 A1 DDRB_CKE0 K9 A1
5 DDRB_CKE0 82_0804_8P4R_1%
J9 CKE VDDQ1 A8 J9 CKE VDDQ1 A8 RPD12
NC2 VDDQ2 C1 NC2 VDDQ2 C1 DDRB_BS0# 1 8
VDDQ3 C9 VDDQ3 C9 DDRB_BS1# 2 7
DDRB_RAS# J3 VDDQ4 D2 DDRB_RAS# J3 VDDQ4 D2 DDRB_MA10 3 6
5 DDRB_RAS# DDRB_CAS# K3 RAS# VDDQ5 E9 DDRB_CAS# K3 RAS# VDDQ5 E9 DDRB_CKE0 4 5
5 DDRB_CAS# DDRB_WE# CAS# VDDQ6 DDRB_WE# CAS# VDDQ6
L3 F1 L3 F1 DCH@
5 DDRB_WE# WE# VDDQ7 WE# VDDQ7
H2 H2 82_0804_8P4R_1%
VDDQ8 H9 VDDQ8 H9 RPD13
DDRB_DQS1 F3 VDDQ9 DDRB_DQS0 F3 VDDQ9 DDRB_WE# 1 8
+VREF_CA
DDRB_DQS#1 G3 DQSL DDRB_DQS#0 G3 DQSL DDRB_RAS# 2 7
DQSL# DQSL# DDRB_CAS# 3 6
DDRB_CS0# 4 5
M8 +VREF_CA M8 +VREF_CA
DCH@
DDRB_DQS3 C7 VREFCA H1 +VREF_DQ_DIMMB DDRB_DQS2 C7 VREFCA H1 +VREF_DQ_DIMMB
82_0804_8P4R_1%
DDRB_DQS#3 B7 DQSU VREFDQ DDRB_DQS#2 B7 DQSU VREFDQ
DQSU# DQSU#
1 1
1 1
CD32 CD34
DDRB_DM1 E7 B1 DDRB_DM0 E7 B1
CD31 .047U_0201_6.3V6K CD33 .047U_0201_6.3V6K
DDRB_DM3 DML VSSQ1 DDRB_DM2 DML VSSQ1
D3 B9 .047U_0201_6.3V6K2 DCH@ D3 B9 .047U_0201_6.3V6K2 DCH@
DMU VSSQ2 D1 2 DCH@ DMU VSSQ2 D1 2 DCH@
VSSQ3 D8 VSSQ3 D8
VSSQ4 E2 VSSQ4 E2
C DDRB_CS0# L2 VSSQ5 E8 DDRB_CS0# L2 VSSQ5 E8 C
5 DDRB_CS0# L1 CS# VSSQ6 F9 L1 CS# VSSQ6 F9
NC3 VSSQ7 G1 NC3 VSSQ7 G1
VSSQ8 G9 VSSQ8 G9
VSSQ9 VSSQ9 +0.675VS
DDRB_ODT0 K1 A9 DDRB_ODT0 K1 A9
5 DDRB_ODT0 ODT VSS1 ODT VSS1 Need change to 36ohm 5%
J1 B3 J1 B3
NC1 VSS2 E1 NC1 VSS2 E1
VSS3 G8 VSS3 G8 DDRB_ODT0 1 DCH@ 2
RD99 82_0402_1%
VSS4 J2 VSS4 J2
RD21 1 DCH@ 2 240_0402_1% L8 VSS5 J8 RD23 1 2 240_0402_1% L8 VSS5 J8
L9 ZQ VSS6 M1 L9 ZQ VSS6 M1 +0.675VS
NC4 VSS7 M9 NC4 VSS7 M9
DCH@
0603 VSS8 P1 VSS8 P1
VSS9 VSS9 2
P9 P9
T2 VSS10 T1 DDRB_DRAMRST# T2 VSS10 T1 change 0.2pf Need change to 39ohm 5% CD146
5 DDRB_DRAMRST# RESET# VSS11 T9 RESET# VSS11 T9 2 0.1U_0201_6.3V6-K
VSS12 VSS12 DDRB_CLK0 1 DCH@ 2 1
RD32 82_0402_1% DCH@
DDRB_CLK0# 1 DCH@ 2
CD148 RD29 82_0402_1%
H5TC4G63AFR-PBA_FBGA96 H5TC4G63AFR-PBA_FBGA96 0.2P_0402_50V8-B
1 2
@ @ DCH@
CD227
0.1U_0201_6.3V6-K
1 @
U42 U43

DDRB_MA0 N3 E3 DDRB_DQ50 DDRB_MA0 N3 E3 DDRB_DQ33

DDRB_MA1 P7 A0 DQL0 F7 DDRB_DQ48 DDRB_MA1 P7 A0 DQL0 F7 DDRB_DQ34
DDRB_MA2 P3 A1 DQL1 F2 DDRB_DQ51 DDRB_MA2 P3 A1 DQL1 F2 DDRB_DQ32
DDRB_MA3 N2 A2 DQL2 F8 DDRB_DQ52 DDRB_MA3 N2 A2 DQL2 F8 DDRB_DQ38
DDRB_MA4 P8 A3 DQL3 H3 DDRB_DQ54 DDRB_MA4 P8 A3 DQL3 H3 DDRB_DQ36
DDRB_MA5 P2 A4 DQL4 H8 DDRB_DQ53 DDRB_MA5 P2 A4 DQL4 H8 DDRB_DQ35
DDRB_MA6 R8 A5 DQL5 G2 DDRB_DQ55 DDRB_MA6 R8 A5 DQL5 G2 DDRB_DQ37
DDRB_MA7 R2 A6 DQL6 H7 DDRB_DQ49 DDRB_MA7 R2 A6 DQL6 H7 DDRB_DQ39
DDRB_MA8 T8 A7 DQL7 D7 DDRB_DQ41 DDRB_MA8 T8 A7 DQL7 D7 DDRB_DQ57
+1.35V
DDRB_MA9 R3 A8 DQU0 C3 DDRB_DQ47 DDRB_MA9 R3 A8 DQU0 C3 DDRB_DQ58 +0.675VS
DDRB_MA10 A9 DQU1 DDRB_DQ40 DDRB_MA10 A9 DQU1 DDRB_DQ61 (10uF_0603_6.3V)*6
L7 C8 L7 C8
DDRB_MA11 R7 A10/AP DQU2 C2 DDRB_DQ43 DDRB_MA11 R7 A10/AP DQU2 C2 DDRB_DQ63
DDRB_MA12 N7 A11 DQU3 A7 DDRB_DQ45 DDRB_MA12 N7 A11 DQU3 A7 DDRB_DQ62

10U_0603_6.3V6M
DDRB_MA13 T3 A12/BC# DQU4 A2 DDRB_DQ42 DDRB_MA13 T3 A12/BC# DQU4 A2 DDRB_DQ56

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
A13 DQU5 B8 DDRB_DQ44 A13 DQU5 B8 DDRB_DQ60
DDRB_MA14 DQU6 DDRB_DQ46 DDRB_MA14 DQU6 DDRB_DQ59 1 1 1 1 1 1 1 1 1 1 1
T7 A3 T7 A3

CD182

CD185

CD187

CD184

CD183

CD186

CD178

CD177

CD179

CD180

CD181
DDRB_MA15 M7 A14 DQU7 DDRB_MA15 M7 A14 DQU7
NC5 +1.35V NC5 +1.35V
2 2 2 2 2 2 2 2 2 2 2
B2 B2
DDRB_BS0# M2 VDD1 D9 DDRB_BS0# M2 VDD1 D9 DCH@ DCH@ DCH@ DCH@ DCH@ DCH@ DCH@ DCH@ DCH@ DCH@ DCH@
DDRB_BS1# N8 BA0 VDD2 G7 DDRB_BS1# N8 BA0 VDD2 G7
DDRB_BS2# M3 BA1 VDD3 K2 DDRB_BS2# M3 BA1 VDD3 K2
B BA2 VDD4 K8 BA2 VDD4 K8 B
VDD5 N1 VDD5 N1
VDD6 N9 VDD6 N9
DDRB_CLK0 J7 VDD7 R1 DDRB_CLK0 J7 VDD7 R1

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

33P_0402_50V8J

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

33P_0402_50V8J
DDRB_CLK0# K7 CK VDD8 R9 DDRB_CLK0# K7 CK VDD8 R9
CK# VDD9 CK# VDD9 1 1 1 1 1 1 1 1 1 1 1 1

CD192

CD193

CD194

CD195

CD196

CD198

CD221

CD188

CD189

CD190

CD191

CD225
DDRB_CKE0 K9 A1 DDRB_CKE0 K9 A1
J9 CKE VDDQ1 A8 J9 CKE VDDQ1 A8 2 2 2 2 2 2 2 2 2 2 2 2
NC2 VDDQ2 C1 NC2 VDDQ2 C1
VDDQ3 C9 VDDQ3 C9 DCH@ DCH@ DCH@ DCH@ DCH@ DCH@ RF@ DCH@ DCH@ DCH@ DCH@ RF@
DDRB_RAS# J3 VDDQ4 D2 DDRB_RAS# J3 VDDQ4 D2
DDRB_CAS# K3 RAS# VDDQ5 E9 DDRB_CAS# K3 RAS# VDDQ5 E9
DDRB_WE# L3 CAS# VDDQ6 F1 DDRB_WE# L3 CAS# VDDQ6 F1
WE# VDDQ7 H2 WE# VDDQ7 H2
VDDQ8 H9 VDDQ8 H9
DDRB_DQS6 F3 VDDQ9 DDRB_DQS4 F3 VDDQ9

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

33P_0402_50V8J
DDRB_DQS#6 G3 DQSL DDRB_DQS#4 G3 DQSL
DQSL# DQSL# 1 1 1 1 1 1 1

CD197

CD199

CD200

CD202

CD201

CD204

CD222
M8 +VREF_CA M8 +VREF_CA
DDRB_DQS5 C7 VREFCA H1 +VREF_DQ_DIMMB DDRB_DQS7 C7 VREFCA H1 +VREF_DQ_DIMMB 2 2 2 2 2 2 2
DDRB_DQS#5 B7 DQSU VREFDQ DDRB_DQS#7 B7 DQSU VREFDQ
DQSU# DQSU# DCH@ DCH@ DCH@ DCH@ DCH@ DCH@ RF@
1 1
1 CD48 1
CD47 .047U_0201_6.3V6K CD54
DDRB_DM6 E7 B1 DDRB_DM4 E7 B1 CD53
.047U_0201_6.3V6K DCH@ .047U_0201_6.3V6K
DDRB_DM5 DML VSSQ1 2 DDRB_DM7 DML VSSQ1
D3 B9 DCH@ D3 B9 .047U_0201_6.3V6K2 DCH@
DMU VSSQ2 D1 2 DMU VSSQ2 D1 2 DCH@
VSSQ3 D8 VSSQ3 D8

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

33P_0402_50V8J
VSSQ4 E2 VSSQ4 E2
DDRB_CS0# VSSQ5 DDRB_CS0# VSSQ5 1 1 1 1 1 1 1
L2 E8 L2 E8

CD203

CD205

CD206

CD207

CD208

CD209

CD223
Del CS_2(chip select: 1 per Rank) L1 CS# VSSQ6 F9 L1 CS# VSSQ6 F9
Del CKE_2(chip select: 1 per Rank???) NC3 VSSQ7 G1 NC3 VSSQ7 G1
VSSQ8 G9 VSSQ8 G9 2 2 2 2 2 2 2
VSSQ9 VSSQ9
DDRB_ODT0 K1 A9 DDRB_ODT0 K1 A9 DCH@ DCH@ DCH@ DCH@ DCH@ DCH@ RF@
J1 ODT VSS1 B3 J1 ODT VSS1 B3
NC1 VSS2 E1 NC1 VSS2 E1
VSS3 G8 VSS3 G8
VSS4 J2 VSS4 J2
RD25 1 2 240_0402_1% L8 VSS5 J8 RD27 1 2 240_0402_1% L8 VSS5 J8
L9 ZQ VSS6 M1 L9 ZQ VSS6 M1

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

33P_0402_50V8J
DCH@ DCH@
NC4 VSS7 M9 NC4 VSS7 M9
VSS8 VSS8 1 1 1 1 1 1 1
P1 P1

CD211

CD213

CD210

CD212

CD214

CD215

CD224
VSS9 P9 VSS9 P9
DDRB_DRAMRST# T2 VSS10 T1 DDRB_DRAMRST# T2 VSS10 T1
RESET# VSS11 T9 RESET# VSS11 T9 2 2 2 2 2 2 2
VSS12 VSS12
DCH@ DCH@ DCH@ DCH@ DCH@ DCH@ RF_NS@
A H5TC4G63AFR-PBA_FBGA96 H5TC4G63AFR-PBA_FBGA96 A
@ @

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 DDRIII SO-DIMM B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. CGx20 0.1

Date: Tuesday, December 08, 2015 Sheet 15 of 57

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 USB Hub GL850G-OHY31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
B
CGx20 0.1

Date: Tuesday, December 08, 2015 Sheet 16 of 57

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 Blank
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
CGx20 0.1

Date: Tuesday, December 08, 2015 Sheet 17 of 57

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 VGA Notes List

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
CGx20 0.1

Date: Tuesday, December 08, 2015 Sheet 18 of 57

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 N16X_PCIE/ DAC/ GPIO
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
CGx20 0.1

Date: Tuesday, December 08, 2015 Sheet 19 of 57

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 N16X_LVDS/ HDMI/ THERM

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
CGx20 0.1

Date: Tuesday, December 08, 2015 Sheet 20 of 57

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 N16X_Power

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
CGx20 0.1

Date: Tuesday, December 08, 2015 Sheet 21 of 57

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 N16X_+VGA CORE, GND

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
CGx20 0.1

Date: Tuesday, December 08, 2015 Sheet 22 of 57

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 N16X_MEM Interface

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
CGx20 0.1

Date: Tuesday, December 08, 2015 Sheet 23 of 57

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 DDR3 VRAM Rank0_L

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
CGx20 0.1

Date: Tuesday, December 08, 2015 Sheet 24 of 57

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 DDR3 VRAM Rank0_H

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
CGx20 0.1

Date: Tuesday, December 08, 2015 Sheet 25 of 57

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 DDR3 VRAM Rank1_L

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
CGx20 0.1

Date: Tuesday, December 08, 2015 Sheet 26 of 57

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 DDR3 VRAM Rank1_H

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
CGx20 0.1

Date: Tuesday, December 08, 2015 Sheet 27 of 57

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 N16X_MISC

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
CGx20 0.1

Date: Tuesday, December 08, 2015 Sheet 28 of 57

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 Blank

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
CGx20 0.1

Date: Tuesday, December 08, 2015 Sheet 29 of 57

5 4 3 2 1
 5 4 3 2 1

UW1

RW2 1 2 6.2K_0402_1% RREF 1 24 VDD18 1U_0402_6.3V6K 2 1 CW1

USB20_N2 RW9 1 2 0_0402_5% USB20_N2_R 2 RREF V18 23
8 USB20_N2 USB20_P2 USB20_P2_R DM XD_D7
RW10 1 2 0_0402_5% 3 22
8 USB20_P2 4 DP SP14 21 SD_D2_R
+3VS CARD_3V3 3V3_IN SP13 SD_D3_R
5 20
SDREG 6 CARD_3V3 SP12 19
D 7 SDREG SP11 18 SD_CMD_R D
1 1 SD_WP XD_CD# SP10
CW2 CW3 8 17
4.7U_0402_6.3V6M 0.1u_0201_10V6K 9 SP1 GPIO0 16
SD_D1_R 10 SP2 SP9 15 SD_CLK_R
1 SD_D0_R SP3 SP8
LW1 2 2 CW4 11 14
USB20_N2 1 2 USB20_N2_R 1U_0402_6.3V6K 12 SP4 SP7 13 SD_CD#
1 2 SP5 SP6
2 25
USB20_P2 4 3 USB20_P2_R GND
4 3
EXC24CH900U_4P RTS5170-GRT_QFN24_4X4
EMC_NS@
FOR EMI

C C

SD_D0_R RW3 1 2 0_0402_5% SD_D0

CW5 1 2 5.6P_0402_50V8-D
SD / MMC
EMC@
CARD_3V3
SD_D1_R RW4 1 2 0_0402_5% SD_D1 JREAD1
CW6 1 2 5.6P_0402_50V8-D 4
VDD

0.1u_0201_10V6K
4.7U_0402_6.3V6M
EMC@ SD_D0 7
1 1 SD_D1 DAT0
8
CW9 CW17 SD_D2 9 DAT1
SD_D2_R RW5 1 2 0_0402_5% SD_D2 @ SD_D3 1 DAT2
CW7 1 2 5.6P_0402_50V8-D 2 2 CD/DAT3
SD_CD# 11
SD_WP 10 C/D
EMC@
W /P
SD_CMD
SD_D3_R SD_D3
Close to Connector SD_CLK
2
CMD
RW6 1 2 0_0402_5% 5
CW8 1 2 5.6P_0402_50V8-D CLK
B
Close to Connector 3
VSS1 GND_1
12 B
EMC@ 6 13
VSS2 GND_2
DEREN_404232501111RHF_NR
SD_CMD_R RW7 1 2 0_0402_5% SD_CMD CARD_3V3 ME@
CW11 1 2 5.6P_0402_50V8-D

AZ5123-01F.R7G_DFN1006P2X2

1
EMC@ DW1

1
SD_CLK_R RW8 1 2 0_0402_5% SD_CLK
CW12 1 2 5.6P_0402_50V8-D

2
EMC@
EMC_NS@

2
FOR ESD

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 Cardreader
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
CGx20 0.1

Date: Tuesday, December 08, 2015 Sheet 30 of 57

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 Blank
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
CGx20 0.1

Date: Tuesday, December 08, 2015 Sheet 31 of 57

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 Blank
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
CGx20 0.1

Date: Tuesday, December 08, 2015 Sheet 32 of 57

5 4 3 2 1
 5 4 3 2 1

CMOS Camera
LCD POWER CIRCUIT +3VS +3VS_CMOS
W=60mils Need short
J1 @ W=40mils
+3VS 1 2
+LCDVDD_CON 1 2
W=40 mils JUMP_43X39 1 1
U5 C3 C4
W=60mils
D 5 1 0.1u_0201_10V6K 10U_0603_6.3V6M D
IN OUT LP2301ALT1G_SOT23-3 CD@ @

33P_0402_50V8J
2 2 2

0.1u_0201_10V6K
4.7U_0402_6.3V6M
C1 1 GND Q7 3 1

D
1U_0402_6.3V6K PCH_ENVDD 4 3 C121 1 C122 2
C123
1

.01U_0402_16V7-K
EN OCB @

C6
2 EMC_NS@ 1 1

G
2 1 2

2
SY6288C20AAC_SOT23-5 C5
@
.1U_0402_10V6-K
@
2 @2

PCH_ENVDD R5 1 @ 2
{7} CMOS_ON#
4 PCH_ENVDD For RF 100K_0402_5%
1 1
1

C4936 C10
R1 0.01U_0402_25V7K For EMI .1U_0402_10V6-K
100K_0402_5% EMC_NS@ Close to R5 @
2 2
2

+3VS

+3VS
EMI request

2
R8 R9
DMIC_CLK INVT_PWM
2

100K_0402_1% 100K_0402_1% DISPOFF#

470P_0201_50V7-K

470P_0201_50V7-K
R10
PCH_ENBKL

100P_0201_25V8J
R11 1 @ 2 4.7K_0402_5% @ @

1
0_0402_5% @ C11 1 C12 1 C13 1
C V20B+ EDP_AUX
C
1

R12 1 2 0_0402_5% DISPOFF# +LEDVDD EDP_AUX#

44 BKOFF# EMC_NS@ 2 2 2
2A 80 mil R17 2A 80 mil EMC_NS@ EMC_NS@

2
R14 1 2 0_0402_5% ENBKL 2 1
4 PCH_ENBKL ENBKL 44
0_0805_5% R13 R15

4.7U_0805_25V6-K
C14

0.1U_0201_25V6-K
1

1 1 100K_0402_1% 100K_0402_1%
R16 C15
100K_0402_5% @ @

1
2 2
2

@
+3VS
2

R18
1K_0402_5% JEDP1
@ +LEDVDD 1
2 1
3 2
1

4 3
R19 1 2 0_0402_5% INVT_PWM
4 PCH_EDP_PWM CPU_EDP_TX0+ C19 1 2 0.1u_0201_10V6K EDP_TX0+ 5 4
4 CPU_EDP_TX0+ CPU_EDP_TX0- C16 EDP_TX0- 5
1 2 0.1u_0201_10V6K 6
4 CPU_EDP_TX0- 6
7
1

CPU_EDP_TX1+ C17 1 2 0.1u_0201_10V6K EDP_TX1+ 8 7

R20 4 CPU_EDP_TX1+ CPU_EDP_TX1- C18 EDP_TX1- 8
100K_0402_5% 1 2 0.1u_0201_10V6K 9
4 CPU_EDP_TX1- 9
10
CPU_EDP_AUX C20 1 2 0.1u_0201_10V6K EDP_AUX 11 10
4 CPU_EDP_AUX CPU_EDP_AUX# C21 EDP_AUX# 11
1 2 0.1u_0201_10V6K 12
2

4 CPU_EDP_AUX# 12
13
B DISPOFF# 14 13 B
C23 0.1u for G HSW panel blink issue 14
15
+3VS INVT_PWM 16 15
17 16
18 17
19 18
4 CPU_EDP_HPD 19
R21 1 @ 2 20
0_0402_5% 21 20
1 +LCDVDD_CON 21
22
W=60mils 23 22
@ C22 +3VS 23
43 DMIC_DATA 24
2 25 24
43 DMIC_CLK 25
680P_0201_25V7-K 26
27 26
R182 1 2 0_0402_5% HUSB20_P4_R 28 27
8 USB20_P4 28
R183 1 2 0_0402_5% HUSB20_N4_R 29
8 USB20_N4 29
+3VS_CMOS 30
31 30
1 G1
32
C24 G2
W=40mils DRAPH_FC5AF301-3181H
EMC_NS@
2
ME@
.047U_0201_6.3V6K

EMI request

L12
EMC_NS@
For EMI
USB20_P4 4 3 HUSB20_P4_R
4 3

USB20_N4 1 2 HUSB20_N4_R
A 1 2 A

EXC24CH900U_4P

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 eDP/ CMOS/Touch screen
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. CGx20
Date: Tuesday, December 08, 2015 Sheet 33 of 57

5 4 3 2 1
 5 4 3 2 1

+5VALW
L2 EMC_NS@ EMC_NS@
HDMI_CLK-_C 1 2 HDMI_CLK-_CON 1 2
1 2 D8
C26 3.3P_0402_50V8-C
BAT54AW_SOT323-3

1
EMC_NS@
HDMI_CLK+_C HDMI_CLK+_CON 1

2
4 3 2
4 3 C27 3.3P_0402_50V8-C RC25 RC26
EXC24CH900U_4P 0_0402_5% 0_0402_5%
@
+1.8VALW @
L3 EMC_NS@ EMC_NS@

1
HDMI_TX0-_C 1 2 HDMI_TX0-_CON 1 2
1 2 C28 3.3P_0402_50V8-C
EMC_NS@
D HDMI_TX0+_C 4 3 HDMI_TX0+_CON 1 2 D
4 3

3
4
C29 3.3P_0402_50V8-C RP9
EXC24CH900U_4P 2.2K_0404_4P2R_5%
RP10

3
4
L4 EMC_NS@ EMC_NS@ 2.2K_0404_4P2R_5%
HDMI_TX1-_C 1 2 HDMI_TX1-_CON 1 2

G2 5
1 2

2
1
C30 3.3P_0402_50V8-C
EMC_NS@

2
1
HDMI_TX1+_C 4 3 HDMI_TX1+_CON 1 2 4 S2 D2 3 HDMICLK_R
4 3 4 DDPB_CLK
C31 3.3P_0402_50V8-C
EXC24CH900U_4P
Q3401B

2
L5 EMC_NS@ EMC_NS@
HDMI_TX2-_C 1 2 HDMI_TX2-_CON 1 2 PJT138K_SOT363-6

G1
1 2 C32 3.3P_0402_50V8-C
EMC_NS@ 1 S1 D1 6 HDMIDAT_R
HDMI_TX2+_C HDMI_TX2+_CON 1 4 DDPB_DATA
4 3 2
4 3 C33 3.3P_0402_50V8-C
EXC24CH900U_4P
Q3401A
PJT138K_SOT363-6

For EMC

+1.8VALW
RP12
HDMI_CLK-_C 1 4
HDMI_CLK+_C 2 3
C +5VS C
619_0404_4P2R_1%
+5VS +5VS_HDMI_F +5VS_HDMI
RP13

2
HDMI_TX0-_C 1 4 D5 @

2
HDMI_TX0+_C 2 3 R3405 D4 2 F1
619_0404_4P2R_1% 1K_0402_1% 1 1 2
3
RP14
HDMI_TX1-_C 1 4 EMC_NS@ RB491D_SOT23-3 0.5A_6V_1206L050YRHF

1
HDMI_TX1+_C 2 3
619_0404_4P2R_1% BAT54S-7-F_SOT23-3
4 HDMI_HPD

1
RP15 D4 LP2301ALT1G_SOT23-3
HDMI_TX2-_C 1 4 1
HDMI_TX2+_C 2 3 1 3 Q32

S
1
D C34
619_0404_4P2R_1%
Q12 2 0.1u_0201_10V6K
G 2
2N7002KW_SOT323-3

G
2
1

D Q13

2
S
2 46 SUSP

3
+3VS G R41
2N7002KW_SOT323-3
100K_0402_5%
S JHDMI1
HDMI_DET 19
3

HP_DET

1
R42 1 @ 2 18
17 +5V
HDMIDAT_R 16 DDC/CEC_GND
100K_0402_5% HDMICLK_R SDA
15
14 SCL
13 Reserved
HDMI_CLK- 1 2 0.1u_0201_10V6K HDMI_CLK-_C R43 2 1 0_0402_5% HDMI_CLK-_CON 12 CEC 20
4 HDMI_CLK- C35
11 CK- GND1 21
HDMI_CLK+ C36 1 2 0.1u_0201_10V6K HDMI_CLK+_C R44 2 1 0_0402_5% HDMI_CLK+_CON 10 CK_shield GND2 22
4 HDMI_CLK+ HDMI_TX0- HDMI_TX0-_C R45 2 HDMI_TX0-_CON CK+ GND3
C37 1 2 0.1u_0201_10V6K 1 0_0402_5% 9 23
4 HDMI_TX0- D0- GND4
8
B HDMI_TX0+ 1 2 0.1u_0201_10V6K HDMI_TX0+_C R46 2 1 0_0402_5% HDMI_TX0+_CON 7 D0_shield B
4 HDMI_TX0+ C38
HDMI_TX1- 1 2 0.1u_0201_10V6K HDMI_TX1-_C R47 2 1 0_0402_5% HDMI_TX1-_CON 6 D0+
4 HDMI_TX1- C39
5 D1-
HDMI_TX1+ 1 2 0.1u_0201_10V6K HDMI_TX1+_C R48 2 1 0_0402_5% HDMI_TX1+_CON 4 D1_shield
4 HDMI_TX1+ C40
HDMI_TX2- 1 2 0.1u_0201_10V6K HDMI_TX2-_C R49 2 1 0_0402_5% HDMI_TX2-_CON 3 D1+
4 HDMI_TX2- C41
2 D2-
HDMI_TX2+ 1 2 0.1u_0201_10V6K HDMI_TX2+_C R50 2 1 0_0402_5% HDMI_TX2+_CON 1 D2_shield
4 HDMI_TX2+ C42
D2+
SINGA_2HE3Y37-000111F
ME@

D3
HDMI_DET 1 1 HDMI_DET
10 9
Close to JHDMI1 HDMIDAT_R 2 2 HDMIDAT_R
9 8
D6 D7 HDMICLK_R 4 4 HDMICLK_R
HDMI_CLK+_CON HDMI_CLK+_CON HDMI_TX1-_CON HDMI_TX1-_CON 7 7
1 1 10 9 1 1 10 9
+5VS_HDMI 5 5 6 6 +5VS_HDMI
HDMI_CLK-_CON 2 2 9 8 HDMI_CLK-_CON HDMI_TX1+_CON 2 2 9 8 HDMI_TX1+_CON

HDMI_TX0+_CON HDMI_TX0+_CON HDMI_TX2-_CON HDMI_TX2-_CON 3 3

4 4 7 7 4 4 7 7
8
HDMI_TX0-_CON 5 5 6 6 HDMI_TX0-_CON HDMI_TX2+_CON 5 5 6 6 HDMI_TX2+_CON

3 3 3 3 AZ1045-04F_DFN2510P10E-10-9
A 8 8 EMC_NS@ A

For EMC
AZ1045-04F_DFN2510P10E-10-9 For EMC AZ1045-04F_DFN2510P10E-10-9
EMC_NS@ EMC_NS@

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 HDMI_CONN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. CGx20
Date: Tuesday, December 08, 2015 Sheet 34 of 57
5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 DP to CRT Convert(IT6515FN)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. CGx20
Date: Tuesday, December 08, 2015 Sheet 35 of 57
5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 CRT
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. CGx20
Date: Tuesday, December 08, 2015 Sheet 36 of 57
5 4 3 2 1
 5 4 3 2 1

+3VALW TO +3VALW_LAN
+3VALW_LAN rising t i me ( 10 %~90 %):
+3VALW +3VALW_LAN
0.5ms＜s pec＜ 1 0 0m
s +3VALW_LAN +LAN_VDDREG
Need short
JL1 1 2 @ width : 40 mils RL1 1 @ 2 0_0603_5%
1 2
JUMP_43X79
D D
1 1
CL1 CL2

0.1u_0201_10V6K

0.1u_0201_10V6K
4.7U_0603_6.3V6K

4.7U_0603_6.3V6K
1 1 1 1 4.7U_0603_6.3V6K 0.1u_0201_10V6K
CL4 CL5 CL6 CL7 @ @
2 2

@ 2 @ 2 2 2

Close to Pin11 Close to Pin32 Close to Pin11 Close to Pin32

LAN_CLKREQ#_R RL18 2 @ 1
LAN_CLKREQ# 6
0_0402_5%
UL1

RL6 1 @ 2 0_0402_5% PCIE_WAKE#_R

40,44 LAN_WAKE#
33
C +3VALW_LAN
32 GND 16 CLK_PCIE_LAN# C
1 2 RSET 31 AVDD33 REFCLK_N 15 CLK_PCIE_LAN CLK_PCIE_LAN# 6
RL8
+LAN_VDD10 RSET REFCLK_P PCIE_PTX_C_DRX_N3 CLK_PCIE_LAN 6
2.49K_0402_1% 30 14
LAN_XTALO
29 AVDD10_1 HSIN 13 PCIE_PTX_C_DRX_P3 PCIE_PTX_C_DRX_N3 6
LAN_XTALI CKXTAL2 HSIP LAN_CLKREQ#_R PCIE_PTX_C_DRX_P3 6
28 12
+3VS +3VALW_LAN TL3 @ 1 27 CKXTAL1 CLKREQB 11 +3VALW_LAN
LAN_DISABLE# 26 LED0 NC_4 10 LAN_MDI3-
GPO NC_3 LAN_MDI3+ LAN_MDI3- 38
TL4 @ 1 25 9
+LAN_REGOUT LED1 NC_2 +LAN_VDD10 LAN_MDI3+ 38
1

24 8
RL9 RL21 +LAN_VDDREG 23 NC_6 AVDD10_0 7 LAN_MDI2-
+LAN_VDD10 22 DVDD33 NC_1 6 LAN_MDI2+ LAN_MDI2- 38
1K_0402_1% 10K_0402_5%
PCIE_WAKE#_R 21 NC_5 NC_0 5 LAN_MDI1- LAN_MDI2+ 38
LANW AKEB MDIN1 LAN_MDI1+ LAN_MDI1- 38
@ ISOLATE# 20 4
ISOLATEB MDIP1 LAN_MDI1+ 38
2

PLT_RST# 19 3 +LAN_VDD10
7,32,40,44 PLT_RST# 2 .1U_0402_10V6-K PCIE_PRX_C_DTX_N3 18 PERSTB NC_7 LAN_MDI0-
6 PCIE_PRX_DTX_N3 CL10 1 2
LAN_DISABLE# 2 .1U_0402_10V6-K PCIE_PRX_C_DTX_P3 17 HSON MDIN0 LAN_MDI0+ LAN_MDI0- 38
ISOLATE# 6 PCIE_PRX_DTX_P3 CL11 1 1
HSOP MDIP0 LAN_MDI0+ 38

PLT_RST# CL10 close to Pin18

1

RL11 CL11 close to Pin17

15K_0402_5% RTL8106E-CG_QFN32_4X4
1
@ CL34
0.1u_0201_10V6K
2

EMC_NS@
2

100M LAN
B B

LAN_XTALI For RTL8111GUL/ RTL8106EUL (SWR mode)

+LAN_VDD10
YL1 LAN_XTALO RL20 1 2 0_0805_5%

1 4 @
OSC1 GND2 +LAN_REGOUT LL1 1 2
2 3 2.2UH_NLC252018T-2R2J-N_5%
GND1 OSC2
1 @ 1 1 1 1 1 1 1 1
1 1
CL12 CL13 CL33 CL15 CL16 CL17 CL18 CL19 CL20 CL21 CL22
10P_0402_50V8J 25MHZ_10PF_7V25000014 10P_0402_50V8J 0.1u_0201_10V6K 4.7U_0603_6.3V6K 0.1u_0201_10V6K 0.1u_0201_10V6K 0.1u_0201_10V6K 0.1u_0201_10V6K 0.1u_0201_10V6K 1U_0402_6.3V6K 0.1u_0201_10V6K
2 @ 2 2 @ 2 2 2 2 2 @ 2 @
2 2 @ @ @

Close to Pin3, 8, 22, 30 Close to Pin30(Reserved)

Layout Note: LL1 must be
within 200mil to Pin24,
CL15,CL16 must be within
200mil to LL1
+LAN_REGOUT: Width =60mil
A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2013/08/05 LAN_RTL8106EUL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
CGx20 0.1

Date: Wednesday, December 09, 2015 Sheet 37 of 57

5 4 3 2 1
 5 4 3 2 1

TL1
24 1 MCT
D MCT1 TCT1 D
LAN_MDI0- 23 2 LAN_MDO0-
37 LAN_MDI0- MX1+ TD1+
DL1 LAN_MDI0+ 22 3 LAN_MDO0+
LAN_MDI2+ LAN_MDI2+ 37 LAN_MDI0+ MX1- TD1-

1
1 10
LINE1IN LINE1OUT 21 4 MCT RL17
LAN_MDI2- 2 9 LAN_MDI2- MCT2 TCT2 20_0603_5%
LINE2IN LINE2OUT LAN_MDI1- LAN_MDO1-

1
20 5 EMC@
37 LAN_MDI1- MX2+ TD2+
3 8 DL3

1
GND1 GND2

2
LAN_MDI1+ 19 6 LAN_MDO1+ PDT5061_DO-214AA
LAN_MDI3+ LAN_MDI3+ 37 LAN_MDI1+ MX2- TD2-
4 7 EMC_NS@
LINE3IN LINE3OUT 18 7 MCT

2
LAN_MDI3- 5 6 LAN_MDI3- MCT3 TCT3
LINE4IN LINE4OUT

2
LAN_MDI2+ 17 8 LAN_MDO2+
11 13 37 LAN_MDI2+ MX3+ TD3+
GND3 GND5 LAN_MDI2- 16 9 LAN_MDO2-
12 37 LAN_MDI2- MX3- TD3-
GND4 15 10 MCT
AZ3133-08F.R7G_DFN3020P10E10 MCT4 TCT4
1 1
EMC_NS@ LAN_MDI3+ 14 11 LAN_MDO3+ CL25
37 LAN_MDI3+ MX4+ TD4+ CL32 1000P_1206_2KV7-K
LAN_MDI3- 13 12 LAN_MDO3- 0.022U_0603_50V7K EMC@
1 37 LAN_MDI3- MX4- TD4- 2 2
CL24 EMC@
C
68P_0402_50V8J C
DL2 EMC@ GST5009 LF
LAN_MDI1+ 1 10 LAN_MDI1+ 2
LINE1IN LINE1OUT
LAN_MDI1- 2 9 LAN_MDI1-
LINE2IN LINE2OUT
3 8

LAN_MDI0+ 4
GND1 GND2
7 LAN_MDI0+
100M LAN CHASSIS1_GND
LINE3IN LINE3OUT
LAN_MDI0- 5 6 LAN_MDI0-
LINE4IN LINE4OUT
11 13
GND3 GND5
12
GND4 JRJ1
AZ3133-08F.R7G_DFN3020P10E10
EMC_NS@ LAN_MDO0+ 1
PR1+
LAN_MDO0- 2
PR1-
Place Close to TL1 LAN_MDO1+ 3
PR2+
EMC LAN_MDO2+ 4
PR3+
B B
LAN_MDO2- 5
PR3-
LAN_MDO1- 6
RL14 1 @ 2 0_0603_5% PR2-
LAN_MDO3+ 7
RL15 1 @ 2 0_0603_5% PR4+
LAN_MDO3- 8
RL16 1 @ 2 0_0603_5% PR4- 9
GND_1
10
GND_2

CHASSIS1_GND
Reserve for EMI go rural solution ALLTO_C100JH-10839-L CHASSIS1_GND
ME@

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2013/08/05 LAN_Transformer
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
B
CGx20 0.1

Date: Tuesday, December 08, 2015 Sheet 38 of 57

5 4 3 2 1
 5 4 3 2 1

Close to U3901
REMOTE+

C44
1
REMOTE+
Near CPU core
2200P_0201_25V7-K 1

1
D TM_SENSOR@ C46 C D
2 REMOTE- 2 Q16
100P_0201_25V8J B MMBT3904W H_SOT323-3
@ 2 E TM_SENSOR@

3
REMOTE-

REMOTE+/-_R, REMOTE1+/-, REMOTE2+/-:

Trace width/space:10/10 mil Baytrail SOC use thermal sensor to read the thermal,
Trace length:<8" Baytrail don't has PECI signal

SMSC thermal sensor +3VALW

placed near DIMM Near CPU

1
+3VS
U3901 R95
1 8 EC_SMB_CK2 13.7K_0402_1%
VDD SCL EC_SMB_CK2 44
REMOTE+ 2 7 EC_SMB_DA2
1 D+ SDA EC_SMB_DA2 44

2
C47 NTC_V2
REMOTE- 3 6
0.1u_0201_10V6K D- ALERT#

1
2 R51 2 @ 1 4 5 PH1
@ +3VS T_CRIT# GND
10K_0402_5% 100K_0402_1%_TSM0B104F4251RZ
NCT7718W _MSOP8
C C
TM_SENSOR@

2
Address 1001_100xb

2
2
R97
R96
0_0402_5%
+5VLP +5VLP 0_0402_5%
+5VLP @

1
1
HW thermal sensor

2
1 R93 R94 EC_AGND
21.5K_0402_1% 21.5K_0402_1%
C4919 @ @
0.1U_0201_25V6-K
2
1

1
@
@
U3902
1 8 TMSNS1
VCC TMSNS1
2 7 PHYST1 R4606 1 @ 2 10K_0402_5%
GND RHYST1
3 6 TMSNS2 R92 1 @ 2 0_0402_5% NTC_V2
54 EC_ON_R OT1 TMSNS2 NTC_V2 44
4 5 PHYST2 R90 1 @ 2 10K_0402_5%
OT2 RHYST2
G718TM1U_SOT23-8

over temperature threshold:

B
RSET=3*RTMH B

92+/-30C
Hysteresis temperature threshold.
RHYST=(RSET*RTML)/(3*RTML-RSET)
56+/-30C

FAN Conn

+5VS
JFAN1
R52 1 @ 2 0_0603_5% +5VS_FAN 1
2 1
44 EC_FAN_SPEED 2
1 1 44 EC_FAN_PW M 3
C50 4 3
C49 5 4
10U_0805_10V6K 0.1u_0201_10V6K 6 GND1
2 GND2
A @ @ 2 A
ACES_85205-04001
ME@

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 Thermal sensor/FAN CONN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. CGx20
Date: Saturday, December 12, 2015 Sheet 39 of 57

5 4 3 2 1
 A B C D E

Mini-Express Card(WLAN/WiMAX) +3VS_WLAN

JWLAN1
+3VS Need short +3VS_WLAN
1 @ 1
J2 1 2
1 2 3 GND1 3.3VAUX1 4
1 2 8 USB20_P3 USB_D+ 3.3VAUX2
5 6 1 @ T2
8 USB20_N3 7 USB_D- LED#1 8
JUMP_43X79
9 GND2 PCM_CLK 10
11 SDIO_CLK PCM_SYNC 12
13 SDIO_CMD PCM_IN 14
15 SDIO_DAT0 PCM_OUT 16 1 @ T3
17 SDIO_DAT1 LED#2 18
19 SDIO_DAT2 GND11 20
SDIO_DAT3 UART_WAKE UART_RX_DEBUG_R @
21 22 R256 1 2 0_0402_5%
23 SDIO_WAKE UART_RX UART_RX_DEBUG 8
SDIO_RESET

KEY E
25 PIN24~PIN31 NC PIN 24
27 26
29 28
31 30

33 32 UART_TX_DEBUG_R R257 1 @ 2 0_0402_5%

GND3 UART_TX UART_TX_DEBUG 8
35 34
6 PCIE_PTX_C_DRX_P4 37 PETP0 UART_CTS 36
6 PCIE_PTX_C_DRX_N4 PETN0 UART_RTS EC_TX_RSVD EC_TX_R
39 38 R62 1 @ 2 0_0402_5%
41 GND4 RSRVD10 40 EC_RX_RSVD R63 1 @ 2 0_0402_5% BT_OFF#
6 PCIE_PRX_DTX_P4 43 PERP0 RSRVD11 42
6 PCIE_PRX_DTX_N4 PERN0 RSRVD9
45 44
47 GND5 COEX3 46
6 CLK_PCIE_WLAN REFCLKP0 COEX2
49 48
6 CLK_PCIE_WLAN# REFCLKN0 COEX1
51 50 SUSCLK
WLAN_CLKREQ_Q# 53 GND6 SUSCLK 52 PLT_RST# SUSCLK 7
CLKEQ0# PERSTO# BT_OFF# PLT_RST# 7,32,37,44
55 54 R53 1 2 1K_0402_1%
7,44 PCIE_WAKE# 57 PEWAKE0# RSRVD/W_DISABLE#2 56 PCH_WLAN_OFF# PCH_BT_OFF# 44
GND7 W_DISABLE#1 PCH_WLAN_OFF# 44
R57 1 @ 2 0_0402_5%
37,44 LAN_WAKE#
59 58 SMB_DATA_S3_R R58 1 @ 2 0_0402_5%
RSRVD/PETP1 I2C_DATA SMB_CLK_S3_R SMB_DATA_S3 7
2 61 60 R59 1 @ 2 0_0402_5% 2
+3VS_WLAN 63 RSRVD/PETN1 I2C_CLK 62 1 SMB_CLK_S3 7
@ T4
65 GND8 ALERT 64 EC_TX_R EC_TX_R R184 1 2 0_0402_5%
RSRVD/PERP1 RSRVD6 EC_TX 44
67 66
RERVD/PERN1 RSRVD7 BT_OFF#
2

69 68 +3VS_WLAN R185 1 2 0_0402_5%

GND9 RSRVD8 EC_RX 44
R60 71 70
73 RSRVD1 RSRVD12 72
10K_0402_5% RSRVD2 3.3VAUX3

1
75 74
GND10 3.3VAUX4 R186
WLAN_CLKREQ_Q#
1

6 WLAN_CLKREQ# R61 1 2 0_0402_5% 77 76 100K_0402_5%

GND15 GND14

2
LCN_DAN05-67406-0102
ME@

3 3

4 4

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 NGFF WLAN

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
CGx20 0.1

Date: Tuesday, December 08, 2015 Sheet 40 of 57

A B C D E
 A B C D E

+USB_VCCA

LEFT SIDE USB PORT X2 C55 1 2

+
@ 220U_6.3V_M
1 1 1
C56 1 2
C4920 C1108 C1109 @ 1U_0603_25V6M
+5VALW +USB_VCCA 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
U2 2 2 2 C57 1 2
1 5 1 @ 470P_0201_50V7-K 1
IN OUT
1
C128 2
1U_0402_6.3V6K GND JUSB1
4 3 USB_OC1# 1
2 44 USB_ON# ENB OCB USB_OC1# 8 USB20_N1 USB20_N1_R VBUS
R65 1 2 0_0402_5% 2
8 USB20_N1 USB20_P1 USB20_P1_R D-
SY6288D20AAC_SOT23-5 R64 1 2 0_0402_5% 3
8 USB20_P1 D+
1 C61 4 5
GND GND1 6
1000P_0201_50V7-K GND2 7
Low Active 2A GND3 8
EMC_NS@
2 GND4
ALLTO_C107X3-10439-L
ME@

USB20_P1_R
+USB_VCCA
USB20_N1_R

AZ5425-01F_DFN1006P2E2
3

1
D11
D9

1
2 AZC199-02S.R7G_SOT23-3 2
EMC_NS@

L8 EMC_NS@
USB20_N1 1 2 USB20_N1_R

2
1 2 EMC_NS@

2
USB20_P1 4 3 USB20_P1_R
4 3

1
EXC24CH900U_4P

USB20_P0_R
D12 EMC_NS@
USB30_RX_R_N0 9 10 1 1USB30_RX_R_N0 USB20_N0_R

USB30_RX_R_P0 8 2 USB30_RX_R_P0

2
9 2
USB30_TX_R_N0 7 7 4 4 USB30_TX_R_N0 D13
AZC199-02S.R7G_SOT23-3
EXC24CH900U_4P USB30_TX_R_P0 6 6 5 5 USB30_TX_R_P0 EMC_NS@
USB30_RX_N0 2 1 USB30_RX_R_N0
2 1 3
3
USB30_RX_P0 3 4 USB30_RX_R_P0 8
3 4
L9 EMC_NS@ AZ1045-04F_DFN2510P10E-10-9

1
3 3

EXC24CH900U_4P
For EMC
USB30_TX_C_N0 2 1 USB30_TX_R_N0
2 1
+USB_VCCA
USB30_TX_C_P0 3 4 USB30_TX_R_P0
3 4 C62 1 2
L10 EMC_NS@ @ 1U_0603_25V6M

C63 1 2
L11 EMC_NS@ @ 470P_0201_50V7-K
USB20_P0 1 2 USB20_P0_R
1 2
JUSB2 ME@
USB20_N0 4 3 USB20_N0_R USB30_TX_P0 C64 1 2 0.1u_0201_10V6K USB30_TX_C_P0 R68 1 2 0_0402_5% USB30_TX_R_P0 9
4 3 8 USB30_TX_P0 StdA_SSTX+
1
EXC24CH900U_4P USB30_TX_N0 C65 1 2 0.1u_0201_10V6K USB30_TX_C_N0 R69 1 2 0_0402_5% USB30_TX_R_N0 8 VBUS
8 USB30_TX_N0 USB20_P0 USB20_P0_R StdA_SSTX-
R70 1 2 0_0402_5% 3
8 USB20_P0 D+
7
USB20_N0 1 2 0_0402_5% USB20_N0_R 2 GND_DRAIN 10
For EMC 8 USB20_N0 USB30_RX_P0
R71
USB30_RX_R_P0 D- GND_1
R72 1 2 0_0402_5% 6 11
8 USB30_RX_P0 StdA_SSRX+ GND_2
4 12
USB30_RX_N0 R73 1 2 0_0402_5% USB30_RX_R_N0 5 GND_5 GND_3 13
8 USB30_RX_N0 StdA_SSRX- GND_4
SUYIN_020053GR009M2736L
4 4

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2013/08/05 USB2.0/USB3.0 PORT (LEFT)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. CGx20
Date: Tuesday, December 08, 2015 Sheet 41 of 57

A B C D E
 A B C D E F G H

SATA HDD Conn.

FOR 14"
1 JHDD1 1

1
SATA ODD Conn.
SATA_PTX_DRX_P0 C66 1 2 0.01U_0201_10V6K SATA_PTX_C_DRX_P0 2 GND_1
6 SATA_PTX_DRX_P0 SATA_PTX_DRX_N0 SATA_PTX_C_DRX_N0 A+
6 SATA_PTX_DRX_N0 C67 1 2 0.01U_0201_10V6K 3
4 A-
SATA_PRX_DTX_N0 C68 1 2 0.01U_0201_10V6K SATA_PRX_C_DTX_N0 5 GND_2
6 SATA_PRX_DTX_N0 SATA_PRX_DTX_P0 C69 1 2 0.01U_0201_10V6K SATA_PRX_C_DTX_P0 6 B- JODD1
6 SATA_PRX_DTX_P0 7 B+ 1
GND_3 SATA_PTX_DRX_P1 14@ C70 1 2 0.01U_0201_10V6K SATA_PTX_C_DRX_P1_14 2 GND_1
6 SATA_PTX_DRX_P1 SATA_PTX_DRX_N1 SATA_PTX_C_DRX_N1_14 RX+
6 SATA_PTX_DRX_N1 14@ C71 1 2 0.01U_0201_10V6K 3
8 4 RX-
9 V33_1 SATA_PRX_DTX_N1 14@ C72 1 2 0.01U_0201_10V6K SATA_PRX_C_DTX_N1_14 5 GND_2
10 V33_2 6 SATA_PRX_DTX_N1 SATA_PRX_DTX_P1 14@ C73 1 2 0.01U_0201_10V6K SATA_PRX_C_DTX_P1_14 6 TX-
+5VS +5VS_HDD 11 V33_3 6 SATA_PRX_DTX_P1 7 TX+
Need short 12 GND_4 8 GND_3
J3 @ 13 GND_5 9 DP
1 2 14 GND_6 +5V_ODD 10 +5V_1
1 2 15 V5_1 11 +5V_2
JUMP_43X79 16 V5_2 12 MD 14
17 V5_3 13 GND_4 GND1 15
18 GND_7 GND_5 GND2
19 DAS/DSS ALLTO_C185T1-11339-L
+5VS_HDD 20 GND_8 23 ME@
21 V12_1 GND1 24
22 V12_2 GND2
V12_3
1 1 1 1 1
2 C74 C76 C75 C77 C78 ALLTO_C166FE-12239-L 2
33P_0402_50V8J 33P_0402_50V8J 0.1u_0201_10V6K 10U_0805_10V6K 10U_0805_10V6K ME@
RF@ RF@ @
2 2 2 2 2

For EMC

+5VS +5V_ODD
Need Short
J4
1 2
3 1 2 3

JUMP_43X79
10U_0805_10V6K

0.1u_0201_10V6K

@ 1 1 1 1
C4938 C4939
33P_0402_50V8J 33P_0402_50V8J
RF@ RF@
2 2 2 2
C85

C86

CD@

4 4

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 HDD/ODD CONN

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. CGx20
Date: Saturday, December 12, 2015 Sheet 42 of 57
A B C D E F G H
 5 4 3 2 1

+3.3VD +5VS +5VS

+3VS
@
RA2 1 2 0_0603_5%
2A @
RA10 1EMC@ 2 0_0603_5% +5VD +5VA RA7 1 2 0_0603_5%
2 1
LA251 2 BLM15PD600SN1D_2P

CA8
1U_0402_6.3V6K

CA7
0.1u_0201_10V6K
D D
EMC_NS@ +1.8VS

CA11
0.1u_0201_10V6K

CA15
4.7U_0603_6.3V6K

CA180
2.2U_0603_6.3V6K
2 2 1

CA178
10U_0805_10V6K

CA18
0.1u_0201_10V6K

CA19
0.1u_0201_10V6K
Close to Pin1 1 2 1 2 2
RA8 1 @ 2 0_0402_5%
+3.3VD DVDD_IO
1 1 2
2 1 1 1
CA181 CD@
1U_0402_6.3V6K
DVDD_IO
2
Close to
Pin40

41

46

26

40
+3.3VD

9
UA1

DVDD-IO

PVDD1

PVDD2

AVDD1

AVDD2
DVDD
RA11 1 @ 2 0_0402_5% LINE1_L CA41 2 1 1U_0402_6.3V6K
+1.8VS LINE1_L 22 43 SPK_L- LINE1_VREF_L RA411 2 4.7K_0402_5%
LINE1_R 21 LINE1-L(PORT-C-L) SPK-OUT-L- 42 SPK_L+
RA40 2 @ 1 0_0402_5% LINE1-R(PORT-C-R) SPK-OUT-L+ HPOUT_L RA21 1 2 47_0402_1% A_HP_OUTL_R
MICBIASB 1 RA38 2 2.2K_0402_5% LINE2_L CA182 1 2 1U_0402_6.3V6K 24 45 HPOUT_R RA20 1 2 47_0402_1% A_HP_OUTR_R
1 RA37 2 2.2K_0402_5% CA183 1 2 1U_0402_6.3V6K 23 LINE2-L(PORT-E-L) SPK-OUT-R+ 44
LINE2-R(PORT-E-R) SPK-OUT-R- LINE1_VREF_L RA421 2 4.7K_0402_5%
2 RING2_CONN HPOUT_L LINE1_R
17 32 CA42 2 1 1U_0402_6.3V6K

CA1
0.1u_0201_10V6K
RING3_CONN 18 MIC2-L(PORT-F-L)/RING HPOUT-L(PORT-I-L) 33 HPOUT_R
MIC2-R(PORT-F-R)/SLEEVE HPOUT-R(PORT-I-R)
LINE1_VREF_L HDA_SYNC_AUDIO
Close to1 Pin9 LINE1_VREF_R
31
LINE1-VREFO-L SYNC
10
HDA_BITCLK_AUDIO HDA_SYNC_AUDIO 6
30 6
LINE1-VREFO-R BCLK HDA_BITCLK_AUDIO 6
5 HDA_SDOUT_AUDIO
DMIC_DATA DMIC_DATA_R SDATA-OUT SDATA_IN RA16 2 HDA_SDIN0 HDA_SDOUT_AUDIO 6
33 DMIC_DATA 0_0402_5% 2 RA19 @1 2 8 133_0402_5%
DMIC_CLK DMIC_CLK_R GPIO0/DMIC-DATA SDATA-IN HDA_SDIN0 6
0_0402_5% 2 RA18 @1 3
33 DMIC_CLK GPIO1/DMIC-CLK 48
SPKR_MUTE# 47 SPDIF-OUT/GPIO2

6 HDA_RST_AUDIO#
HDA_RST_AUDIO# 11 PDB
RESETB
ALC3248 MONO-OUT
16

RB751V-40_SOD323-2 29 MICBIASB
EC_MUTE# DA4 1 2 @ SPKR_MUTE# 100K_0402_1% 1 RA205 2 PC_BEEP 12 MIC2-VREFO
44 EC_MUTE# +3VS PCBEEP
PLUG_IN 200K_0402_1% 2 RA204
1

C
1 JSENSE 13 7 CA2 1 2 4.7U_0603_6.3V6K C
RA35 1 @ 2 0_0402_5% RA43 14 HP/LINE1_JD(JD1) LDO3-CAP 39 CA3 1 2 4.7U_0603_6.3V6K
10K_0402_5% MIC2/LINE2_JD(JD2) LDO2-CAP 27 CA5 1 2 4.7U_0603_6.3V6K
LDO1-CAP RA471 2 2.2K_0402_5%
CA14 1 2 1U_0402_6.3V6K 37 @
CBP
2

+3VS 35
CBN
36 28 CA17 1 2 1U_0402_6.3V6K
CPVDD VREF
2
CA4 VDD_STB 20 15
DA1 VD33_STB SPDIFO/FRONT_JD(JD3)/GPIO3 34 CA36 1 2 1U_0402_6.3V6K
4.7U_0603_6.3V6K
2 1 19 CPVEE
44 BEEP# MIC_CAP
PC_BEEP1 PC_BEEP 2
1 1 @ 2 1 2 CA40 4
RA211 0_0402_5% 0.1u_0201_10V6K CA35 49 DC_DET 25
Close to Pin36 Thermal_PAD AVSS1
1

6 PCH_BEEP
3 4.7U_0603_6.3V6K 38
RA14 1 AVSS2
BAT54CW_SOT323-3 10K_0402_5%

Close to Pin19 ALC3248-CG_MQFN48_6X6

2

RA1 1 2 0_0402_5%

RA4 1 2 0_0402_5%
EMC_NS@
RA6 1 2 0_0402_5%
EMC_NS@
EMC_NS@ C230 1 2 0.1u_0201_10V6K RA9 1 2 0_0402_5%
EMC_NS@
EMC_NS@ C231 1 2 0.1u_0201_10V6K RA12 1 2 0_0402_5%
EMC_NS@
1 2 0.1u_0201_10V6K 1 2
EMC_NS@ C9 RA13
EMC_NS@
0_0402_5%
A MIC SPK_L+ SPK_L+_CONN
JSPK1
15_0402_5% 1 CD@ 2 RA32 RA30 1 EMC@ 2 BLM15PX800SN1D 1
MIC1 RA212 2 1 1K_0402_5% LINE2_L 15_0402_5% 1 CD@ 2 RA33 SPK_L- RA34 1 EMC@ 2 BLM15PX800SN1D SPK_L-_CONN 2 1
3 2
B GND GNDA 1 RA44 2 1 2.2K_0402_5% LINE1_VREF_R 4 G1 B
OUTPUT G2
Use 250mils wide trace bridging

220P_0201_25V7-K

220P_0201_25V7-K

470P_0201_50V7-K

470P_0201_50V7-K
2 RA213 1 2 0_0402_5%

CA29

CA30
AGND and DGND at codec GND EMC_NS@ 2 2 1 1 ACES_50273-0020N-001
CA31 CA32 ME@
NEIM1000032_2P

1 1 2 2

+3VL
RA203 1 2 0_0402_5% VDD_STB
CD@ CD@ EMC@ EMC@

To solve the background noise while combojack connecting to an

active speaker and system entry into S3/S4/S5 without analog power.
Audio Jack JHP1
RING3_CONN 3
RING3_CONN A_HP_OUTL_R 1
RING2_CONN
A_HP_OUTL_R
HDA_RST_AUDIO# A_HP_OUTR_R 5
HDA_SYNC_AUDIO PLUG_IN
DMIC_CLK HDA_SDOUT_AUDIO
RA27 1 EMC_NS@ 2 HDA_BITCLK_AUDIO PLUG_IN 6
DMIC_DATA 27_0402_5% HDA_SDIN0 7
AZ5425-01F_DFN1006P2E2

AZ5425-01F_DFN1006P2E2

AZ5425-01F_DFN1006P2E2

AZ5425-01F_DFN1006P2E2

AZ5425-01F_DFN1006P2E2
A_HP_OUTR_R 2 G1
RING2_CONN
1

1
4
100P_0201_25V8J

100P_0201_25V8J

47P_0201_25V8-J
CA38

CA39

CA23

CA24

CA25

CA26
68P_0201_25V8-J

22P_0201_258J

22P_0201_258J

33P_0201_50V8-J

33P_0201_50V8-J

D1 D2 D25 D26 D27

EMC_NS@

EMC_NS@

1 1 1
1

1
C185
EMC_NS@

EMC_NS@

EMC_NS@

EMC_NS@

EMC_NS@
1 1 1 1 1

100P_0201_25V8J

100P_0201_25V8J
EMC_NS@ LOTES_AJAK00XX-P001A
CA22

1 1 ME@
2 2 2 470P_0201_50V7-K
2 2 2 2 2 R188 1 2 1 2 C181 A_HP_OUTL_R
2

2
C182 C183
0_0402_5% @ @ EMC@ EMC@
EMC_NS@

EMC_NS@

EMC_NS@

EMC_NS@

EMC_NS@

A A_HP_OUTR_R A
2

2
R189 1 2 1 2 C184 2 2
For EMI
For EMI 0_0402_5% @ @
470P_0201_50V7-K

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 P43-Codec_ALC3248

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. CGx20
Date: Saturday, December 12, 2015 Sheet 43 of 57
5 4 3 2 1
 5 4 3 2 1

RE1 0_0603_5%
1 2 +3VL

RE3 1 2 0_0603_5%
+3VALW
Same as SOC LPC power @

RE4 +3VL_EC
+3VL_EC +3VL_EC_R
1 2 0_0402_5%
+3VALW
All capacitors close to EC LE1 1 2 0_0402_5%
+3VALW RE16 1 @ 2 0_0402_5%
+1.8VALW RE6 1 2 0_0402_5% +3VL_EC
2 1

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K
@ +3VL_EC_R
2 2 2 2 2 2
RE17 1 2 0_0402_5% VFSPI CE4 CE5
+1.8VALW Close EC

1
CE6 CE7 CE8 CE9 CE10 CE11 0.1u_0201_10V6K 1000P_0201_50V7-K
LE2 1 2 0_0402_5% 1 EC_AGND 2 RE5
CE3 1 1 1 1 1 1 @ 10K_0402_5%
D D
1 2 VCOREVCC
CE23 EC_AGND
CLK_PCI VFSPI CD@

2
1 2 10P_0201_50V8F 0.1u_0201_10V6K
LAN_WAKE#
BEAD change to 0ohm LAN_WAKE# 37,40

114
121
127

106
EMC@

12

11

26
50
92

74
UE1 minimum trace width 12 mil

VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5

VFHSPI/VFSPI/VHSPI
VCC

VSTBY(PLL)

AVCC
VCORE
+3VS

EC_FAN_SPEED RE10 1 2 10K_0402_5%

EC_FAN_PWM RE11 1 @ 2 10K_0402_5%

4 24 +1.8VALW
+3VL_EC 7 KBRST# KBRST#/GPB6 PWM0/GPA0 PWR_LED# 45
5 V1P8 25
7,45 SERIRQ LPC_FRAME# 6 SERIRQ/GPM6 PWM1/GPA1 28 BATT_CHG_LED# 45 1 2 100K_0402_5%
ENBKL RE9 @
7,45 LPC_FRAME# LFRAME#/GPM5 PWM2/GPA2 BATT_LOW_LED# 45 PLT_RST#
7 29 RE67 1 2
1 2 7,45 LPC_AD3 8 LAD3/GPM3 PWM3/GPA3 30
DE1 @
7,45 LPC_AD2 LAD2/GPM2 PWM PWM4/GPA4 EC_FAN_PWM
0_0402_5%
9 31
7,45 LPC_AD1 LAD1/GPM1 PWM5/GPA5 EC_FAN_PWM 39 +5VS +3VS
10 32
RB751V-40_SOD323-2 7,45 LPC_AD0 1 2 0_0402_5% CLK_PCI 13 LAD0/GPM0 LPC PWM6/SSCK/GPA6 34 BEEP# 43
7 CLK_PCI_EC LPCCLK/GPM4 PWM7/RIG1#/GPA7 LAN_WAKE# SUSWARN# 7

2
RE8 1 2 100K_0402_5% RE53 WRST# 14 120
15 WRST# TMRI0/GPC4 124 SUSP# RE52 RE51
7 EC_SMI# PLT_RST# ECSMI#/GPD4 TMRI1/GPC6 SUSP# 46,55
1 22 V1P8 0_0402_5% 0_0402_5%
7,19,37,40,45 PLT_RST# LPCRST#/GPD2
23 V1P8 66 @
CE12 7,12 EC_SCI# 126 ECSCI#/GPD3 V1P8 ADC0/GPI0 67 PMC_PLTRST# 7
55 PCH_PWR_EN GA20/GPB5 ADC1/GPI1 BATT_TEMP NTC_V2 39

1
1U_0402_6.3V6K V1P8 68
ADC2/GPI2 BATT_TEMP 52,53 RPE3
2
IT8886HE/AX ADC ADC3/GPI3
ADC4/GPI4
69
70
RSMRST_P
VR_CPU_PWROK
46
58,59
TP_CLK
TP_DATA
2 3
71 1 4

KSI[0..7]
LQFP-128L ADC5/DCD1#/GPI5
ADC6/DSR1#/GPI6
72
73 1 @
ADP_I
CMOS_ON#
53

45 KSI[0..7] 58 ADC7/CTS1#/GPI7 IT10 PAD 2.2K_0404_4P2R_5%

KSI0
KSO[0..17] KSI1 59 KSI0/STB# 78
45 KSO[0..17] KSI1/AFD# DAC2/TACH0B/GPJ2 PMIC_EN PCH_WLAN_OFF# 40
KSI2 60 79 +5VALW
61 KSI2/INIT# DAC3/TACH1B/GPJ3 80 H_PROCHOT#_EC PMIC_EN 55
KSI3
KSI3/SLIN# DAC DAC4/DCD0#/GPJ4
C KSI4 62 81 C
+3VL_EC 63 KSI4 DAC5/RIG0#/GPJ5 PCH_BT_OFF# 40 USB_ON#
KSI5 RE15 1 2 100K_0402_5%
KSI6 64 KSI5 85 EC_RTCRST#_ON
KSI7 65 KSI6 PS2CLK0/TMB0/CEC/GPF0 86
RPE1 EC_SMB_CK1 1 36 KSI7 PS2DAT0/TMB1/GPF1 89 TP_CLK PBTN_OUT# 7
EC_SMB_CK1 EC_SMB_DA1
PAD @
IT2
KSO0
KSO0/PD0 PS2 PS2CLK2/GPF4 TP_DATA TP_CLK 45
1 4 PAD 1 @ KSO1 37 V1P8 90
2 3 EC_SMB_DA1 1 IT3
KSO2 38 KSO1/PD1 Int. K/B V1P8 PS2DAT2/GPF5 TP_DATA 45
PAD @
PAD 1 @
IT4
KSO3 39 KSO2/PD2 Matrix
IT5 KSO3/PD3
2.2K_0404_4P2R_5% PAD 1 @ KSO4 40 96
IT6 41 KSO4/PD4 HSCE#/GPH3/ID3 97 EC_SPI_CS0# 6
KSO5
RPE4 KSO5/PD5 HSCK/GPH4/ID4 EC_SPI_CLK 6
EC_SMB_CK0
KSO6 42
KSO6/PD6 EXTERNAL SERIAL FLASH HMISO/GPH5/ID5
98
EC_SPI_D1 6
1 4 KSO7 43 99
2 3 EC_SMB_DA0 KSI7 PAD 1 @ KSO8 44 KSO7/PD7 FDIO3/DSR0#/GPG6 PCH_SPI_D3 6 +3VL_EC
IT7 KSO8/ACK#
KSI6 PAD 1 @ KSO9 45 101 SUSP# RE18 1 @ 2 100K_0402_5%
1 IT8 46 KSO9/BUSY FSCE# 102 PCH_SPI_CS0# 6
2.2K_0404_4P2R_5% WRST# PAD @ KSO10
+3VS IT9 KSO10/PE FMOSI PCH_SPI_D0 6
KSO11 51
KSO11/ERR# SPI Flash ROM FMISO
103
PCH_SPI_D1 6
SUSP# RE19 1 2 100K_0402_5%
KSO12 52 105
KSO12/SLCT FSCK PCH_SPI_CLK 6
RPE2
EC_SMB_CK2
For factory EC flash KSO13 53
KSO13
SYSON RE21 1 2 100K_0402_5%
1 4 KSO14 54
2 3 EC_SMB_DA2 KSO15 55 KSO14
KSO16 56 KSO15 17 EC_TX
KSO16/SMOSI/GPC3 TXD/SOUT0/LPCPD#/GPE6 EC_RX EC_TX 40 SYS_PWROK
2.2K_0404_4P2R_5%
KSO17 57
KSO17/SMISO/GPC5
UART V1P8
RXD/SIN0/PWUREQ#/BBO/SMCLK2ALT/GPC7
16
EC_RX 40
RE12 1 2 100K_0402_5%
V1P8
EC_SMB_CK1 115 82
52,53 EC_SMB_CK1 EC_SMB_DA1 SMCLK1/GPC1 EGAD/GPE1 SYS_PWROK 5,7
to charge ,battery 52,53 EC_SMB_DA1 EC_SMB_CK2
116
SMDAT1/GPC2
V1P8
EGCS#/GPE2
83
EC_MUTE# 43
117 V1P8 84
20,39 EC_SMB_CK2 EC_SMB_DA2 SMCLK2/PECI/GPF6 EGCLK/GPE3 PCH_ME_PROTECT 12
to thermal sensor 20,39 EC_SMB_DA2 EC_SMB_CK0
118
SMDAT2/PECIRQT#/GPF7
V1P8
87 V1P8 77 GPG2
46 EC_SMB_CK0 EC_SMB_DA0 88 SMCLK0/GPF2 V1P8
SM Bus SSCE0#/GPG2 110 ON/OFF
For PMIC 46 EC_SMB_DA0
95 SMDAT0/GPF3 V1P8 GPIO
PWRSW/GPB3 ON/OFF 45
6 EC_SPI_D3 94 HDIO3/GPJ1 V1P8 RTC_RST# 7
change from GPJ2 6 EC_SPI_D2 TACH2/HDIO2/GPJ0

1
BKOFF# 113 V1P8 107 NOVO# 45 QE3 D
33 BKOFF#
123 CRX0/GPC0 GPE4/BTN# 119 change from GPJ0 for cost down EC_RTCRST#_ON 2
33 DDR_CORE_PWROK CTX0/TMA0/GPB2 CRX1/SIN1/SMCLK3/GPH1/ID1
V1P8 ENBKL 33 G
RE27
+3VL 1 2 0_0402_5% 112
VSTBY0

1
100 2N7002KW_SOT323-3 S
6 PCH_SPI_D2 FDIO2/DTR1#/SBUSY/GPG1/ID7

3
125 76 RE50 @
B SSCE1#/GPG0 CLKRUN#/GPH0/ID0 EC_ON_GPIO EC_RSMRST# 7 RE57 B
SYSON 122 WAKE UP 48 1 2 0_0402_5% 100K_0402_5%
55 SYSON 21 CTX1/SOUT1/SMDAT3/GPH2/ID2 TACH1A/TMA1/GPD7 47 EC_FAN_SPEED EC_ON 54,55
7 PM_SLP_S4# V1P8 EC_FAN_SPEED 39 @
18 RI2#/GPD1 V1P8 TACH0A/GPD6 19
7 PM_SLP_S3# RI1#/GPD0 L80HLAT/BAO/GPE0 CAPS_LED# 45

2
V1P8 V1P8 20
USB_ON# L80LLAT/GPE7 NUM_LED# 45
33 V1P8 108 ACIN#
LED_KB_PWM need update if 41,45 USB_ON#
35 GINT/CTS0#/GPD5 AC_IN#/GPB0 109 LID_SW#
{53} ACOFF RTS1#/GPE5 LID_SW#/GPB1 LID_SW# 45 EC_ON
support KB Backlight! 6 EC_SPI_D0
93
HMOSI/GPH6/ID6 V1P8 XLP_OUT/GPB4
111 RE58 2
@
1 0_0402_5%

RE29 1 2 0_0402_5% 2 GPIO

+3VL 7,37,40 PCIE_WAKE# GPJ7
3
58,59 EC_VR_ON GPH7
128
7 AC_PRESENT GPJ6 1 2 0_0402_5%
RE34
AVSS
VSS1
VSS2
VSS3
VSS4

VSS5

change from GPE4 53,58,59 VR_HOT# H_PROCHOT# 7,55

1
RE35 1 @ 2 10K_0402_5% ON/OFF IT8886HE-AX_LQFP128_14X14 QE1 D 1
104
27
49
91

75

H_PROCHOT#_EC
1

2
RE36 1 @ 2 10K_0402_5% BKOFF# G CE14
47P_0201_25V8-J
RE38 1 @ 2 10K_0402_5% LID_SW# 2N7002KW_SOT323-3 S 2
@

3
RE40 1 2 10K_0402_5% BKOFF# EC_AGND
+3VL

PM_SLP_S3#
PM_SLP_S4#

1
RE42
EMC Request
1000P_0201_25V7K

1000P_0201_25V7K

100K_0402_5%
+3VL_EC +3VS @ SYSON
EMC_NS@

EMC_NS@

1 1
+3VL_EC
C4934

C4935

BATT_TEMP @ CE16 RE66

2
1 2 100P_0201_25V8J ACIN# 1 2
7 ACIN#
0_0402_5%

0.1u_0201_10V6K
2 2

1
RE44 1 2 10K_0402_5% GPG2 ACIN# @ CE17 1 2 100P_0201_25V8J 2
0.1u_0201_10V6K

1
1 1 D RE65
@
RE46 1 2 10K_0402_5% GPG2 ON/OFF @ CE18 1 2 1U_0402_6.3V6K 2 10K_0402_5% CE13
G ACIN 53
A CE21 CE19 A
@ 0.1u_0201_10V6K QE2 1 EMC_NS@

2
2 2 @ S 2N7002KW_SOT323-3
EC_ON_GPIO

3
+3VL @
when mirror, GPG2 pull high For ESD
LID_SW# PLT_RST#
when no mirror, GPG2 pull low NOVO#

1 ACIN change to hign active to cost QE2

1 1 1
CE20
0.1u_0201_10V6K CE22 C48 CE1 Title
2 0.1u_0201_10V6K 0.01U_0201_10V6K 220P_0201_25V7-K Security Classification LC Future Center Secret Data
2 @ 2@ 2 EMC@
Issued Date 2015/10/08 Deciphered Date 2015/03/23 EC ITE8586LQFP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
CGx20 0.1

Date: Thursday, December 10, 2015 Sheet 44 of 57

5 4 3 2 1
 5 4 3 2 1

ON/OFF switch +3VL +3VALW

NOVO_BTN#
K/B Connector

2
R82 R83
100K_0402_5% 100K_0402_5% 1 R4635 2

2
@ 0_0402_5% JKB1
SW5 KSI[0..7]
KSI[0..7] 44

1
32 33
NOVO# 2 KSO[0..17] ON/OFFBTN# 31 32 GND1 34
44 NOVO# KSO[0..17] 44 NUM_LED# 30 31 GND2
EVQP7L01K SPST
1 NOVO_BTN# 44 NUM_LED# 1 2 PWR_NUM_LED 30
+3VS R87 29
300_0402_5% KSO17 28 29
28

4
ON/OFF R85 1 @ 2 0_0402_5% 3 KSO16 27
D15 KSI1 26 27
BAT54CW_SOT323-3 KSI7 25 26
@ 24 25
check based on 14',15' KSI6
KSO9 23 24
D D
keyboard pindefine KSI4 22 23
22
+3VL +3VALW KSI5 21
KSO0 20 21
KSI2 19 20
19

2
KSI3 18
R114 R111 KSO5 17 18
100K_0402_5% 100K_0402_5% KSO1 16 17
@ KSI0 15 16
KSO2 14 15
1 14

1
KSO4 13
ON/OFF R119 2 @ 1 0_0402_5% ON/OFFBTN# KSO7 12 13
44 ON/OFF 12
KSO8 11
KSO6 10 11
CAPS_LED# +3VS KSO3 9 10
KSO12 8 9
KSO13 7 8
NOVO_BTN# 7

1
ON/OFFBTN# KSO14 6
D28 R84 KSO11 5 6

1
300_0402_5% KSO10 4 5
AZ5123-01F.R7GR_DFN1006P2X2 4
KSO15 3
CAPS_LED# 2 3
EMC@
44 CAPS_LED# PWR_CAPS_LED 2

2
1

1
1
1

2
D20 D21 JPWR
1

1 SHORT PADS
AZ5123-01F.R7GR_DFN1006P2X2 AZ5123-01F.R7GR_DFN1006P2X2

2
@ CVILU_CF32321D0RONH

2
EMC@ EMC@ ME@
2

2
2

For EMC

+5VS TP_PWR TP_CLK

TPM
R160 1 @ 2
TP/B Connector TP_DATA
Hall Sensor

2
C +3VS 0_0402_5% JTP1 ME@ C
8 DT1
R141 1 2 6 GND2 7
0_0402_5% TP_CLK 5 6 GND1
44 TP_CLK TP_DATA 4 5 +3VS
44 TP_DATA TP_P4 4
.1U_0402_10V6-K

3 +3VS_TPM
1 TP_P5 3
@ 1 @ 1 2 1A RTPM1 1 TPM@ 2 0_0603_5%
TP_P6 2
100P_0402_50V8J

100P_0402_50V8J

1
1
2 1 1 1
ACES_50503-0060N-001 CTPM4 CTPM1 0.1u_0201_10V6K
C114

2 2 0.1u_0201_10V6K 10U_0603_6.3V6M CTPM3

C115

C116

EMC_NS@ AZC199-02S.R7G_SOT23-3 TPM@ TPM@ TPM@

2 2 2

1
For EMC

1
+3VS_TPM
TP_LEFT Button TP_P5 U14
C1105
0.01U_0201_10V6K UTPM1 TPM@
1 2 1 24
GND 2 NC_1 VDD3 10
1 LID_SW# NC_2 VDD1
C1104 3 3
OUTPUT LID_SW# 44 NC_3
1

6 VDD SW1
0.01U_0201_10V6K 7
PP LPCPD#
28
27
RTPM2 1 TPM@ 2
SERIRQ_TPM RTPM5
4.7K_0402_5%
1 TPM@ 2 0_0402_5%
A

GND1
A1

SERIRQ 7,44
EVQPLHA15_4P

2 +VCC_LID 2 SERIRQ LPC_AD0_TPM

1

1
+3VL 1 @ 2 6 26 RTPM6 1 TPM@ 2 0_0402_5%
VCC NC_4 LAD0 LPC_AD1_TPM LPC_AD0 7,44
DT2 R262 0_0402_5% D17 9 23 RTPM7 1 TPM@ 2 0_0402_5%
LPC_AD1 7,44
1

1
NC_7 LAD1 LPC_FRAME#_TPM
5 CLK AZ5123-01F.R7GR_DFN1006P2X2 AH9247-W-7_SC59-3 AZ5123-01F.R7GR_DFN1006P2X2
4 LFRAME#
22
20 LPC_AD2_TPM
RTPM8 1 TPM@ 2
1 TPM@ 2
0_0402_5%
LPC_FRAME# 7,44
GND2

RTPM9 0_0402_5%
GND_1 LAD2 LPC_AD3_TPM LPC_AD2 7,44
EMC_NS@ EMC_NS@ 11 17 RTPM10 1 TPM@ 2 0_0402_5%
B1

+3VS_TPM GND_2 LAD3 LPC_AD3 7,44

B

18
GND_3 +3VS_TPM
4 DAT 25
2

2
GND_4
3

5 21
NC_5 LCLK CLK_PCI_TPM 7
2

2
8 19
12 NC_6 VDD2 15 RTPM4 1 TPM@ 2 0_0402_5%
NC_8 CLK_RUN#
3 GND TP_RIGHT Button TP_P6 For EMC
13
14 NC_9
NC_10 LRESET#
16
PLT_RST# 7,19,37,40,44

2 TP-L Z32H320TC_TSSOP28
1

B SW3 B
A

GND1
A1

EVQPLHA15_4P

1 TP-R DT4
1

AZ5123-01F.R7GR_DFN1006P2X2
GND2

EMC_NS@
B1
B

2
3

For 14" For 15"

PWR_LED# LED1 1 2 R142 1 2 1.5K_0402_5%

LED 44 PWR_LED# +5VALW
1

D16 LTW-C193TS5
AZ5425-01F_DFN1006P2E2
1

EMC_NS@
2
2

BATT_LOW_LED# LED2 1 2 R143 1 2 470_0402_5%

44 BATT_LOW_LED# +3VALW
LTST-C193KFKT-LC
1

D18
AZ5425-01F_DFN1006P2E2
1

EMC_NS@
2

A A
2

BATT_CHG_LED# LED3 1 2 R144 1 2 1.5K_0402_5%

44 BATT_CHG_LED# +5VALW
LTW-C193TS5
1

D19
AZ5425-01F_DFN1006P2E2
1

EMC_NS@ Title
Security Classification LC Future Center Secret Data
Issued Date 2015/10/08 Deciphered Date 2015/03/23 KBD/PWR/IO/LED/TP Conn.
2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
2

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Re v
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. CGx20
Date: Friday, December 11, 2015 Sheet 45 of 57
5 4 3 2 1
 A B C D E

+5VALW to +5VS +5VALW

+3VALW to +3VS Enable:
VIH=1.2V~5.5V
+5VLP +5VALW
1 VIL=0~0.5V
Need Short +5VS
C4913
CD@ 1U_0402_6.3V6K U4 J11 @
2

1
1 14 1 2 1
2 IN1_1 OUT1_2 13 1 2 C4915 R162 R163 +0.675VS
IN1_2 OUT1_1 JUMP_43X118 0.1u_0201_10V6K 100K_0402_5% 100K_0402_5%
R263 1 2 0_0402_5% 3 12 5VS_CT1
SUSP#
EN1 CT1 2
@ @
+1.15VA Need short +1.15VA_SOC

1
2

2
4 11 R159 J9 @
VBIAS GND SUSP 47_0603_5% 1 2
+3VS_PWREN# 3VS_CT2 34 SUSP 1 2
R264 1 2 0_0402_5% 5 10 +3VS @
+3VALW EN2 CT2 J12 @
JUMP_43X79

2
1 1
6 9 1 2 1 1
7 IN2_1 OUT2_2 8 1 2 C215
IN2_2 OUT2_1

1
1 JUMP_43X118 0.1u_0201_10V6K Q4610 D D Q4611 C216
15 @ 2 2 SUSP 0.1u_0201_10V6K
GPAD Need Short 2 44,55 SUSP# G G 2
C4914 @
CD@ 1U_0402_6.3V6K G5016KD1U_TDFN14_2X3
2 S 2N7002KW_SOT323-3 S
5VS_CT1 3VS_CT2 2N7002KW_SOT323-3

3
@
1 1
C4917 C4918
2200P_0201_25V7-K 2200P_0201_25V7-K
2 2

+3VALW +3VALW_SOC

J14 +1.5VS is 1.8V voltage rail

JUMP_43X39 @
(CPU HD Audio Rail support 1.8V, Codec also Support 1.8V)
2 1 2 2
1 2 +1.8VA +1.8VS +1.8VS

1
JUMP_43X39 @
Q4622 3 1 J13 R4628
S

D
LP2301ALT1G_SOT23-3 1 2 47_0603_5%
1 2 @
C101 C102

1U_0402_6.3V6K
10U_0603_6.3V6M

1
1
G

1
2

2
RV1015
470_0603_5%

1
+5VALW @ 3 1Q4620 D Q4621

D
R4630 2 2 2 SUSP
1
2 +1.8VA_PG#

1
R4631 1 1 2 G
20K_0402_5% C4926 LP2301ALT1G_SOT23-3 C4927

G
2
1
0_0402_5% 1 D Q4624 10U_0603_6.3V6M 4.7U_0402_6.3V6M S
+1.8VA_PG# 2N7002KW_SOT323-3

3
C100 2 2
1

D 0.1U_0201_25V6-K G @
55 +1.8VA_PG +1.8VA_PG 2 Q4623 @ SUSP
G 2 S 2N7002KW_SOT323-3

3
@
S
3

2N7002KW_SOT323-3

R4627
+1.8VA_PG 1 2
RSMRST_P 44
+3VL
1

0_0402_5%
C4928
1U_0402_6.3V6K +3VL
2

3 3
@
08/14

4
3
RPC33
For new PMIC
@ 100K_0404_4P2R_5%

5
G
1
2
+1.8VA +1.8VALW @

@ PMIC_SMB_CLK0 4 3

S
55 PMIC_SMB_CLK0 EC_SMB_CK0

D
J15
AON7408L 1 2
1 2 Q4619B
VDS=30V VGS=20V, ID=20A,
Rds=18mohm @ VGS=10V 2N7002KDWH_SOT363-6
JUMP_43X39

2
VGS(th)=3V Max Q4628

G
R4625 2 1 0_0402_5%
1
5 S1 2 @
AON7408L D S2 PMIC_SMB_DAT0
3 1 6
+1.8VALW/940mA Rdson<34mohm

S
S3 55 PMIC_SMB_DAT0 EC_SMB_DA0

D
G

1U_0402_6.3V6K
10U_0603_6.3V6M

10U_0603_6.3V6M

470_0603_5%

AON7408L_DFN8-5 Q4619A
4

2N7002KDWH_SOT363-6
V20B+ 1 1 1
R4629

C104 C103 C105

@ R4624 2 1 0_0402_5%
R4634 @
1 2 R4633 +1.8VA_PG#_H 1 2 2 2 2
2

100K_0402_5%
0_0402_5%
1

D 1@
+1.8VA_PG#
1

2 Q4627 R4632 C106 D Q4626

G 2 +1.8VA_PG#
120K_0402_5% 0.1U_0201_25V6-K
G
S 2
3

2N7002KW_SOT323-3 S @
3

2N7002KW_SOT323-3
4 4

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 DC V TO VS INTERFACE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
CGx20 0.1

Date: Tuesday, December 08, 2015 Sheet 46 of 57

A B C D E
 5 4 3 2 1

B2 A2
D
+3VLP PCH_PWR_EN# 1 D

PU704,+3VALW_SOC

V
V
AC A1
MODE VIN 3
A2 A4 B5 RSMRST_P

V V
PU401

V
2 +3VALW_SOC
PU301

V
B+
+3VALW
BATT BATT V V
MODE

V V V
B1
4
PCH_RSMRST#
EC
5 PBTN_OUT#

EC_ON SOC
A3 B4 other Device
PM_SLP_S3#
PM_SLP_S4# 6
PLTRST# 13

V
11
DDR_CORE_PWROK

V V
C C

B3 12
SYS_PWROK

V
ON/OFF V
NOVO

PXS_PWREN
(DIS)
Vb
+VGA_CORE
+1.35V

V
9 VR_REDY SYSON 7 PU910
PU501

V
DGPU_PWROK
PXS_PWREN
8 Va (DIS)
U4 +1.35VGS

V
PU907 VR_ON

V
+5VS QV14
V

PU903

V
+CPU_CORE
+GFX_CORE

B U4 B
+1.05VGS

V
+3VS

V
SUSP# PU603
10 GPU

V
PU704

V
+1.5VS
+3VG_AON

V
QV11

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 Power sequence Block
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. CGx20
Date: Tuesday, December 08, 2015 Sheet 47 of 57
5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 Virtual symbol

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
CGx20 0.1

Date: Tuesday, December 08, 2015 Sheet 48 of 57

5 4 3 2 1
 5 4 3 2 1

D H1 H2 H3 H4 H5 H6 H7 H8 H9 NH3 D
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA NH1 NH2 HOLEA HOLEA HOLEA HOLEA
HOLEA HOLEA
1

1
CHASSIS1_GND PAD_CT8P0B6P0D2P3 PAD_CT8P0B6P0D2P3

1
1 1
PAD_C8P0D2P3 PAD_C8P0D2P3 PAD_C8P0D2P3 PAD_C8P0D2P3 PAD_C8P0D2P3 PAD_C8P0D2P3 C4940 C4941 PAD_O3P3X2P8D3P3X2P8N
PAD_C2P8D2P8N PAD_C2P8D2P8N PAD_CT8P0B6P0D2P3 22U_0603_6.3V6-M 22U_0603_6.3V6-M
EMC_NS@ EMC_NS@
2 2

H10 H12 H13 H14

HOLEA HOLEA HOLEA HOLEA
1

1
C C
PAD_CB6p0D3P7 PAD_CB6p0D3P7 PAD_CB6p0D3P7 PAD_CB6p0D3P7

PCB Fedical Mark PAD

B B
FD1 FD2 FD3 FD4 FD5 FD6
1

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/08 Deciphered Date 2015/03/23 Hole
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
B
CGx20 0.1

Date: Friday, December 11, 2015 Sheet 49 of 57

5 4 3 2 1
 5 4 3 2 1

+5VLP/ 100mA
B+
Silergy +1.05VALW / 4.4A

SY8286C CONVERTOR
+5VALW/5A
Adaptor Converter +1.8VA / 3A
D
EC_ON EN FOR SYSTEM PGOOD ALW_PWRGD D

PAGE 54
RICHTEK
CONTROLLER +1.35V / 6A
+3VLP/ 100mA
Silergy LV5075A
SY8286B +1.5VS / 500mA
Converter +3VALW/ 4A

FOR SYSTEM FOR SYSTEM LDO

EC_ON EN PGOOD ALW_PWRGD +1.24VALW / 500mA
PAGE 54 POWER

+1.15VALW / 700mA

EC_ON EN1
+0.675VS / 1A
PCH_PWR_EN EN2
O2
OZ8682LN
Battery Charger
PGOOD PG for all MOIC power rail
Switch Mode PAGE 55

PAGE 53 Onsemi
NCP81201MNTXG CPU Core/10A
QFN28_4X4
C Switch Mode C

VR_ON
SMBus EN FOR CPU Core PGOOD VGATE
PAGE 56 PGOOD_NB

Battery
Li-ion
4S1P/41WH

Onsemi
NCP81201MNTXG GFX Core/12A
QFN28_4X4
Switch Mode
VR_ON
EN FOR CPU Core PGOOD VGATE
PAGE 57 PGOOD_NB

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/08 Deciphered Date 2013/08/05 Power Diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. CGx20 0.1

Date: Wednesday, December 09, 2015 Sheet 50 of 57

5 4 3 2 1
 5 4 3 2 1

@
PJ101
2 1
2 1
VIN PR9408 maybe adjust value
JUMP_43X79 +3VL PR103 0_0603_5%
PL707 EMC_NS@ 1 2
JDCIN1 HCB2012KF-121T50_0805 @ VCCRTC
1 APDIN 1 2
1 2 PD707
PR101 0_0603_5%
GND1 3 PL708 EMC_NS@ 1 2 3
GND2 4 RTC_VCC

470P_0402_50V7K

470P_0402_50V7K
HCB2012KF-121T50_0805
GND3 5 1 2 1

1000P_0402_50V7K

1000P_0402_50V7K
GND4 6 JRTC1
GND5 7 BAT_D

1
D For EMI request 1 1 PR102 2 2 D

PC101

PC102

PC103

PC104
GND6 1 2
2
2 3 1K_0603_5% PC2
G1 BAT54CW_SOT323-3

2
HIGHS_PJSS0026-8B01H 4 change to 1K SD01310018J 1U_0402_10V6K
@ @ G2 1
ME@
EMC@ EMC@ ACES_50273-0020N-001

ME@

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/02/27 Deciphered Date 20140213 DCIN / RTC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. CGx20
Date: Wednesday, December 09, 2015 Sheet 51 of 57
5 4 3 2 1
 5 4 3 2 1
@
PJ202
2 1
2 1
VMB
JUMP_43X79
JBATT2 ME@
SUYIN_125022HB008M200ZL PL201
1 HCB2012KF-121T50_0805
1 2 1 2
9 2 3 EC_SMCA BATT+
EMC_NS@
10 GND1 3 4 EC_SMDA PL202
11 GND2 4 5 HCB2012KF-121T50_0805
12 GND3 5 6 1 2
GND4 6 7

1
EMC_NS@
7 8

1
PC201 PC202

100_0402_1%

100_0402_1%
8 1000P_0402_50V7K 0.01U_0402_25V7K

PR201

PR202

2
D D

EC_SMB_CK1 44,53

EC_SMB_DA1 44,53
PR203
1 2
+3VALW
100K_0402_1%

PR204
BATT_TEMP_IN 1 2
10K_0402_5%
BATT_TEMP 44 A/D
1

PD306
1

@
2
2

AZ5215-01F_DFN1006P2E2

C C

EC_SMCA
3

EC_SMDA Reverse PD305 For EMI request

PD305
AZC199-02S.R7G_SOT23-3
@
1

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/02/27 Deciphered Date 20140213 BATTERY CONN/OTP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
CGx20 0.1

Date: Wednesday, December 09, 2015 Sheet 52 of 57

5 4 3 2 1
 5 4 3 2 1

Change to SH000015Y00

PCMB063T-6R8MS

V20B+
P2 P3
PQ309 For EMI request BATT+ PQ303 V20B+
PQ301 PQ302 AON7408L_DFN8-5 PL302 PR316 AO4407AL_SO8
AO4407AL_SO8 SI4483ADY-T1-GE3_SO8 PR301 0.01_1206_1% 8 1
8 1 1 8 0.01_1206_1% PL710 1 4.7UH_PCMB063T-4R7MS_5.5A_20% 7 2
7 2 2 7 HCB2012KF-121T50_0805 2 LX_CHG 1 2 CHG 1 4 6 3
6 3 3 6 1 4 1 2 5 3 5
VIN 5 5 2 3

2
2 3

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K
PQ311

0.1U_0603_25V7-M
0.1U_0402_25V6

0.1U_0402_25V6
EMC@

4
@

2200P_0402_50V7K
4.7U_0805_25V6-K

4.7U_0805_25V6-K
4

4
2

2
AON7408L_DFN8-5 4.7_0805_5%

PC330

PC109

PC331
PR317

2
PC301 PC302 PC303

PC305

PC306

PC307

PC319

PC1343

PC1344

PC320
D D
PQ304 1 2 10U_0805_25V6K 10U_0805_25V6K

1 6251_SN 1

1
1

@ @ 4

0.1U_0603_25V7-M

1
1
PR302 LTA044EUBFS8TL_UMT3F-3 100P_0402_50V8J

2
200K_0402_5% PR303 @ PR304
@ @ VIN
200K_0402_1% @ PC317 1 2

PC308
PU911 2 1
2

3
2
1
2 OZ8682LN_QFN16_3X3

2 ACOFF-1
PC321 47K_0402_1%
DH_CHG

2
13 14 680P_0402_50V7K

1SS355_SOD323-2
1 P2_G2

0.47U_0603_25V6-K
HDR LX @ PR305

DISCHG_G-1
DL_CHG

2
ICHP 5 16 10K_0402_1%
ICHP LDR

2
PR312 PD301
ICHN 4 12 BST_CHG 1 2 PR306
ICHM BST
1

1
PR315 0_0603_5% 200K_0402_1%
P2-1 1 2 737_SDA 11 1 VCC PD303
44,52 EC_SMB_DA1 SDA VAC
2 PR313 RB751V-40_SOD323-2
737_SCL

1
PQ305 44,52 EC_SMB_CK1 10_0402_5% 2 10 15 VDDP 2 1 PQ308B
SCL VDDP

1
LTC015EUBFS8TL_UMT3F-3 PR340 2N7002KDWH_SOT363-6
44 ADP_I ADP_I

3
10_0402_5% 2 7 3
P2_G1

IAC IACM PC315 D PD302

IACM IAC IACM 5PACIN_N 1 2 PACIN_P
CHARGER_GND 4.7U_0603_10V6-K
3

2
2
1
0_0402_5% 2 1 PR341 2 8 2 IACP G
IACP PC318 PC334 0_0402_5% COMP IACP

BASE
2N7002KDWH_SOT363-6

1SS355_SOD323-2
100P_0402_50V8J 0.47U_0402_25V6K VDDP 1 2 6 9 PACIN 1 2 ACIN 44
S
VDDA ACAV

4
6

PQ307A D PR327

1
2 PR307 PR342 10K_0402_1%

17

6
68K_0402_1%

1M_0402_5%
G 100_0402_5% PC333 D

1
CHARGER_GND PR343 PC313 2 PACIN

PR347
1U_0603_25V6M

2
S 100K_0402_5% PC332 PC324 0.1U_0603_25V7-M G
1

CHARGER_GND 1000P_0402_25V7-K 0.1U_0603_25V7-M

2
ICHP @ S PQ308A

1
2N7002KDWH_SOT363-6
P2-2

ICHN
3

PR309 D PQ307B PJ711

PACIN 1 2 5 2N7002KDWH_SOT363-6 1 2
G
PACIN_G

47K_0402_1% JUMPER
C S @ C
4

CHARGER_GND
1

PR314 PQ315 D
1 2 ACOFF-1 2
44 ACOFF G
0_0402_5% VIN
S 2N7002KW_SOT323-3
3
1

PR349
1M_0402_5%

2
PD706
2

1SS355_SOD323-2

2 1
PR308
20_0603_5%

1
VCC

1
PC314
0.47U_0603_25V6-K

2
B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/02/27 Deciphered Date 20140213 CHARGER

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. CGx20
Date: Wednesday, December 09, 2015 Sheet 53 of 57
5 4 3 2 1
 5 4 3 2 1

V20B+
@

2
PJ401
1
1.5A +3VIN
2 1

1M_0402_5%
0.1U_0402_25V6
D D

1
PC403

PR401
10U_0805_25V6K
JUMP_43X79 +3VBS 1 2

PC401

PC402
2

2
0.1U_0603_25V7-M

1
@ 21 +3VALW

IN5

IN3

IN2

IN1

BS
EMC_NS@ GND4
+3VLX 6
LX LX3
20
PL401
@
PJ402
5A
7 19 +3VLX 1 2 +3VALW_P 2 1
GND1 LX2 2.2UH_PCMB063T-2R2MS_8A_20% 2 1

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
8 18
100mA +3VLP
GND2 GND3

1
JUMP_43X79
+3V_PWRGD 9 17 PR403

PC404

PC405

PC406

PC407
PG LDO 4.7_0805_5%

2
10 16 EMC_NS@
NC1 NC3

1
OUT

1 2
NC2
EN2

EN1
PC409

FF
4.7U_0603_6.3V6K

2
SY8286BRAC_QFN20_3X3 PC410
PTP401

+3VIN 11

12

13

14

15
PU401 680P_0402_50V7K

2
PAD EMC_NS@

+3VALW_P
PR402 PR414
1 2 EC_ON_R 1 2

+3VFB
44,55 EC_ON 0_0402_5% 0_0402_5%

0.1U_0402_25V6
@
PC411
1

1
PR405

PC408

1M_0402_5%
39 EC_ON_R 1 2 1 2

PR404
2

1000P_0402_25V7-K 1K_0402_1%

2
C C

+3VL
+3VLP @
PJ404
2 1
2 1

JUMP_43X39

+3VALW

2
PR406
100K_0402_5%
PR407 @
+3V_PWRGD

1
1 2
ALW_PWRGD 55
V20B+ 0_0402_5% @
@
PU402
2
PJ405
1
2.5A 5V_VIN 5 9 +5V_PWRGD 1
PR408
2
2 1 4 IN1 PG 1 +5VBS 1 2
10U_0805_25V6K

10U_0805_25V6K
0.1U_0402_25V6

IN2 BS
+5VALW
1

3 PC415 0_0402_5% @
SH000011200 in BOM
PC413

PC414

JUMP_43X79 2 IN3 0.1U_0603_25V7-M

PC412

IN4
LX1
6 3.3UH_PCMB063T-3R3MS_6.5A_20%
5A
2

7 19 PL402 PJ406
8 GND1 LX2 20 +5VLX 1 2 +5VALW_P 2 1
18 GND2 LX3 2 1

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
GND3

1
EMC_NS@ 21 PR413
GND4 +5VALW_OUT1 2+5VALW_P

1
PR409 14 PR410 JUMP_43X79
EC_ON_R 1 2 +5VALW_EN 12 OUT 0_0402_5% 4.7_0805_5%

PC417

PC418

PC419

PC420
0_0402_5% 5V_VIN 11 EN1 13 +5VFB EMC_NS@ @
EN2 FF

2
B B
100mA

2
15
10 LDO +5VLP
NC1 +5V_VCC

1
16 17
1M_0402_5%

NC2 VCC
4.7U_0603_6.3V6K
1

PC423
1

680P_0402_50V7K
PR411

PC422
1U_0603_25V6M

SY8286CRAC_QFN20_3X3 2
1

@ PC421 EMC_NS@
2

0.1U_0402_25V6
PC430
2

PC424 PR412
1 2 1 2

1000P_0402_25V7-K 1K_0402_1%

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/08 Deciphered Date 2013/08/05 PWR_3VALW/5VALW

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
CGx20 0.1

Date: Wednesday, December 09, 2015 Sheet 54 of 57

5 4 3 2 1
 A B C D

PMIC_VCC
1 1

PR1
0_0402_5%
1 2
@

PR9478
+5VALW 0_0402_5%
1 2
EC_ON 44,54
PR9477 PMIC_VCC
1 2 PR9473
10_0603_5% 0_0402_5%
+5VLP @ 1 2
ALW_PWRGD 54
@
PR2 1 2 0_0402_5% +DDR_S5
44 SYSON PR3 PR9476
1 2 0_0402_5%
PR4 1 2 0_0402_5% +DDR_S3 10_0603_5% 1 2PCH_PWR_EN
44,46 SUSP# @
PR6

0.1U_0402_10V7K
2.2U_0603_6.3V6K
PR9474 1 2 0_0402_5% 1P05VA_EN +1.35V_B+ 1 2 @ 1 2
44 PCH_PWR_EN PMIC_EN 44
10_0402_5% PR9482 @

0.1U_0402_25V6
1

1
PC1

PC3
PC1335
PR9475 1 2 0_0402_5% 1P8VA_EN 0_0402_5%

2
0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K
+1.8VA_PG PR9471 1 2 0_0402_5% +1.24VA_EN

28

27

41
2 0_0402_5% +1.15VA_EN PU1

9
PR9472 1

VCC

PMIC_EN
VSYS

GND
PC7 +1.24VA_EN 29 25 PMIC_SMB_DAT0

PC8
PC1333

PC1332

PC1331

PC1330

EN_LDO1 SDA PMIC_SMB_DAT0 46

1

1
+1.15VA_EN 1 26 PMIC_SMB_CLK0
EN_LDO2 SCL PMIC_SMB_CLK0 46
2 @ 2
1P05VA_EN PMIC_ALERT#
2

@ @ @ @ @ @ 2 11 24 PR12 1 2 0_0402_5%
EN_V1P0A T_ALERT_B H_PROCHOT# 7,44
1P8VA_EN 16 22 +1.05VA_PG
EN_V1P8A POK_V1P0A
+DDR_S5 31 21 +1.8VA_PG
EN_VDDQ POK_V1P8A
+5VALW +DDR_S3 VDDQ_PGOOD
+1.05VA
+3VALW 36 23
EN_VTT POK_VDDQ
@ PL1 PR9467 2 1 @ @
5A
PJ14 22U_0603_6.3V6-M 12 LX_1P0 0_0402_5% VNN_SENSE 7 PJ20
1 2 7 LX_V1P0A_12 13 1 2 +1.05VS_P 2 1
1 2 VIN_V1P0A_7 LX_V1P0A_13 2 1

LV5075AGQV_VQFN40_5X5
8 14

EMC@
0.1U_0402_25V6

22U_0603_6.3V6-M

22U_0603_6.3V6-M

PC21 22U_0603_6.3V6-M

PC22 22U_0603_6.3V6-M

PC19 22U_0603_6.3V6-M

PC20 22U_0603_6.3V6-M
VIN_V1P0A_8 LX_V1P0A_14
1

1
15 0.33UH_PCMB063T-R33MS_21A_20%
PC10

PC11

PC12

PC13

PC16

PC14

PC15
PC1340
JUMP_43X39 LX_V1P0A_15 JUMP_43X79 +1.8VA
100K_0402_5%

100K_0402_5%

100K_0402_5%
1

10
VO_V1P0A
2

2
+5VALW @ @
PR13

PR14

PR15

@ @ LX_1P0 LX_1P8
17 LX_1P8
1
PJ15
2 19 LX_V1P8A_17 18 1
PL2
2 1.8VA_P 2
PJ21
1
3A
22U_0603_6.3V6-M

1 2 VIN_V1P8A_19 LX_V1P8A_18 2 1
2

2
1UH_PH041H-1R0MS_3.8A_20%
EMC@

@ +1.05VA_PG
0.1U_0402_25V6

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M
1

1
20 4.7_0805_5% 4.7_0805_5%
PC17

PC18

JUMP_43X39 VO_V1P8A_20 JUMP_43X79 PR9480 PR9479

EMC_NS@ EMC_NS@
UG_1.35V
2

2
33 @ @
+1.8VA_PG 46 UGATE_VDDQ

1 1

1 1
PC23 10U_0603_6.3V6M 38 PR9481
1 2 +1.35V_PWM VIN_VTT 32 BST_1.35V 1 2 1 2 PC24 PC1342 PC1341
BOOT_VDDQ 680P_0402_50V7K 680P_0402_50V7K
PJ504
2A 0_0603_5%
22U_0603_6.3V6-M

1 2 +0.675VSP 39 0.1U_0603_25V7-M EMC_NS@ EMC_NS@

+0.675VS 1 2 VTT LX_1.35V

2
1

34
2A @
PC25

VDDQ_PGOOD 5 PHASE_VDDQ
@ PJ501
JUMP_43X79 40 35 LG_1.35V +1.35V_B+ 2 1
VSNS_VTT LGATE_VDDQ 2 1 V20B+
2

+1.8VA

10U_0805_25V6K

10U_0805_25V6K
@ 37 +1.35V_PWM

EMC_NS@
0.1U_0402_25V6
VSNS_VDDQ

1
PR16 1 2 33K_0402_1% 30
500mA +1.24VALW JUMP_43X79

PC26

PC27

PC28
CS_VDDQ
@ @

2
PJ7 PJ408 @
3 2 1 LDO_VIN 5 6 +1.24VA_P 1 2 3

2 1 VIN_LDO1 LDO1 1 2
1

1
JUMP_43X39 JUMP_43X39

5
PC29 PC30
10U_0603_6.3V6M 10U_0603_6.3V6M +1.35V
2

2
1.15VA_P
LDO2
3 +1.15VA
4
VIN_LDO2 2 500mA UG_1.35V 4
PQ1 @
FB_LDO2
@
10A PJ502
1

PJ903 AON7408L_DFN8-5 2 1
PC31 1 2 2 1
1 2
1
10U_0603_6.3V6M JUMP_43X118
2

FB=0.75V PR17 PL3

JUMP_43X39

3
2
1
1 0.47UH_PCMB063T-R47MS_18A_20% PJ503
5.36K_0402_1% PC32 LX_1.35V 1 2 +1.35V_PWM 2 1
10U_0603_6.3V6M 2 1
2

JUMP_43X118

2
1 @

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M
1

330U_2.5V_M

1
PR18 4.7_0805_5% +

PC34

PC35

PC33
PC509

PC1336

PC1337

PC1334

PC1339

PC1338
PR509
10K_0402_1% PQ2 EMC_NS@

2
2
LG_1.35V 4
2

AON7506_DFN
@ @ @ @ @ @

1
PC512

3
2
1
680P_0402_50V7K
EMC_NS@

2
4 4

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/08 Deciphered Date 2013/08/05 PWR-SYSTEM POWER

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
CGx20 1.0

Date: Wednesday, December 09, 2015 Sheet 55 of 57

A B C D
 5 4 3 2 1

V20B+ CORE_VIN
PJ_43x79_6
PJ901
3A

470P_0402_50V7K
42.2K_0402_1%
1
D D

1
PR778

PC1091

220K_0402_5%_TSM0B224J4702RE
PR779

2
2
1 2
57 VR_IMVP_IMON
110K_0402_1%

220P_0402_50V7K

330P_0402_50V7K
1

1
75K_0402_1%

2
PR781

PH705

PC1092

PC1093
1

1
2

2
PR782
1 2 CPU_PH

210K_0402_1%

2 PR784 1+CPU_CORE
1 CSCOMP
CORE_VIN

CPU_CSREF
PC1100 change to 33P SE071330J8J

PR780 change to 23.2K SD00001NZ00

10_0402_1%
4.22K_0402_1%

CSCOMP
PR786

PR783

CSSUM

2
2 @ 1
0_0402_5% PR785 PC1097
CORE_VIN

2
32.4K_0402_1% 1000P_0402_50V7K

1
PC935 PC936 PC937

2
CPU_CSREF

10U_0805_25V6K

10U_0805_25V6K
PR787 PC1099 PC1100 PC1101

0.1U_0402_25V6
49.9_0402_1% 330P_0402_50V7K 33P_0402_50V8J 2.2U_0603_6.3V6K
PR788

2
1 2 1 2 1 2

2
1 2
+5VALW

5
PR791 PC1102 PR792 PR790
1K_0402_1% 2200P_0402_50V7K 4.02K_0402_1% 0_0603_5% PR793
23.2K_0402_1%

21
20
19
18
17
16
15
1 2 1 2 1 2 0_0402_5%
1 2

IOUT

CSREF
ILIM

CSSUM
CSCOMP

IMAX
PVCC
2
PR794 PQ903
CPU_HG 4 EMC_NS@
@ 0_0402_5% PC1103
1 2 22
ROSC VBOOT/ADDR
14 0.01U_0402_25V7K AON7408L_DFN8-5 +CPU_CORE

PR795
23
24 COMP
FB
TSENSE
LG
13
12
TSENSE
CPU_LG
1 2
PL902
10A
25 11
DIFFOUT PGND CPU_PH CPU_PH

3
2
1
7 CPU_VSS_SENSE 1 2 26 10 1 2
27 VSN SW 9 CPU_HG
0_0402_5% PC1110
VSP HG

5
C 28 8 1 2 1 2 AON7506_DFN 0.22UH_PCMB063T-R22MS_23A_20% C

VR_HOT#

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
VCC BST

VR_RDY
ENABLE
2

1
ALERT#
PC1111 @ PC1112

VRMP

1
1 2 29 PR797 0.22U_0603_25V7K PR9454

SCLK
SDIO

PC944

PC945

PC946

PC947

PC948

PC952
1000P_0402_50V7K GND 2.2_0603_5% PQ904 2.2_0805_5%
1

560P_0402_50V7-K PU907 @
CPU_LG

2
4
1
2
3
4
5
6
7

1 2
7 CPU_VCC_SENSE 1 PR798 2 NCP81201MNTXG_QFN28_4X4
PR799
0_0402_5% 1 2 PC1310
+5VALW PR800 1000P_0402_50V7K

3
2
1

2
2.2_0603_5% 1 2 @
CORE_VIN
1

PC1114 @ @
1U_0603_25V6M 1 1K_0402_1%
2

PC1115
0.01U_0402_25V7K
PR801
2

2 1 +3VALW
44,57 EC_VR_ON
2

1
1M_0402_5%

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
0_0402_5% PC1116
PR815

1
+1.8VALW .1U_0402_10V6-K PR802 + PC908

PC996

PC967

PC966

PC972
2

@ 10K_0402_5% 220U_D2_2.5VY_R6M
PR804
1

2
2 3
2

PR803 1 2
VR_CPU_PWROK 44,57
1

69.8_0402_1%
PR9450
fixed CORE abnormal start up 200_0402_1% 0_0402_5%

100K_0402_1%_TSM0B104F4251RZ
PR805
1

44,57 VR_HOT# PR810

TSENSE 2 1
2

2 1
7,57 CPU_SVID_DAT PR811
2 1 0_0402_5%
7,57 CPU_SVID_ALERT# 0_0402_5%

1
0_0402_5% PR806

PH706
7,57 CPU_SVID_CLK 13K_0402_1%
1

PR807 2

2
200_0402_1% PR808 PR809
1

301_0402_1% 200_0402_1% PC1117

+1.05VA 2.2U_0402_6.3V6M
2

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2012/09/03 Deciphered Date 2012/09/03 PWR_CPU_CORE/GFX_CORE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. CGx20 0.3

Date: Wednesday, December 09, 2015 Sheet 56 of 57

5 4 3 2 1
 5 4 3 2 1

V20B+ GFX_VIN
PJ_43x79_6

470P_0402_50V7K
PJ902

1
3A

1
PR777

PC767
41.2K_0402_1%

220K_0402_5%_TSM0B224J4702RE
PR758 1

22U_25V_M
2
1 2 +

PC905
56 VR_IMVP_IMON
110K_0402_1%

220P_0402_50V7K

330P_0402_50V7K
2

1
75K_0402_1%
D D

2
PR824

PH708

PC790

PC793
@
GFX_VIN

1
2

2
PR822
1 2 GFX_PH GFX_VIN

1
210K_0402_1% PC957 PC956

1 GFX_CSCOMP
PC955

2 PR765 1+GFX_CORE

10U_0805_25V6K

10U_0805_25V6K
1000P_0402_50V7K

2
GFX_CSREF
EMC@
fixed OCP

GFX_CSCOMP

10_0402_1%
4.99K_0402_1%

GFX_CSSUM
PR763

5
PR767

2
2 @ 1
0_0402_5% PC768 change to 33P SE071330J8J PR773 PC771

2
38.3K_0402_1% 1000P_0402_50V7K

1
PR747 change to 23.2K SD00001NZ00 PQ905
GFX_HG 4

2
GFX_CSREF

1
PR771 PC770 PC768 PC799 AON7408L_DFN8-5
49.9_0402_1% 330P_0402_50V7K 33P_0402_50V8J 2.2U_0603_6.3V6K
PR769
+GFX_CORE
1 2 1 2 1 2
PL903 12A

2
1 2
+5VALW GFX_PH

3
2
1
1
1 2
PR766 PC750 PR823 PR747
0_0603_5%

1
1K_0402_1% 2200P_0402_50V7K 4.02K_0402_1% 23.2K_0402_1% PR820 AON7506_DFN 0.22UH_PCMB063T-R22MS_23A_20%

21
20
19
18
17
16
15

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
1 2 1 2 1 2 48.7K_0402_1% PR9455

1
1 2 2.2_0805_5%

PC953

PC963

PC975

PC976

PC977

PC989
PVCC
CSREF
ILIM
IOUT
CSCOMP

IMAX
CSSUM
2
PR825 PQ906
@ 0_0402_5% PC788 EMC@
GFX_LG

1 2

2
1 2 22 14 0.01U_0402_25V7K 4
23 ROSC VBOOT/ADDR 13 GFX_TSENSE
1 2
24 COMP TSENSE 12 GFX_LG PC1311
C C
25 FB LG 11 1000P_0402_50V7K
DIFFOUT PGND GFX_PH

2
7 UNCORE_VSS_SENSE 1 2 26 10
VSN SW GFX_HG

3
2
1
PR826 27 9 PC756 EMC@
0_0402_5% 28 VSP HG 8 1 2 1 2 @

VR_HOT#
VCC BST
2

VR_RDY
ENABLE
PC1113 PC769

ALERT#

VRMP
1 2 @ 29 PR774 0.22U_0603_25V7K

SCLK
1000P_0402_50V7K

SDIO
GND 2.2_0603_5%
1

560P_0402_50V7-K 1 PU903
2
3
4
5
6
7
7 VCC_AXG_SENSE 1 PR817 2 NCP81201MNTXG_QFN28_4X4
PR772
0_0402_5% 1 2
+5VALW PR813
2.2_0603_5% 1 2
GFX_VIN
1

PC759 1

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
220U_D2_2.5VY_R6M
1U_0603_25V6M 1K_0402_1%
1

1
+

PC909

PC994

PC993

PC988

PC981

PC979

PC982

PC990

PC983

PC985
2

PC763
0.01U_0402_25V7K
PR770
2

2
2 3
2 1 +3VALW
44,56 EC_VR_ON
1

0_0402_5% PC798
+1.8VALW .1U_0402_10V6-K PR821
2

@ 10K_0402_5% @
@
PR789
2
2

PR775 1 2
69.8_0402_1% VR_CPU_PWROK 44,56
@
0_0402_5%
1

100K_0402_1%_TSM0B104F4251RZ
PR816
1

PR9451
44,56 VR_HOT# PR812 200_0402_1% GFX_TSENSE
2 1
2 1
7,56 CPU_SVID_DAT PR814
0_0402_5%
2

2 1
B 7,56 CPU_SVID_ALERT# 0_0402_5% B

1
0_0402_5% PR818

PH707
7,56 CPU_SVID_CLK 13K_0402_1%
1

PR819
2

2
200_0402_1% PR768 PR796
1

301_0402_1% 200_0402_1% PC797

+1.05VA 2.2U_0402_6.3V6M
2

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2013/11/08 Deciphered Date 2013/11/08 PWR_GFX Core

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
CGx20 0.2

Date: Thursday, December 10, 2015 Sheet 57 of 57

5 4 3 2 1