OTN Manual

BORA2500 Network Card

(S30824-Q92-X)
Doc. No.: AD-M133-E-3
COPYRIGHT AND TRADE SECRETS/LIABILITY
The present document and its contents remain the property of OTN Systems NV and shall not, without prior
written consent, be copied or transmitted or communicated to third parties, nor be used for any other purpose
than such as underlies their delivery to the addressee.

The present document and its contents may change in the course of time or may not be suitable in a specific
situation. Consequently, they are recommended as suggested guideline only.
OTN Systems NV hereby disclaims any liability for any damages that may result from the use of the present
document unless it is used with respect to the operation and maintenance of equipment originally
manufactured by OTN Systems NV and covered by its standard warranty.
Open Transport Network
Contents
1. INTRODUCTION ......................................................4
1.1 General ..........................................................4
1.2 Reference Documents ...................................4
2. CARD DESCRIPTION ..............................................4
2.1 Functional Operation and Network Card
Tasks .............................................................4
2.2 Functional Blocks...........................................4
2.2.1 Strap CLR-NVRAM ................................ 4
2.2.2 DIP Switches .......................................... 6
2.2.3 LIU .......................................................... 6
2.2.4 FPGA ...................................................... 7
2.2.5 EPLD ...................................................... 7
2.2.6 Microprocessor ....................................... 8
2.2.7 Flash EPROM ........................................ 8
2.2.8 Communication with the Interface Cards 8
2.2.9 Temperature Sensor .............................. 8
2.2.10 Alarm Contact......................................... 8
2.2.11 Engineering Order Wire (EOW) ............. 8
2.2.12 OMS Interface ........................................ 9
2.2.13 Self-test .................................................. 9
2.3 Visual Indications and Connectors on the
Front Panel ....................................................9
2.3.2 LED Indications ...................................... 9
2.3.3 Alphanumeric Display ............................ 9
2.3.4 Connectors ........................................... 10
2.3.5 Hidden RESET button .......................... 10
2.4 Card Specifications ...................................... 11
3. INSTALLATION GUIDELINES ............................... 11
4. ERROR LOCATION ............................................... 12
5. OPTICAL SIGNAL DISTANCES ............................ 18
6. LIST OF ABREVIATIONS ...................................... 18
AD-M133-E-3
BORA2500 Network Card
List of Figures
Figure 1 Functional Operation of The Network Card in
an N22 Node ...................................................... 5
Figure 2 Functional Operation of The Network Card in
an N215 Node .................................................... 5
Figure 3 Overview of Strap Settings JP600 ..................... 6
Figure 4 BORA2500 Side View (Straps + DIP Switches) 6
Figure 5 Functional Operation of the TRMs .................... 7
Figure 6 BORA2500 Front Panel ...................................... 9
List of Tables
Table 1 BORA2500 Modules ............................................. 4
Table 2 Reference Documents ......................................... 4
Table 3 Card Edition Overview According to Switches . 6
Table 4 SDH and SONET distance shorthand notations 6
Table 5 Overview of Alarm Connector Pin Numbers .... 10
Table 6 Overview of Alarm Connector Specifications.. 10
Table 7 Display Data on The Network Card during
Normal Operation ........................................... 12
Table 8 Cyclus 5 Display Data on the Network Card .... 12
Table 9 Display Data on The Network Card during Start-
Up or in The Case of Errors ........................... 13
Table 10 Error codes: Normal and Fatal ........................ 13
Table 11 Decimal - Binary Conversion (Part 1 of 2) ...... 16
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Open Transport Network BORA2500 Network Card

1. INTRODUCTION
1.1 General
This document describes the BORA2500 (Broadband
Optical Ring Adapter) network card, which is supported as
of OMS (OTN Management System) v2.4.
The BORA2500, which has two SFP type hot-pluggable
OTRs (Transceiver Modules), is the node‟s central control
block and provides for communication with the interface
cards and the OTN Management System (OMS). The two
hot-pluggable OTRs can be replaced from the front, without
removing the BORA2500 card from the node.
NOTE: Hot-pluggable also means taking the ESD rules into
consideration.
See ref. [2] in Table 2 for the types of nodes for which the
BORA2500 can be installed. The BORA2500 is SDH STM-
16c and SONET OC-48c compatible on the fiber. The
BORA2500 card comes in 2 different types: the
BORA2500-4 and the BORA2500-8. The BORA2500-4 can
only be used in an N215 node whereas the BORA2500-8
can be used in both an N22 and N215 node.
Table 1 BORA2500 Modules
Module Number
BORA2500-4 S30824-Q92-X401
BORA2500-8 S30824-Q92-X801
SFP is the TRM type used on the BORA2500 network card.
Figure 1 shows the operation of the network card in an N22
node whereas Figure 2 shows the operation in an N215
node.
The BORA2500 carries out the following network card
tasks:
a. I/O with the Line Interface Units (LIU)
Status and control data of SFP modules and SDH
framers, such as the SFP type and SDH/SONET
alarms, are exchanged between the FPGA and/or the
microprocessor and the Line Interface Units.
b. I/O with the Interface Cards
The network card is responsible for status and control
data processing and transports interface card data to
and from the ring via the node backplane.
c. I/O with the OMS
If the OMS is locally connected to the network card,
then the network card communicates with the OMS via
the 10 BASE-T Ethernet interface with the TCP/IP
protocol embedded. The network card communicates
with the OMS via dedicated bits on the ring if the OMS
is connected to another network card.
d. Alarming
When the network card does not receive
synchronization signals from other nodes in the ring
(see paragraph. 2.2.10), an external alarm can be
generated via the alarm connector on the front panel.
Each alarm is also visible in the OMS.

e. Status and Control Data of the Node

NOTE: From now on, when „network card‟ is mentioned, it The network card can both read node status data and
means the BORA2500 network card. When TRM is send control data to the node, provided extra
mentioned, it means the optical pluggable OTR provisions are made to this end.
module.
f. Optical Ring Management
1.2 Reference Documents The network card manages the optical ring by carrying
out the following tasks.
Table 2 is an overview of the documents being referred to
- Frame generation (in the master node);
in this document, „&‟ refers to the language code and „*‟
- Start-up and synchronization of both rings;
refers to the document issue.
- Determination of the master node and activation of
Table 2 Reference Documents the elastic buffer;
- Node reconfiguration in error situations;
- Transfer of error indications to neighboring nodes;
Ref. Number Title - Extensive self-tests;
- Activation of internal relays for major and minor
[1] AA-D100-&-* OTN Product Description alarm.
[2] AA-M205-&-* OTN Installation and Operation
2.2 Functional Blocks
Manual
[3] AG-M330-&-* OTN Management System OMS 2.2.1 Strap CLR-NVRAM
– User Manual (OTN-2500)
JP600 is the memory or CLR-NVRAM strap (see figure 3).
[4] AD-M155-&-* OTN TRM Modules See figure 4 for a side view with the BORA2500 CLR-
NVRAM strap.
When the power supply of a network card is switched off,
2. CARD DESCRIPTION the NVRAM assures that existing services and IFC control
data can be recovered upon reboot. When the power
2.1 Functional Operation and Network Card Tasks supply of the network card is switched on (reboot), it
depends on the NVRAM strap setting what is going to
The BORA2500 can be used in an OTN-2500 network. happen:
There are 2 different types of a BORA2500 network card.
These different types can be produced as follows: a. In case the strap is on the JP600 right-hand side (CLR-
BORA2500-<a>-SFP where <a>= amount of interface slots NVRAM) the NVRAM is initialized with default system
(8 slots in an N22 node, 4 slots in an N215 node). values, meaning that existing services and IFC control
data are lost. The network card shows „E2‟ on the front

AD-M133-E-3 Page 4 of 18
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BORA2500

Headset EOW
front panel
LED
External Clock Clock indications
termination
generation
Temperature
Secondary Sensor
Ring
TRM-2
Previous Pluggable SDH/Sonet
Node Optical termination
Tx/Rx R
Primary GRIA
GRIA D E
Ring
R C Status/Control Bus
DIP switch
Setting: CoreFPGA
Core FPGA: :
I E
Node Address
settings V I Data Busses LS left (3 x 1 line)
Primary synchronisation,
synchronisation ,
Ring and
loopbackand
loopback E V
TRM-1 add/drop
add/drop R E Data Busses LS right (3 x 1 line)
Next Pluggable SDH/Sonet
SDH/Sonet mechanisms
mechanisms S R
Node Optical termination
termination S Data Bus HS right (1 x 9+3
12 lines)
lines)
Secondary Tx/Rx
Ring
22 Alarm
Alarm ... ...
Relays INT 1 INT 4 INT 5 INT 8
Relays micro - Flash
Network processor
controller RAM EPROM Display
Ethernet
Ethernet
Management Interface 4 LS 4 HS/LS
System (OMS) Interface Interface Card Interface Card
Positions Positions

Figure 1 Functional Operation of The Network Card in an N22 Node

BORA2500

Headset EOW
front panel
LED
External Clock Clock indications
termination
generation
Temperature
Secondary Sensor
Ring
TRM-2
Previous Pluggable SDH/Sonet
Node Optical termination
Tx/Rx R
Primary GRIA
GRIA D E
Ring
R C Status/Control Bus
DIP switch
Setting: CoreFPGA
Core FPGA: :
I E
Node Address
settings V I Data Busses LS left (3 x 1 line)
Primary synchronisation,
synchronisation ,
Ring and
loopbackand
loopback E V
TRM-1 add/drop
add/drop R E Data Busses LS right (3 x 1 line)
Next Pluggable SDH/Sonet
SDH/Sonet mechanisms
mechanisms S R
Node Optical termination
termination S Data Bus HS right (1 x 9+3
12 lines)
lines)
Secondary Tx/Rx
Ring
22 Alarm
Alarm
Relays INT 1 INT 45 INT 56 INT 87
Relays micro - Flash
Network processor
controller RAM EPROM Display
Ethernet
Ethernet
Management Interface 1 LS 3 HS/LS
System (OMS) Interface Interface Card Interface Card
Position Positions

Figure 2 Functional Operation of The Network Card in an N215 Node

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Open Transport Network BORA2500 Network Card

CLR-NVRAM Table 3 Card Edition Overview According to Switches

JP600, jumper right : CLR-
NVRAM, init backup RAM
Hardware Edition S4 S3 S2 S1
CLR-NVRAM
Invalid combination 0 0 0 0
JP600, jumper left : NORMAL,
after init backup RAM
001 0 0 0 1
Figure 3 Overview of Strap Settings JP600 002 0 0 1 0
003 0 0 1 1
panel display (see figure 6). After switching off the
network card, setting the strap back to its normal 004 0 1 0 0
position (strap on JP600 left-hand side) and switching
on the network card again, all existing services are 005 0 1 0 1
cleared and the display does not show „E2‟ any longer. 006 0 1 1 0

b. In case the strap is on the JP600 left-hand side 007 0 1 1 1

(normal), all existing services and IFC control data are 008 1 0 0 0
recovered and still operational.
009 1 0 0 1
2.2.2 DIP Switches
010 1 0 1 0
The network card is equipped with three DIP switches. 011 1 0 1 1
a. Node Number 012 1 1 0 0
This DIP switch (SW1200, see figure 4) sets up the
013 1 1 0 1
Node Number. The most left-hand switch is the MSB
(=Most Significant Bit). A switch in the upper position 014 1 1 1 0
indicates a logical „1‟. Table 11 can be used as a help
for setting up your Node Number. 015 1 1 1 1

b. Loop Timing, SDH/SONET 2.2.3 LIU

This DIP switch (SW1100, see figure 4) is needed to
configure loop timing in case the OTN network is
slaved to an external network e.g. SDH or SONET.
Set „LT1‟ to configure loop timing in TRM1, set „LT2‟ to
configure loop timing in TRM2. In case the external
network is an SDH network, set „SDH‟. The fourth
switch is a spare switch.
c. Card Edition
This DIP switch (SW1201, see figure 4) indicates the
hardware edition of the network card. The user is not
allowed to change these settings. A switch in the upper
position indicates a logical „1‟.
a. General
Two optical modules (SFP) can be replaced hot-
pluggable via the front. The M (multimode), I (Intra-
Office) S1 and S2 (Short Haul), and L1 and L2 (Long
Haul) transceiver types are available. Their optical
characteristics are listed in Table 4 and Ref. [4] in
Table 2. Those replaceable TRMs convert the optical
signal of the OTN ring to an equivalent electrical signal,
and vice versa (see figure 5). The SDH/SONET/OTN
framing is detected in non-replaceable separate chips
on the board.
The TRMs can be used for:
- 50/125 or 62.5/125 µm multi-mode fibers;
- 9/125 µm single-mode fibers.
The S and L shorthands are derived from the SDH
notation. Unfortunately, the SONET notation is the
other way around in case of the S and I shorthands
although the same distances are covered.

Table 4 SDH and SONET distance shorthand notations

JP600
SDH SONET Typ dist.
CLR-NVRAM
I Intra-Office S Short Reach <=2 km
S1, S2 Short-haul I1,I2 Intermediate ~15 km
Reach
SW1100 SW1201 SW1200 L1 Long-haul L1 Long Reach ~40 km
HW CARD
NODE NR
SPARE

EDITION
SDH
LT2
LT1

4321 4321 87654321 L2 Long-haul L2 Long Reach ~80 km

„1‟ „1‟
„0‟ „0‟ M (Multimode): 850 nm / 0.3 km max.
I : 1310 nm
S1 / L1 : 1310 nm
Figure 4 BORA2500 Side View (Straps + DIP Switches) S2 / L2 : 1550 nm

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(So) - TRM Information

Secondary This information enables OMS to determine which
Ring TRM2 type of transceiver module is installed on the
Optical network card of a node;
Previous Transmitter - SDH Framer configuration data;
Node
Coding / - SDH Framer settings;
Primary Optical
Decoding - SDH Framer status data.
Ring Receiver
(Pi)
e. TRM specifications
For an overview of the TRM specifications, see Ref. [4]
in Table 2.
FPGA
2.2.4 FPGA
(Po) TRM1
The gate array (GRIA = Gigabit Ring Interface Adaptor)
Primary Optical
Ring contains the core logic to support the optical rings, i.e.
Transmitter
generation and recognition of time-multiplexed OTN
Coding / frames, synchronization with the other nodes and node
Decoding reconfiguration. New FPGA configuration data can be
Next Optical downloaded from the OMS. The FPGA also interfaces with
Node Receiver
the backplane.
The GRIA state machine decides which path the data
stream follows e.g. the switches between primary and
Secondary
Ring secondary ring are controlled by the GRIA in case of any
(Si) reconfiguration due to an error. The configuration is shown
on the alphanumeric display.
Figure 5 Functional Operation of the TRMs The FPGA performs the following functions:
a. Processing of the data flows with LIUs;
b. Functional Operation
The OTN data is transmitted between nodes in an b. Interfacing with the backplane;
STM-16c or OC-48c concatenated container. The c. OMS communication over the ring;
SDH/SONET link layer performs SDH signal
termination, SDH synchronization, SDH clock recovery, d. Communication with microprocessor and EPLD;
bit error measurement and word alignment.
The BORA2500 places the OTN frame in the e. EOW function control (see § 2.2.11 );
SDH/SONET payload over the optical link. The OTN
frame carries both service data (for the interface cards) f. Ring configuration determination;
and control data (such as OTN-EOW and OMS-node
g. Drive the LED indications (except for Ethernet LED
communication). As a result, the SDH or SONET
indications);
overhead bytes are not used by the OTN application,
and may be modified by other devices without h. Read out the temperature sensor;
disturbing the OTN.
The add/drop functionality between interface cards and i. Read out the hardware settings:
OTN frame is implemented in the GRIA gate array, and - The node‟s hardware address: each network card
works on a 32 kbps level (cfr. the other members of the in a network is allocated a unique address (1-250);
OTN family). - The card type;
Error checking tests are carried out on the optical level - SDH/SON, loop timing settings.
(Optical Signal Loss), on the SDH level (B1, B2 and B3
Bit Error Rate tests) and on the embedded OTN frame a. Elastic Buffer
(CRC check). The master node‟s elastic buffer makes sure that a
The OTR2500 LIUs are responsible for the number of subsequent frames circulate on the ring. It
transmission and reception of time-multiplexed frames compensates for the phase difference between the
between subsequent nodes and for the transmission of transmitted and received frames. This phase difference
data and the clock signal to the network card. is caused by an arbitrary number of nodes and ring
As an example, Figure 5 represents the functional length.
operation of OTR2500 modules (TRM1 and TRM2) on
b. Allocation RAM
a network card.
During normal node operation, the FPGA uses an
c. Eye Safety internal NVRAM to know what OTN-frame bits have to
The optical transceiver module is a class 1 laser be added/dropped from/to the backplane (interfaces)
product and complies with IEC 825-1, EN60825 and into this node. The ARAM (Allocation RAM) is written
FDA 21 CFR 1040.10. by the OMS.

d. Status and Control Data 2.2.5 EPLD

In order to allow for LIU monitoring and remote control, The EPLD performs the following functions:
the LIU provides a number of status and control bits a. Address decoding to make chip selects;
which can be accessed via the OMS.

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b. Adapts specific signals;
c. Read out the hardware settings:
- CLR NVRAM (see § 2.2.1);
- The hardware edition.
2.2.6 Microprocessor
An industrial microprocessor initializes, controls and checks
the gate array. The microprocessor is connected to the
gate array via an address and data bus and the required
control signals. The microprocessor also receives control
signals and data from the OMS, which are stored in the
NVRAM memory. RTOS runs on the microprocessor.
The microprocessor‟s major tasks are:
a. check the RAM memory during the self-test;
b. check the flash EPROM during the self-test;
c. check the gate arrays during the self-test;
d. communication with the LIUs (OTRs and framers);
e. communication with the OMS (locally or via the ring);
f. drive the alphanumeric display (four characters);
g. drive alarm contact through the RJ45 connector;
h. video switching;
i. alarm handling, major and minor alarms;
j. Recovery from a power failure: during a power failure,
an NVRAM (Non Volatile RAM) makes sure that
services and control bits are kept (except video-
switching services). When the supply voltage is
switched on, the microprocessor copies the stored data
from the NVRAM to the related functional blocks on the
board (i.e. ARAM in GRIA, TRMs). Now the node can
immediately restore the services and control bits
without having to wait until the OMS has returned this
data to the node (see also paragraph 2.2.1).
The data add and drop handling in an OTN node and the
reconfiguration mechanism are not performed by the
microprocessor. If the microprocessor should fail, the gate
array continues to process the OTN ring data, in which
case only the microprocessor‟s tasks described above are
not supported. The microprocessor can be reset without
disturbing the node add/drop functionality.
2.2.7 Flash EPROM
A flash EPROM containing the microprocessor‟s program
consists of:
a. a fixed (BOOT code) part;
b. an adjustable (application data, FPGA configuration
data and IP address) part;
c. MAC (=ethernet) address.
It is possible to load a new firmware version from the OMS.
During “downloading” of the application data and the FPGA
configuration data, the network remains functional.
However, when the new firmware is activated, the
connections with the node concerned are disrupted upon
restart. The BOOT code, application data, FPGA
configuration data, IP address and MAC address are
loaded for the first time upon production via a JTAG
connector. Afterwards upon run time, the adjustable part
can be downloaded via the OMS.
AD-M133-E-3
BORA2500 Network Card
2.2.8 Communication with the Interface Cards
For communication with the interface cards, the backplane
is equipped with busses.
a. Data Bus
The data bus contains, among other things, address
lines for the selection of the proper interface card and
user, and data lines for data transport to and from the
interface cards. Via this bus, the gate arrays pass the
data flow of the TRM modules to the proper interface
cards. Simultaneously, they multiplex the interface data
in the same transmission channels. An LS and HS data
bus interfaces with the backplane. LS stands for Low
Speed addressing. HS stands for High Speed
addressing.
b. Status/Control Bus
GRIA can request a number of status data from the
interface cards, such as the card type. In turn, the OMS
can read out and interpret this data.
In the opposite direction, the OMS can set a number of
parameters on the interface card via this gate array
and the status/control bus.
2.2.9 Temperature Sensor
As excessive temperatures may reduce the life of
components, the network card holds a temperature sensor,
which indicates whether the temperature exceeds 65 °C ±
4 °C (139 °F ± 7 °F). The microprocessor reports high
temperatures to the OMS.
2.2.10 Alarm Contact
The network card is equipped with two solid state relays to
indicate abnormal operation.
One “MAJOR ALARM” relay shows that both rings are not
in SYNC2 status.
The second relay “MINOR ALARM” shows that at least one
ring is in SYNC0 status.
If the node is switched off (no power) a major and minor
alarm situation occurs as well.
Refer to 2.3.4e to find out the relay alarm connector.
2.2.11 Engineering Order Wire (EOW)
A headset with microphone (S26361-F2D87-L1) can be
plugged into the 3.5mm jacks (EOW connector) on the
network card front panel.
If a microphone (red connector) is plugged in, the CALL
LED is lit on every network card in the network.
If in one other node the microphone and headphone (black
connector) are plugged in, point to point communication
between both nodes is possible. Only these nodes can
speak and listen to each other. Other nodes can listen to
this conversation as well when only the headphone is
plugged in in that node. This function is for example used
during installation or maintenance activities.
The EOW interface performs the analog/digital conversion
(PCM) and vice versa, and detects whether a microphone
is plugged in.
A fixed bandwidth is reserved on the ring for the EOW
function, which therefore must not be programmed via the
OMS.
The EOW function in a node can only be used when this
node can be reached (=at least one ring is in the SYNC2
status).
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2.2.12 OMS Interface

BORA2500
The OMS is connected via a 10 BASE-T Ethernet interface.
The microprocessor and the connected OMS communicate
via an Ethernet controller in the microprocessor and a
TCP/IP protocol. Each network card has another Ethernet
address. The MAC and IP addresses are stored in the flash
EPROM.
2.2.13 Self-test L R T
E
When switching on the supply voltage, the node does a T
H
complete self-test, before switching itself into the ring.
CALL
To this end, the microprocessor initializes specific registers
E
of the gate array. O
Subsequently, the network card is completely tested, e.g. W
the microprocessor‟s ROM and RAM memories, the gate SDH BER
array, etc. SY2 SY0
TRM2
The TRM modules are also tested, e.g. the type number,
status and control logic, an electrical loopback, etc. So
After this self-test, a number of settings determining the Pi
card operation are read into the GRIA, such as: A
a. the node‟s hardware address; L
A
b. errors detected during the self-test. R
M
SDH BER
SY2 SY0
2.3 Visual Indications and Connectors on the Front TRM1
Panel Po
Si
The network card front panel (Figure 6) is equipped with
the following: CLK
a. LED indications;
b. an alphanumeric display;
c. connectors;
d. a hidden reset button.

2.3.2 LED Indications

The network card front panel houses the following LEDs L,
R, T, CALL, SDH, BER, SY0, SY2 and CLK.
a. Ethernet L, R and T LEDs
Via the Ethernet port, the OMS can access the OTN
network. When the L(=Link) LED is lit, the link is OK.
When the R(=Receive) LED is lit, data is being
received. When the T(=Transmit) LED is lit, data is
being transmitted.
b. LED CALL
The CALL LED is lit when an EOW connector has
plugged in the headset microphone somewhere.
Figure 6 BORA2500 Front Panel
f. LED CLK
When this green LED is lit, it indicates that an external
clock has been detected on the BNC connector of this
network card. When this network card is the Master
BORA (lowest node number), the OTN ring will be
slaved to this external clock.
- a green dark LED: no external clock detected or
clock signal beyond specifications;

c. LED SDH
The SDH LED is lit when the following SDH alarm is
detected via the line interface:
- OOF: Out Of Frame (Yukon).
d. LED BER
The BER LED is lit when the following Bit Error is
detected:
- CRC: CRC-error in OTN-frame (GRIA).
The BER LED is lit for at least 100 ms with each failure.
A dark LED indicates an error-free 100 ms period.
e. LEDs SY0 and SY2
The SY2 green LED is lit when receiving SYNC2
frames. The SY0 red LED is lit when the OTN ring is in
SYNC0 status. When receiving SYNC1 frames, both
LEDs are dark.
- a green lit LED: external clock detected and this
node is the master node;
- a green flashing LED: external clock detected and
this node is a slave node.
During start-up (self-test) and in the case of an error,
the LEDs do not have the functions of the codes
indicated. During the self-tests, the LEDS are all lit
continuously.
2.3.3 Alphanumeric Display
The 4-character alphanumeric display shows all kinds of
data regarding node operation and setting. With node N22,
the upper character in the display is the MSB. With node
N215, the left character is the MSB.

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Normal Operation
During normal operation, the following data is subsequently
displayed for approximately 1 second:
a. the number of the own node;
b. the number of the previous node («previous»
compared to the transmission direction on the data
carrying ring);
c. the number of the next node («next» compared to the
transmission direction on the data carrying ring);
NOTE: If a node is in loopback mode, the „previous
node number‟ and „next node number‟ are
the same;
NOTE: If the previous node or next node number
cannot be read, node number „253‟ or „254‟
is displayed;
d. the node configuration
- The node configuration indication (PP, PS, SP, SS
or LB) indicates the direction of the data through
the node. When LB is displayed it means that there
is a loopback in the OTN ring:
- PP: from the primary input (Pi) to the primary
output (Po);
- PS: from the primary input (Pi) to the
secondary output (So);
- SP: from the secondary input (Si) to the
primary output (Po);
- SS: from the secondary input (Si) to the
secondary output (So);
- LB: there is a loopback in the OTN ring and
the loopback does occur in a different node
than the own node; the nodes in which the
loopback occurs will display PS or SP.
- The node type for which the network card is
intended:
- 4: N215 (network card does not operate in an
N22 node);
- 8: N22 (network card also operates in an N215
node).
- Master or Slave configuration:
- M: this node is configured as Master Node;
- S: this node is configured as Slave Node.
e. The TRM types (see Table 8);
f. The frame type: SDH or SONET.
Table 7 is an overview of the display data on the network
card during normal operation.
During Start-up or in Case of Errors
Table 9 shows the data displayed during start-up (self-test)
or in the case of errors. If, after the self-test, the node is not
switched into the ring due to internal errors, an error code is
displayed indicating why the node has not been switched
into the ring.
AD-M133-E-3
BORA2500 Network Card
2.3.4 Connectors
The network card front panel is equipped with the following
connectors:
a. two 3.5 mm jacks for the EOW (Engineering Order
Wire) headset;
b. a BNC connector to connect an external TTL clock
signal; An external clock signal of 36.864 MHz 50
ppm is required, although 36.864 MHz 25ppm is
advised. When this network card is the Master BORA
(lowest node number), the clock will be slaved to this
external clock;
c. 2 Duplex LC female optical connectors; One connector
for receiving and transmitting optical signals RX2 and
TX2 and one for receiving and transmitting optical
signals RX1 and TX1;
d. a twisted pair RJ45 connector (ETH connector in
Figure 6) to connect the OMS; This connection
operates according to the 10 BASE-T Ethernet
standard;
e. an RJ45 alarm connector (ALARM connector in Figure
6); For the meaning of major and minor alarm: see
2.2.10); The minor contact is DC only (normally open)
where pin number 1 is the „+ terminal‟ and pin number
2 is the „- terminal‟; An alarm is indicated by an open
contact; The major contact can be used in two ways:
either it is AC between pin number 4 and pin number
6 (normally open, opened on alarm), or it is DC
between pin number 4 (+) and pin number 5 (-), and
between pin number 6 (+) and pin number 5 (-) (both
normally open, and opened on alarm).
Table 5 Overview of Alarm Connector Pin Numbers
Pin n°. Signal
1 Minor contact NO ( DC (+) )
2 Minor contact common ( DC (-) )
3 GND
4 Major contact NO1 ( DC (+) or AC )
5 Major contact common ( DC (-) )
6 Major contact NO2 ( DC (+) or AC )
7 TTL input 1
8 TTL input 2
Table 6 Overview of Alarm Connector Specifications
Maximum DC/AC load voltage 50 V
Maximum continuous DC load current 50 mA
Maximum on resistance at 25 °C 40 Ohm
2.3.5 Hidden RESET button
This pushbutton is hidden and reachable via a small hole at
the bottom of the front panel. Pushing this RESET button
for a few seconds forces a warm start of the
microprocessor without disturbing the switching
functionality and a clearance of the network card display.
Page 10 of 18
Open Transport Network BORA2500 Network Card

2.4 Card Specifications - BORA2500 Modules:

- BORA2500-4 S30824-Q92-X401
a. Temperature (node surrounding)
- Operation: - BORA2500-8 S30824-Q92-X801
-20 °C to +55 °C - SFP OTR Modules:
-4 °F to +131 °F - OTR2500M-SFP V30813-S1-A1
- Startup:
-10 °C to +55 °C - OTR2500I-SFP V30813-S6-A1
+14 °F to +131 °F
- OTR2500S1-SFP V30813-S2-A1
- Storage and shipping:
-20 °C to +70 °C - OTR2500S2-SFP V30813-S3-A1
-4 °F to +158 °F
- OTR2500L1-SFP V30813-S5-A1
b. Relative Humidity (non-condensing) (call for availability)
- Operation: 20 % to 80 % at 25 °C (+77 °F) - OTR2500L2-SFP V30813-S4-A1
(node surrounding) (call for availability)
- Storage and shipping: 20 % to 95 %
c. Weight (with two TRMs)
3. INSTALLATION GUIDELINES
- BORA2500: approx. 610 g
(approx. 1.35 pounds)

d. MTBF at +25 °C (+77 °F) (without TRMs) ATTENTION!

- 21 years (=5540 FITs) With all installation activities, ESD recommendations
regarding the handling, transportation, and storage of
e. Electromagnetic Compatibility cards must be observed (see ref. [2]).
- Emission: EN55022, Class A Plugging the network card into a slot different from the
- Immunity: EN50082-1 network card slot will damage the network card.
f. Power Consumption (with two TRMs)
- BORA2500 +5 V: 3.5 A
g. Card Size
The following procedure is recommended to install the
- Height: 262 mm
network card as efficiently as possible.
- Length: 236 mm
- Width: 25.25 mm (5TE)
1. power down node;
h. OMS Connection
2. remove network card from node in case the network
- Via a twisted pair RJ45 connector for 10 BASE-T
was already in the node and must be reinstalled;
Ethernet interface.
i. Certification 3. place CLR-NVRAM strap in the right-hand (CLR-
- UL certification Pending NVRAM) position (refer to paragraph 2.2.1 for more
- FCC Part 15 CIA Pending details);
- CE Marking 4. reinstall network card in the network card slot;
- EMC directive 89/336/EEC
- LVD directive 73/23/EEC 5. do not connect any fiber or cable;
- TTE directive 91/263/EEC
6. power on node and wait until self test has ended;
j. System Data Rate
- SDH data rate: 2488.32 Mbps 7. the network card now displays E2 (copyRAM error) to
- OTN data rate: 4*BORA600 data rate indicate that the network card information is invalid and
=2359.296 Mbps will be cleared. This clearance must be done in order
to avoid disruption of already programmed and existing
k. Optical Data Rate services in the network;
- Optical Data Rate = SDH Data Rate
= 2488.32 Mbps 8. power down node again;
l. Eye Safety 9. remove network card from node;
- The integrated optical transceiver modules are
class 1 laser products and comply with IEC 825-1, 10. place CLR-NVRAM strap in the left-hand (NORMAL)
EN60825 and FDA21 CFR 1040.10. position (refer to paragraph 2.2.1 for more details);
m. Ordering Information 11. replace network card in the network card slot and
- Nodes: power up node;
- The BORA2500-4 modules can be installed in
the OTN-N215 nodes. 12. connect fibers to network card.
- The BORA2500-8 modules can be installed in
the OTN-N22 and N215 nodes.
- OMS Software Release:
- BORA2500 OMS v2.4 and up

AD-M133-E-3 Page 11 of 18
Open Transport Network BORA2500 Network Card

Table 7 Display Data on The Network Card during Normal Operation

Cycle Character Explanation

4 3 2 1
N1 = Node number Number of own node
N2 < Node number Number of previous node compared to the transmission
direction on the data carrying ring
N3 > Node number Number of next node compared to the transmission
direction on the data carrying ring
N4 PP/PS/SP/SS/LB 4/8 M/S Node Node Type for which M:
configuration the network card is Master Node
meant:
S:
4: N215 (not allowed in
N22) Slave Node
8: N22 (also allowed in
N215)
N5 TRM1 Type / TRM2 Type (See Table 8 )
N6 SDH/SON Frame Type
N7.. Non – fatal error code This cycle is only displayed with a non-fatal error. If no
N17 such error occurs, this field is not displayed and the
cycle jumps back to cycle N1. It is possible that more
than one non-fatal error occurs e.g. three errors,
resulting in cycles N7, N8 and N9 with the error codes
accordingly. There can be a maximum of eleven non-
fatal errors resulting in cycles N7…N17. After the
errors have been displayed, there is always a jump
back to cycle N1.

4. ERROR LOCATION g. In case of fatal errors, the BORA2500 cannot operate

When switching on the supply voltage and during the
optical connection, check the LEDs and the alphanumeric h.
display on the network card. Solve possible errors.
a. If no LED is lit on the network card, then check:
in an acceptable way anymore;
Failures whereby "self-test detected" indicates „yes‟
(see Table 10) can only be set/cleared by executing
self-tests (cold boot!).

- the supply voltage presence; Table 8 Cyclus 5 Display Data on the Network Card
- the power supply connection;
- the fuses on the power supply modules (N22 type,
N215 type). Module Λ SDH SON
(nm)
b. If an error code occurs on the alphanumeric display,
replace the network card; 4 3 2 1 4 3 2 1

c. If the green LEDs on the network card are not lit, the Invalid ? ? ? ?
node is not synchronized;
Empty Optical Slot - - - -
Check the optical connections;
d. If the red LEDs on the network card are lit, the node is V30813-S1-A1 850 M M M M
not synchronized;
V30813-S6-A1 1310 I I S S
Check the optical connections;
e. If the alphanumeric display continues to display FAIL V30813-S2-A1 1310 S 1 S 1 I 1 I 1
followed by the node address and a fatal error code
(see Table 10) then there is a fatal error on the network V30813-S3-A1 1550 S 2 S 2 I 2 I 2
card; Non-fatal error codes, if any, are displayed after
cycle N6 (see Table 7); V30813-S5-A1 1310 L 1 L 1 L 1 L 1

f. In case of non-fatal errors, the BORA2500 program will V30813-S4-A1 1550 L 2 L 2 L 2 L 2

try to operate normally, although with reduced
functionality;

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Table 9 Display Data on The Network Card during Start-Up or in The Case of Errors

Cycle Character Explanation

4 3 2 1
S1 P T S T Processor Test (runs in cold and warm boot);
S2 L O A D FPGA Loading (runs in cold boot);
S3 Node Address The node address is only known after the LOAD cycle
has ended (runs in cold boot only);
S4 T E S T Self-test (runs in cold boot only);
S5 B O O T FW BOOT (runs in cold and warm boot); This cycle can
take some more time, approximately 10 seconds.
During this interval, cycles S5 and S6 will alternate.
S6 Node Address Node address alternating with BOOT (S5) (runs in cold
boot only);
S7 I N I T Initialization (runs in cold and warm boot);
S8 F A I L This cycle is only displayed if a Fatal Error occurs. In
this case cycles S8, S9 and S10 will alternate;
S9 Node Address Node address alternating with cycles S8 and S10 if a
fatal error occurred;
S10 Fatal Error Code Fatal Error Code alternating with cycles S8 and S9 if a
fatal error occurred. For an overview of the Fatal Error
codes, see Table 10;

Table 10 Error codes: Normal and Fatal

Display Category Self Test Explanation Curative Action

detected
OS! FATAL NO Operating system resource allocation problem. Normal Reboot the card; if the problem
operation no longer possible! The program will try to persists then replace it.
force a RESET to resume normal operation.
NODE FATAL NO DIP switch configuration of own node_no exceeds the Or the BORA has an invalid
valid range of 1...250. The TRMs will not be activated. node number configured, or the
BORA is defective. Check and
replace card if necessary.
N215 FATAL NO A 4-slot BORA network card is inserted in a non-N215 Replace the 4-slot BORA with
node. The backplane will not be activated. an 8-slot BORA or use an N215
node instead.
SFP? FATAL NO No or no approved SFP module present. The backplane Reboot the card; if the problem
will not be activated! persists then replace it.
E2 FATAL NO DIP switch setting asks to clear NVRAM. After this clear Reboot the card, if the problem
action, the program will stop (watchdog reset)! persists then replace it.
E10 FATAL NO Program initialization problem. Operation no longer Check configuration data, fix
reliable! The program will try to force a reset to resume and reload the card from OMS.
normal operation.
E11 NORMAL NO Program problem during normal operation. Let the card run during at least
10 minutes. Then reboot. The
error should now disappear. If
the card starts rebooting
spontaneously again then
replace it.
E12 FATAL NO Error indication during GRIA load. When this problem persists, a
card reset will be forced
automatically after 3 attempts!
E20 NORMAL NO Boot FW contains CRC error or incorrect header. Replace the card
Downloading new FW is no longer possible.

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Display Category Self Test Explanation Curative Action

detected
E21 NORMAL NO Application FW contains CRC error or incorrect header. Try downloading FW, if this fails
Application FW will no longer start up after reset and the then replace the card.
program will keep running in boot!
E22 FATAL NO GRIA load contains CRC error or incorrect header. The Try downloading FW, if this fails
program keeps operational, but after the next cold boot it then replace the card.
will no longer start up (=> E12).
E23 NORMAL NO IP area contains CRC error or incorrect header. No Replace the card.
Ethernet communication possible.
E24 NORMAL NO MAC area contains CRC error or incorrect header. No Replace the card.
Ethernet communication possible.
E30 FATAL YES GRIA indicates "load" error in application FW. The Clear the NVRAM, reboot and
program will force a reset to reload the GRIA. reload the card from OMS. If the
card starts rebooting
spontaneously, then replace it.
E31 NORMAL YES Self-test detected error in YUKON[0] (TRM1, SIPO) Reboot the card; if the problem
persists then replace it.
E32 NORMAL YES Self-test detected error in YUKON[1] (TRM2, PISO) Reboot the card; if the problem
persists then replace it.
E33 NORMAL NO Routine test detected error in SFP[0] (TRM1, SIPO) Replace SFP0

E34 NORMAL NO Routine test detected error in SFP[1] (TRM2, PISO) Replace SFP1

E35 NORMAL YES Self-test detected error during data loop test (TRM1, Reboot the card; if the problem
SIPO) persists then replace it.

E36 NORMAL YES Self-test detected error during data loop test (TRM2, Reboot the card; if the problem
PISO) persists then replace it.

E37 FATAL YES Self-test detected error during RAM test. Reboot the card; if the problem
persists then replace it.
E38 NORMAL YES Self-test detected error in HDLC broadcast channel Reboot the card; if the problem
persists then replace it.
E39 NORMAL YES Self-test detected error in HDLC request channel Reboot the card; if the problem
persists then replace it.
E3A NORMAL YES Self-test detected error in Ethernet communication Reboot the card; if the problem
persists then replace it.
E3B FATAL YES Self-test detected error in microprocessor peripherals Reboot the card; if the problem
persists then replace it.
E40 NORMAL NO CRC error in NVRAM block 0 (Node configuration). This Try reloading the NVRAM
block‟s content will further be ignored. Default values will control data from OMS, if this
be used upon a reset. fails then replace the card
E41 NORMAL NO CRC error in NVRAM block 1 (IF1 configuration). This Try reloading the NVRAM
block‟s content will further be ignored. Default values will control data from OMS, if this
be used upon a reset. fails then replace the card

E42 NORMAL NO CRC error in NVRAM block 2 (IF2 configuration). This Try reloading the NVRAM
block‟s content will further be ignored. Default values will control data from OMS, if this
be used upon a reset. fails then replace the card

E43 NORMAL NO CRC error in NVRAM block 3 (IF3 configuration). This Try reloading the NVRAM
block‟s content will further be ignored. Default values will control data from OMS, if this
be used upon a reset. fails then replace the card

E44 NORMAL NO CRC error in NVRAM block 4 (IF4 configuration). This Try reloading the NVRAM
block‟s content will further be ignored. Default values will control data from OMS, if this
be used upon a reset. fails then replace the card

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Display Category Self Test Explanation Curative Action

detected
E45 NORMAL NO CRC error in NVRAM block 5 (IF5 configuration). This Try reloading the NVRAM
block‟s content will further be ignored. Default values will control data from OMS, if this
be used upon a reset. fails then replace the card

E46 NORMAL NO CRC error in NVRAM block 6 (IF6 configuration). This Try reloading the NVRAM
block‟s content will further be ignored. Default values will control data from OMS, if this
be used upon a reset. fails then replace the card

E47 NORMAL NO CRC error in NVRAM block 7 (IF7 configuration). This Try reloading the NVRAM
block‟s content will further be ignored. Default values will control data from OMS, if this
be used upon a reset. fails then replace the card

E48 NORMAL NO CRC error in NVRAM block 8 (IF8 configuration). This Try reloading the NVRAM
block‟s content will further be ignored. Default values will control data from OMS, if this
be used upon a reset. fails then replace the card

E49 NORMAL NO CRC error in NVRAM block 9 (Interfaces Common Try reloading the NVRAM
configuration). This block‟s content will further be control data from OMS, if this
ignored. Default values will be used upon a reset. fails then replace the card

E4A NORMAL NO CRC error in NVRAM block 10 (TRM2 configuration). Try reloading the NVRAM
This block‟s content will further be ignored. Default control data from OMS, if this
values will be used upon a reset. fails then replace the card

E4B NORMAL NO CRC error in NVRAM block 11 (TRM1 configuration This Try reloading the NVRAM
block‟s content will further be ignored. Default values will control data from OMS, if this
be used upon a reset. fails then replace the card

E4C NORMAL NO CRC error in NVRAM block 12 (Board configuration). Try reloading the NVRAM
This block‟s content will further be ignored. Default control data from OMS, if this
values will be used upon a reset. fails then replace the card

E4D NORMAL NO CRC error in NVRAM block 13 (Node configuration). This Try reloading the NVRAM
block‟s content will further be ignored. Default values will control data from OMS, if this
be used upon a reset. fails then replace the card

E4E NORMAL NO CRC error in NVRAM block 14 (Video configuration). Try reloading the NVRAM
This block‟s content will further be ignored. Default control data from OMS, if this
values will be used upon a reset. fails then replace the card

E4F NORMAL NO CRC error in NVRAM block 15 (Specials configuration). Try reloading the NVRAM
This block‟s content will further be ignored. Default control data from OMS, if this
values will be used upon a reset. fails then replace the card

E50 NORMAL NO CRC error in NVRAM block ARAM. This block‟s content Try reloading the NVRAM
will further be ignored. Default values will be used upon a control data from OMS, if this
reset. fails then replace the card

E60 NORMAL NO Audit routine detected mismatch between NVRAM and Reboot the card; if the problem
GRIA ARAM contents. The audit routine will still try to persists then replace it.
match both contents.
E999 FATAL NO "unhandled interrupt", the program hit an unexpected Reset will occur spontaneously,
exception. It will try to force a reset in order to resume if the problem persists then
normal operation. replace the card

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Open Transport Network BORA2500 Network Card

Table 11 Decimal - Binary Conversion (Part 1 of 2)

Deci- Binary Deci- Binary Deci- Binary

mal 8 7 6 5 4 3 2 1 mal 8 7 6 5 4 3 2 1 mal 8 7 6 5 4 3 2 1
A A A A A A A A A A A A A A A A A A A A A A A A
0 Non allowed address 43 0 0 1 0 1 0 1 1 86 0 1 0 1 0 1 1 0
1 0 0 0 0 0 0 0 1 44 0 0 1 0 1 1 0 0 87 0 1 0 1 0 1 1 1
2 0 0 0 0 0 0 1 0 45 0 0 1 0 1 1 0 1 88 0 1 0 1 1 0 0 0
3 0 0 0 0 0 0 1 1 46 0 0 1 0 1 1 1 0 89 0 1 0 1 1 0 0 1
4 0 0 0 0 0 1 0 0 47 0 0 1 0 1 1 1 1 90 0 1 0 1 1 0 1 0
5 0 0 0 0 0 1 0 1 48 0 0 1 1 0 0 0 0 91 0 1 0 1 1 0 1 1
6 0 0 0 0 0 1 1 0 49 0 0 1 1 0 0 0 1 92 0 1 0 1 1 1 0 0
7 0 0 0 0 0 1 1 1 50 0 0 1 1 0 0 1 0 93 0 1 0 1 1 1 0 1
8 0 0 0 0 1 0 0 0 51 0 0 1 1 0 0 1 1 94 0 1 0 1 1 1 1 0
9 0 0 0 0 1 0 0 1 52 0 0 1 1 0 1 0 0 95 0 1 0 1 1 1 1 1
10 0 0 0 0 1 0 1 0 53 0 0 1 1 0 1 0 1 96 0 1 1 0 0 0 0 0
11 0 0 0 0 1 0 1 1 54 0 0 1 1 0 1 1 0 97 0 1 1 0 0 0 0 1
12 0 0 0 0 1 1 0 0 55 0 0 1 1 0 1 1 1 98 0 1 1 0 0 0 1 0
13 0 0 0 0 1 1 0 1 56 0 0 1 1 1 0 0 0 99 0 1 1 0 0 0 1 1
14 0 0 0 0 1 1 1 0 57 0 0 1 1 1 0 0 1 100 0 1 1 0 0 1 0 0
15 0 0 0 0 1 1 1 1 58 0 0 1 1 1 0 1 0 101 0 1 1 0 0 1 0 1
16 0 0 0 1 0 0 0 0 59 0 0 1 1 1 0 1 1 102 0 1 1 0 0 1 1 0
17 0 0 0 1 0 0 0 1 60 0 0 1 1 1 1 0 0 103 0 1 1 0 0 1 1 1
18 0 0 0 1 0 0 1 0 61 0 0 1 1 1 1 0 1 104 0 1 1 0 1 0 0 0
19 0 0 0 1 0 0 1 1 62 0 0 1 1 1 1 1 0 105 0 1 1 0 1 0 0 1
20 0 0 0 1 0 1 0 0 63 0 0 1 1 1 1 1 1 106 0 1 1 0 1 0 1 0
21 0 0 0 1 0 1 0 1 64 0 1 0 0 0 0 0 0 107 0 1 1 0 1 0 1 1
22 0 0 0 1 0 1 1 0 65 0 1 0 0 0 0 0 1 108 0 1 1 0 1 1 0 0
23 0 0 0 1 0 1 1 1 66 0 1 0 0 0 0 1 0 109 0 1 1 0 1 1 0 1
24 0 0 0 1 1 0 0 0 67 0 1 0 0 0 0 1 1 110 0 1 1 0 1 1 1 0
25 0 0 0 1 1 0 0 1 68 0 1 0 0 0 1 0 0 111 0 1 1 0 1 1 1 1
26 0 0 0 1 1 0 1 0 69 0 1 0 0 0 1 0 1 112 0 1 1 1 0 0 0 0
27 0 0 0 1 1 0 1 1 70 0 1 0 0 0 1 1 0 113 0 1 1 1 0 0 0 1
28 0 0 0 1 1 1 0 0 71 0 1 0 0 0 1 1 1 114 0 1 1 1 0 0 1 0
29 0 0 0 1 1 1 0 1 72 0 1 0 0 1 0 0 0 115 0 1 1 1 0 0 1 1
30 0 0 0 1 1 1 1 0 73 0 1 0 0 1 0 0 1 116 0 1 1 1 0 1 0 0
31 0 0 0 1 1 1 1 1 74 0 1 0 0 1 0 1 0 117 0 1 1 1 0 1 0 1
32 0 0 1 0 0 0 0 0 75 0 1 0 0 1 0 1 1 118 0 1 1 1 0 1 1 0
33 0 0 1 0 0 0 0 1 76 0 1 0 0 1 1 0 0 119 0 1 1 1 0 1 1 1
34 0 0 1 0 0 0 1 0 77 0 1 0 0 1 1 0 1 120 0 1 1 1 1 0 0 0
35 0 0 1 0 0 0 1 1 78 0 1 0 0 1 1 1 0 121 0 1 1 1 1 0 0 1
36 0 0 1 0 0 1 0 0 79 0 1 0 0 1 1 1 1 122 0 1 1 1 1 0 1 0
37 0 0 1 0 0 1 0 1 80 0 1 0 1 0 0 0 0 123 0 1 1 1 1 0 1 1
38 0 0 1 0 0 1 1 0 81 0 1 0 1 0 0 0 1 124 0 1 1 1 1 1 0 0
39 0 0 1 0 0 1 1 1 82 0 1 0 1 0 0 1 0 125 0 1 1 1 1 1 0 1
40 0 0 1 0 1 0 0 0 83 0 1 0 1 0 0 1 1 126 0 1 1 1 1 1 1 0
41 0 0 1 0 1 0 0 1 84 0 1 0 1 0 1 0 0 127 0 1 1 1 1 1 1 1
42 0 0 1 0 1 0 1 0 85 0 1 0 1 0 1 0 1 128 1 0 0 0 0 0 0 0

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Open Transport Network BORA2500 Network Card

Table 11 Decimal - Binary Conversion (Part 2 of 2)

Deci Binary Decim Binary Decim Binary

mal 8 7 6 5 4 3 2 1 al 8 7 6 5 4 3 2 1 al 8 7 6 5 4 3 2 1
A A A A A A A A A A A A A A A A A A A A A A A A
129 1 0 0 0 0 0 0 1 172 1 0 1 0 1 1 0 0 215 1 1 0 1 0 1 1 1
130 1 0 0 0 0 0 1 0 173 1 0 1 0 1 1 0 1 216 1 1 0 1 1 0 0 0
131 1 0 0 0 0 0 1 1 174 1 0 1 0 1 1 1 0 217 1 1 0 1 1 0 0 1
132 1 0 0 0 0 1 0 0 175 1 0 1 0 1 1 1 1 218 1 1 0 1 1 0 1 0
133 1 0 0 0 0 1 0 1 176 1 0 1 1 0 0 0 0 219 1 1 0 1 1 0 1 1
134 1 0 0 0 0 1 1 0 177 1 0 1 1 0 0 0 1 220 1 1 0 1 1 1 0 0
135 1 0 0 0 0 1 1 1 178 1 0 1 1 0 0 1 0 221 1 1 0 1 1 1 0 1
136 1 0 0 0 1 0 0 0 179 1 0 1 1 0 0 1 1 222 1 1 0 1 1 1 1 0
137 1 0 0 0 1 0 0 1 180 1 0 1 1 0 1 0 0 223 1 1 0 1 1 1 1 1
138 1 0 0 0 1 0 1 0 181 1 0 1 1 0 1 0 1 224 1 1 1 0 0 0 0 0
139 1 0 0 0 1 0 1 1 182 1 0 1 1 0 1 1 0 225 1 1 1 0 0 0 0 1
140 1 0 0 0 1 1 0 0 183 1 0 1 1 0 1 1 1 226 1 1 1 0 0 0 1 0
141 1 0 0 0 1 1 0 1 184 1 0 1 1 1 0 0 0 227 1 1 1 0 0 0 1 1
142 1 0 0 0 1 1 1 0 185 1 0 1 1 1 0 0 1 228 1 1 1 0 0 1 0 0
143 1 0 0 0 1 1 1 1 186 1 0 1 1 1 0 1 0 229 1 1 1 0 0 1 0 1
144 1 0 0 1 0 0 0 0 187 1 0 1 1 1 0 1 1 230 1 1 1 0 0 1 1 0
145 1 0 0 1 0 0 0 1 188 1 0 1 1 1 1 0 0 231 1 1 1 0 0 1 1 1
146 1 0 0 1 0 0 1 0 189 1 0 1 1 1 1 0 1 232 1 1 1 0 1 0 0 0
147 1 0 0 1 0 0 1 1 190 1 0 1 1 1 1 1 0 233 1 1 1 0 1 0 0 1
148 1 0 0 1 0 1 0 0 191 1 0 1 1 1 1 1 1 234 1 1 1 0 1 0 1 0
149 1 0 0 1 0 1 0 1 192 1 1 0 0 0 0 0 0 235 1 1 1 0 1 0 1 1
150 1 0 0 1 0 1 1 0 193 1 1 0 0 0 0 0 1 236 1 1 1 0 1 1 0 0
151 1 0 0 1 0 1 1 1 194 1 1 0 0 0 0 1 0 237 1 1 1 0 1 1 0 1
152 1 0 0 1 1 0 0 0 195 1 1 0 0 0 0 1 1 238 1 1 1 0 1 1 1 0
153 1 0 0 1 1 0 0 1 196 1 1 0 0 0 1 0 0 239 1 1 1 0 1 1 1 1
154 1 0 0 1 1 0 1 0 197 1 1 0 0 0 1 0 1 240 1 1 1 1 0 0 0 0
155 1 0 0 1 1 0 1 1 198 1 1 0 0 0 1 1 0 241 1 1 1 1 0 0 0 1
156 1 0 0 1 1 1 0 0 199 1 1 0 0 0 1 1 1 242 1 1 1 1 0 0 1 0
157 1 0 0 1 1 1 0 1 200 1 1 0 0 1 0 0 0 243 1 1 1 1 0 0 1 1
158 1 0 0 1 1 1 1 0 201 1 1 0 0 1 0 0 1 244 1 1 1 1 0 1 0 0
159 1 0 0 1 1 1 1 1 202 1 1 0 0 1 0 1 0 245 1 1 1 1 0 1 0 1
160 1 0 1 0 0 0 0 0 203 1 1 0 0 1 0 1 1 246 1 1 1 1 0 1 1 0
161 1 0 1 0 0 0 0 1 204 1 1 0 0 1 1 0 0 247 1 1 1 1 0 1 1 1
162 1 0 1 0 0 0 1 0 205 1 1 0 0 1 1 0 1 248 1 1 1 1 1 0 0 0
163 1 0 1 0 0 0 1 1 206 1 1 0 0 1 1 1 0 249 1 1 1 1 1 0 0 1
164 1 0 1 0 0 1 0 0 207 1 1 0 0 1 1 1 1 250 1 1 1 1 1 0 1 0
165 1 0 1 0 0 1 0 1 208 1 1 0 1 0 0 0 0 251 Non allowed address
166 1 0 1 0 0 1 1 0 209 1 1 0 1 0 0 0 1 252 Non allowed address
167 1 0 1 0 0 1 1 1 210 1 1 0 1 0 0 1 0 253 Non allowed address
168 1 0 1 0 1 0 0 0 211 1 1 0 1 0 0 1 1 254 Non allowed address
169 1 0 1 0 1 0 0 1 212 1 1 0 1 0 1 0 0 255 Non allowed address
170 1 0 1 0 1 0 1 0 213 1 1 0 1 0 1 0 1
171 1 0 1 0 1 0 1 1 214 1 1 0 1 0 1 1 0

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5. OPTICAL SIGNAL DISTANCES LS Low Speed

MAC Media Access Control
See Ref. [4] in Table 2.
MSB Most Significant Bit
6. LIST OF ABREVIATIONS MTBF Mean Time Between Failures
NVRAM Non Volatile RAM
ARAM Allocation RAM OC-48 Optical Carrier for 2.5Gbps SONET
AC Alternate Current
OMS OTN Management System
BER Bit Error Rate
OOF Out Of Frame
BORA Broadband Optical Ring Adapter
OTN Open Transport Network
CRC Cyclic Redundancy Check
OTR Optical Transmitter and Receiver
DC Direct Current
RAM Random Access Memory
EOW Engineering Order Wire
RTOS Real-Time Operating System
EPLD Erasable Programmable Logic Device
SDH Synchronous Digital Hierarchy
ESD ElectroStatic Discharge SFP Small Form factor Pluggable
FPGA Field Programmable Gate Array SONET Synchronous Optical NETwork
GRIA Gigabit Ring Interface Adaptor STM-16 Synchronous Transport Mode for 2.5Gbps
HS High Speed SDH
IFC InterFace Card TRM Transceiver Module
LIU Line Interface Unit
LED Light Emitting Diode

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