Experiment 2: Single Phase Line - Short Line Investigation

Aims

To find the regulation and transmission voltage losses of a simple inductive line without shunt
capacitance, and to construct the relevant phasor diagram.

Transmission Line models:

Short Transmission Line Model:

Circuit Diagrm:

IS R1 XL IR

Line impedance

VS VR

Calculations:
Phasor Diagram:

arc Vd
Vs
V
d IRX

VR
IR R

φ
φS R

IR = I s

IS represents the sending end current which will be equal in magnitude to the load current IR. VR
represents the receiving end voltage whilst VS represents the sending end voltage which is given by
the phasor sum of the receiving end voltage and the voltage drop due to the line impedance.
The phasor diagram is constructed by drawing a reference phasor to represent the load current IR. If
the load is operating at a lagging power factor the phasor representing the receiving end voltage VR is
drawn to a suitable scale leading the current phasor by an angle φ R (the cosine of which represents
the load power factor).

By scribing arcs representing the sending end voltage VS, and the line voltage drop Vd (drawn to the
same scale as the receiving end voltage) the phasor diagram can be completed. The voltage drop
due to the line resistance is drawn ‘in phase’ (i.e. parallel to) with the current IR.

The voltage drop due to the line reactance is drawn leading the current IR by 90°, and hence the
effective values of line resistance and reactance can be estimated for a particular value of load
current.

Having determined the line parameters for a particular load current, calculation of the voltage drops
may be carried out to confirm the experimental results.

Using the results obtained the line regulation can be determined. This is defined as the percentage
rise in voltage at the receiving end when full load is thrown off, the sending end voltage remaining at a
constant value. It is therefore given by:
×
Vs – VR
100%
Regulation = -----------------

VR
Equipment required:

_________________________
____________________________
____________________________
____________________________
____________________________
____________________________
____________________________
____________________________

Procedure- Resistive load

______
Table:

Voltages, Currents and 100% Resistive Load 100% Resistive Load

Powers + 50% Inductive
Load

Sending Voltage (Vs)

Sending Current (Is)

Sending Power (Ws)

Receiving Voltage (VR)

Receiving Current (IR)

Receiving Power (WR)

Line Volt Drop (Vd)

Conclusion/Results:

______