Professional Documents
Culture Documents
Confidential
Cont..
Saturation Region: the drain current remains almost constant. (As the drain
voltage is increased further beyond (Vgs-Vt) the pinch off point starts to move
from the drain end to the source end)
Confidential
n-Mos Fabrication (Preparation of Silicon Die)
Steps 1-3
Confidential
Cont..
Steps 4-5
Confidential
Cont..
Steps 6-9
Confidential
Diffusion Process
Diffusion
Confidential
n-MOS fabrication process
Substrate
Confidential
n-MOS fabrication process
SiO2
Substrate
Confidential
Cont….
Photo-Resist
SiO2
Substrate
Confidential
Cont…
Photo-Mask
Photo-Resist
SiO2
Substrate
Confidential
Cont….
SiO2
Substrate
Confidential
Cont…
SiO2 SiO2
Substrate
Confidential
Polysilicon on thin oxide
Thin layer of SiO2(0.1µm) grown and then polysilicon is
deposited on top to form gate structure.
SiO2
Poly Si
Thinox
Substrate
Confidential
Metallization
SiO2 Poly Si
Thinox
n n
Substrate
Confidential
Cont…..
SiO2
Poly Si
Thinox
n n
Substrate
Confidential
Cont…
SiO2
Poly Si
Thinox
n n
Substrate
Confidential
• When we need to fabricate both nMOS
and pMOS transistors on the same
substrate we need to follow different
processes.
• The three different processes are , P-
well process ,N-well process and Twin
tub process.
Confidential
CMOS P-well Fabrication
Steps 1-4
Confidential
Cont..
Confidential
Summary of P-well Process
Mask sequence
Mask 1: Defines the areas in which the deep p-well diffusion takes place.
Mask 2: Defines the thin oxide region (where the thick oxide is to be removed or
stripped and thin oxide grown)
Mask 3: It’s used to pattern the polysilicon layer which is deposited after thin
oxide.
Mask 4: A p+ mask (anded with mask 2) to define areas where
p-diffusion is to take place.
Mask 5: We are using the –ve form of mask 4 (p- mask) It
defines where n-diffusion is to take place.
Mask 6: Contact cuts are defined using this mask.
Mask 7: The metal layer pattern is defined by this mask.
Mask 8: An overall passivation (over glass) is now applied and it also defines
openings for accessing pads.
Confidential
Substrate and Well taps or Contacts:
The substrate must be tied to a lower potential to avoid
forward biasing the p-n junction between the p-substrate
and n+ NMOS source or drain.
p+ diffusion
n+ diffusion
Contact cuts
Confidential
Bi-CMOS Technology
Confidential
Comparison between CMOS and Bipolar technologies
Confidential