HP 15-Da Series - Compal Epk50 La-G07dp La-G07ep Schematic

A B C D E
1 1
Intel M/B Schematics Document

Kabylake-U(2+2)-DDR4 SODIMMx2 (1.2mm_6L)
2 2
nVidia N16 gDDR5-2GB

(N16S-GTR : GM108-670/770: GeForce MX130)
(N16V-GMR1 : GM108-626/726:GeForce MX110)
Date :2018-01-08
Version : v0.3
3
Project : 2018OPP_Harry Potter(15.6") 3
EPK50 :LA-G07DP (EPS50 :SKLU_4G:LA-G071P)

(EPS50 :SKLU_2G:LA-G072P)
(EPK52 :LA-G07EP=>v0.2 for PV)

(EPK50 :KBLU_4G:LA-G079P)
(EPK50 :KBLU_2G:LA-G07AP)
(EPK52 :KBLR_4G:LA-G07BP)
DIS
(EPK52 :KBLR_2G:LA-G07CP)
(EPK50 :KBLU:LA-G07DP)
(EPK52 :KBLR:LA-G07EP) UMA
(Modified&Ref from: 01."NFLC_KBLR_LAE802PR10_MV_FINAL")
(02."Canadiens_LA-F035P-R10_KBL-UR_2017-06-23_CPU")
(02."CNL-U ORB_DDX02_LA-F152PR01_0822B")
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2015/10/22 Deciphered Date 2017/10/22 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-G07DP(KBL-U_UMA_6L) v0.3
Date: Monday, January 08, 2018 Sheet 1 of 59

A B C D E
A B C D E
UV6 UV7 ChA:JDI MM1(REV)

UV1 UC1 ChB:JDI MM2(STD)
UV8 UV9(for 4GB)
VRAM nVidia PCIex4 DDR4-SO-DIMM X 2
gDDR5x4pcs N16S-GTR (MX130)
Port #1~#4 Dual Channel Interleaved
N16V-GMR1 P.17~18
256Mbx32 (MX110)
PCIe 3.0:8Gb/s
(8Gb) DDR4 2133MHz 1.2V
P. 2 5 P.19~26
1 1
JHDD
Kaby Lake-RU42 SATA 3.0 Port 0
P.30 2.5" SATA HDD *sub board
LS-G072P
(sub board) DA4002LZ000
JEDP
eDPx2Lane JODD *sub board
eDP CONN SATA 3.0 Port 1 M.2 SATA SSD LS-G074P
P. 2 7 SATA ODD P. 3 0 (sub board) DA6001WR00S
*sub board
JHDMI eMMC
(sub board)
LS-G075P
JSSD DA6001WS00S
HDMI CONN DDI x4Lane Port 1
PCIe 3.0: 8Gb/s PCIe x2 M.2 SSD(Key M)
P. 2 8 1356P BGA Port #11~#12
NVMe P. 1 9
*need supported Intel Optane (3D Xpoint)
SATA 3.0 Port 2

JLAN UL1
RJ45 CONN LAN PCIex1 Port #5
P. 2 9 RTL8111HSH-CG P.29 PCIe Gen1 Only:2.5Gb/s
2 JWLAN USB3.0 2
NGFF WLAN+BT PCIex1 Port #6 5Gb/s

(Key E) PCIe Gen1 Only:2.5Gb/s
P. 3 0
JUSB1
USB2.0 Port 1 USB3.0 port Port 1
480Mb/s P. 3 0
JUSB2
Port 2 Port 2
USB3.0 port P. 3 1
JIO
Port 3
USB2.0 Port P. 3 1
*sub board
PUB1 PJPB1 LS-G071PR01
Port 4 Card Reader DA6001WJ000
Charger Battery AK6485RB63-GLF-GR P. 2 9
(sub board)
P.47 P. 4 6
UK1
JEDP
SMBus1
EC ENE LPC Port 5 Camera P. 2 7
3 KB9022QD 33MHz 3
SMBus2
P.33 JWLAN
Port 6
UV1 UC3 Bluetooth
PS2 P. 3 0
dGPU Thermal sensor JKB JTP
G753T11U Int.KBD TouchPad JEDP
P. 2 2 P. 1 0 SMBus Port 7
P. 3 4 P.34 Touch Screen P. 2 7
*sub board
JFAN JKBL LS-G073PR01
DA4002M0000
Fan KB light
75x70 P.38 P.34 SPI UA1 JSPK
50MHz
UC2 HDA 24MHz HDA Aduio codec Internal SPK P.32
SPI ROM ALC3247-CG
8MBytes P.07 P.32 JHP
Combo Jack
P.32
UT1
TPM
MB Board Information:
SLB9670VQ2.0
4 01.DA8001EG000, PCB 29I LA-G071P
02.DA6001WL000, PCB 29I LA-G072P
REV0
REV0
MB
MB
3(SKLU_4G)
3(SKLU_2G)
P. 3 5 4
03.DA8001EH000, PCB 29M LA-G079P REV0 MB 3(KBLU_4G)

04.DA6001WM000, PCB 29M LA-G07AP REV0 MB 3(KBLU_2G)
05.DA8001EI000, PCB 29L LA-G07BP REV0 MB 3(KBLR_4G)
06.DA6001WI000, PCB 29L LA-G07CP REV0 MB 3(KBLR_2G)
07.DA6001YA000, PCB 29M LA-G07DP REV0 MB 3(KBLU_UMA)
08.DA6001YB000, PCB 29L LA-G07EP REV0 MB 3(KBLR_UMA)
Sub Board Information:(EPK52) Security Classification Compal Secret Data Compal Electronics, Inc.
01.DA6001WJ000, PCB 29L LS-G071P REV0 IOB(435OM832L01)
02.DA4002LZ000, PCB 29L LS-G072P REV0 HDDB(435OM932L01) Issued Date 2017/08/24 Deciphered Date 2018/08/24 Title
03.DA4002M0000, PCB 29L LS-G073P REV0 TOUCH PADB(435OMA32L01) Block Diagrams
04.DA6001WR00S, PCB 29L LS-G074P REV0 SSDB(435OMB32L01) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
05.DA6001WS00S, PCB 29L LS-G075P REV0 eMMCB AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom v0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-G07DP(KBL-U_UMA_6L)
Date: Monday, January 08, 2018 Sheet 2 of 59
A B C D E
A B C D E
Power rail Control (EC) Source (CPU)

EC SMBUS Address Table (TBC)
+RTCVCC X X SOC SMBUS Address Table
VIN X X Address (8bit) EC_SMBUS Port Power Rail Device Address (7 bit)
BATT+ X X SOC_SMBUS Net Name Power Rail Device Address (7 bit)
Write Read
B+ X X BAT 0x16
+VL X X DIMM1 0x50 0xA0 0xA1
SMBCLK SMBUS Port 1 +3VL_EC
+3VL X X SMBDATA +3V_PRIM DIMM2 0x52 0xA4 0xA5 CHGR 0x12
+5VALW EC_ON X
Touch PAD 0x2C 0x58 0x59
+3VALW EC_ON X dGPU
1
+3VALW_EC EC_ON X 1
+3V_PCH PCH_PWR_EN X Thermal

SMBUS Port 2 +3VS Sensor 0x90
+1.2V_VDDQ SYSON PM_SLP_S5#/PM_SLP_S4# i3_7100U_R1@ i3_7100U_R3@ MX110@ MX130@
+5VS SUSP# PM_SLP_S3# PCH

UC1 UC1 UV1 UV1
+3VS SUSP# PM_SLP_S3#
+1.5VS SUSP# PM_SLP_S3# i3_7100U i3_7100U N16V-GMR1-S-A2 N16S-GTR-S-A2
SA0000A38H0 SA0000A38J0 SA00009IT00 SA00009FP00
+1.05VS SUSP# PM_SLP_S3# S IC FJ8067702739738 SR343 H0 2.4G BGA S IC FJ8067702739738 SR343 H0 2.4G A32! S IC N16V-GMR1-S-A2 BGA 595P S IC N16S-GTR-S-A2 BGA 595P GPU
+0.6V_0.6VS SUSP#
+VCC_CORE X VR12.5_VR_ON U_i5_7200U_SR342@ i5_7200U_R3@ ZZZ ZZZ ZZZ ZZZ Power State
SIGNAL
UC1 UC1 2G Micron 2G Micron 4G Micron 4G Micron STATE SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
S0 (Full ON) HIGH HIGH HIGH ON ON ON ON
BOM Structure Table (1/2) U_SI_i5-7200U_SR342 H0 2.5G
SA0000A37H0
i5_7200U
SA0000A37J0
M2G_R1@
X7674032L01
M2G_R3@
X7674032L06
M4G_R1@
X7674032L26
M4G_R3@
X7674032L29
S IC FJ8067702739739 SR342 H0 2.5G BGA S IC FJ8067702739739 SR342 H0 2.5G A32! S3 (Suspend to RAM) LOW HIGH HIGH ON ON OFF OFF
Function Stuff Un-Stuff
U_i7_7500U_SR341@ i7_7500U_R3@ ZZZ ZZZ ZZZ ZZZ
S4 (Suspend to Disk) LOW LOW HIGH ON OFF OFF OFF
DGPU SKU PX@
UMA SKU UMA@ UC1 UC1 2G Hynix 2G Hynix 4G Hynix 4G Hynix
S5 (Soft OFF) LOW LOW LOW ON OFF OFF OFF
TPM TPM@
U_SI_i7-7500U_SR341 H0 2.7G i7_7500U H2G_R1@ H2G_R3@ H4G_R1@ H4G_R3@
SA0000A34F0 SA0000A34H0 X7674032L04 X7674032L07 X7674032L25 X7674032L28
S IC FJ8067702739740 SR341 H0 2.7G BGA S IC FJ8067702739740 SR341 H0 2.7G A32! <USB2.0 port>
45@ ROYALTY HDMI W/LOGO
ZZZ ZZZ ZZZ ZZZ

Part Number Description USB2.0 port DESTINATION
R_i5_8250U_QNEF@ i5_8250U_R3@ RO0000002HM HDMI W/Logo:RO0000002HM
2
2G Samsung 2G Samsung 4G Samsung 4G Samsung RO0000003HM 1 USB3.0 Type-C 2
UC1 UC1 2 USB2.0/USB3.0

R_i3_7020U_QN96@ R_i3_8130U_QP8K@ S2G_R1@ S2G_R3@ S4G_R1@ S4G_R3@
R_SI_i5_8250U_QNEF Y0 1.6G i5_8250U X7674032L05 X7674032L08 X7674032L27 X7674032L30 3 USB2.0/USB3.0
SA0000AWB10 SA0000AWB30
UC1 UC1 S IC FJ8067703282221 SR3LA Y0 1.6G FCBGA S IC FJ8067703282221 SR3LA Y0 1.6G A32! 4 BT
5 HD/IR_1/IR_2 Camera
R_SI_i3_7020U_QN96 Y0 2.3G R_SI_i3-8130U_QP8K Y0 2.2G
SA0000BLD00 SA0000BKN10 R_i7_8550U_SR3LC@ i7_8550U_R3@ 6 IR_2 Camera
S IC A32 FJ8067703282620 QN96 Y0 2.3G
S IC A32 FJ8067703282227 QP8K Y0 2.2G
7 Card Reader
R_i7_8550U_QNBF@ U_i3_7020U_QNZU@ UC1 UC1 DAX DAX DAX DAX ZZZ
8 X
UC1 UC1 R_SI_i7-8550U_SR3LC Y0 1.8G i7_8550U KBLU-2G KBLR-2G KBLU-4G KBLR-4G EMC for EE 9 X
SA0000AWC20 SA0000AWC30
S IC FJ8067703281816 SR3LC Y0 1.8G FCBGA S IC FJ8067703281816 SR3LC Y0 1.8G A32! 10 X
R_SI_i7_8550U_QNBF Y0 1.8G U_SI_i3-7020U_QNZU H0 2.3G KBLU_2G@ KBLR_2G@ KBLU_4G@ KBLR_4G@ X4E@
SA0000AWC10 SA0000BLH00 DA6001WM000 DA6001WI000 DA8001EH000 DA8001EI000 X4EABB32L01
S IC A32 FJ8067703281816 QNBF Y0 1.8G
S IC A32 FJ8067702739769 QNZU H0 2.3G PCB 29M LA-G07AP REV0 MB 3 PCB 29L LA-G07CP REV0 MB 3 SMT EMC FOR EE AG07C EPK52 <PCI-E,SATA,USB3.0/CLK>
ZZZ ZZZ ZZZ ZZZ
Lane# PCI-E SATA USB3.0 DESTINATION CLK
DAZ_U2G DAZ_R2G DAZ_U4G DAZ_R4G
+3V_PRIM 1 1 USB3.0 Type-C X
+3VS DAZ_U2G@ DAZ_R2G@ DAZ_U4G@ DAZ_R4G@
UC1 SO-DIMM A DAZ23T00600 DAZ23T00500 DAZ23T00600 DAZ23T00500 2 2 USB3.0 Type-C X
+3V_PRIM
SMBCLK
R=1K R=10K
PCH_SMBCLK
3 3 USB2.0/USB3.0 X
DAX DAX
R7 SMBDATA 2N7002 PCH_SMBDATA 4 4 USB2.0/USB3.0 X
R8 SO-DIMM B
KBLU-UMA KBLR-UMA 5 1 5 GPU(DIS only) CLK0
+3V_PRIM
+3VALW 6 2 6 GPU(DIS only)
KBLU_UMA@ KBLR_UMA@
+3V_PRIM 7 3 GPU(DIS only)
3
CPU R9
W2
SML0CLK
SML0DATA
R=499
2N7002
R=10K
TP_SMBCLK
TP_SMBDAT
Touch Pad
DA6001YA000 DA6001YB000
PCB 29M LA-G07DP REV0 M/B 3 PCB 29L LA-G07EP REV0 M/B 3
8
9
4
5
GPU(DIS only)
LAN CLK1
3
10 6 WLAN CLK2
11 7 0 HDD X
+3V_PRIM +3VS +3VS +3VS_DGPU_AON
12 8 1a ODD CLK3
13 9 X X
SML1CLK
R=1K R=2.2K +3VS_DGPU_AON
W3
@ 14 10 X X
SML1DATA
V3 2N7002
EC_SMB_CK2
15 11 1b* X CLK4
NVMe x2
EC_SMB_DA2
R=2.2K
16 12 2 SATA SSD X
PX@
U6 2N7002 DGPU
U7 I2CS_SCL
I2CS_SDA
U9 Thermal Sensor :G753T11U

U8
Address : 0x48
UK1:+3VALW_EC (+3VL)
EC_SMB_CK2
EC_SMB_DA2
4
79 4
80
EC +3V_SMBUS
R=2.2K
R=0
GSEN_I2DAT
GSEN_I2CLK G-Sensor
HP2DC
EC_SMB_CK1
77 EC_SMB_DA1
78 R=100 BAT
Charger THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
Custom v0.3
Date: Friday, January 05, 2018 Sheet 3 of 59
A B C D E
5 4 3 2 1
[Diner-PWR Sequence_SKL-U22_DDR3L_Volume_NON CS]
G3->S0 S0->S3/DS3 S0/ DS3 ->S0 S0->S5

+3VL_RTC +3VL_RTC
tPCH01_Min : 9 ms
SOC_RTCRST# SOC_RTCRST#
+19VB +19VB
+3VLP/+5VLP +3VLP/+5VLP
D D
EC_ON EC_ON
tPCH04_Min : 9 ms
+5VALW/+3VALW/+3VALW_DSW +5VALW/+3VALW/+3VALW_DSW
Pull-up to DSW well if not implemented.
PM_BATLOW# PM_BATLOW#
PCH_PWR_EN (SLP_SUS#) PCH_PWR_EN (SLP_SUS#)
+3V_PRIM +3V_PRIM
+1.8V_PRIM +1.8V_PRIM
EXT_PWR_GATE# If EXT_PWR_GATE# Toffmin is too small, Pwr EXT_PWR_GATE#

gate may choose to completely ignore it
+1.0V_MPHYPLL +1.0V_MPHYPLL
+1.0V_PRIM_CORE +1.0V_PRIM_CORE
tPCH34_Max : 20 ms
+1.0V_PRIM tPCH06_Min : 200 us +1.0V_PRIM
SUSACK# SUSACK#
tPCH02_Min : 10 ms
PCH_DPWROK PCH_DPWROK
tPCH03_Min : 10 ms
EC_RSMRST# EC_RSMRST#
tPLT02_Min : 0 ms Max : 90 ms
AC_PRESENT AC_PRESENT
C C
ON/OFF ON/OFF
PBTN_OUT# PBTN_OUT#
Minimum duration of PWRBTN# assertion = 16mS. PWRBTN# can assert before or after RSMRST#
PM_SLP_S5# PM_SLP_S5#
tPCH18_Min : 90 us
ESPI_RST# ESPI_RST#
SYSON SYSON
+1.0V_VCCST/+1.0V_VCCSFR +1.0V_VCCST/+1.0V_VCCSFR
+1.35V_VDDQ/+1.35V_VCCSFR_OC +1.35V_VDDQ/+1.35V_VCCSFR_OC
SUSP# SUSP#
tCPU04 Min : 100 ns
+1.0VS_VCCSTG +1.0VS_VCCSTG
tCPU10 Min : 1 ms
+1.0VS_VCCIO +1.0VS_VCCIO
+5VS/+3VS/+1.5VS/+1.05VS
B +5VS/+3VS/+1.5VS/+1.05VS B
T4 = Min : 20ms Max : 30ms(EC Control)

EC_VCCST_PG EC_VCCST_PG
VR_ON VR_ON
tCPU19 Max : 100 ns
SM_PG_CTRL SM_PG_CTRL
tCPU18 Max : 35 us
+0.675VS_VTT +0.675VS_VTT
tCPU09 Min : 1 ms
+VCC_SA +VCC_SA
+VCC_CORE +VCC_CORE
+VCC_GT +VCC_GT
VR_PWRGD VR_PWRGD
tCPU16 Min : 0 ns
PCH_PWROK PCH_PWROK
H_CPUPWRGD H_CPUPWRGD
SYS_PWROK SYS_PWROK
SUS_STAT# SUS_STAT#
A SOC_PLTRST# A
SOC_PLTRST#

Issued Date Title
Deciphered Date
HW Reserve
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom v0.3
5 4 3 2 1
A B C D E
UC1A SKL-U
Rev_0.53
<28> HOST_DP1_N0 E55 C47
DDI1_TXN[0] EDP_TXN[0] EDP_TXN0 <27>
<28> HOST_DP1_P0 F55 C46
DDI1_TXP[0] EDP_TXP[0] EDP_TXP0 <27>
<28> HOST_DP1_N1 E58 D46 <eDP>
DDI1_TXN[1] EDP_TXN[1] EDP_TXN1 <27>
<HDMI> <28> HOST_DP1_P1 F58 C45
DDI1_TXP[1] EDP_TXP[1] EDP_TXP1 <27>
SOC_DP1_CTRL_DATA(Internal Pull Down): <28> HOST_DP1_N2 F53 A45
G53 DDI1_TXN[2] EDP_TXN[2] B45
<28> HOST_DP1_P2 DDI1_TXP[2] EDP_TXP[2]
<28> HOST_DP1_N3 F56 A47
DDI1_TXN[3] EDP_TXN[3]
Display Port B Detected <28> HOST_DP1_P3 G56
DDI1_TXP[3] EDP_TXP[3]
B47
C50 E45
0 = Port B is not detected. D50 DDI2_TXN[0] DDI EDP EDP_AUXN F45
EDP_AUXN <27>
1 DDI2_TXP[0] EDP_AUXP EDP_AUXP <27> 1
C52
D52 DDI2_TXN[1] B52
1 = Port B is detected. A50 DDI2_TXP[1] EDP_DISP_UTIL
B50 DDI2_TXN[2] G50
D51 DDI2_TXP[2] DDI1_AUXN F50
C51 DDI2_TXN[3] DDI1_AUXP E48
SOC_DP2_CTRL_DATA(Internal Pull Down): DDI2_TXP[3] DDI2_AUXN F48
DDI2_AUXP G46
DDI3_AUXN
Display Port C Detected DISPLAY SIDEBANDS
DDI3_AUXP
F46
HOST_DP1_CTRL_CLK L13
<28> HOST_DP1_CTRL_CLK GPP_E18/DDPB_CTRLCLK From HDMI
HDMI DDC (Port B) HOST_DP1_CTRL_DATA L12 L9 HOST_DP1_HPD HOST_DP1_HPD <28>
0 = Port C is not detected. <28> HOST_DP1_CTRL_DATA GPP_E19/DDPB_CTRLDATA GPP_E13/DDPB_HPD0 L7 DDI2_HPD
N7 GPP_E14/DDPC_HPD1 L6 NMI_DBG#_CPU TP@ T408
GPP_E20/DDPC_CTRLCLK GPP_E15/DDPD_HPD2 NMI_DBG#_CPU <10,33>
1 = Port C is detected. N8 N9 EC_SCI#
GPP_E21/DDPC_CTRLDATA GPP_E16/DDPE_HPD3 EC_SCI# <33> From eDP
L10 EDP_HPD EDP_HPD <27>
N11 GPP_E17/EDP_HPD
N12 GPP_E22/DDPD_CTRLCLK R12 ENBKL
GPP_E23/DDPD_CTRLDATA EDP_BKLTEN ENBKL <33>
R11
EDP_BKLTCTL BKL_PWM_CPU <27>
EDP_COMP E52 1 OF 20 U13 ENVDD_CPU
EDP_RCOMP EDP_VDDEN ENVDD_CPU <27>
SKL-U_BGA1356
+1.0V_VCCST
+1.0V_PRIM RC123 1 @ 2 100K_0402_5% ENVDD_CPU
1
1 2 H_THERMTRIP#
RC2 1K_0402_5% RC3 UC1D SKL-U RC124 1 2 100K_0402_5% ENBKL
1K_0402_5% Rev_0.53
T248 TP@ CATERR# D63
2 H_PECI A54 CATERR# 2
<33> H_PECI
2
1 2 H_PROCHOT#_R C65 PECI
<33> PROCHOT# PROCHOT# JTAG
COMPENSATION PU FOR eDP RC4 499_0402_1% H_THERMTRIP# C63
A65 THERMTRIP# B61 CPU_XDP_TCK0
+1.0V_PRIM SKTOCC# PROC_TCK D60 SOC_XDP_TDI
CPU MISC PROC_TDI
1
C55 A61 SOC_XDP_TDO
DS11 D55 BPM#[0] PROC_TDO C60 SOC_XDP_TMS
RC1 1 2 EDP_COMP B54 BPM#[1] PROC_TMS B59 SOC_XDP_TRST#
CK0402101V05_0402-2 BPM#[2] PROC_TRST#
24.9_0402_1% ESD@ C56
BPM#[3] B56 PCH_JTAG_TCK1
CAD note: PCH_JTAG_TCK
Trace width=20 mils,Spacing=25mil,Max length=100mils SCV00001K00 A6 D59 SOC_XDP_TDI
2
A7 GPP_E3/CPU_GP0 PCH_JTAG_TDI A56 SOC_XDP_TDO

BA5 GPP_E7/CPU_GP1 PCH_JTAG_TDO C59 SOC_XDP_TMS
AY5 GPP_B3/CPU_GP2 PCH_JTAG_TMS C61 SOC_XDP_TRST#
GPP_B4/CPU_GP3 PCH_TRST# A59 CPU_XDP_TCK0
RC5 2 1 49.9_0402_1% CPU_POPIRCOMP AT16 JTAGX
RC6 2 1 49.9_0402_1% PCH_OPIRCOMP AU16 PROC_POPIRCOMP
RC7 2 1 49.9_0402_1% EDRAM_OPIO_RCOMP H66 PCH_OPIRCOMP
RC8 2 1 49.9_0402_1% EOPIO_RCOMP H65 OPCE_RCOMP
OPC_RCOMP
4 OF 20
SKL-U_BGA1356
XDP CONN
3 3
+1.0V_PRIM
RC11 2 @ 1 51_0402_5% SOC_XDP_TMS
RC13 2 @ 1 51_0402_5% SOC_XDP_TDI
RC15 2 1 51 +-1% 0402 SOC_XDP_TDO SD000008H80
RC364 2 @ 1 51_0402_5% CPU_XDP_TCK0
+1.0V_PRIM
RC14 2 @ 1 51_0402_5% XDP_PREQ# XDP_PREQ# <11>
RC31 1 @ 2 1K_0402_5% XDP_ITP_PMODE XDP_ITP_PMODE <16>
4 RC365 2 @ 1 51_0402_1% SOC_XDP_TRST# 4
RC35 2 1 51_0402_1% CPU_XDP_TCK0 SD000008H80
RC37 2 @ 1 51_0402_5% PCH_JTAG_TCK1
RC366 1 @ 2 0_0402_5% CFG3 CFG3 <16> Security Classification

2017/04/10
Compal Secret Data
2019/12/15 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
SKL-U(1/12)DDI,MSIC,XDP,EDP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom v0.3
A B C D E
5 4 3 2 1
Interleaved Memory Interleaved Memory

D
<Cocoa_1020> D
PDG#543016, ODT: CPU side no connect, DRAM side connect to VDDQ(Memory down); FET+R(SO-DIMM)
SKL-U
UC1B SKL-U UC1C
Rev_0.53 Rev_0.53
AU53 DDR_M0_CLK#0 DDR_M0_CLK#0 <17>
<17> DDR_M0_D[0..15] DDR0_CKN[0] <18> DDR_M1_D[0..15]
DDR_M0_D0 AL71 AT53 DDR_M0_CLK0 DDR_M0_CLK0 <17> DDR_M1_D0 AF65 AN45 DDR_M1_CLK#0 DDR_M1_CLK#0 <18>
DDR_M0_D1 AL68 DDR0_DQ[0] DDR0_CKP[0] AU55 DDR_M0_CLK#1 DDR_M1_D1 AF64 DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKN[0] AN46 DDR_M1_CLK#1
DDR0_DQ[1] DDR0_CKN[1] DDR_M0_CLK#1 <17> DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[1] DDR_M1_CLK#1 <18>
DDR_M0_D2 AN68 AT55 DDR_M0_CLK1 DDR_M0_CLK1 <17> DDR_M1_D2 AK65 AP45 DDR_M1_CLK0 DDR_M1_CLK0 <18>
DDR_M0_D3 AN69 DDR0_DQ[2] DDR0_CKP[1] DDR_M1_D3 AK64 DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKP[0] AP46 DDR_M1_CLK1
DDR0_DQ[3] DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKP[1] DDR_M1_CLK1 <18>
DDR_M0_D4 AL70 BA56 DDR_M0_CKE0 DDR_M0_CKE0 <17> DDR_M1_D4 AF66
DDR_M0_D5 AL69 DDR0_DQ[4] DDR0_CKE[0] BB56 DDR_M0_CKE1 DDR_M1_D5 AF67 DDR1_DQ[4]/DDR0_DQ[20] AN56 DDR_M1_CKE0
DDR0_DQ[5] DDR0_CKE[1] DDR_M0_CKE1 <17> DDR1_DQ[5]/DDR0_DQ[21] DDR1_CKE[0] DDR_M1_CKE0 <18>
DDR_M0_D6 AN70 AW56 DDR_M1_D6 AK67 AP55 DDR_M1_CKE1 DDR_M1_CKE1 <18>
DDR_M0_D7 AN71 DDR0_DQ[6] DDR0_CKE[2] AY56 DDR_M1_D7 AK66 DDR1_DQ[6]/DDR0_DQ[22] DDR1_CKE[1] AN55
DDR_M0_D8 AR70 DDR0_DQ[7] DDR0_CKE[3] DDR_M1_D8 AF70 DDR1_DQ[7]/DDR0_DQ[23] DDR1_CKE[2] AP53
DDR_M0_D9 AR68 DDR0_DQ[8] AU45 DDR_M0_CS#0 DDR_M1_D9 AF68 DDR1_DQ[8]/DDR0_DQ[24] DDR1_CKE[3]
DDR0_DQ[9] DDR0_CS#[0] DDR_M0_CS#0 <17> DDR1_DQ[9]/DDR0_DQ[25]
DDR_M0_D10AU71 AU43 DDR_M0_CS#1 DDR_M0_CS#1 <17> DDR_M1_D10AH71 BB42 DDR_M1_CS#0 DDR_M1_CS#0 <18>
DDR_M0_D11AU68 DDR0_DQ[10] DDR0_CS#[1] AT45 DDR_M0_ODT0 DDR_M1_D11AH68 DDR1_DQ[10]/DDR0_DQ[26] DDR1_CS#[0] AY42 DDR_M1_CS#1
DDR0_DQ[11] DDR0_ODT[0] DDR_M0_ODT0 <17> DDR1_DQ[11]/DDR0_DQ[27] DDR1_CS#[1] DDR_M1_CS#1 <18>
DDR_M0_D12AR71 AT43 DDR_M0_ODT1 DDR_M0_ODT1 <17> DDR_M1_D12 AF71 BA42 DDR_M1_ODT0 DDR_M1_ODT0 <18>
DDR_M0_D13AR69 DDR0_DQ[12] DDR0_ODT[1] DDR_M1_D13 AF69 DDR1_DQ[12]/DDR0_DQ[28] DDR1_ODT[0] AW42 DDR_M1_ODT1
DDR0_DQ[13] DDR1_DQ[13]/DDR0_DQ[29] DDR1_ODT[1] DDR_M1_ODT1 <18>
DDR_M0_D14AU70 BA51 DDR_M0_MA5 DDR_M0_MA5 <17> DDR_M1_D14AH70
DDR_M0_D15AU69 DDR0_DQ[14] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] BB54 DDR_M0_MA9 DDR_M1_D15AH69 DDR1_DQ[14]/DDR0_DQ[30] AY48 DDR_M1_MA5
<17> DDR_M0_D[16..31] DDR0_DQ[15] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] DDR_M0_MA9 <17> <18> DDR_M1_D[16..31] DDR1_DQ[15]/DDR0_DQ[31] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] DDR_M1_MA5 <18>
DDR_M0_D16BB65 BA52 DDR_M0_MA6 DDR_M0_MA6 <17> DDR_M1_D16 AT66 AP50 DDR_M1_MA9 DDR_M1_MA9 <18>
DDR_M0_D17AW65 DDR0_DQ[16]/DDR0_DQ[32] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] AY52 DDR_M0_MA8 DDR_M1_D17AU66 DDR1_DQ[16]/DDR0_DQ[48] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] BA48 DDR_M1_MA6
DDR0_DQ[17]/DDR0_DQ[33] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] DDR_M0_MA8 <17> DDR1_DQ[17]/DDR0_DQ[49] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] DDR_M1_MA6 <18>
DDR_M0_D18AW63 AW52 DDR_M0_MA7 DDR_M0_MA7 <17> DDR_M1_D18AP65 BB48 DDR_M1_MA8 DDR_M1_MA8 <18>
DDR_M0_D19AY63 DDR0_DQ[18]/DDR0_DQ[34] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] AY55 DDR_M0_BG0 DDR_M1_D19AN65 DDR1_DQ[18]/DDR0_DQ[50] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] AP48 DDR_M1_MA7
DDR0_DQ[19]/DDR0_DQ[35] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] DDR_M0_BG0 <17> DDR1_DQ[19]/DDR0_DQ[51] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] DDR_M1_MA7 <18>
DDR_M0_D20BA65 AW54 DDR_M0_MA12 DDR_M0_MA12 <17> DDR_M1_D20AN66 AP52 DDR_M1_BG0 DDR_M1_BG0 <18>
DDR_M0_D21AY65 DDR0_DQ[20]/DDR0_DQ[36] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] BA54 DDR_M0_MA11 DDR_M1_D21AP66 DDR1_DQ[20]/DDR0_DQ[52] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] AN50 DDR_M1_MA12
DDR0_DQ[21]/DDR0_DQ[37] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] DDR_M0_MA11 <17> DDR1_DQ[21]/DDR0_DQ[53] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] DDR_M1_MA12 <18>
DDR_M0_D22BA63 BA55 DDR_M0_ACT# DDR_M0_ACT# <17> DDR_M1_D22 AT65 AN48 DDR_M1_MA11 DDR_M1_MA11 <18>
DDR_M0_D23BB63 DDR0_DQ[22]/DDR0_DQ[38] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# AY54 DDR_M0_BG1 DDR_M1_D23AU65 DDR1_DQ[22]/DDR0_DQ[54] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] AN53 DDR_M1_ACT#
DDR0_DQ[23]/DDR0_DQ[39] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] DDR_M0_BG1 <17> DDR1_DQ[23]/DDR0_DQ[55] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# DDR_M1_ACT# <18>
DDR_M0_D24BA61 DDR_M1_D24 AT61 AN52 DDR_M1_BG1 DDR_M1_BG1 <18>
DDR_M0_D25AW61 DDR0_DQ[24]/DDR0_DQ[40] AU46 DDR_M0_MA13 DDR_M1_D25AU61 DDR1_DQ[24]/DDR0_DQ[56] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
C DDR0_DQ[25]/DDR0_DQ[41] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] DDR_M0_MA13 <17> DDR1_DQ[25]/DDR0_DQ[57] C
DDR_M0_D26BB59 AU48 DDR_M0_MA15_CAS# DDR_M0_MA15_CAS# <17> DDR_M1_D26AP60 BA43 DDR_M1_MA13 DDR_M1_MA13 <18>
DDR_M0_D27AW59 DDR0_DQ[26]/DDR0_DQ[42] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] AT46 DDR_M0_MA14_WE# DDR_M1_D27AN60 DDR1_DQ[26]/DDR0_DQ[58] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] AY43 DDR_M1_MA15_CAS#
DDR0_DQ[27]/DDR0_DQ[43] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] DDR_M0_MA14_WE# <17> DDR1_DQ[27]/DDR0_DQ[59] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] DDR_M1_MA15_CAS# <18>
DDR_M0_D28BB61 AU50 DDR_M0_MA16_RAS# DDR_M0_MA16_RAS# <17> DDR_M1_D28AN61 AY44 DDR_M1_MA14_WE# DDR_M1_MA14_WE# <18>
DDR_M0_D29AY61 DDR0_DQ[28]/DDR0_DQ[44] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] AU52 DDR_M0_BA0 DDR_M1_D29AP61 DDR1_DQ[28]/DDR0_DQ[60] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] AW44 DDR_M1_MA16_RAS#
DDR0_DQ[29]/DDR0_DQ[45] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] DDR_M0_BA0 <17> DDR1_DQ[29]/DDR0_DQ[61] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] DDR_M1_MA16_RAS# <18>
DDR_M0_D30BA59 AY51 DDR_M0_MA2 DDR_M0_MA2 <17> DDR_M1_D30 AT60 BB44 DDR_M1_BA0 DDR_M1_BA0 <18>
DDR_M0_D31AY59 DDR0_DQ[30]/DDR0_DQ[46] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] AT48 DDR_M0_BA1 DDR_M1_D31AU60 DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] AY47 DDR_M1_MA2
<17> DDR_M0_D[32..47] DDR0_DQ[31]/DDR0_DQ[47] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] DDR_M0_BA1 <17> <18> DDR_M1_D[32..47] DDR1_DQ[31]/DDR0_DQ[63] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] DDR_M1_MA2 <18>
DDR_M0_D32AY39 AT50 DDR_M0_MA10 DDR_M0_MA10 <17> DDR_M1_D32AU40 BA44 DDR_M1_BA1 DDR_M1_BA1 <18>
DDR_M0_D33AW39 DDR0_DQ[32]/DDR1_DQ[0] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] BB50 DDR_M0_MA1 DDR_M1_D33 AT40 DDR1_DQ[32]/DDR1_DQ[16] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] AW46 DDR_M1_MA10
DDR0_DQ[33]/DDR1_DQ[1] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] DDR_M0_MA1 <17> DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] DDR_M1_MA10 <18>
DDR_M0_D34AY37 AY50 DDR_M0_MA0 DDR_M0_MA0 <17> DDR_M1_D34 AT37 AY46 DDR_M1_MA1 DDR_M1_MA1 <18>
DDR_M0_D35AW37 DDR0_DQ[34]/DDR1_DQ[2] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] BA50 DDR_M0_MA3 DDR_M1_D35AU37 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] BA46 DDR_M1_MA0
DDR0_DQ[35]/DDR1_DQ[3] DDR0_MA[3] DDR_M0_MA3 <17> DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] DDR_M1_MA0 <18>
DDR_M0_D36BB39 BB52 DDR_M0_MA4 DDR_M0_MA4 <17> DDR_M1_D36AR40 BB46 DDR_M1_MA3 DDR_M1_MA3 <18>
DDR_M0_D37BA39 DDR0_DQ[36]/DDR1_DQ[4] DDR0_MA[4] DDR_M1_D37AP40 DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[3] BA47 DDR_M1_MA4
DDR0_DQ[37]/DDR1_DQ[5] DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[4] DDR_M1_MA4 <18>
DDR_M0_D38BA37 AM70 DDR_M0_DQS#0 DDR_M0_DQS#0 <17> DDR_M1_D38AP37
DDR_M0_D39BB37 DDR0_DQ[38]/DDR1_DQ[6] DDR0_DQSN[0] AM69 DDR_M0_DQS0 DDR_M1_D39AR37 DDR1_DQ[38]/DDR1_DQ[22] AH66 DDR_M1_DQS#0
DDR0_DQ[39]/DDR1_DQ[7] DDR0_DQSP[0] DDR_M0_DQS0 <17> DDR1_DQ[39]/DDR1_DQ[23] DDR1_DQSN[0]/DDR0_DQSN[2] DDR_M1_DQS#0 <18>
DDR_M0_D40AY35 AT69 DDR_M0_DQS#1 DDR_M0_DQS#1 <17> DDR_M1_D40 AT33 AH65 DDR_M1_DQS0 DDR_M1_DQS0 <18>
DDR_M0_D41AW35 DDR0_DQ[40]/DDR1_DQ[8] DDR0_DQSN[1] AT70 DDR_M0_DQS1 DDR_M1_D41AU33 DDR1_DQ[40]/DDR1_DQ[24] DDR1_DQSP[0]/DDR0_DQSP[2] AG69 DDR_M1_DQS#1
DDR0_DQ[41]/DDR1_DQ[9] DDR0_DQSP[1] DDR_M0_DQS1 <17> DDR1_DQ[41]/DDR1_DQ[25] DDR1_DQSN[1]/DDR0_DQSN[3] DDR_M1_DQS#1 <18>
DDR_M0_D42AY33 BA64 DDR_M0_DQS#2 DDR_M0_DQS#2 <17> DDR_M1_D42AU30 AG70 DDR_M1_DQS1 DDR_M1_DQS1 <18>
DDR_M0_D43AW33 DDR0_DQ[42]/DDR1_DQ[10] DDR0_DQSN[2]/DDR0_DQSN[4] AY64 DDR_M0_DQS2 DDR_M1_D43 AT30 DDR1_DQ[42]/DDR1_DQ[26] DDR1_DQSP[1]/DDR0_DQSP[3] AR66 DDR_M1_DQS#2
DDR0_DQ[43]/DDR1_DQ[11] DDR0_DQSP[2]/DDR0_DQSP[4] DDR_M0_DQS2 <17> DDR1_DQ[43]/DDR1_DQ[27] DDR1_DQSN[2]/DDR0_DQSN[6] DDR_M1_DQS#2 <18>
DDR_M0_D44BB35 AY60 DDR_M0_DQS#3 DDR_M0_DQS#3 <17> DDR_M1_D44AR33 AR65 DDR_M1_DQS2 DDR_M1_DQS2 <18>
DDR_M0_D45BA35 DDR0_DQ[44]/DDR1_DQ[12] DDR0_DQSN[3]/DDR0_DQSN[5] BA60 DDR_M0_DQS3 DDR_M1_D45AP33 DDR1_DQ[44]/DDR1_DQ[28] DDR1_DQSP[2]/DDR0_DQSP[6] AR61 DDR_M1_DQS#3
DDR0_DQ[45]/DDR1_DQ[13] DDR0_DQSP[3]/DDR0_DQSP[5] DDR_M0_DQS3 <17> DDR1_DQ[45]/DDR1_DQ[29] DDR1_DQSN[3]/DDR0_DQSN[7] DDR_M1_DQS#3 <18>
DDR_M0_D46BA33 BA38 DDR_M0_DQS#4 DDR_M0_DQS#4 <17> DDR_M1_D46AR30 AR60 DDR_M1_DQS3 DDR_M1_DQS3 <18>
DDR_M0_D47BB33 DDR0_DQ[46]/DDR1_DQ[14] DDR0_DQSN[4]/DDR1_DQSN[0] AY38 DDR_M0_DQS4 DDR_M1_D47AP30 DDR1_DQ[46]/DDR1_DQ[30] DDR1_DQSP[3]/DDR0_DQSP[7] AT38 DDR_M1_DQS#4
<17> DDR_M0_D[48..63] DDR0_DQ[47]/DDR1_DQ[15] DDR0_DQSP[4]/DDR1_DQSP[0] DDR_M0_DQS4 <17> <18> DDR_M1_D[48..63] DDR1_DQ[47]/DDR1_DQ[31] DDR1_DQSN[4]/DDR1_DQSN[2] DDR_M1_DQS#4 <18>
DDR_M0_D48AY31 AY34 DDR_M0_DQS#5 DDR_M0_DQS#5 <17> DDR_M1_D48AU27 AR38 DDR_M1_DQS4 DDR_M1_DQS4 <18>
DDR_M0_D49AW31 DDR0_DQ[48]/DDR1_DQ[32] DDR0_DQSN[5]/DDR1_DQSN[1] BA34 DDR_M0_DQS5 DDR_M1_D49 AT27 DDR1_DQ[48] DDR1_DQSP[4]/DDR1_DQSP[2] AT32 DDR_M1_DQS#5
DDR0_DQ[49]/DDR1_DQ[33] DDR0_DQSP[5]/DDR1_DQSP[1] DDR_M0_DQS5 <17> DDR1_DQ[49] DDR1_DQSN[5]/DDR1_DQSN[3] DDR_M1_DQS#5 <18>
DDR_M0_D50AY29 BA30 DDR_M0_DQS#6 DDR_M0_DQS#6 <17> DDR_M1_D50 AT25 AR32 DDR_M1_DQS5 DDR_M1_DQS5 <18>
DDR_M0_D51AW29 DDR0_DQ[50]/DDR1_DQ[34] DDR0_DQSN[6]/DDR1_DQSN[4] AY30 DDR_M0_DQS6 DDR_M1_D51AU25 DDR1_DQ[50] DDR1_DQSP[5]/DDR1_DQSP[3] AR25 DDR_M1_DQS#6
DDR0_DQ[51]/DDR1_DQ[35] DDR0_DQSP[6]/DDR1_DQSP[4] DDR_M0_DQS6 <17> DDR1_DQ[51] DDR1_DQSN[6] DDR_M1_DQS#6 <18>
DDR_M0_D52BB31 AY26 DDR_M0_DQS#7 DDR_M0_DQS#7 <17> DDR_M1_D52AP27 AR27 DDR_M1_DQS6 DDR_M1_DQS6 <18>
DDR_M0_D53BA31 DDR0_DQ[52]/DDR1_DQ[36] DDR0_DQSN[7]/DDR1_DQSN[5] BA26 DDR_M0_DQS7 DDR_M1_D53AN27 DDR1_DQ[52] DDR1_DQSP[6] AR22 DDR_M1_DQS#7
DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSP[7]/DDR1_DQSP[5] DDR_M0_DQS7 <17> DDR1_DQ[53] DDR1_DQSN[7] DDR_M1_DQS#7 <18>
DDR_M0_D54BA29 DDR_M1_D54AN25 AR21 DDR_M1_DQS7 DDR_M1_DQS7 <18>
DDR_M0_D55BB29 DDR0_DQ[54]/DDR1_DQ[38] AW50 DDR_M0_ALERT# DDR_M1_D55AP25 DDR1_DQ[54] DDR1_DQSP[7]
DDR0_DQ[55]/DDR1_DQ[39] DDR0_ALERT# DDR_M0_ALERT# <17> DDR1_DQ[55]
DDR_M0_D56AY27 AT52 DDR_M0_PAR DDR_M0_PAR <17> DDR_M1_D56 AT22 AN43 DDR_M1_ALERT# DDR_M1_ALERT# <18>
DDR_M0_D57AW27 DDR0_DQ[56]/DDR1_DQ[40] DDR0_PAR DDR_M1_D57AU22 DDR1_DQ[56] DDR1_ALERT# AP43 DDR_M1_PAR
DDR0_DQ[57]/DDR1_DQ[41] DDR1_DQ[57] DDR1_PAR DDR_M1_PAR <18>
DDR_M0_D58AY25 AY67 +0.6V_VREFCA +0.6V_VREFCA DDR_M1_D58AU21 AT13 DDR_DRAMRST#
DDR_M0_D59AW25 DDR0_DQ[58]/DDR1_DQ[42] DDR_VREF_CA AY68 DDR_M1_D59 AT21 DDR1_DQ[58] DRAM_RESET# AR18 SM_RCOMP0 RC38 1 2 121_0402_1%
DDR_M0_D60BB27 DDR0_DQ[59]/DDR1_DQ[43] DDR CH - A
DDR0_VREF_DQ BA67 +0.6V_B_VREFDQ DDR_M1_D60AN22 DDR1_DQ[59] DDR_RCOMP[0] AT18 SM_RCOMP1 RC39 1 2 80.6_0402_1%
DDR0_DQ[60]/DDR1_DQ[44] DDR1_VREF_DQ +0.6V_B_VREFDQ DDR1_DQ[60] DDR_RCOMP[1]
B DDR_M0_D61BA27 DDR_M1_D61AP22 DDR CH - B AU18 SM_RCOMP2 RC40 1 2 100_0402_1% B
DDR_M0_D62BA25 DDR0_DQ[61]/DDR1_DQ[45] AW67 DDR_PG_CTRL DDR_M1_D62AP21 DDR1_DQ[61] DDR_RCOMP[2]
DDR_M0_D63BB25 DDR0_DQ[62]/DDR1_DQ[46] DDR_VTT_CNTL DDR_M1_D63AN21 DDR1_DQ[62]
DDR0_DQ[63]/DDR1_DQ[47] 2 OF 20 DDR1_DQ[63] 3 OF 20
SKL-U_BGA1356 SKL-U_BGA1356
+1.2V_VDDQ
For VTT power control
+1.2V_VDDQ
1
+3VS
1
RC904 0.1U_0201_10V6K 2 1 CC57

1
RC905 @ 100K_0402_5%
100K_0402_5% @ UC7 RC394
1 5 100K_0402_5%
2
NC VCC
2
DDR_PG_CTRL 2
2
A
1
4 SM_PG_CTRL <49>
Y
2
RC906 3 +1.2V_VDDQ
100K_0402_5% @ GND @ESD@
74AUP1G07SE-7_SOT353-5 DDR_PG_CTRL 1 2
@ SA00007WE00 CC70 100P_0402_50V8J
2
1
DDR_PG_CTRL 3 1 SM_PG_CTRL
RC32 From ESD Team Request
470_0402_5%
2
UC9 SB000008E10
MMBT3904WH NPN SOT323-3 DDR_DRAMRST# 1 2 DDR_DRAMRST#_R
Rshort@ DDR_DRAMRST#_R <17,18>
SB00000QJ00,S TR DRC5115E0L NPN RC33 0_0402_5%
SOT323-3
A A
Vinafix.com
Security Classification
2017/04/10
Compal Secret Data
2019/12/15 Title
SKL-U(2/12)DDRIII
5 4 3 2 1
5 4 3 2 1
SML0ALERT# (Internal Pull Down):

eSPI or LPC
SKL-U
UC1E 0 = LPC is selected for EC --> For KB9022/9032 Use
Rev_0.53
SPI - FLASH 1 = eSPI is selected for EC --> For KB9032 Only.
SMBUS, SMLINK
HOST_SPI_0_CLK AV2
HOST_SPI_0_SO AW3 SPI0_CLK R7 SMBCLK SML0ALERT#
<35> HOST_SPI_0_SO
HOST_SPI_0_SI AV3 SPI0_MISO GPP_C0/SMBCLK R8 SMBDATA
SMB
<35> HOST_SPI_0_SI SPI0_MOSI GPP_C1/SMBDATA
HOST_SPI_0_SIO2 AW2 R10 SMBALERT# (Link to XDP, DDR, TP)
SPI0_IO2 GPP_C2/SMBALERT# TP@ T239
1
HOST_SPI_0_SIO3 AU4
HOST_SPI_0_CS0# AU3 SPI0_IO3 R9 SML0CLK RC218
AU2 SPI0_CS0# GPP_C3/SML0CLK W2 SML0DATA
SPI0_CS1# GPP_C4/SML0DATA 1K_0402_1%
<35> HOST_SPI_0_CS2# HOST_SPI_0_CS2# AU1 W1 SML0ALERT#
SPI0_CS2# GPP_C5/SML0ALERT#
2
D W3 SML1CLK D
SPI - TOUCH GPP_C6/SML1CLK V3 SML1DATA
SML1
M2 GPP_C7/SML1DATA AM7 GPP_B23 1 2 SML1ALERT# (Link to EC,DGPU, LAN, Thermal Sensor)
M3 GPP_D1/SPI1_CLK GPP_B23/SML1ALERT#/PCHHOT# RC902 @ +3V_PRIM
J4 GPP_D2/SPI1_MISO 0_0201_5%
V1 GPP_D3/SPI1_MOSI SML1ALERT# RC903 2 @ 1 150K_0402_1%
GPP_D21/SPI1_IO2 TP@ T234
V2
M1 GPP_D22/SPI1_IO3
LPC
GPP_D0/SPI1_CS# AY13 LPC_AD0 SML0ALERT# RC360 2 @ 1 10K_0402_5%
GPP_A1/LAD0/ESPI_IO0 LPC_AD0 <33> +3VS
BA13 LPC_AD1
C LINK GPP_A2/LAD1/ESPI_IO1 LPC_AD1 <33>
BB13 LPC_AD2
GPP_A3/LAD2/ESPI_IO2 LPC_AD2 <33>
G3 AY12 LPC_AD3 SMBALERT# 8 1
CL_CLK GPP_A4/LAD3/ESPI_IO3 LPC_AD3 <33>
G2 BA12 LPC_FRAME# 7 2
CL_DATA GPP_A5/LFRAME#/ESPI_CS# LPC_FRAME# <33>
G1 BA11 SUS_STAT# TP@ T2402 EC_KBRST# 6 3
CL_RST# GPP_A14/SUS_STAT#/ESPI_RESET# 5 4
<33> EC_KBRST# EC_KBRST# AW13 AW9 CLK_PCI0 RC387 1 2 22_0402_5% RPC19 10K_0804_8P4R_5%
GPP_A0/RCIN# GPP_A9/CLKOUT_LPC0/ESPI_CLK CLK_PCI_LPC <33>
AY9 To EC
GPP_A10/CLKOUT_LPC1 PM_CLKRUN#
To TPM <33,35> SERIRQ SERIRQ AY11
GPP_A6/SERIRQ GPP_A8/CLKRUN#
AW11
PM_CLKRUN# <33>
5 OF 20
LPC Mode 1
CC182
SKL-U_BGA1356
22P 50V J NPO 0402
EMI@
2
+3VS +3VS
to SPI ROM UC2 Source From +3V_PRIM
2
RPH11
C HOST_SPI_0_CS0#_R 1 8 EC_SPI_CS0# RC216 RC215 C
EC_SPI_CS0# <33>
HOST_SPI_0_CS0#_R 2 7 HOST_SPI_0_CS0# 10K_0402_5% 10K_0402_5% SML0CLK RC49 1 2 499_0402_1%
HOST_SPI_0_SO_R 3 6 EC_SPI_SO
EC_SPI_SO <33>
2
HOST_SPI_0_SO_R 4 5 HOST_SPI_0_SO QC1A SML0DATA RC50 1 2 499_0402_1%
1
15_0804_8P4R_5% SMBCLK 6 1
PCH_SMBCLK <17,18>
RPC7
RPH12 L2N7002SDW1T1G 2N SC88-6 SML1CLK 1 8
HOST_SPI_0_HOLD# 1 8 HOST_SPI_0_SIO3 SB00001FF00 SML1DATA 2 7
5
HOST_SPI_0_SI_R 2 7 HOST_SPI_0_SI SMBCLK 3 6
HOST_SPI_0_SI_R 3 6 EC_SPI_SI QC1B SMBDATA 4 5
EC_SPI_SI <33>
4 5 SMBDATA 3 4
PCH_SMBDATA <17,18>
1K_0804_8P4R_5%
15_0804_8P4R_5% L2N7002SDW1T1G 2N SC88-6
SB00001FF00
HOST_SPI_0_WP# 2 1 HOST_SPI_0_SIO2 +3VS +3V_SPI
RC388 15_0402_5%
HOST_SPI_0_SIO2 RC3901 @ 2 1K_0402_1%
+3V_SPI
SPI ROM ( 8MByte Only) CC8 HOST_SPI_0_SIO3 RC3911 @ 2 1K_0402_1%
UC2 1 2 0.1U_0201_10V6K
HOST_SPI_0_CS0#_R 1 8 <DB> Un-pop QC2 for new 0x90 thermal sensor
CS# VCC
2
HOST_SPI_0_SO_R 2 7 HOST_SPI_0_HOLD#
HOST_SPI_0_WP# 3 DO(IO1) HOLD#(IO3) 6 HOST_SPI_0_CLK_R @
4 WP#(IO2) CLK 5 HOST_SPI_0_SI_R SML1CLK 6 1
GND DI(IO0) EC_SMB_CK2 <10,33>
QC2A 5 HOST_SPI_0_CS0#_R 1 @ 2
XM25QH64AHIG SOP 8P L2N7002SDW1T1G 2N SC88-6 RC357 1K_0402_5%
SA0000B8300 SPI ROM Part: SB00001FF00 @
Main:SA0000B8300, S IC FL 64M XM25QH64AHIG SOP 8P(XMC)
ACES_91960-0084L_8P-T 2nd: SA000039A40, S IC FL 64M W25Q64JVSSIQ SOIC 8P SPI ROM(Winbond) SML1DATA 3 4
EC_SMB_DA2 <10,33>
Use socket footprint 3th: SA00008SL00, S IC FL 64M MX25L6473FM2I-08G SOP 8P(MXIC) QC2B
4rd: SA00007LA10, S IC FL 64M GD25B64CSIGR SOP 8P SPI ROM(GigaDevice) L2N7002SDW1T1G 2N SC88-6
SB00001FF00
B B
+3V_PRIM +3VALW HOST_SPI_0_SIO3 RC51 1 ES@ 2 1K_0402_1%
From WW36 MOW for SKL-U ES sample

2
RC81 RC82
10K_0402_5% 10K_0402_5%
2
SB00001FF00 +3VS_PGPPA
1
SMBCLK 1 6
TP_SMBCLK <34>
CLK Source CPU to SPI ROM UC2&EC QC7A PM_CLKRUN# 1 2
L2N7002SDW1T1G 2N SC88-6 RC107 8.2K_0402_5%
15_0402_5%
5
HOST_SPI_0_CLK 2 1 HOST_SPI_0_CLK_R
HOST_SPI_0_CLK_R <33,35>
RC368 EMI@ SERIRQ 1 2
SMBDATA 4 3 RC122 8.2K_0402_5%
TP_SMBDATA <34>
1 2
CC9 QC7B SB00001FF00
10P_0402_50V8J L2N7002SDW1T1G 2N SC88-6 Follow 543016_SKL_U_Y_PDG_0_9
@EMI@
EON SA000046400 S IC FL 64M EN25Q64-104HIP SOP 8P

MXIC SA00006N100 S IC FL 64M MX25L6473EM2I-10G SOP 8P
WINBOND SA000039A30 S IC FL 64M W25Q64FVSSIQ SOIC 8P SPI ROM
Micron SA00005L100 S IC FL 64M N25Q064A13ESEC0F SO8W 8P
A A
2017/04/10
Compal Secret Data
2019/12/15 Title
SKL-U(3/12)SPI,ESPI,SMB,LPC
5 4 3 2 1
5 4 3 2 1
UC1G SKL-U
Rev_0.53 +3V_PRIM
D AUDIO UMA DIS D
1
HDA_SYNC BA22 PROJECT_ID
HDA_BIT_CLK AY22 HDA_SYNC/I2S0_SFRM 0 1
HDA_SDOUT BB22 HDA_BLK/I2S0_SCLK PX@ RC127
SDIO/SDXC
HDA_SDIN0 BA21 HDA_SDO/I2S0_TXD 10K_0402_5%
<32> HDA_SDIN0 HDA_SDI0/I2S0_RXD 2G VRAM 4G VRAM
AY21 AB11
2
HDA_RST# AW22 HDA_SDI1/I2S1_RXD GPP_G0/SD_CMD AB13 VRAMCLK_SEL
HDA_RST#/I2S1_SCLK GPP_G1/SD_DATA0 VRAM Clock 0
J5 AB12 PROJECT_ID 1
AY20 GPP_D23/I2S_MCLK GPP_G2/SD_DATA1 W12 PLAT_SEL0
I2S1_SFRM GPP_G3/SD_DATA2
1
AW20 W11 PLAT_SEL1
I2S1_TXD GPP_G4/SD_DATA3 W10 RC128
SOC_GPIOF1 AK7 GPP_G5/SD_CD# W8 UMA@ 10K_0402_5% +3V_PRIM
T38 TP@ GPP_F1/I2S2_SFRM GPP_G6/SD_CLK
T39 TP@ SOC_GPIOF0 AK6 W7
AK9 GPP_F0/I2S2_SCLK GPP_G7/SD_WP
2
GPP_F2/I2S2_TXD
2
AK10 BA9
GPP_F3/I2S2_RXD GPP_A17/SD_PWR_EN#/ISH_GP7 BB9 RC900
GPP_A16/SD_1P8_SEL X76@ 10K_0402_5%
H5 AB7 SD_RCOMP RC76 2 1 200_0402_1%
D7 GPP_D19/DMIC_CLK0 SD_RCOMP
1
GPP_D20/DMIC_DATA0
D8 AF13 SOC_GPIOF17 T235 TP@ VRAMCLK_SEL
C8 GPP_D17/DMIC_CLK1 GPP_F23
GPP_D18/DMIC_DATA1
2
HDA_SPKR AW5 RC901
<10,32> HDA_SPKR GPP_B14/SPKR X76 BOM control RAM size X76@ 10K_0402_5%
7 OF 20
Net Name 4G 2G
1
C
SKL-U_BGA1356 VRAMCLK_SEL 1 0 C
HDA for AUDIO

RPC9 <33> ME_FLASH_EN RC367 1 2 0_0402_5%
Rshort@
1 8
<32> HDA_SYNC_R 2 7 HDA_SYNC
<32> HDA_RST#_R 3 6 HDA_RST#
2
4 5 HDA_SDOUT +3V_HDA
G
<32> HDA_SDOUT_R
@
33_0804_8P4R_5% 1 @ 2 RC380 1 3 HDA_SDOUT
1K_0402_1% QC380
S
MESS138W-G_SOT323-3
<32> HDA_BIT_CLK_R 2 EMI@ 1 HDA_BIT_CLK

RC383 33_0402_5% +3V_PRIM
EMI@ HDA_SDOUT:
CC143 22P 50V J NPO 0402 ME Flash Descriptor Security Override
@RF@ Low : Disabled(Default)
2
CC183 22P 50V J NPO 0402
High : Enabled
SKL_ULT
EMI request UC1I KBLR@ RC919 SKYL@ RC916
Rev_0.53 10K_0402_5% 10K_0402_5%
CSI-2
1
PLAT_SEL0
A36 C37 PLAT_SEL1
B36 CSI2_DN0 CSI2_CLKN0 D37
CSI2_DP0 CSI2_CLKP0
2
B C38 C32 B
D38 CSI2_DN1 CSI2_CLKN1 D32
C36 CSI2_DP1 CSI2_CLKP1 C29 KBLU@ RC918 KBLU@ RC917
D36 CSI2_DN2 CSI2_CLKN2 D29 10K_0402_5% 10K_0402_5%
A38 CSI2_DP2 CSI2_CLKP2 B26 PLAT_SEL1
1
B38 CSI2_DN3 CSI2_CLKN3 A26
CSI2_DP3 CSI2_CLKP3
C31 E13 CSI2_COMP RC80 2 1 100_0402_1% 0 1 SKYL@ KBLR@
D31 CSI2_DN4 CSI2_COMP B7 RC918 RC917
CSI2_DP4 GPP_D4/FLASHTRIG
C33
CSI2_DN5 PLAT_SEL0 0 KBL-U KBL-R
D33 10K_0402_5% 10K_0402_5%
A31 CSI2_DP5 EMMC 1 SKL-U NA SD028100280 SD028100280
B31 CSI2_DN6 AP2
A33 CSI2_DP6 GPP_F13/EMMC_DATA0 AP1
B33 CSI2_DN7 GPP_F14/EMMC_DATA1 AP3
CSI2_DP7 GPP_F15/EMMC_DATA2 AN3
A29 GPP_F16/EMMC_DATA3 AN1
B29 CSI2_DN8 GPP_F17/EMMC_DATA4 AN2
C28 CSI2_DP8 GPP_F18/EMMC_DATA5 AM4
D28 CSI2_DN9 GPP_F19/EMMC_DATA6 AM1
A27 CSI2_DP9 GPP_F20/EMMC_DATA7
B27 CSI2_DN10 AM2
C27 CSI2_DP10 GPP_F21/EMMC_RCLK AM3
D27 CSI2_DN11 GPP_F22/EMMC_CLK AP4
CSI2_DP11 GPP_F12/EMMC_CMD
9 OF 20 AT1 EMMC_RCOMP 2 1
EMMC_RCOMP RC89 200_0402_1%
SKL-U_BGA1356
A A
2017/04/10
Compal Secret Data
2019/12/15 Title
SKL-U(4/12)HDA,EMMC,SDIO,CSI2
5 4 3 2 1
5 4 3 2 1
+RTCVCC
RC91 1 2 20K_0402_5% PCH_SRTCRST#
CC10 1 2 1U_0402_6.3V6K
CLRP1 1 2 SHORT PADS CLR ME UC1J SKL_ULT

Rev_0.53
CLOCK SIGNALS
RC93 1 2 20K_0402_5% PCH_RTCRST#
D42
CC11 1 2 1U_0402_6.3V6K C42 CLKOUT_PCIE_N0
CLKREQ_PEG#0 AR10 CLKOUT_PCIE_P0
CLRP2 1 2 GPP_B5/SRCCLKREQ0#
SHORT PADS CLR CMOS
CLK_PCIE_N1 B42
<29> CLK_PCIE_N1 CLKOUT_PCIE_N1
LAN CLK_PCIE_P1 A42 F43
D <29> CLK_PCIE_P1 CLKOUT_PCIE_P1 CLKOUT_ITPXDP_N D
RC941 2 1M_0402_5% SM_INTRUDER# <29> CLKREQ_PCIE#1 CLKREQ_PCIE#1 AT7 E43
GPP_B6/SRCCLKREQ1# CLKOUT_ITPXDP_P
CLK_PCIE_N2 D41 BA17 SUSCLK
<30> CLK_PCIE_N2 CLKOUT_PCIE_N2 GPD8/SUSCLK SUSCLK <30>
PCH_RTCRST# 2 1 CLR_CMOS# <33> WLAN CLK_PCIE_P2 C41
<30> CLK_PCIE_P2 CLKOUT_PCIE_P2
0_0402_5% R1088 <30> CLKREQ_PCIE#2 CLKREQ_PCIE#2 AT8 E37 PCH_KBLU24_IN
GPP_B7/SRCCLKREQ2# XTAL24_IN
1
PCH_SRTCRST# 2 1 E35 PCH_KBLU24_OUT
D40 XTAL24_OUT
0_0402_5% R1089 Clear CMOS close to RAM door CLKOUT_PCIE_N3
@ C40 E42 XCLK_BIASREF RC96 1 2 2.7K_0402_1% +1.0V_CLK5_F24NS
JCMOS1 CLKREQ_PCIE#3 AT10 CLKOUT_PCIE_P3 XCLK_BIASREF
0_0603_5% GPP_B8/SRCCLKREQ3# AM18 PCH_RTCX1
2
CLK_PCIE_N4 B40 RTCX1 AM20 PCH_RTCX2

<31> CLK_PCIE_N4 CLKOUT_PCIE_N4 RTCX2
PCIe SSD CLK_PCIE_P4 A40
<31> CLK_PCIE_P4 CLKOUT_PCIE_P4
<31> CLKREQ_PCIE#4 CLKREQ_PCIE#4 AU8 AN18 PCH_SRTCRST#
+3VS GPP_B9/SRCCLKREQ4# SRTCRST# AM16 PCH_RTCRST#
E40 RTCRST#
E38 CLKOUT_PCIE_N5
1 2 CLKREQ_PCIE#4 CLKREQ_PCIE#5 AU7 CLKOUT_PCIE_P5 XCLK_BIASREF RC97 1 @ 2 60.4_0402_1%
GPP_B10/SRCCLKREQ5#
RC165 10K_0402_5% From 545659_SKL_PCH_U_Y_EDS_R0_7
1 2 CLKREQ_PCIE#5
RC105 10K_0402_5% <Cocoa_1027> 10 OF 20
<DB> Add RX1~4 for KBL U/R Colay
RPC10 check un-use GPIO for termination guidance
8 1 CLKREQ_PCIE#1
SKL-U_BGA1356 Change XTAL(YC1) to 2016 Type
7 2 CLKREQ_PCIE#2 KBLU@
6 3 CLKREQ_PEG#0 PCH_KBLU24_IN RX1 2 1 33_0402_1% PCH_XTAL24U_IN PCH_RTCX2
5 4 CLKREQ_PCIE#3
10K_0804_8P4R_5%
PCH KBLU@ KBLU@
PLTRST RC99 1 2 0_0402_5% PCH_KBLU24_OUT RX2 2 1 33_0402_1% PCH_XTAL24U_OUT 1
RC92
2
1M_0402_5%
PCH_RTCX1 1
RC98
2
10M_0402_5%
Buffer
+3VALW_DSW +3VS @
1 2 PCH_PWROK CC145 YC1 KBLU@ YC2
RC925 10K_0402_5% 1 2 24MHZ 18PF XRCGB24M000F2P51R0 32.768KHZ 9PF 10PPM 9H03200055
C 1 2 LAN_WAKE# 1 2 C
5
RC926 10K_0402_5% @ UC8 0.1U_0201_10V6K 3 1
+3V_PRIM 1 2 PCH_RSMRST# PLT_RST#_PCH 1 3 1 SJ10000Q800
P
DS12 IN1 NC NC
RC927 10K_0402_5% 4 PLT_RST# KBLU@ KBLU@
O PLT_RST# <29,30,31,33,35>
CC15
6.8P 50V C NPO 0402
6.8P 50V C NPO 0402

CC16
1 2 SYS_RESET# 2 1 PCH_PWROK 2 CC12 SJ10000UJ00 CC13 1 1
IN2
G
4 2
27P_0402_50V8J
27P_0402_50V8J
RC928 10K_0402_5% SE07168AC80
SN74AHC1G08DCKR_SC70-5
3
CK0402101V05_0402-2 SE07168AC80
ESD@ 2 2
SCV00001K00
2 1 SYS_RESET# 24MHz Parrtt::

<SI> CC15/CC16 SI change 3.9p=>6.8p
Maiin::SJ10000X700,, S CRYSTAL 24MHZ 18PF
CLRP3 SHORT PADS +--20PPM 8Y24000033((TXC))::2..0x1..6mm
1 @ 2 SUSCLK 2nd:: SJ10000TK00,, S CRYSTAL 24MHZ 18PF
+--20PPM 7M24000027((TXC))::3..2x2..5mm
RC100 1K_0402_5%
2 1 PCH_DPWROK
RC101 100K_0402_5%
TP@T254
TP@T255
TP@T256
TP@T257
TP@T258
+3VALW_DSW UC1K SKL-U
Rev_0.53
SYSTEM POWER MANAGEMENT
1 2 PM_BATLOW# AT11 PM_SLP_S0#
RC103 8.2K_0402_5% GPP_B12/SLP_S0# AP15 PM_SLP_S3#
GPD4/SLP_S3# PM_SLP_S3# <12,33,40>
1 2 WAKE# PLT_RST#_PCH AN10 BA16 PM_SLP_S4#
GPP_B13/PLTRST# GPD5/SLP_S4# PM_SLP_S4# <12,33,40,49>
RC104 1K_0402_5% T296 TP@ SYS_RESET# B5 AY16 PM_SLP_S5#
SYS_RESET# GPD10/SLP_S5# PM_SLP_S5# <33>
1 @ 2 AC_PRESENT_R <33> PCH_RSMRST# PCH_RSMRST# AY17
RC106 10K_0402_5% RSMRST# AN15 PM_SLP_SUS#
SLP_SUS# PM_SLP_SUS# <33>
RC102 1 @ 2 1K_0402_5% H_CPUPWRGD A68 AW15
B EC_VCCST_PG B65 PROCPWRGD SLP_LAN# BB17 B
VCCST_PWRGD GPD9/SLP_WLAN# AN16 PM_SLP_A#
+3V_PRIM
Only For Power Sequence Debug GPD6/SLP_A#
<33> SYS_PWROK SYS_PWROK B6
PCH_PWROK BA20 SYS_PWROK BA15 PBTN_OUT#
<33> PCH_PWROK PCH_PWROK GPD3/PWRBTN# PBTN_OUT# <33>
PCH_DPWROK_R BB20 AY15 AC_PRESENT_R 2 1
DSW_PWROK GPD1/ACPRESENT ACIN <33>
AU13 PM_BATLOW# RC108 0_0402_5%
RC1151 @ 2 10K_0402_5% SOC_VRALERT# PCH_SUSWARN# AR13 GPD0/BATLOW#
<33> PCH_SUSWARN# GPP_A13/SUSWARN#/SUSPWRDNACK
<33> SUSACK# 2 1
Rshort@ SUSACK#_R AP11
RC110 0_0402_5% GPP_A15/SUSACK# AU11 EC_PCIE_WAKE#_CPU 2 @ 1
GPP_A11/PME# EC_PCIE_WAKE# <30,33>
WAKE# BB15 AP16 SM_INTRUDER# RC922 0_0402_5%
+3VALW_DSW <30> WAKE# WAKE# INTRUDER#
LAN_WAKE# AM15
AW17 GPD2/LAN_WAKE# AM10 EXT_PWR_GATE#
GPD11/LANPHYPC GPP_B11/EXT_PWR_GATE# TP@T298
T94 TP@ AT15 AM11 SOC_VRALERT#
GPD7/RSVD GPP_B2/VRALERT#
11 OF 20
ESD@
DS13
RC111 2 @ 1 100K_0402_5% PBTN_OUT# SCV00001K00
SKL-U_BGA1356
1 2 H_CPUPWRGD
CK0402101V05_0402-2
@ESD@
DS14
SCV00001K00
1 2 SUSACK#
CK0402101V05_0402-2 DC3 SCS00000Z00

RB751V-40 SOD-323
PCH_RSMRST# 1 2 PCH_PWROK
ESD@
C5229 1 2 SYS_PWROK
2 1 SPOK <48>
0.1U_0402_25V6 DC4 SCS00000Z00
RB751V-40 SOD-323
A Vinafix.com <33> PCH_DPWROK

RC112
2 1
Rshort@
0_0402_5%
PCH_DPWROK_R
A
+1.0V_VCCST
From EC(open-drain)
1
RC113
1K_0402_5% Security Classification
2017/04/10
Compal Secret Data
2019/12/15 Title
2
RC1161 2 60.4_0402_1% EC_VCCST_PG

<33,40> EC_VCCST_PG_R
SKL-U(5/12)CLK,GPIO
5 4 3 2 1
5 4 3 2 1
UC1F SKL-U +3VS

Rev_0.53
LPSS ISH
AN8
AP7 GPP_B15/GSPI0_CS# P2 DGPU_PWR_EN RC382 1 2 10K_0402_5%
GPP_B16/GSPI0_CLK GPP_D9 TS_GPIO_CPU <27>
AP8 P3
GSPI0_MOSI AR7 GPP_B17/GSPI0_MISO GPP_D10 P4
GPP_B18/GSPI0_MOSI GPP_D11 P1 +3V_PRIM
AM5 GPP_D12
AN7 GPP_B19/GSPI1_CS# M4
D GPP_B20/GSPI1_CLK GPP_D5/ISH_I2C0_SDA D
SOC_GPIOB21 AP5 N3 RPC14
GSPI1_MOSI AN5 GPP_B21/GSPI1_MISO GPP_D6/ISH_I2C0_SCL 1 8
GPP_B22/GSPI1_MOSI N1 WL_OFF# 2 7
TP@T129 UART_0_CRXD_DTXD AB1 GPP_D7/ISH_I2C1_SDA N2 SOC_GPIOB21 3 6
TP@T128 UART_0_CTXD_DRXD AB2 GPP_C8/UART0_RXD GPP_D8/ISH_I2C1_SCL NMI_DBG#_CPU 4 5
W4 GPP_C9/UART0_TXD AD11 <5,33> NMI_DBG#_CPU
WL_OFF# AB3 GPP_C10/UART0_RTS# GPP_F10/I2C5_SDA/ISH_I2C2_SDA AD12 10K_0804_8P4R_5%
<30> WL_OFF# GPP_C11/UART0_CTS# GPP_F11/I2C5_SCL/ISH_I2C2_SCL
TP@T133 UART_2_CRXD_DTXD AD1
TP@T132 UART_2_CTXD_DRXD AD2 GPP_C20/UART2_RXD U1
AD3 GPP_C21/UART2_TXD GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA U2
AD4 GPP_C22/UART2_RTS# GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL U3
GPP_C23/UART2_CTS# GPP_D15/ISH_UART0_RTS# U4
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
U7 AC1
GPP_C16/I2C0_SDA GPP_C12/UART1_RXD/ISH_UART1_RXD DGPU_PWR_EN <33>
U6 AC2 DGPU_HOLD_RST#
GPP_C17/I2C0_SCL GPP_C13/UART1_TXD/ISH_UART1_TXD AC3
U8 GPP_C14/UART1_RTS#/ISH_UART1_RTS# AB4
U9 GPP_C18/I2C1_SDA GPP_C15/UART1_CTS#/ISH_UART1_CTS#
GPP_C19/I2C1_SCL AY8
AH9 GPP_A18/ISH_GP0 BA8
AH10 GPP_F4/I2C2_SDA GPP_A19/ISH_GP1 BB7
GPP_F5/I2C2_SCL GPP_A20/ISH_GP2 BA7 +3VS
GPP_A21/ISH_GP3 ODD_PWR <37>
AH11 AY7 ODD_DA# <37>
AH12 GPP_F6/I2C3_SDA GPP_A22/ISH_GP4 AW7
UART_2_CTXD_DRXD GPP_F7/I2C3_SCL GPP_A23/ISH_GP5 AP13 SOC_GPIOA12
GPP_A12/BM_BUSY#/ISH_GP6 T122 TP@
1
AF11 DGPU_HOLD_RST# RC923 1 @ 2 10K_0402_5%

R5194 AF12 GPP_F8/I2C4_SDA
@ GPP_F9/I2C4_SCL 6 OF 20
0_0402_5%
ODD_PWR RC929 1 2 10K_0402_5%
UART_2_CRXD_DTXD
SKL-U_BGA1356
2
ODD_DA# RC930 1 2 10K_0402_5%
C C
CPU THERMAL SENSOR
Functional Strap Definitions Strap Pin Address : 0x48
+3VS UC3
1 5
<7,33> EC_SMB_CK2 SMBCLK SMBDATA EC_SMB_DA2 <7,33>
SPKR (Internal Pull Down): 2 +3VS
RC117 1 @ 2 100K_0402_5% HDA_SPKR GND
HDA_SPKR <8,32>
TOP Swap Override 3
ALERT# +Vs
4
1
RC118 1 @ 2 4.7K_0402_5% GSPI0_MOSI CC127
0 = Disable TOP Swap mode.---> AAX05 Use G753T11U_SOT23-5 0.1U_0201_10V6K
SA00008CH00
RC201 1 @ 2 150K_0402_1% GSPI1_MOSI 2
1 = Enable TOP Swap Mode.
<DB> Change Thermal Sensor IC

GSPI0_MOSI (Internal Pull Down):
No Reboot
0 = Disable No Reboot mode. --> AAX05 Use
1 = Enable No Reboot Mode. (PCH will disable the TCO

Timer system reboot feature). This function is useful
when running ITP/XDP.
B B
GSPI1_MOSI (Internal Pull Down):
Boot BIOS Strap Bit
0 = SPI Mode --> AAX05 Use
1 = LPC Mode
A A
2017/04/10
Compal Secret Data
2019/12/15 Title
SKL-U(6/12)GPIO
5 4 3 2 1
5 4 3 2 1
UC1H SKL-U
Rev_0.53
SSIC / USB3
PCIE/USB3/SATA
H8 USB3_CRX_DTX_N1 <38>
USB3_1_RXN G8
USB3_1_RXP USB3_CRX_DTX_P1 <38>
H13 C13 USB2.0/USB3.0
PCIE1_RXN/USB3_5_RXN USB3_1_TXN USB3_CTX_DRX_N1 <38>
G13 D13
PCIE1_RXP/USB3_5_RXP USB3_1_TXP USB3_CTX_DRX_P1 <38>
B17
A17 PCIE1_TXN/USB3_5_TXN J6
PCIE1_TXP/USB3_5_TXP USB3_2_RXN/SSIC_1_RXN USB3_CRX_DTX_N2 <38>
H6 USB3_CRX_DTX_P2 <38>
G11 USB3_2_RXP/SSIC_1_RXP B13
D
F11 PCIE2_RXN/USB3_6_RXN USB3_2_TXN/SSIC_1_TXN A13
USB3_CTX_DRX_N2 <38> USB2.0/USB3.0 D
PCIE2_RXP/USB3_6_RXP USB3_2_TXP/SSIC_1_TXP USB3_CTX_DRX_P2 <38>
D16
C16 PCIE2_TXN/USB3_6_TXN J10
PCIE2_TXP/USB3_6_TXP USB3_3_RXN/SSIC_2_RXN H10
H16 USB3_3_RXP/SSIC_2_RXP B15
G16 PCIE3_RXN USB3_3_TXN/SSIC_2_TXN A15
D17 PCIE3_RXP USB3_3_TXP/SSIC_2_TXP
C17 PCIE3_TXN E10
PCIE3_TXP USB3_4_RXN F10
G15 USB3_4_RXP C15
F15 PCIE4_RXN USB3_4_TXN D15
B19 PCIE4_RXP USB3_4_TXP
A19 PCIE4_TXN AB9
PCIE4_TXP USB2N_1 USB20_N1 <38>
AB10 USB2.0/USB3.0
USB2P_1 USB20_P1 <38>
<29> PCIE_CRX_DTX_N5 PCIE_CRX_DTX_N5 F16
PCIE_CRX_DTX_P5 E16 PCIE5_RXN AD6
*PCIe for Device Down
LAN <29> PCIE_CRX_DTX_P5
CC177 2 1 0.1U_0402_16V7K PCIE_CTX_DRX_N5 C19 PCIE5_RXP USB2N_2 AD7
USB20_N2 <38>
Place AC coupling capacitors very close to either
the transmitter or the receiver. <29> PCIE_CTX_C_DRX_N5
CC176 2 1 0.1U_0402_16V7K PCIE_CTX_DRX_P5 D19 PCIE5_TXN USB2P_2 USB20_P2 <38> USB2.0/USB3.0
*TX/RX with Cap
<29> PCIE_CTX_C_DRX_P5 PCIE5_TXP AH3
USB2N_3 USB20_N3 <39>
<30> PCIE_CRX_DTX_N6 PCIE_CRX_DTX_N6 G18 AJ3 USB2.0
PCIE6_RXN USB2P_3 USB20_P3 <39>
WLAN <30> PCIE_CRX_DTX_P6 PCIE_CRX_DTX_P6 F18
*PCI Express* Connector
CC175 2 1 0.1U_0402_16V7K PCIE_CTX_DRX_N6 D20 PCIE6_RXP AD9
Place AC caps closer to the PCIe* connector.
*Only TX with Cap, RX Cap on Add in Card <30> PCIE_CTX_C_DRX_N6 PCIE6_TXN USB2N_4 USB20_N4 <39>
CC174 2 1 0.1U_0402_16V7K PCIE_CTX_DRX_P6 C20 AD10 Card Reader
<30> PCIE_CTX_C_DRX_P6 PCIE6_TXP USB2P_4 USB20_P4 <39>
<37> SATA_CRX_DTX_N0 F20 AJ1

PCIE7_RXN/SATA0_RXN USB2N_5 USB20_N5 <27>
<37> SATA_CRX_DTX_P0 E20 AJ2 Camera
PCIE7_RXP/SATA0_RXP USB2P_5 USB20_P5 <27>
HDD B21 USB2
<37> SATA_CTX_DRX_N0 PCIE7_TXN/SATA0_TXN
A21 AF6
<37> SATA_CTX_DRX_P0 PCIE7_TXP/SATA0_TXP USB2N_6 USB20_N6 <30>
C AF7 BT C
USB2P_6 USB20_P6 <30>
<37> SATA_CRX_DTX_N1 G21
F21 PCIE8_RXN/SATA1A_RXN AH1
<37> SATA_CRX_DTX_P1 PCIE8_RXP/SATA1A_RXP USB2N_7 USB20_N7 <27>
ODD D21 AH2 TS
<37> SATA_CTX_DRX_N1 PCIE8_TXN/SATA1A_TXN USB2P_7 USB20_P7 <27>
C21
<37> SATA_CTX_DRX_P1 PCIE8_TXP/SATA1A_TXP AF8
E22 USB2N_8 AF9
E23 PCIE9_RXN USB2P_8
B23 PCIE9_RXP AG1
A23 PCIE9_TXN USB2N_9 AG2
PCIE9_TXP USB2P_9
F25 AH7
E25 PCIE10_RXN USB2N_10 AH8
D23 PCIE10_RXP USB2P_10
C23 PCIE10_TXN AB6 USB2_COMP RC119 1 2 113_0402_1%
PCIE10_TXP USB2_COMP AG3 USB2_ID
RC120 1 2 100_0402_1% PCIE_RCOMPN F5 USB2_ID AG4 USB2_VBUSSENSE
PCIE_RCOMPP E5 PCIE_RCOMPN USB2_VBUSSENSE
PCIE_RCOMPP A9 USB_OC0#
D56 GPP_E9/USB2_OC0# C9 USB_OC1#
XDP_PREQ# D61 PROC_PRDY# GPP_E10/USB2_OC1# D9 USB_OC2#
<5> XDP_PREQ# PROC_PREQ# GPP_E11/USB2_OC2#
SOC_GPIOA7 BB11 B9 USB_OC3# USB2_ID RC20 1 2 0_0402_5%
Rshort@
GPP_A7/PIRQA# GPP_E12/USB2_OC3#
<31> PCIE_CRX_DTX_N11 PCIE_CRX_DTX_N11 E28 J1 DEVSLP0 T241 TP@
PCIE_CRX_DTX_P11 E27 PCIE11_RXN/SATA1B_RXN GPP_E4/DEVSLP0 J2 DEVSLP1 USB2_VBUSSENSE 1 2
Rshort@
M.2 SSD <31> PCIE_CRX_DTX_P11
CC178 0.22U 6.3V K X5R 0402 2 1 PCIE_CTX_DRX_N11 D24 PCIE11_RXP/SATA1B_RXP GPP_E5/DEVSLP1 J3 RC21 0_0402_5%
*For PCIe* Gen 3/ SATA multiplexed configuration, <31> PCIE_CTX_C_DRX_N11 PCIE11_TXN/SATA1B_TXN GPP_E6/DEVSLP2 DEVSLP2 <31>
motherboard Tx requires a 220 nF CC179 0.22U 6.3V K X5R 0402 2 1 PCIE_CTX_DRX_P11 C24
AC capacitor and NO AC capacitor is required for <31> PCIE_CTX_C_DRX_P11 PCIE11_TXP/SATA1B_TXP
motherboard Rx channel. This option DOES NOT <31> PCIE_CRX_DTX_N12 PCIE_CRX_DTX_N12 E30 H2 SATA_GP0
support DC coupled ODDs / Devices.
PCIE_CRX_DTX_P12 F30 PCIE12_RXN/SATA2_RXN GPP_E0/SATAXPCIE0/SATAGP0 H3 ODD_PLUG#
B
*Place AC caps closer to the M.2 connector.
*Only TX with Cap, RX Cap on Add in Card
<31> PCIE_CRX_DTX_P12 PCIE12_RXP/SATA2_RXP GPP_E1/SATAXPCIE1/SATAGP1 ODD_PLUG# <37> B
CC180 0.22U 6.3V K X5R 0402 2 1 PCIE_CTX_DRX_N12 A25 G4 SSD1_IF SSD1_IF <31>
<31> PCIE_CTX_C_DRX_N12 PCIE12_TXN/SATA2_TXN GPP_E2/SATAXPCIE2/SATAGP2
CC181 0.22U 6.3V K X5R 0402 2 1 PCIE_CTX_DRX_P12 B25
<31> PCIE_CTX_C_DRX_P12 PCIE12_TXP/SATA2_TXP H1 SATA_LED# <39>
GPP_E8/SATALED#
8 OF 20 +3VS
SKL-U_BGA1356
DEVSLP1 1 2
SOC_GPIOA7 RC3621 2 10K_0402_5%
RC361 10K_0402_5%
GPIO DEVICE CONTROL
When PCIE8/SATA1A is used RPC13
USB_OC0# USB2 Port 1 and Port 2 SATA_LED# 1 8
as SATA Port 1 (ODD), then SATA_GP0 2 7
PCIE11/SATA1B (M.2 SSD) USB_OC1# USB2 Port 3 SSD1_IF 3 6
cannot be used as SATA ODD_PLUG# 4 5
Port 1. USB_OC2# N/A 10K_0804_8P4R_5%
USB_OC3# N/A +3V_PRIM
DEVSLP0 N/A
RPC20
N/A USB_OC1# 1 8
DEVSLP1 USB_OC3# 2 7
USB_OC0# 3 6
DEVSLP2 NGFF SSD KEY- M USB_OC2# 4 5
10K_0804_8P4R_5%
SATA_GP0 N/A
A A
SATA_GP1 ODD_PLUG#
SATA_GP2 PCIE/SATA
2017/04/10
Compal Secret Data
2019/12/15 Title
SKL-U(7/12)PCIE,USB,SATA
5 4 3 2 1
5 4 3 2 1
+1.0V_PRIM TO +1.0V_VCCSTU
+1.2V_VDDQ +1.0V_PRIM
UC1N SKL-U
Rev_0.53
CPU POWER 3 OF 4
+5VALW +1.0V_PRIM +1.0V_PRIM +1.0V_VCCSTU
AU23 AK28
AU28 VDDQ_AU23 VCCIO AK30
I (Max) : 4.5 A VDDQ_AU28 VCCIO
R5188 1 @ 2 0_0603_5% AU35 AL30 I (Max) : 3.4 A
VDDQ_AU35 VCCIO
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 AU42 AL42
VDDQ_AU42 VCCIO
CC98
CC97
I (Max) : 0.04 A(+1.0V_VCCSTU) 1 BB23 AM28
VDDQ_BB23 VCCIO
0.1U_0402_25V6
D 1@ RON(Max) : 25 mohm CC96 BB32 AM30 D
VDDQ_BB32 VCCIO
CC151
@ 0.1U_0201_10V6K BB41 AM42
2 2 V drop : 0.001 V BB47 VDDQ_BB41 VCCIO
2 BB51 VDDQ_BB47 AK23
2 VDDQ_BB51 VCCSA +VCC_SA
AK25
UC5 VCCSA G23
1 14 AM40 VCCSA G25
VIN1 VOUT1 +1.2V_VDDQ VDDQC VCCSA
RC142 1 2 0_0402_5% 2 13 G27
<33,40,49> SYSON VIN1 VOUT1 A18 VCCSA G28
+1.0V_VCCST VCCST VCCSA
RC144 1 @ 2 0_0402_5% EN_1.0V_VCCSTU 3 12 1.0V_VCCSTU_CT11 2 J22
<9,33,40,49> PM_SLP_S4# ON1 CT1 CC95 A22 VCCSA J23
+1.0V_PRIM VCCSTG_A22 VCCSA I (Max) : 5 A
RC168 1 2 0_0402_5% 4 11 10P_0402_50V8J J27
<33,40,49> SUSP# VBIAS GND AL23 VCCSA K23
+1.2V_VCCSFR_OC VCCPLL_OC VCCSA
RC194 1 @ 2 0_0402_5% EN_1.8VS 5 10 1.8VS_CT2 1 2 K25
<9,33,40> PM_SLP_S3# ON2 CT2 @ CC94 K20 VCCSA K27
+1.0V_VCCSFR VCCPLL_K20 VCCSA
6 9 1000P_0402_50V7K K21 K28
+1.8V_PRIM 7 VIN2 VOUT2 8 VCCPLL_K21 VCCSA K30
VIN2 VOUT2 +1.8VS VCCSA
15 AM23 VCCIO_SENSE T124 TP@
GPAD VCCIO_SENSE AM22 VSSIO_SENSE
VSSIO_SENSE T125 TP@
EM5209VF_DFN14_2X3 <Cocoa_1113>
1U_0402_6.3V6K
1 SA00007PM00 1 H21 VSSSA_SENSE
CC99 CC100 Per VSSSA_SENSE H20 VCCSA_SENSE
VSSSA_SENSE <52>
VCCSA_SENSE <52>
I (Max) : 0.536 A(+1.8VS) 0.1U_0201_10V6K 543977_SKL_PDDG_Rev0_91, 14 OF 20 VCCSA_SENSE
@
2 RON(Max) : 25 mohm 2
change CC95 value from
V drop : 0.013 V 1000pf to 10pf for meet SKL-U_BGA1356
<= 65us timing for
+1.0V_VCCSTU power rail.
C C
+1.0V_VCCSTU +1.0V_VCCST Vinafix.com

RC140 1 2 0_0402_5%
PSC Side
+1.0V_PRIM TO +1.0VS_VCCSTG / +1.0VS_VCCIO
1U_0402_6.3V6K
1
CC48
+5VALW +1.0V_PRIM I (Max) : 3 A(+1.0VS_VCCIO) +1.0V_PRIM
2
RON(Max) : 6.2 mohm near pin A22
V drop : 0.019 V @
0.1U_0201_10V6K
1U_0402_6.3V6K
1 1 Imax : 2.77 A CC89 1 2 0.1U_0201_10V6K

CC88
CC117
@
UC6 @ RC208 Follow 544669_SKL_U__DDR3L_RVP7_Schematic_Rev1.0
1 +1.0V_PRIM
2@ 2 2 VIN1
VIN2 RC189 +1.0V_VCCSFR +1.0V_PRIM
7 6 +1.0VS_VCCSTG_IO 1 @ 2 CC90 1 2 0.1U_0201_10V6K
VIN thermal VOUT SD002000080 PSC Side BSC Side
3 0_0805_5% RC143 1 2 0_0402_5%
VBIAS Imax : 3 A
1U_0402_6.3V6K
SUSP# RC186 1 2 0_0402_5% 4 5 1
ON GND
1U_0402_6.3V6K
B
1 B
CC56
RC187 1 2 0_0402_5%
<33> EC_S0IX_EN
CC55
@ TPS22961DNYR_WSON8
Part Number = SA00007XR00 2
2
For Verify S0IX <Cocoa_1027>
connect to EC, check /w EC
RC208 Follow 544669_SKL_U__DDR3L_RVP7_Schematic_Rev0_53
+1.0V_PRIM +1.2V_VDDQ +1.2V_VDDQ

BSC Side PSC Side PSC Side BSC Side
BSC Side
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CC27
CC28
CC29
CC30
CC31
CC32
CC33
CC34
CC35
CC36
CC47
CC37
CC38
CC39
CC40
CC41
CC42
CC43
CC44
CC45
CC46
CC47 Follow 543016_SKL_U_Y_PDG_0_9
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
+1.35V_VDDQ_CPU : 10UF/6.3V/0603 *6
A 1UF/6.3V/0402 * 4 A
2017/04/10
Compal Secret Data
2019/12/15 Title
SKL-U(8/12)Power
5 4 3 2 1
5 4 3 2 1
+1.0V_PRIM
+1.0V_PRIM
+1.0V_PRIM +1.0V_APLL +3V_PRIM +3V_HDA
1U_0201_6.3V6K
1
UC1O SKL-U
22U_0603_6.3V6M
22U_0603_6.3V6M
1U_0402_6.3V6K
CC91
0.69A Rev_0.53 1209_follow G group GPIO
CPU POWER 4 OF 4
RC148 1 2 0_0603_5%
Rshort@ RC150 1 2 0_0402_5%
Rshort@ 1 1 1 powe rail to +3V_PRIM
2
22U_0603_6.3V6M
22U_0603_6.3V6M
CC147
CC148
CC61
@ @ AB19
AB20 VCCPRIM_1P0 AK15
1 1 VCCPRIM_1P0 VCCPGPPA +3V_PGPPA
CC142
CC134
1U_0402_6.3V6K
@ @ 1 1 near pin K15,L15 P18 AG15 +3V_PGPPB
CC63 2 2 2 VCCPRIM_1P0 VCCPGPPB Y16
VCCPGPPC +3V_PGPPC
CC72
1U_0201_6.3V6K +1.0V_PRIM AF18 Y15 +3V_1.8V_PGPPD
2 2 AF19 VCCPRIM_CORE VCCPGPPD T16
2 2
2.574A VCCPRIM_CORE VCCPGPPE +3V_PGPPE
+1.0VO_DSW V20 AF16
VCCPRIM_CORE VCCPGPPF +1.8V_PRIM
V21 AD15 +3V_PRIM For SD CARD
VCCPRIM_CORE VCCPGPPG
D D
+1.0V_PRIM AL1 V19 +3V_PRIM
DCPDSW_1P0 VCCPRIM_3P3_V19
1U_0201_6.3V6K
Follow 543016_SKL_U_Y_PDG_1_0 1 +1.0V_MPHYAON K17 T1 +1.0V_DTS
VCCMPHYAON_1P0 VCCPRIM_1P0_T1
CC85
L1
+3V_PGPPA VCCMPHYAON_1P0
1U_0402_6.3V6K
+1.0V_CLK5_F24NS AA1 +1.8V_PRIM
+3V_PRIM N15 VCCATS_1P8
2 +1.0V_PRIM VCCMPHYGT_1P0_N15
CC68
1 1.87A N16 AK17 +3V_PRIM_RTC
RC152 1 2 0_0603_5%
Rshort@ N17 VCCMPHYGT_1P0_N16 VCCRTCPRIM_3P3
P15 VCCMPHYGT_1P0_N17 AK19
near pin N18 VCCMPHYGT_1P0_P15 VCCRTC_AK19 +RTCVCC
P16 BB14
2 VCCMPHYGT_1P0_P16 VCCRTC_BB14
10U_0402_6.3V6M
10U_0402_6.3V6M
1 1
@ @ +1.0V_PRIM K15 BB10 +DCPRTC 1 2
VCCAMPHYPLL_1P0 DCPRTC
CC135
CC130
RC197 1 2 0_0402_5%
Rshort@ L15 CC71 0.1U_0201_10V6K
VCCAMPHYPLL_1P0 A14
2 2 VCCCLK1 +1.0V_CLK6_24TBT
+3V_SPI +1.0V_APLL V15
VCCAPLL_1P0 K19
VCCCLK2
1U_0402_6.3V6K
1 +1.0V_PRIM AB17
@ Y18 VCCPRIM_1P0_AB17 L21
CC67 VCCPRIM_1P0_Y18 VCCCLK3 +1.0V_APLL
RC154 1 2 0_0402_5%
Rshort@
+1.0V_PRIM +3VALW_DSW AD17 N20 +1.0V_CLK4_F100OC
2 AD18 VCCDSW_3P3_AD17 VCCCLK4
AJ17 VCCDSW_3P3_AD18 L19
VCCDSW_3P3_AJ17 VCCCLK5 +1.0V_CLK5_F24NS
+1.0V_CLK4_F100OC +3V_PGPPB
+3V_HDA AJ19 A10 +1.0V_CLK6_24TBT
VCCHDA VCCCLK6
1U_0201_6.3V6K
1
RC190 1 2 0_0603_5%
Rshort@ near pin AF20, +3V_SPI AJ16 AN11 PRIMCORE_VID0 T130 TP@
VCCSPI GPP_B0/CORE_VID0
CC141
RC161 1 2 0_0402_5%
Rshort@ AN13 PRIMCORE_VID1 T131 TP@
AF21,T19, T20 GPP_B1/CORE_VID1
22U_0603_6.3V6M
22U_0603_6.3V6M
+1.0V_PRIM AF20
2 VCCSRAM_1P0
1U_0402_6.3V6K
1 1 1 0.64A AF21
VCCSRAM_1P0
CC136
CC137
@ @ T19
VCCSRAM_1P0
CC102
T20
VCCSRAM_1P0
2 2 2 AJ21
+3V_PRIM VCCPRIM_3P3_AJ21
+1.0V_PRIM +1.0V_PRIM AK20
C VCCPRIM_1P0_AK20 C
+1.0V_PRIM N18
+3V_PGPPC VCCAPLLEBB 15 OF 20
+1.0V_PRIM
SKL-U_BGA1356
Imax : 2.57A RC163 1 2 0_0402_5%
Rshort@ near pin N15, N16,
1U_0402_6.3V6K
22U_0603_6.3V6M
22U_0603_6.3V6M
1U_0402_6.3V6K N17,P15,P16 1 1 1
1 @
1U_0402_6.3V6K
CC80
CC81
CC82
1
RTC Battery
CC73
near pin AF18, 2 2 2
CC76
AF19,V20,V21 2 MAX. 8000mil

2
Per 543016_SKL_U_Y_PDG_0_9
VCCRTC does not exceed 3.2 V From PDG From Battery
+3V_1.8V_PGPPD +1.8V_PRIM CC7 Close UC1.AK19. +3V_LID
Power Rail Voltage +RTCBATT_R
+1.0V_MPHYAON +RTCVCC
1K_0402_5%
RC1721 2 0_0402_5%
Rshort@ RC2061 @ 2 0_0402_5% +CHGRTC 3.383V(MAX) RC19
DC1 15mils 15mils
1U_0402_6.3V6K
RC175 1 2 0_0402_5%
Rshort@ 1 15mils 2 2 1
@ BAT54C(VF) 240 mV 1
CC103
1 3 +3VL
1U_0402_6.3V6K
1 CC7
2 +3VL_RTC 3.143V 1U_0201_6.3V6K BAV70W 3P C/C_SOT-323
CC87
2 SC600000B00
2 Result : Pass
+3V_PGPPE
B B
+1.0V_CLK6_24TBT RC167 1 2 0_0402_5%
Rshort@
NEED TO CHECK Kabylake No Support Deep S3.
1U_0402_6.3V6K
1
RC169 1 2 0_0603_5%
Rshort@
BOM
CC74
2
+3VALW TO +3V_PRIM
1U_0402_6.3V6K
1U_0402_6.3V6K
22U_0603_6.3V6M
10U_0402_6.3V6M
1 1 1 1
@ @ @ @ I (Max) : 0.46 A(+3V_PRIM)
CC86
CC75
CC138
CC139
I (Max) : 0.1 A RDS(Typ) : 65 mohm

2 2 2 2 V drop : 0.03 V
+3V_PRIM_RTC
RC171 1 2 0_0402_5%
Rshort@
0.1U_0201_10V6K
+1.0V_DTS
1U_0402_6.3V6K
1 1
CC78
CC77
RC162 1 2 0_0402_5%
Rshort@
2 2
+1.2V_VCCSFR_OC +3V_PRIM
+1.2V_VDDQ +3VALW
0.1U_0201_10V6K
0.1U_0201_10V6K
Follow 543016_SKL_U_Y_PDG_0_9 1 1 1 1
1U_0402_6.3V6K
CC150
CC49
CC51
@
CC50
1U_0402_6.3V6K
+1.0V_PRIM +3V_PRIM +1.8V_PRIM
2 2 2 2
A
+3VS +3VS_PGPPA 1 2 2 1 A
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0402_6.3V6M
22U_0402_6.3V6M
RC141 0_0402_5% RC393 0_0805_5%

1 1 1 1 1 1
CC111
CC112
CC113
CC114
CC116
CC115
@ @ @ @ @ @
RC178 1 2 0_0402_5%
Rshort@
2 2 2 2 2 2
+3VALW +3VALW_DSW
RC173 1 2 0_0603_5%
Rshort@
2017/04/10
Compal Secret Data
2019/12/15 Title
SKL-U(9/12)Power
Follow 543016_SKL_U_Y_PDG_0_9 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
5 4 3 2 1
5 4 3 2 1
+VCC_GT_VR +VCC_GT
JU42A
+VCC_CORE +VCC_CORE +VCC_CORE 1 2 +VCC_GT
12 JUMP@ UC1M SKL-U
UC1L SKL-U JUMP_43X39_0805 Rev_0.53
Rev_0.53 CPU POWER 2 OF 4
CPU POWER 1 OF 4
JU22 N70
A30 G32 1 2 A48 VCCGT N71
VCC_A30 VCC_G32 +VCC_GT 1 2 JUMP@ VCCGT VCCGT
A34 G33 A53 R63
A39 VCC_A34 VCC_G33 G35 A58 VCCGT VCCGT R64
A44 VCC_A39 VCC_G35 G37 JUMP_43X39_0805 A62 VCCGT VCCGT R65
AK33 VCC_A44 VCC_G37 G38 A66 VCCGT VCCGT R66
AK35 VCC_AK33 VCC_G38 G40 AA63 VCCGT VCCGT R67
AK37 VCC_AK35 VCC_G40 G42 AA64 VCCGT VCCGT R68
D AK38 VCC_AK37 VCC_G42 J30
JU42A/JU42B for KBLR AA66 VCCGT VCCGT R69 D
VCC_AK38 VCC_J30 VCCGT VCCGT
AK40
VCC_AK40 VCC_J33
J33 JU221 for KBLU AA67
VCCGT VCCGT
R70
AL33 J37 AA69 R71
AL37 VCC_AL33 VCC_J37 J40 AA70 VCCGT VCCGT T62
AL40 VCC_AL37 VCC_J40 K33 AA71 VCCGT VCCGT U65
AM32 VCC_AL40 VCC_K33 K35 AC64 VCCGT VCCGT U68
AM33 VCC_AM32 VCC_K35 K37 AC65 VCCGT VCCGT U71
AM35 VCC_AM33 VCC_K37 K38 AC66 VCCGT VCCGT W63
G30 VCC_AM38 VCC_K42 K43 AC69 VCCGT VCCGT W66
VCC_G30 VCC_K43
Trace Length < 25 mils VCCGT VCCGT
AC70 W67
K32 E32 AC71 VCCGT VCCGT W68
RSVD_K32 VCC_SENSE VCCCORE_SENSE <52> VCCGT VCCGT
E33 J43 W69
VSS_SENSE VSSCORE_SENSE <52> VCCGT VCCGT
AK32 J45 W70
RSVD_AK32 B63 SOC_SVID_ALERT# J46 VCCGT VCCGT W71 +VCC_GTX_VR
AB62 VIDALERT# A63 J48 VCCGT VCCGT Y62
VCCOPC_AB62 VIDSCK VR_SVID_CLK <52> VCCGT VCCGT
P62 D64 VR_SVID_DATA J50
V62 VCCOPC_P62 VIDSOUT J52 VCCGT JU42B
VCCOPC_V62 G20 J53 VCCGT AK42 1 2
For CPU2+3e SKU VCCSTG_G20
+1.0V_PRIM
VCCGT VCCGTX_AK42 1 2 JUMP@ +VCC_CORE
H63 J55 AK43
VCC_OPC_1P8_H63 J56 VCCGT VCCGTX_AK43 AK45
G61 J58 VCCGT VCCGTX_AK45 AK46 JUMP_43X39_0805
VCC_OPC_1P8_G61 J60 VCCGT VCCGTX_AK46 AK48
AC63 K48 VCCGT VCCGTX_AK48 AK50
AE63 VCCOPC_SENSE K50 VCCGT VCCGTX_AK50 AK52
VSSOPC_SENSE 1 @ 2 K52 VCCGT VCCGTX_AK52 AK53
AE62 RC920 0_0402_5% K53 VCCGT VCCGTX_AK53 AK55
AG62 VCCEOPIO K55 VCCGT VCCGTX_AK55 AK56
VCCEOPIO K56 VCCGT VCCGTX_AK56 AK58
AL63 K58 VCCGT VCCGTX_AK58 AK60
VCCEOPIO_SENSE VCCGT VCCGTX_AK60
For CPU2+3e SKU
AJ62 K60 AK70
VSSEOPIO_SENSE 12 OF 20 L62 VCCGT VCCGTX_AK70 AL43
L63 VCCGT VCCGTX_AL43 AL46
SKL-U_BGA1356 SOC PINS K52 AND AK52 VCCGT VCCGTX_AL50
SHOULD BE LEFT UNCONNECTED L65 AL53
FOR KBL R U42 DESIGNS VCCGT VCCGTX_AL56
L67 AL60
L68 VCCGT VCCGTX_AL60 AM48
C
L69 VCCGT VCCGTX_AM48 AM50 C
L70 VCCGT VCCGTX_AM50 AM52
L71 VCCGT VCCGTX_AM52 AM53
M62 VCCGT VCCGTX_AM53 AM56
N63 VCCGT VCCGTX_AM56 AM58
N64 VCCGT VCCGTX_AM58 AU58
N66 VCCGT VCCGTX_AU58 AU63
N67 VCCGT VCCGTX_AU63 BB57
N69 VCCGT VCCGTX_BB57 BB66
SVID ALERT +1.0V_VCCST
VCCGT VCCGTX_BB66
Place the PU VCCGT_SENSE J70 AK62 VCCGTX_SENSE T155 TP@
<52> VCCGT_SENSE VCCGT_SENSE VCCGTX_SENSE
VSSGT_SENSE J69 AL61 VSSGTX_SENSE T219 TP@
resistors close to CPU <52> VSSGT_SENSE VSSGT_SENSE VSSGTX_SENSE
13 OF 20
1
Trace Length < 25 mils SKL-U_BGA1356

RC179
56_0402_5%
2
SOC_SVID_ALERT# 1 2 (To VR)

VR_ALERT# <52>
RC180 220_0402_5%
+1.0V_VCCST
SVID DATA Place the PU

resistors close to CPU
1
RC181
100_0402_1%
2
B B
VR_SVID_DATA <52> (To VR)
A A

SKL-U(10/12)Power,SVID
5 4 3 2 1
5 4 3 2 1
D D
UC1P SKL-U UC1Q SKL-U
Rev_0.53 Rev_0.53 UC1R SKL-U
GND 1 OF 3 GND 2 OF 3
GND 3 OF 3 Rev_0.53
A5 AL65 AT63 BA49 F8 L18
A67 VSS VSS AL66 AT68 VSS VSS BA53 G10 VSS VSS L2
A70 VSS VSS AM13 AT71 VSS VSS BA57 G22 VSS VSS L20
AA2 VSS VSS AM21 AU10 VSS VSS BA6 G43 VSS VSS L4
AA4 VSS VSS AM25 AU15 VSS VSS BA62 G45 VSS VSS L8
AA65 VSS VSS AM27 AU20 VSS VSS BA66 G48 VSS VSS N10
AA68 VSS VSS AM43 AU32 VSS VSS BA71 G5 VSS VSS N13
AB15 VSS VSS AM45 AU38 VSS VSS BB18 G52 VSS VSS N19
AB16 VSS VSS AM46 AV1 VSS VSS BB26 G55 VSS VSS N21
AD13 VSS VSS AM68 AV71 VSS VSS BB43 G63 VSS VSS P17
AD16 VSS VSS AM71 AW10 VSS VSS BB55 G66 VSS VSS P19
AD19 VSS VSS AM8 AW12 VSS VSS BB6 H15 VSS VSS P20
AD20 VSS VSS AN20 AW14 VSS VSS BB60 H18 VSS VSS P21
AD21 VSS VSS AN23 AW16 VSS VSS BB64 H71 VSS VSS R13
AD62 VSS VSS AN28 AW18 VSS VSS BB67 J11 VSS VSS R6
AD8 VSS VSS AN30 AW21 VSS VSS BB70 J13 VSS VSS T15
AE64 VSS VSS AN32 AW23 VSS VSS C1 J25 VSS VSS T17
AE67 VSS VSS AN37 AW30 VSS VSS D10 J35 VSS VSS T21
AE68 VSS VSS AN38 AW32 VSS VSS D11 J38 VSS VSS T4
C AE69 VSS VSS AN40 AW34 VSS VSS D14 J42 VSS VSS U10 C
AF1 VSS VSS AN42 AW36 VSS VSS D18 J8 VSS VSS U63
AF10 VSS VSS AN58 AW38 VSS VSS D22 K16 VSS VSS U64
AF15 VSS VSS AN63 AW41 VSS VSS D25 K18 VSS VSS U66
AF17 VSS VSS AP10 AW43 VSS VSS D26 K22 VSS VSS U67
AF63 VSS VSS AP23 AW49 VSS VSS D39 K64 VSS VSS V16
AG16 VSS VSS AP28 AW51 VSS VSS D44 K65 VSS VSS V17
AG17 VSS VSS AP32 AW53 VSS VSS D45 K66 VSS VSS V18
AG18 VSS VSS AP35 AW55 VSS VSS D47 K67 VSS VSS W13
AG21 VSS VSS AP58 AW60 VSS VSS D58 K71 VSS VSS Y17
AG71 VSS VSS AP63 AW62 VSS VSS D6 L11 VSS VSS Y19
AH13 VSS VSS AP68 AW64 VSS VSS D62 L16 VSS VSS Y20
AH6 VSS VSS AP70 AW66 VSS VSS D66 L17 VSS VSS Y21
AH63 VSS VSS AR11 AW8 VSS VSS D69 VSS VSS
AH64 VSS VSS AR15 AY66 VSS VSS E11
AH67 VSS VSS AR16 B10 VSS VSS E15 18 OF 20
AJ15 VSS VSS AR20 B14 VSS VSS E18
VSS VSS VSS VSS SKL-U_BGA1356
AJ20 AR28 B22 E46
AK11 VSS VSS AR42 B34 VSS VSS E53
B AK27 VSS VSS AR5 B58 VSS VSS F1 B
AK63 VSS VSS AR50 B62 VSS VSS F13
AK8 VSS VSS AR55 BA1 VSS VSS F23
AL2 VSS VSS AR58 BA10 VSS VSS F27
AL35 VSS VSS AT2 BA2 VSS VSS F33
AL52 VSS VSS AT4 F68 VSS VSS F40
AL58 VSS VSS AT56 VSS VSS BA41
AL64 VSS VSS AT58 VSS
VSS VSS
16 OF 20 17 OF 20
SKL-U_BGA1356 SKL-U_BGA1356
A A
2017/04/10
Compal Secret Data
2019/12/15 Title
SKL-U(11/12)GND
5 4 3 2 1
5 4 3 2 1
Vinafix.com
D D
UC1S SKL-U
Rev_0.53
RESERVED SIGNALS-1
E68 BB68
B67 CFG[0] RSVD_TP_BB68 BB69
D65 CFG[1] RSVD_TP_BB69
D67 CFG[2] AK13
<5> CFG3 CFG[3] RSVD_TP_AK13 T158 TP@
CFG4 E70 AK12 T159 TP@
C68 CFG[4] RSVD_TP_AK12
D68 CFG[5] BB2
C67 CFG[6] RSVD_BB2 BA3
F71 CFG[7] RSVD_BA3
G69 CFG[8]
F70 CFG[9] AU5
CFG[10] TP5 T162 TP@
G68 AT5 T163 TP@
H70 CFG[11] TP6
G71 CFG[12]
H69 CFG[13] D5 <DB> Add ball E3/C7 for KBL U/R Colay
G70 CFG[14] RSVD_D5 D4
CFG[15] RSVD_D4 B2 UC1T SKL-U
E63 RSVD_B2 C2 Remove T166 / T167 for 24MHz GND shielding
CFG[16] RSVD_C2 Rev_0.53
F63 SPARE
CFG[17] B3
E66 RSVD_B3 A3 AW69 F6
CFG[18] RSVD_A3 T252 TP@ RSVD_AW69 RSVD_F6
F66 AW68 E3 PCH_KBLR24_IN
C
CFG[19] AW1 AU56 RSVD_AW68 RSVD_E3 C11 C
CFG_RCOMP E60 RSVD_AW1 AW48 RSVD_AU56 RSVD_C11 B11
CFG_RCOMP E1 PCH_KBLR24_OUT C7 RSVD_AW48 RSVD_B11 A11
XDP_ITP_PMODE E8 RSVD_E1 E2 U12 RSVD_C7 RSVD_A11 D12
<5> XDP_ITP_PMODE ITP_PMODE RSVD_E2 RSVD_U12 RSVD_D12
U11 C12
AY2 BA4 H11 RSVD_U11 RSVD_C12 F52
AY1 RSVD_AY2 RSVD_BA4 BB4 RSVD_H11 RSVD_F52
RSVD_AY1 RSVD_BB4 20 OF 20
D1 A4
D3 RSVD_D1 RSVD_A4 C4 SKL-U_BGA1356
RSVD_D3 RSVD_C4
K46 BB5
K45 RSVD_K46 TP4
RSVD_K45 A69
AL25 RSVD_A69 B69
AL27 RSVD_AL25 RSVD_B69 PCH_KBLR24_IN RX3 2 KBLR@ 1 33_0402_1%PCH_XTAL24R_IN
RSVD_AL27 AY3 RC182 1 2 0_0402_5%
C71 RSVD_AY3
B70 RSVD_C71 D71
RSVD_B70 RSVD_D71 C70
F60 RSVD_C70
RSVD_F60 C54 PCH_KBLR24_OUT RX4 2 KBLR@ 1 33_0402_1% PCH_XTAL24R_OUT 1 KBLR@ 2
A52 RSVD_C54 D54 RC915 1M_0402_5%
RSVD_A52 RSVD_D54
BA70 AY4 KBLR@
BA68 RSVD_TP_BA70 TP1 BB3 YC3 SJ10000UJ00
RSVD_TP_BA68 TP2 24MHZ 18PF XRCGB24M000F2P51R0
J71 AY71 1 RC183 2 0_0402_5%
J68 RSVD_J71 VSS_AY71 AR56 PM_ZVM# 3 1
B RSVD_J68 ZVM# T225 TP@ 3 1 B
For 2+3e Solution NC NC
27P_0402_50V8J
27P_0402_50V8J
F65 AW71 KBLR@ KBLR@
G65 VSS_F65 RSVD_TP_AW71 AW70 PM_ZVM# CC168 CC169
VSS_G65 RSVD_TP_AW70 PM_MSM# 4 2
SI 1/15 F61 AP56 PM_MSM# T230 TP@ +1.0V_VCCST
E61 RSVD_F61 MSM# C64 SKL_CNL#
RSVD_E61 PROC_SELECT#
19 OF 20 1 @ 2
RC184 100K_0402_5%
SKL-U_BGA1356
Follow 544669_SKL_U_DDR3L_RVP7_schematic_rev1.0 24MHz Part:rt::
Maiin::SJ10000X700,, S CRYSTAL 24MHZ 18PF +-20PPM
8Y24000033( TXC)
2nd:: SJ10000TK00,, S CRYSTAL 24MHZ 18PF +-20PPM
7M24000027( TXC)
CFG_RCOMP 1 2
RC185 49.9_0402_1%
CFG4 1 2
RC193 1K_0402_1%
A A
Display Port Presence Strap
1 : Disabled; No Physical Display Port

CFG4 attached to Embedded Display Port Security Classification
2017/04/10
Compal Secret Data
2019/12/15 Title
0 : Enabled; An external Display Port device is SKL-U(12/12)RSVD
connected to the Embedded Display Port THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
5 4 3 2 1
5 4 3 2 1
REVERSE TYPE
CHANNEL-A <6> DDR_M0_CLK0
DDR_M0_CLK0 137
JDIMM1A
CK0(T)
STD
DQ0
8 DDR_M0_D0
Interleaved Memory
DDR_M0_CLK#0 139 7 DDR_M0_D4
<6> DDR_M0_CLK#0 CK0#(C) DQ1
<6> DDR_M0_CLK1 DDR_M0_CLK1 138 20 DDR_M0_D3
DDR_M0_CLK#1 140 CK1(T) DQ2 21 DDR_M0_D7
<6> DDR_M0_CLK#1 CK1#(C) DQ3 4 DDR_M0_D1
DDR_M0_CKE0 109 DQ4 3 DDR_M0_D5
TOP: JDIMM1 CONN Non-ECC DIMM <6> DDR_M0_D[0..15]
<6>
<6>
DDR_M0_CKE0
DDR_M0_CKE1
DDR_M0_CKE1 110 CKE0
CKE1
DQ5
DQ6
DQ7
16
17
DDR_M0_D2
DDR_M0_D6
DDR_M0_CS#0 149 13 DDR_M0_DQS0
<6> DDR_M0_D[16..31] <6> DDR_M0_CS#0 S0# DQS0(T) DDR_M0_DQS0 <6>
DDR_M0_CS#1 157 11 DDR_M0_DQS#0
D +3VS +3VS +3VS <6> DDR_M0_CS#1 S1# DQS0#(C) DDR_M0_DQS#0 <6> D
162
<6> DDR_M0_D[32..47] S2#/C0
165 28 DDR_M0_D8
S3#/C1 DQ8 29 DDR_M0_D12
<6> DDR_M0_D[48..63] DQ9
1
1
DDR_M0_ODT0 155 41 DDR_M0_D14
<6> DDR_M0_ODT0 ODT0 DQ10
RD1 RD4 RD2 DDR_M0_ODT1 161 42 DDR_M0_D10
<6> DDR_M0_ODT1 ODT1 DQ11
@ 0_0402_5% @ 0_0402_5% @ 0_0402_5% JDIMM1B 24 DDR_M0_D9
STD DDR_M0_BG0 115 DQ12 25 DDR_M0_D13
<6> DDR_M0_BG0 BG0 DQ13
111 141 DDR_M0_BG1 113 38 DDR_M0_D11
+1.2V_VDDQ +1.2V_VDDQ <6> DDR_M0_BG1
2
2
SA0_CHA_DIM1 SA1_CHA_DIM1 SA2_CHA_DIM1 112 VDD1 VDD11 142 DDR_M0_BA0 150 BG1 DQ14 37 DDR_M0_D15
VDD2 VDD12 <6> DDR_M0_BA0 BA0 DQ15
117 147 DDR_M0_BA1 145 34 DDR_M0_DQS1
VDD3 VDD13 <6> DDR_M0_BA1 BA1 DQS1(T) DDR_M0_DQS1 <6>
118 148 32 DDR_M0_DQS#1
VDD4 VDD14 DQS1#(C) DDR_M0_DQS#1 <6>
1
1
123 153 DDR_M0_MA0 144
VDD5 VDD15 <6> DDR_M0_MA0 A0
RD3 RD5 RD6 124 154 DDR_M0_MA1 133 50 DDR_M0_D21
VDD6 VDD16 <6> DDR_M0_MA1 A1 DQ16
0_0402_5% 0_0402_5% 0_0402_5% 129 159 DDR_M0_MA2 132 49 DDR_M0_D17
130 160 DDR_M0_MA3 131 62 DDR_M0_D23
135 163 DDR_M0_MA4 128 63 DDR_M0_D18
2
2 +3V_PRIM_DA 136 DDR_M0_MA5 126 46 DDR_M0_D16

VDD10 <6> DDR_M0_MA5 A5 DQ20
DDR_M0_MA6 127 45 DDR_M0_D20
<6> DDR_M0_MA6 A6 DQ21
255 258 DDR_M0_MA7 122 58 DDR_M0_D19
VDDSPD VTT +0.6V_0.6VS <6> DDR_M0_MA7
DDR_M0_MA8 125 A7 DQ22 59 DDR_M0_D22
0.1U_0201_10V6K
164 257 DDR_M0_MA9 121 55 DDR_M0_DQS2
PLACE ALL THE BELOW RESISTORS CLOSE TO SODIMM
2.2U_0402_6.3V6M
+0.6V_DDR_VREFCA VREFCA VPP1 +2.5V <6> DDR_M0_MA9 A9 DQS2(T) DDR_M0_DQS2 <6>
CD1
2 2 259 DDR_M0_MA10 146 53 DDR_M0_DQS#2
VPP2 <6> DDR_M0_MA10 A10_AP DQS2#(C) DDR_M0_DQS#2 <6>
DDR_M0_MA11 120
<6> DDR_M0_MA11 A11
CD2
1 99 DDR_M0_MA12 119 70 DDR_M0_D25
VSS VSS <6> DDR_M0_MA12 A12 DQ24
2 102 DDR_M0_MA13 158 71 DDR_M0_D28
1 1 VSS VSS <6> DDR_M0_MA13 A13 DQ25
5 103 DDR_M0_MA14_WE# 151 83 DDR_M0_D30
SPD ADDRESS FOR CHANNEL A : 6 VSS
VSS
VSS
VSS
106 9/8 Modify
<6>
<6>
DDR_M0_MA14_WE#
DDR_M0_MA15_CAS#
DDR_M0_MA15_CAS# 156
DDR_M0_MA16_RAS# 152
A14_WE#
A15_CAS#
DQ26
DQ27
84 DDR_M0_D31
DDR_M0_D24
9 107 66
WRITE ADDRESS: 0XA0 PLACE NEAR TO PIN
10
14
VSS
VSS
VSS
VSS
167
168
<6> DDR_M0_MA16_RAS#
DDR_M0_ACT# 114
A16_RAS# DQ28
DQ29
67
79
DDR_M0_D29
DDR_M0_D27
READ ADDRESS: 0XA1 15
18
VSS
VSS
VSS
VSS
171
172
<6> DDR_M0_ACT#
DDR_M0_PAR 143
ACT# DQ30
DQ31
80
76
DDR_M0_D26
DDR_M0_DQS3
SA0 = 0; SA1 = 0; SA2 = 0. 19
22
VSS
VSS
VSS
VSS
175
176 RD7 2
<6> DDR_M0_PAR
<6> DDR_M0_ALERT#
1
DDR_M0_ALERT#
DIMM1_CHA_EVENT#
116
134
PARITY
ALERT#
DQS3(T)
DQS3#(C)
74 DDR_M0_DQS#3
DDR_M0_DQS3
DDR_M0_DQS#3
<6>
<6>
+1.2V_VDDQ
C
DDR4 POR OPERATING SPEED: 1867 MT/S 23
26
VSS
VSS
VSS
VSS
180
181
240_0402_1%
<6,18> DDR_DRAMRST#_R
DDR_DRAMRST#_R 108 EVENT#
RESET# DQ32
174
173
DDR_M0_D32
DDR_M0_D37 C
VSS VSS DQ33
STRETCH GOAL IS 2133 MT/S 27
30 VSS VSS
184
185 PCH_SMBDATA 254 DQ34
187
186
DDR_M0_D34
DDR_M0_D39
VSS VSS <7,18> PCH_SMBDATA SDA DQ35
31 188 PCH_SMBCLK 253 170 DDR_M0_D36
VSS VSS <7,18> PCH_SMBCLK SCL DQ36
35 189 169 DDR_M0_D33
36 VSS VSS 192 SA2_CHA_DIM1 166 DQ37 183 DDR_M0_D35
Layout Note: Layout Note: VSS VSS SA2 DQ38
39 193 SA1_CHA_DIM1 260 182 DDR_M0_D38
Place near JDIMM1.257,259 Place near JDIMM1.258 40 VSS VSS 196 SA0_CHA_DIM1 256 SA1 DQ39 179 DDR_M0_DQS4
VSS VSS SA0 DQS4(T) DDR_M0_DQS4 <6>
43 197 177 DDR_M0_DQS#4
VSS VSS DQS4#(C) DDR_M0_DQS#4 <6>
44 201
47 VSS VSS 202 92 195 DDR_M0_D44
48 VSS VSS 205 91 CB0_NC DQ40 194 DDR_M0_D45
+2.5V +0.6V_0.6VS 51 VSS VSS 206 101 CB1_NC DQ41 207 DDR_M0_D42
10uF*2 10uF*2 VSS VSS CB2_NC DQ42
52 209 105 208 DDR_M0_D43
1uF*2 1uF*1 56 VSS VSS 210 88 CB3_NC DQ43 191 DDR_M0_D41
@ESD@ 57 VSS VSS 213
For ECC DIMM 87 CB4_NC DQ44 190 DDR_M0_D40
VSS VSS CB5_NC DQ45
10U_0603_6.3V6M
10U 6.3V M X5R 0603 H0.8
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0201_10V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1 1 1 1 1 1 1 1 60 214 100 203 DDR_M0_D46

VSS VSS CB6_NC DQ46
CC159
61 217 104 204 DDR_M0_D47

VSS VSS CB7_NC DQ47
CD3
CD4
CD5
CD6
CD7
CD8
CD9
64 218 97 200 DDR_M0_DQS5

VSS VSS DQS8(T) DQS5(T) DDR_M0_DQS5 <6>
65 222 95 198 DDR_M0_DQS#5
2 2 2 2 2 2 2 2 VSS VSS DQS8#(C) DQS5#(C) DDR_M0_DQS#5 <6>
68 223
69 VSS VSS 226 +1.2V_VDDQ 216 DDR_M0_D53
72 VSS VSS 227 12 DQ48 215 DDR_M0_D48
73 VSS VSS 230 33 DM0#/DBI0# DQ49 228 DDR_M0_D54
86 VSS VSS 243 DDR_DRAMRST#_R 241 DM6#/DBI6# DQ55 221 DDR_M0_DQS6
VSS VSS DM7#/DBI7# DQS6(T) DDR_M0_DQS6 <6>
89 244 96 219 DDR_M0_DQS#6
VSS VSS DM8#/DBI8# DQS6#(C) DDR_M0_DQS#6 <6>
Layout Note: 90 247
93 VSS VSS 248 @ESD@
PLACE THE CAP near JDIMM1. 164 VSS VSS
1
94 251 CD10
+3V_PRIM +3V_PRIM_DA 98 VSS VSS 252 0.1U_0402_25V6 237 DDR_M0_D60
VSS VSS PLACE NEAR TO SODIMM DQ56
B 236 DDR_M0_D57 B
2
1 2 262 261 DQ57 249 DDR_M0_D59
RD32 0_0402_5% GND GND DQ58 250 DDR_M0_D62
DQ59 232 DDR_M0_D56
+0.6V_DDR_VREFCA FOX_AS0A827-H2RB-7H DQ60 233 DDR_M0_D61
2.2uF*1 DQ61 245 DDR_M0_D58
0.1uF*1 DQ62 246 DDR_M0_D63
CONN@ DQ63
2 2 242 DDR_M0_DQS7
DQS7(T) DDR_M0_DQS7 <6>
240 DDR_M0_DQS#7
DQS7#(C) DDR_M0_DQS#7 <6>
CD11 CD12
1
0.1U_0201_10V6K
1
2.2U_0402_6.3V6M Part Number:LTCX0069GA0
Part Value:S SOCKET FOX AS0A827-H2RB-7H 260P DDR4 +1.2V_VDDQ
FOX_AS0A827-H2RB-7H
CONN@
DIMM Side CPU Side
2
RD8 +0.6V_DDR_VREFCA +0.6V_VREFCA
Layout Note:
Place near JDIMM1 @ 2 1K_0402_1%
CD13
1
0.1U_0402_10V6K
1
1 RD9 2
VREF traces should be at least 20 mils
10uF*6 2_0402_1% wide with 20 mils spacing to other
+1.2V_VDDQ 1uF*8 +1.2V_VDDQ 2
1 signals
330uF*1
2
CD15
+1.2V_VDDQ RD10 CD14 0.022U_0402_25V7K
2
1K_0402_1% 0.1U_0402_10V6K
1
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1
CD93
CD16
CD17
CD18
CD19
CD20
CD21
CD22
CD23
CD95
A 1 RD11 A
CD96
CD24
CD25
CD26
CD27
CD28
CD29
CD30
CD31
CD94
24.9_0402_1%
C174 +
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 Part Number = SF000006S00
1
330U_2.5V_M
2
@

P18-DDRIV_CHA: DIMM0
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS v0.3
5 4 3 2 1
5 4 3 2 1
CHANNEL-B STD (5.2 mm)

TOP: JDIMM2 CONN Non-ECC DIMM Interleaved Memory <6> DDR_M1_D[0..15]
<6> DDR_M1_CLK0
<6> DDR_M1_CLK#0
<6> DDR_M1_CLK1
DDR_M1_CLK0
DDR_M1_CLK#0
DDR_M1_CLK1
DDR_M1_CLK#1
137
139
138
140
JDIMM2A
CK0(T)
CK0#(C)
CK1(T)
STD
DQ0
DQ1
DQ2
8
7
20
21
DDR_M1_D15
DDR_M1_D10
DDR_M1_D11
DDR_M1_D12
<6> DDR_M1_CLK#1 CK1#(C) DQ3 4 DDR_M1_D14
+3VS +3VS +3VS <6> DDR_M1_D[16..31] DQ4
DDR_M1_CKE0 109 3 DDR_M1_D9
<6> DDR_M1_CKE0 CKE0 DQ5
DDR_M1_CKE1 110 16 DDR_M1_D8
<6> DDR_M1_D[32..47] <6> DDR_M1_CKE1 CKE1 DQ6 17 DDR_M1_D13
DQ7
1
1
DDR_M1_CS#0 149 13 DDR_M1_DQS1
D <6> DDR_M1_D[48..63] <6> DDR_M1_CS#0 S0# DQS0(T) DDR_M1_DQS1 <6> D
RD19 RD20 RD21 DDR_M1_CS#1 157 11 DDR_M1_DQS#1
<6> DDR_M1_CS#1 S1# DQS0#(C) DDR_M1_DQS#1 <6>
0_0402_5% 0_0402_5% @ 0_0402_5% JDIMM2B 162
@ STD S2#/C0
165 28 DDR_M1_D0
111 141 S3#/C1 DQ8 29 DDR_M1_D5
+1.2V_VDDQ +1.2V_VDDQ
2
2
SA0_CHB_DIM2 2 SA1_CHB_DIM2 SA2_CHB_DIM2 112 VDD1 VDD11 142 DDR_M1_ODT0 155 DQ9 41 DDR_M1_D7
VDD2 VDD12 <6> DDR_M1_ODT0 ODT0 DQ10
117 147 DDR_M1_ODT1 161 42 DDR_M1_D6
VDD3 VDD13 <6> DDR_M1_ODT1 ODT1 DQ11
118 148 24 DDR_M1_D4
VDD4 VDD14 DQ12
1
1
123 153 DDR_M1_BG0 115 25 DDR_M1_D1
VDD5 VDD15 <6> DDR_M1_BG0 BG0 DQ13
RD22 RD23 RD24 124 154 DDR_M1_BG1 113 38 DDR_M1_D3
VDD6 VDD16 <6> DDR_M1_BG1 BG1 DQ14
0_0402_5% @ 0_0402_5% 0_0402_5% 129 159 DDR_M1_BA0 150 37 DDR_M1_D2
VDD7 VDD17 <6> DDR_M1_BA0 BA0 DQ15
130 160 DDR_M1_BA1 145 34 DDR_M1_DQS0
VDD8 VDD18 <6> DDR_M1_BA1 BA1 DQS1(T) DDR_M1_DQS0 <6>
135 163 32 DDR_M1_DQS#0
DDR_M1_DQS#0 <6>
2
VDD9 VDD19 DQS1#(C)

2
2
+3V_PRIM_DB 136 DDR_M1_MA0 144
VDD10 <6> DDR_M1_MA0 A0
DDR_M1_MA1 133 50 DDR_M1_D20
255 258 DDR_M1_MA2 132 49 DDR_M1_D17
VDDSPD VTT +0.6V_0.6VS <6> DDR_M1_MA2
DDR_M1_MA3 131 A2 DQ17 62 DDR_M1_D19
164 257 DDR_M1_MA4 128 63 DDR_M1_D22
2.2U_0402_6.3V6M
+0.6V_DDRB_VREFCA VREFCA VPP1 259
+2.5V <6> DDR_M1_MA4
DDR_M1_MA5 126 A4 DQ19 46 DDR_M1_D21
1 2 VPP2 <6> DDR_M1_MA5 A5 DQ20
CD60 DDR_M1_MA6 127 45 DDR_M1_D16
PLACE ALL THE BELOW RESISTORS CLOSE TO SODIMM <6> DDR_M1_MA6 A6 DQ21
CD61
1 99 DDR_M1_MA7 122 58 DDR_M1_D18
VSS VSS <6> DDR_M1_MA7 A7 DQ22
0.1U_0201_10V6K 2 102 DDR_M1_MA8 125 59 DDR_M1_D23
2 1 VSS VSS <6> DDR_M1_MA8 A8 DQ23
5 103 DDR_M1_MA9 121 55 DDR_M1_DQS2
VSS VSS <6> DDR_M1_MA9 A9 DQS2(T) DDR_M1_DQS2 <6>
SPD ADDRESS FOR CHANNEL B : 6
9 VSS VSS
106
107
<6> DDR_M1_MA10
DDR_M1_MA10
DDR_M1_MA11
146
120 A10_AP DQS2#(C)
53 DDR_M1_DQS#2
DDR_M1_DQS#2 <6>
VSS VSS <6> DDR_M1_MA11 A11
WRITE ADDRESS: 0XA4 PLACE NEAR TO PIN
10
14 VSS VSS
167
168
<6>
<6>
DDR_M1_MA12
DDR_M1_MA13
DDR_M1_MA12
DDR_M1_MA13
119
158 A12 DQ24
70
71
DDR_M1_D25
DDR_M1_D24
VSS VSS A13 DQ25
READ ADDRESS: 0XA3 15
18 VSS
VSS
VSS
VSS
171
172 9/8 Modify
<6>
<6>
DDR_M1_MA14_WE#
DDR_M1_MA15_CAS#
DDR_M1_MA14_WE# 151
DDR_M1_MA15_CAS# 156 A14_WE#
A15_CAS#
DQ26
DQ27
83
84
DDR_M1_D31
DDR_M1_D27
SA0 = 0; SA1 = 1; SA2 = 0. 19
22 VSS
VSS
VSS
VSS
175
176
<6> DDR_M1_MA16_RAS#
DDR_M1_MA16_RAS# 152
A16_RAS# DQ28
DQ29
66
67
DDR_M1_D28
DDR_M1_D29
23 180 DDR_M1_ACT# 114 79 DDR_M1_D30
DDR4 POR OPERATING SPEED: 1867 MT/S 26 VSS
VSS
VSS
VSS
181
<6> DDR_M1_ACT# ACT# DQ30
DQ31
80 DDR_M1_D26
27 184 DDR_M1_PAR 143 76 DDR_M1_DQS3
STRETCH GOAL IS 2133 MT/S 30 VSS
VSS
VSS
VSS
185
<6>
<6>
DDR_M1_PAR
DDR_M1_ALERT#
DDR_M1_ALERT#
DIMM2_CHB_EVENT#
116 PARITY
ALERT#
DQS3(T)
DQS3#(C)
74 DDR_M1_DQS#3
DDR_M1_DQS3
DDR_M1_DQS#3
<6>
<6>
31 188 RD25 2 1 134
C 35 VSS VSS 189
+1.2V_VDDQ 240_0402_1% DDR_DRAMRST#_R 108 EVENT# 174 DDR_M1_D37 C
VSS VSS <6,17> DDR_DRAMRST#_R RESET# DQ32
Layout Note: Layout Note: 36 192 173 DDR_M1_D33
39 VSS VSS 193 DQ33 187 DDR_M1_D35
Place near JDIMM2.257,259 Place near JDIMM2.258 40 VSS VSS 196 PCH_SMBDATA 254 DQ34 186 DDR_M1_D38
VSS VSS <7,17> PCH_SMBDATA SDA DQ35
43 197 PCH_SMBCLK 253 170 DDR_M1_D32
VSS VSS <7,17> PCH_SMBCLK SCL DQ36
44 201 169 DDR_M1_D36
47 VSS VSS 202 SA2_CHB_DIM2 166 DQ37 183 DDR_M1_D34
48 VSS VSS 205 SA1_CHB_DIM2 260 SA2 DQ38 182 DDR_M1_D39
+2.5V +0.6V_0.6VS 51 VSS VSS 206 SA0_CHB_DIM2 256 SA1 DQ39 179 DDR_M1_DQS4
10uF*2 10uF*2 VSS VSS SA0 DQS4(T) DDR_M1_DQS4 <6>
52 209 177 DDR_M1_DQS#4
1uF*2 1uF*1 56 VSS VSS 210 DQS4#(C) DDR_M1_DQS#4 <6>
57 VSS VSS 213 92 195 DDR_M1_D44
VSS VSS CB0_NC DQ40
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1 1 1 1 1 1 1 60 214 91 194 DDR_M1_D45

VSS VSS CB2_NC DQ42
CD62
CD63
CD64
CD65
CD66
CD67
CD68
64 218 105 208 DDR_M1_D47

2 2 2 2 2 2 2 68 VSS VSS 223 87 CB4_NC DQ44 190 DDR_M1_D41
69 VSS VSS 226
For ECC DIMM 100 CB5_NC DQ45 203 DDR_M1_D43
73 VSS VSS 230 97 CB7_NC DQ47 200 DDR_M1_DQS5
VSS VSS DQS8(T) DQS5(T) DDR_M1_DQS5 <6>
77 231 95 198 DDR_M1_DQS#5
VSS VSS DQS8#(C) DQS5#(C) DDR_M1_DQS#5 <6>
78 234
81 VSS VSS 235 216 DDR_M1_D48
82 VSS VSS 238 12 DQ48 215 DDR_M1_D53
85 VSS VSS 239
+1.2V_VDDQ 33 DM0#/DBI0# DQ49 228 DDR_M1_D54
93 VSS VSS 248 DDR_DRAMRST#_R 199 DM4#/DBI4# DQ53 224 DDR_M1_D55
Layout Note: VSS VSS DM6#/DBI6# DQ55
98 252 241 221 DDR_M1_DQS6
PLACE THE CAP WITHIN 200 MILS VSS VSS 96 DM7#/DBI7# DQS6(T) 219 DDR_M1_DQS#6
DDR_M1_DQS6 <6>
FROM THE JDIMM2 DM8#/DBI8# DQS6#(C) DDR_M1_DQS#6 <6>
1
262 261 @ESD@
GND GND CD92
0.1U_0402_25V6
2
B FOX_AS0A827-H2SB-7H 237 DDR_M1_D60 B
DQ56 236 DDR_M1_D57
+0.6V_DDRB_VREFCA DQ57 249 DDR_M1_D58
2.2uF*1 CONN@ DQ58 250 DDR_M1_D62
0.1uF*1 DQ59 232 DDR_M1_D56
2 2 Part Number:LTCX0069FA0 DQ60 233 DDR_M1_D61
Part Value:S SOCKET FOX AS0A827-H2SB-7H 260P DDR4 PLACE NEAR TO SODIMM DQ61
DQ62
245 DDR_M1_D59
CD69 CD70 246 DDR_M1_D63
DQ63 242 DDR_M1_DQS7
0.1U_0201_10V6K 2.2U_0402_6.3V6M DQS7(T) DDR_M1_DQS7 <6>
1 1 +1.2V_VDDQ 240 DDR_M1_DQS#7
+3V_PRIM +3V_PRIM_DB DQS7#(C) DDR_M1_DQS#7 <6>
1 2
RD33 0_0402_5% FOX_AS0A827-H2SB-7H
CONN@
Layout Note:
Vinafix.com
2
DIMM Side CPU Side
2
CD71
Place near JDIMM2 @ 0.1U_0402_10V6K RD26
1
1K_0402_1%
+0.6V_DDRB_VREFCA +0.6V_B_VREFDQ
1
10uF*6
1 RD27 2
+1.2V_VDDQ 1uF*8 +1.2V_VDDQ 2_0402_1%
330uF*1 VREF traces should be at least 20 mils
2 wide with 20 mils spacing to other
2
2 1 signals
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
RD28 CD72
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 CD81 1K_0402_1% 0.1U_0402_10V6K CD82

1
CD73
CD74
CD75
CD76
CD77
CD78
CD79
CD80
0.1U_0402_10V6K 0.022U_0402_25V7K
1 2
CD83
CD84
CD85
CD86
CD87
CD88
CD89
CD90
A A
2
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
RD29
24.9_0402_1%
@ @
1
P19-DDRIV_CHB: DIMM0
Size
5 4 3 2 1
1 2 3 4 5
A A
B B
C C
D D
2016/12/15
Compal Secret Data
2019/12/15 Title
NV(1/5)-PCIE
1 2 3 4 5
1 2 3 4 5
A A
B B
C C

D
NV(2/5)-IFP_ABCDEF_DAC_XTAL D
1 2 3 4 5
1 2 3 4 5
A A
B B
C C
D D
2016/12/15
Compal Secret Data
2019/12/15 Title
NV(3/5)-POWER
1 2 3 4 5
1 2 3 4 5
A A
B B
C C
D D

NV(4/5)-GPIO/Strap
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-G07DP(KBL-U_UMA_6L) v0.3
1 2 3 4 5
1 2 3 4 5
A A
B B
C C
D D

NV(5/5)-MEMORY FBA
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-G07DP(KBL-U_UMA_6L) v0.3
1 2 3 4 5
5 4 3 2 1
D D
C C
B B
A A

DGPU_DC/DC Interface
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A

N16P_GDDR5_A
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A

N16P_GDDR5_A Upper Half
Size
5 4 3 2 1
5 4 3 2 1
eDP Power <6,7,9,10,11,13,17,18,28,29,30,31,32,33,36,39,40,52> +3VS +3VS

W=60mils
INVPWR_B+ +19VB <46,47,48,49,50,53> +19VB +19VB
+LCDVDD SM010014520 3000ma W=60mils
220ohm@100mhz <7,13,29,30,33,34,35,40,48,49,50,51> +3VALW +3VALW
DCR 0.04
4.7U_0402_6.3V6M
0.1U_0201_10V6K
L1 1 @ 2 0_0805_5%
1 1 SD002000080
CG3
CG2 @ L2 1 @ 2 0_0805_5%
SD002000080
2 2 1 2 DISPOFF#
@EMI@ C117
1 1
C118 1 2 <EC> <33> EC_BKOFF#
R166 33_0402_5%
1
*UG1 +LCDVDD Current Limit : 0.8A 680P_0402_50V7K 68P_0402_50V8J FU1 0.75A_24V_MF-MSMF075/24
SP040009I00 R5176
2 2
10K_0402_5%
D D
2
UG2
9
Rshort@ GND
R6 1 2 ENVDD_CPU_R 1 8 1 2
Rshort@ INVTPWM
<5> ENVDD_CPU
0_0402_5% EN1 IN1 +3VS <CPU> <5> BKL_PWM_CPU
R259 0_0402_5%
1
+3VS R5198 1 @ 2 UG2_FLAG1 2 7 +LCDVDD
100K_0402_5% FLAG1 OUT1
ENVDD_CPU R5200 1 @ 2 UG2_EN2 3 6 +3VS @ R163
0_0402_5% EN2 IN2 100K_0402_5%
0.1U_0402_16V7K
+3VS R5201 1 2 4 5 +3VS_CAMERA
2
FLAG2 OUT2
1U_0402_6.3V4Z
0.1U_0201_10V6K
1U_0402_6.3V4Z
100K_0402_5%
0.1U_0402_16V7K
1U_0402_6.3V4Z
1 1 1 1 1 1
C5232
CG76
C5231
CG75
+3VS R5199 1 @ 2 UG2_FLAG2 G510F51U_MSOP8
CG1
CG4
100K_0402_5% SA0000BEY00 @
2 2 2 2 2 2 RT34 1 2 0_0201_5%
Rshort@ EDP_HPD_R
<CPU> <5> EDP_HPD
Camera
1
RT11
100K_0402_5%
R170 EMI@
1 2
2
SM070005U00 MURATA DLM0NSN900HY2D @ESD@
4 0_0201_5% 3 USB20_N5_R SCA00000U10
<11> USB20_N5 4 3 D7
@EMI@ USB20_P5_R 2
L12 1 2 USB20_P5_R 1
<11> USB20_P5 1 2 USB20_N5_R 3 CT102 1 2 .1U_0402_16V7K EDP_AUXP_C
<5> EDP_AUXP
EMI@ CT101 1 2 .1U_0402_16V7K EDP_AUXN_C
PESD5V0U2BT_SOT23-3 <5> EDP_AUXN
1 2
R171 0_0201_5%
CT98 1 2 .1U_0402_16V7K EDP_TXP0_C
<5> EDP_TXP0
1 @ 2
R5196 0_0603_5% <CPU> <5> EDP_TXN0
CT97 1 2 .1U_0402_16V7K EDP_TXN0_C
C C
SD013000080
D_MIC_CLK
<32> D_MIC_CLK CT103 1 2 .1U_0402_16V7K EDP_TXP1_C
+3VS_CAMERA <5> EDP_TXP1
D_MIC_DATA 1 2
Rshort@ D_MIC_L_DATA CT100 1 2 .1U_0402_16V7K EDP_TXN1_C
<32> D_MIC_DATA <5> EDP_TXN1
R175 0_0402_5%
1 1
+3VS @
C5221 C5222
.1U_0402_16V7K 4.7U_0402_6.3V6M
2 2 SE00000SO00
C593 2 1 220P_0402_50V7K INVTPWM

*FG3 Camera Current Limit : 0.4A
1st:SA000080300, S IC G5250Q1T73U SOT-23 3P POWER SWITCH_0.4A C594 2 1 220P_0402_50V7K DISPOFF#
2nd:SA00004ZA00, S IC AP2330W-7 SC59 3P PWR SW_0.4A
eDP
Touch Screen R5175 EMI@
1
0_0201_5%
2
CONN@
JEDP
L13 EDP_TXP1_C 1
1 @EMI@ 2 USB20_P7_R 1 @ 2 TS_GPIO EDP_TXN1_C 2 1
<11> USB20_P7 1 2 <10> TS_GPIO_CPU 2
@ESD@ R260 0_0402_5% 3
EDP_TXP0_C 4 3
D6 4
4 3 USB20_N7_R 1 2 EDP_TXN0_C 5
<11> USB20_N7 4 3 <33> TS_GPIO_EC 5
USB20_P7_R 2 SM070005U00 R5187 0_0402_5% 6
1 MURATA DLM0NSN900HY2D EDP_AUXP_C 7 6
USB20_N7_R 3 EMI@ EDP_AUXN_C 8 7
1 2 9 8
+LCDVDD 9
R173 0_0201_5% 10
PESD5V0U2BT_SOT23-3 EDP_HPD_R 11 10
B B
SCA00000U10 12 11
USB20_P7_R 13 12
Touch screen USB20_N7_R 14 13
DISPOFF# 15 14
+3VS_TOUCH
Touch Screen Power Selection: INVTPWM
TS_GPIO
16
17
18
15
16
17
19 18
INVPWR_B+ 19
RTS7 1 @ 2 0_0402_5% 20
21 20
22 21
+5VS_TOUCH 22
+3VS_TOUCH 23
24 23
@ FG4 25 24 36
+3VS_TOUCH only for FHD with TS +3VS_CAMERA
USB20_N5_R 26 25 GND 35
3 +3VS USB20_P5_R 27 26 GND 34
OUT Camera 28 27 GND 33
1 28 GND
@ 1 D_MIC_CLK 29 32
CTS3 IN D_MIC_L_DATA 30 29 GND 31
4.7U_0402_6.3V6M 2
20mil 30 GND
2 GND ACES_50203-03001-002
1
@ CTS7 SP010023710
SA00004ZA00 0.1U_0402_16V4Z
G5250Q1T73U SOT-23 3P POWER SWITCH
2
+5VS_TOUCH
RTS8 1 @ 2 0_0402_5%
TS@ FG2 +5VS_TOUCH only for HD with TS

3 +5VS
A OUT A
1
TS@ 1 20mil
CTS6 IN
4.7U_0402_6.3V6M 2
2 GND TS@ 1
CTS1
SA00004ZA00 0.1U_0402_16V4Z
G5250Q1T73U SOT-23 3P POWER SWITCH
2

eDP CONN/Camera/TS
Size
5 4 3 2 1
5 4 3 2 1
<6,7,9,10,11,13,17,18,27,29,30,31,32,33,36,39,40,52> +3VS +3VS

+3VS
<27,32,33,34,36,37,40> +5VS +5VS
HOST_DP1_P0 0.1U_0402_16V7K 1 2 CG8 HDMI_TX_P2
<5> HOST_DP1_P0
HOST_DP1_N0 0.1U_0402_16V7K 1 2 CG9 HDMI_TX_N2
<5> HOST_DP1_N0
<5> HOST_DP1_P1
HOST_DP1_N1 0.1U_0402_16V7K 1 2 CG11 HDMI_TX_N1
<CPU> <5> HOST_DP1_N1
1
RG47
<5> HOST_DP1_P2
HOST_DP1_N2 0.1U_0402_16V7K 1 2 CG13 HDMI_TX_N0 1M_0402_5%
<5> HOST_DP1_N2
2
HOST_DP1_P3 0.1U_0402_16V7K 1 2 CG14 HDMI_CLKP
<5> HOST_DP1_P3 RG108
2
D HOST_DP1_N3 0.1U_0402_16V7K 1 2 CG15 HDMI_CLKN D
<5> HOST_DP1_N3
1 6 HDMI_HPD 1 2 HP_DETECT
<5> HOST_DP1_HPD
20K_0402_5%
QG1A 10K_0402_5%
5
6
7
8
5
6
7
8
L2N7002SDW1T1G 2N SC88-6
1
SB00001FF00 1
5V Level RG56 @
QG1B SB00001FF00 CM17
L2N7002SDW1T1G 2N SC88-6 220P_0402_50V7K
4
3
2
1
4
3
2
1
3 4 2
2
RP1 RP2
470_0804_8P4R_5% 470_0804_8P4R_5%
5
+3VS
+3VS
*DDA30_LA-F292PR02: RS_8.2ohm_RP_360ohm @ESD@

D21
HDMI_R_TX_N0 1 1 10 9 HDMI_R_TX_N0
HDMI_CLKP RG59 1 EMI@ 2 15 +-1% 0402 HDMI_R_CLKP
HDMI_R_TX_P0 2 2 9 8 HDMI_R_TX_P0
2
C CG71 EMI@ HDMI_R_CLKN 4 4 7 7 HDMI_R_CLKN C
2
360 +-5% 0402
SD028360080 HDMI_R_CLKP 5 5 6 6 HDMI_R_CLKP
HOST_DP1_CTRL_CLK 1 6 HDMI_CTRL_CLK
<5> HOST_DP1_CTRL_CLK
1
HDMI_CLKN RG60 1 EMI@ 2 15 +-1% 0402 HDMI_R_CLKN 3 3

QG2A SB00001FF00
8 L2N7002SDW1T1G 2N SC88-6
+3VS
HDMI_TX_N2 RG63 1 EMI@ 2 15 +-1% 0402 HDMI_R_TX_N2
AZ1045-04F.R7G DFN2510P10E ESD
2
SC300001Y00
CG72 EMI@
5
360 +-5% 0402
SD028360080
HOST_DP1_CTRL_DATA 4 3 HDMI_CTRL_DAT
<5> HOST_DP1_CTRL_DATA
1
HDMI_TX_P2 RG61 1 EMI@ 2 15 +-1% 0402 HDMI_R_TX_P2 @ESD@

D22 QG2B SB00001FF00
HDMI_R_TX_N1 1 1 10 9 HDMI_R_TX_N1 L2N7002SDW1T1G 2N SC88-6
HDMI_TX_P1 RG65 1 EMI@ 2 15 +-1% 0402 HDMI_R_TX_P1
HDMI_R_TX_P1 2 2 9 8 HDMI_R_TX_P1
2
CG73 EMI@ HDMI_R_TX_N2 4 4 7 7 HDMI_R_TX_N2 +HDMI_CRT_5V

360 +-5% 0402
SD028360080 HDMI_R_TX_P2 5 5 6 6 HDMI_R_TX_P2
+3VS
1
HDMI_TX_N1 RG10 1 EMI@ 2 15 +-1% 0402 HDMI_R_TX_N1 3 3 RG105

1 8 HDMI_CTRL_CLK
8 2 7 HDMI_CTRL_DAT
HDMI_TX_P0 RG12 1 EMI@ 2 15 +-1% 0402 HDMI_R_TX_P0 3 6 HOST_DP1_CTRL_CLK
B AZ1045-04F.R7G DFN2510P10E ESD 4 5 HOST_DP1_CTRL_DATA B
2
SC300001Y00
CG74 EMI@ 2.2K_0804_8P4R_5%
360 +-5% 0402 HDMI Conn.
SD028360080
1
HDMI_TX_N0 RG13 1 EMI@ 2 15 +-1% 0402 HDMI_R_TX_N0 @ESD@

DG1 JHDMI CONN@
HP_DETECT 1 1 10 9 HP_DETECT HP_DETECT 19
18 HP_DET
+HDMI_CRT_5V +5V
HDMI_CTRL_DAT 2 2 9 8 HDMI_CTRL_DAT 17
HDMI_CTRL_DAT 16 DDC/CEC_GND
HDMI_CTRL_CLK 4 4 HDMI_CTRL_CLK HDMI_CTRL_CLK SDA
7 7 15
SCL
14
5 5 Utility
6 6 13
CEC
HDMI_R_CLKN 12
3 3 @ @ 11 CK-
CK_shield
10P_0402_50V8J
10P_0402_50V8J
W=40mils 1 1 HDMI_R_CLKP 10
8 CM26 CM27 HDMI_R_TX_N0 9 CK+
FG1 +HDMI_CRT_5V D0-
8
AZ1045-04F.R7G DFN2510P10E ESD HDMI_R_TX_P0 7 D0_shield
3 SC300001Y00 2 2 HDMI_R_TX_N1 6 D0+
OUT 5 D1-
1 HDMI_R_TX_P1 4 D1_shield 23
+5VS IN D1+ GND1
1 1 HDMI_R_TX_N2 3 22
2 2 D2- GND2 21
GND HDMI_R_TX_P2 1 D2_shield GND3 20
CG46 CG47 D2+ GND4
0.1U_0402_16V7K 2 4.7U_0402_6.3V6M 2 ACON_HMRBL-AK120H
A AP2330W-7_SC59-3 A
DC231709273
SA00004ZA00

HDMI Conn/Level shift
Size
v0.3
5 4 3 2 1
5 4 3 2 1
JL33
+LAN_VDD_3V3 Rising
1
1 2
2
JUMP@
time
+3VALW @
JUMP_43X79 need>0.5mS and
UL2
1
<100mS +LAN_VDD_3V3
CL8, CL23 close LL2.
5 VOUT CL26 close UL1 Pin 3.
VIN
1 CL12 close UL1 Pin 8.
@ 2 CL13 ~ CL15 close UL1 Pin 22. +LAN_VDD_1V0
CL28 4 GND
<33> LAN_PWR_EN EN CL11, CL27 close UL1 Pin 30.
1500P_0402_50V7K LL2
2 3 +LAN_REGOUT 1 2
/OC
1U_0402_6.3V6K
1U_0402_6.3V6K
4.7U_0402_6.3V6M
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
2.2UH +-20% 1239AS-H-2R2M=P2 2A
4.7U_0603_6.3V6K
G524B1T11U_SOT23-5 SH000014700 1 1 1 1 1 1 1 1 1 1
CL29
CL8
CL23
SA00006Y800 @ @
CL11 CL12 CL13 CL14 CL15 CL26 CL27
D @ D
2 2 2 2 2 2 2 2 2 2
EC_LAN_ISOLATEB#_R 2 1 +3VS
1K_0402_5% RM6
RTL8107ESH-CG/RTL8111HSH-CG Co-Lay
2
+LAN_VDD_3V3 +LAN_VDD_3V3
RM11
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
0.1U_0402_16V7K
0.1U_0402_16V7K
UL1 +LAN_VDD_3V3=40mil 15K_0402_5%
0.1U_0402_16V7K
1 1 1 1 1 1 RTL8111HSH-CG
1
CL16
@ SA000084T00 +LAN_VDD_1V0 +VDDREG=40mil
CL20 CL19 CL9 CL5 CL10 L
@ +LAN_REGOUT=60mil
2 2 2 2 2 2 LAN_MDIP0 1 3
LAN_MDIN0 2 MDIP0 AVDD10 8
LAN_MDIP1 4 MDIN0 AVDD10 30 +LAN_VDD_3V3 XTLI
LAN_MDIN1 5 MDIP1 AVDD10 22 +LAN_VDD_3V3
LAN_MDIP2 6 MDIN1 DVDD10 2 1 XTLO
LAN_MDIN2 7 MDIP2 11 1M_0402_5% RL7
MDIN2 AVDD33
1
LAN_MDIP3 9 32 +LAN_VDD_3V3
LAN_MDIN3 10 MDIP3 AVDD33 RL15
MDIN3 23 10K_0402_5% YL1
CL9, CL20 close to UL1 Pin 11 CL10& CL16 close to UL1: Pin 23 VDDREG(VDD33) 24 +LAN_REGOUT
CLKREQ_PCIE#1 2 1
Rshort@ CLKREQ_PCIE#1_R 12 REGOUT 1 3
CL5 & CL19 close to UL1: Pin 32 <9> CLKREQ_PCIE#1
2
PLT_RST# RL6 0_0201_5% 19 CLKREQB 21 EC_PME# 1 3
<9,30,31,33,35> PLT_RST# PERSTB LANWAKEB EC_PME# <33> NC NC
20 EC_LAN_ISOLATEB#_R
CLK_PCIE_P1 15 ISOLATEB +LAN_VDD_3V3
<9> CLK_PCIE_P1 REFCLK_P 2 2 4 2
10P_0402_50V8J
CL25
CL24
10P_0402_50V8J
CLK_PCIE_N1 16 27 LAN_ACT#
<9> CLK_PCIE_N1 REFCLK_N LED0 26 LED1/GPO 1 @ 2
PCIE_CTX_C_DRX_P5 13 LED1/GPO 25 LAN_LINK# RL56 4.7K_0402_5%
<11> PCIE_CTX_C_DRX_P5 HSIP LED2(LED1) 1 1
PCIE_CTX_C_DRX_N5 14 SJ10000UP00
<11> PCIE_CTX_C_DRX_N5 HSIN
PCIE_CRX_DTX_P5 CR11 1 2 0.1U_0402_10V7K PCIE_CRX_C_DTX_P5 17 28 XTLI 25MHZ 10PF XRCGB25M000F2P34R0
<11> PCIE_CRX_DTX_P5 HSOP CKXTAL1
PCIE_CRX_DTX_N5 CR13 1 2 0.1U_0402_10V7K PCIE_CRX_C_DTX_N5 18 29 XTLO
<11> PCIE_CRX_DTX_N5 HSON CKXTAL2
RSET 31 33
RSET GND
2
RL11
C C
TSL1 2.49K_0402_1%
25 XGND RL55 1 @ 2 0_0805_5% (SA0000ALR00) RTL8107ESH-CG 10/100
+V_DAC 1 LANGND 24
1
LAN_MDIP0 2 TCT1 MCT1 23 RJ45_MDIP0 RP5
LAN_MDIN0 3 TD1+ MX1+ 22 RJ45_MDIN0 MCT1 1 8
(SA000084T00) RTL8111HSH-CG Giga
TD1- MX1- MCT2 2 7
4 21 MCT3 3 6
LAN_MDIP1 5 TCT2 MCT2 20 RJ45_MDIP1 MCT4 4 5
LAN_MDIN1 6 TD2+ MX2+ 19 RJ45_MDIN1
TD2- MX2- 75_0804_8P4R_1%
7 18 SD300002E80 2
LAN_MDIP2 8 TCT3 MCT3 17 RJ45_MDIP2 CL2 +LAN_VDD_3V3
LAN_MDIN2 9 TD3+ MX3+ 16 RJ45_MDIN2 SE167100J80
TD3- MX3- 10P_1808_3KV JLAN
10 15 1 A1
LAN_MDIP3 11 TCT4 MCT4 14 RJ45_MDIP3 White_LED+
TD4+ MX4+ 1
LAN_MDIN3 12 13 RJ45_MDIN3 CL3 LAN_LINK# 2 1 LAN_LINK#_R LAN_ACT#_R A2
TD4- MX4- 120P_0402_50V8J RL30 1K +-5% 0402 White_LED-
LANGND EMI@ RJ45_MDIN3 8
DI_D4-
3
2
2 1 LAN-8100G 1G DL1 RJ45_MDIP3 7
3
@EMI@ DI_D4+
SP050008Y00 PESD5V0U2BT 3P CC SOT23 ESD
CL1 CL4 ESD@ RJ45_MDIN1 6
RX_D2-
1
0.01U_0402_16V7K 0.1U_0402_16V7K SCA00000T00

1 2 RJ45_MDIN2 5
1
BI_D3-
RJ45_MDIP2 4
BI_D3+
RJ45_MDIP1 3
RX_D2+
RJ45_MDIN0 2 9
TX_D1- GND1 10
RJ45_MDIP0 1 GND2 11
TX_D1+ GND3 12
B1 GND4
Amber_LED+
LAN_ACT# 2 1 LAN_ACT#_R LAN_LINK#_R B2
RL31 510_0402_5% Amber_LED-
SINGA_2RJ3081-1A8211F LANGND
DC231710035
@ESD@ @ESD@
B B
DM12 DM13
LAN_MDIP0 4 3 LAN_MDIN0 LAN_MDIP2 4 3 LAN_MDIN2
4 3 4 3
powe rail need to check powe rail need to check

+LAN_VDD_3V3 5 2 +LAN_VDD_3V3 5 2
Vbus GND Vbus GND
LAN_MDIN1 6 1 LAN_MDIP1 LAN_MDIN3 6 1 LAN_MDIP3

6 1 6 1
YSUSB2.0-5_SOT-23-6-6 YSUSB2.0-5_SOT-23-6-6
SC300001G00 SC300001G00
A A

LAN 8111
v0.3
5 4 3 2 1
5 4 3 2 1
<6,7,9,10,11,13,17,18,27,28,29,31,32,33,36,39,40,52> +3VS +3VS
<7,13,29,33,34,35,40,48,49,50,51> +3VALW +3VALW
D D
+3VS_WLAN Vinafix.com
CONN@
2
JWLAN +3VS_WLAN
+3VS_WLAN
RN7
1 2 4.7K_0402_5%
3 1_GND 3.3V_2 4
<11> USB20_P6
1
5 3_USB_D+ 3.3V_4 6
<11> USB20_N6 5_USB_D- LED1#_6
7 8
7_GND N/C_8
1
0.1U_0402_25V6
100P_0402_50V8J
0.1U_0402_25V6
100P_0402_50V8J
9 10 @RF@ @RF@ @RF@ @RF@
9_N/C N/C_10
1
100P_0402_50V8J
0.1U_0402_25V6
11 12 R5179 R5180 R5181 R5182 R5183 R5184
13 11_N/C N/C_12 14 @RF@ @RF@
2
15 13_N/C N/C_14 16
2
17 15_N/C LED2#_16 18
19 17_N/C GND_18 20
21 19_N/C N/C_20 22
23 21_N/C N/C_22
23_N/C
+3VS_WLAN 25 24 +3VS_WLAN
27 33_GND N/C_32 26
<11> PCIE_CTX_C_DRX_P6 35_PERp0 N/C_34
<11> PCIE_CTX_C_DRX_N6 29 28
37_PERn0 N/C_36
1
31 30
39_GND CLink Reset_38 E51TXD_P80DATA <33>
1
33 32
<11> PCIE_CRX_DTX_P6 41_PETp0 CLink DATA_40 E51RXD_P80CLK <33>
35 34 RN15 @RF@
<11> PCIE_CRX_DTX_N6 43_PETn0 CLink CLK_42
RN3 37 36 10K_0402_5%
10K_0402_5% 39 45_GND COEX3_44 38
<9> CLK_PCIE_P2
2
41 47_REFCLKP0 COEX2_46 40
<9> CLK_PCIE_N2
2
43 49_REFCLKN0 COEX1_48 42 RN14 1 2 0_0201_5%

Rshort@ BT_ON_EC +3VS_WLAN
51_GND SUSCLK_50 SUSCLK <9>
<9> CLKREQ_PCIE#2 45 44 PLT_RST# <9,29,31,33,35>
47 53_CLKREK0# PERST0#_52 46
<9,33> EC_PCIE_WAKE# 55_PEWake0# W_DISABLE2#_54 BT_ON_EC <33>
49 48 WL_OFF# <10>
51 57_GND W_DISABLE1#_56 50
C 59_N/C N/C_58 C
0.1U_0402_16V7K
53 52
61_N/C N/C_60
CN3
55 54 1 1
57 63_GND N/C_62 56 CN2
65_N/C RESERVED_64
1
+3VS_WLAN
10P_0402_50V8J
10P_0402_50V8J
R5185
R5186
59 58
@RF@ @RF@ 61 67_N/C N/C_66 60 22U_0603_6.3V6K
63 69_GND N/C_68 62 2 2
2
65 71_N/C N/C_70 64
67 73_N/C 3.3V_72 66
75_GND 3.3V_74
68
GND 69
GND 70
NC_70 71
NC_71
LOTES_APCI0019-P003H
SP070010DA0
Active Low
WL_PWREN_EC# <33>
1
NGFF and WLAN RWL1
200K_0402_5%
CWL1
Unpop QB8 and RL25 for not support OBFF
2
1 2
+3VS_WLAN
2
+3VS +3VS_WLAN 0.1U_0402_16V4Z
G
B QWL1 B
1 3 +3VALW
2
S
1
RL25 @ CWL2 PJ2301 1P SOT23-3
100K_0402_5% 0.1U_0402_16V4Z SB00000T900
2
G
@ 2
1 3 EC_PCIE_WAKE# 1 @ 2
<9> WAKE#
RWL2 0_0603_5%
D
SB00000EN00
QB8
2N7002H_SOT23-3
A A

WLAN-BT
Size
v0.3
5 4 3 2 1
5 4 3 2 1
+3VS +3VS_SSD
<6,7,9,10,11,13,17,18,27,28,29,30,32,33,36,39,40,52> +3VS +3VS
JPHW9
1 2
1 2
JUMP_43X79 CS27 CSS7 CS8 CS9
1 CSS5 1 CSS6 JUMP@ 1@ 1 1 1
1
47U_0603_6.3V6M
10U_0603_10V6M
0.1U_0201_10V6K
1U_0402_6.3V6K
18P_0201_50V NPO
10P_0201_50V
RF@ RF@ CS10
10P_0201_50V
2
2 2 2 2 2 2 RF@
D D
JSSD
1 2 +3VS_SSD
3 GND 3P3VAUX 4
5 GND 3P3VAUX 6
7 PETn3 NC 8
9 PETp3 NC 10 TS123
11 GND DAS/DSS# 12 TP@
13 PERn3 3P3VAUX 14
15 PERp3 3P3VAUX 16
17 GND 3P3VAUX 18
19 PETn2 3P3VAUX 20
21 PETp2 NC 22
23 GND NC 24
25 PERn2 NC 26
<11> PCIE_CRX_DTX_N11
27
29
31
PERp2
GND
PETn1
Key TYP. M NC
NC
NC
28
30
32
<SSD> <11> PCIE_CRX_DTX_P11
33 PETp1 NC 34
35 GND NC 36
<11> PCIE_CTX_C_DRX_N11 PERn1 NC
<11> PCIE_CTX_C_DRX_P11 37 38 DEVSLP2 <11>
C 39 PERp1 DEVSLP 40 C
41 GND NC 42 RS46 1 2 10K_0402_5%
<11> PCIE_CRX_DTX_P12 43 PETn0/SATA-B+ NC 44
<11> PCIE_CRX_DTX_N12 45 PETp0/SATA-B- NC 46
47 GND NC 48
<11> PCIE_CTX_C_DRX_N12 PERn0/SATA-A- NC
<11> PCIE_CTX_C_DRX_P12 49 50 PLT_RST#_SSD RT3 1 Rshort@ 2 0_0201_5% PLT_RST# <9,29,30,33,35>
51 PERp0/SATA-A+ PERST# 52 CLKREQ_PCIE#4
GND CLKREQ# CLKREQ_PCIE#4 <9>
<9> CLK_PCIE_N4 53 54
55 REFCLKN PEWake# 56
<9> CLK_PCIE_P4 REFCLKP NC
57 58
GND NC
1 2
+3VS @EMI@ CS16

VARIST_ CK0402101V05 0402 67 68
SSD_PDET 69 NC SUSCLK(32kHz) 70
PEDET 3P3VAUX
2
SSD1_IF PU on CPU side RPC13.3_10K 71 72

@ RS21 1 2 73 GND 3P3VAUX 74
+3VS GND 3P3VAUX
100K_0402_5% RS22 10K_0402_5% 75
GND 76
GND1 77
1
GND2
<11> SSD1_IF
YPCI0016-P003A 67P A32
1
D DC04000L9A0 CONN@
2
G
S QS1 SB000009Q80
3
2N7002KW_SOT323-3
B B
pre PV: change to 10K for redriver detect pin voltage level
A A

M.2 SSD
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-G07DP(KBL-U_UMA_6L) v0.3
5 4 3 2 1
5 4 3 2 1
UA1 +3VS +DVDD +3VS +DVDD_IO

+5VS +5VS_PVDD1 RA1 RA2
RA8
9 1 +DVDD 1 2 1 2 1 2
<8> HDA_SYNC_R SYNC DVDD
BCLK 5 8 +DVDD_IO
<8> HDA_BIT_CLK_R BCLK DVDD_IO
CA20
CA19
4.7U_0402_6.3V6M CA32
CA33
0_0402_5% 0_0402_5% 0_0402_5%
4.7U_0402_6.3V6M CA36
CA37
1 2 1 2 20 +5VS_AVDD 1 1 1 1
CA34 RA53 22_0402_5% AVDD1 33
AVDD2 +1.8VS_AVDD 1 1
22P 50V J NPO 0402
10U 6.3V M X5R 0603

0.1U 16V K X7R 0402
0.1U 16V K X7R 0402

EMI@
EMI@ INT_MIC 14 34
0.1U 16V K X7R 0402

MIC2-R/SLEEVE PVDD1 +5VS_PVDD1 2 2 2 2
13 39 +5VS_PVDD2
CA29 MIC2-L/RING2 PVDD2 2 2
GNDA 1 2 MIC2_CAP 15 16 VD33STB1 RA23 2 +3VS
MIC2_CAP VD33STB 0_0402_5%
10U 6.3V M X5R 0603
D 35 SPK_L+ D
SPK_OUT_L+ 36 SPK_L-
SPK_OUT_L-
37 SPK_R-
PC_BEEP 11 SPK_OUT_R- 38 SPK_R+
PCBEEP SPK_OUT_R+
26 HPOUT_R RA38 1 2 30_0402_1% HP_OUTR Headphone
HPOUT_R 25 HPOUT_L RA37 1 2 30_0402_1% HP_OUTL
100K_0402_5% 2.2K_0402_5% HPOUT_L
RA24 1 2 INT_MIC RA40 1 2 MIC2-VREFO 23 +5VS +5VS_AVDD +1.8VS +1.8VS_AVDD
MIC2-VREFO +5VS +5VS_PVDD2 RA5
4 RA39 RA4
SDATA_OUT HDA_SDOUT_R <8>
<33> MUTE_LED_IN 24 7 HDA_SDIN0_R 1 RA26 2 1 2 1 2 1 2
LINE1-VREFO-L SDATA_IN HDA_SDIN0 <8>
GNDA CA30 1 2 10U 6.3V M X5R 0603 LDO1_CAP 21 22_0402_5%
LDO1-CAP
1
CA22
CA21
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
GNDA CA31 1 2 2.2U 6.3V M X5R 0402 VREF 22 0_0402_5% 0_0402_5% 0_0402_5%
VREF
10U 6.3V M X5R 0603
0.1U 16V K X7R 0402

1 1 1 1
CA15 1 2 1U_0402_6.3V6K CPVEE 27 1 1 DA6
CPVEE
CA8
CA39 1 2 10U 6.3V M X5R 0603 CPVDD 29 18 AZ5125-01H.R7G_SOD523-2 @
10U 6.3V M X5R 0603

0.1U 16V K X7R 0402
CPVDD LINE1_L
CA7
CA5
CA6
+1.8VS CBN 28 17 SC400005Q00
CA16 2 11U_0402_6.3V6K CBP 30 CBN LINE1_R 2 2 2 2
CBP 2 2
D_MIC_DATA 2
<27> D_MIC_DATA
2
2 1 D_MIC_CLK_R 3 GPIO0/DMIC_DATA12 32 CA27 1 2 10U 6.3V M X5R 0603
<27> D_MIC_CLK GPIO1/DMIC_CLK LDO2_CAP GNDA
BLM15PX221SN1DEMI@ LA6 6 CA28 1 2 10U 6.3V M X5R 0603
LDO3_CAP GNDA
1 @EMI@ RA41 10 GNDA
CA41 1 2 100K_0402_1% 12 DCDET
+DVDD JD1
10P_0402_50V8J PLUG_IN# 1 2 200K_0402_1% 19 GNDA
RA42 AVSS1 31
2 AVSS2 GNDA
PDB 40 41
PDB THERMALPAD
ALC3247-CG_MQFN40_5X5
Internal SPK
CONN@
JSPK
SPK_R- RA36 1 EMI@ 2 0_0603_5% SPK_R-_CONN 1
+3VS +DVDD SPK_R+ RA34 1 EMI@ 2 0_0603_5% SPK_R+_CONN 2 1
SPK_L- RA33 1 EMI@ 2 0_0603_5% SPK_L-_CONN 3 2
C 3 C
1
SPK_L+ RA35 1 EMI@ 2 0_0603_5% SPK_L+_CONN 4
PC Beep 4
1
RA10 5
10K_0402_0.5% RA9 6 G1
@ 100K_0402_5% G2
wide 40 MIL
220P_0402_50V7K
220P_0402_50V7K
220P_0402_50V7K
220P_0402_50V7K
ACES_50278-00401-001
2
2
EC Beep <33> EC_BEEP# 1 2 PC_BEEP_R 1 1 1 1
2
B
@EMI@ C11
@EMI@ C12
@EMI@ C13
C14
CA44
@ QA2 0.1U 16V K X7R 0402 RA16
E
HDA_RST#_R 3 1 PDB 47K_0402_5%

<8> HDA_RST#_R 2 2 2 2
@EMI@
C
SB Beep <8,10> HDA_SPKR 1 2 1 2 1 2 PC_BEEP
CA23
MMBT3904WH_SOT323-3 1 CA43 CA42
1
SB000008E10 0.1U 16V K X7R 0402 0.1U 16V K X7R 0402
@
EC_MUTE# 1 2 0.1U 16V K X7R 0402 RA17
<33> EC_MUTE# 2
DA2 SCS00000Z00 10K_0402_5%
RB751V-40 SOD-323
2
1
R5260
2
Close to Codec pin34
0_0201_5%
Reserve for ESD request.

INT_MIC_R GNDA HP_OUTR_R HP_OUTL_R
Place RA51/RA52/RA53 on moat of UA1 BOT side
3
RA51 1 2 0_0603_5%
DA4
Rshort@ L03ESDL5V0CC3-2_SOT23-3 DA5
RA52 1 2 0_0603_5% SCA00002900 L03ESDL5V0CC3-2_SOT23-3
ESD@ SCA00002900
Rshort@ @ESD@
RA54 1 2 0_0603_5%
Rshort@
1
1 2
RA6 0_0402_5%
1/20:Swap DA3
RA7 @
B 1 2 B
0_0402_5%
1 2
CA9 EMI@ JHP
0.1U 16V K X7R 0402 INT_MIC 1 RA13 2 0_0402_5% INT_MIC_R 3 3:M/G_EARTH
EMI@ HP_OUTL 1 RA14 2 0_0402_5% HP_OUTL_R 1 1:L/R_TIP SPRING
EMI@
1 2
CA10 PLUG_IN# 5 5:TRANSFER TERMINAL
0.1U 16V K X7R 0402
EMI@
6 6:MAKE TERMINAL
1 2 HP_OUTR 1 RA15 2 0_0402_5% HP_OUTR_R 2 2:R/L_RING A
CA11 @EMI@ EMI@
0.1U 16V K X7R 0402 4 4:G/M_RING B
100P_0603_50V7 CA24
100P_0603_50V7 CA25
100P_0603_50V7 CA26
1 1 1 7 7:MS_SHELL
1 2
CA12 @EMI@ SINGA_2SJ3095-067111F
@EMI@
@EMI@
@EMI@
0.1U 16V K X7R 0402 DC23000DY00
2 2 2 GNDA Pin6 and Pin5
1 2 Normal OPEN
CA13
0.1U 16V K X7R 0402
EMI@
GNDA
GNDA
A A

AUDIO ALC3258-CG
Custom v0.3
5 4 3 2 1
5 4 3 2 1
+3VL +3VALW_EC
<6,7,9,10,11,13,17,18,19,22,23,24,27,28,29,30,31,32,36,39,40,52,55> +3VS +3VS LK1 SM01000Q500
S SUPPRE_ TAI-TECH HCB1005KF-221T15 0402
+3VALW_EC
EC Board ID (UMA, DIS, phase) control table
0.1U_0201_10V6K
0.1U_0201_10V6K
+3VALW_EC 1 2 +3VALW_EC 1 2 +EC_VCCA
<22,45> +3VALW_EC
2
CK1
CK2
RK1 0_0603_5% 1 1 1
RK2 KBL-U KBL-R
<13,39,46,47,48> +3VL +3VL
CK3 100K_0402_1%
RK4
DB SI PV MV DB SI PV MV
ECAGND
0.1U_0201_10V6K
2 2 2
UMA 15K 27K 43K 75K 130K 200K 270K 430K
1
(0x02) (0x04) (0x06) (0x08) (0x0A) (0x0C) (0x0E) (0x10)
BOARD_ID
DIS 20K (0x03) 33K 56K
(0x05) (0x07) 100K (0x09) 160K (0x0B) 240K 330K (0x0D) (0x0F) 560K (0x11)
+3V_EC_VDD +3VL
2
+3V_LID U_PX@ U_UMA@
ESD@ 1 RK3 2 RK4 RK4
D
2 1 PLT_RST# 56K +-1% 0402 43K +-1% 0402 U_DB_UMA_15kohm:SD034150280, S RES 1/16W 15K +-1% 0402 Reserve EC_CLR_CMOS for clear CMOS D
CK4 0.1U_0402_25V6 0_0402_5% SD034560280 SD034430280 U_DB_ DIS_20kohm:SD034200280, S RES 1/16W 20K +-1% 0402 (2016-03-04 : Confirm intel platform not support EC Clear CMOS function)
U_SI_UMA_27kohm:SD034270280, S RES 1/16W 27K +-1% 0402 (2017-10-05 : 2018OPP Add EC Clear CMOS function)
1
U_SI_ DIS_33kohm:SD034330280, S RES 1/16W 33K +-1% 0402
111
125
R_PX@ R_UMA@ U_PV_UMA_43kohm:SD034430280, S RES 116W 43K +-1% 0402 RK106 1 2 0_0402_5%
22
33
96
67
UK1 CLR_CMOS# <9>
9
RK4 RK4 U_PV_ DIS_56kohm:SD034560280, S RES 1/16W 56K +-1% 0402
330K +-1% 0402 270K +-1% 0402 U_MV_UMA_75kohm:SD034750280, S RES 1/16W 75K +-1% 0402
VCC_LPC
VCC
VCC
VCC
VCC0
VCC
AVCC
1
SD034330380 SD00000G280 U_MV_ DIS_100kohm:SD034100380, S RES 1/16W 100K +-1% 0402 @
@ D
+3VALW_EC RK7 2 1 330K_0402_5% EC_RST# EC_CLR_CMOS 2 Q51
Pin111:VCC0
T2403 TP@ TOUCH_ON 1 21 EC_VCCST_PG_R EC_VCCST_PG_R <9,40> G 2N7002K_SOT23-3
GATEA20/GPIO00 EC_VCCST_PG/GPIO0F
2
@ 1 2 EC_KBRST# 2 23 EC_BEEP# <32> R_DB_UMA_130kohm:SD034130380, S RES 116W 130K +-1% 0402 S SB00000EN00
<7> EC_KBRST# KBRST#/GPIO01 BEEP#/GPIO10 R_DB_ DIS_160kohm:SD034160380, S RES 116W 160K +-1% 0402
CK5 0.1U_0402_16V7K <7,35> SERIRQ SERIRQ 3 26 EC_FAN_PWM1 R483
EC_FAN_PWM1 <36>
3
LPC_FRAME# 4 SERIRQ EC_FAN_PWM/GPIO12 27 EC_CLR_CMOS R_SI_UMA_200kohm:SD034200380, S RES 1/16W 200K +-1% 0402 @
<7> LPC_FRAME# LPC_FRAME# PWM Output AC_OFF/GPIO13 R_SI_ DIS_240kohm:SD000001B80, S RES 116W 240K +-1% 0402
10K_0402_5%
LPC_AD3 5
<7> LPC_AD3 LPC_AD3
LPC_AD2 7 R_PV_UMA_270kohm:SD00000G280, S RES 1/16W 270K +-1% 0402
<7> LPC_AD2
1
LPC_AD1 8 LPC_AD2 63 B/I# R_PV_ DIS_330kohm:SD034330380, S RES 1/16W 330K +-1% 0402
<7> LPC_AD1 LPC_AD1 VCIN1_BATT_TEMP/AD0/GPIO38 B/I# <46>
LPC_AD0 10 LPC & MISC 64
<7> LPC_AD0 LPC_AD0 VCIN1_BATT_DROP/AD1/GPIO39
CLK_PCI_LPC 65 ADP_I
ADP_I/AD2/GPIO3A ADP_I <45,47>
CLK_PCI_LPC 12 AD Input 66 BOARD_ID
<7> CLK_PCI_LPC CLK_PCI_EC AD_BID/AD3/GPIO3B
<9,19,29,30,31,35> PLT_RST# PLT_RST# 13 75 ADP_ID
PCIRST#/GPIO05 AD4/GPIO42 ADP_ID <45>
1 12 2 EC_RST# 37 76 EC_PME#_EC_R R5178 1 2 0_0201_5% EC_PME# <29>
CK9 RK109 22_0402_5% EC_SCI# 20 EC_RST# AD5/GPIO43 VR_HOT# 1 2 0_0402_5%
<5> EC_SCI# EC_SCI#/GPIO0E <52> VR_HOT# PROCHOT# <5>
22P 50V J NPO 0402 EMI@ <7> PM_CLKRUN# 1 @ 2 PM_CLKRUN#_R 38 RK8
EMI@ RK10 1 @ 2 0_0402_5% CLKRUN#/GPIO1D
<9,30> EC_PCIE_WAKE#
RK6 0_0402_5% 68
DA0/GPIO3C 70 NMI_DBG# KBL_ON# <34>
<34> KSI[0..7] DA Output EN_DFAN1/DA1/GPIO3D
1
KSI0 55 71 VR_PWRGD D
KSI0/GPIO30 DA2/GPIO3E VR_PWRGD <52>
KSI1 56 72 EC_MUTE# H_PROCHOT#_EC 2
KSI1/GPIO31 DA3/GPIO3F EC_MUTE# <32>
KSI2 57 G
KSI3 58 KSI2/GPIO32 83 @ QK1 S
3
KSI4 59 KSI3/GPIO33 EC_MUTE#/PSCLK1/GPIO4A 84 2N7002_SOT23-3
C
KSI5 60 KSI4/GPIO34 USB_EN#/PSDAT1/GPIO4B 85 VR_ON SB00000EN00 C
KSI5/GPIO35 PSCLK2/GPIO4C VR_ON <40,52>
1 @ 2 VCIN1_ACOK_R KSI6 61 PS2 Interface 86
<47> VCIN1_ACOK KSI6/GPIO36 PSDAT2/GPIO4D LAN_PWR_EN <29>
R4958 0_0402_5% KSI7 62 87 TP_CLK
<34> KSO[0..17] KSI7/GPIO37 TP_CLK/GPIO4E TP_CLK <34>
KSO0 39 88 TP_DATA
KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <34>
KSO1 40 RK9 1 2 0_0402_5%
KSO2 41 KSO1/GPIO21
1 2 VCIN1_AC_IN_R KSO3 42 KSO2/GPIO22 97 ENBKL +3VALW
R5094 0_0402_5% KSO4 43 KSO3/GPIO23 ENKBL/GPXIOA00 98 ENBKL <5>
KSO4/GPIO24 WOL_EN/GPXIOA01 WL_PWREN_EC# <30>
KSO5 44 99 ME_FLASH_EN TP_CLK RK12 1 2 4.7K_0402_5%
KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 VCIN0_PH
ME_FLASH_EN <8>
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH1/GPXIOD00 VCIN0_PH <45>
TP_DATA RK13 1 2 4.7K_0402_5%
KSO8 47 KSO7/GPIO27
KSO8/GPIO28 SPI Device Interface
VCIN1_AC_IN 1 @ 2 VCIN1_AC_IN_R KSO9 48 119
KSO9/GPIO29 MISO/GPIO5B EC_SPI_SO <7>
R4960 0_0402_5% KSO10 49 120
KSO10/GPIO2A MOSI/GPIO5C EC_SPI_SI <7> +3VL
KSO11 50 SPI Flash ROM 126 EC_SPI_CLK
For Solve tPCH04(Min 9ms) Sequence Timing KSO12 51 KSO11/GPIO2B SPICLK/GPIO58 128
KSO12/GPIO2C SPICS#/GPIO5A EC_SPI_CS0# <7>
KSO13 52
KSO14 53 KSO13/GPIO2D RP12
KSO15 54 KSO14/GPIO2E 73 8 1
KSO15/GPIO2F EC_CIR_RX/AD6/GPIO40 TS_GPIO_EC <27>
KSO16 81 74 SYS_PWROK SYS_PWROK <9> PLT_RST# 7 2
KSO17 82 KSO16/GPIO48 SYS_PWROK/AD7/GPIO41 89 EC_S0IX_EN EC_ON 6 3
KSO17/GPIO49 GPIO50 EC_S0IX_EN <12>
90 BAT_CHG_LED PCH_PWR_EN 5 4
BATT_CHG_LED#/GPIO52 BAT_CHG_LED <45>
91 CAP_LOCK#
CAPS_LED#/GPIO53 CAP_LOCK# <34>
77 GPIO 92 PWR_LED# 100K_0804_8P4R_5%
<46,47> EC_SMB_CK1 EC_SMB_CLK1/GPIO44 PWR_LED#/GPIO54 PWR_LED# <39>
78 93 ACIN <9>
<46,47> EC_SMB_DA1 EC_SMB_DAT1/GPIO45 BATT_LOW_LED#/GPIO55
RK15 1 2 0_0402_5% EC_SMB_CK2_R 79 95 SYSON PBTN_OUT# R295 1 @ 2 1K_0402_5%
<7,10,22> EC_SMB_CK2 EC_SMB_CLK2/GPIO46 SYSON/GPIO56 SYSON <12,40,49>
RK16 1 2 0_0402_5% EC_SMB_DA2_R 80 121 BT_ON_EC
<7,10,22> EC_SMB_DA2 EC_SMB_DAT2/GPIO47 VR_ON/GPIO57 BT_ON_EC <30>
127 PCH_DPWROK EC_CLR_CMOS 1 @ 2
DPWROK_EC/GPIO59 PCH_DPWROK <9>
SM Bus RK107 10K_0402_5%
+3VALW_EC
<9,12,40> PM_SLP_S3# PM_SLP_S3# 6 100 PCH_RSMRST#
+5VS PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 PCH_RSMRST# <9>
<9> PM_SLP_S5# PM_SLP_S5# 14 101 USB_ON# LID_SW# RK18 2 @ 1 47K_0402_5%
GPIO07 GPXIOA04 USB_ON# <38,39>
B <9> SUSACK# SUSACK# 15 102 VCIN1_PH VCIN1_PH <45> B
PM_SLP_SUS# 16 GPIO08 VCIN1_ADP_PROCHOT/GPXIOA05 103 H_PROCHOT#_EC +3V_SMBUS
<9> PM_SLP_SUS# GPIO0A VCOUT1_PROCHOT#/GPXIOA06
PCH_SUSWARN# 17 104 MAINPWON
<9> PCH_SUSWARN# GPIO0B VCOUT0_MAIN_PWR_ON/GPXIOA07 MAINPWON <48> +3VS
18 105 EC_BKOFF# EC_BKOFF# <27> EC_SMB_CK1 8 1 RP11
RK28 GPIO0C BKOFF#/GPXIOA08
19 GPIO GPO 106 RK25 1 2 0_0402_5% DGPU_PWR_EN <10,24> EC_SMB_DA1 7 2
2 1 MUTE_LED_OUT MUTE_LED_IN 25 AC_PRESENT/GPIO0D GPXIOA09 107 PCH_PWR_EN EC_SMB_CK2 6 3
<32> MUTE_LED_IN PWM2/GPIO11 PCH_PWR_EN/GPXIOA10 PCH_PWR_EN <40,51>
FAN_SPEED1 28 108 +1.0VS_PG EC_SMB_DA2 5 4
<36> FAN_SPEED1 FAN_SPEED1/GPIO14 PWR_VCCST_PG/GPXIOA11 +1.0VS_PG <50>
100K_0402_5% VCIN1_ACOK_R 29
E51TXD_P80DATA 30 FANFB1/GPIO15 2.2K_0804_8P4R_5%
<30> E51TXD_P80DATA EC_TX/GPIO16
E51RXD_P80CLK 31 110 VCIN1_AC_IN_R
RK26 <30> E51RXD_P80CLK EC_RX/GPIO17 VCIN1_AC_IN/GPXIOD01
PCH_PWROK 32 112 EC_ON
<9> PCH_PWROK PCH_PWROK/GPIO18 ALW_PWE_EN EC_ON/GPXIOD02 EC_ON <39,48>
2 1 E51TXD_P80DATA AC_LED# 34 114 ON/OFF# EC_SCI# RK14 2 1 10K_0402_5%
<45> AC_LED# SUSP_LED#/GPIO19 ON/OFF#/GPXIOD03 ON/OFF# <39>
<34> MUTE_LED_OUT 36 GPI 115 LID_SW# LID_SW# <39>
100K_0402_5% NUM_LED#/GPIO1A LID_SW#/GPXIOD04 116 SUSP#
SUSP#/GPXIOD05 SUSP# <12,40,49>
117 VCIN1_AC_IN
GPXIOD06 118 EC_PECI RK17 1 2 43_0402_1%
PECI/GPXIOD07 H_PECI <5>
<9> PBTN_OUT# PBTN_OUT# 122 SYSON RK23 1 @ 2 100K_0402_5%
PM_SLP_S4# 123 PBTN_OUT#/GPIO5D 124 +V18R
<9,12,40,49> PM_SLP_S4# PM_SLP_S4#/GPIO5E V18R/VCC_IO2 +3VALW_EC
1
AGND
CK8 SUSP# RK27 1 2 100K_0402_5%

GND
GND
GND
GND
GND
1 @ 2 PCH_PWROK 4.7U_0402_6.3V6M
RK20 100K_0402_5% KB9022QD_LQFP128_14X14 2
11
24
35
94
113
69
1 2 MUTE_LED_IN 20mil
RK108 10K_0402_5%
EC_SPI_CLK RC369 1 2 HOST_SPI_0_CLK_R
SA000075S30 HOST_SPI_0_CLK_R <7,35>
LK2 SM01000Q500 EMI@ 15_0402_5%
ECAGND 2 1
TAI-TECH HCB1005KF-221T15 0402 CC128 RC369 place near EC Side CC144
22P 50V J NPO 0402
@EMI@
+3VALW_EC
ECAGND <45>
A A
EMI request
1
RK21
10K_0402_5%
2
NMI_DBG# 1 2 NMI_DBG#_CPU <5,10>

DK2 SCS00000Z00
RB751V-40 SOD-323
EC ENE-KB9022
Date: Tuesday, January 09, 2018 Sheet 33 of 59
5 4 3 2 1
<7,13,29,30,33,35,40,48,49,50,51> +3VALW +3VALW
<12,37,38,39,40,48,49,52,53> +5VALW +5VALW

TP Button BD Connector
+3VALW
CONN@
JTP
<33> KSI[0..7]
KSI7
KSI6
Keyboard conn
1 KSI5
2 1 KSI4
<33> TP_CLK 2
3 KSI3 CONN@
<33> TP_DATA 3
4 KSI2 JKB
5 4 7 KSI1 KSI1 32 34
<7> TP_SMBCLK 5 G1 32 G2
6 8 KSI0 KSI7 31 33
<7> TP_SMBDATA 6 G2 31 G1
KSI6 30
ACES_51524-0060N-001 KSO9 29 30
PS2+SMBus SP010014M10 KSI4 28 29
KSI5 27 28
<33> KSO[0..17] 27
3
1 1 KSO17 KSO0 26
DM5 @ @ KSO16 KSI2 25 26
JKB1 KB Spec 25
PESD5V0U2BT 3P CC SOT23 ESD C135 C136 KSO15 KSI3 24
SCA00000T00 KSO14 KSO5 23 24
2 2
Pin1 KSI1 KSI1 23
ESD@ KSO13 KSO1 22
22
470P_0402_50V8J
470P_0402_50V8J
KSO12 Pin32 5V 5V KSI0 21
KSO11 KSO2 20 21
KSO10 KSO4 19 20
KSO9 KSO7 18 19
1
KSO8 KSO8 17 18
KSO7 KSO6 16 17
KSO6 KSO3 15 16
KSO5 KSO12 14 15
KSO4 KSO13 13 14
KSO3 KSO14 12 13
KSO2 KSO11 11 12
KSO1 KSO10 10 11
KSO0 KSO15 9 10
KSO16 8 9
R203 KSO17 7 8
1K_0402_5% 6 7
+5VS 6
CAP_LOCK# 1 2 CAP_LOCK#_R 5
<33> CAP_LOCK# 5
<33> MUTE_LED_OUT 1 2 MUTE_LED_OUT_R 4
+5VALW +5VS R207 3 4
549_0402_1% 2 3
1 2
+5VS 1
1
R23 ACES_50690-0320N-P01
100K_0402_5% CAP_LOCK# SP01001RG00
Q9 +5VS_KBL MUTE_LED_OUT
3
S
2
G
2
<33> KBL_ON# ESD@
D ACES_51575-00401-001 KSI0 C193 2 1 100P_0402_50V8J
1 1
1
0.047U_0402_16V7K
4 6
1 PJ2301 1P SOT23-3 3 4 G2 5 CC122 CC123
@ SB00000T900 2 3 G1 100P_0402_50V8J 100P_0402_50V8J
1 2 2 2
C68
1 ESD@ ESD@
2
JKBL
SP01002BY00

KB/TP
Custom v0.3
5 4 3 2 1
+3VALW +3VALW <7,13,29,30,33,34,40,48,49,50,51>
D Screw Hole D
TPM2.0 UT1
+3VS_TPM +3VALW
H1 H2
H_2P4N H_3P0
H4
H_3P0
H8 H9
CPU
H10 H11
H_5P0 H_5P0 H_5P0 H_5P0
TPM@
<9,29,30,31,33> PLT_RST# 1 TPM@ 2 PLT_RST#_TPM 17 1 RC9341 2 0_0402_5%
R28 0_0402_5% RST# VDD 8 @ @ @ @ @ @ @
1
1 TPM@ 2 TPM_SERIRQ 18 VDD 22
<7,33> SERIRQ PIRQ# VDD 1 1 1 1
R5202 0_0402_5% CT1 CT3 CT4 CT2
<7,33> HOST_SPI_0_CLK_R RT6 1 2 HOST_SPI_0_CLK_R_TPM 19 3
SCLK NC
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1U_0402_6.3V6K
TPM@ 33_0402_5% 4
RT7 1 2 HOST_SPI_0_CS2#_TPM 20 NC 5 2 2 2 2
<7> HOST_SPI_0_CS2# CS# NC
TPM@ 33_0402_5% 10
RT8 1 2 HOST_SPI_0_SI_TPM 21 NC 11
<7> HOST_SPI_0_SI MOSI NC
TPM@ 33_0402_5% 12 TPM@ TPM@ TPM@ TPM@ H13 H14 H16 H17 H18 H19
RT9 1 2 HOST_SPI_0_SO_TPM 24 NC 13 H_2P3 H_3P3 H_2P3 H_2P4X2P9N H_6P0N H_6P0N
<7> HOST_SPI_0_SO MISO NC
TPM@ 33_0402_5% 14
2 1 TPM_GPIO 6 NC 15
+3VS_TPM GPIO NC
RT10 TPM@ 4.7K_0402_5% 16 @ @ @ @ @ @
1
1 @ 2 TPM_PP 7 NC 25
RT35 4.7K_0402_5% PP NC 26
2 NC 27
9 GND NC 28
1
23 GND NC 29
RT12 32 GND NC 30
C 4.7K_0402_5% 33 GND NC 31 FD1 FD2 FD3 FD4 C
TPM@ PAD NC
TPM@
2
SLB9670VQ1.2 FW6.40_VQFN32_5X5 @ @ @ @
1
SA00009N230
FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80
JESD JUMP@
1 2
1 2
JUMP_43X39
B B
A A

TPM/Screw
Size
v0.3
5 4 3 2 1
A B C D E
+5VS
1A +3VS
40 mils
R5177 Layout notes
1 1 2 +FAN1
Rshort@ L C4801 C5214 close to CONN
CONN@ 1
1
JFAN
0_0603_5% RE50 6
5 GND2
10K_0402_5% GND1
10U_0603_10V6M
C4801
0.1U_0402_16V7K
C5214
1 1
+FAN1 4
2
3 4
Close to Connector <33> FAN_SPEED1 3
1 2
2 2 <33> EC_FAN_PWM1 2
CE24 1
0.01U_0402_25V7K 1
ACES_50271-0040N-001
2 SP02000TS00
+FAN1
RE51
1 @ 2 EC_FAN_PWM1
10K_0402_5%
2 2
3 3
4 4

FAN
Custom v0.3
A B C D E
5 4 3 2 1
<27,28,32,33,34,36,40> +5VS +5VS
2.5" SATA HDD <12,34,38,39,40,48,49,52,53>
<7,13,29,30,33,34,35,40,48,49,50,51>
+5VALW
+3VALW
+5VALW
+3VALW
D D
<PV> change short pad

CONN@
+5VS JHDD
*Design Constraint:AC capacitors to be placed as close
as possible to the connector. +5VS_HDD1 1
Maximum distance from AC capacitors to connector is 500
2 1
mils.
R201 1 2 0_0603_5%
Rshort@ C155 1 2 0.01U_0402_16V7K SATA_CTX_C_DRX_P0 3 2
+5VS_HDD1 <11> SATA_CTX_DRX_P0 3
<11> SATA_CTX_DRX_N0 C156 1 2 0.01U_0402_16V7K SATA_CTX_C_DRX_N0 4
R202 1 2 0_0603_5%
Rshort@ 5 4
C153 1 2 0.01U_0402_16V7K SATA_CRX_C_DTX_N0 6 5
<11> SATA_CRX_DTX_N0 C154 1 2 0.01U_0402_16V7K SATA_CRX_C_DTX_P0 7 6
<11> SATA_CRX_DTX_P0 8 7
9 8
2 GND
10
C140 GND
470P_0402_50V8J ACES_51524-00801-001
1 SP01001A910
EMI@
C C
SATA ODD
+5VALW
1
ROD1
100K_0402_5%
2
JODD
1
+5VS_ODD
1
D S1
2 QOD2 ROD2 CS11 2 1 0.01U_0402_16V7K SATA_CTX_C_DRX_P1 S2 GND
<10> ODD_PWR <11> SATA_CTX_DRX_P1 A+
G 2N7002K_SOT23 1K_0402_5% <11> SATA_CTX_DRX_N1 CS14 2 1 0.01U_0402_16V7K SATA_CTX_C_DRX_N1 S3
SB00000EN00 COD1 S4 A-
S
3
2 1 CS15 2 1 0.01U_0402_16V7K SATA_CRX_C_DTX_N1 S5 GND

+5VS_ODD <11> SATA_CRX_DTX_N1 CS18 2 1 0.01U_0402_16V7K SATA_CRX_C_DTX_P1 S6 B-
<11> SATA_CRX_DTX_P1 B+
2
0.047U_0402_16V7K S7
1 2
Rshort@ Vinafix.com ODD_PLUG#_R GND
G
80mil 3 1
80mil <11> ODD_PLUG# R5192 0_0402_5% 1 2
Rshort@ ODD_DA#_R
+5VS <10> ODD_DA# R5193 0_0402_5% P1
S
B P2 DP B
1 1 1 +5V
10U_0603_6.3V6M
COD2
COD3
COD4
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
QOD1 @ P3
PJ2301 1P SOT23-3 P4 +5V
SB00000T900 P5 MD 1
2 2 2 1 GND GND
P6 2
2 @ 1 ESD@ GND GND
ROD3 0_0805_5% CS7
2 0.1U_0402_16V7K SDAN_603010-013041
SP010029L00
SDAN_603010-013041_13P
CONN@
A A

HDD/ODD Conn
Custom v0.3
5 4 3 2 1
A B C D E
RS2 EMI@ 0_0402_5%

<11> USB3_CTX_DRX_N1 2 1 USB3_CTX_C_DRX_N1 1 2 USB3_CTX_L_DRX_N1 +5VALW
<12,24,34,37,39,40,48,49,52,53> +5VALW
CS2 0.1U_0402_16V7K
2
RG75
@ 150_0402_5% +USB_VCCA
+5VALW
US1 W=100mils
1
W=100mils 1
OUT
150U_B2_6.3VM_R45M
RS1 EMI@ 0_0402_5% 1 5
IN
1000P_0402_50V7K
47U_0805_6.3V6M
0.1U_0402_16V7K
<11> USB3_CTX_DRX_P1 2 1 USB3_CTX_C_DRX_P1 1 2 USB3_CTX_L_DRX_P1 2 1
CS1 0.1U_0402_16V7K CS3 4 GND @
EN 1 1 1
1
+
CS22
CS6
0.1U_0402_16V7K 3
2 OCB CS4 CS5 CS28
RS6 EMI@ 0_0402_5% EMI@ 390P_0402_50V7K
2
1 2 USB3_CRX_L_DTX_N1 EM5203J-20 SOT23 5P LOAD SWITCH 2 2 2 2 EMI@
<11> USB3_CRX_DTX_N1
SA00008RA00
1 1
2
RG76 <33,39> USB_ON# USB_ON# 1 2
@ 150_0402_5% RS4 Rshort@ 0_0402_5%
1
RS3 EMI@ 0_0402_5%
1 2 USB3_CRX_L_DTX_P1
<11> USB3_CRX_DTX_P1
USB2.0/USB3.0 port 1
RS47 @EMI@ +USB_VCCA
1 2 JUSB1
0_0201_5% DM2 ESD@ 1
USB3_CTX_L_DRX_P1 1 1 USB3_CTX_L_DRX_P1 USB20_N1_R VBUS
10 9 2
D-
SM070005U00 DLM0NSN900HY2D_4P USB20_P1_R 3
1 2 USB20_P1_R USB3_CTX_L_DRX_N1 2 2 USB3_CTX_L_DRX_N1 D+
<11> USB20_P1 1 2 9 8 4
GND1
USB3_CRX_L_DTX_N1 5
USB3_CRX_L_DTX_P1 4 4 USB3_CRX_L_DTX_P1 USB3_CRX_L_DTX_P1 SSRX-
7 7 6
SSRX+ GND3
10
4 3 USB20_N1_R 7 11
<11> USB20_N1
LM3 4 3 USB3_CRX_L_DTX_N1 5 5 6 6 USB3_CRX_L_DTX_N1 USB3_CTX_L_DRX_N1 8 GND2 GND4 12
EMI@ USB3_CTX_L_DRX_P1 9 SSTX- GND5 13
RS48 @EMI@ 3 3 SSTX+ GND6
1 2 ACON_TARAW-9U1395_9P-T
0_0201_5% 8 DC231709285
USB2.0 Choke Part:
Main:SM070005U00, S COM FI_ MURATA DLM0NSN900HY2D(MURATA)
DT1140-04LP-7 U-DFN2510-10 CONN@
2nd: SM070004X00, S COM FI_ PANASONIC EXC14CE900U(PANASONIC)
SC300005M00
2 2
DM1
USB20_P1_R 6 3 USB20_P2_R
USB2.0 Choke Part: I/O4 I/O2
Main:SM070005U00, S COM FI_ MURATA DLM0NSN900HY2D(MURATA)
2nd: SM070004X00, S COM FI_ PANASONIC EXC14CE900U(PANASONIC)
RS49 @EMI@ +USB_VCCA 5 2

1 2 VDD GND
0_0201_5%
SM070005U00 DLM0NSN900HY2D_4P USB20_N1_R 4 1 USB20_N2_R

1 2 USB20_P2_R I/O3 I/O1
<11> USB20_P2 1 2 AZC099-04S.R7G_SOT23-6
SC300001G00
4 3 USB20_N2_R
<11> USB20_N2
LM5 4 3
EMI@
RS50 @EMI@
1 2
0_0201_5% USB2.0/USB3.0 port 2
RS8 EMI@ 0_0402_5% +USB_VCCA
<11> USB3_CTX_DRX_N2 2 1 USB3_CTX_C_DRX_N2 1 2 USB3_CTX_L_DRX_N2
CS23 0.1U_0402_16V7K JUSB2
1
VBUS
2
USB20_N2_R 2
RG106 USB20_P2_R 3 D-
@ 150_0402_5% 4 D+
USB3_CRX_L_DTX_N2 5 GND1
USB3_CRX_L_DTX_P2 6 SSRX- 10
1
7 SSRX+ GND3 11
RS7 EMI@ 0_0402_5% USB3_CTX_L_DRX_N2 8 GND2 GND4 12
2 1 USB3_CTX_C_DRX_P2 1 2 USB3_CTX_L_DRX_P2 USB3_CTX_L_DRX_P2 9 SSTX- GND5 13
<11> USB3_CTX_DRX_P2 SSTX+ GND6
CS24 0.1U_0402_16V7K
ACON_TARAW-9U1395_9P-T
DC231709285
RS10 EMI@ 0_0402_5%
1 2 USB3_CRX_L_DTX_N2 CONN@
3 3
<11> USB3_CRX_DTX_N2 DM14 ESD@
USB3_CRX_L_DTX_N2 1 1 10 9 USB3_CRX_L_DTX_N2
2
USB3_CRX_L_DTX_P2 2 2 9 8 USB3_CRX_L_DTX_P2
RG107
@ 150_0402_5% USB3_CTX_L_DRX_N2 4 4 7 7 USB3_CTX_L_DRX_N2
USB3_CTX_L_DRX_P2 5 5 6 6 USB3_CTX_L_DRX_P2
1
RS9 EMI@ 0_0402_5% 3 3

1 2 USB3_CRX_L_DTX_P2
<11> USB3_CRX_DTX_P2 8
DT1140-04LP-7 U-DFN2510-10
SC300005M00
USB3.0 ESD Part:
Main:SC300005M00, S DIO(BR) DT1140-04LP-7 U-DFN2510-10(DIODES )
2nd: SC300003Z00, S DIO(BR) PUSB3F96 DFN2510A-10 ESD(NXP)
3rd:SC300005N00, S DIO(BR) L02U5V0NA-4C SLP2510P8(LITE ON)
4 4

USB 3.0/2.0 conn
Custom v0.3
A B C D E
A B C D E
+3V_LID
+3VL <13,33,46,47,48> +3VL +3VL
Power Button Switch <12,24,34,37,38,40,48,49,52,53> +5VALW +5VALW
1
R215 +3VS
<6,7,9,10,11,13,17,18,19,22,23,24,27,28,29,30,31,32,33,36,40,52,55> +3VS
2
100K_0402_5% SW1 SN10000CU00
Q4108
G
SW TJG-533KQRH SPST DIP H1.55 6P <7,13,29,30,33,34,35,40,48,49,50,51,55> +3VALW +3VALW
2
<33> ON/OFF# ON/OFF# 1 3 ON/OFF#_R 1 3
S
2 4
2N7002K_SOT23-3
2
SB00000EN00 @
6
5
Layout notes JP6
L JP6 place Bottom layer IO BD Connector ( USB2.0,Card reader,HDD & PWR LED )
1
SHORT PADS
C139
1 EMI@ 470P_0402_50V8J 1
1 2
CONN@
JIO
1
ESD Diode +5VALW
2
3
1
2
LID_SW# 4 3
5 4
ON/OFF#_R 6 5
+3VS 6
7
7
3
USB20_N4_R 8
USB20_P4_R 9 8
ESD@
Card reader 10 9
D1 USB20_N3_R 11 10
SCA00001B00 USB20_P3_R 12 11
AZ5123-02S.R7G 3P CA SOT23
USB2.0 ( on small BD ) 13 12
<33,38> USB_ON# 13
14
15 14
<11> SATA_LED# 15
16
1
<33> PWR_LED# 17 16
18 17
1 1 18
EMI@ EMI@
C138 C137 19
G1 20
2 2 G2
Lid Switch (Hall Effect Sensor)
470P_0402_50V8J
470P_0402_50V8J
CVILU_CF31181D0R4-10-NH
SP011411241
RB751V-40 SOD-323
+3V_LID
+3VL +3V_LID
1
2
DH2 R126
4.7K_0402_5% RS51 @EMI@
1 2
2 0_0201_5% 2
LM4
2
U4018 EMI@
1
3 LID_SW#_OUT 1 2 4 3 USB20_N3_R
OUT LID_SW# <33> <11> USB20_N3 4 3
2 R5197
VDD
10P_0402_50V8J
1 1 1 0_0402_5% 3.3P_0402_50V8J CC152

GND
C19
100P_0402_50V8J
C5228
1 2 USB20_P3_R
<11> USB20_P3 1 2
1 APX8131AI-TRG SOT-23
EMI@
C18 SA00009EM00 SM070005U00 DLM0NSN900HY2D_4P
2 2 ESD@ RS52 @EMI@
0.1U_0201_10V6K 1 2
2 0_0201_5%
RS53 @EMI@
1 2
0_0201_5%
LM6
EMI@
+3V_LID 4 3 USB20_N4_R
<11> USB20_N4 4 3
3.3P_0402_50V8J CC154
2
+3VL 1 2 USB20_P4_R
<11> USB20_P4 1 2
R13
EMI@
DB@ 470K_0402_5% SM070005U00 DLM0NSN900HY2D_4P
2
RS54 @EMI@
G
Q32 1 2
1
0_0201_5%
3 1
DB@
S
2N7002K_SOT23-3 +3V_LID
SB00000EN00
+3V_LID
2
U4019
LID_SW#_OUT 1 8 R125
CP VCC DB@
3 10K_0402_5% 3
2 1 R124 2 7
10K_0402_5% D PR#
1
DB@ 3 6
Q# CLR#
4 5
GND Q
NL17SZ74USG US 8P FLIP-FLOP
SA00003ML00
DB@
DH3 DB@
RB751V-40 SOD-323
2 1
+3V_SMBUS
+3VL 2 1
DH4
RB751V-40 SOD-323
2 1
<33,48> EC_ON
DH5
RB751V-40 SOD-323
4 4

IO CON
Custom v0.3
A B C D E
A B C D E
+3VS +3VS <6,7,9,10,11,13,17,18,27,28,29,30,31,32,33,36,39,52>
+5VS +5VS <27,28,32,33,34,36,37>
+3VS
+5VALW
1
10U_0603_6.3V6M
C570
+3VALW
Q21
VR_ON <33,52>
1 14
2 VIN1 VOUT1 13 2
VIN1 VOUT1
6
+5VALW
1 For meet tPLT17 & tCPU28 power down sequence. 1
SUSP# 3 12 C557 1 2 680P_0402_50V7K @
ON1 CT1 tPLT17 : 1us (Max)
4 11 tCPU28 : 1us (Max) 2
VBIAS GND Q5002A
5 10 C554 1 2 100P_0402_50V8J L2N7002SDW1T1G 2N SC88-6
1
<12,33,49> SUSP# ON2 CT2 SB00001FF00
6 9 +5VS
7 VIN2 VOUT2 8 +3VALW
VIN2 VOUT2
10U_0603_6.3V6M
22U_0805_6.3V6M
0.1U_0402_25V6
1 1 1
C575
CC140
CC163
15 @RF@ @ESD@
GPAD
1
EM5209VF_DFN14_3X2 R5096
2 2 2 EC_VCCST_PG_R <9,33>
1 1 1 1 1 SA00007PM00 @ 100K_0402_1%
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
CC161
CC160
CC157
CC162
CC158
3
2
@ Q5002B
2 2 2 2 2
PM_SLP_S3_H 5 SB00001FF00
4
@ESD@ @ESD@ @ESD@ @ESD@ @ESD@
6
@
PM_SLP_S3# 2
<9,12,33> PM_SLP_S3# Q5003A
L2N7002SDW1T1G 2N SC88-6 SUSP#
1
SB00001FF00
2 2
6
@
For +1.8V_PRIM Discharge For meet tPLT15 power down sequence(Un-Stuff) 2 Q5004A
tPLT15 : 1us (Max) L2N7002SDW1T1G 2N SC88-6
SB00001FF00
1
+5VALW +1.8V_PRIM
+3VALW
1
1
R5092 R5093
1
100K_0402_1% 22_0603_1%
SYSON <12,33,49>
R5095 @
2
3 2
3
100K_0402_1%
@
2
Q5004B
Q5001B PM_SLP_S4_H 5 L2N7002SDW1T1G 2N SC88-6
PCH_PWR_EN# 5 L2N7002SDW1T1G 2N SC88-6 SB00001FF00
3
SB00001FF00
4
@ Q5003B
4
5 SB00001FF00
6
<9,12,33,49> PM_SLP_S4#
4
Q5001A
2 L2N7002SDW1T1G 2N SC88-6
3 <33,51> PCH_PWR_EN SB00001FF00 3
1
4 Vinafix.com 4

DC Interface
Custom v0.3
A B C D E
5 4 3 2 1
D D
C C
B B
A A

HW Reserve
Custom v0.3
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A

HW Reserve
Custom v0.3
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A

HW Reserve
Custom v0.3
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A

HW Reserve
Custom v0.3
5 4 3 2 1
5 4 3 2 1
+19V_ADPIN EMIVGA@ PL12

+19V_VIN
5A_Z80_0805_2P
1 2
@ PJP1 EMI@ PL11

D ACES_51483-00801-001 5A_Z80_0805_2P D
1 1 2 @ PR1
1 2 0_0402_5%
2 3
1000P_0402_50V7K
0.022U_0402_25V7K
1 2 ACIN_LED
3 4 <33> AC_LED#
1000P_0402_50V7K
100P_0402_50V8J
4 5
5 6
1
EMI@ PC1
EMI@ PC2
EMI@ PC3
EMI@ PC4
ADP_SIGNAL
6 7 Charge_LED
7 8 ACIN_LED PR2
2
9 8 100K_0402_5%
10 GND
2
GND
PR3
10K_0402_5% PR4
ADP_SIGNAL1 2 750_0402_1%
ADP_ID <33> 1 2 Charge_LED
<33> BAT_CHG_LED
3
1
LUDZS3.6BT1G_SOD323-2
1000P_0402_50V7K
100P_0402_50V8J
PR6
1
100K_0402_5%
1
10K_0402_5%
2
PR5
@ PC5
PC6
PD3
2
ESD@ PD1 ESD@ PD2
1
2
L30ESD24VC3-2_SOT23-3 L30ESD24VC3-2_SOT23-3
C C
<33,47> ADP_I
+3VALW_EC
1
PR9 PR10
16.2K_0402_1% 5.9K_0402_1%
2
VCIN0_PH <33> VCIN1_PH <33>
1
PH1
100K_0402_1%_B25/50 4250K PR13
B 10K_0402_1% B
2
ECAGND <33>
A A

DC Conn
Size
5 4 3 2 1
5 4 3 2 1
D D
+3V_LID
@ PR18
0_0402_5% EMI@ PL13
1 2 5A_Z80_0805_2P
1 2 +12.6V_BATT +3V_LID +19VB
OCTEK_BTJ-08KPBR4B
GND
10 +12.6V_BATT+
9 EMI@ PL14
GND 8 5A_Z80_0805_2P
8 7 1 2
7
100P_0402_50V8J
0.01U_0402_50V7K
6 EC_SMB_CK1_R
6
1
@EMI@ PC10
PC9
5 EC_SMB_DA1_R
1.8K +-1% 0805

5
1
4 +3V_LID_R EMI@ PC8 @EMI@ PR20
4
EMI@
3 B/I#_R 1000P_0402_50V7K PC11 470K_0402_5%
3
PR19
2 100P_0402_50V8J
2
2 1
2
1
@ PJPB1
6
PR14
100_0402_5%
1 2
C EC_SMB_CK1 <33,47> 2 PQ2A C
PR15 L2N7002SDW1T1G 2N SC88-6
100_0402_5%
3
1 2
1
EC_SMB_DA1 <33,47>
+3VL
1M_0402_5%
+3VL 5
PR21
1
PR16 PQ2B
4
100K_0402_5% L2N7002SDW1T1G 2N SC88-6 @
2
PR17
100_0402_5%
1 2 2
B/I# <33>
B B
A A

BATT Conn
Size
5 4 3 2 1
A B C D
Protection for reverse input
1
D +19VB
2
G @ PQB2
CHG_N002
2N7002KW_SOT323-3
S
3
PRB2 @ @ PRB3
1
1M_0402_5% 3M_0402_5% 1
1 2 1 2
+19V_VIN +19VB_CHG
PQB11 P1 PQB12 P2
AON7506_DFN33-8-5 PRB1 PQB13
EMB04N03H_EDFN5X6-8-5 1 EMI@ PLB11 AON7506_DFN33-8-5
0.01_1206_1%
1 2 1UH_2.8A_30%_4X4X2_F
2 3 5 1 4 1 2 1
5 3 2
2 3 5 3
0.1U_0402_25V6
2200P_0402_50V7K
2200P_0402_50V7K
10U_0805_25V6K
PCB25
4
1
10U_0805_25V6K
10U_0805_25V6K
+19V_VIN
@ PCB6
PCB7
@EMI@ PCB8
0.01U_0402_50V7K
1
1
PCB4
PCB5
1
4
PCB9
2
2
2
2
3
2
PDB1
ACDRV_CHG_R BAS40CW_SOT323-3
0.1U_0402_25V6
0.1U_0402_25V6
BATDRV_CHG 1 2 BATDRV_CHG_R
1
PCB1
PRB5
PCB11
1 1
1 2 CHG_N003 PCB12 4.12K_0603_1%
PRB6 10_1206_1%
0.047U_0402_25V7K PQB1
2
PCB10 1 2 CHG_N001 AONH36334_DFN3X3A8-10
10
0.1U_0402_25V6
1
2.2_0603_5%
5 4
D1
S2 D1
PRB7
PDB2
2
RB751V-40_SOD323-2 6 3
2 S2 D1 2
7 2
VCC_CHG
2
S2 D1
D2/S1
+12.6V_BATT
4.12K_0603_1%
4.12K_0603_1%
8 1 UG_CHG
REGN_CHG
G2 G1
1
BTST_CHG
PCB13
PRB10
PRB9
UG_CHG
1 2 PLB1 PRB11
LX_CHG
9
4.7UH_5.5A_20%_7X7X3_M 0.01_1206_1%
1U_0603_25V6K 1 2
ACP_CHG
ACN_CHG
LX_CHG 1 2 CHG 1 4
2
PCB14
1U_0603_25V6K 2 3
20
19
18
17
16
SRN_R
1
SRP_R
VCC
PHASE
HIDRV
BTST
REGN
10U_0805_25V6K
10U_0805_25V6K
4.7_1206_5%
EMI@ PRB12
21
0.1U_0402_25V6
0.1U_0402_25V6
PAD
PCB15
PCB16
1
1
1 15 LG_CHG
ACN LODRV
PCB17
PCB18
SNUB_CHG 2
2
2 14
ACP GND PRB13
2
10_0603_1%
CMSRC_CHG 3 13 SRP1 2 SRP_R
CMSRC SRP
1
PUB1 PRB14
BQ24725ARGRR_QFN20_3P5X3P5 6.8_0603_1% PCB20
680P_0402_50V7K
ACDRV_CHG 4 12 SRN1 2 SRN_R .1U_0402_16V7K
EMI@ PCB19
2
ACDRV SRN
2
1 2 5 11 BATDRV_CHG
+3VL PRB15 ACOK ACDET BATDRV
100K_0402_1%
IOUT
SDA
SCL
ILIM
3 3
<33> VCIN1_ACOK
6
10
+3VL
IOUT_CHG
ILIM_CHG 1 2
ACDET_CHG
SDA_CHG
SCL_CHG
100K_0402_1%
PRB16
1
453K_0402_1%
PRB20
1
PRB17
422K_0402_1% PCB21
1 2 0.01U_0402_50V7K
+19V_VIN
2
PRB18
PRB19
2
1
1
0_0402_5%
0_0402_5%
2
2
0.22U_0402_16V7K
EC_SMB_CK1 <33,46>
@
@
100P_0402_50V8J
1
66.5K_0402_1%
1
1
PCB23
PRB21
PCB22
EC_SMB_DA1 <33,46>
2
@ PRB22
2
0_0402_5%
1 2
ADP_I <33,45>
1
PCB24
4 4
0.1U_0402_25V6
Vin Dectector
2
Min. Typ Max.

L-->H 17.16V 17.63V 18.12V Close EC chip
H-->L 16.76V 17.22V 17.70V
VILIM = 20*ILIM*Rsr Issued Date 2016/09/01 Deciphered Date 2019/09/01 Title
ILIM = 3.3*100/(100+620)/20/0.02 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CHARGER
= 2.291 A Size
A B C D
5 4 3 2 1
+19VB EMI@ PL304 PU301 @ PR302 PC302

5A_Z80_0805_2P SY8286BRAC_QFN20_3X3 0_0402_5% 0.1U_0201_10V6K
2200P_0402_50V7K
1 2 +19VB_3V BST_3V 1 2 BST_3V_R 1 2
@EMI@ PC303
EMI@ PC304
10U_0805_25V6K
0.1U_0402_25V6
1
1
PC305
PL302
IN
IN
IN
IN
BS
2
2
1.5UH_6A_20%_5X5X3_M
LX_3V6 20 LX_3V 1 2
D LX LX +3VALWP D
7 19
GND LX
680P_0402_50V7K 4.7_1206_5%
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
+3VALW
1
@EMI@
PR303
8 18
GND GND
PC306
PC307
PC308
PC309
9 17
+3VLP
2
PG LDO
13V_SN
10 16
2
NC NC PC310
OUT
EN2
EN1
PR304 21
NC
4.7U_0603_6.3V6M
FF
2
100K_0402_5% GND
@EMI@
2
11
12
13
14
15
PC311
3.3V LDO 150mA~300mA
2
<9> SPOK
ENLDO_3V5V PC312 PR305 Fsw : 600K Hz
1000P_0402_50V7K 1K_0402_1%
5V_3V_EN 3V_FB 1 2 3V_FB_1 1 2
@ PJ302
1 2
+3VALWP 1 2 +3VALW
JUMP_43X118
@ PJ303
JUMP_43X39
1 2
2 Cell battery : Cin=10uF*2pcs +3VLP 1 2 +3VL
C C
3 Cell ~ 4 Cell battery : Cin=10uF*1pcs
+19VB EMI@ PL303 +19VB_5V @ PR306 PC313
5A_Z80_0805_2P 0_0402_5% 0.1U_0201_10V6K
1 2 +19VB_5V BST_5V1 2 BST_5V_R 1 2
PU302
1
SY8288CRAC_QFN20_3X3
IN
IN
IN
IN
BS
PL301
2200P_0402_50V7K
10U_0805_25V6K
0.1U_0402_25V6
LX_5V 6 20 2.2UH_7.8A_20%_7X7X3_M
LX LX
7 19 LX_5V 1 2 +5VALWP
GND LX
1
1
PC314
EMI@ PC316
@EMI@ PC317
8 18
GND GND PC318
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
2
1
1SPOK_5V 9 17 VCC_5V 1 2
PG VCC
1
PR308
4.7_1206_5%
PC322
PC301
PC323
PC319
PC328
@EMI@
PR307 10 16
2
499K_0402_1% NC NC 2.2U_0402_6.3V6M
OUT
LDO
EN2
EN1
1 2 ENLDO_3V5V 21
FF
+19VB GND
5V_SN 2
1
@ PR310
11
12
13
14
15
PR309 0_0402_5%
499K_0402_1%
2
680P_0402_50V7K
SPOK
+5VL
2
1
@EMI@
PC324
4.7U_0603_6.3V6M
5V LDO 150mA~300mA
ENLDO_3V5V
2
1
PC325
B B
PR301
2.2K_0402_5% 5V_3V_EN Fsw : 600K Hz
2
1 2
<33,39> EC_ON @ PR311
0_0402_5%
1 2
<33> MAINPWON PC326 PR312
1000P_0402_50V7K 1K_0402_1%
5V_FB 1 2 5V_FB_1 1 2
5V_3V_EN
@ PJ305
1M_0402_1%
4.7U_0402_6.3V6M
1 2
+5VALWP 1 2 +5VALW
1
1
PR313
PC327
JUMP_43X118
2
2
A A

3VALW/5VALW
5 4 3 2 1
5 4 3 2 1
Vinafix.com
D D
EMI@ PLM2
5A_Z80_0805_2P
1 2 +19VB_DDR PRM1
+19VB 2.2_0603_5%
2200P_0402_50V7K
10U_0805_25V6K
BST_DDR_R 1 2 BST_DDR
+1.2VP
1
@EMI@ PCM1
PCM2
+0.6VSP
1
PCM4 UG_DDR
2
0.1U_0603_25V7K
10U_0603_6.3V6M
10U_0603_6.3V6M
LX_DDR
1
PCM5
PCM6
PUM1
16
17
18
19
20
G5616BRZ1U_TQFN20_3X3
2
LX
DH
BST
VLDOIN
VTT
21
PAD
LG_DDR 15 1
DL VTTGND
1
14 2
D1
D1
D1
G1
PLM1 PRM2 PGND VTTSNS
1UH_11A_20%_7X7X3_M 11.5K_0402_1%
1 2LX_DDR 10 9 1 2 CS_DDR 13 3
+1.2VP D1 D2/S1 PCM7 CS GND
1
1U_0402_6.3V6K
1 2 12 4 VTTREF_DDR
G2
S2
S2
S2
@EMI@ PRM3 PRM4 VPP VTTREF
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
4.7_1206_5% 5.1_0603_5%
5
8
1
VDD_DDR
VDDQSET
1 2 11 5
+5VALW +1.2VP
1 2
VCC VDDQSNS
1
PCM8
PCM9
PCM10
PCM11
PCM12
PCM13
SNB_DDR
PGOOD
PCM15
VDDP_DDR
TON
2
1
@EMI@ PCM14 0.033U_0402_16V7K
S5
S3
2
C 680P_0402_50V7K PCM16 C
2
1U_0402_6.3V6K
10
6
PQM1
AONH36334_DFN3X3A8-10 PRM5
5.1_0603_5%
FB_DDR
1 2 PRM6
TON_DDR
6.04K_0402_1%
S5_DDR
S3_DDR
@ PWROK_DDR PRM7 1 2 +1.2VP
PTPM1 470K_0402_1%
@ PJM2 +19VB_DDR 1 2
JUMP_43X118
1
+1.2VP 1 2 +1.2V_VDDQ @ PRM8
1 2 0_0402_5%
PG_+2.5V 1 2 PRM9
10K_0402_1%
2
1 2
<12,33,40> SYSON
0.1U_0402_10V7K
@ PJM3 @ PRM10
JUMP_43X39 0_0402_5%
1
PCM17
1 2
+0.6VSP 1 2 +0.6V_0.6VS
2
@
@ PRM11
Vout=0.75* (1+PRM6/PRM9)=1.2V
0_0402_5%
1 2
<12,33,40> SUSP#
@ PRM12
0_0402_5%
1 2
<6> SM_PG_CTRL
1
@ PCM18
0.1U_0402_10V7K
2
B B
@ PJ2502
JUMP_43X39
PC2501 1 2
22U_0603_6.3V6M +2.5VP 1 2 +2.5V
1 2
PU2501
@ PJ2501 PL2501
JUMP_43X39 1UH_MHCD252012A-1R0M-A8S_3A_20%
+3VALW 1 2 IN_2.5V 4 3 LX_2.5V 1 2
1 2 VIN LX +2.5VP
68P_0402_50V8J
2016.12.27 @ PR2501 1 2 5 2
0_0402_5% +3VALW PG GND
1
22U_0603_6.3V6M
22U_0603_6.3V6M
PC2504
1 2 PR2504 6 1
<9,12,33,40> PM_SLP_S4# VFB EN
1
PC2506
PC2505
100K_0402_5%
1
@ PR2502 PG_+2.5V G5719CTB1U_SOT23-6 @EMI@ PR2505 PR2506

Enable 1.2V
2
0_0402_5% 4.7_0402_5% 32.4K_0402_1%

SYSON 1 2 EN_2.5V
2
2
.1U_0402_16V7K
1
PC2502
SNB_2.5V
1
PR2503 FB_2.5V
1M_0402_1%
2
A @ A
2
@EMI@ PC2503
680P_0402_50V7K PRM2507
2
10K_0402_1%
Vout=0.6V *(1+PR2506/PR2507)=2.544V
2
Imax= 2A, Ipeak= 3A
Security Classification Compal Secret Data

Title
Issued Date 2016/09/01 Deciphered Date 2019/09/01
1.2VP/0.6VSP/2.5V
5 4 3 2 1
A B C D
+1.0V_PRIMP +1.0V_PRIM
@ PJ1002
1 JUMP_43X118 1
1 2
1 2
<33> +1.0VS_PG
@EMI@ @EMI@
PR1007 PC1009
PR1005
EMI@ PL1002
100K_0402_1%
2 1
+3VALW 1 2SNB_1V 1 2
PU1001
5A_Z80_0805_2P
1 2 +19VB_1V 2 9 @ PR1006 PC1007 4.7_1206_5% 680P_0402_50V7K
+19VB IN PG 0_0402_5% 0.1U_0402_25V6
2200P_0402_50V7K
10U_0805_25V6K
0.1U_0402_25V6
3 1 BST_1V 1 2 BST_1V_R 1 2 PL1001
IN BS 1UH_6.6A_20%_5X5X3_M
1
PC1001
EMI@ PC1003
@EMI@ PC1004
4 6 LX_1V 1 2
IN LX +1.0V_PRIMP
330P_0402_50V7K
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
5 19
2
IN LX
2
PR1008
1
PC1010
PC1011
PC1012
PC1013
VGA@ PC1014
7 20 20K_0402_1%
GND LX
8 14 FB_1V
2
GND FB
1
2
PR1001 18 17 VCC_1V 2
0_0402_5% GND VCC
1
1 2 EN_1V 11 10
<51> +1.8V_PG EN NC PC1008
1K_0402_1%
0.1U_0402_25V7K
ILMT_1V 13 12 2.2U_0402_6.3V6M
2
ILMT NC
1
1M_0402_1%
@ PC1005
1
PR1002
PR1010
15 16
+3VALW
2
BYP NC
21 FB=0.6V
+3VALW
2
PAD
2
1
SY8286RAC_QFN20_3X3
1
1
PC1006 PR1009
@ PR1003 1U_0402_6.3V6K 30K_0402_1%
2
0_0402_5%
2
EN :H>0.8V ; L<0.4V
2
EN pin don't floating

If have pull down resistor at HW side,
1
please delete PR601. @ PR1004

0_0402_5%
2
3 3
The current limit is set to 6A, 9A or 12A when this pin

is pull low, floating or pull high.
4 4
Security Classification Compal Secret Data

1.0V_PRIM
A B C D
5 4 3 2 1
D D
PC1801
22U_0603_6.3V6M
@ PJ1802
1 2 1 2
+1.8VSP 1 2 +1.8V_PRIM
JUMP_43X79
PU1801
@ PJ1801 PL1801
JUMP_43X39 1UH_MHCD252012A-1R0M-A8S_3A_20%
+3VALW 1 2 IN_1.8V 4 3 LX_1.8V 1 2
1 2 VIN LX +1.8VSP
1 2 5 2
C
+3V_PRIM PG GND
C
68P_0402_50V8J
22U_0603_6.3V6M
22U_0603_6.3V6M
PR1801 6 1
VFB EN
1
PC1802
PC1803
PC1804
100K_0402_5%
<50> +1.8V_PG
1
@EMI@ PR1803
G5719CTB1U_SOT23-6 PR1802 20K_0402_1%
2
4.7_0603_5%
1 2 EN_1.8V
<33,40> PCH_PWR_EN
2
2
.1U_0402_16V7K
@ PR1804
SNUB_1.8V
1
1M_0402_1%
PR1805
0_0402_5% 2016.11.23 @PC1805

1
FB_1.8V
2
1
@EMI@
2
PC1806
680P_0402_50V7K PR1806
2
10K_0402_1%
2
Vout=0.6V*(1+PR1803/PR1806)=1.8V
Imax= 2A, Ipeak= 3A
B B
A A

Vinafix.com
1.8V_PRIM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B v0.3
Date: Sheet 51 of 59
5 4 3 2 1
1 2 3 4 5
A A
RT3602_VREF
Vref=0.6V
953_0402_1%
PCZ3
1.78K_0402_1%
6.8K_0402_1%
0.1U_0402_50V7K
1
1
1
PRZ2
PRZ3
PRZ4
2
AISPVCCSA <53>
<53> AVCCSA
@ PCZ4
2
0.47U_0402_25V6K
1 2
<12>
+VCC_SA
1
VSSSA_SENSE
11K_0402_1%
10_0402_1%
16.2K_0402_1%
PRZ1 PRZ8 PRZ10
0.47U_0402_6.3V6K
RT3602_VREF
<14>
VSSCORE_SENSE
PRZ6
PRZ11
PCZ228
100_0402_1% 10K_0402_1% 49.9K_0402_1%
1
PRZ5
1 2 VCCSA_SENSE_R 1 2 1 2 2 1 2 1
PRZ13 PRZ14
PRZ15
2
2
RT3602_SET1 1 2 1 2 64.9K_0402_1% 453_0402_1%
RT3602_SET2 <12> VCCSA_SENSE 1 2
100_0402_1%
RT3602_SET3 PCZ5 390P_0402_50V7K PCZ6 68P_0402_50V8J
0_0402_5%
RT3602_VREF 3.9_0402_1%
VR_PSYS
+3VS
1
PRZ22 100_0402_1%
PRZ24
PRZ23
1
1
464_0402_1%
10K_0402_1%
5.23K_0402_1%
1.1K_0402_1%
10K_0402_5%
1
0_0402_5%
PRZ18
PRZ19
PRZ20
1 2
FB_SA
close to chock
PRZ17
PRZ94
VR_PWRGD <33>
2
1
@ PHZ1 PRZ26
2
PRZ21
100K_0402_1%_B25/50 4250K 42.2K_0402_1% PRZ95 PRZ25
2
@ PCZ7 1 2 PHZ1_R 1 2 0_0402_5% 0_0402_5%
0.1U_0402_10V6K RT3602_VREF 1 2 VR_ON <33,40>
2
1
1
536_0402_1%
0_0402_5%
2.21K_0402_1%
2.1K_0402_1%
IMON_SA
+1.0V_VCCST
RT3602_EN
PRZ29
PRZ30
PRZ31
PRZ28
1 2 IMON_CORE_R 1 2
VSEN_CORE
FB_SA
B PRZ33 RGND_MAIN B
COMP_SA
RGND_SA
VR_PSYS
38.3K_0402_1% PRZ35
2
14.7K_0402_1%
0.1U_0402_25V6
PCZ227
1
1
100_0402_1%
75_0402_1%
45.3_0402_1%
1
@ PCZ9
0.1U_0402_10V6K
PUZ1
PRZ36
PRZ38
PRZ39
1 2
49
48
47
46
45
44
43
42
41
40
39
38
37
2
RT3602AEGQW_WQFN48_6X6
2
PRZ43 PRZ45
ISENN_SA
ISENP_SA
GND
RGND_MAIN
VSEN_MAIN
PSYS
FB_SA
RGND_SA
COMP_SA
VREF06/PSET
IMON_SA
VR_READY
EN
10K_0402_1% 52.3K_0402_1% VR_SVID_CLK <14>
1 2 1 2 VR_ALERT# <14>
+VCC_CORE PRZ41 VR_SVID_DATA <14>
100_0402_1% PCZ12 82P_0402_50V8J IMON_CORE1 36 PWM_SA <53>
1 2 VSEN_CORE 1 2 1 2 RT3602_SET12 IMON_MAIN PWM_SA 35 VR_HOT# <33>
SET1 DRVEN DRVEN <53>
PRZ47 FB_CORE 3 34 1 2
0_0402_5% 270P_0402_50V7K <53> AVCORE1 PCZ13 COMP_CORE4 FB_MAIN VCLK 33 PRZ98 49.9_0402_1% RT3602_VREF
1 2 PCZ11 0.1U_0402_50V7K RT3602_SET2 5 COMP_MAIN ALERT# 32 PRZ991 210_0402_1% PRZ48
<14> VCCCORE_SENSE SET2 VDIO
1 2 RT3602_SET3 6 31 1
PRZ100 2
100_0402_1% 28.7K_0402_1% PRZ49 866_0402_1%
U42@ PRZ106 7 SET3 VR_HOT# 30 IMON_GT 1 2 1 2
1 2 1 2
Ra ISEN1N_MAIN 8 ISEN1N_MAIN IMON_AUXI 29 @ PCZ15 0.47U_0402_25V6K
U42@ 0_0402_5% 9 ISEN2N_MAIN ISENP_AUXI 28 1 2
PCZ16 0.1U_0402_50V7K 10 ISEN2P_MAIN ISENN_AUXI 27 VSEN_GT
<53> AVCORE2 ISEN1P_MAIN VSEN_AUXI
TSEN_CORE 11 26 COMP_GT PRZ50
Ra Rb/Rc RT3602_VIN
12 TSEN_MAIN COMP_AUXI 25
AISP1 <53>
0_0201_5%
Rb VIN RGND_AUXI AVGT1 <53>
PWM1_MAIN
PWM2_MAIN
DRVEN_SET
1 2
TSEN_AUXI
+5VALW
PWM_AUXI
1
2.2_0805_1%
0.22U_0402_25VAK
U22@ PRZ105 10K_0402_1% 1 2 VSEN_GT 1 2 VCCGT_SENSE <14>
FB_AUXI
1
PCZ18
U22 N/A Stuff <53> AISPCORE2
PRZ53
0.1U_0402_50V7K PRZ54 PRZ56 PRZ59
RGND_AUXI
VCC
+VCC_GT
PCZ19
29.4K_0402_1% 10K_0402_1% 100_0402_1%
NC
NC
NC
NC
NC
Rc
2
1 2 1 2 1 2 1 2
+5VALW
2
U22@ PRZ104 10K_0402_1%
U42 Stuff N/A PRZ107
13
14
15
16
17
DRVEN_SET 18
19
20
21
22
TSEN_GT 23
FB_GT 24
<53> AISPCORE1
1 2 1 2 1 2
RT3602_VREF PRZ51 PRZ52
RT3602_VCC
1
110K_0402_1% 1.65K_0402_1% 0_0402_5% PCZ20 82P_0402_50V8J PCZ21
270P_0402_50V7K
1
TSEN_CORE_R 1 2 1 2 PCZ230
+19VB_CPU 1U_0603_25V6K
PHZ2
PRZ93
2
C C
8.25K_0402_1%
1 2 0_0201_5%
2
1
FB_GT
374_0402_1% 8.25K_0402_1%
100K_0402_1%_B25/50 4250K
PRZ64
<53>
<53>
<53>
PWM_GT
PRZ63
PWM_CORE1
PWM_CORE2
+5VALW PRZ65 VSSGT_SENSE <14>
2
10_0402_1%
1 2
1
1
115_0402_1%
PRZ68
PRZ67
1
PCZ23
2
TSEN_CORE_R 4.7U_0603_10V6K PRZ66
100K_0402_1%_B25/50 4250K
TSEN_GT_R 110K_0402_1%
2
1
1
549K_0402_1%
182K_0402_1%
PRZ71
+5VALW
PRZ70
1
PHZ3
PRZ69
2
1.65K_0402_1%
1
@ PRZ72
2
1
1
11.5K_0402_1%
4.02K_0402_1%
0_0402_5%
PRZ74
PRZ73
TSEN_GT_R
2
DRVEN_SET
2
PRZ75
0_0402_5%
2
D D

CPU_CORE
1 2 3 4 5
1 2 3 4 5
+19VB_CPU
EMI@ PLZ3
5A_Z80_0805_2P +19VB
1 2 +19VB_CPU
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
100U_25V_NC_6.3X6
100U_25V_NC_6.3X6
PRZ76
0.1U_0402_25V6
@EMI@ PCZ29
EMI@ PCZ30
PCZ31
PCZ32
2.2_0603_5% 1 1
CORE1_BST 1 2 CORE1_BST_R
1
+ +
2200P_0402_50V7K
10U_0603_25V6M
10U_0603_25V6M
U42@ PCZ26
PCZ229
PCZ37
PCZ34
U22@ PCZ26 U42@ PRZ77
0.1U_0402_25V6
EMIU42@ PCZ36
EMIU42@ PCZ33
PQZ1 68U_25V_M_R0.36 2.2_0603_5%
PCZ28 CORE2_BST 1 2 CORE2_BST_R
AON6380_DFN5X6-8-5
PUZ2
1
2 2
0.1U_0402_25V6
1
U42@
U42@
U42@
4 3 CORE1_UG 1 2 CORE1_UG_R 4 PUZ3 U42@ PCZ35
2
BOOT UGATE PRZ78 0.1U_0402_25V6
2
5 2 CORE1_LX 0_0603_5%
<52> PWM_CORE1 PWM PHASE 4 3 CORE2_UG 1 2 CORE2_UG_R 4
+5VALW 1 6 BOOT UGATE U42@ PRZ79 U42@
Rdc=1.19 mohm
3
2
1
<52> DRVEN EN PGND +VCC_CORE 5 2 CORE2_LX 0_0603_5% PQZ3
PLZ1 <52> PWM_CORE2 PWM PHASE
1 PRZ802 VCC_CORE1 8 7 AON6380_DFN5X6-8-5
VCC LGATE 9 1 4 +5VALW 1
DRVEN 6
Rdc=1.19 mohm
3
2
1
1_0402_5% GND EN PGND +VCC_CORE
2 3 1 2 VCC_CORE2 8 7 U42@ PLZ2
RT9610CGQW_WDFN8_2X2 VCC LGATE
1
A A
4.7_1206_5%
@EMI@ PRZ82
PQZ2 9 1 4
GND
1
PCZ40 U42@ PRZ81
0.24UH_22A_+-20%_ 7X7X3_M 1_0402_5% 2 3
AON6314_N_DFN56-8-5
2.2U_0402_16V6K
AISPCORE1_R
2
RT9610CGQW_WDFN8_2X2
4.7_1206_5%
@EMIU42@ PRZ84
U42@
1
PCZ41 0.24UH_22A_+-20%_ 7X7X3_M
AISPCORE2_R
2.2U_0402_16V6K
1CORE1_SNUB 2
2
CORE1_LG 4 PCZ42
0.1U_0402_25V6
1 2 1 2 1 2
1CORE2_SNUB 2
CORE2_LG 4 U42@ PRZ87 U42@ PRZ103 U42@ PCZ43
PRZ85 PRZ102 2.1K_0603_1% 2.1K_0603_1% 0.1U_0402_25V6
3
2
1
2.1K_0603_1% 2.1K_0603_1% PRZ88 1 2 1 2 1 2
@EMI@ PCZ44
4.22K_0402_1% U42@
680P_0402_50V7K
1 2 PQZ4 U42@ PRZ90
3
2
1
AON6314_N_DFN56-8-5 4.22K_0402_1%
@EMIU42@ PCZ45
1 2
680P_0402_50V7K
2
AVCORE1 <52>
AVCORE2 <52>
AISPCORE1 <52>
AISPCORE2 <52>
+19VB_CPU VCC_CORE VCC_GT VCC_SA

FSW=500kHz FSW=500kHz FSW=600kHz
Choke=0.24uH Choke=0.24uH DCR=6.2 mohm +/- 5%
DCR=1.19 mohm +/- 5% DCR=1.19 mohm +/- 5%
2200P_0402_50V7K
PCG5
PCG6
PCG11
PCG10
EMI@ PCG12
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
PRG2
PCG3
PCG4
0.1U_0402_25V6
2.2_0603_5%
GT_BST 1 2 GT_BST_R U22
5
1
U22 U22 LL=10.3 mohm
1
PQG1
LL=2.4 mohm LL=3.1 mohm TDC=4A
EMI@
EMI@
PCG2
AON6380_DFN5X6-8-5
B B
PUG1
2
0.1U_0402_25V6
TDC=21A TDC=18A ICCMAX=4.5A
2
4
BOOT UGATE
3 GT_UG 1
PRG3
2 GT_UG_R 4 ICCMAX=32A ICCMAX=31A OCP=9.5A
5 2 GT_LX 2.2_0603_5% OCP=40A OCP=39A
<52> PWM_GT PWM PHASE
+5VALW DRVEN 1 6
U42
Rdc=1.19 mohm
3
2
1
EN PGND
PLG1
+VCC_GT U42 U42 LL=10.3 mohm
1 PRG1 2 VCC_GT 8 7
VCC LGATE 9 1 4 LL=2.4 mohm LL=3.1 mohm TDC=
GND
1_0402_5%
2 3
TDC=42A TDC=12A ICCMAX=5A
RT9610CGQW_WDFN8_2X2 ICCMAX=64A ICCMAX=28A OCP=9.5A
1
4.7_1206_5%
EMI@ PRG4
PQG2
5
PCG1
0.24UH_22A_20%_ 7X7X3_M OCP=70A OCP=39A
AON6314_N_DFN56-8-5
2.2U_0402_16V6K
2
AISP1_R
2
GT_LG 4 PRG6 PRG9 PCG8

1.58K_0603_1% 1.58K_0603_1% 0.1U_0402_25V6
1 2 1 2 1 2
1GT_SNUB
PRG7 PRG8
3
2
1
3K_0402_1% 10K_0402_1%
1 2 1 2
AVGT1_R
330P_0402_50V7K
EMI@ PCG9
1 2
PHG1
10K_0402_1%_B25/50 3370K
AVGT1 <52>
AISP1 <52>
C C
+19VB_CPU
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
@EMI@ PCA6
PCA2
0.1U_0402_25V6
PRA2
2.2_0603_5%
1
1
PCA4
PCA5
SA_BST 1 2 SA_BST_R
1
EMI@
2
PCA3
PUA1
0.1U_0402_25V6
2
4 3 SA_UG
BOOT UGATE
5 2 SA_LX
<52> PWM_SA PWM PHASE
1
+5VALW DRVEN 1 6 PQA1

Rdc=6.2 mohm
G1
D1
D1
D1
EN PGND PLA1 +VCC_SA

AONH36334_DFN3X3A8-10
1 2 VCC_SA 8 7 1 4
VCC LGATE 9 9 10
PRA1 1_0402_5% GND D2/S1 D1 2 3
RT9610CGQW_WDFN8_2X2
1
4.7_1206_5%
@EMI@ PRA4
G2
S2
S2
S2
0.47UH_NA__12.2A_20%
1
PCA1
2.2U_0402_16V6K
AISPVCCSA_R
2
SA_LG
2
PCA7
0.1U_0402_25V6
1 SA_SNUB
1 2 1 2 1 2
PRA6 PRA9 PRA7 PRA8

953_0603_1% 953_0603_1% 866_0402_1% 1K_0402_1%
AVCCSA_R
@EMI@ PCA8
1 2 1 2
680P_0402_50V7K
2
1 2
PHA1
1K_0402_5%_TSM0B102J3652RE
AVCCSA <52>
D D
AISPVCCSA <52>

CPU Power stage
1 2 3 4 5
A
B
C
D
2 1 2 1 2 1 2 1
2
1
2
1
2
1
+VCC_CORE
PCZ210 PCZ200 PCZ187 PCZ167 PCZ147 PCZ100 PCZ78

1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1
2
1
2
1
2
1
2
1
+
PCZ211 PCZ201 PCZ188 PCZ168 PCZ148 PCZ101 @ PCZ79

1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M PCZ68
5
5
2 1 2 1 2 1 2 1 390U_2.5V_ESR10M_6.3X6
2
1
2
1
2
1
2
1
+
PCZ212 PCZ202 PCZ189 PCZ169 PCZ150 PCZ102 @ PCZ80

1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M U42@ PCZ215
2 1 2 1 2 1 2 1 330U_2V_M
2
1
2
1
2
1
2 1 2 1 2 1 2 1
2
1
2
1
2
1

2016.12.29

2 1 2 1 2 1
2
1
2
1
PCZ205 PCZ192 PCZ172 PCZ127 PCZ83

1U_0201_6.3V6M 1U_0402_6.3V6K 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1
2
1
2
1
2016.11.21
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1
2
1
U42
U22
PCZ207 PCZ194 PCZ174 @ PCZ97
2016.11.21
1U_0402_6.3V6K 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M
1uF*35
1uF*35
2 1 2 1 2 1
2
1
22uF*22
390uF*2
22uF*18
390uF*1
PCZ208 PCZ195 PCZ175 @ PCZ98

1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M
：
VCC_CORE：
2 1 2 1 2 1
2
1
PCZ209 PCZ196 PCZ176 PCZ99
2016.11.21
1U_0201_6.3V6M 1U_0402_6.3V6K 1U_0201_6.3V6M 22U_0603_6.3V6M
4
4
+VCC_GT
2 1 2 1
2
1
2
1
2
1
2
1
2
1
+

1U_0201_6.3V6M 1U_0402_6.3V6K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 390U_2.5V_ESR10M_6.3X6
2 1 2 1
2
1
2
1
2
1
2
1
PCZ198 PCZ178 PCZ158 PCZ132 PCZ110 PCZ71
2016.11.21
1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
2
1
2
1
2
1
2
1
PCZ199 PCZ179 PCZ159 PCZ134 PCZ111 PCZ72

2 1
2
1
2
1
2
1
2
1

2 1
2
1
2
1
2
1
2
1
1uF*13
22uF*33
390uF*1
PCZ181 U42@ PCZ161 PCZ136 PCZ113 PCZ74

VCC_GT：：
BOM option
U22 & U42
2 1
2
1
2
1
2
1
2
1
2
1
2016.11.10
PCZ130 PCZ182 U42@ PCZ162 PCZ137 PCZ114 PCZ75
Issued Date
2 1
2
1
2
1
1
+VCC_GT_VR
3
3
@
2@
2
1
1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
PCZ133 2 1
2
1
2
1
2
1
22U_0603_6.3V6M
1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1
2
1
2
1
2
1

1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1
by JU22(for GT) and JU42A (for IA)
2
1
2
1
2016/09/01
PCZ186 PCZ166 PCZ86
1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
U42@
2
1
U42@ PCZ149
22U_0603_6.3V6M
+VCC_GTX_VR
2
1
Compal Secret Data

2016.11.21
U42@ PCZ152
Deciphered Date
+VCC_SA
22U_0603_6.3V6M
2 1
2
1
PCZ140 PCZ87
1U_0402_6.3V6K 22U_0603_6.3V6M
2
2
2 1
2
1
1uF*7
PCZ141 PCZ88
22uF*9
1U_0201_6.3V6M 22U_0603_6.3V6M
2 1
：
2
1
VCC_SA：
U22 & U42
PCZ142 PCZ89
2019/09/01
1U_0201_6.3V6M 22U_0603_6.3V6M
2 1
2
1
PCZ143 PCZ90
1U_0201_6.3V6M 22U_0603_6.3V6M
2 1
2
1
PCZ144 PCZ91
1U_0201_6.3V6M 22U_0603_6.3V6M
2 1
Size
Title
Date:
2
1
PCZ145 PCZ119
1U_0201_6.3V6M 22U_0603_6.3V6M
2 1
2
1
PCZ146 PCZ93
1U_0201_6.3V6M 22U_0603_6.3V6M
2
1
Document Number
PCZ94
22U_0603_6.3V6M
2
1
Friday, January 05, 2018
PCZ96
22U_0603_6.3V6M
2
1
1
1
PCZ95
LA-G07DP(KBL-U_UMA_6L)
PROCESSOR DECOUPLING
22U_0603_6.3V6M
Sheet
of 54
59
Rev
v0.3
A
B
C
D
A B C D
1 1
2 2
3 3
4 4

Size
A B C D
A B C D E
1 1
Vinafix.com
2 2
3 3
4 4

A B C D E
5 4 3 2 1
D D
C C
B B
A A

Size
5 4 3 2 1
5 4 3 2 1
+5VALW/+3VALW
AC
Adapter 19.5V (SY8288C/SY8286B)
P.45
Vout +3VALW +3VALW
Vout +1.8V_PRIM
Vin G5719
D EC_ON Vout +5VALW PCH_PWR_EN PGOOD +1.8V_PG D
EN EN
P.51
Charger +19.5VB
Charge
Vin
BQ24725 +3VALW
Vout +2.5V
Vin G5719
P.47
PM_SLP_S4# PGOOD +2.5V_PG
EN
P.49
PGOOD SPOK
DC Discharge P.48
Battery
P.46
+1.2V/+0.6VS
Vin(G5616B)
Vout +0.6V_0.6VS
+2.5V_PG Vout +1.2V_VDDQ
EN S5
C C
SM_PG_CTRL
EN S3
P.49
+1.0V_PRIM Vout +1.0V_PRIM

Vin (SY8286R)
+1.8V_PG PGOOD
EN +1.0V_VS_PG_PWR
P.50
CPU_CORE Vout +VCC_CORE

Vin (RT3602AE) Vout +VCC_GT
VR_ON Vout +VCC_SA
EN
B PGOOD VR_PWRGD B
P.52,53
+VGA_CORE
Vin (RT8812A) Vout +VGA_CORE
VRAM_PG
EN PGOOD GPU_PGD
P.56
+1.35VS_VGA Vout +1.35VS_VGA

Vin (SY8286R)
A A
DGPU_PWR_EN PGOOD VRAM_PG

EN
P.55
Power Block Diagram Vinafix.com
Size
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A

Size
<Path Name>
Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C v0.3
5 4 3 2 1

HP 15-Da Series - Compal Epk50 La-G07dp La-G07ep Schematic

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HP 15-Da Series - Compal Epk50 La-G07dp La-G07ep Schematic

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Intel M/B Schematics Document

nVidia N16 gDDR5-2GB

EPK50 :LA-G07DP (EPS50 :SKLU_4G:LA-G071P)

(EPK52 :LA-G07EP=>v0.2 for PV)

Security Classification Compal Secret Data Compal Electronics, Inc.

Date: Monday, January 08, 2018 Sheet 1 of 59

UV6 UV7 ChA:JDI MM1(REV)

SATA 3.0 Port 2

NGFF WLAN+BT PCIex1 Port #6 5Gb/s

03.DA8001EH000, PCB 29M LA-G079P REV0 MB 3(KBLU_4G)

Power rail Control (EC) Source (CPU)

+3V_PCH PCH_PWR_EN X Thermal

+5VS SUSP# PM_SLP_S3# PCH

ZZZ ZZZ ZZZ ZZZ

UC1 UC1 2 USB2.0/USB3.0

U9 Thermal Sensor :G753T11U

[Diner-PWR Sequence_SKL-U22_DDR3L_Volume_NON CS]

G3->S0 S0->S3/DS3 S0/ DS3 ->S0 S0->S5

PCH_PWR_EN (SLP_SUS#) PCH_PWR_EN (SLP_SUS#)

EXT_PWR_GATE# If EXT_PWR_GATE# Toffmin is too small, Pwr EXT_PWR_GATE#

T4 = Min : 20ms Max : 30ms(EC Control)

Security Classification Compal Secret Data Compal Electronics, Inc.

A7 GPP_E3/CPU_GP0 PCH_JTAG_TDI A56 SOC_XDP_TDO

RC11 2 @ 1 51_0402_5% SOC_XDP_TMS

RC13 2 @ 1 51_0402_5% SOC_XDP_TDI

RC15 2 1 51 +-1% 0402 SOC_XDP_TDO SD000008H80

RC364 2 @ 1 51_0402_5% CPU_XDP_TCK0

RC14 2 @ 1 51_0402_5% XDP_PREQ# XDP_PREQ# <11>

RC31 1 @ 2 1K_0402_5% XDP_ITP_PMODE XDP_ITP_PMODE <16>

4 RC365 2 @ 1 51_0402_1% SOC_XDP_TRST# 4

RC35 2 1 51_0402_1% CPU_XDP_TCK0 SD000008H80

RC37 2 @ 1 51_0402_5% PCH_JTAG_TCK1

RC366 1 @ 2 0_0402_5% CFG3 CFG3 <16> Security Classification

Interleaved Memory Interleaved Memory

RC904 0.1U_0201_10V6K 2 1 CC57

SML0ALERT# (Internal Pull Down):

to SPI ROM UC2 Source From +3V_PRIM

+3V_PRIM +3VALW HOST_SPI_0_SIO3 RC51 1 ES@ 2 1K_0402_1%

From WW36 MOW for SKL-U ES sample

EON SA000046400 S IC FL 64M EN25Q64-104HIP SOP 8P

HDA for AUDIO

<32> HDA_BIT_CLK_R 2 EMI@ 1 HDA_BIT_CLK

RC91 1 2 20K_0402_5% PCH_SRTCRST#

CLRP1 1 2 SHORT PADS CLR ME UC1J SKL_ULT

CLK_PCIE_N4 B40 RTCX1 AM20 PCH_RTCX2

6.8P 50V C NPO 0402

2 1 SYS_RESET# 24MHz Parrtt::

CK0402101V05_0402-2 DC3 SCS00000Z00

A Vinafix.com <33> PCH_DPWROK

RC1161 2 60.4_0402_1% EC_VCCST_PG

UC1F SKL-U +3VS

AF11 DGPU_HOLD_RST# RC923 1 @ 2 10K_0402_5%

ODD_DA# RC930 1 2 10K_0402_5%

<DB> Change Thermal Sensor IC

0 = Disable No Reboot mode. --> AAX05 Use

1 = Enable No Reboot Mode. (PCH will disable the TCO

Boot BIOS Strap Bit

0 = SPI Mode --> AAX05 Use

<37> SATA_CRX_DTX_N0 F20 AJ1

+1.0V_VCCSTU +1.0V_VCCST Vinafix.com

1 1 Imax : 2.77 A CC89 1 2 0.1U_0201_10V6K

+1.0V_PRIM +1.2V_VDDQ +1.2V_VDDQ