DESIGN

DIGITALCIRCUITS &toLOGIC
simpliiy the cireuit shown
LOGICGATES AND BOOLEAN ALGEBRA
theorem and Boolean's Law below the following using Boolean Algebra:
E. 38 Use De Morgan's EE 41 Solve+ X Z + X Y Z (XY + Z) (b) AB + BC + (BC)
A.B (a) A
XY
=

Solution: (a)
A = XY + X'Z + XY/ (XY +Z)
XY +XZ + XXYY'Z + XY'ZZ
B
= XY + X'Z +0 + XY'Z YY =0, ZZ =Z)
= X (Y + Y'Z) + XZ
XZ X'Z XY +Z (X + XK)
= X (Y +Z) XZ=XY
=
+ + +
( X = X' =1)
XY +Z
A.B.C +D b) AB + BC + (BC = AB + BC + B' +C (: B' +BC = B' + C)
BC) +C' = AB + B'+C+ C
C+D = AB + (B' +
D = AB +B'+(C+C) = AB + B° +1
A +1 1)
( =

Y= (A.B)(AB.C+ D)
Solution: +BC+ ABC.
FEx 42 Draw the logic circuit for
Y=A

Y (A.B)+ (AB.(C+ D)) Solution

AB+AB+C+D) AB+C+D
Y
=

Y=
is Y = A + B +C+D
Therefore, thesimplified expression
the following Boolean expression using NAND gates only.
E 39 Implement
Soluton Y= Y=A+BC+AC
=
A+BC +AC = A(1+C)+ BC

= A(1) + BC = A+BC = ABC EC

Y-A+Bc+ABC

-Y ABC

B Ex. 43 Using postulates of Boolean algebra prove that:

V
C
Bx 40 Show that (A +B) ( + C)= AC+ ÄB
L x-Y+Z+Y-Z=X.Y+X Z.
Solution: From L.H.S. we have
XY +XZ+ YZ
: X+X =1)
E
XY +Z+(X +X) YZ
Solution: (A + B) ( +C) = AA +AC+ + BC
XY + XZ+XYZ+ XYz
W
=
0+ AC+AB + BC (: AA0)
=
XY(1+2)-+z(1+Y)
AC+ +BC(1) ( 1+Z=1+Y= 1)
XY +KZ
AC+ ( A) Thus, L.H.S. = R.H.S.
AC+ AB +ABC + ABC Hence, proved
Ex. 44 Draw a NOR-NOR circuit for the Boolean expression :
AC(1+B)+ (1+C) ( 1 + B =1,1+C
Y ( +B+Õ ( +) ( C).
AC+AB
 DIGITAL CIRCUITS & LOGIC DESIGN
Solatien
LOGIC GATES AND BOOLEAN
ALGEBRA
= (A R - (
Ex. 46 Reduce the expression A B +C(AB + A

Solution: AB C(AB +AC))

=AB-(ABA}|
L
M-N= M`

MN = M-S

A(B-CA -B. -Ci)

-
A (B+ + -BC)
A (B+ + + -BC)

AB+AC+ACC AB.C-B.C.C
=( +T)(
=AB+A+ ABC)}
= AB +AAC+ AABC
= AB
AA
=o
Ex. 47 Reduce the foilowing expressions :

I E 45 Shw that AB - (A B; isequivalent to A B .

(a) A+B[AC+B +D
(b) (B+BC)B+BC)B+ D)
Sobatira:LHs-3-A -3 Solution: (a) A +B [AC + (B +C) DI

B
AB AB(A B = A
+B[AC+BD CD
= A+ ABC+ B.BD + BC.D

G A + ABC+ BD + BCD BB = B

=
A(l+BC)+BD(1-C)
A.l +BD.I f1+A 1}
RHS . A +BD

b) (B+BC)B + BC)B + D)
AB
=B(1+C) (B +BC) B + D) B+BC=B+C!
= [B (B +C) (B +D)}
= [B (B.B + B.D + BC+ CD)]
=
[B.B.B + B.B.D + B.B.C + BCD
B.B B
Therefore, .
=
[B BD+BC BCD +

H.S R.HS
=

= B (1 + D) + BC (1 +D)
ecause, AH+ (A +B)
is eguivalent to A B. = B + BC :1 D I
= B(1 +C)
FI+C=t}
 DIGITAL CIRCUITS & LOGIC DESIGN
182 (A +B) AB is equivalent
to A e B.
LOGIC GATES AND BOOLEAN ALGEBRA
EEx 48 Show that 183
S o l u t i o n : L.H.S. >
5 0 Draw the logic diagram and construct the truth table for the following expressions:

A+B) AB X=A +B+ CD ()X = (AB) (A +B) + EF.

(A + B) AB
X=A+B+CD
Solution : )

A
AB
B

A-B-D
R.HS.
B
CD
D

A A+B CD Xx-A+B+CD
0 1
Therefore, L.H.S. = R.H.S.

Because, (A+B) AB is equivalent to A B.

Also, L.H.S. = (A +B) (AB) ) X = (AB) (A +B) +EF

= (A +B)( +) (AB=A-| A B
A.A + AB+ AB + BB B
= AB+ AB = A ®B. AA 0, B (AB) (A B)
Ex. 49 Verily by truth table method:

A+AB+AB =A +B A+B X - AB(A B) EF

Solution : LH.S. > A + AB+ AB

AB AB A+ÄB +AB
0 EF
E
F

EF X(AB)(A +B)+ EF

. R.H.S.:A+B
B A+B
A B

1
0
AB

0
A+B

0
(AB) (A+B)

theorem to the expressioa

SI Apply Demorgan's
EF) (AB+CD)
AB(CD
Therefore, LH.S. = R.H.S.

Also, L'H.S. = A+ AB + AB =
A(l+B) + AB =
A+ AB = A +B
 DIGITAL CIRCOTS & LOGIC DESIGN
184 Solution: Apply DeMorgan's theorem, we have

AB (CD +EF) (AB +CD)

LOGIC GATES AND
-ABCD BOOLEANNA
LE54 Simplify the following using Boolean Algebra
AB CD S=(A+B) (A +B+ D)D
rules:
187
AB-CDEF)-(AB (CD z-3 ) S= AB(A+C)+ AB (A+B+C)
7)

(i) f = AC(ABD) + ABCD+ ABC

AB+C+D). EF+ ABCD
(v) S=Zm (0, 1, 2, 4, 6).
AB+CEF +DEF+ABCD Solution: ) f=(A +B) (A +B
AB (1+CD) +EF + DEF +D)D
=
(A+ B) (AD + BD DD) (A +B)(AD
+
+BD)
=

AB+CEF+DEF =
+ + BAÐ +BBD
(: DD = 0)

Ex 52 Explain Gate Propagation delay time.

Solution: Gate Propagation delay time: The
=
ABD + ABD + BD
propagation delay also known as gate (A +A) BD + BD
starting when the input becomes stable and valid to a logic delay is the u
=

level, whenever the input gate fOr the time that the output to reach 50 of eng of tin
changes. Reducing gate delays in digital circuit allows them to = BD + BD
improve overall performance of the circuit. data atat aa fo
cess data
process
faster ratelpa BD
The difference in and
propagation delays logic
as a result of race condition.
of elements in the circuit is the
major contribution to f=AB (A +C) + AB (A + B+C)
asynchrono s Circva
The principle of logical effects make use of propagation delays to compare different AB
=
+(A+C)+ (A +B) (A BC)
same iogical statement. The digital signal of time delay is given by : designs and
implementi
enting te ( +B)+
At =Nx Fc =
( + A
Where, N is number of =A+B+AC+0+0
flip-flops and Fc is clock frequency of the circuit. (: AA = BB = 0)

Propagation delay is the average transition delay time fora signal to =

signai change its value. The signals through gate take a certain propagate from input to output when
This interval of time is defined as the amount of timne to propagate from the the binay - A+B
propagation delay of the gate. inputs to the outpua (. 1+ =)
Propagation delay is expressed in nanoseconds (ns) and is f = AC ( + + ABC
to 10 of a second. ie., Ins 10 s.
propagation delay through the individual gates of the circuit equal is the total
=
The
sum ofte
operation is important then each gate must have a small propagation delay of the circuit. If sped
propagation delay and the digital circuit must have a
AC(+B+D)+
number of series gates between
inputs and
delay of a gate multüply by the total number outputs.
The total
propagation delay of the circuit is equal to the minmun +ABC
more important than the
of gates in the circuit. The
number of the propagation delay in circuits propagaur =
ABCD+ ABc
reduction in the total number of
gates if speed of operation is the major factor. may +

Ex 53 Simplify the expression F = =0+BC(A +A)+

(B+C)+BC (A +B).
Solution: Using Boolean
Algebra
-
BC+AD (C+ B) =C+ + ABD
(iv) f= Em (0, 1, 2, 4, 6)
f = ABC+ ABC+ ABC + AB
F
AB (B +C)+BC(A+B)
AB.B + ABC+ ABC+ B.BC ABC+C)+B( +A) + ABC
= AB + B + ABC
AB + B.B =B.B.B=0)
AB +ABc -B(A+A)+BT
BA C)+BC
AB(1+CD ( : 1 + C l

AB+BC +BC
AB
F = AB.
AB+CB +B)
= AB+C
 LOGIC DESIGN LOGIC GATES AND BOOLEAN ALGEBRA
DIGITAL CIRCUITS & materms F (A, B, C)= (A' +Bho
B) (E +C).
Using Boolean algebraic theorems, prove that
187
in prodoct of a E
following kogic
function
PTU, CSE, Dec.
200 A+AB+ AB PTU, CSE Dec. 2007)
Coavert the
=A+B
Solution: F(A, B. C)= (A'+B)
(B+C) Solution: A AB AB = A +B+ AB (:
A-AB A+B)
(. 1-B=1)
(A+B+Cc)(BC+AA)
(A +C) B A (1B) =BA. 1 =A+B
A+BC=(A +B) LHS = RHS
AS be written as
B+C+AA) can B'+C+ A) (B' +C+A) Hence proved.
(A+B +C) (A' +B+C)
(A+B+CC)

F(A, B, C)= Boolean function

function in a product
of maxterms F60 Write the expression for
the folowing logic FA, B, C) = Em (1,4, 5, 6,7) in standard POS form PTU, CSE, Dec. 2008)
E Convert
C' D+ ABC'+ABD
A'B'D
+ PTU, CSE, May 2005)
F(A, B, C, D)
=
Solution: F(A, B, C) Zm (1,4, 5, 6,7)
ABD
ABD'+
+ ABC'+
Sohution: F(A, B, C, D) = C'D Standard POS form can be calculated from the following function:

complement the g+ven

function:
F(A, B, C) TM (0, 2. 3). Because, SOP form and POS forn
=
are opposite to each other.
For m a x t e r m s
F(A, B, C, D) = CD+ABC'+ABD' + ABD . The standard POS form expression is given by
F(A, B, C) (A B +C) (A+B +C) (A +B- )
CD+ABC+ ABD + ABD +
=
or
(PTU, CSE, May 2010)
- (5) AB) (ABD) (AED) Ex. 61 Find SOP form of f= AB +BC+ A.

Solution : f= AB+BC+ A
-+D) (7+B+)(a+B+5) (A+ +5)
AB (C+C)+(A+A) BC+A(B+ B)(C+)
++c)( (A +B+D) =ABC+ABC + ABC+ABC + (AB+ AB)(C+C)
=(C+D) (product of
maxterms

Ex57 Convert the following

logic function in a
PTU, CSE, Dec. 204) f ABC+ AB + +
FA, B, C, D) D (A'+
B) B'D
+ =
The above form is the standard SOP form.
DB +BD (PTU, CSE, May 2010)
+B) + B'D DA'
= +
NAND gates.
Solution: F(A, B, C, D) =D (A' Ex. 62 Implement half subtractor using
as Solution: Half subtractor using NAND gates :

term can be given

Max
DA+DB+B'D
= (DA) DB) BD)
(:A=Ä)
Difference (A®B)

FA, B, C, D) = (D+A) (D +B) (B+D). B

OR and AND gates:
function with exelusive
-

Ex. 58 Implement the Boolean (PTU, CSE, Dec. 2004)

A'BC'D
+ AB'C' D+
F AB' CD'+ABCD' AB'C'D + ABC'D
Solution: F= AB' CD +ABCD' +
Borrow (AB)
= CD' (AB'+ AB) + CTD (AB'+ A'B)
= CD' (A B) + C'D (A B) (PTU, CSE, May 20
= (A ®B) (CD +CD) Ex. 63 Construct the truth table for Z=ry +
Iy
= (A B) (c eD) Solution: Z= xy ++ù=xO y, ie., XNOR gate.
Its truth table is
A y+y
B
-F= (A®B).(COD)

0 0
C
0
D
 LOGIC GATES
DESIGN
AND BOOLEAN ALGEBRA
DIGITAL CIRCUITS &LOGIC ) OR gate using NAND only:
expressions
the following
188 Ex64
Minimize

(PTU, CSE, May A

() (AB(C+D)+)
0) A+B+C)
2011
Solution: ) A+(B+
Y= = =A+B
=A+(.)
A + BC
(DeMorgan's Theorem
B

in (ABC+ D) +C) (ii) XOR gate using NAND only:

= (ABC+ AB).

=(ABc).(AB).c
+B+ D).C
= (A +B+C) (A
+BD+ AC+ BC +CD)C Y = A®B = +AßB
= (A+ AB +AD + AB +B B
BCD+0+0+0
= AC+ ABC +ACD+BC+
ACD + BC (1 + D)
= AC (+ B) +

iv) XNOR gate using NAND only

= AC+ ACD +BC

= AC (1+ D) + BC

=
= C(A +B). Y AOB- AB +AB
B-
show that
Ex.65 Using Boolean Algebra
(PTU, CSE, May 2010)
(A +B) (A+C) (B +C)= AC +BA.
Solution:(A + B) (A +C) (B+C) Ex. 67 Design EX-OR gate using NAND gates only. (PTU, CSE, May 2
BC) (B+C) Solution: EXOR gate using NAND gates only :
=(AA +AC+BA +

= (AC+AB +BC) (B+C) (: AA=0)

Ac.C+AB.B+ABC+ BCc.B+ BC.C

ABC+
A-

( B.B B, CC- Y ASB-ÄB AB

ABC AC AB+ ABC+ BC+ BC B
1)+ AB (1+C)+ BC
( BC+BC=BC
= AC (B
AC AB BC
(:AA=
= AC+AB+BC (A+A) Ex. 68 Prove that if A +B = A+C and A' +B = A' +C, then B = C. PTU, CSE, Dec.
Solution. A+B A+C
AC+AB+ +ABC = ABC +C)+AC 1+B)
(:1+C=1+Bzi A'+B =A +C
= AB AC
Multiply (1) and (2), we get
(AB) (A+C) B C)= AC BA. (A +B) (A' +B) = (A +C) (A"+ C)

(PTU, COt. AA+ AB +BA'+ BB = AA' + AC +CA'+CC

Ex 6Reatize AND, OR, X-OR, X-NOR gates with the help of only NAND gates.
Solutson: () AND gate
using NAND Only: 0+AB+BCA' +B =0+ AC +CA+C ( BB =B &0
AB +B (A + 1) = AC +C(A' + 1)

Y= AB - AB
B
 DIGITAL CIRCUITS & LOGIC
DESIGN

190 AB +B A C + C
:
LOGICGATES AND BOOLEAN ALGEBRA
B (A +1)=C(A+1) 14. Stmplifñed expression for XY(XYZ) AYZ+ KYZ) will be
B C
. b)
Hence proved. :A+A= (a)-1
15. The term (A + BC + AB) When complement gives
(c) 0 (d) X.

OBJECTIVE TY (a) ABC (b) ABC (c) A (B+C) (d) A (B +

of two series switches

is similar to the logic gate
PE
UESTIONS
16. The SOP of the expression (A +C)(A + B+C)(A +B) will become
(a)AB+AC+ABC (b) AB + A
1. The function (c) OR
(a) NAND
(b) AND (d) All of the (c) AB+AC + ABC + ABC + ABC+ BC
to the logic gate above d) AB+ AC + ABC + ABC
switches is similat
2. The function of two parallel 17. The Boolean expression in SOP form for a logical circuit which will have output when X = 0, Y = 0 am
(b) AND (c) OR (d) NOR. Z 1,X=1, Y = 1 and Z = 0 and a0 output for all other input states is given by
(a) NAND Boolean algebra ?
valid according to
folowing relation is not ()XYZ+KYZ
3. Which of the (b) XY}+XxÝz (c) xY} (d) X+ Y +Z
b) X+ (Y +Z) = (X+ Y) +Z
(a) X=1 18. The complement of AB D + BC) s
(d) X.Y = Y.X
() X+Y= Y+X (a) AB +CD
not valid according to Boolean algebra
(b) ABCD (c) AB +C+D (d) AB+C+D
4. Which of the following relation is 19. The complement of AB +BC+CD ls
(b) X X + Y) = X
a) XY+ YZ+ YZ=XYZ (a) AC+ BC+ ABD (b) AC+BC + ABD
X+XY =X +Y (c) AC + BC + ABD (d) AC+ BC+ ABD
(c) (X+Y) X+Z)=X+ YZ (d) 20. A pulse at -3V to chasis ground in positive logic will be at
5. The term (1+A +B +C) according to Boolean algebra is equal to (a) 1 level (b) 0 level (c) either 0 or 1 level (d) None.
(b) A+B+C (c) ABC (d) 1+ ABC.
(a)
6. (A +B +AB) is same as ANSWERS
(b) 0 (c) 1 (d) C. 1. b) 2. (c) 3. (a) 4.(a) (a) 6. (c) 7. (b) 8. (c) 9. (a) 10.
a)
7. The three Boolean operators are
11. (c) 12.b) 13.(b) 14.c) 15, (c) 16. (c) 17. (b) 18. d 19. d 20.
(a) NOT, NOR, NAND (b) OR, NOT, AND (c) OR, NOR, NAND (d) None.
8. Positive logie in a digital circuit is
fa) kogic 0 and 1 are represented by negative and positive voltage respectively.
(b) logic 0 voltage level is higher then logic I voltage level
OoDSUPPLEMENTARY PROBLEMS
1. Design a logic circuit using basic gates for the following output function
(c) logic 0 voltage level is lower then logíc I voitage level f (A, B, C) = + ABC + ABC
d) logic 0 and 1 are represented by O and positive voltage respectively 2. Design a logic cireuit using basic gates for the following
9. The gate which is formed by the inverting the output of an AND gate is output function
f (A, B, C, D) = + ABCD + ABD + ABCD
a) NAND gate (b) OR gate (c) NOR gate (d) None of the above
10. In Boolean algebra the varíables can take
3. Apply DeMorgan's theorem to each expression:
a) one of the two possible values (b) any number of values (0 (A+B) + (ii) (A + B) + CD (ii) (A + B) CD+ E+F
(c) and one of the ten values 0 through9 (d) none of the above 4. Prove the following identities
11. A NAND gate is called a universal
logic gate because (a) (A G B) A.B =0
a) many digital computers use NAND (b) A ® B = A 4 B
gates 5, Find the canonical sum of
(b) all the minimization
techniques are applicable for optimum NAND gate realization products (SOP) form for the expression below.
c) any logic function can be realized
by NAND gates alone f A, B, C, D) =AC+ BD
d) it is used by every body 6. Find the canonical POS form of following switching function.
12.
The minimized expressdon for the SOP ABC+ ABC+ ABC+ ABC+ ABC+ ABC wilbe
f (A, B, C) =( (B+)
(ay CBA 7. Write
(b) C+B+A (c) C+BA (d) C+B+A short note (a) Boolean Algebra (b) Maxterms (c) SOP
on:
8. State and prove De-Morgans laws.
13.
The mintmzed expression for POS (A +B+C(A + B+T(A +B+C( +B+ C) will be
ta) (A+C( 9.Why we called NAND gate a Universal gate ?
fc) (A+C BB+C) (b) (A+C)(A +B)(B +C Or
What are Universal gates?
(d) (A+C(A + B)(B +C)
 KARNAUGH MAPS AND
QUINE-McCLUSKEY MINIMIZATION

INTRO0ECTION
een

D
SNE
41 TPEN OF KMAPS COMMONEY
(ACDNB

YA è (aY8CxA () to tatss

(A8x C)

41 Vetabe a
fir
e gu diagr iaea tngerac of (ij sad aBaco draw the mimsti ped eNesshm

Y M 3 . 7

hY m ,3, Y M1

ia) AND p