Manuel S.

Enverga University Foundation

Lucena City, Philippines
Granted Autonomous Status
CHED CEB Res. 076-2009

NAME_____________________________ DATE PERFORMED________________

COURSE___________________________ DATE OF SUBMISSION____________

Laboratory Activity No. 1

COMBINATIONAL LOGIC CIRCUIT

I. OBJECTIVE

1. To design, construct, and test combinational logic circuits.

II. BASIC CONCEPTS

A combinational circuit consists of input variables, logic gates and output variables. The logic
gate accepts signals from the input and generate signal from the output. This process transforms
binary information from the given input data to the required output data. The input and output data
are represented by binary signal that is, they exist in two possible values either logic0 or logic1. A
block diagram of a combinational circuit is shown in figure 1-1. The n input binary variable come from
an external source and the m output variable go to an external destination. There are 2n combinations
of binary input value for n input variables. A combinational circuit described by m Boolean function,
one for each variable. Each output is expressed in terms of the input variables.

Figure 1-1. Block diagram of a combinational circuit

III. MATERIALS

Digital trainer
IC type 7400, quad 2-input NAND gate
IC type 7404, hex inverter
IC type 7432, quad 2-input OR gate
IC type 7408, quadruple 2-input AND gate
IC type 7486, quad Exclusive-OR gate
Wires
LED
Breadboard

COLLEGE OF ENGINEERING AND TECHNICAL DEPARTMENT

Manuel S. Enverga University Foundation
University Site, Brgy. Ibabang Dupay, Lucena City, Philippines; Telephone No. (042) 710-3151
 Manuel S. Enverga University Foundation
Lucena City, Philippines
Granted Autonomous Status
CHED CEB Res. 076-2009

III. EXPERIMENTAL PROCEDURE

• Design, construct and test the following combinational logic problems with minimum number
of IC’s. For all ICs in this experiment: Vcc = +5v to pin 14, and 0 (ground) to pin 7.

Problem 1
Design a combinational circuit with 4 inputs ABCD and 1 output F. F is equal to 1 when A =0
provided that B=1 provided that either C and D is also to be equal to 0. Otherwise, the output is equal
to 0.
a. Obtain the truth table of the circuit.
b. Simplify the output function.
c. Draw the logic diagram of the circuit using NAND gates with the minimum number of IC’s.
d. Construct the circuit and test it for proper operation by verifying the condition stated above.

Problem 2
Design a circuit for a car chime based on the following system:
A car chime or bell will sound if the output of the logic circuit (X) is set to a logic ‘1’. The chime is to be
sounded for either of the following conditions:

• if the headlights are left on when the engine is turned off and
• if the engine is off and the key is in the ignition when the door is opened.

Use the following input names and nomenclature in the design process:
• ‘E’ – Engine. ‘1’ if the engine is ON and ‘0’ if the engine is OFF
• ‘L’ – Lights. ‘1’ if the lights are ON and ‘0’ if the lights are OFF
• ‘K’ – Key. ‘1’ if the key is in the ignition and ‘0’ if the key is not in the ignition
• ‘D’ – Door. ‘1’ the door is open and ‘0’ if the door is closed
• ‘X’ – Output to Chime. ‘1’ is chime is ON and ‘0’ if chime is OFF

a. Create the truth table for given system requirements.

b. Write a sum-of-products expression for the output (X).
c. Use Boolean theorems or a K-map to simplify the expression. Show all of the steps used in the
selected simplification process.
d. Draw the circuit diagram for the simplified expression.

Problem 3
A manufacturing plant needs to have a horn sound to signal quitting time. The horn should be
activated when either of the following conditions is met:
1. It’s after 5 o’clock and all machines are shut down.
2. It’s Friday, the production run for the day is complete, and all machines are shutdown.
Design a logic circuit that will control the horn. (Hint: Use four logic input variables to
represent the various conditions; for example; input A will be HIGH only when the time of day is 5
o’clock or later)

COLLEGE OF ENGINEERING AND TECHNICAL DEPARTMENT

Manuel S. Enverga University Foundation
University Site, Brgy. Ibabang Dupay, Lucena City, Philippines; Telephone No. (042) 710-3151
 Manuel S. Enverga University Foundation
Lucena City, Philippines
Granted Autonomous Status
CHED CEB Res. 076-2009
IV.CONCLUSION

V. QUESTION

1. In a microcomputer, the microprocessor unit (MPU) is always communicating with one of the
following: (1) Random Access Memory(RAM), which stores programs and data that can be readily
changed; (2) Read Only Memory (ROM), which stores programs and data that never change; (3)
external input/output (I/O) such as keyboards, video displays, printers, and disk drives. As it is
executing a program, the MPU will generate an address code that selects which type of device (RAM,
ROM, or I/O) it wants to communicate with. The figure below shows a typical arrangement where the
MPU outputs an eight-bit address code A15 through A8. Actually, the MPU outputs a 16-bit address
code, but the lower bit A7 through A0 are not used in the device selection process. The address code is
applied to a logic circuit which uses it to generate the device select signals: RAM,ROM, and I/O.

Analyze this circuit and determine the following:

a. the range of address A15 through A8 that will activate the RAM
b. the range of addresses that activate I/O and
c. the range of addresses that activate ROM.

Express the addresses in binary and hexadecimal. For example, the answer to a is A15 to A8 =
000000002 to 111011112 = 0016 to EF16.

COLLEGE OF ENGINEERING AND TECHNICAL DEPARTMENT

Manuel S. Enverga University Foundation
University Site, Brgy. Ibabang Dupay, Lucena City, Philippines; Telephone No. (042) 710-3151
 Manuel S. Enverga University Foundation
Lucena City, Philippines
Granted Autonomous Status
CHED CEB Res. 076-2009
2. Design a logic circuit that controls an elevator door in a three-story building. The circuit
has four inputs. M is a logic signal that indicates when an elevator is moving (M=1) or stopped (M=0).
F1, F2 and F3 are floor indicator signals that are normally LOW, and they go HIGH only when the
elevator is positioned at the level of that particular floor. For example, when the elevator is lined up
level with the second floor, F2=1 and F1=F3=0. The circuit output is the OPEN signal which is
normally LOW and is to go HIGH when the elevator door is to be opened.

COLLEGE OF ENGINEERING AND TECHNICAL DEPARTMENT

Manuel S. Enverga University Foundation
University Site, Brgy. Ibabang Dupay, Lucena City, Philippines; Telephone No. (042) 710-3151