Level Shift Methodology

Standard Usage (Does Not Cover More Complicated Level Shifting Case of Switching Power)

Written by: Christopher Black

Definition and Motivation

A level shift or domain shift circuit translates a digital signal in one power/ground domain to another
power/ground domain robustly across the operating space of the circuit. Successful execution of this
translation yields an output signal that reliably contains the same information as the input signal.

Figure 1: Level Shift Black Box Description

Common Types of Level/Domain Shifts

There are many approaches to level shifts in terms of architecture, power usage, and functionality.
Categorization of the space of level shifts hinges on a few key features:

1. Zero v/s Non-Zero Quiescent Current

2. Independent v/s Dependent Supplies
3. Supply and Ground Shift v/s Supply or Ground Shift

Quiescent Current
Level shifts that do not require current are preferable if they can meet the system performance
requirements. However, level shifts that do not require current fundamentally have regions of
operation where the output is undefined or possibly incorrect (see Issue 1: Undefined Output with Zero
Current Level Shifts).
 Figure 2: Example of Zero Current Level Shift Figure 3: Example of non-Zero Current Level Shift

Supply Dependency
Independent supply topologies allow valid operation (no shoot through current, correct translation, etc.)
regardless of relative magnitude of the supplies (input supply greater than or less than output supply).
For example, a NAND gate can be used as a level shift configured with one input set to an EN and the
other input connected to the signal to be level shifted; however, it comes with a fundamental supply
sequencing constraint (see Figure 4). Consider how a NAND gate responds to an input supply being less
than the output supply—this scenario creates shoot through in the input stage. Therefore, to use a
NAND gate as a level shift inherently requires that the output supply must always be less than the input
supply for the entire space where the NAND is enabled. In contrast, do the same thought experiment
with the two level shift examples provided in the Quiescent Current section (Figure 2 and Figure 3)—no
supply sequencing constraint.

Figure 4: NAND Style Level Shift

Ground Shifting
All the above examples only translate between two different supplies referenced to a common ground.
There are many cases that require shifting both the supply and the ground; however, they are typically
applications with switching power or other ground bounce concerns. This article will only consider
common ground applications and relegate the ground shifts to power level shift documentation.
Application Risks/Concerns
Issue 1: Undefined Output with Zero Current Level Shifts
Proper implementation of a resistor in a level shift provides the capability to ensure the output is always
defined—regardless of supply voltage. However, this also means that in at least one state (high or low),
the block will draw quiescent current. For the case of a zero-current level shift, as shown in Figure 2,
there are states that generate undefined outputs and shoot through current.

Consider the possible supply states for this topology:

Supply 1 (In) Supply 2 (Out) Result

State 1 On On Normal Operation, no issues No shootthru current possible
State 2 On Off Output is low, no issues No shootthru current possible in inv of figure2
State 3 Off On cause
A & B are undefined, causing the inv shoot
potential itself is powered
through in down
inverter
State 4 Off Off Output is low, no issues No power in system so its like nothing can
Table 1: Zero Current LS Peformance Across Supply States charge up (to vdd)

Due to state 3, additional circuitry is needed to eliminate shoot through current risk on the output.
Possible solutions include requiring specific supply sequencing or returning to resistive based level shifts.
Another approach that is valuable when more than one level shift is required—add a single resistive
level shift to create an always-valid EN (in the output supply domain), and then incorporate a disable for
the zero-current solution that ensures the output is known and valid when state 3 occurs. See Figure 5.

Figure 5: Zero Current Level Shift with Fix

For this solution to work, the following constraints must be met:

• EN must be referenced to the output supply (Supply 2 in the example)

• EN must always be low, when input supply is not valid to ensure “B” is ignored and does not
generate shoot through or incorrect information
• EN should be low, when output supply is not valid to ensure the level shift output is in a known
state

A viable general solution is to have the power OK signal for supply 1 resistively level shifted to supply 2.
This provides an always valid signal. Combine this signal with the power OK for supply 2 (or a more
constrained enable signal if desired) and use for all the level shift enables between supply 1 and supply
2. Note that this proposal in the above topology meets all cases for level shift up or down for signal
integrity, shoot through elimination, and quiescent current minimization.