GROUP ASSIGNMENT - 1

CONTROL ENGINEERING DIGITAL DESIGN EEU 08202.

1. The block diagram of a sampled data control system is shown in Figure below. Find
the value of d.c gain K which yields a damping ratio of ζ = 0.7. Use root locus
techniques to show the system before and after design.

𝐾(𝑧 + 1)
R(s) C(s)
(𝑧 − 0.5)(𝑧 − 1)

2. Suppose you have the following continuous transfer function

M = 1 kg, b = 10 N.s/m, k = 20 N/m, F(s) = 1

Assuming the closed-loop bandwidth frequency is greater than 1 rad/sec, and

sampling time (Ts) equal to 1/100 sec. Find X(Z)/F(Z)

3. The open-loop transfer function of a system together with a zero-order hold is given
0.03(𝑧+0.75)
by 𝐻𝐺(𝑍) = 𝑍2 −1.5𝑧+0.5)

Design a digital controller so that the closed-loop system will have ζ = 0.6 and wd = 3
rad/s.

The steady-state error to a step input should be zero. Also, the steady-state error to a
ramp input should be 0.2. Assume that T = 0.2 s. Use root locus techniques to show the
system before and after design

4. The block diagram of a system is given in Figure 9.31. It is required to design a

controller for this system such that the system poles are at the points z1,2 = 0.4 ± j0.4 in
the z-plane.
(a) Derive the transfer function of the required digital controller.
(b) Plot the unit step time response of the system without the controller.
(c) Plot the unit step time response of the system with the controller.

R(z) 𝐾 C(z)
(𝑧 − 0.4)(𝑧 − 0.9)

5. The block diagram of a digital control system is given below.

It is required to design a controller for this system such that the system poles are at the
points z1,2 = 0.3 ± j0.3. Use root locus techniques to show the system before and after
design. R(z) 𝐾 C(z)
(𝑧 − 0.2)(𝑧 − 0.9)

6. Assume we have some discrete transfer function:

0.3678(𝑧 + 0.7189)
𝐺(𝑧) =
(𝑧 − 1)(𝑧 − 0.3680)
 And compensator for this system
𝐾(𝑧 − 0.3678)
𝐷(𝑧) =
(𝑧 + 0.2400)

i. Use root locus to find the maximum gain possible with the applied
compensator without making the system unstable.
ii. Use step functions for simulation of sampled data systems.

7. Given a G(s), below, find Pulse TF with sampling period of 0.1sec. Plot the root locus of
the obtained TF.
1
𝐺𝑝 (𝑠) =
𝑠(𝑠 + 1)

8. Sketch the root locus for the system below. Also determine the range of gain K, for
stability from the root locus plot.
R(z) 𝐾(𝑧 + 1) C(z)
(𝑧 − 0.5)(𝑧 − 1)

9. Find the steady state error for the feedback control system below with step and ramp
inputs. Check for stability in each case.
20(𝑠 + 3)
𝐺1 (𝑠) =
(𝑠 + 4)(𝑠 + 5)

R(s) E*(s) 1 − 𝑒 𝑇𝑠 𝐺𝑠 (𝑠) C(s)

𝑠

10. Find the value of gain K, to yield a damping ratio of 0.5 from the figure below. Where
H(z) = 1 and
𝐾(𝑧 + 0.5)
𝐺(𝑧) =
(𝑧 − 0.25)(𝑧 − 0.75)

R(z) C(z)
𝐺(𝑧)

𝐻(𝑧)

11. Assume we have some discrete transfer function:

0.3678(𝑧 + 0.7189)
𝐺(𝑧) =
(𝑧 − 1)(𝑧 − 0.3680)
𝐾(𝑧− 0.3678)
And compensator for this system 𝐷(𝑧) = (𝑧+0.2400)

a. Use root locus to find the maximum gain possible with the applied
compensator without making the system unstable.
b. Use step functions for simulation of sampled data systems.

12. For the digital control system below,

1
𝐺𝑝 (𝑠) =
s(𝑠 + 6)(s + 10)

Design a digital lead compensator G(z) so that the system will operate with 20%
overshoot and a settling time of 1.1 sec. Create your design in the s-domain and
transform the compensator to the z-domain
13. The designed specifications for unit feedback system below were as follows, PO =
20%, Pt =0.1sec, Kv = 40 in order to meet the requirements, the design yielded K = 1440
and a lead compensator
100𝐾 𝑠+25.3
𝐺(𝑠) = s(𝑠+36)(s+100) 𝐺𝑐 (𝑠) = 2.38 s+60.2

If the system is to be computer controlled, find the digital controller Gc(z).

14. The block diagram of a digital control system is shown below. Design a controller for
this system such that the system poles are at the points 𝑧1,2 = 0.3 ± 𝑗0.3

𝐾
R(s) C(s)
(𝑧 − 0.2)(𝑧 − 0.9)

15. Find the block diagram of a system is given below. It is required to design a controller
for this system with percent overshoot (PO) less than 15% and settling time ts ≤ 10 s.
Assume that the sampling time is, T = 0.2 s.
(a) Derive the transfer function of the required digital controller.
(b) Draw the block diagram of the system together with the controller.
(c) Plot the unit step time response of the system without the controller.
(d) Plot the unit step time response of the system with the controller.

R(s) 𝑍𝑂𝐻 𝐾 C(s)

𝐷(𝑧)
𝑠(𝑠 + 0.4)