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D Fonseca UMA Schematics Document D

rPGA988A Mobile Arrandale

C
Intel Ibex Peak-M C

2009-11-03
REV : X01
B B

DY : Nopop Component
B_TPM:Use Lom TPM
C_TPM:Use China TPM

A A
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Cover Page

5 4
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3 2
Size
Custom

Date:
Document Number

Fonseca UMA
Tuesday, November 03, 2009 Sheet
1
1 of
Rev

82
X01
5 4 3 2 1

DF3-14 DF3
Fonseca UMA Block Diagram Project code
PCB P/N
91.4GN01.001 91.4EQ01.001
48.?????.0SB 48.?????.0SB
Revision 09276 - SB 09226 - SB

D Clock Generator DDR III DIMM1 Channel A


Intel Mobile CPU D

SLG8SP585VTR 7 1067Mhz 18
Arrandale eDP
eDP-LCD Panel CPU DC/DC
ISL62883 47

BL Converter 54
INPUTS OUTPUTS
Thermal & Fan DDR III DIMM2 Channel B
EMC4022 39 1067Mhz 19
rPGA988A 8~14 +PWR_SRC +VCC_CORE
CRT CONN
55
SYSTEM DC/DC
DMIx4 FDI TPS51125 46
BTO(1) INPUTS OUTPUTS
Smart CARD O2 +3.3V_ALW
Socket OZ77CR6 CRT VSW +PWR_SRC
67 +5V_ALW
34 Intel PCH Display Port (B)
MAX4885EETG+ 75

BTO(2) Display Port (C)


C USB2.0 USB2.0
SYSTEM DC/DC C
PC CARD TPS51116 50

Socket 72
X1 Ibex Peak-M SATA X2
Docking INPUTS OUTPUTS
Ricoh PCIE
+1.5V_SUS
1394 Connector R5U242 E/Family +PWR_SRC
Digital MIC +0.75V_DDR_VTT
71 HM55
PCIE Module 73

SD/SDHC/MMC 12 USB 2.0/1.1 ports TLV320AIC3004 SYSTEM DC/DC


Socket 10/100/1000Mb ETHERNET 75 TPS51218 52
71 32
High Definition Audio Azalia INPUTS OUTPUTS
BTO(3) 4 SATA ports CODEC MIC Jack
+PWR_SRC +1.05V_VTT
Power SW(NewCard) New Card 6 PCIE ports HD AUDIO 74
PCIE
TPS2231MRGPR 72 Connector 72 ACPI 1.1 IDT HP Jack
LPC I/F 92HD81 Bluetooth (Option) SYSTEM LDO
SMBus PCI/PCI BRIDGE RT9035 51
Free Fall Sensor Module 73
INT2 INPUTS OUTPUTS
40 INT1
B
DE351DL B

OP AMP 2CH Camera (Option) +3.3V_SUS +1.8V_RUN


SATA SATA 20~28 SPEAKER
HDD CONN 59 (1W/1W) Module 73
30
60
SATA LPC SPI
SYSTEM DC/DC
ODD CONN USB Port x 2 ADP3211 53
59
SPI FLASH MDC (Option) X2 IO Board 76 INPUTS OUTPUTS
RJ11
64Mb Module 76
USB2.0 62 IO Board 76 IO Board +PWR_SRC +CPU_GFXCORE
USB Port x 2 X2
63 1/2 Mini-Card
WLAN Module BATTERY CHARGER
RJ45 76 64 45
TCM (Option) LPC FLASH LOM IO Board TI BQ24745
ZTE 36 8Mb 35
(AC, Battery Existence)
ESW
INPUTS OUTPUTS
LPC BCM5761E 35 Mini-Card
WLAN Switch 64 +DC_IN_SS +PBATT
A
WWAN Module A
<Core Design>
IO Board 76

TouchPad
BC
EC SIO Expander
Serial Port Wistron Corporation
IO Board 76 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Finger Printer Taipei Hsien 221, Taiwan, R.O.C.
Int KB KSI/KSO BC
ECE1077 PS2 MEC 5045 ECE 5028 AES2880 (Option) Title
37 38 FP Board 78
Block Diagram
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Size Document Number Rev
Custom
Fonseca UMA X01
Date: Thursday, October 29, 2009 Sheet 2 of 82
5 4 3 2 1
5 4 3 2 1

Regulator
ADAPTER
ADP3211 53 +CPU_GFXCORE
53
LDO
D D

MAX17036 +VCC_CORE47
47
Switch
BATTERY +PWR_SRC

+3V_ALW_246
TPS51218 TPS51116
52 50
CHARGER
BQ24745
TPS51125
C
+5V_ALW_246 C

46
+1.05V_VTT +1.5V_SUS 50 +0.75V_DDR_VTT 50
52

SI4800BDY
42

+5V_ALW 46
+3.3V_ALW +1.5V_RUN
42
46

B B

SI34800BDV SI4800BDY FD38880 SI3456BDV SI3456BDV SI3456BDV


42 35 +15V_ALW 42 35 42 42
46

42
+5V_MOD
42
+5V_RUN
42
+3.3V_RUN +3.3V_LAN 35 +3.3V_SUS 42 +3.3V_ALW_PCH 42

A
NJT4030PT1G RT9018 A

51
35 <Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

+5V_HDD +CAMERA_VDD 73 +3.3V_HDD 42 51 Power Diagram

5
42

4
WWW.AliSaler.Com +1.2V_LOM 35
3
+1.8V_RUN
2
Size
Custom

Date:
Document Number
Fonseca UMA
Thursday, October 29, 2009
1
Sheet 3 of
Rev

82
X01
5 4 3 2 1

2.2K 2.2K
+3.3V_ALW_PCH +3.3V_RUN
2.2K 2.2K
H14 2N7002 DIMMA(DM1)
PCH_SMB_CLK 202 SMB Addr=[A0]
C8 2N7002
PCH_SMB_DATA 200

2N7002 DIMMB(DM2)
202 SMB Addr=[A4]
PCH 2N7002
200
D D

ibex Peak-M
2.2K
53 XDP1
C6 +3.3V_ALW_PCH
PCH_SML0CLK 51 Dummy
G8
PCH_SML0DATA 2.2K
G12 E10
53 XDP2
51 Dummy
2.2K
+3.3V_ALW_PCH FFSensor
KBC_SCL1
14 SMB Addr=[3A]
KBC_SDA1 2.2K DE351DL
13

2.2K 2.2K
A5 B6
+3.3V_ALW +3.3V_LAN
LAN_SMBCLK 2.2K 2.2K LOM
A50 2N7002
LAN_SMBDAT A3 SMB Addr=[XX]
B53 2N7002 BCM5761E
A4

C C

EC Dummy
Dummy

MEC5045 2.2K 2.2K


+3.3V_ALW +3.3V_RUN
2.2K 2.2K CLK Gen
A7 2N7002
CKG_SMBCLK 32 SMB Addr=[D2]
B7 2N7002 SLG8SP585VTR
CKG_SMBDAT 31

2.2K 10K
+3.3V_ALW +3.3V_ALW
2.2K
A2
DOCK_SMB_ALERT# 133 Docking SMB Addr=[C4/72/70/48]
B4
DOCK_SMB_CLK 127
A3
DOCK_SMB_DAT 129
2.2K 2.2K
+3.3V_ALW +LCDVDD
B B

2.2K 2.2K LCD Panel


B5 2N7002
LCD_SMBCLK 13 SMB Addr=[58]
A4 2N7002 (eDP Type)
LCD_SMBDAT 12
2.2K
+3.3V_ALW
100 ohm
2.2K Battery
A56
PBAT_SMBCLK 3 SMB Addr=[16]
B59 connector
PBAT_SMBDAT 4
100 ohm
2.2K
+3.3V_ALW
2.2K Charger
B50
CHARGER_SMBCLK 10 SMB Addr=[12]
A47 BQ24745RHDR
CHARGER_SMBDAT 9
2.2K 2.2K
+3.3V_ALW +3.3V_RUN
2.2K 2.2K ADC/DAC
B49 2N7002
AUD_DOCK_SMBCLK 8 SMB Addr=[30]
B48 2N7002 TLV320AIC3004
AUD_DOCK_SMBDAT 9
A 2.2K A

+3.3V_ALW
2.2K
A49
CARD_SMBCLK 20
ExpressCard <Core Design>
B52 connector
CARD_SMBDAT 19 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

SMBus Diagram

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Size Document Number Rev
A2 Fonseca UMA X01
Date: Tuesday, November 03, 2009 Sheet 4 of 82
5 4 3 2 1
5 4 3 2 1

Thermal Block Diagram Audio Block Diagram


D D

AUD_EXT_MIC_L
HP0_PORT_A_L
AUD_EXT_MIC_R
HP0_PORT_A_R
AUD_VREFOUT_B
MIC
VREFOUT_A_OR_F 60
DP1
Q3902
SC2200P50V2KX-2GP MMBT3904-7-F-GP

DN1 CPU HP1_PORT_B_L


AUD_HP_OUT_L
AUD_HP_OUT_R
Hear
HP1_PORT_B_R
Phone 60

DP2/DN4
Q3901
SC2200P50V2KX-2GP MMBT3904-7-F-GP PORT_C_L
C PORT_C_R C
DN2/DP4 SYSTEM
VREFOUT_C

Thermal Q3905 Codec


MMBT3904-7-F-GP
EMC4022 DIMM
92HD81
SPKR_PORT_D_L+ AUD_SPK_L+ AUD_SPK_L+_R

SPKR_PORT_D_L- AUD_SPK_L- AUD_SPK_L-_R

DP3/DN5 SPKR_PORT_D_R- AUD_SPK_R+ AUD_SPK_R+_R


SPEAKER
Q3903 SPKR_PORT_D_R+ AUD_SPK_R- AUD_SPK_R-_R 60
SC2200P50V2KX-2GP MMBT3904-7-F-GP 0R3-0-U-V-GP

DN3/DP5 WLAN

B
PORT_E_L AUD_DOCK_HP_OUT_L_C DOCKING B

TLV320AIC3004
PORT_E_R AUD_DOCK_HP_OUT_R_C
DAI_BCLK#
SCD47U25V3KX-1GP
DAI_LRCK#
DOCK
DAI_DO#
HP
DAI_DI
PORT_F_L AUD_DOCK_MIC_IN_L DOCK
PORT_F_R AUD_DOCK_MIC_IN_R 75 MIC 74
SC1U16V3KX-2GP
THERMTRIP2# CPU_ThermalTrip

0R2J-2-GP
PCH_ThermalTrip
DMIC_CLK/GPIO1 AUD_DMIC_CLK AUD_DMIC_CLK_G_C Digital
DMIC0/GPIO2 AUD_DMIC_IN0 AUD_DMIC_IN0_C
33R2J-2-GP
MIC 50

THERMTRIP3# +3.3V_SUS
A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

AUDIO/THERMAL Diagram

WWW.AliSaler.Com
Size Document Number Rev
A3
Fonseca UMA X01
Date: Thursday, October 29, 2009 Sheet 5 of 82
5 4 3 2 1
5 4 3 2 1

PCH Strapping Processor Strapping


Calpella Schematic Checklist Rev: 1.6 Calpella Schematic Checklist Rev: 1.6
Name Schematics Notes Pin Name Strap Description Configuration (Default value for each bit is Default
SPKR Reboot option at power-up 1 unless specified otherwise) Value
Default Mode: Internal weak Pull-down.
CFG[4] Embedded 1: Disabled - No Physical Display Port attached to 1
D No Reboot Mode with TCO Disabled: Connect to Vcc3_3 with 8.2-kΩ ~ 10-kΩ weak Embedded DisplayPort. D
pull-up resistor. DisplayPort
Presence 0: Enabled - An external Display Port device is
INIT3_3V# Internal pull-up. Leave as "No Connect" connected to the Embedded Display Port.
GNT3#/ Default Mode: Internal pull-up. CFG[3] PCI-Express Static 1: Normal Operation. 1
GPIO55 Low (0) = Top Block Swap Mode Lane Reversal 0: Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
Note: Connect to ground with 4.7-kΩ weak pull-down resistor.
CRB uses a 1 kΩ ; do not stuff resistor CFG[0] PCI-Express 1: Single PCI-Express Graphics 1
Configuration Select 0: Bifurcation enabled
INTVRMEN High (1) = Integrated VRM is enabled
Low (0) = Integrated VRM is disabled
Note: CRB uses a 330-k resistor.
GNT0#, Default (SPI): Leave both GNT0# and GNT1# floating. No pull up required
GNT1#
Boot from PCI: Connect GNT1# to ground with 1-kΩ pull-down resistor.
Leave GNT0# Floating.

Boot from LPC: Connect both GNT0# and GNT1# to ground with 1-kΩ pull-down
resistor.
GNT2#/ Default - Internal pull-up.
GPIO53 Low (0)= Configures DMI for ESI compatible operation (for servers only.
Not for mobile/desktops).
C C
SPI_MOSI Enable Intel Anti-Theft Technology: Connect to Vcc3_3 with 8.2-kΩ weak pull-up
resistor.
Disable Intel Anti-Theft Technology:Left floating, no pull-down required.
NV_ALE Enable Intel Anti-Theft Technology: Connect to +NVRAM_VCCQ with 8.2-kΩ weak
pull-up resistor [CRB has it pulled up with 1-kΩ no-stuff resistor]
Disable Intel Anti-Theft Technology: Leave floating (internal pull-down).
NV_CLE DMI termination voltage. Weak internal pull-up. Do not pull low.

HDA_DOCK_EN# Low (0): Flash Descriptor Security will be overridden.


/GPIO[33] Also, when this signals is sampled on the rising edge of PWROK then
it will also disable Intel ME and its features.
High (1): Security measure defined in the Flash Descriptor will be enabled. PCIE Routing USB Routing
Platform design should provide appropriate pull-up or pull-down USB
depending on the desired settings.
If a jumper option is used to tie this signal to GND as required by
LANE1 WWAN Pair Device
the functional strap, the signal should be pulled low through a weak pull-down 0 USB0 @ MB
in order to avoid asserting HDA_DOCK_EN# inadvertently.
Note: LANE2 WLAN 1 USB1 @ MB
CRB recommends 1-kΩ pull-down for FD Override. 2 USB2 @ IO Board
B B
There is an internal pull-up of 20 kΩ for HDA_DOCK_EN# which is only
enabled at boot/reset for strapping functions.
LANE3 PCMCIA 3 USB3 @ IO Board
4 WLAN
HDA_SDO Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.
LANE4 Express Card 5 Bluetooth
HDA_SYNC Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.
6 Not available for HM55
GPIO15 Low (1) - Intel ME Crypto Transport Layer Security TLS) cipher suite with no
confidentiality.
LANE5 None 7 Not available for HM55
High (1) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with
8 DOCKING PORT1
confidentiality.
Note: LANE6 10M/100M/1G LAN 9 DOCKING PORT2
This is an unmuxed signal.
This signal has a weak internal pull-down of 20KΩ which is enabled when PWROK is 10 Finger Printer
LANE7 Not available for HM55
low. 11 Camera
Sampled at rising edge of RSMRST#.
CRB has a 1K pull-up on this signal to +3.3VA rail. 12 PCCard / SmartCard
LANE8 Not available for HM55
13 WWAN
GPIO8 Weak internal pull-up. Do not pull low. Sampled at rising edge of RSMRST#.
GPIO27 Default = Do not connect (floating). Internal pull-up.
High(1) = Enables the internal VccVRM to have a clean supply for analog rails.
No need to use on-board filter circuit.
A <Core Design> A
Low (0) = Disables the VccVRM.
Need to use on-board filter circuits for analog rails.
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Table of Content

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Size Document Number Rev
A3 Fonseca UMA X01
Date: Thursday, October 29, 2009 Sheet 6 of 82
5 4 3 2 1
5 4 3 2 1

SSID = CLOCK
+3.3V_RUN +3.3V_RUN

+3.3V_RUN +3.3V_RUN_CLKGEN
L702
37 CKG_SMBDAT

2
1
1 2
BLM21PG300SN1-GP RN702
SRN2K2J-1-GP
1

1
C702 C703 C704 C705 C706 C707 C708 C709 Q701
D 4 3 D
SC1U10V2KX-1GP

SC10U10V5ZY-1GP
2

3
4
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
5 2

6 1 CLK_SCLK
37 CKG_SMBCLK
DMN66D0LDW -7-GP
CLK_SDATA

R708
1 DY 2
0R2J-2-GP
CLK_SCLK_HDDFALL 40

R709
1 DY 2
0R2J-2-GP
CLK_SDATA_HDDFALL 40

+1.05V_RUN +1.05V_RUN_CLKGEN_IO
L701
1 2 +3.3V_RUN_CLKGEN +1.05V_RUN_CLKGEN_IO
BLM21PG300SN1-GP
1

C710 C711 C712 C713


SC1U10V2KX-1GP

SC10U10V5ZY-1GP
2

2
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

24

17

29

15

18
1

5
U701
C C

VDD_27

VDD_SRC_IO

VDD_CPU_IO
VDD_CPU

VDD_SRC

VDD_REF

VDD_DOT
X01-43

2 3 CLK_PCH_DREFCLK1# 4 6
23
23
DREFCLK#
DREFCLK 1 4 CLK_PCH_DREFCLK1 3
DOT_96#
DOT_96
SLG8SP585VTR-GP 27MHZ_SS
27MHZ
7
RN701 SRN0J-6-GP
2 3 CLK_IN_DMI# 14 +3.3V_RUN
23 CLKIN_DMI# SRC_2#
23 CLKIN_DMI 1 4 CLK_IN_DMI 13 16 CPU_STOP# 2 1
RN703 SRN0J-6-GP SRC_2 CPU_STOP# CK_PW RGD R704 10KR2J-3-GP R705
CKPWRGD/PD# 25
23 CLK_PCIE_SATA# 2 3 CLK_PCIE_SATA1# 11 30 FSC 1 2 CLK_PCH_14M 23
CLK_PCIE_SATA1 SRC_1/SATA# REF_0/CPU_SEL
23 CLK_PCIE_SATA 1 4 10 SRC_1/SATA
RN704 SRN0J-6-GP 33R2J-2-GP
22 28 CLK_XTAL_IN
CPU_0# XTAL_IN

1
23 27 CLK_XTAL_OUT
CPU_0 XTAL_OUT C714
CLK_CPU_BCLK1# CLK_SDATA
DY SC4D7P50V2CN-1GP
23 CLK_CPU_BCLK# 1 4 19 31

2
CLK_CPU_BCLK1 CPU_1# SDA CLK_SCLK
23 CLK_CPU_BCLK 2 3 20 CPU_1 SCL 32
RN705 SRN0J-6-GP

VSS_SATA
VSS_CPU

VSS_SRC

VSS_DOT
VSS_REF

VSS_27
For EMI

33 GND
26

21

12

9
B B

Main Source: 71.08585.003 (SLG8SP585VTR) +3.3V_RUN_CLKGEN

2nd Source: 71.93197.003 (ICS9LRS3197AKLFT)

2
3rd Source: 71.28748.A03 (SL28748ELCT)
R706
10KR2J-3-GP

1
CK_PW RGD

D
Q702
+1.05V_VTT 2N7002A-7-GP G VR_CLKEN# 47

S
1

R701
DY 4K7R2J-2-GP X701
CLK_XTAL_IN 1 2 CLK_XTAL_OUT
2

X-14D31818M-37GP
A FSC <Core Design> A

C715 C701
1

Wistron Corporation
SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

R707
10KR2J-3-GP FSC 0 1 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2

Taipei Hsien 221, Taiwan, R.O.C.


2

133MHz Title
SPEED 100MHz
(Default) X01.09/0918 Clock Generator - SLG8SP585

WWW.AliSaler.Com
Size Document Number Rev
A3 Fonseca UMA X01
Date: Thursday, October 29, 2009 Sheet 7 of 82
5 4 3 2 1
5 4 3 2 1
SSID = CPU

D CPU1A 1 OF 9 R801
D
B26 PEG_IRCOMP_R 1 2 49D9R2F-GP
PEG_ICOMPI
PEG_ICOMPO A26
22 DMI_PTX_CRXN0 A24 B27 R802
DMI_RX0# PEG_RCOMPO

AUBURNDALE
22 DMI_PTX_CRXN1 C23 A25 EXP_RBIAS 1 2 750R2F-GP
DMI_RX1# PEG_RBIAS
22 DMI_PTX_CRXN2 B22 DMI_RX2#
22 DMI_PTX_CRXN3 A21 DMI_RX3# PEG_RX0# K35
PEG_RX1# J34
22 DMI_PTX_CRXP0 B24 DMI_RX0 PEG_RX2# J33 (1) If PCIe Graphics is not implemented,
22 DMI_PTX_CRXP1 D23 G35
DMI_RX1 PEG_RX3# TX/RX pairs can be left as No Connect.

DMI
22 DMI_PTX_CRXP2 B23 DMI_RX2 PEG_RX4# G32
22 DMI_PTX_CRXP3 A22 DMI_RX3 PEG_RX5# F34 (2) PEG I or R COMP or RBIAS always keep whether PEG used or not.
PEG_RX6# F31
22 DMI_CTX_PRXN0 D24 DMI_TX0# PEG_RX7# D35
22 DMI_CTX_PRXN1 G24 DMI_TX1# PEG_RX8# E33
22 DMI_CTX_PRXN2 F23 DMI_TX2# PEG_RX9# C33
22 DMI_CTX_PRXN3 H23 DMI_TX3# PEG_RX10# D32
PEG_RX11# B32
22 DMI_CTX_PRXP0 D25 DMI_TX0 PEG_RX12# C31
22 DMI_CTX_PRXP1 F24 B28 eDP_AUX#_C 1 2 C802 SCD1U10V2KX-4GP
DMI_TX1 PEG_RX13# eDP_AUX# 54
22 DMI_CTX_PRXP2 E23 DMI_TX2 PEG_RX14# B30
22 DMI_CTX_PRXP3 G23 DMI_TX3 PEG_RX15# A31

PEG_RX0 J35
PEG_RX1 H34
PEG_RX2 H33
22 FDI_TXN0 FDI_TXN0 E22 F35
FDI_TXN1 FDI_TX0# PEG_RX3 +1.05V_VTT
22 FDI_TXN1 D21 FDI_TX1# PEG_RX4 G33
C 22
22
FDI_TXN2
FDI_TXN3
FDI_TXN2
FDI_TXN3
D19
D18
FDI_TX2# PEG_RX5 E34
F32
C
FDI_TX3# PEG_RX6

1
Intel(R) FDI
22 FDI_TXN4 FDI_TXN4 G21 D34
FDI_TXN5 FDI_TX4# PEG_RX7 R803
22 FDI_TXN5 E19 FDI_TX5# PEG_RX8 F33
22 FDI_TXN6 FDI_TXN6 F21 B33 7K5R2F-1-GP
FDI_TXN7 FDI_TX6# PEG_RX9
22 FDI_TXN7 G18 FDI_TX7# PEG_RX10 D31
A32

2
PEG_RX11 eDP_HPD#
PEG_RX12 C30
22 FDI_TXP0 FDI_TXP0 D22 A28 eDP_AUX_C 1 2 C803 SCD1U10V2KX-4GP
FDI_TX0 PEG_RX13 eDP_AUX 54

PCI EXPRESS -- GRAPHICS


22 FDI_TXP1 FDI_TXP1 C21 B29
FDI_TXP2 FDI_TX1 PEG_RX14
22 FDI_TXP2 D20 A30

D
FDI_TXP3 FDI_TX2 PEG_RX15 Q801
22 FDI_TXP3 C18 FDI_TX3
22 FDI_TXP4 FDI_TXP4 G22 L33 2N7002A-7-GP
FDI_TXP5 FDI_TX4 PEG_TX0#
22 FDI_TXP5 E20 FDI_TX5 PEG_TX1# M35
22 FDI_TXP6 FDI_TXP6 F20 M33 G eDP_LCD_HPD eDP_LCD_HPD 54
FDI_TXP7 FDI_TX6 PEG_TX2#
22 FDI_TXP7 G19 FDI_TX7 PEG_TX3# M30

1
PEG_TX4# L31
22 FDI_FSYNC0 F17 K32 R804

S
FDI_FSYNC0 PEG_TX5# 110KR2F-GP
22 FDI_FSYNC1 E17 FDI_FSYNC1 PEG_TX6# M29
PEG_TX7# J31
22 FDI_INT C17 K29

2
FDI_INT PEG_TX8#
PEG_TX9# H30
22 FDI_LSYNC0 F18 FDI_LSYNC0 PEG_TX10# H29
22 FDI_LSYNC1 D17 FDI_LSYNC1 PEG_TX11# F29 R804 close to eDP Panel Connector
PEG_TX12# E28
PEG_TX13# D29
D27 eDP_CTX_LRX_C_N1 1 2 C804 SCD1U10V2KX-4GP eDP_CTX_LRX_N1 eDP_CTX_LRX_N1 54
PEG_TX14# eDP_CTX_LRX_C_N0 C805 SCD1U10V2KX-4GP eDP_CTX_LRX_N0
PEG_TX15# C26 1 2 eDP_CTX_LRX_N0 54
L34
B PEG_TX0
PEG_TX1 M34 B
PEG_TX2 M32
PEG_TX3 L30
PEG_TX4 M31
PEG_TX5 K31
PEG_TX6 M28
PEG_TX7 H31
PEG_TX8 K28
PEG_TX9 G30
PEG_TX10 G29
PEG_TX11 F28
PEG_TX12 E27
PEG_TX13 D28
C27 eDP_CTX_LRX_C_P1 1 2 C801 SCD1U10V2KX-4GP eDP_CTX_LRX_P1 eDP_CTX_LRX_P1 54
PEG_TX14 eDP_CTX_LRX_C_P0 C806 SCD1U10V2KX-4GP eDP_CTX_LRX_P0
PEG_TX15 C25 1 2 eDP_CTX_LRX_P0 54

CAPs close to eDP Panel Connector

A <Core Design>
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU - PCIE/DMI/FDI (1/7)


WWW.AliSaler.Com Size
A3

Date:
Document Number
Fonseca UMA
Thursday, October 29, 2009 Sheet 8 of
Rev

82
X01
5 4 3 2 1
SSID = CPU Processor Compensation Signals

H_COMP3
CPU1B 2 OF 9 X01-43
1 2 AT23 COMP3
+1.05V_VTT R902 20R2F-GP BCLK_CPU_P_R
Processor Pullups H_COMP2 BCLK A16
BCLK_CPU_N_R
BCLK_CPU_P_R 25
1 2 AT24 COMP2 BCLK# B16 BCLK_CPU_N_R 25

AUBURNDALE
R904 20R2F-GP RN903

MISC
CLOCKS
1 2 H_CATERR# 1 2 H_COMP1 G16 AR30 BCLK_ITP_P_R 1 4 BCLK_ITP_P 58
R903 49D9R2F-GP R905 49D9R2F-GP COMP1 BCLK_ITP BCLK_ITP_N_R
BCLK_ITP# AT30 2 3 BCLK_ITP_N 58
1 2 H_PROCHOT# 1 2 H_COMP0 AT26
R906 49D9R2F-GP R907 49D9R2F-GP COMP0 PEG_CLK_R
E16 SRN0J-6-GP PEG_CLK_R 23
H_CPURST# PEG_CLK PEG_CLK#_R
1 DY 2 X01.09/0819 PEG_CLK# D16 PEG_CLK#_R 23 DDR_HVREF_RST_GATE 37
D R908 68R2-GP
37 H_SKTOCC#
H_SKTOCC# AH24 SKTOCC#
A18 DPLL_REF_SSCLK_R
D
DPLL_REF_SSCLK DPLL_REF_SSCLK_R 23 +1.5V_SUS
A17 DPLL_REF_SSCLK#_R DPLL_REF_SSCLK#_R 23

G
H_CATERR# DPLL_REF_SSCLK#
AK14 CATERR#
2 1

THERMAL
+3.3V_RUN +1.05V_VTT R934 1KR2J-1-GP
F6 SM_DRAMRST# S D DDR3_DRAMRST# 18,19
H_PECI SM_DRAMRST# Q902
25 H_PECI AT15 PECI
1

1
AL1 SM_RCOMP_0 2N7002A-7-GP
R912 R913 SM_RCOMP0 SM_RCOMP_1
SM_RCOMP1 AM1 1 DY 20R2J-2-GP X01.09/0917
8K2R2J-3-GP 2K2R2J-2-GP AN1 SM_RCOMP_2 R935
SM_RCOMP2

1
H_PROCHOT# AN26 +1.05V_VTT
47 H_PROCHOT# PROCHOT#
AN15 PM_EXT_TS# R939
2

1.05V_VTT_Q901 PM_EXT_TS0#
PM_EXT_TS1# AP15
R914
2 1
10KR2J-3-GP
DY 100KR2J-1-GP
1

DDR3
MISC
Q901 H_THERMTRIP# AK15

2
25,39 H_THERMTRIP# THERMTRIP#

38 CPU_CATERR# 3 2 H_CATERR#
MMBT3904-7-F-GP AT28 XDP_PRDY#
PRDY# XDP_PRDY# 58
1

AP27 XDP_PREQ#
PREQ# XDP_PREQ# 58
C901 DDR3 Compensation Signals
Place near U3801 SCD1U10V2KX-4GP AN28 XDP_TCLK
XDP_TCLK 58
2

H_CPURST# TCK XDP_TMS SM_RCOMP_0


58 H_CPURST# AP26 RESET_OBS# TMS AP28 XDP_TMS 58 1 2

PWR MANAGEMENT
AT27 XDP_TRST# R909 100R2F-L1-GP-U
TRST# XDP_TRST# 58
SM_RCOMP_1

JTAG & BPM


1 2
AL15 AT29 XDP_TDI_R R910 24D9R2F-L-GP
22 H_PM_SYNC PM_SYNC TDI
AR27 XDP_TDO_R SM_RCOMP_2 1 2
TDO XDP_TDI_M R911 130R2F-1-GP
TDI_M AR29
25,58 H_PW RGD 1 2 VCCPW RGOOD AN14 AP29 XDP_TDO_M
VCCPWRGOOD_1 TDO_M
C R917
0R2J-2-GP AN25 H_DBR#_R 1 2
C
DBR# XDP_DBRESET# 22,38,58
1 2 VCCPW RGOOD_0 AN27 R918 0R2J-2-GP
R919 0R2J-2-GP VCCPWRGOOD_0
AJ22 XDP_OBS0
DRAM_PW ROK BPM0# XDP_OBS1 XDP_OBS0 58
22 DRAM_PW ROK AK13 SM_DRAMPWROK BPM1# AK22 XDP_OBS1 58
AK24 XDP_OBS2
BPM2# XDP_OBS3 XDP_OBS2 58
BPM3# AJ24 XDP_OBS3 58
52 H_VTTPW RGD H_VTTPW RGD AM15 AJ25 XDP_OBS4
VTTPWRGOOD BPM4# XDP_OBS5 XDP_OBS4 58
BPM5# AH22 XDP_OBS5 58
AK23 XDP_OBS6
H_PW RGD_XDP BPM6# XDP_OBS7 XDP_OBS6 58
58 H_PW RGD_XDP AM26 TAPPWRGOOD BPM7# AH23 XDP_OBS7 58 +1.05V_VTT

21,58 PLTRST1# 1 2 PLT_RST#_R AL14 XDP_TMS 1 DY 2


R921 RSTIN# R922 51R2J-2-GP
1

1K5R2F-2-GP XDP_TDI_R 1 DY 2
R924 R923 51R2J-2-GP
750R2F-GP XDP_PREQ#
R925
1 DY 2
51R2J-2-GP
2

XDP_TCLK 1 DY 2
R926 51R2J-2-GP

JTAG MAPPING
B B
XDP_TDI_R 1 2 XDP_TDI
XDP_TDI 58
R929 0R2J-2-GP

XDP_TDO_M 1 DY 2 XDP_TDO
R930 0R2J-2-GP XDP_TDO 58

1
R901
0R2J-2-GP
+3.3V_SUS

X01-4

2
+3.3V_ALW _PCH XDP_TDI_M 1 DY 2
1

R931 0R2J-2-GP
U901 R938
22,35,38,50 SIO_SLP_S3# 1 2 1 0R2J-2-GP DY XDP_TDO_R 1 2
R915 0R2J-2-GP B R932 0R2J-2-GP XDP_TRST#
VCC 5
37,38,58 RUNPW ROK 1 2 RUNPW ROK_C 2
2

1
R920 0R2J-2-GP 4 DRAM_PW ROK_R 1 2 DRAM_PW ROK Scan Chain Stuff --> R929, R901, R932
Y R936 R933
3 GND 1K5R2F-2-GP (Default) No Stuff --> R930, R931 51R2J-2-GP
1

74LVC1G08GW -1-GP Stuff --> R929, R930


R937 CPU Only No Stuff --> R901, R931, R932

2
750R2F-GP
Stuff --> R931, R932
GMCH Only No Stuff --> R929, R930, R901
2

A X01.09/0917
<Core Design>
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU Thermal/Clock/PM (2/7)


WWW.AliSaler.Com Size
A3

Date:
Document Number
Fonseca UMA
Thursday, October 29, 2009 Sheet 9 of
Rev

82
X01
5 4 3 2 1

SSID = CPU CPU1D 4 OF 9

CPU1C 3 OF 9

AUBURNDALE
AUBURNDALE
SB_CK0 W8 M_CLK_DDR2 19
19 M_B_DQ[63..0] SB_CK0# W9 M_CLK_DDR#2 19
AA6 M_CLK_DDR0 18 M_B_DQ0 B5 M3 M_CKE2 19
SA_CK0 M_B_DQ1 SB_DQ0 SB_CKE0
SA_CK0# AA7 M_CLK_DDR#0 18 A5 SB_DQ1
P7 M_CKE0 18 M_B_DQ2 C3
18 M_A_DQ[63..0] SA_CKE0 SB_DQ2
M_A_DQ0 A10 M_B_DQ3 B3 V7 M_CLK_DDR3 19
M_A_DQ1 SA_DQ0 M_B_DQ4 SB_DQ3 SB_CK1
D C10 SA_DQ1 E4 SB_DQ4 SB_CK1# V6 M_CLK_DDR#3 19 D
M_A_DQ2 C7 M_B_DQ5 A6 M2 M_CKE3 19
M_A_DQ3 SA_DQ2 M_B_DQ6 SB_DQ5 SB_CKE1
A7 SA_DQ3 SA_CK1 Y6 M_CLK_DDR1 18 A4 SB_DQ6
M_A_DQ4 B10 Y5 M_CLK_DDR#1 18 M_B_DQ7 C4
M_A_DQ5 SA_DQ4 SA_CK1# M_B_DQ8 SB_DQ7
D10 SA_DQ5 SA_CKE1 P6 M_CKE1 18 D1 SB_DQ8
M_A_DQ6 E10 M_B_DQ9 D2
M_A_DQ7 SA_DQ6 M_B_DQ10 SB_DQ9
A8 SA_DQ7 F2 SB_DQ10 SB_CS0# AB8 M_CS#2 19
M_A_DQ8 D8 M_B_DQ11 F1 AD6 M_CS#3 19
M_A_DQ9 SA_DQ8 M_B_DQ12 SB_DQ11 SB_CS1#
F10 SA_DQ9 SA_CS0# AE2 M_CS#0 18 C2 SB_DQ12
M_A_DQ10 E6 AE8 M_CS#1 18 M_B_DQ13 F5
M_A_DQ11 SA_DQ10 SA_CS1# M_B_DQ14 SB_DQ13
F7 SA_DQ11 F3 SB_DQ14
M_A_DQ12 E9 M_B_DQ15 G4 AC7 M_ODT2 19
M_A_DQ13 SA_DQ12 M_B_DQ16 SB_DQ15 SB_ODT0
B7 SA_DQ13 H6 SB_DQ16 SB_ODT1 AD1 M_ODT3 19
M_A_DQ14 E7 AD8 M_ODT0 18 M_B_DQ17 G2
M_A_DQ15 SA_DQ14 SA_ODT0 M_B_DQ18 SB_DQ17
C6 SA_DQ15 SA_ODT1 AF9 M_ODT1 18 J6 SB_DQ18
M_A_DQ16 H10 M_B_DQ19 J3
M_A_DQ17 SA_DQ16 M_B_DQ20 SB_DQ19
G8 SA_DQ17 G1 SB_DQ20
M_A_DQ18 K7 M_B_DQ21 G5 D4 M_B_DM0
M_A_DQ19 SA_DQ18 M_B_DQ22 SB_DQ21 SB_DM0 M_B_DM1
J8 SA_DQ19 J2 SB_DQ22 SB_DM1 E1
M_A_DQ20 G7 M_B_DQ23 J1 H3 M_B_DM2
M_A_DQ21 SA_DQ20 M_B_DQ24 SB_DQ23 SB_DM2 M_B_DM3
G10 SA_DQ21 J5 SB_DQ24 SB_DM3 K1
M_A_DQ22 J7 B9 M_A_DM0 M_B_DQ25 K2 AH1 M_B_DM4
M_A_DQ23 SA_DQ22 SA_DM0 M_A_DM1 M_B_DQ26 SB_DQ25 SB_DM4 M_B_DM5
J10 SA_DQ23 SA_DM1 D7 L3 SB_DQ26 SB_DM5 AL2
M_A_DQ24 L7 H7 M_A_DM2 M_B_DQ27 M1 AR4 M_B_DM6 M_B_DM[7..0] 19
M_A_DQ25 SA_DQ24 SA_DM2 M_A_DM3 M_B_DQ28 SB_DQ27 SB_DM6 M_B_DM7
M6 SA_DQ25 SA_DM3 M7 K5 SB_DQ28 SB_DM7 AT8
M_A_DQ26 M8 AG6 M_A_DM4 M_A_DM[7..0] 18 M_B_DQ29 K4 M_B_DQS#[7..0] 19
M_A_DQ27 SA_DQ26 SA_DM4 M_A_DM5 M_B_DQ30 SB_DQ29
L9 SA_DQ27 SA_DM5 AM7 M4 SB_DQ30
M_A_DQ28 L6 AN10 M_A_DM6 M_A_DQS#[7..0] 18 M_B_DQ31 N5
M_A_DQ29 SA_DQ28 SA_DM6 M_A_DM7 M_B_DQ32 SB_DQ31
K8 SA_DQ29 SA_DM7 AN13 AF3 SB_DQ32 M_B_DQS[7..0] 19
C M_A_DQ30 N8 M_B_DQ33 AG1 C
M_A_DQ31 SA_DQ30 M_B_DQ34 SB_DQ33 M_B_DQS#0
P9 SA_DQ31 M_A_DQS[7..0] 18 AJ3 SB_DQ34 SB_DQS0# D5 M_B_A[15..0] 19
M_A_DQ32 AH5 M_B_DQ35 AK1 F4 M_B_DQS#1
M_A_DQ33 SA_DQ32 M_B_DQ36 SB_DQ35 SB_DQS1# M_B_DQS#2
AF5 SA_DQ33 M_A_A[15..0] 18 AG4 SB_DQ36 SB_DQS2# J4
M_A_DQ34 AK6 C9 M_A_DQS#0 M_B_DQ37 AG3 L4 M_B_DQS#3
M_A_DQ35 SA_DQ34 SA_DQS0# M_A_DQS#1 M_B_DQ38 SB_DQ37 SB_DQS3# M_B_DQS#4
AK7 SA_DQ35 SA_DQS1# F8 AJ4 SB_DQ38 SB_DQS4# AH2
M_A_DQ36 AF6 J9 M_A_DQS#2 M_B_DQ39 AH4 AL4 M_B_DQS#5
M_A_DQ37 SA_DQ36 SA_DQS2# M_A_DQS#3 M_B_DQ40 SB_DQ39 SB_DQS5# M_B_DQS#6
AG5 SA_DQ37 SA_DQS3# N9 AK3 SB_DQ40 SB_DQS6# AR5
M_A_DQ38 AJ7 AH7 M_A_DQS#4 M_B_DQ41 AK4 AR8 M_B_DQS#7
SA_DQ38 SA_DQS4# SB_DQ41 SB_DQS7#
DDR SYSTEM MEMORY A

M_A_DQ39 AJ6 AK9 M_A_DQS#5 M_B_DQ42 AM6

DDR SYSTEM MEMORY - B


M_A_DQ40 SA_DQ39 SA_DQS5# M_A_DQS#6 M_B_DQ43 SB_DQ42
AJ10 SA_DQ40 SA_DQS6# AP11 AN2 SB_DQ43
M_A_DQ41 AJ9 AT13 M_A_DQS#7 M_B_DQ44 AK5
M_A_DQ42 SA_DQ41 SA_DQS7# M_B_DQ45 SB_DQ44
AL10 SA_DQ42 AK2 SB_DQ45
M_A_DQ43 AK12 M_B_DQ46 AM4
M_A_DQ44 SA_DQ43 M_B_DQ47 SB_DQ46
AK8 SA_DQ44 AM3 SB_DQ47
M_A_DQ45 AL7 M_B_DQ48 AP3 C5 M_B_DQS0
M_A_DQ46 SA_DQ45 M_A_DQS0 M_B_DQ49 SB_DQ48 SB_DQS0 M_B_DQS1
AK11 SA_DQ46 SA_DQS0 C8 AN5 SB_DQ49 SB_DQS1 E3
M_A_DQ47 AL8 F9 M_A_DQS1 M_B_DQ50 AT4 H4 M_B_DQS2
M_A_DQ48 SA_DQ47 SA_DQS1 M_A_DQS2 M_B_DQ51 SB_DQ50 SB_DQS2 M_B_DQS3
AN8 SA_DQ48 SA_DQS2 H9 AN6 SB_DQ51 SB_DQS3 M5
M_A_DQ49 AM10 M9 M_A_DQS3 M_B_DQ52 AN4 AG2 M_B_DQS4
M_A_DQ50 SA_DQ49 SA_DQS3 M_A_DQS4 M_B_DQ53 SB_DQ52 SB_DQS4 M_B_DQS5
AR11 SA_DQ50 SA_DQS4 AH8 AN3 SB_DQ53 SB_DQS5 AL5
M_A_DQ51 AL11 AK10 M_A_DQS5 M_B_DQ54 AT5 AP5 M_B_DQS6
M_A_DQ52 SA_DQ51 SA_DQS5 M_A_DQS6 M_B_DQ55 SB_DQ54 SB_DQS6 M_B_DQS7
AM9 SA_DQ52 SA_DQS6 AN11 AT6 SB_DQ55 SB_DQS7 AR7
M_A_DQ53 AN9 AR13 M_A_DQS7 M_B_DQ56 AN7
M_A_DQ54 SA_DQ53 SA_DQS7 M_B_DQ57 SB_DQ56
AT11 SA_DQ54 AP6 SB_DQ57
M_A_DQ55 AP12 M_B_DQ58 AP8
M_A_DQ56 SA_DQ55 M_B_DQ59 SB_DQ58
AM12 SA_DQ56 AT9 SB_DQ59
M_A_DQ57 AN12 M_B_DQ60 AT7
M_A_DQ58 SA_DQ57 M_A_A0 M_B_DQ61 SB_DQ60
AM13 SA_DQ58 SA_MA0 Y3 AP9 SB_DQ61
B M_A_DQ59 M_A_A1 M_B_DQ62 B
AT14 SA_DQ59 SA_MA1 W1 AR10 SB_DQ62
M_A_DQ60 AT12 AA8 M_A_A2 M_B_DQ63 AT10 U5 M_B_A0
M_A_DQ61 SA_DQ60 SA_MA2 M_A_A3 SB_DQ63 SB_MA0 M_B_A1
AL13 SA_DQ61 SA_MA3 AA3 SB_MA1 V2
M_A_DQ62 AR14 V1 M_A_A4 T5 M_B_A2
M_A_DQ63 SA_DQ62 SA_MA4 M_A_A5 SB_MA2 M_B_A3
AP14 SA_DQ63 SA_MA5 AA9 SB_MA3 V3
V8 M_A_A6 R1 M_B_A4
SA_MA6 M_A_A7 SB_MA4 M_B_A5
SA_MA7 T1 19 M_B_BS0 AB1 SB_BS0 SB_MA5 T8
Y9 M_A_A8 19 M_B_BS1 W5 R2 M_B_A6
SA_MA8 M_A_A9 SB_BS1 SB_MA6 M_B_A7
18 M_A_BS0 AC3 SA_BS0 SA_MA9 U6 19 M_B_BS2 R7 SB_BS2 SB_MA7 R6
18 M_A_BS1 AB2 AD4 M_A_A10 R4 M_B_A8
SA_BS1 SA_MA10 M_A_A11 SB_MA8 M_B_A9
18 M_A_BS2 U7 SA_BS2 SA_MA11 T2 SB_MA9 R5
U3 M_A_A12 19 M_B_CAS# AC5 AB5 M_B_A10
SA_MA12 M_A_A13 SB_CAS# SB_MA10 M_B_A11
SA_MA13 AG8 19 M_B_RAS# Y7 SB_RAS# SB_MA11 P3
T3 M_A_A14 19 M_B_W E# AC6 R3 M_B_A12
SA_MA14 M_A_A15 SB_WE# SB_MA12 M_B_A13
18 M_A_CAS# AE1 SA_CAS# SA_MA15 V9 SB_MA13 AF7
18 M_A_RAS# AB3 P5 M_B_A14
SA_RAS# SB_MA14 M_B_A15
18 M_A_W E# AE9 SA_WE# SB_MA15 N1

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU - DDR (3/7)

WWW.AliSaler.Com
Size Document Number Rev
A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 10 of 82
5 4 3 2 1
5 4 3 2 1

SSID = CPU

D D

CPU Piin AJ13 and AJ12:


Core voltage sense line.
Via from PGA pad to the back of the MB
CPU1E 5 OF 9 and provide test point.
AJ13 H_RSVD32 1
Do not route any additional trace.
TP1118

AUBURNDALE
RSVD#AJ13 H_RSVD33
AJ12 1 TP1117
RSVD#AJ12
AP25
SO-DIMM VREFDQ (M3) Circuit AL25
RSVD#AP25
RSVD#AL25 RSVD#AH25
AH25
AL24 AK26 H_RSVD35 1 TP1119
for Clarksfield Processor AL22
RSVD#AL24
RSVD#AL22
RSVD#AK26
H_RSVD36
AJ33 AL26 1 TP1120
RSVD#AJ33 RSVD#AL26
AG9 AR2
RSVD#AG9 RSVD_NCTF#AR2
M27
RSVD#M27
L28 AJ26
VREF_CH_A_DIMM RSVD#L28 RSVD#AJ26
TP1115 1 J17 AJ27
VREF_CH_B_DIMM SA_DIMM_VREF# RSVD#AJ27
TP1116 1 H17
SB_DIMM_VREF#
G25
RSVD#G25
G17
RSVD#G17
E31
RSVD#E31
E30
RSVD#E30

C AL28 C
CFG0 RSVD#AL28
AM30 AL29
CFG1 CFG0 RSVD#AL29
TP1101 1 AM28 AP30
CFG2 CFG1 RSVD#AP30
TP1102 1 AP31 AP32
CFG3 CFG2 RSVD#AP32
AL32 AL27
CFG4 CFG3 RSVD#AL27
AL30 AT31
CFG5 CFG4 RSVD#AT31
TP1103 1 AM31 AT32
CFG6 CFG5 RSVD#AT32
TP1104 1 AN29 AP33
CFG7 CFG6 RSVD#AP33
AM32 AR33
CFG8 CFG7 RSVD#AR33
TP1105 1 AK32
CFG9 CFG8
TP1106 1 AK31

RESERVED
CFG10 CFG9
TP1107 1 AK28
CFG11 CFG10
TP1108 1 AJ28
CFG12 CFG11
TP1109 1 AN30 AR32
CFG13 CFG12 RSVD#AR32
TP1110 1 AN32
CFG14 CFG13
TP1111 1 AJ32
CFG15 CFG14
TP1112 1 AJ29 E15
CFG16 CFG15 RSVD_TP#E15
TP1113 1 AJ30 F15
CFG0 CFG17 CFG16 RSVD_TP#F15
TP1114 1 AK30 A2
CFG17 KEY
PCI-Express Configuration Select H16
RSVD_TP#H16 RSVD#D15
D15
1

C15
R1102 RSVD#C15
AJ15
RSVD#AJ15
DY 3K01R2F-3-GP 1:Single PEG RSVD#AH15
AH15
CFG0 0:Bifurcation enabled B19
2

(Clarkfiled only) RSVD#B19


A19
RSVD#A19
A20
RSVD#A20
B20
RSVD#B20
AA5
CFG3 RSVD_TP#AA5
U9 AA4
RSVD#U9 RSVD_TP#AA4
CFG3 - PCI-Express Static Lane Reversal T9 R8
1

RSVD#T9 RSVD_TP#R8
AD3
R1105 RSVD_TP#AD3
B AC9 AD2 B
RSVD#AC9 RSVD_TP#AD2
DY 3K01R2F-3-GP 1 :Normal Operation AB9
RSVD#AB9 RSVD_TP#AA2
AA2
CFG3 0 :Lane Numbers Reversed RSVD_TP#AA1
AA1
R9
2

15 -> 0, 14 -> 1, ... RSVD_TP#R9


AG7
RSVD_TP#AG7
AE3
RSVD_TP#AE3

V4
RSVD_TP#V4
V5
CFG4 RSVD_TP#V5
N2
RSVD_TP#N2
CFG4 - Display Port Presence J29
RSVD#J29 RSVD_TP#AD5
AD5 VSS (AP34) can be left NC is
1

J28 AD7
R1109 RSVD#J28 RSVD_TP#AD7
W3 CRB implementation; EDS/DG
3K3R2J-3-GP RSVD_TP#W3
1:Disabled; No Physical Display Port RSVD_TP#W2
W2 recommendation to GND.
CFG4 attached to Embedded Display Port RSVD_TP#N3
N3
AE5
2

0:Enabled; An external Display Port RSVD_TP#AE5


AD9
RSVD_TP#AD9
device is connected to the Embedded
Display Port AP34 RSVD_VSS 1 2
VSS R1117 0R2J-2-GP
X01-47
CFG7
CFG7(Reserved) - Temporarily used for early
1

R1103 Clarksfield samples.


DY 3K01R2F-3-GP
CFG7 Clarksfield (only for early samples pre-ES1) -
Connect to GND with 3.01K Ohm/5% resistor.
2

A A

Note: Only temporary for early CFD sample <Core Design>


(rPGA/BGA) [For details please refer to the
WW33 MoW and sighting report].
For a common M/B design (for AUB and CFD),
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
the pull-down resistor shouble be used. Does Taipei Hsien 221, Taiwan, R.O.C.
not impact AUB functionality.
Title

CPU - Reserve (4/7)

WWW.AliSaler.Com
Size Document Number Rev
Custom X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 11 of 82
5 4 3 2 1
5 4 3 2 1

SSID = CPU CPU1F 6 OF 9

AUBURNDALE
+VCC_CORE X01-37 X01-37 +1.05V_VTT
PROCESSOR CORE POWER
AG35
VCC VTT0
AH14 15ONLY14/15 15ONLY 14/15 14/15 DY
AG34 AH12

1
VCC VTT0 C1202 C1203 C1204 C1205 C1206 C1216 C1207 C1208 C1209
AG33 AH11
+VCC_CORE 48A VCC VTT0

SC22U6D3V5MX-2GP
X01-37 AG32
VCC VTT0
AH10

SC10U10V5KX-3GP

SC10U10V5KX-3GP

SC10U10V5KX-3GP

SC10U10V5KX-3GP

SC10U10V5KX-3GP

SC10U10V5KX-3GP

SC10U10V5KX-3GP

SC10U10V5KX-3GP
AG31 J14

2
VCC VTT0
D AG30 J13 D
VCC VTT0
AG29 H14
C1210 C1211 C1212 C1213 C1214 VCC VTT0
AG28 H12
VCC VTT0
1

1
C1215 AG27 G14
VCC VTT0
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
AG26 G13
VCC VTT0

SC10U10V5KX-2GP
AF35 G12
2

2
VCC VTT0
AF34 G11
VCC VTT0
AF33 F14
VCC VTT0
AF32 F13
VCC VTT0 +1.05V_VTT
AF31 F12
VCC VTT0
AF30 F11
VCC VTT0
X01-37 AF29
VCC VTT0
E14
X01-37 14/15 14ONLY The decoupling capacitors, filter
AF28 E12
VCC VTT0 recommendations and sense resistors on the

1
AF27 D14 C1217 C1218 C1219
VCC VTT0
AF26
VCC VTT0
D13 CPU/PCH Rails are specific to the CRB

1.1V RAIL POWER

SC10U10V5KX-2GP

SC10U10V5KX-2GP

SC10U10V5KX-2GP
C1220 C1221 C1222 C1223 C1224 C1225 AD35 D12

2
VCC VTT0 Implementation. Customers need to follow the
1

1
14ONLY 15ONLY 14ONLY AD34
VCC VTT0
D11
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

AD33
VCC VTT0
C14 recommendations in the Calpella Platform
SC10U10V5KX-2GP

SC10U10V5KX-2GP
AD32 C13
2

AD31
VCC VTT0
C12 Design Guide.
VCC VTT0
AD30 C11
VCC VTT0
AD29 B14
VCC VTT0
AD28 B12
VCC VTT0
AD27 A14
VCC VTT0
X01-37 AD26
AC35
VCC
VCC
VTT0
VTT0
A13
A12
AC34 A11
VCC VTT0
C1226 C1227 C1228 C1229 C1230 C1231 C1232 C1233
AC33
AC32
VCC
VCC
X01-37 +1.05V_VTT
1

14/15 AC31
VCC
SC10U6D3V5MX-3GP

SC10U10V5KX-2GP

SC10U10V5KX-2GP

SC10U6D3V5MX-3GP

SC10U10V5KX-2GP

SC10U10V5KX-2GP

SC10U10V5KX-2GP
DY AC30
VCC VTT0
AF10
SC10U10V5KX-2GP

AC29 AE10
2

VCC VTT0
AC28 AC10
VCC VTT0

1
CPU CORE SUPPLY
C AC27 AB10 C1234 C1235 C
VCC VTT0 SC10U10V5KX-2GP SC22U6D3V5MX-2GP
AC26 Y10
VCC VTT0
AA35 W10

2
VCC VTT0
AA34 U10
VCC VTT0
X01-37 AA33
AA32
VCC
VCC
VTT0
VTT0
T10
J12
AA31 J11
VCC VTT0
AA30 J16
C1236 C1237 C1240 C1241 C1242 VCC VTT0
AA29 J15
1

C1201 C1238 C1239 VCC VTT0


14/15 14ONLY AA28
VCC
SC10U10V5KX-2GP

SC10U10V5KX-2GP

SC10U10V5KX-2GP

SC10U6D3V5MX-3GP

SC10U10V5KX-2GP

DY AA27
VCC
SC10U10V5KX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

AA26
2

VCC
Y35
VCC
Y34
VCC
Y33
VCC
Y32
VCC
Y31
Y30
VCC Please note that
VCC
Y29
Y28
VCC The VTT Rail values are
VCC
C1243 C1244 C1245 C1246
Y27
VCC Arrandale for VTT=1.05V
Y26
1

VCC
V35
VCC PSI#
AN33 PSI# 47 Clarksfield for VTT=1.1V
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

DY DY DY DY V34
VCC
V33 H_VID[6..0] 47
2

VCC H_VID0
V32 AK35
VCC VID0 H_VID1
V31 AK33
VCC VID1 H_VID2
V30 AK34
V29
VCC
VCC
POWER VID2
VID3
AL35 H_VID3

CPU VIDS
V28 AL33 H_VID4
VCC VID4 H_VID5
V27 AM33
VCC VID5 H_VID6
V26 AM35
VCC VID6
U35 AM34 PM_DPRSLPVR 47
VCC PROC_DPRSLPVR
B U34 B
VCC
U33
VCC
U32
VCC H_VTTVID1
U31 G15 1 TP1201
VCC VTT_SELECT
U30
VCC
U29
VCC Arrandale drives this pin High for 1.05V
U28
U27
VCC Clarksfield drives this pin Low for 1.1V
VCC +VCC_CORE
U26
VCC
R35
VCC
R34

1
VCC
R33
R32
VCC
VCC ISENSE
AN35 CPU_IMON_R 1 2 CPU_IMON 39,47 R1202 X01-16
R31 R1205 0R2J-2-GP 100R2F-L1-GP-U
VCC
R30
VCC
R29

2
VCC VCC_SENSE_R
SENSE LINES

R28 AJ34 1 2 VCC_SENSE 47


VCC VCC_SENSE R1203
R27 AJ35 VSS_SENSE_R 1 2 0R2J-2-GP VSS_SENSE 47
VCC VSS_SENSE R1201 0R2J-2-GP
R26
VCC R1206
P35 VSS_SENSE_R 47
VCC

1
P34 B15 VTT_SENSE_R
1 DY 2 0R2J-2-GP VTT_SENSE 52
VCC VTT_SENSE TP_VSS_SENSE_VTT 1 R1207 R1208
P33
VCC VSS_SENSE_VTT
A15 TP1202 Place near PU4701

27D4R2F-L1-GP

27D4R2F-L1-GP
P32
VCC DY DY

1
P31
VCC R1204
P30

2
VCC 100R2F-L1-GP-U
P29
VCC
P28
P27
VCC X01-24

2
VCC
P26
VCC

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU - VCC_CORE (5/7)

WWW.AliSaler.Com
Size Document Number Rev
Custom X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 12 of 82
5 4 3 2 1
5 4 3 2 1

SSID = CPU

+CPU_GFXCORE CPU1G 7 OF 9
15A AT21 VAXG1

AUBURNDALE
AT19 VAXG2 VAXG_SENSE AR22 VCC_AXG_SENSE 53
C1302 C1303 C1304 C1305 C1306 C1307 C1301 C1308

SENSE
LINES
D AT18 VAXG3 VSSAXG_SENSE AT22 VSS_AXG_SENSE 53 D

1
AT16 VAXG4

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
DY DY DY DY AR21 VAXG5
AR19

2
VAXG6
AR18 VAXG7
AR16 AM22 GFX_VID0 GFX_VID0 53
VAXG8 GFX_VID0 GFX_VID1
AP21 VAXG9 GFX_VID1 AP22 GFX_VID1 53

GRAPHICS VIDs
AP19 AN22 GFX_VID2 GFX_VID2 53
VAXG10 GFX_VID2 GFX_VID3
AP18 VAXG11 GFX_VID3 AP23 GFX_VID3 53
AP16 AM23 GFX_VID4 GFX_VID4 53
VAXG12 GFX_VID4 GFX_VID5
AN21 VAXG13 GFX_VID5 AP24 GFX_VID5 53

GRAPHICS
AN19 AN24 GFX_VID6 GFX_VID6 53
VAXG14 GFX_VID6
AN18 VAXG15
AN16 VAXG16
AM21 VAXG17 GFX_VR_EN AR25 GFX_VR_EN 53
AM19 AT25 GFX_DPRSLPVR 1
VAXG18 GFX_DPRSLPVR TP1301
AM18 VAXG19 GFX_IMON AM24 GFX_IMON 53
AM16
AL21
VAXG20
VAXG21
X01-37 +1.5V_RUN
AL19 VAXG22
AL18
AL16
AK21
VAXG23
VAXG24
AJ1
3A
VAXG25 VDDQ
AK19 VAXG26 VDDQ AF1

1
AK18 AE7 C1309 C1310 C1311 C1312 C1313 C1314 C1315 TC1304

- 1.5V RAILS
VAXG27 VDDQ

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC22U6D3V5MX-2GP
AK16 AE4 SE330U2VDM-L-GP

SC10U10V5KX-2GP
VAXG28 VDDQ
AJ21 AC1

2
VAXG29 VDDQ
AJ19 VAXG30 VDDQ AB7
AJ18 VAXG31 VDDQ AB4
C AJ16 Y1 C
VAXG32 VDDQ
AH21 VAXG33 VDDQ W7
AH19 VAXG34 VDDQ W4
AH18 VAXG35 VDDQ U1
AH16 T7
X01-37 VAXG36 VDDQ
VDDQ T4

POWER
VDDQ P1
VDDQ N7
+1.05V_VTT N4
VDDQ

DDR3
VDDQ L1
14/15 J24 VTT1 VDDQ H1

FDI
J23 VTT1
H25 VTT1
1

C1317 +1.05V_VTT
C1316 SC22U6D3V5MX-2GP
SC10U10V5KX-2GP P10
2

VTT1
VTT1 N10

1
L10 C1318 C1319
VTT1 SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP
VTT1 K10

2
+1.05V_VTT
X01-37 +1.05V_VTT

18A

1.1V
14/15 14/15 14/15 VTT1 J22
C1324 C1325
K26 VTT1 VTT1 J20

1
J27 VTT1 VTT1 J18

PEG & DMI


C1320 C1321 C1322 C1323 J26 H21 SC10U10V5KX-2GP SC10U10V5KX-2GP
VTT1 VTT1
1

J25 H20

2
VTT1 VTT1
SC22U6D3V5MX-2GP

H27 H19
B VTT1 VTT1 X01-37 B
SC10U10V5KX-2GP

SC10U10V5KX-2GP

SC10U10V5KX-2GP

G28
2

VTT1
G27 VTT1
G26 +1.8V_RUN
VTT1
F26 VTT1
E26 VTT1 VCCPLL VTT1 L26

1.8V
E25 L27
VTT1 VCCPLL VTT1
1.35A

1
VCCPLL VTT1 M26 C1326 C1327 C1328 C1329 C1330

SC1U25V5KX-1GP

SC1U25V5KX-1GP

SC4D7U6D3V3KX-GP

SC2D2U10V5KX-2GP
SC22U6D3V5MX-2GP

2
Please note that the VTT Rail Values
Arrandale for VTT=1.05V
Clarksfield for VTT=1.1V

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU - GFXCORE (6/7)

WWW.AliSaler.Com
Size Document Number Rev
A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 13 of 82
5 4 3 2 1
5 4 3 2 1

SSID = CPU
CPU1H 8 OF 9
CPU1I 9 OF 9
AT20 VSS VSS AE34
AT17 VSS VSS AE33

AUBURNDALE
AR31 VSS VSS AE32

AUBURNDALE
AR28 VSS VSS AE31 K27 VSS
AR26 VSS VSS AE30 K9 VSS
AR24 VSS VSS AE29 K6 VSS
AR23 VSS VSS AE28 K3 VSS
D AR20 VSS VSS AE27 J32 VSS D
AR17 VSS VSS AE26 J30 VSS
AR15 VSS VSS AE6 J21 VSS
AR12 VSS VSS AD10 J19 VSS
AR9 VSS VSS AC8 H35 VSS
AR6 VSS VSS AC4 H32 VSS
AR3 VSS VSS AC2 H28 VSS
AP20 VSS VSS AB35 H26 VSS
AP17 VSS VSS AB34 H24 VSS
AP13 VSS VSS AB33 H22 VSS
AP10 VSS VSS AB32 H18 VSS
AP7 VSS VSS AB31 H15 VSS
AP4 VSS VSS AB30 H13 VSS
AP2 VSS VSS AB29 H11 VSS
AN34 VSS VSS AB28 H8 VSS
AN31 VSS VSS AB27 H5 VSS
AN23 VSS VSS AB26 H2 VSS
AN20 VSS VSS AB6 G34 VSS AT35 AR35 B35 A35
AN17 VSS VSS AA10 G31 VSS AT34 A34
AM29 VSS VSS Y8 G20 VSS
AM27 VSS VSS Y4 G9 VSS 3X 2X
AM25 VSS VSS Y2 G6 VSS
AM20 VSS VSS W35 G3 VSS
AM17
AM14
VSS VSS W34
W33
F30
F27
VSS NCTF
VSS VSS VSS
AM11 VSS VSS W32 F25 VSS CPU1, Board Top View
AM8 VSS VSS W31 F22 VSS
AM5 VSS VSS W30 F19 VSS
AM2 VSS VSS W29 F16 VSS 4X 1X
C AL34 W28 E35 A3 C
AL31
AL23
VSS
VSS
VSS
VSS VSS
VSS
VSS
W27
W26
E32
E29
VSS
VSS
VSS VSS AT2
AT1 AR1 C1 B1
AL20 VSS VSS W6 E24 VSS
AL17 VSS VSS V10 E21 VSS
AL12 VSS VSS U8 E18 VSS
AL9 VSS VSS U4 E13 VSS
AL6 VSS VSS U2 E11 VSS
AL3 VSS VSS T35 E8 VSS
AK29 VSS VSS T34 E5 VSS
AK27 VSS VSS T33 E2 VSS VSS_NCTF#AR34 AR34
AK25 VSS VSS T32 D33 VSS VSS_NCTF#B34 B34
AK20 T31 D30 B2

AR1,AR35,AT2,AT3,AT33,AT34,B35,C1,C35
VSS VSS VSS VSS_NCTF#B2
AK17 T30 D26

A35,AT1,AT35,B1,A3,A33,A34,AP1,AP35,
VSS VSS VSS
AJ31 VSS VSS T29 D9 VSS
AJ23 T28 D6 B1 TP_MCP_VSS_NCTF11 1
VSS VSS VSS VSS_NCTF#B1 TP1401
AJ20 T27 D3 A35 TP_MCP_VSS_NCTF21 1
VSS VSS VSS VSS_NCTF#A35 TP1404
AJ17 T26 C34 AT1 TP_MCP_VSS_NCTF41 1
VSS VSS VSS VSS_NCTF#AT1 TP1410
AJ14 T6 C32 AT35 TP_MCP_VSS_NCTF31 1
VSS VSS VSS VSS_NCTF#AT35 TP1407
AJ11 VSS VSS R10 C29 VSS RSVD_NCTF#AT33 AT33
AJ8 P8 C28 AT34 TP_MCP_VSS_NCTF33 1
VSS VSS VSS RSVD_NCTF#AT34 TP1409
AJ5 VSS VSS P4 C24 VSS RSVD_NCTF#AP35 AP35
AJ2 P2 C22 AR35 TP_MCP_VSS_NCTF32 1
VSS VSS VSS RSVD_NCTF#AR35 TP1408
AH35 VSS VSS N35 C20 VSS RSVD_NCTF#AT3 AT3
AH34 N34 C19 AR1 TP_MCP_VSS_NCTF43 1
VSS VSS VSS RSVD_NCTF#AR1 TP1412
AH33 VSS VSS N33 C16 VSS RSVD_NCTF#AP1 AP1
AH32 N32 B31 AT2 TP_MCP_VSS_NCTF42 1
VSS VSS VSS RSVD_NCTF#AT2 TP1411
AH31 N31 B25 C1 TP_MCP_VSS_NCTF12 1
VSS VSS VSS RSVD_NCTF#C1 TP1402
AH30 N30 B21 A3 TP_MCP_VSS_NCTF13 1

NCTF TEST PIN:


B VSS VSS VSS RSVD_NCTF#A3 TP1403 B
AH29 VSS VSS N29 B18 VSS RSVD_NCTF#C35 C35
AH28 N28 B17 B35 TP_MCP_VSS_NCTF23 1
VSS VSS VSS RSVD_NCTF#B35 TP1406
AH27 N27 B13 A34 TP_MCP_VSS_NCTF22 1
VSS VSS VSS RSVD_NCTF#A34 TP1405
AH26 VSS VSS N26 B11 VSS RSVD_NCTF#A33 A33
AH20 VSS VSS N6 B8 VSS
AH17 VSS VSS M10 B6 VSS
AH13 VSS VSS L35 B4 VSS All NCTF pins should be Test
AH9 L32 A29
AH6
VSS VSS
L29 A27
VSS Points and should be routed as
VSS VSS VSS
AH3 VSS VSS L8 A23 VSS trace.
AG10 VSS VSS L5 A9 VSS
AF8 VSS VSS L2
AF4 VSS VSS K34
AF2 VSS VSS K33
AE35 VSS VSS K30

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU - VSS (7/7)

WWW.AliSaler.Com
Size Document Number Rev
A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 14 of 82
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blank)

B B

A A
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserve

5 4
WWW.AliSaler.Com
3 2
Size
Custom

Date:
Document Number
Fonseca UMA
Thursday, October 29, 2009 Sheet
1
15 of
Rev

82
X01
5 4 3 2 1

D D

C C

(Blank)

B B

A A
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserve

5 4
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3 2
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Custom

Date:
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Thursday, October 29, 2009 Sheet
1
16 of
Rev

82
X01
5 4 3 2 1

D D

C C

(Blank)

B B

A A
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserve

5 4
WWW.AliSaler.Com
3 2
Size
Custom

Date:
Document Number
Fonseca UMA
Thursday, October 29, 2009 Sheet
1
17 of
Rev

82
X01
5 4 3 2 1

SSID = Memory
M_A_DM[7..0] 10
DM1 SO-DIMMA M_A_DQS#[7..0] 10
M_A_A0 98
H = 9.2mm NP1 +3.3V_RUN
M_A_A1 A0 NP1
97 NP2 M_A_DQS[7..0] 10
M_A_A2 A1 NP2
96
M_A_A3 A2
95 110 M_A_RAS# 10 M_A_A[15..0] 10

1
M_A_A4 A3 RAS#
92 113 M_A_WE# 10
M_A_A5 A4 WE# R1802
91 115 M_A_CAS# 10
A5 CAS#
M_A_A6
M_A_A7
90
A6 DY 10KR2J-3-GP
D 86 114 M_CS#0 10 D
M_A_A8 A7 CS0#
89 121 M_CS#1 10 Note:

2
M_A_A9 A8 CS1#
85
M_A_A10 A9 If SA0 DIM0 = 0, SA1_DIM0 = 0
107 73 M_CKE0 10
M_A_A11 A10/AP CKE0 SA0_DIMM1
84 74 M_CKE1 10 SO-DIMMA SPD Address is 0xA0
M_A_A12 A11 CKE1
83
M_A_A13 A12 SA1_DIMM1 SO-DIMMA TS Address is 0x30
119 101 M_CLK_DDR0 10
M_A_A14 A13 CK0
80 103 M_CLK_DDR#0 10
M_A_A15 A14 CK0#
78
A15

1
10 M_A_BS2 79
A16/BA2 CK1
102 M_CLK_DDR1 10 If SA0 DIM0 = 0, SA1_DIM0 = 1
104 M_CLK_DDR#1 10 R1803 R1801
109
CK1# 0R2J-2-GP 0R2J-2-GP SO-DIMMA SPD Address is 0xA4
10 M_A_BS0 BA0
10 M_A_BS1
108
BA1 DM0
11 M_A_DM0 SO-DIMMA TS Address is 0x34
28 M_A_DM1
10 M_A_DQ[63..0]

2
M_A_DQ0 DM1 M_A_DM2
5 46
M_A_DQ1 DQ0 DM2 M_A_DM3
7 63
M_A_DQ2 DQ1 DM3 M_A_DM4
15 136
M_A_DQ3 DQ2 DM4 M_A_DM5
17 153
M_A_DQ4 DQ3 DM5 M_A_DM6
4 170
M_A_DQ5 DQ4 DM6 M_A_DM7
6 187
M_A_DQ6 DQ5 DM7
16
DQ6 R1804
M_A_DQ7 18 200 SODIMM1_1_SMB_DATA_R 1 2 0R2J-2-GP PCH_SMBDATA_MEM 19,23,40,58
M_A_DQ8 DQ7 SDA SODIMM1_1_SMB_CLK_R R1805
21 202 1 2 0R2J-2-GP PCH_SMBCLK_MEM 19,23,40,58
M_A_DQ9 DQ8 SCL
23
M_A_DQ10 DQ9 +3.3V_RUN
33 198
M_A_DQ11 DQ10 EVENT#
35
M_A_DQ12 DQ11
22 199
M_A_DQ13 DQ12 VDDSPD
24
DQ13

1
M_A_DQ14 34 197 SA0_DIMM1 C1802 C1803
M_A_DQ15 DQ14 SA0 SA1_DIMM1
36 201
DQ15 SA1

SC2D2U16V3KX-GP
SCD1U10V2KX-5GP
M_A_DQ16 39

2
M_A_DQ17 DQ16
41 77
M_A_DQ18 DQ17 NC#1
51 122
M_A_DQ19 DQ18 NC#2 +1.5V_SUS
C 53 125 C
M_A_DQ20 DQ19 NC#/TEST
40
M_A_DQ21 DQ20
42 75
M_A_DQ22 DQ21 VDD1
50 76
M_A_DQ23 DQ22 VDD2
52 81
M_A_DQ24 DQ23 VDD3
M_A_DQ25
57
DQ24 VDD4
82 SODIMM A DECOUPLING
59 87
M_A_DQ26 DQ25 VDD5 +1.5V_SUS
M_A_DQ27
67
69
DQ26
DQ27
VDD6
VDD7
88
93 X01-37
M_A_DQ28 56 94
M_A_DQ29 DQ28 VDD8
58 99
M_A_DQ30 DQ29 VDD9
68 100
M_A_DQ31 DQ30 VDD10
70 105
M_A_DQ32 DQ31 VDD11 TC1801 C1804 C1805 C1806 C1807 C1808 C1801 C1809 C1810
129 106

1
DQ32 VDD12

SE330U2D5VDM-2GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
M_A_DQ33 131 111
M_A_DQ34 DQ33 VDD13
M_A_DQ35
141
DQ34 VDD14
112 14/15 14/15 DY DY
143 117

2
M_A_DQ36 DQ35 VDD15
130 118
+V_DDR_MCH_REF M_A_DQ37 DQ36 VDD16
132 123
M_A_DQ38 DQ37 VDD17
140 124
M_VREF_CA_DIMM1 M_A_DQ39 DQ38 VDD18
1 2 142
R1807 M_A_DQ40 DQ39
147 2
1

0R3J-0-U-GP M_A_DQ41 DQ40 VSS


149 3
C1811 C1812 M_A_DQ42 DQ41 VSS
SCD1U10V2KX-5GP SC2D2U16V3KX-GP M_A_DQ43
157
159
DQ42 VSS
8
9 X01-37
2

M_A_DQ44 DQ43 VSS C1817 C1818 C1819


146 13
DQ44 VSS

1
SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP
M_A_DQ45 148 14 Layout Note: C1813
14ONLY C1814 C1815 C1816
M_A_DQ46 DQ45 VSS
M_A_DQ47
158
DQ46 VSS
19
Place these Caps near 15ONLY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
160 20

2
M_A_DQ48 DQ47 VSS
163 25 SO-DIMMA.
M_A_DQ49 DQ48 VSS
165 26
M_A_DQ50 DQ49 VSS
+V_DDR_MCH_REF M_A_DQ51
175
177
DQ50
DQ51
VSS
VSS
31
32 X01-37
B M_A_DQ52 164 37 B
M_VREF_DQ_DIMM1 M_A_DQ53 DQ52 VSS
1 2 166 38
R1808 M_A_DQ54 DQ53 VSS
174 43
DQ54 VSS
1

0R3J-0-U-GP M_A_DQ55 176 44


C1820 C1821 M_A_DQ56 DQ55 VSS
181 48
SCD1U10V2KX-5GP SC2D2U16V3KX-GP M_A_DQ57 DQ56 VSS
183 49
2

M_A_DQ58 DQ57 VSS


191 54
M_A_DQ59 DQ58 VSS
193 55
M_A_DQ60 DQ59 VSS
180 60
M_A_DQ61 DQ60 VSS
182 61
M_A_DQ62 DQ61 VSS
192 65
M_A_DQ63 DQ62 VSS
Place between DM1 and DM2. 194
DQ63 VSS
66
+1.5V_SUS +1.5V_RUN
71
+0.75V_DDR_VTT M_A_DQS#0 VSS
10 72
M_A_DQS#1 DQS0# VSS
27 127
M_A_DQS#2 DQS1# VSS
45 128 1 2
M_A_DQS#3 DQS2# VSS C1827 SCD1U16V2ZY-2GP
62
DQS3# VSS
133 Near Memory Near CPU
1

+0.75V_DDR_VTT C1822 M_A_DQS#4 135 134 1 2


SC10U10V5KX-2GP M_A_DQS#5 152
DQS4# VSS
138
+1.5V_SUS C1828 SCD1U16V2ZY-2GP +1.5V_RUN
M_A_DQS#6 DQS5# VSS Plane Plane
169 139 1 2
2

DQS6# VSS
1

M_A_DQS#7 186 144 C1829 SCD1U16V2ZY-2GP


R1809 DQS7# VSS
145 1 2
0R3J-0-U-GP M_A_DQS0 VSS C1830 SCD1U16V2ZY-2GP
12 150
M_A_DQS1 DQS0 VSS
29 151
M_A_DQS2 DQS1 VSS
47 155
2

M_A_DQS3 DQS2 VSS


64 156
M_A_DQS4 DQS3 VSS
137 161
M_A_DQS5 DQS4 VSS
154 162
MA_VTT M_A_DQS6 DQS5 VSS
171 167
M_A_DQS7 DQS6 VSS
188 168
DQS7 VSS
172
VSS
10 M_ODT0
116 173
ODT0 VSS
10 M_ODT1 120 178
ODT1 VSS
A Place these caps 179 A
1

C1823 C1824 C1825 C1826 M_VREF_CA_DIMM1 VSS


126 184
close to VTT1 and M_VREF_DQ_DIMM1 VREF_CA VSS
1 185 <Core Design>
VREF_DQ VSS
SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

VTT2. 189
2

VSS
9,19 DDR3_DRAMRST# 30 190
RESET# VSS
VSS
VSS
195
196 Wistron Corporation
MA_VTT 203 205 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VTT1 VSS Taipei Hsien 221, Taiwan, R.O.C.
204 206
VTT2 VSS
Reverse Type Title
DDR3-204P-42-GP
DDR III Socket - DM1

WWW.AliSaler.Com
Size Document Number Rev
62.10017.N61 Custom
Fonseca UMA X01
Date: Thursday, October 29, 2009 Sheet 18 of 82
5 4 3 2 1
5 4 3 2 1

SSID = Memory DM2 SO-DIMMB


M_B_A0 98
H = 5.2mm NP1 M_B_DM[7..0] 10
M_B_A1 A0 NP1 +3.3V_RUN
97 NP2
M_B_A2 A1 NP2
96 M_B_DQS#[7..0] 10
M_B_A3 A2
95 110 M_B_RAS# 10
M_B_A4 A3 RAS#
92 113 M_B_WE# 10
A4 WE#

1
M_B_A5 91 115 M_B_CAS# 10 M_B_DQS[7..0] 10
M_B_A6 A5 CAS# R1902
90
M_B_A7 A6 10KR2J-3-GP
86 114 M_CS#2 10 M_B_A[15..0] 10
M_B_A8 A7 CS0#
89 121 M_CS#3 10
M_B_A9 A8 CS1#
85

2
M_B_A10 A9
107 73 M_CKE2 10
M_B_A11 A10/AP CKE0
84 74 M_CKE3 10
M_B_A12 A11 CKE1 SA1_DIMM2
D 83 D
M_B_A13 A12
119 101 M_CLK_DDR2 10
M_B_A14 A13 CK0 SA0_DIMM2
80 103 M_CLK_DDR#2 10
M_B_A15 A14 CK0#
78
A15
10 M_B_BS2 79 102 M_CLK_DDR3 10

1
A16/BA2 CK1
104 M_CLK_DDR#3 10
CK1# R1903 R1904
10 M_B_BS0 109
BA0 0R2J-2-GP
10 M_B_BS1
108
BA1 DM0
11 M_B_DM0
M_B_DM1
DY 0R2J-2-GP
10 M_B_DQ[63..0] 28
M_B_DQ0 DM1 M_B_DM2
5 46

2
M_B_DQ1 DQ0 DM2 M_B_DM3
7 63
M_B_DQ2 DQ1 DM3 M_B_DM4
15 136
M_B_DQ3 DQ2 DM4 M_B_DM5
17 153
M_B_DQ4 DQ3 DM5 M_B_DM6
4 170
M_B_DQ5 DQ4 DM6 M_B_DM7
6 187
M_B_DQ6 DQ5 DM7
16
DQ6 R1905
M_B_DQ7 18 200 SODIMM2_1_SMB_DATA_R 1 2 0R2J-2-GP PCH_SMBDATA_MEM 18,23,40,58
M_B_DQ8 DQ7 SDA SODIMM2_1_SMB_CLK_R R1906
21 202 1 2 0R2J-2-GP PCH_SMBCLK_MEM 18,23,40,58
M_B_DQ9 DQ8 SCL
23
M_B_DQ10 DQ9 +3.3V_RUN
33 198
M_B_DQ11 DQ10 EVENT#
35
M_B_DQ12 DQ11
22 199
M_B_DQ13 DQ12 VDDSPD
24
DQ13

1
M_B_DQ14 34 197 SA0_DIMM2 C1902 C1903
M_B_DQ15 DQ14 SA0 SA1_DIMM2
36 201
DQ15 SA1

SC2D2U16V3KX-GP
SCD1U10V2KX-5GP
M_B_DQ16 39

2
M_B_DQ17 DQ16
41 77
M_B_DQ18 DQ17 NC#1
51 122
M_B_DQ19 DQ18 NC#2 +1.5V_SUS
53 125
M_B_DQ20 DQ19 NC#/TEST
40
M_B_DQ21 DQ20
42 75
M_B_DQ22 DQ21 VDD1
50 76
M_B_DQ23 DQ22 VDD2
52 81
M_B_DQ24 DQ23 VDD3
C 57 82 C
M_B_DQ25 DQ24 VDD4
59 87
M_B_DQ26 DQ25 VDD5
67 88
M_B_DQ27 DQ26 VDD6
69 93
M_B_DQ28 DQ27 VDD7
56 94
M_B_DQ29 DQ28 VDD8
58 99
M_B_DQ30 DQ29 VDD9
68 100
M_B_DQ31 DQ30 VDD10
70 105
M_B_DQ32 DQ31 VDD11
129 106
M_B_DQ33 DQ32 VDD12
131 111
M_B_DQ34 DQ33 VDD13
141 112
M_B_DQ35 DQ34 VDD14
143 117
M_B_DQ36 DQ35 VDD15
130 118
M_B_DQ37 DQ36 VDD16
132 123
M_B_DQ38 DQ37 VDD17
140 124
M_B_DQ39 DQ38 VDD18
142
M_B_DQ40 DQ39
147 2
M_B_DQ41 DQ40 VSS
M_B_DQ42
149
DQ41 VSS
3 SODIMM B DECOUPLING
157 8
M_B_DQ43 DQ42 VSS
159 9
+V_DDR_MCH_REF M_B_DQ44 DQ43 VSS +1.5V_SUS
146 13
M_B_DQ45 DQ44 VSS
148 14
M_VREF_CA_DIMM2 M_B_DQ46 DQ45 VSS
1 2 158 19
R1907 M_B_DQ47 DQ46 VSS
160 20
1

0R3J-0-U-GP M_B_DQ48 DQ47 VSS


163 25
C1904 C1905 M_B_DQ49 DQ48 VSS C1906 C1901 C1907 C1908 C1909 C1910 C1911 C1912
165 26
DQ49 VSS

1
SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
SCD1U10V2KX-5GP SC2D2U16V3KX-GP M_B_DQ50 175 31
2

M_B_DQ51 DQ50 VSS


M_B_DQ52
177
DQ51 VSS
32 DY DY
164 37

2
M_B_DQ53 DQ52 VSS
166 38
M_B_DQ54 DQ53 VSS
174 43
M_B_DQ55 DQ54 VSS
176 44
M_B_DQ56 DQ55 VSS
181 48
M_B_DQ57 DQ56 VSS
B 183 49 B
+V_DDR_MCH_REF M_B_DQ58 DQ57 VSS
191 54
M_B_DQ59 DQ58 VSS
193 55
M_VREF_DQ_DIMM2 M_B_DQ60 DQ59 VSS
1 2 180 60
R1908 M_B_DQ61 DQ60 VSS C1919 C1920 C1921
182 61
DQ61 VSS
1

1
SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP
0R3J-0-U-GP M_B_DQ62 192 65 Layout Note: C1915 C1916 C1917 C1918
C1913 C1914 M_B_DQ63 DQ62 VSS
194 66

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
SCD1U10V2KX-5GP SC2D2U16V3KX-GP DQ63 VSS Place these Caps near
71
2

2
M_B_DQS#0 VSS
10 72 SO-DIMMB.
M_B_DQS#1 DQS0# VSS
27 127
M_B_DQS#2 DQS1# VSS
M_B_DQS#3
45
62
DQS2#
DQS3#
VSS
VSS
128
133 X01-37
M_B_DQS#4 135 134
M_B_DQS#5 DQS4# VSS
152 138
M_B_DQS#6 DQS5# VSS
169 139
M_B_DQS#7 DQS6# VSS
186 144
DQS7# VSS
145
M_B_DQS0 VSS
12 150
M_B_DQS1 DQS0 VSS
29 151
M_B_DQS2 DQS1 VSS
47 155
M_B_DQS3 DQS2 VSS
64 156
M_B_DQS4 DQS3 VSS
137 161
M_B_DQS5 DQS4 VSS
154 162
M_B_DQS6 DQS5 VSS
171 167
M_B_DQS7 DQS6 VSS
188 168
DQS7 VSS
172
+0.75V_DDR_VTT VSS
10 M_ODT2
116 173
ODT0 VSS
10 M_ODT3 120 178
ODT1 VSS
179
1

M_VREF_CA_DIMM2 VSS
126 184
R1909 M_VREF_DQ_DIMM2 VREF_CA VSS
1 185
0R3J-0-U-GP VREF_DQ VSS
189
VSS
9,18 DDR3_DRAMRST# 30 190
RESET# VSS
A 195 A
2

VSS
MB_VTT VSS
196 Note:
203 205 <Core Design>
VTT1 VSS SO-DIMMB SPD Address is 0xA4
204 206
VTT2 VSS
Reverse Type SO-DIMMB TS Address is 0x34
DDR3-204P-48-GP Wistron Corporation
1

C1922 C1923 C1924 C1925 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Place these caps Taipei Hsien 221, Taiwan, R.O.C.
close to VTT1 and 62.10017.P41 SO-DIMMB is placed farther from
SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP
2

VTT2. the Processor than SO-DIMMA Title

DDR III Socket - DM2

WWW.AliSaler.Com
Size Document Number Rev
Custom X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 19 of 82
5 4 3 2 1
5 4 3 2 1

SSID = PCH

PCH1D 4 OF 10
38,54 PANEL_BKEN_PCH T48 L_BKLTEN SDVO_TVCLKINN BJ46
38,54 ENVDD_PCH T47 L_VDD_EN SDVO_TVCLKINP BG46
D D
54 LBKLT_CTL_PCH Y48 L_BKLTCTL SDVO_STALLN BJ48 No Connect if register is configured to disable DisplayPort*

1
SDVO_STALLP BG48
R2001 1 LDDC_CLK_PCH AB48
TP2002 L_DDC_CLK
100KR2J-1-GP 1 LDDC_DATA_PCH Y45 BF45
TP2003 L_DDC_DATA SDVO_INTN
SDVO_INTP BH45
LCTLA_CLK AB46

2
LCTLB_DATA L_CTRL_CLK
V48 L_CTRL_DATA
1 LVDS_IBG AP39 T51 DVI_B_DDC_CLK DVI_B_DDC_CLK 74
TP2004 LVD_IBG SDVO_CTRLCLK
1 LVDS_VBG AP41 T53 DVI_B_DDC_DATA DVI_B_DDC_DATA 74
TP2001 LVD_VBG SDVO_CTRLDATA
LVD_VREF AT43 LVD_VREFH DPB_DOCK_AUX#
TP2005 1 AT42 LVD_VREFL DDPB_AUXN BG44 DPB_DOCK_AUX# 74
BJ44 DPB_DOCK_AUX DPB_DOCK_AUX 74
DDPB_AUXP DPB_DOCK_HPD_PCH
DDPB_HPD AU38

LVDS
AV53 LVDSA_CLK#
AV51 BD42 DPB_LANE_0N 1 2 C2002 SCD1U10V2KX-4GP DPB_LANE_0N_C 74
LVDSA_CLK DDPB_0N DPB_LANE_0P C2003 SCD1U10V2KX-4GP
DDPB_0P BC42 1 2 DPB_LANE_0P_C 74
BB47 BJ42 DPB_LANE_1N 1 2 C2004 SCD1U10V2KX-4GP DPB_LANE_1N_C 74
+3.3V_RUN LVDSA_DATA#0 DDPB_1N DPB_LANE_1P C2005 SCD1U10V2KX-4GP
BA52 BG42 1 2 DPB_LANE_1P_C 74

Digital Display Interface


LVDSA_DATA#1 DDPB_1P DPB_LANE_2N C2006 SCD1U10V2KX-4GP
AY48 LVDSA_DATA#2 DDPB_2N BB40 1 2 DPB_LANE_2N_C 74
AV47 BA40 DPB_LANE_2P 1 2 C2007 SCD1U10V2KX-4GP DPB_LANE_2P_C 74
RN2002 LVDSA_DATA#3 DDPB_2P DPB_LANE_3N C2008 SCD1U10V2KX-4GP
DDPB_3N AW38 1 2 DPB_LANE_3N_C 74
1 4 LCTLB_DATA BB48 BA38 DPB_LANE_3P 1 2 C2009 SCD1U10V2KX-4GP DPB_LANE_3P_C 74
LCTLA_CLK LVDSA_DATA0 DDPB_3P
2 3 BA50 LVDSA_DATA1
AY49 LVDSA_DATA2
SRN10KJ-5-GP AV48 Y49 DVI_C_DDC_CLK DVI_C_DDC_CLK 74
LVDSA_DATA3 DDPC_CTRLCLK DVI_C_DDC_DATA
DDPC_CTRLDATA AB49 DVI_C_DDC_DATA 74
C RN2001 C
1 4 DDC1_DATA AP48
DDC1_CLK LVDSB_CLK# DPC_DOCK_AUX#
2 3 AP47 LVDSB_CLK DDPC_AUXN BE44 DPC_DOCK_AUX# 74
BD44 DPC_DOCK_AUX DPC_DOCK_AUX 74
SRN2K2J-1-GP DDPC_AUXP DPC_DOCK_HPD_PCH
AY53 LVDSB_DATA#0 DDPC_HPD AV40
AT49 LVDSB_DATA#1
AU52 BE40 DPC_LANE_0N 1 2 C2010 SCD1U10V2KX-4GP DPC_LANE_0N_C 74
LVDSB_DATA#2 DDPC_0N DPC_LANE_0P C2011 SCD1U10V2KX-4GP
AT53 LVDSB_DATA#3 DDPC_0P BD40 1 2 DPC_LANE_0P_C 74
BF41 DPC_LANE_1N 1 2 C2001 SCD1U10V2KX-4GP DPC_LANE_1N_C 74
DDPC_1N DPC_LANE_1P C2012 SCD1U10V2KX-4GP
AY51 LVDSB_DATA0 DDPC_1P BH41 1 2 DPC_LANE_1P_C 74
AT48 BD38 DPC_LANE_2N 1 2 C2013 SCD1U10V2KX-4GP DPC_LANE_2N_C 74
LVDSB_DATA1 DDPC_2N DPC_LANE_2P C2014 SCD1U10V2KX-4GP
AU50 LVDSB_DATA2 DDPC_2P BC38 1 2 DPC_LANE_2P_C 74
AT51 BB36 DPC_LANE_3N 1 2 C2015 SCD1U10V2KX-4GP DPC_LANE_3N_C 74
LVDSB_DATA3 DDPC_3N DPC_LANE_3P C2016 SCD1U10V2KX-4GP
DDPC_3P BA36 1 2 DPC_LANE_3P_C 74

Cap. place near docking connector


75 M_BLUE AA52 CRT_BLUE DDPD_CTRLCLK U50
75 M_GREEN AB53 CRT_GREEN DDPD_CTRLDATA U52
75 M_RED AD53 CRT_RED
BC46 +5V_RUN
DDPD_AUXN
1

R2002 R2003 R2004 75 DDC1_CLK V51 BD46


CRT_DDC_CLK DDPD_AUXP
75 DDC1_DATA V53 CRT_DDC_DATA DDPD_HPD AT38
150R2F-1-GP

150R2F-1-GP

150R2F-1-GP

BJ40 Q2001

G
DDPD_0N
75 PCH_HSYNC Y53 BG40 2N7002A-7-GP
2

CRT_HSYNC DDPD_0P
75 PCH_VSYNC Y51 CRT_VSYNC DDPD_1N BJ38
DDPD_1P BG38

CRT
BF37 DPB_DOCK_HPD_PCH S D DPB_DOCK_HPD 74
B CRT_IREF DDPD_2N B
AD48 DAC_IREF DDPD_2P BH37

1
Place near PCH AB51 CRT_IRTN DDPD_3N BE36
BD36 R2006
DDPD_3P
1

R2005 110KR2F-GP
0.5% IBEXPEAK-M-GP-NF
1KR2D-1-GP

2
1K ohm
X01-15
2

+5V_RUN

Q2002

G
2N7002A-7-GP

DPC_DOCK_HPD_PCH S D DPC_DOCK_HPD 74

1
R2007
110KR2F-GP

2
<Core Design>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH - LVDS/CRT/DDI (1/9)


Size Document Number Rev

WWW.AliSaler.Com
A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 20 of 82

5 4 3 2 1
5 4 3 2 1

SSID = PCH +3.3V_ALW _PCH H40


PCH1E
AD0
5 OF 10
NV_CE#0 AY9
N34 BD1 +V_NVRAM_VCCQ
AD1 NV_CE#1
C44 AD2 NV_CE#2 AP15
A38 AD3 NV_CE#3 BD8 DMI Termination Voltage

1
Consider layout routing

14
C36 AD4
RN2102 +3.3V_RUN U2101A R2104 J34 AD5 NV_DQS0 AV9 NV_CLE Set to Vss when low. R2103
INT_PIRQB# 1 10 1 33R2J-2-GP A40 BG8 Set to Vcc when high. DY 1KR2J-1-GP
PCI_PLOCK# INT_PIRQC# AD6 NV_DQS1
2 9 3 2 1 PLTRST1# 9,58 D45 AD7
PCI_SERR# 3 8 PCI_IRDY# 2 E36 AP7

2
PCI_TRDY# INT_PIRQD# AD8 NV_DQ0/NV_IO0
4 7 H48 AD9 NV_DQ1/NV_IO1 AP6
+3.3V_RUN 5 6 PCI_FRAME# TSLVC08APW -1-GP E40 AT6 NV_CLE

7
AD10 NV_DQ2/NV_IO2
D C40 AD11 NV_DQ3/NV_IO3 AT9 D
SRN8K2J-2-GP-U M48 BB1
AD12 NV_DQ4/NV_IO4
M45 AD13 NV_DQ5/NV_IO5 AV6
F53 AD14 NV_DQ6/NV_IO6 BB3
M40 AD15 NV_DQ7/NV_IO7 BA4
RN2101

NVRAM
14
+3.3V_RUN M43 AD16 NV_DQ8/NV_IO8 BE4
PCI_PERR# 1 10 U2101B R2102 J36 BB6 +V_NVRAM_VCCQ
PCI_REQ1# PCI_REQ0# 33R2J-2-GP AD17 NV_DQ9/NV_IO9
2 9 4 K48 AD18 NV_DQ10/NV_IO10 BD6
PCI_STOP# 3 8 PCH_PIRQF# 6 2 1 PLTRST2# 58,72 F40 BB7
AD19 NV_DQ11/NV_IO11

1
4 7 PCI_DEVSEL# 5 C42 AD20 NV_DQ12/NV_IO12 BC8 Danbury Technology:
+3.3V_RUN 5 6 INT_PIRQA# K46 BJ8 Disabled when Low. R2105
TSLVC08APW -1-GP AD21 NV_DQ13/NV_IO13
M51 BJ6 Enable when High. DY 1KR2J-1-GP

7
SRN8K2J-2-GP-U AD22 NV_DQ14/NV_IO14
J52 AD23 NV_DQ15/NV_IO15 BG6
K51

2
AD24 NV_ALE
L34 AD25 NV_ALE BD3
F42 AY6 NV_CLE NV_ALE
+3.3V_RUN AD26 NV_CLE
J40 AD27

14
G46 AD28
U2101C R2107 F44 AD29 NV_RCOMP AU2 USB
9 33R2J-2-GP M47 AD30

PCI
8 2 1 PLTRST3# 37,38,70,76 H36 AD31 NV_RB# AV7 Pair Device
RN2103 PCI_PLTRST# 10
2 3 LVDS_CBL_DET# J50 C/BE0# NV_WR#0_RE# AY8 0 USB0 @ MB (Charger)
1 4 PCIE_MCARD2_DET# TSLVC08APW -1-GP G42 AY5

7
C/BE1# NV_WR#1_RE#
H47 C/BE2# 1 USB1 @ MB
SRN8K2J-3-GP G34 AV11
C/BE3# NV_WE#_CK0
NV_WE#_CK1 BF5 2 USB2 @ IO Board
INT_PIRQA#

14
G38 PIRQA#
1 2 BT_DET# U2101D R2109 INT_PIRQB# H51 PIRQB# 3 USB3 @ IO Board
C R2108 100KR2J-1-GP 12 33R2J-2-GP INT_PIRQC# B37 H18 USBP0- 63
C
PIRQC# USBP0N
11 2 1 PLTRST4# 32,34,35,64 INT_PIRQD# A44 PIRQD# USBP0P J18 USBP0+ 63 4 WLAN
13 USBP1N A18 USBP1- 63
PCI_REQ0# F51 REQ0# USBP1P C18 USBP1+ 63 5 Bluetooth
1 2 CAM_MIC_CBL_DET# 7 TSLVC08APW -1-GP PCI_REQ1# A46 N20 USBP2- 76
REQ1#/GPIO50 USBP2N
R2124 100KR2J-1-GP
76 PCIE_MCARD2_DET#
PCIE_MCARD2_DET# B45 REQ2#/GPIO52 USBP2P P20 USBP2+ 76 6 Not available for HM55
BT_DET# M53 J20 USBP3- 76
73 BT_DET# REQ3#/GPIO54 USBP3N
USBP3P L20 USBP3+ 76 7 Not available for HM55
PCI_GNT0# F48 F20 USBP4- 64
GNT0# USBP4N
1 2 FFS_PCH_INT PCI_GNT1# K45 GNT1#/GPIO51 USBP4P G20 USBP4+ 64 8 DOCK1
R2123 8K2R2J-3-GP TP2102 1 PCI_GNT2# F36 A20 USBP5- 73
GNT2#/GPIO53 USBP5N
PCI_GNT3# H53 GNT3#/GPIO55 USBP5P C20 USBP5+ 73 9 DOCK2
M22 USBP6- 1
USBP6N TP2110
54 LVDS_CBL_DET#
LVDS_CBL_DET# B41 PIRQE#/GPIO2 USBP6P N22 USBP6+ 1 TP2109 10 Finger Printer
PCH_PIRQF# K53 B21 USBP7- 1
PIRQF#/GPIO3 USBP7N TP2101
73 CAM_MIC_CBL_DET#
CAM_MIC_CBL_DET# A36 PIRQG#/GPIO4 USBP7P D21 USBP7+ 1 TP2103 11 Camera
1 2 FFS_PCH_INT A48 H22 USBP8- 74
37,40 FFS_INT1 PIRQH#/GPIO5 USBP8N
R2110
USBP8P J22 USBP8+ 74 12 PCCard / SmartCard

USB
0R2J-2-GP 1 PCIRST# K6 E22 USBP9- 74
TP2104 PCIRST# USBP9N
USBP9P F22 USBP9+ 74 13 WWAN
PCI_SERR# E44 A22 USBP10- 78
PCI_PERR# SERR# USBP10N
E50 PERR# USBP10P C22 USBP10+ 78
USBP11N G24 USBP11- 73
USBP11P H24 USBP11+ 73
PCI_IRDY# A42 L24 USBP12- 32,34,72
IRDY# USBP12N
H44 PAR USBP12P M24 USBP12+ 32,34,72
PCI_DEVSEL# F46 A24 USBP13- 76
PCI_FRAME# DEVSEL# USBP13N
C46 FRAME# USBP13P C24 USBP13+ 76
B PCI_PLOCK# B
D49 PLOCK#
B25 USB_RBIAS_PN 1 2
PCI_STOP# USBRBIAS# R2112
D41 STOP#
PCI_TRDY# C48 D25 22D6R2F-L1-GP
TRDY# USBRBIAS
1 PCH_PME# M7
TP2105 PME#
N16 USB_OC#0_1_R R2113 1 2 0R2J-2-GP
OC0#/GPIO59 USB_OC#0_1 63
PCI_PLTRST# D5 J16 USB_OC#2_3_R R2114 1 2 0R2J-2-GP
PLTRST# OC1#/GPIO40 USB_OC#2_3 76
F16 USB_OC#4_5
CLK_PCI_5028_R OC2#/GPIO41 USB_OC#6_7
38 CLK_PCI_5028 1 2 N52 CLKOUT_PCI0 OC3#/GPIO42 L16 USB_OC#0_1_R 58
37 CLK_PCI_EC R2116 1 2 22R2J-2-GP CLK_PCI_EC_R P53 E14 USB_OC#8_9 USB_OC#2_3_R 58
R2118 CLKOUT_PCI1 OC4#/GPIO43
74 CLK_PCI_DOCK 1 2 22R2J-2-GP CLK_PCI_DOCK_R P46 CLKOUT_PCI2 OC5#/GPIO9 G16 USB_OC#10_11 USB_OC#4_5 58
R2117 22R2J-2-GP P51 F12 USB_OC#12_13 USB_OC#6_7 58
CLK_PCI_LOOPBACK_R CLKOUT_PCI3 OC6#/GPIO10 PCH_OC7#
23 CLK_PCI_LOOPBACK 1 2 P48 CLKOUT_PCI4 OC7#/GPIO14 T15 USB_OC#8_9 58
R2115 22R2J-2-GP USB_OC#10_11 58
USB_OC#12_13 58
IBEXPEAK-M-GP-NF PCH_OC7# 58

RN2104
+3.3V_ALW _PCH
USB_OC#8_9 1 10
USB_OC#6_7 2 9 USB_OC#0_1_R
PCH_OC7# 3 8 USB_OC#2_3_R
USB_OC#12_13 4 7 USB_OC#4_5
5 6 USB_OC#10_11
+3.3V_ALW _PCH
SRN10KJ-L3-GP
PCI_GNT0# BOOT BIOS Strap
A <Core Design> A
PCI_GNT1# PCI_GNT#0 PCI_GNT#1 BOOT BIOS Location A16 swap override Strap/Top-Block
Swap Override jumper
0 0 LPC Wistron Corporation
1

R2120 R2121
1KR2J-1-GP

1KR2J-1-GP

0 1 Reserved (NAND) PCI_GNT3# PCI_GNT#3 Low = A16 swap 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
1
R2122
DY 2
4K7R2J-2-GP Taipei Hsien 221, Taiwan, R.O.C.
DY DY override/Top-Block
1 0 PCI Swap Override enabled Title
High = Default
2

1 1 SPI(Default)
PCH - PCI/USB/NVRAM (2/9)

WWW.AliSaler.Com
Size Document Number Rev
PCI_GNT[3:0]#: Internal pull high during Strap A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 21 of 82
5 4 3 2 1
5 4 3 2 1

SSID = PCH
PCH1C 3 OF 10
BA18 FDI_TXN0 FDI_TXN0 8
FDI_RXN0 FDI_TXN1
8 DMI_CTX_PRXN0 BC24 DMI0RXN FDI_RXN1 BH17 FDI_TXN1 8
8 DMI_CTX_PRXN1 BJ22 BD16 FDI_TXN2 FDI_TXN2 8
DMI1RXN FDI_RXN2 FDI_TXN3
8 DMI_CTX_PRXN2 AW20 DMI2RXN FDI_RXN3 BJ16 FDI_TXN3 8
8 DMI_CTX_PRXN3 BJ20 BA16 FDI_TXN4 FDI_TXN4 8
DMI3RXN FDI_RXN4 FDI_TXN5
FDI_RXN5 BE14 FDI_TXN5 8
8 DMI_CTX_PRXP0 BD24 BA14 FDI_TXN6 FDI_TXN6 8
DMI0RXP FDI_RXN6 FDI_TXN7
8 DMI_CTX_PRXP1 BG22 DMI1RXP FDI_RXN7 BC12 FDI_TXN7 8
D 8 DMI_CTX_PRXP2 BA20 DMI2RXP D
8 DMI_CTX_PRXP3 BG20 BB18 FDI_TXP0 FDI_TXP0 8
DMI3RXP FDI_RXP0 FDI_TXP1
FDI_RXP1 BF17 FDI_TXP1 8
8 DMI_PTX_CRXN0 BE22 BC16 FDI_TXP2 FDI_TXP2 8
DMI0TXN FDI_RXP2 FDI_TXP3
8 DMI_PTX_CRXN1 BF21 DMI1TXN FDI_RXP3 BG16 FDI_TXP3 8
8 DMI_PTX_CRXN2 BD20 AW16 FDI_TXP4 FDI_TXP4 8
DMI2TXN FDI_RXP4 FDI_TXP5
8 DMI_PTX_CRXN3 BE18 DMI3TXN FDI_RXP5 BD14 FDI_TXP5 8
BB14 FDI_TXP6 FDI_TXP6 8
FDI_RXP6 FDI_TXP7
8 DMI_PTX_CRXP0 BD22 DMI0TXP FDI_RXP7 BD12 FDI_TXP7 8
8 DMI_PTX_CRXP1 BH21 DMI1TXP
8 DMI_PTX_CRXP2 BC20 DMI2TXP
8 DMI_PTX_CRXP3 BD18 BJ14 FDI_INT FDI_INT 8
DMI3TXP FDI_INT

DMI
FDI
BF13 FDI_FSYNC0 FDI_FSYNC0 8
+1.05V_RUN FDI_FSYNC0
BH25 DMI_ZCOMP
BH13 FDI_FSYNC1 FDI_FSYNC1 8
DMI_IRCOMP_R FDI_FSYNC1
1 2 BF25 DMI_IRCOMP
R2203 49D9R2F-GP BJ12 FDI_LSYNC0 FDI_LSYNC0 8
FDI_LSYNC0
+3.3V_RUN BG14 FDI_LSYNC1
FDI_LSYNC1 FDI_LSYNC1 8

1
+3.3V_RUN
R2204 +3.3V_ALW _PCH
1KR2J-1-GP X01-47

1
1 2
R2205 10KR2J-3-GP R2206

2
9,38,58 XDP_DBRESET# 1 2 PM_SYSRST#_R T6 J12 PCH_PCIE_W AKE# PCH_PCIE_W AKE# 38 8K2R2J-3-GP
R2201 0R2J-2-GP SYS_RESET# WAKE#
C C

2
RESET_OUT#_R 1 2 PM_PW ROK M6 Y1 CLKRUN#
SYS_PWROK CLKRUN#/GPIO32 CLKRUN# 36,37,38
R2207 0R2J-2-GP
1

Option to " Disable "

1
System Power Management
R2208 1 2 PW ROK B17
8K2R2J-3-GP R2209 0R2J-2-GP PWROK R2211 clkrun. Pulling it
ME_PW ROK PM_SUS_STAT# 1
10KR2J-3-GP DY down
1 2 K5 P8 TP2202 will keep the clks
2

R2210 0R2J-2-GP MEPWROK SUS_STAT#/GPIO61

2
running.
1 2 PCH_LAN_RST# A10 F3 PCH_SUSCLK 1
LAN_RST# SUSCLK/GPIO62 TP2201
R2213 10KR2J-3-GP

9 DRAM_PW ROK DRAM_PW ROK D9 E4 PCH_SLP_S5# 1 2 SIO_SLP_S5# 37


DRAMPWROK SLP_S5#/GPIO63 R2214 0R2J-2-GP

37 PCH_RSMRST# 1 2 PCH_RSMRST#_R C16 H7 PM_SLP_S4#_R 1 2 SIO_SLP_S4# 38,50,72


R2215 0R2J-2-GP RSMRST# SLP_S4# R2216 0R2J-2-GP

37 ME_SUS_PW R_ACK 1 2 ME_SUS_PW R_ACK_R M1 P12 PM_SLP_S3#_R 1 2 SIO_SLP_S3# 9,35,38,50


R2217 0R2J-2-GP SUS_PWR_DN_ACK/GPIO30 SLP_S3# R2218 0R2J-2-GP
58 PM_PW RBTN#_R
37 SIO_PW RBTN# 1 2 PM_PW RBTN#_R P5 K8 SIO_SLP_M#_R 1 2 SIO_SLP_M# 38
R2219 0R2J-2-GP PWRBTN# SLP_M# R2220 0R2J-2-GP

37 AC_PRESENT 1 2 AC_PRESENT_R P7 N2 PM_SLP_DSW # 1


ACPRESENT/GPIO31 TP23 TP2203
R2221 0R2J-2-GP

1 2 PCH_BATLOW # A6 BJ10 H_PM_SYNC


B +3.3V_ALW _PCH BATLOW#/GPIO72 PMSYNCH H_PM_SYNC 9 B
R2222 8K2R2J-3-GP

1 2 PCH_RI# F14 F6 SIO_SLP_LAN#_R 1 DY 2 SIO_SLP_LAN# 38


R2223 10KR2J-3-GP RI# SLP_LAN#/GPIO29 R2224 0R2J-2-GP

IBEXPEAK-M-GP-NF

+3.3V_ALW _PCH

1 2
R2225
0R2J-2-GP 1 2 ME_SUS_PW R_ACK_R
+3.3V_ALW R2226 10KR2J-3-GP

U2201
37 RESET_OUT# RESET_OUT# 1 1 DY 2 AC_PRESENT_R
B R2228 10KR2J-3-GP
VCC 5 Type: PP
SIO_SLP_S3# 1 DY 2 SIO_SLP_S3#_R 2
R2227 A DY 4 RESET_OUT#_R Just Pull down
0R2J-2-GP Y AC_PRESENT_R
3 GND 1 2
R2229 10KR2J-3-GP
74LVC1G08GW -1-GP
A 1 2 PCH_RSMRST#_R <Core Design> A
X01.09/0917 R2231 10KR2J-3-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH - DMI/FDI/PM (3/9)

WWW.AliSaler.Com
Size Document Number Rev
A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 22 of 82
5 4 3 2 1
5 4 3 2 1

SSID = PCH
+3.3V_ALW _PCH
+3.3V_ALW _PCH +3.3V_ALW _PCH
PCH1B 2 OF 10

BG30 B9 PCH_GPIO11
76 PCIE_PRX_W W ANTX_N1 PERN1 SMBALERT#/GPIO11

1
2

1
2
76 PCIE_PRX_W W ANTX_P1 BJ30 PERP1 WWAN
C2301 1 2 PCIE_PTX_W W ANRX_N1 BF29 H14 PCH_SMB_CLK
76 PCIE_PTX_W W ANRX_N1_C PETN1 SMBCLK PCH_SMB_CLK 37
C2302 1 2 PCIE_PTX_W W ANRX_P1 BH29 RN2309 RN2303
76 PCIE_PTX_W W ANRX_P1_C SCD1U10V2KX-4GP PETP1 PCH_SMB_DATA SRN2K2J-1-GP SRN2K2J-1-GP PCH_GPIO11
SMBDATA C8 PCH_SMB_DATA 37 1 2
D AW30 R2302 10KR2J-3-GP D
64 PCIE_PRX_W LANTX_N2 PERN2
64 PCIE_PRX_W LANTX_P2 BA30

4
3

4
3
PERP2
64 PCIE_PTX_W LANRX_N2_C
C2305 1 2 PCIE_PTX_W LANRX_N2 BC30 PETN2 WLAN SML0ALERT#/GPIO60 J14 PCH_GPIO60 PCH_GPIO60 1 DY 2
C2306 1 2 PCIE_PTX_W LANRX_P2 BD30 R2303 10KR2J-3-GP
64 PCIE_PTX_W LANRX_P2_C SCD1U10V2KX-4GP PETP2 PCH_SML0CLK
SML0CLK C6
AU30 PCH_GPIO74 1 DY 2

SMBus
32 PCIE_PRX_R5U241TX_N3 PERN3
AT30 G8 PCH_SML0DATA R2301 10KR2J-3-GP
32 PCIE_PRX_R5U241TX_P3 PERP3 SML0DATA
32 PCIE_PTX_R5U241RX_N3_C
C2307 1 2 PCIE_PTX_R5U241RX_N3 AU32 PETN3 PCMCIA
C2304 1 2 PCIE_PTX_R5U241RX_P3 AV32 PCH_GPIO47 1 2
32 PCIE_PTX_R5U241RX_P3_C SCD1U10V2KX-4GP PETP3 PCH_GPIO74 R2304 10KR2J-3-GP
SML1ALERT#/GPIO74 M14
72 PCIE_PRX_EXPTX_N4 BA32 PERN4
72 PCIE_PRX_EXPTX_P4 BB32 PERP4 Express SML1CLK/GPIO58 E10 KBC_SCL1
KBC_SCL1 37
C2312 1EXP 2 PCIE_PTX_EXPRX_N4 BD32
72 PCIE_PTX_EXPRX_N4_C C2311 1EXP 2 PCIE_PTX_EXPRX_P4 BE32
PETN4 Card G12 KBC_SDA1
72 PCIE_PTX_EXPRX_P4_C PETP4 SML1DATA/GPIO75 KBC_SDA1 37
SCD1U10V2KX-4GP

PCI-E*
BF33 PERN5
BH33 T13 CL_CLK 1
PERP5 CL_CLK1 TP2301

Controller
BG32 PETN5 WPAN
BJ32 T11 CL_DATA 1
PETP5 CL_DATA1 TP2302

Link
BA34 T9 CL_RST# 1
35 PCIE_PRX_GLANTX_N6 PERN6 CL_RST1# TP2303 +3.3V_RUN +3.3V_ALW _PCH
35 PCIE_PRX_GLANTX_P6 AW34 PERP6
35 PCIE_PTX_GLANRX_N6_C
C2303 1 2 PCIE_PTX_GLANRX_N6 BC34 PETN6 LAN
C2308 1 2 PCIE_PTX_GLANRX_P6 BD34
35 PCIE_PTX_GLANRX_P6_C SCD1U10V2KX-4GP PETP6 PCH_GPIO47
PEG_A_CLKRQ#/GPIO47 H1

1
2

2
1
AT34 PERN7
AU34 PERP7
AU36 AD43 RN2310 +3.3V_RUN RN2305
PETN7 CLKOUT_PEG_A_N SRN2K2J-1-GP SRN2K2J-1-GP
PCIe port 7 and 8 may not be available AV36 PETP7 CLKOUT_PEG_A_P AD45
C C
for all Ibex Peak SKUs. BG34 AN4 CLK_EXP_N 3 2 PEG_CLK#_R 9

4
3

3
4
PERN8 CLKOUT_DMI_N

PEG
BJ34 AN2 CLK_EXP_P 4 1 PEG_CLK_R 9
PERP8 CLKOUT_DMI_P RN2312 U2301
BG36 PETN8
BJ36 SRN0J-10-GP-U 1 6 PCH_SMB_CLK
PETP8 18,19,40,58 PCH_SMBCLK_MEM
AT1 CLK_DP_N 4 1 DPLL_REF_SSCLK#_R 9
CLKOUT_DP_N/CLKOUT_BCLK1_N CLK_DP_P
CLKOUT_DP_P/CLKOUT_BCLK1_P AT3 3 2 DPLL_REF_SSCLK_R 9 2 5
AK48 RN2313
+3.3V_ALW _PCH CLKOUT_PCIE0N SRN0J-10-GP-U
AK47 CLKOUT_PCIE0P 3 4

From CLK BUFFER


AW24 CLKIN_DMI# CLKIN_DMI# 7
PCIE_CLK_RQ0# CLKIN_DMI_N CLKIN_DMI DMN66D0LDW -7-GP
R2307
1 DY 2
10KR2J-3-GP
P9 PCIECLKRQ0#/GPIO73 CLKIN_DMI_P BA24 CLKIN_DMI 7
18,19,40,58 PCH_SMBDATA_MEM
RN2306
35 CLK_PCIE_LOM# 2 3 CLK_PCIE_LOM_N AM43 AP3 CLK_CPU_BCLK# CLK_CPU_BCLK# 7 PCH_SMB_DATA
CLKOUT_PCIE1N CLKIN_BCLK_N
35 CLK_PCIE_LOM 1 4 CLK_PCIE_LOM_P AM45 CLKOUT_PCIE1P LAN CLKIN_BCLK_P AP1 CLK_CPU_BCLK CLK_CPU_BCLK 7
SRN0J-10-GP-U
35 LOM_CLKREQ# LOM_CLKREQ# U4 PCIECLKRQ1#/GPIO18 DREFCLK#
CLKIN_DOT_96N F18 DREFCLK# 7
RN2307 E18 DREFCLK DREFCLK 7
CLK_PCIE_R5U241_N CLKIN_DOT_96P
32 CLK_PCIE_R5U241# 2 3 AM47 CLKOUT_PCIE2N
32 CLK_PCIE_R5U241 1 4 CLK_PCIE_R5U241_P AM48 CLKOUT_PCIE2P PCMCIA
SRN0J-10-GP-U AH13 CLK_PCIE_SATA# CLK_PCIE_SATA# 7
PCMCLK_REQ# CLKIN_SATA_N/CKSSCD_N CLK_PCIE_SATA
32,58 PCMCLK_REQ# N4 PCIECLKRQ2#/GPIO20 CLKIN_SATA_P/CKSSCD_P AH12 CLK_PCIE_SATA 7

+3.3V_RUN 1 2
R2319 10KR2J-3-GP AH42 P41 CLK_PCH_14M CLK_PCH_14M 7
+3.3V_ALW _PCH CLKOUT_PCIE3N REFCLK14IN
AH41 CLKOUT_PCIE3P
WPAN X01.09/0825
1 2 PCIE_CLK_RQ3# A8 J42 CLK_PCI_LOOPBACK CLK_PCI_LOOPBACK 21
B R2308 10KR2J-3-GP PCIECLKRQ3#/GPIO25 CLKIN_PCILOOPBACK B
X01.09/0918
RN2311
CLK_PCIE_EXP_N XTAL25_IN XTAL25_IN
72 CLK_PCIE_EXP#
72 CLK_PCIE_EXP
1
2
EXP 4
3 CLK_PCIE_EXP_P
AM51
AM53
CLKOUT_PCIE4N
Express
XTAL25_IN AH51
AH53 XTAL25_OUT +1.05V_RUN
1
C2310
2
CLKOUT_PCIE4P XTAL25_OUT SC12P50V2JN-3GP
Card

1
SRN0J-6-GP EXPCLK_REQ#_PCH M9 AF38 XCLK_RCOMP 1 2
X01-43 RN2308
PCIECLKRQ4#/GPIO26 XCLK_RCOMP R2317 90D9R2F-1-GP R2316
1MR2J-1-GP
X2301
XTAL-25MHZ-96GP
64 CLK_PCIE_MINI1# 1 4 CLK_PCIE_MINI1_N AJ50 T45 CLK_SIO_14M_R 1 2 CLK_SIO_14M 38

2
CLK_PCIE_MINI1_P CLKOUT_PCIE5N CLKOUTFLEX0/GPIO64 R2314 1 22R2J-2-GP
2 3 AJ52
64 CLK_PCIE_MINI1 J 2 22R2J-2-GP CLK_JETW AY_14M 36

2
CLKOUT_PCIE5P
SRN0J-10-GP-U WLAN R2315 XTAL25_OUT 1 2
MINI1CLK_REQ#_PCH H6 P43 CLK_PCI_TPM_CHA_R 1C_TPM 2 C2309
Clock Flex

PCIECLKRQ5#/GPIO44 CLKOUTFLEX1/GPIO65 CLK_PCI_TPM_CHA 36


R2309 22R2J-2-GP SC12P50V2JN-3GP
X01-41 RN2301
CLK_PCIE_MINI2_N CLK_PCI_TPM_R
2 3 AK53 T42 1B_TPM 2
76 CLK_PCIE_MINI2#
76 CLK_PCIE_MINI2
14ONLY
1 4 CLK_PCIE_MINI2_P AK51
CLKOUT_PEG_B_N CLKOUTFLEX2/GPIO66 R2313 22R2J-2-GP
CLK_PCI_TPM 35,70
CLKOUT_PEG_B_P
WWAN
SRN0J-6-GP MINI2CLK_REQ#_PCH P13 N50 CLK48_PCH R2311 1 2 22R2J-2-GP CLK_SC_48M 34 From Intel DG 1.6
PEG_B_CLKRQ#/GPIO56 CLKOUTFLEX3/GPIO67
CLKOUTFLEX{3:0}
R2312 1 2 22R2J-2-GP CLK_FD_48M 75 RS on PCI/NonPCI Routing (for single / double-load)
IBEXPEAK-M-GP-NF
=> 22 ohm series resistor
PCIECLKRQ{0,3,4,5,6,7}# should have a 10K pull-up to +V3.3A.
X01-33

1
PCIECLKRQ{1,2} should have a 10K pull-up to +3.3S EC2301 EC2302
SC22P50V2JN-4GP DY DY SC22P50V2JN-4GP

2
15ONLY
+3.3V_RUN +3.3V_ALW _PCH +3.3V_RUN +3.3V_ALW _PCH +3.3V_RUN +3.3V_ALW _PCH
A <Core Design> A
1

1
R2310 R2305 Wistron Corporation
X01-41 Q2303 R2306 Q2304 10KR2J-3-GP Q2302 10KR2J-3-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
G

2N7002A-7-GP 10KR2J-3-GP 2N7002A-7-GP 2N7002A-7-GP Taipei Hsien 221, Taiwan, R.O.C.


2

2
Title
S
14ONLYD MINI2CLK_REQ#_PCH S
EXP D EXPCLK_REQ#_PCH S D MINI1CLK_REQ#_PCH
76 MINI2CLK_REQ# 72 EXPCLK_REQ# 58,64 MINI1CLK_REQ#
PCH - PCIE/SMBUS/CLOCK/CL (4/9)

WWW.AliSaler.Com
Size Document Number Rev
A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 23 of 82
5 4 3 2 1
5 4 3 2 1

SSID = PCH +RTC_CELL +RTC_CELL

1 2
PCH_RTCX1 R2406 1 2 SM_INTRUDER#

2
20KR2J-L2-GP R2402 INTVRMEN- Integrated SUS

1
1 2 PCH_RTCX2 G2401 1MR2J-1-GP
R2404 10MR2J-L-GP C2404 GAP-OPEN 1.1V VRM Enable
SC1U10V3KX-3GP 1 2 PCH_INTVRMEN High - Enable internal VRs

2
R2405

1
330KR2F-L-GP
X2401 +RTC_CELL
D PCH1A 1 OF 10 LPC_LAD[0..3] D
LPC_LAD[0..3] 35,36,37,38,70
1 4
1 2 PCH_RTCX1 B13 D33 LPC_LAD0
C2403 C2405 R2403 PCH_RTCX2 RTCX1 FWH0/LAD0 LPC_LAD1
D13 B33
RTCX2 FWH1/LAD1 X01-47
1

1
20KR2J-L2-GP C32 LPC_LAD2 +3.3V_RUN
FWH2/LAD2

1
SC15P50V2JN-2-GP

SC12P50V2JN-3GP
2 3 A32 LPC_LAD3
C2402 PCH_RTCRST# FWH3/LAD3
C14
2

2
RTCRST#

1
SC1U10V3KX-3GP C34

2
X-32D768KHZ-46GP SRTCRST# FWH4/LFRAME# LPC_LFRAME# 35,36,37,38,70 R2407
D17 SRTCRST#
SRTCRST# new signal Pin A34 8K2R2J-3-GP

RTC

LPC
LDRQ0# LPC_LDRQ0# 38
SM_INTRUDER# A16 F34
INTRUDER# LDRQ1#/GPIO23 LPC_LDRQ1# 38
X01.09/0918

2
PCH_INTVRMEN A14 AB9 IRQ_SERIRQ 35,36,37,38
INTVRMEN SERIRQ

1 2
76 PCH_AZ_MDC_BITCLK
30 PCH_AZ_CODEC_BITCLK
R2423
R2424
1 2 33R2J-2-GP
33R2J-2-GP
ACZ_BIT_CLK A30 HDA_BCLK
HDD
SATA0RXN AK7 SATA_PRX_HTX0- 59
1 2 ACZ_SYNC_R D29 AK6 SATA_PRX_HTX0+ 59
76 PCH_AZ_MDC_SYNC R2425 HDA_SYNC SATA0RXP
30 PCH_AZ_CODEC_SYNC 1 2 33R2J-2-GP SATA0TXN AK11 SATA_PTX_HRX0-_C C2406 1 2 SCD01U50V2KX-1GP SATA_PTX_HRX0- 59
R2426 33R2J-2-GP ACZ_SPKR P1 AK9 SATA_PTX_HRX0+_C C2407 1 2 SCD01U50V2KX-1GP SATA_PTX_HRX0+ 59
30 ACZ_SPKR SPKR SATA0TXP

76 PCH_AZ_MDC_RST# 1
2
4
3
ACZ_RST#_R C30 HDA_RST#
AH6
ODD
30,75 PCH_AZ_CODEC_RST# SATA1RXN SATA_PRX_OTX1- 59
RN2403 SRN33J-5-GP-U AH5 SATA_PRX_OTX1+ 59
PCH_CODEC_SDIN0 G30 SATA1RXP SATA_PTX_ORX1-_C C2408 1
30 PCH_CODEC_SDIN0 HDA_SDIN0 SATA1TXN AH9 2 SCD01U50V2KX-1GP SATA_PTX_ORX1- 59
1 2 AH8 SATA_PTX_ORX1+_C C2409 1 2 SCD01U50V2KX-1GP SATA_PTX_ORX1+ 59
76 PCH_MDC_SDOUT R2427 SATA1TXP
30 PCH_CODEC_SDOUT 1 2 33R2J-2-GP 76 PCH_MDC_SDIN1 PCH_MDC_SDIN1 F30 HDA_SDIN1
R2428 33R2J-2-GP AF11
C HDA_SDIN2 SATA2RXN C
TP2401 1 E32 AF9

IHDA
HDA_SDIN2 SATA2RXP
SATA2TXN AF7
1 HDA_SDIN3 F32 AF6 SATA port 2 and 3 may not be available
TP2402 HDA_SDIN3 SATA2TXP
AH3
for all Ibex Peak SKUs.
ACZ_SDATAOUT_R SATA3RXN
B29 HDA_SDO SATA3RXP AH1
ACZ_BIT_CLK AF3
SATA3TXN
SATA3TXP AF1
1

+3.3V_ALW _PCH ME_FW P H32


38 ME_FW P

SATA
EC2401 HDA_DOCK_EN#/GPIO33
DY SC33P50V2JN-3GP PCH_GPIO13 SATA4RXN AD9
1 2 J30 AD8
2

R2408 8K2R2J-3-GP HDA_DOCK_RST#/GPIO13 SATA4RXP


SATA4TXN AD6
AD5

PCH_JTAG_TCK
SATA4TXP DOCKING eSATA
58 PCH_JTAG_TCK M3 JTAG_TCK SATA5RXN AD3 SATA_PRX_DTX_5- 74
For EMI, RF Cap. PCH_JTAG_TMS SATA5RXP AD1
SATA_PTX_DRX_N5_C C2410 1
SATA_PRX_DTX_5+ 74
58 PCH_JTAG_TMS K3 JTAG_TMS SATA5TXN AB3 2 SCD01U50V2KX-1GP SATA_PTX_DRX_5- 74
AB1 SATA_PTX_DRX_P5_C C2411 1 2 SCD01U50V2KX-1GP
PCH_JTAG_TDI SATA5TXP SATA_PTX_DRX_5+ 74
58 PCH_JTAG_TDI K1 JTAG_TDI +1.05V_RUN

JTAG
PCH_JTAG_TDO J2 AF16
58 PCH_JTAG_TDO JTAG_TDO SATAICOMPO
+3.3V_RUN NO REBOOT STRAP PCH_JTAG_RST# SATAICOMP
J4 AF15 1 2
58 PCH_JTAG_RST# TRST# SATAICOMPI R2409 37D4R2F-GP X01-30 +3.3V_RUN
1 DY 1KR2J-1-GP
2 ACZ_SPKR RN2401
R2410 PCH_SPI_CLK BA2 HDD_DET#_R 1 4
62 PCH_SPI_CLK SPI_CLK PCH_GPIO19 2 3
No Reboot Strap R23 PCH_SPI_CS0# AV3
B 62 PCH_SPI_CS0# SPI_CS0# B
SRN10KJ-5-GP
Low = Default PCH_SPI_CS1# AY3 T3
62 PCH_SPI_CS1# SPI_CS1# SATALED# SATA_ACT#_R 66
HDA_SPKR High = No Reboot
PCH_SPI_DO HDD_DET#_R HDD_DET#_R 58
62 PCH_SPI_DO AY1 SPI_MOSI SATA0GP/GPIO21 Y9 1 2 HDD_DET# 59
R2414 0R2J-2-GP

SPI
1 2 PCH_SPI_DIN_R AV1 V1 PCH_GPIO19
62 PCH_SPI_DIN SPI_MISO SATA1GP/GPIO19 PCH_GPIO19 58
R2415 33R2J-2-GP
Place near PCH side
IBEXPEAK-M-GP-NF
+3.3V_SUS X01-48
1

R2416 +3.3V_RTC_LDO
+RTC_CELL
DY 20KR2F-L-GP Form DG1.5 W=20mils
D2401
RTC1
1
TRST# on PCH does not belong to JTAG interface. +COIN_CELL 4
2

PCH_JTAG_RST# For ES1 silicon, an ext. pull up 3.3-V Sus is required 1 2RTC_PW R_L 3 1
for bias internal state. R2418 0R2J-2-GP
1

A 20-K/10-K voltage divider to this signal to 1.1 V. W=20mils +COIN_CELLL_R 2


However, from ES2 silicon onward, 2 1 2
R2401 R2419 1KR2J-1-GP 3
this signal is a No Connect regardless
DY 10KR2J-3-GP if JTAG interface on PCH is enabled or not. BAT54CW -1-GP 5

1
C2401 25 RTC_BAT_DET#
2

2 SC1U10V3KX-3GP MLX-CON3-10-GP-U

A ME_FW P <Core Design> 20.F1000.003 A


1

Internal pull-up of 20K


+3.3V_RUN for HDA_DOCK_EN#, R2422
DY 1KR2J-1-GP
integrated VccSus1_05,VccSus1_5,VccCL1_5
Wistron Corporation
1 DY 2 PCH_SPI_DO INTVRMEN High=Enable Low=Disable 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
R2421 8K2R2J-3-GP Taipei Hsien 221, Taiwan, R.O.C.
2

integrated VccLan1_05VccCL1_05
Title
LAN100_SLP High=Enable Low=Disable
Pull up +3.3V_M enable iAMT(DY disable) PCH - SPI/RTC/LPC/SATA/IHDA (5/9)

WWW.AliSaler.Com
Size Document Number Rev
A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 24 of 82
5 4 3 2 1
5 4 3 2 1

SSID = PCH
+3.3V_RUN
PCH1F 6 OF 10
58 SIO_EXT_SCI#_R
RN2502
1 2 SIO_EXT_SCI#_R Y3 AH45 PCH_SRC6_XDP_N 1 SIO_A20GATE 1 4
37 SIO_EXT_SCI# BMBUSY#/GPIO0 CLKOUT_PCIE6N TP2502
R2502 0R2J-2-GP AH46 PCH_SRC6_XDP_P 1 SIO_RCIN# 2 3
CLKOUT_PCIE6P TP2503
PCH_GPIO1 C38 TACH1/GPIO1
SRN10KJ-5-GP
PCH_GPIO6 D37 TACH2/GPIO6 PCH_SRC7_DMI_LAI_N
D
CLKOUT_PCIE7N AF48 1 TP2501 D

MISC
PCH_GPIO7 J32 AF47 PCH_SRC7_DMI_LAI_P 1

SIO_EXT_SMI#
TACH3/GPIO7 CLKOUT_PCIE7P TP2504
X01-30
37 SIO_EXT_SMI# F10 GPIO8
PCH_GPIO12 K9 U2 SIO_A20GATE 37
LAN_PHY_PWR_CTRL/GPIO12 A20GATE
SIO_EXT_W AKE# T7
38 SIO_EXT_W AKE# GPIO15 RN2501
1 58 PCH_GPIO16
PCH_GPIO16 AA2 SATA4GP/GPIO16 CLKOUT_BCLK0_N/CLKOUT_PCIE8N AM3 BCLK_CPU_N 4 1 BCLK_CPU_N_R 9
C2501 DY 3 2 BCLK_CPU_P_R 9
SC47P50V2JN-3GP SPEAKER_DET# F38 AM1 BCLK_CPU_P
60 SPEAKER_DET#
2

TACH0/GPIO17 CLKOUT_BCLK0_P/CLKOUT_PCIE8P SRN0J-10-GP-U


PCH_GPIO22 Y7 BG10 +1.05V_RUN
SCLOCK/GPIO22 PECI H_PECI 9

GPIO
PCIE_MCARD1_DET# H10 T1 SIO_RCIN# 37
64 PCIE_MCARD1_DET# GPIO24 RCIN#
2 1
TP_ONDIE_PLL_VR AB12 BE10 H_PW RGD 9,58 R2505
64 USB_MCARD1_DET# GPIO27 PROCPWRGD

CPU
56R2J-4-GP
1

1 2 LED_BD_DET#_R V13 BD10 PCH_THERMTRIP_R 1 2 H_THERMTRIP# 9,39


77 LED_BD_DET# GPIO28 THRMTRIP#
C2502 DY R2506 R2507 56R2J-4-GP
SC47P50V2JN-3GP 58 LED_BD_DET#_R 0R2J-2-GP STP_PCI# M11
2

STP_PCI#/GPIO34
Place 2 R close to PCH
+3.3V_RUN USB_MCARD1_DET# V6 SATACLKREQ#/GPIO35
1 2 RTC_BAT_DET#_R AB7 BA22
24 RTC_BAT_DET# SATA2GP/GPIO36 TP1
1 2 PCH_GPIO22 R2532
R2508 10KR2J-3-GP 0R2J-2-GP PCH_GPIO37 AB13 AW22
58 RTC_BAT_DET#_R SATA3GP/GPIO37 TP2
C 1 2 PCH_GPIO1 58 PCH_GPIO37
TPM_ID0 V3 SLOAD/GPIO38 TP3 BB22 C
R2509 10KR2J-3-GP
TPM_ID1 P3 AY45
PCH_GPIO6 SDATAOUT0/GPIO39 TP4
1 2
R2510 10KR2J-3-GP USB_MCARD2_DET# H3 AY46
76 USB_MCARD2_DET# PCIECLKRQ6#/GPIO45 TP5
1

1 2 PCH_GPIO7 C2503 PCH_GPIO46 F1 AV43


R2511 10KR2J-3-GP PCIECLKRQ7#/GPIO46 TP6
DY
SC47P50V2JN-3GP

FFS_INT2_R AB6 AV45


40 FFS_INT2_R
2

SDATAOUT1/GPIO48 TP7
1 2 SIO_EXT_SCI#_R
R2501 10KR2J-3-GP TEMP_ALERT# AA4 AF13
38,58 TEMP_ALERT# SATA5GP/GPIO49 TP8
1 2 PCH_GPIO16 BIO_DET# F8 M18
78 BIO_DET# GPIO57 TP9
R2512 10KR2J-3-GP
TP10 N18
1 2 SPEAKER_DET#
R2513 100KR2J-1-GP TP2510 1 TP_VSS_NCTF13 A4 AJ24
VSS_NCTF_1 TP11
A49

NCTF
VSS_NCTF_2

RSVD
1 2 USB_MCARD1_DET# A5 AK41
R2514 100KR2J-1-GP VSS_NCTF_3 TP12
A50 VSS_NCTF_4
TP2512 1 TP_VSS_NCTF22 A52 AK42
VSS_NCTF_5 TP13
1 2 STP_PCI# TP2511 1 TP_VSS_NCTF21 A53 VSS_NCTF_6
R2515 8K2R2J-3-GP TP2508 1 TP_VSS_NCTF11 B2 M32
from Checklist 1.5 VSS_NCTF_7 TP14
B4 VSS_NCTF_8
1 2 PCH_GPIO37 VSS_NCTF B52 N32
R2517 10KR2J-3-GP TP_VSS_NCTF23 VSS_NCTF_9 TP15
Pins can be connected to GND TP2513 1 B53 VSS_NCTF_10
or left as NC (floating). BE1 VSS_NCTF_11 TP16 M30
1 2 RTC_BAT_DET#_R BE53
R2535 10KR2J-3-GP VSS_NCTF_12
BF1 VSS_NCTF_13 TP17 N30
B When tied to GND B
BF53 VSS_NCTF_14
they should be routed as traceTP2519 1 TP_VSS_NCTF43 BH1 VSS_NCTF_15 TP18 H12
and not as a GND plane. BH2 VSS_NCTF_16
+3.3V_ALW _PCH BH52 AA23
TP_VSS_NCTF32 VSS_NCTF_17 TP19
Note: CRB has some NCTF pins TP2515 1 BH53 VSS_NCTF_18
TP2517 1 TP_VSS_NCTF41 BJ1 AB45
USB_MCARD2_DET# tied to GND and some left floating. TP_VSS_NCTF42 VSS_NCTF_19 NC_1
1 2 TP2518 1 BJ2 VSS_NCTF_20
R2534 10KR2J-3-GP BJ4 AB38
VSS_NCTF_21 NC_2
BJ49 VSS_NCTF_22
1 2 PCH_GPIO46 BJ5 AB42
R2518 10KR2J-3-GP VSS_NCTF_23 NC_3
BJ50 VSS_NCTF_24
TP2516 1 TP_VSS_NCTF33 BJ52 AB41
BIO_DET# TP_VSS_NCTF31 VSS_NCTF_25 NC_4
1 2 TP2514 1 BJ53 VSS_NCTF_26
R2520 100KR2J-1-GP TP2509 1 TP_VSS_NCTF12 D1 T39
VSS_NCTF_27 NC_5
D2 VSS_NCTF_28
1 2 LED_BD_DET#_R D53
R2521 100KR2J-1-GP VSS_NCTF_29 INIT3_3V#
E1 VSS_NCTF_30 INIT3_3V# P6 1 TP2506
E53 VSS_NCTF_31
1 2 SIO_EXT_W AKE# C10
R2522 1KR2J-1-GP TP24
IBEXPEAK-M-GP-NF
1 2 PCIE_MCARD1_DET# X01.09/0825
R2523 100KR2J-1-GP

1 2 PCH_GPIO12 +3.3V_RUN +3.3V_RUN


R2524 10KR2J-3-GP BJ53 BH53 B53 A53
BJ52 A52 1

1
1 2 SIO_EXT_SMI#
A R2525 10KR2J-3-GP 3X 2X B_TPM B_TPM and DisableBTPM <Core Design> A

R2516 R2527
TP_ONDIE_PLL_VR
NCTF ID0=0 ID0=1 100KR2J-1-GP 100KR2J-1-GP
1 DY 2 8K2R2J-3-GP TPM ID Wistron Corporation
2

2
R2528 PCH1, Board Top View TPM_ID0 TPM_ID1
Internal pull up GPIO27 to enable VccVRM 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
1

1
ID1=0 Taipei Hsien 221, Taiwan, R.O.C.
C_TPM RSVD
CTPM and DisableBTPM C_TPM Title
4X 1X
A4 ID1=1 NONE B_TPM R2526 R2529
BJ2 B2 100KR2J-1-GP 100KR2J-1-GP PCH - GPIO/CPU/MISC (6/9)
2

WWW.AliSaler.Com
BJ1 BH1 D1 Size Document Number Rev
A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 25 of 82
5 4 3 2 1
5 4 3 2 1

SSID = PCH L2602


+3.3V_LDO_DAC +3.3V_RUN

+VCCA_DAC_1_2 2 1
(180 ohm @ 100Mhz ; 230mA)
69mA 1
R2601
2
0R2J-2-GP

1
R2602 C2604 C2605 C2602 MMZ1608S181C-GP
X01-37

1
SCD01U16V2KX-3GP

SCD1U10V2KX-5GP

SC10U6D3V5MX-3GP
0R2J-2-GP
+1.05V_RUN
PCH1G POWER 7 OF 10
DY DY
1.524A

2
AB24 AE50

2
VCCCORE VCCADAC
AB26 VCCCORE

1
C2606 C2603 AB28 AE52
VCCCORE VCCADAC
AD26 VCCCORE

SC1U10V2KX-1GP

CRT
AD28 AF53

SC4D7U6D3V3KX-GP
D D

2
VCCCORE VSSA_DAC
AF26 VCCCORE +3VS_VCCA_LVD +3.3V_RUN

VCC CORE
AF28 VCCCORE VSSA_DAC AF51
AF30
AF31
AH26
VCCCORE
VCCCORE 1
R2603
DY 2
0R5J-5-GP
300mA
VCCCORE

1
AH28 VCCCORE
AH30 R2604
VCCCORE 0R2J-2-GP
AH31 VCCCORE VCCALVDS AH38
AJ30 VCCCORE
AJ31 AH39

2
VCCCORE VSSA_LVDS +1.8V_RUN
L2601
VCCTX_LVDS AP43 +1.8VS_VCCTX_LVDS 2 DY 1 59mA

1
+1.05V_RUN AP45
VCCTX_LVDS

1
AT46 R2606 C2607 C2608 C2609 IND-D1UH-GP

LVDS
VCCTX_LVDS

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SC22U6D3V5MX-2GP
AK24 AT45 0R2J-2-GP DY DY DY
+1.05V_RUN VCCIO VCCTX_LVDS

2
42mA

2
1 DY 2 +1.05VS_VCCAPLL_EXP BJ24
L2603 VCCAPLLEXP
VCC3_3 AB34

1
IND-1UH-2-GP C2610
+3.3V_RUN
DY SC10U6D3V5MX-3GP AN20 VCCIO VCC3_3 AB35
AN22
357mA

HVCMOS
2
VCCIO
AN23 VCCIO VCC3_3 AD35
AN24 VCCIO

1
AN26 C2611
+1.05V_RUN X01-37 X01-37 AN28
VCCIO
VCCIO
SCD1U10V2KX-5GP
BJ26
3.208A

2
C VCCIO C
BJ28 VCCIO
AT26 VCCIO
1

1
C2612 C2613 C2614 C2615 C2616 AT28 VCCIO
AU26 VCCIO
SC22U6D3V5MX-2GP

SC1U10V3KX-3GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
AU28 +1.5VS_+1.8VS
2

2
VCCIO
AV26
AV28
AW26
VCCIO
VCCIO VCCVRM AT24 35mA +1.05VS_VCC_DMI +1.05V_RUN
VCCIO
AW28 VCCIO
61mA +1.8V_RUN +3.3V_RUN

DMI
BA26 VCCIO VCCDMI AT16
R2614
2 DY 1
0R2J-2-GP +1.05V_VTT
BA28 VCCIO

1
BB26 AU16 C2617
VCCIO VCCDMI

1
BB28 SC1U10V3KX-3GP 2 1
VCCIO R2615 0R2J-2-GP
BC26

2
VCCIO

PCI E*
BC28 VCCIO +V_NVRAM_VCCQ DY R2608
0R2J-2-GP
R2609
0R2J-2-GP
BD26 VCCIO
BD28
156mA

2
VCCIO
BE26 VCCIO VCCPNAND AM16
BE28 VCCIO VCCPNAND AK16
BG26 VCCIO VCCPNAND AK20

1
BG28 AK19 C2618
VCCIO VCCPNAND SCD1U10V2KX-5GP
BH27 VCCIO VCCPNAND AK15
AK13

2
VCCPNAND
AN30 VCCIO VCCPNAND AM12

NAND / SPI
AN31 VCCIO VCCPNAND AM13
+3.3V_RUN AM15
VCCPNAND
357mA AN35 VCC3_3
B +3.3V_RUN B
1

C2619 +1.05V_RUN +1.05VS_VCCAPLL_FDI VCCAFDI_VRM AT22


SCD1U10V2KX-4GP VCCVRM[1]
1 DY 2 BJ18 AM8 PCH_VCCME3_3 85mA 2 1
2

L2604 VCCFDIPLL VCCME3_3 R2610 0R2J-2-GP


VCCME3_3 AM9
1

FDI

09/0720 IND-1UH-2-GP C2621 AM23 AP11


VCCIO VCCME3_3

1
NC.. because DY SC10U6D3V5MX-3GP VCCME3_3 AP9 C2620
SCD1U10V2KX-5GP
On-Die VR enabled mode
2

(default).

2
IBEXPEAK-M-GP-NF

+5V_RUN U2601 +3.3V_LDO_DAC


DY
1 IN OUT 5
+1.05V_RUN
2

SC1U6D3V2KX-GP

SC10U10V5ZY-1GP
GND

1
C2627

C2601
DY 3 SHDN# NC#4 4 DY

2
MAX8511EXK33-T-GP
+1.5VS_+1.8VS

VCCAFDI_VRM
196mA 2 1
R2611 0R2J-2-GP

+1.5VS_+1.8VS
A
+1.8V_RUN <Core Design> A

R2612
1 2
0R3J-0-U-GP Wistron Corporation
+1.5V_RUN 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

R2613
1 DY 2
0R3J-0-U-GP Title

PCH (7/9)

WWW.AliSaler.Com
Size Document Number Rev
A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 26 of 82
5 4 3 2 1
5 4 3 2 1

SSID = PCH +1.05V_RUN


L2701
+1.05VS_VCCA_CLK

52mA 1 DY 2 PCH1J POWER 10 OF 10 +1.05V_RUN

1
IND-10UH-30-GP C2702 C2703 AP51 V24
VCCACLK VCCIO

SC10U6D3V5MX-3GP

SC1U10V2KX-1GP
DY DY VCCIO V26

1
AP53 Y24 C2707

2
VCCACLK VCCIO SC1U10V2KX-1GP
VCCIO Y26

2
VCC_LAN_PCH AF23 V28
VCCLAN VCCSUS3_3 +3.3V_ALW _PCH
U28
(344mA) VCCSUS3_3

2
AF24 VCCLAN VCCSUS3_3 U26
D R2708 U24 D
VCCSUS3_3
0R2J-2-GP VCCSUS3_3 P28

1
DCPSUSBYP Y20 P26
DCPSUSBYP VCCSUS3_3 C2708
N28

1
VCCSUS3_3

1
C2709 N26 SCD1U10V2KX-4GP

2
SCD1U10V2KX-4GP VCCSUS3_3
AD38 VCCME VCCSUS3_3 M28
M26

2
VCCSUS3_3
AD39 L28
X01-37

USB
VCCME VCCSUS3_3
VCCSUS3_3 L26
+1.05V_RUN AD41 J28
VCCME VCCSUS3_3
J26
1.998A AF43 VCCME
VCCSUS3_3
VCCSUS3_3 H28
H26
VCCSUS3_3

1
C2705 C2710 C2706 AF41 G28
VCCME VCCSUS3_3

SC22U6D3V5MX-2GP

SC1U10V2KX-1GP
DY VCCSUS3_3 G26
+3.3V_ALW _PCH

SC10U10V5KX-2GP
AF42 F28

2
VCCME VCCSUS3_3
VCCSUS3_3 F26
V39 E28 +3.3V_ALW _PCH
VCCME VCCSUS3_3
E26

Clock and Miscellaneous


VCCSUS3_3

1
V41 VCCME VCCSUS3_3 C28
C26 C2701 X01.09/0819

A
VCCSUS3_3 SCD1U10V2KX-4GP +3.3V_RUN
V42 B27

2
VCCME VCCSUS3_3 D2702
VCCSUS3_3 A28

1
C2711 Y39 A26 SDMK0340L-7-F-GP
+1.05V_RUN VCCME VCCSUS3_3

SC1U10V2KX-1GP
DY +1.05V_RUN
Y41 U23

A
L2702 VCCME VCCSUS3_3
1 2 +1.05VS_VCCA_A_DPL Y42 V23 +5V_ALW _PCH D2701
COIL-10UH-9-GP VCCME VCCIO
SDMK0340L-7-F-GP
1

C C2712 F24 +5VALW _PCH_VCC5REFSUS 1 2 C


TC2702 DY SC1U10V2KX-1GP V5REF_SUS R2701 100R2J-2-GP X01.09/0819

K
ST220U2D5VBM-LGP +VCCRTCEXT V9 1 2
2

DCPRTC +5V_RUN
1
X01.09/0819 C2714 +1.5VS_+1.8VS C2713 SC1U10V2KX-1GP
SCD1U10V2KX-4GP K49 +5VS_PCH_VCC5REF 1 2
L2703 V5REF R2702 100R2J-2-GP
AU24
2

VCCVRM

PCI/GPIO/LPC

1
1 2 +1.05VS_VCCA_B_DPL C2715
COIL-10UH-9-GP J38 +3.3V_RUN SC1U10V2KX-1GP
VCC3_3
1

(10uH / 0.3 ohm / 100mA) C2716 BB51


72mA +1.05VS_VCCA_A_DPL

2
TC2701 DY SC1U10V2KX-1GP VCCADPLLA
BB53 L38
ST220U2D5VBM-LGP VCCADPLLA VCC3_3 X01-47
2

1
M36
73mA +1.05VS_VCCA_B_DPL BD51
BD53
VCCADPLLB
VCC3_3
N36
C2717
SCD1U10V2KX-4GP

2
VCCADPLLB VCC3_3
AH23 VCCIO VCC3_3 P36
AJ35 VCCIO
+1.05V_RUN AH35 U35 C2718
VCCIO VCC3_3 +3.3V_RUN
1 2
AF34 VCCIO
AD13 SCD1U10V2KX-4GP
VCC3_3
1

C2719 C2720 C2721 AH34


SC1U10V2KX-1GP SC1U10V2KX-1GP SC1U10V2KX-1GP VCCIO +1.05VS_VCCAPLL +1.05V_RUN
L2704
AF32
32mA
2

VCCIO
VCCSATAPLL AK3 1 DY 2
V12 DCPSST VCCSATAPLL AK1

1
C2722 C2723 IND-10UH-30-GP
+1.5V_PCH_DcpSST SC1U10V2KX-1GP DY DY SC1U10V2KX-1GP
B +1.05V_RUN B

2
1

+1.05V_PCH_DcpSUS Y22
C2724 DCPSUS
VCCIO AH22
1

SCD1U10V2KX-4GP
2

1
C2726 +1.5VS_+1.8VS C2725
SCD1U10V2KX-4GP P18 AT20 SC1U10V2KX-1GP
2

VCCSUS3_3 VCCVRM

2
+3.3V_ALW _PCH U19
SATA

VCCSUS3_3
PCI/GPIO/LPC

AH19
163mA U20 VCCSUS3_3
VCCIO
AD20
VCCIO
1

U22 VCCSUS3_3
C2727 AF22
SCD1U10V2KX-4GP +3.3V_RUN VCCIO
2

VCCIO AD19
V15 VCC3_3 VCCIO AF20
VCCIO AF19
1

V16 VCC3_3 VCCIO AH20


C2728
X01-37 SCD1U10V2KX-4GP Y16 AB19
2

VCC3_3 VCCIO
VCCIO AB20
+1.05V_VTT AB22
VCCIO +1.05V_RUN
14/15 AD22
1mA AT18 V_CPU_IO
VCCIO
AA34 PCH_VCC_1_1_20 R2703 1 2 0R2J-2-GP
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

CPU

VCCME
1

C2729 C2730 C2731 Y34 PCH_VCC_1_1_21 R2704 1 2 0R2J-2-GP


VCCME PCH_VCC_1_1_22 R2705 1 0R2J-2-GP
SC10U6D3V3MX-GP AU18 V_CPU_IO VCCME Y35 2
AA35 PCH_VCC_1_1_23 R2706 1 2 0R2J-2-GP
2

VCCME +3.3V_ALW _PCH


A
+3VS_+1.5VS_HDA_IO <Core Design> A

+RTC_CELL
RTC

A12 VCCRTC VCCSUSHDA L30 2 1


HDA

R2707 0R2J-2-GP
2mA 6mA Wistron Corporation
1

IBEXPEAK-M-GP-NF C2732 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


1

1
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C2735 C2733 C2734 SC1U10V2KX-1GP Taipei Hsien 221, Taiwan, R.O.C.


2

SC1U10V2KX-1GP
Title
2

PCH (8/9)

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Date: Thursday, October 29, 2009 Sheet 27 of 82
5 4 3 2 1
5 4 3 2 1

SSID = PCH PCH1I 9 OF 10


AY7 VSS VSS H49
B11 VSS VSS H5
B15 VSS VSS J24
B19 VSS VSS K11
B23 VSS VSS K43
B31 VSS VSS K47
B35 VSS VSS K7
B39 VSS VSS L14
B43 VSS VSS L18
B47 VSS VSS L2
D B7 VSS VSS L22 D
PCH1H 8 OF 10 BG12 L32
VSS VSS
AB16 VSS BB12 VSS VSS L36
BB16 VSS VSS L40
AA19 VSS VSS AK30 BB20 VSS VSS L52
AA20 VSS VSS AK31 BB24 VSS VSS M12
AA22 VSS VSS AK32 BB30 VSS VSS M16
AM19 VSS VSS AK34 BB34 VSS VSS M20
AA24 VSS VSS AK35 BB38 VSS VSS N38
AA26 VSS VSS AK38 BB42 VSS VSS M34
AA28 VSS VSS AK43 BB49 VSS VSS M38
AA30 VSS VSS AK46 BB5 VSS VSS M42
AA31 VSS VSS AK49 BC10 VSS VSS M46
AA32 VSS VSS AK5 BC14 VSS VSS M49
AB11 VSS VSS AK8 BC18 VSS VSS M5
AB15 VSS VSS AL2 BC2 VSS VSS M8
AB23 VSS VSS AL52 BC22 VSS VSS N24
AB30 VSS VSS AM11 BC32 VSS VSS P11
AB31 VSS VSS BB44 BC36 VSS VSS AD15
AB32 VSS VSS AD24 BC40 VSS VSS P22
AB39 VSS VSS AM20 BC44 VSS VSS P30
AB43 VSS VSS AM22 BC52 VSS VSS P32
AB47 VSS VSS AM24 BH9 VSS VSS P34
AB5 VSS VSS AM26 BD48 VSS VSS P42
AB8 VSS VSS AM28 BD49 VSS VSS P45
AC2 VSS VSS BA42 BD5 VSS VSS P47
AC52 VSS VSS AM30 BE12 VSS VSS R2
AD11 VSS VSS AM31 BE16 VSS VSS R52
AD12 VSS VSS AM32 BE20 VSS VSS T12
C AD16 AM34 BE24 T41 C
VSS VSS VSS VSS
AD23 VSS VSS AM35 BE30 VSS VSS T46
AD30 VSS VSS AM38 BE34 VSS VSS T49
AD31 VSS VSS AM39 BE38 VSS VSS T5
AD32 VSS VSS AM42 BE42 VSS VSS T8
AD34 VSS VSS AU20 BE46 VSS VSS U30
AU22 VSS VSS AM46 BE48 VSS VSS U31
AD42 VSS VSS AV22 BE50 VSS VSS U32
AD46 VSS VSS AM49 BE6 VSS VSS U34
AD49 VSS VSS AM7 BE8 VSS VSS P38
AD7 VSS VSS AA50 BF3 VSS VSS V11
AE2 VSS VSS BB10 BF49 VSS VSS P16
AE4 VSS VSS AN32 BF51 VSS VSS V19
AF12 VSS VSS AN50 BG18 VSS VSS V20
Y13 VSS VSS AN52 BG24 VSS VSS V22
AH49 VSS VSS AP12 BG4 VSS VSS V30
AU4 VSS VSS AP42 BG50 VSS VSS V31
AF35 VSS VSS AP46 BH11 VSS VSS V32
AP13 VSS VSS AP49 BH15 VSS VSS V34
AN34 VSS VSS AP5 BH19 VSS VSS V35
AF45 VSS VSS AP8 BH23 VSS VSS V38
AF46 VSS VSS AR2 BH31 VSS VSS V43
AF49 VSS VSS AR52 BH35 VSS VSS V45
AF5 VSS VSS AT11 BH39 VSS VSS V46
AF8 VSS VSS BA12 BH43 VSS VSS V47
AG2 VSS VSS AH48 BH47 VSS VSS V49
AG52 VSS VSS AT32 BH7 VSS VSS V5
AH11 VSS VSS AT36 C12 VSS VSS V7
AH15 VSS VSS AT41 C50 VSS VSS V8
B B
AH16 VSS VSS AT47 D51 VSS VSS W2
AH24 VSS VSS AT7 E12 VSS VSS W52
AH32 VSS VSS AV12 E16 VSS VSS Y11
AV18 VSS VSS AV16 E20 VSS VSS Y12
AH43 VSS VSS AV20 E24 VSS VSS Y15
AH47 VSS VSS AV24 E30 VSS VSS Y19
AH7 VSS VSS AV30 E34 VSS VSS Y23
AJ19 VSS VSS AV34 E38 VSS VSS Y28
AJ2 VSS VSS AV38 E42 VSS VSS Y30
AJ20 VSS VSS AV42 E46 VSS VSS Y31
AJ22 VSS VSS AV46 E48 VSS VSS Y32
AJ23 VSS VSS AV49 E6 VSS VSS Y38
AJ26 VSS VSS AV5 E8 VSS VSS Y43
AJ28 VSS VSS AV8 F49 VSS VSS Y46
AJ32 VSS VSS AW14 F5 VSS VSS P49
AJ34 VSS VSS AW18 G10 VSS VSS Y5
AT5 VSS VSS AW2 G14 VSS VSS Y6
AJ4 VSS VSS BF9 G18 VSS VSS Y8
AK12 VSS VSS AW32 G2 VSS VSS P24
AM41 VSS VSS AW36 G22 VSS VSS T43
AN19 VSS VSS AW40 G32 VSS VSS AD51
AK26 VSS VSS AW52 G36 VSS VSS AT8
AK22 VSS VSS AY11 G40 VSS VSS AD47
AK23 VSS VSS AY43 G44 VSS VSS Y47
AK28 VSS VSS AY47 G52 VSS VSS AT12
AF39 VSS VSS AM6
IBEXPEAK-M-GP-NF H16 AT13
VSS VSS
H20 VSS VSS AM5
A H30 VSS VSS AK45 <Core Design> A
H34 VSS VSS AK39
H38 VSS VSS AV14
H42 VSS Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

IBEXPEAK-M-GP-NF Title

PCH (9/9)

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A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 28 of 82
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blank)

B B

A A
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserve

5 4
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Date:
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1
29 of
Rev

82
X01
5 4 3 2 1

SSID = AUDIO
+VDDA +5V_RUN
+3.3V_RUN +3.3V_RUN Close to codec Close to codec Close to codec
1 2 +5V_RUN

SC1U10V3KX-3GP
R3002 0R2J-2-GP

SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AUD_DVDDCORE 2 1
+PVDD R3003 0R3J-0-U-GP

1
C3006

C3007
C3003 Close to codec

SC1U6D3V2KX-GP

SCD1U10V2KX-4GP
C3002
1

1
D D

C3004

C3005
SC10U6D3V5MX-3GP 2 1
R3004 0R3J-0-U-GP

2
U3001

SC1U10V3KX-3GP

SC10U6D3V3MX-GP
SCD1U10V2KX-4GP
2

C3008

C3009

C3010
1

1
1 DVDD_CORE AVDD 27
PCH_AZ_CODEC_BITCLK 66mA 38
AVDD
9

2
DVDD
1

120mA 39
R3005 3 DVDD_IO 1.35A
PVDD
PVDD 45 X01-28
DY 10KR2J-3-GP 120mA
13 AUD_SENSE_A
PCH_AZ_CODEC_BITCLK SENSE_A AUD_SENSE_B
6 14 AUD_SENSE_B 75
1 2

24 PCH_AZ_CODEC_BITCLK HDA_BITCLK SENSE_B


R3006 1 2 33R2J-2-GP PCH_CODEC_SDIN0_R 8
C3001 24 PCH_CODEC_SDIN0 HDA_SDI AUD_EXT_MIC_L C3011 1
DY HP0_PORT_A_L 28 2 SC2D2U25V5KX-1GP MIC_IN_L_2 60
SC10P50V2JN-4GP PCH_CODEC_SDOUT AUD_EXT_MIC_R C3012 1 2 SC2D2U25V5KX-1GP
5 29 MIC_IN_R_2 60 Ext. MIC
2

24 PCH_CODEC_SDOUT HDA_SDO HP0_PORT_A_R AUD_VREFOUT_B


VREFOUT_A_OR_F 23 AUD_VREFOUT_B 60
PCH_AZ_CODEC_SYNC 10
24 PCH_AZ_CODEC_SYNC HDA_SYNC AUD_HP_OUT_L R3007 1
HP1_PORT_B_L 31 2 60D4R2F-GP AUD_HP_JACK_L_2 60
PCH_AZ_CODEC_RST# AUD_HP_OUT_R R3008 1 2 60D4R2F-GP
24,75 PCH_AZ_CODEC_RST# 11 HDA_RST# HP1_PORT_B_R 32 AUD_HP_JACK_R_2 60 Hear Phone
PORT_C_L 19 AUD_SPK_L+ 60
PORT_C_R 20 AUD_SPK_L- 60
Digi. MIC AUD_DMIC_CLK VREFOUT_C 24 AUD_SPK_R- 60 Speaker
73 AUD_DMIC_IN0 1 2 AUD_DMIC_IN0_R
2
4
DMIC_CLK/GPIO1
DMIC0/GPIO2 SPKR_PORT_D_L+ 40 AUD_SPK_L+ AUD_SPK_R+ 60 X01-25
R3009 0R2J-2-GP 41 AUD_SPK_L-
+3.3V_RUN SPKR_PORT_D_L- SC1KP50V2KX-1GP
46 DMIC1/GPIO0/SPDIF_OUT_1
43 AUD_SPK_R- C3029 1 2 SC1KP50V2KX-1GP
SPKR_PORT_D_R- AUD_SPK_R+ C3030 1
C
R3010
1 DY 2
10KR2J-3-GP
48 SPDIF_OUT_0 SPKR_PORT_D_R+ 44
R3014 2KR2F-3-GP
2
DOCK HP C

AUD_NB_MUTE 47 15 AUD_DOCK_HP_OUT_L 2 1 AUD_DOCK_HP_OUT_L_C1 C3039 2 1SC1U16V3KX-2GP AUD_DOCK_HP_L_OUT 75


38 AUD_NB_MUTE EAPD PORT_E_L AUD_DOCK_HP_OUT_R AUD_DOCK_HP_OUT_R_C1 C3040 2
PORT_E_R 16 2 1 1SC1U16V3KX-2GP AUD_DOCK_HP_R_OUT 75
R3025 2KR2F-3-GP
PUMP_CAPN 17 AUD_DOCK_MIC_IN_L C3035 2 SC1U16V3KX-2GP
1 AUD_DOCK_MIC_IN_L_C1 R3028 2 1 2KR2F-3-GP
PORT_F_L AUD_DOCK_MIC_L_IN 75
35 18 AUD_DOCK_MIC_IN_R C3036 2 1 AUD_DOCK_MIC_IN_R_C1 R3029 2 1 2KR2F-3-GP
CAP- PORT_F_R AUD_DOCK_MIC_R_IN 75

1
C3017
SC2D2U25V5KX-1GP AUD_PC_BEEP SC1U16V3KX-2GP C3031 1
2 36 CAP+
PC_BEEP 12
AUD_PC_BEEP C3032 1
2
2 DOCK MIC
PUMP_CAPP 25
MONO_OUT
Trace width>15 mils SC1KP50V2KX-1GP
7 DVSS 2 1 ACZ_SPKR_R 1 2 ACZ_SPKR 24 From PCH
C3020 SCD1U10V2KX-4GP R3013 499KR2F-1-GP
+3.3V_RUN AUD_CAP2 1 EC_BEEP
33 AVSS CAP2 22 2 1 2 BEEP 37 From EC
U3002 30 C3021 SCD1U10V2KX-4GP R3016 499KR2F-1-GP
AVSS

2
5 1 26 21 AUD_VREFFLT
VCC OE# AVSS VREFFILT
2
AUD_DMIC_CLK_Y 4 DY A
3 42 34 AUD_V_B R3015
Y GND PVSS V-
DUMMY-C2
74LVC1G125DC-GP 49 37 AUD_VREG
GND VREG
1

1/1 Buffer

SC4D7U6D3V3KX-GP

1
C3022

C3025
SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC1U6D3V2KX-GP
0R2J-2-GP

C3023

C3024
DY 92HD81B1A5NLGXUAX8-GP

1
R3018

71.92H81.G03
2

2
1 2 AUD_DMIC_CLK
73 AUD_DMIC_CLK_G R3019 100R2J-2-GP YD version need d-pop circuit
1

AUD_HP_JACK_R_2 AUD_HP_JACK_L_2
EC3001 UA version no need d-pop circuit
B DY B
SC22P50V2JN-4GP UA PN: 71.92H81.G03
2

+15V_ALW
Close to codec

D
Q3002 Q3003

1
DY AO3418-GP DY AO3418-GP
X01-28 R3020 G G
+VDDA DY 100KR2J-1-GP

S
Place this block
Azalia I/F EMI

2
1

R3021 close to Audio Codec Pin13 HP_CODEC_MUTE AUD_HP_L_Q


PCH_CODEC_SDOUT 2K49R2F-GP AUD_HP_R_Q

D
2

S
1

AUD_SENSE_A
R3022 Q3004 G G
1

DY 47R2J-2-GP DY 2N7002A-7-GP DY Q3001


C3026 R3001 R3023 AUD_NB_MUTE G DY Q3005 AO3418-GP
SC1KP50V2KX-1GP 20KR2F-L-GP 39K2R2F-L-GP +3.3V_RUN AO3418-GP
2

D
PCH_AZ_CODEC_SDOUT1

2 1
2

S
HP_NB_SENSE R3024 100KR2J-1-GP Low -> Mute
AUD_MIC_SWITCH 60
3

For Codec pop noise.


A Q3006 A
<Core Design>
DMN66D0LDW-7-GP
4

6
1

DY C3027 Wistron Corporation


SCD1U10V2KX-4GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2

MIC_SWITCH Taipei Hsien 221, Taiwan, R.O.C.


AUD_HP_NB_SENSE 38,60 Title

Audio Codec

5 4
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Date:
Document Number

Thursday, October 29, 2009


Fonseca UMA
Sheet
1
30 of
Rev

82
X01
5 4 3 2 1

D D

C C

(Blank)

B B

A A
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserve

5 4
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3 2
Size
Custom

Date:
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Thursday, October 29, 2009 Sheet
1
31 of
Rev

82
X01
5 4 3 2 1

SSID = 1394
+3.3V_RUN +3.3V_RUN_CB

SC10U6D3V5MX-3GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
1 2
PCIE_VOUT/VIN R3201 0R5J-5-GP
1

1
C3202

C3203

C3204

C3205

C3206
2

2
D D
+3.3V_RUN_CB U3201

K3 M4 CBS_CAD26
VCC_3V CADR0 CBS_CAD25
J4 N4
VCC_3V CADR1 CBS_CAD24
Close to VCC_3V_R5U242 C10
VCC_3V CADR2
N3
+3.3V_RUN_CB M3 CBS_CAD23
PCIE_VOUT/VIN CADR3 CBS_CAD22
N11 L3
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

PCIE_VIN CADR4 CBS_CAD21


M11 M2
PCIE_VIN CADR5 CBS_CAD20
M13 M1
PCIE_VIN CADR6 CBS_CAD18
L1
CADR7
1

J3 E3 CBS_CC/BE1#
SDMSXD_VCC PCIE_VOUT CADR8 CBS_CC/BE1# 72
CBS_CAD14
C3208

C3207

C8 D2
PCIE_VOUT CADR9 CBS_CAD9
C3 CBS_CAD[0..31] 72
2

+3.3V_RUN_CB SDMSXD_VCC trace = 40mil CADR10 CBS_CAD12


D13 C2
MF_VOUT CADR11 CBS_CC/BE2#
K1 CBS_CC/BE2# 72
CADR12 CBS_CPAR
D7 F1 CBS_CPAR 72
AVCC_3V CADR13 CBS_CPERR#
G1 CBS_CPERR# 72
VCC_SD CADR14 CBS_CIRDY#
2 1 C3220 D8 J2 CBS_CIRDY# 72
SD18C CADR15
X01.09/0918 SC1U10V2KX-1GP
CADR16
H3 CBS_CCLK_R 2 1 CBS_CCLK 72
Close to AVCC_3V_R5U242 E2 CBS_CAD16 R3204 0R2J-2-GP
CADR17 CBS_DATA18
23 CLK_PCIE_R5U241# M8 F2 CBS_DATA18 72
+3.3V_RUN_CB REFCLKN CADR18
23 CLK_PCIE_R5U241 N8 G2 CBS_CBLOCK#
CBS_CBLOCK# 72
Shield GND
REFCLKP CADR19 CBS_CSTOP#
F3 CBS_CSTOP# 72
CADR20 CBS_CDEVSEL#
M10 G3
SC1U6D3V2KX-GP

SCD1U10V2KX-4GP

23 PCIE_PTX_R5U241RX_N3_C RXN CADR21 CBS_CDEVSEL# 72


N10 J1 CBS_CTRDY#
23 PCIE_PTX_R5U241RX_P3_C RXP CADR22 CBS_CTRDY# 72
H4 CBS_CFRAME#
CADR23 CBS_CFRAME# 72
RXC_R5U241 L9 K2 CBS_CAD17
RXC CADR24
1

L2 CBS_CAD19
C3209 CADR25
2SCD1U10V2KX-4GP PCIE_PRX_R5U241TX_N3_C
C3211

C3212

1 N13
23 PCIE_PRX_R5U241TX_N3 PCIE_PRX_R5U241TX_P3_C TXN CBS_CAD27
1 2 N12 N5
2

23 PCIE_PRX_R5U241TX_P3 C3210 SCD1U10V2KX-4GP TXP CDATA0 CBS_CAD29


N6
CPO_R5U241 CDATA1 CBS_DATA2
L10 N7 CBS_DATA2 72
RREF_R5U241 CPO CDATA2 CBS_CAD0
L11 C5
CB_RST#_R RREF CDATA3 CBS_CAD1
21,34,35,64 PLTRST4# 1 2 M12 A4
R3202 0R2J-2-GP PERST# CDATA4 CBS_CAD3
A3
CDATA5 CBS_CAD5
A2
CDATA6 CBS_CAD7
C
71 TPA0N B5 A1 C
TPAN0 CDATA7 CBS_CAD28
Close to chip 71 TPA0P A5
TPAP0 CDATA8
M5
M6 CBS_CAD30
SDMSXD_VCC CDATA9 CBS_CAD31
71 TPB0N B6 M7
TPBN0 CDATA10 CBS_CAD2
71 TPB0P A6 B4
TPBP0 CDATA11 CBS_CAD4
C4
C3214 +3.3V_RUN_CB CDATA12 CBS_CAD6
C7 B3
71 TPBIAS0 TPBIAS0 CDATA13
1

SCD1U10V2KX-4GP B2 CBS_DATA14
CDATA14 CBS_DATA14 72
1 2 CPS D4 B1 CBS_CAD8
R3203 0R2J-2-GP CPS CDATA15
X01-43
2

D1 CBS_CAD13 IORD#=>USBD+
1394_XI IORD# CBS_CAD15
A8 E1 IOWR#=>USBD-
1394_XO_R XI IOWR#
B8
XO CBS_CAD11
C1
RN3202 OE# CBS_CGNT#
F4
SRN0J-6-GP SDBDAT0 WE# CBS_CGNT# 72
2 3 A11
SD_MMC_CLK_R SDBDAT1 GND CBS_CC/BE0#
1 4 B11 D5 CBS_CC/BE0# 72
SDBDAT2 GND CE1# CBS_CAD10
B9 D3
SDBDAT3 SDBDAT3 GND CE2#
8 1 A9
GND
1

7 2 SDBDAT2 K7 CBS_CSTSCHNG
BVD1 CBS_CSTSCHNG 72
DY C3219 SDBCLK SDBCMD CBS_CAUDIO
SC4D7P50V2CN-1GP X01-20 6
5
3
4 SDBCMD SDBCLK
C9
A10
GND BVD2
L6 CBS_CAUDIO 72
2

SDBWP# GND CBS_CCD1#


2 1 B10 D6 CBS_CCD1# 72
RN3201 SRN0J-7-GP R3214 0R2J-2-GP GND CD1# CBS_CCD2#
G10 K8 CBS_CCD2# 72
MFCD2# CD2#
H10
NC#H10 CBS_CVS1
E4
CPO_R5U241 VS1# CBS_CVS2 CBS_CVS1 72
K5
VS2# CBS_CVS2 72
K13
UDIO0
1

R5U241 Open PCMCLK_REQ# K12 L4 CBS_CC/BE3#


23,58 PCMCLK_REQ# UDIO1 REG# CBS_CC/BE3# 72
C3201 J13 G4 CBS_CINT#
SC1500P50V2KX-2GP R5U242 GND J12
UDIO2 RDY/IREQ
L7 CBS_CCLKRUN#
CBS_CINT# 72
CBS_CCLKRUN# 72
2

UDIO3 WP#/IOIS16# CBS_CRST#


J11 N1
UDIO4 RESET CBS_CSERR# CBS_CRST# 72
H11 N2
UDIO5 WAIT# CBS_CREQ# CBS_CSERR# 72
K6 CBS_CREQ# 72
INPACK#
RXC_R5U241 CBS_SPK J10
SPKROUT VPPEN0
L13 E10
X01-20 GBRST# K9
WAKE#
GBRST#
VPPEN0
VPPEN1
D9 VPPEN1 VPPEN0
VPPEN1
72
72
1

B B
K10
C3215 TEST VCC5EN#
E11
SCD022U16V2KX-3GP 71 SDWP VCC5EN# VCC3EN# VCC5EN# 72
F10
2

VCC3EN# VCC3EN# 72
H13
MFIO0 +3.3V_RUN_CB
71 SD_MMC_DAT1 1 R3211 2 33R2J-2-GP SD_MMC_DAT1_R H12
SD_MMC_DAT0_R MFIO1
71 SD_MMC_DAT0 1 R3212 2 33R2J-2-GP G13 K11
MFIO2 AGND
G12 L12
RREF_R5U241 MFIO3 AGND
F13
MFIO4

1
R3207 close to U3201 1 R3205 2 33R2J-2-GP SD_MMC_CLK_R F12 M9
trace need Shield GND 71 SD_MMC_CLK MFIO5 GND
D12
MFIO6 GND
N9 X01.09/0825 R3206
1

D10 E13 47KR2J-2-GP


R3207 SD_MMC_CMD_R MFIO7 GND
71 SD_MMC_CMD 1 R3210 2 0R2J-2-GP C13 E12
5K1R2F-2-GP MFIO8 GND
C12 L8

2
SD_MMC_DAT3_R MFIO9 GND
71 SD_MMC_DAT3 1 R3213 2 33R2J-2-GP B13 L5
MFIO10 GND
71 SD_MMC_DAT2 1 R3215 2 33R2J-2-GP SD_MMC_DAT2_R C11 K4 GBRST#
2

MFIO11 GND USBP12-


A13 H2 USBP12- 21,34,72
MFIO12 USBDM

1
B12 H1 USBP12+ USBP12+ 21,34,72
MFIO13 USBDP
Close to U3201 A12 A7 C3216
MFIO14 GND SC1U10V2KX-1GP
B7

2
SD_MMC_CD# GND
71 SD_MMC_CD# F11 C6
+3.3V_RUN_CB MFCD0# GND
G11 D11
MFCD1# GND

1 2 CBS_SPK
R5U242-CSP144P-GP-U Global Reset (GBRST#)
R3208 47KR2F-GP
Note:De-asserted before PERST# de-assertion
X01.09/0918
R5U242
1394_XI

X3201
1 2 1394_XO 1 2 1394_XO_R
A R3209 0R2J-2-GP A
X-24D576MHZ-70GP

<Core Design>
1

C3217 C3218
SC15P50V2JN-2-GP SC15P50V2JN-2-GP

Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title

WWW.AliSaler.Com
Xtal for XO/XI as close as possible to U3201
Flash Reader / 1394 / PCMCIA
Size Document Number Rev
C
Fonseca UMA X01
Date: Thursday, October 29, 2009 Sheet 32 of 82
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blank)

B B

A A
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserve

5 4
WWW.AliSaler.Com
3 2
Size
Custom

Date:
Document Number
Fonseca UMA
Thursday, October 29, 2009 Sheet
1
33 of
Rev

82
X01
5 4 3 2 1

SSID = SmartCard

D D

SmartCard Chip
+3.3V_RUN +5V_RUN

SCD1U10V2KX-4GP
2 SC1C3404 1
C3405
SC2 SCD1U10V2KX-4GP R3402
1 SC 2
15KR2F-GP

SC4D7U6D3V3KX-GP
2 SC1C3406 1
C3407
SC2 SC4D7U6D3V3KX-GP R3406
1 SC 2
15KR2F-GP

R3407
1 SC 2
15KR2F-GP
U3401 1 SC 2
5 19 SC_DP_D- R3408 15KR2F-GP
5_0VCC DP_DN SC_DP_D+
28 5_0VCC SC DP_DP 18

Place R near U3201 1 SC 2 8 21 SC_EG_D- SC_EG_D- 67


R3403 1K5R2J-3-GP 3_3VCC EGATE_DN SC_EG_D+
EGATE_DP 20 SC_EG_D+ 67
C 21,32,72 USBP12- 1 SC 2 USBP-_SC 17 C
R3404 UP_DN
21,32,72 USBP12+ 1 SC 2 0R2J-2-GP USBP+_SC 16 UP_DP SC_VCC 27 SC_VCC SC_VCC 67 SC_VCC
R3405 0R2J-2-GP 24 SC_RST# SC_RST# 67
SC_RST# SC_CLK
21,32,35,64 PLTRST4# 12 RST# SC_CLK 23 SC_CLK 67
22 SC_C4 SC_C4 67
SC_C4

1
23 CLK_SC_48M 3 25 SC_IO SC_IO 67 C3402 C3403
48M_IN SC_IO SC_DET#
4 NC#4 SC_DET# 13 SC_DET# 67 SC SC

SC4D7U6D3V3KX-GP

SCD1U10V2KX-4GP
2

2
MODE0_LED 32 MODE0/SC_LED RFIO1
1 MODE1 RFIO_1 15
CLK_SC_48M 2 14 RFIO0
MODE2 RFIO_0
1

OZ77CR6LN-GP-U1

1
R3411 9 GND

VR_CPR_0
VR_CPR_1
DY 10KR2J-3-GP R3409 11 7 R3401 R3410
GND NC#7

3V_CPR
4K7R2J-2-GP SC 26 30 SC SC
GND NC#30
33 31 Please Near U3401
1 2

GND NC#31

0R2J-2-GP

0R2J-2-GP
2

2
DY C3409

6
10

29
SC10P50V2JN-4GP SC_C4
2

This pin connects to the C4 pin of the Smart Card connector.


It is required to support ISO7816-10 synchronous type 2 cards.

1
C3408 C3401
SC SC

SC1U10V2KX-1GP
SC1U10V2KX-1GP
X01.09/0819

2
B B

VR filter.
An external capacitor shall connect to this terminal.

This terminal is an output indicating Smart Card activity; Contactless Smart Card Interface Signal 0 and 1.
capable to drive an external LED device. This signal provides detection and data communication
The SC_LED terminal drives a low logic level during Smart Card data RFIO_0 with an external RF device.
read/write activity, and is capable to source 12mA of IOL current to If contactless is disabled, then this terminal shall be pulled-down
drive an external LED circuit. RFIO_1
to GND through a pull-down resistor, or directly connected to GND.
When RST# is asserted, this terminal is sampled to select the
MODE0 / SC_LED downstream port configuration for DP_DP and DP_DN (Internal Port 1).

When sampled low (4.7k), the downstream port device is removable.

A
When sampled high, the downstream port is a non-removable device. A
Includes internal input pull-up resistor. <Core Design>

MODE1 Test Pin. This terminal shall be externally connected to GND. Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
MODE2 Test Pin. This terminal shall be externally connected to GND.
Title

Smart Card (OZ77CR6LN)

5 4
WWW.AliSaler.Com 3 2
Size
Custom

Date:
Document Number
Fonseca UMA
Thursday, October 29, 2009 Sheet
1
34 of
Rev

82
X01
5 4 3 2 1

SSID = LOM +3.3V_LAN +3.3V_ALW_2 +15V_ALW +3.3V_ALW +3.3V_LAN


+3.3V_LAN X01.09/0825
RN3502
Symbol : 71.05761.00U

1
LAN_SMBDATA0 3 2
LAN_SMBCLK0 4 1 R3502 R3503
Product : P802H (Rev:B0) 100KR2J-1-GP 100KR2J-1-GP U3504
U3503 SRN2K2J-1-GP 1 D D 6
LOM_SMBCLK 1 6 LAN_SMBCLK 37 2 D D 5

2
RN3503 +3.3V_LAN_EN1 +3.3V_LAN_EN2 3 G S 4
2 5 SMBCLK 3 2
SMBDATA 4 1 SI3456DDV-T1-GE3-GP
3 4
SRN2K2J-1-GP

1
DMN66D0LDW-7-GP +3.3V_LAN

1
LOM_SMBDAT U3502 R3504 C3502
DMN66D0LDW-7-GP DY 470KR2J-2-GP SC4700P50V2KX-1GP

1
LAN_SMBDAT 37

2
D D
R3505

2
4K7R2J-2-GP

2
+1.2V_LOM U3501A 1 OF 2
Core Power Decoupling +3.3V_LAN Design current: 89.6mA
E4 A11 APE_GPIO0 1 Max current: 128mA

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
TP3502

SC4D7U6D3V3KX-GP
VDDC APE_GPIO0 LOM_SMB_ALERT#
E7 A10
VDDC APE_GPIO1 LOM_SMB_ALERT# 38

1
APE_GPIO2

C3505

C3506

C3503

C3507

C3508

C3501

C3509

C3504

C3510
F5 A9 1 TP3517
VDDC APE_GPIO2

1
2
H9 A8 APE_GPIO3 1
VDDC APE_GPIO3 TP3503
J4 A7 APE_GPIO4 1 TP3504

2
VDDC APE_GPIO4 APE_GPIO5 RN3504 AUX_ON_R 1
K4 A2 1 TP3505 2 AUX_ON 37
VDDC APE_GPIO5 APE_GPIO6 SRN2K2J-1-GP R3507 0R2J-2-GP
K7 B1 1 TP3506
VDDC APE_GPIO6
L4
VDDC SMBCLK
E8

4
3
+3.3V_LAN VDDC_IO SMB_CLK LAN_SMBCLK0 LOM_SMBCLK
M13 A3 1 2
VDDC_IO APE_SMB_CLK0 LAN_SMBCLK1 R3508 0R2J-2-GP
VDDIOPower Decoupling APE_SMB_CLK1
A5
B7 C7 SMBDATA
VDDIO SMB_DATA LAN_SMBDATA0 LOM_SMBDAT
B11 A4 1 2
VDDIO APE_SMB_DATA0
1

1
C3511 C3512 C3513 C3514 G11 A6 LAN_SMBDATA1 R3509 0R2J-2-GP
SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP SC4D7U6D3V3KX-GP VDDIO APE_SMB_DATA1
D2
VDDIO USB-_LAN
H2 H1 1 TP3519
2

2
VDDIO HUSB_DN USB+_LAN
K3 G1 1 TP3518
VDDIO HUSB_DP
N2
VDDIO
+1.2V_LOM J1
Put 0.1u cap close to Chip
VDDIO_USB
VSS
A1 X01-39
1 2 +1.2V_AVDDL E11 A12
L3502 AVDDL VSS
D11 A13
BLM18AG601SN-3GP AVDDL VSS +1.2V_LOM SIO_SLP_S3#
Co-Layout +3.3V_LAN
1
C3515
2

SC4D7U6D3V3KX-GP
1
C3516
2

SCD1U10V2KX-4GP
1
C3517
2

SCD1U10V2KX-4GP
C11

E10
AVDDL VSS
VSS
B4
B10
D6
9,22,38,50 SIO_SLP_S3#
IRQ_SERIRQ
AVDDH VSS
U3505 D10
AVDDH VSS
E5
1 2 +2.5V_AVDD F11 E9 +1.2V_PCIE_PLLVDD 1 2
L3501 BLM18AG601SN-3GP AVDDH VSS L3503 +3.3V_LAN
F6
VSS

4
+2.5V_XTALVDD SCD1U10V2KX-4GP 2 C3518 BLM18AG601SN-3GP
C3520

C3521

C3522
L7 F7 1 2 1
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
XTALVDDH VSS
1

F8 C3519
VSS

1
C +2.5V_BIASVDD F12 F9 SC4D7U6D3V3KX-GP Q3502 R3548 C
U3506 BIASVDDH VSS
G5 +1.2V_PCIE_SDSVDD 1 2 DMN66D0LDW-7-GP 100KR2J-1-GP
X01-22
SCD1U10V2KX-4GP
2

+1.2V_USB_PLLVDD VSS L3504

C3523

C3524
L1 G6

SCD1U10V2KX-4GP

3
USB_PLLVDDL VSS
1

1
G7 SCD1U10V2KX-4GP 1 2 C3525 2 1 BLM18AG601SN-3GP
+1.2V_PCIE_SDSVDD VSS C3526
N4 G8

2
PCIE_SDSVDD VSS SC4D7U6D3V3KX-GP
G9
2

2
U3507 +3.3V_LAN +1.2V_PCIE_PLLVDD VSS +1.2V_GPHY_PLLVDD
L5 G10 1 2
PCIE_PLLVDDL VSS L3505
H4
+3.3V_LAN LOM_CS# +1.2V_GPHY_PLLVDD VSS SCD1U10V2KX-4GP
1 DY 8 G12 H5 1 2 C3527 2 1 BLM18AG601SN-3GP
LOM_SI S# VCC +3.3V_LAN GPHY_PLLVDDL VSS C3528
2 7 H6
Q RESET# LOM_SCLK VSS SC4D7U6D3V3KX-GP
3 6 H7
TSL#/W# C LOM_SO VSS +1.2V_USB_PLLVDD
4 5 1 2 H10 1 2
VSS D L3506 BLM18AG601SN-3GP VSS L3507
J5
VSS SCD1U10V2KX-4GP
K1 1 2 C3529 2 1 BLM18AG601SN-3GP
M25PE80-VMN6TP-GP VSS
1 2 TP3507 1 G3 K5
L3508 BLM18AG601SN-3GP TDI VSS C3530
TP3508 1 F2 L6
TMS VSS SC4D7U6D3V3KX-GP
TP3509 1 D5 M1
TDO VSS
TP3510 1 C6 M4
+3.3V_LAN U3505 +3.3V_LAN TCK VSS
TP3511 1 C3 M6
NB_GPHY_TVCOI TRST# VSS
DY 1 DY 2 4K7R2J-2-GP F10
NB_GPHY_TVCOI VSS
N1 Close to the power pins and
6 5 R3512 1 DY 2 4K7R2J-2-GP DK_GPHY_TVCOI N13 N6
VCC WP#
4 LOM_CS# R3513 DK_GPHY_TVCOI VSS 0.1u cap should be closer to Chip
CS#
RESET#
3 Populate resister for debug
LOM_SO 1 BCM5761EA0KFBG-GP
SI
1

LOM_SI 8 C3543
LOM_SCLK SO SCD1U10V2KX-4GP
2 7
SCK GND U3501B 2 OF 2
2

Small PAD X01.09/0918


AT45DB081D-SSU-GP H12 M9 LOM_XTALI
74 DOCK_LOM_TRD0+ DK_TRD0+ XTALI
72.45081.B01 H13 N9 LOM_XTALO 1 2 LOM_XTAL1 Place crystal less
74 DOCK_LOM_TRD0- DK_TRD0- XTALO
J12 R3514 200R2F-L-GP X3501
74 DOCK_LOM_TRD1+ DK_TRD1+ than 0.75" (~1.9cm)
74 DOCK_LOM_TRD1- J13 2 1
+3.3V_LAN U3506 +3.3V_LAN DK_TRD1-
74 DOCK_LOM_TRD2+ K12
DK_TRD2+ DK_LINKLED#
E3
DOCK_LOM_SPD10LED_GRN# 74 from LAN Controller
K13 E2 XTAL-25MHZ-96GP
74 DOCK_LOM_TRD2- DK_TRD2- DK_SPD100LED# DOCK_LOM_SPD100LED_ORG# 74
6 5 74 DOCK_LOM_TRD3+ L12 D3
VCC WP# DK_TRD3+ DK_SPD1000LED#

1
4 LOM_CS# L13 F3 C3532 C3533
CS# 74 DOCK_LOM_TRD3- DK_TRD3- DK_TRAFFICLED# DOCK_LOM_ACTLED_YEL# 74
3 B8 NB_LOM_SPD10LED_GRN# 1 2 SC15P50V2JN-2-GP SC15P50V2JN-2-GP
LOM_SO RESET# NB_LINKLED# NB_LOM_SPD100LED_ORG# R3515 1 NB_LOM_SPD10LED_GRN#_R 76
B 1 76 NB_LOM_TRD0+ E12 C8 2 150R2F-1-GP B

2
LOM_SI SI NB_TRD0+ NB_SPD100L# R3516 150R2F-1-GP NB_LOM_SPD100LED_ORG#_R 76
8 76 NB_LOM_TRD0- E13 D8
LOM_SCLK SO NB_TRD0- NB_SPD1000LED# NB_LOM_ACTLED_YEL#
2 7 76 NB_LOM_TRD1+ D12 D7 1 2
SCK GND NB_TRD1+ NB_TRAFFICLED# R3517 150R2F-1-GP NB_LOM_ACTLED_YEL#_R 76
76 NB_LOM_TRD1- D13
Big PAD DOCKED C12
NB_TRD1-
C10 LOM_CS# 1 DY 2 +3.3V_LAN
76 NB_LOM_TRD2+ NB_TRD2+ CS#
AT45DB081D-SU-SL955-GP C13 R3518 4K7R2J-2-GP
SEL 0:RJ45. 76 NB_LOM_TRD2- NB_TRD2-
72.45081.C01 B12 K2 LOM_NV_STRAP0 1 DY 2
76 NB_LOM_TRD3+ NB_TRD3+ NV_STRAP0
SEL 1:Dock. B13 M2 LOM_NV_STRAP1 R3519 1 DY 2 4K7R2J-2-GP
76 NB_LOM_TRD3- NB_TRD3- NV_STRAP1
8Mb for 5761E: R3520 4K7R2J-2-GP
38 DOCKED DOCKED F4 D9 LOM_SI 1 DY 2
Main source: 72.45081.C01(Big PAD) 1 DY 0R2J-2-GP
2 LOM_CABLE_DET C4
E_SWITCH_CONT SI
C9 LOM_SO R3521 1 DY 2 4K7R2J-2-GP
38 LOM_CABLE_DETECT R3522 ENERGYDET SO LOM_SCLK R3523 1
2nd source: 72.45081.B01(Small PAD) B9 DY 2 4K7R2J-2-GP
SCLK R3524 4K7R2J-2-GP

N8
GPIO0 LOM_GPIO1 1 +3.3V_LAN
M8 TP3512
GPIO1 LOM_GPIO2 1
X01.09/0917 GPIO2
C5 TP3501
CLK_PCI_TPM H8
+3.3V_LAN 23,70 CLK_PCI_TPM LCLK
J3 LOM_SERIAL_DI 1 DY 2 +3.3V_LAN
SERIAL_DI

1
0R2J-2-GP 1B_TPM 2 R3526 LPC_LAD0_BTPM L9 L3 LOM_SERIAL_DO R3525 1 DY 2 4K7R2J-2-GP
24,36,37,38,70 LPC_LAD0 LAD0 SERIAL_DO

1
0R2J-2-GP 1B_TPM 2 R3528 LPC_LAD1_BTPM J8 R3527 4K7R2J-2-GP R3531 C3535
24,36,37,38,70 LPC_LAD1 LAD1
1

0R2J-2-GP 1B_TPM 2 R3529 LPC_LAD2_BTPM K10 J2 LAN_LOW_PWR 1R2512J-1-GP C3534 SC4D7U6D3V3KX-GP


24,36,37,38,70 LPC_LAD2 LAD2 LOW_PWR LAN_LOW_PWR 38
CTPM and DisableBTPM 0R2J-2-GP 1B_TPM 2 R3532 LPC_LAD3_BTPM J10 K11 SUPER_LOW_PWR SCD1U10V2KX-4GP
24,36,37,38,70 LPC_LAD3

2
LAD3 PWR_DOWN RN3501

2
1
R3530 24,36,37,38,70 LPC_LFRAME# 0R2J-2-GP 1B_TPM 2 R3533 LPC_LFRAME#_BTPM L11 B6 VAUX_PRSNT 2 3 +3.3V_LAN
4K7R2J-2-GP 0R2J-2-GP LFRAME# VAUXPRSNT
1B_TPM 2 R3534 LOM_PCIE_RST#_L L8 H11 VMAIN_PRSNT 1 4 +3.3V_RUN +3.3V_LAN_R
2

36 LOM_PCIE_RST# LRESET# VMAINPRSNT


0R2J-2-GP 1 2 R3535 IRQ_SERIRQ_R L10 SRN1KJ-7-GP R3536
24,36,37,38 IRQ_SERIRQ SERIRQ

3
2B_TPM 1 LOM_TPM_EN#_R L2 0R2J-2-GP Logic High Voltage must
38 LOM_TPM_EN# TPM_EN#
R3537 0R2J-2-GP F13 NB_LOM_RDAC 2 1

2
NB_RDAC be 0.7V to 2.75V
1

1 DY 2 TPM_GPIO0 K9 G13 DOCK_LOM_RDAC 1K24R2F-GP 2 1 R3538 Design Current: 627mA


TPM_GPIO0 DK_RDAC
X01.09/0819 B_TPM R3539 1 DY 2 10KR2J-3-GP TPM_GPIO1 K8
TPM_GPIO1
1K24R2F-GP R3540 1 Q3501
R3543 10KR2J-3-GP TPM_GPIO2 J9 NJT4030PT1G-GP
R3542 TPM_GPIO2/TPMSTATUS
N11
REGSUP12
2

4K7R2J-2-GP R3544 M12 +1.2V_LOM


+1.2V_LOM
2

2
4
REGSEN12

2
10KR2J-3-GP M11 LOM_REGCTL12_PNP C3536 C3537
REGCTL12 LOM_REGCTL25_PNP
CTPM and DisableBTPM N12 2 1VDDC_IO 1 2 SCD047U10V2KX-2GP DY
REGIO_OUT12 R3545 0R2J-2-GP SC1U10V2KX-1GP
Reserve for EMI TP3513 1 C1

1
NC#C1

1
+3.3V_LAN 1 D1 C3538 C3539
TP3514
1

A NC#D1 SCD1U10V2KX-4GP SC10U6D3V5KX-1GP A


D4 N7 PCIE_PTX_GLANRX_P6_C 23
CLK_PCI_TPM RN3505 NC#D4 PCIE_RXDP
TP3515 1 E1 M7 PCIE_PTX_GLANRX_N6_C 23

2
NC#E1 PCIE_RXDN
1 8 E6
NC#E6
1

2 7 LPC_LFRAME#_BTPM 1 F1 N3 PCIE_PRX_GLANTX_P_C 2 1 <Core Design>


TP3516 NC#F1 PCIE_TXDP PCIE_PRX_GLANTX_P6 23 +3.3V_RUN
R3501 3 6 LPC_LAD3_BTPM G2 M3 PCIE_PRX_GLANTX_N_C SCD1U10V2KX-4GP 2 1 C3540
NC#G2 PCIE_TXDN PCIE_PRX_GLANTX_N6 23
DY 22R2J-2-GP 4 5 LPC_LAD2_BTPM G4
NC#G4
SCD1U10V2KX-4GP C3541
CTPM SRN10KJ-6-GP
and DisableBTPM H3
NC#H3 REFCLK+
N5 CLK_PCIE_LOM 23 Wistron Corporation

1
J6 M5 CLK_PCIE_LOM# 23 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2

CLK_PCIGLAN NC#J6 REFCLK- R3546


J7 Taipei Hsien 221, Taiwan, R.O.C.
RN3506 NC#J7
J11 B3 10KR2J-3-GP
NC#J11 REFCLK_SEL
1

C3542 1 8 LPC_LAD0_BTPM K6 B2 LOM_PCIE_RST# 1 2


NC#K6 PERST# PLTRST4# 21,32,34,64 Title
DY SC4D7P50V2CN-1GP 2 7 CLK_PCI_TPM M10 B5 R3547 0R2J-2-GP
GLAN - BCM5761E

2
LPC_LAD1_BTPM NC#M10 WAKE# LOM_CLKREQ# PCIE_WAKE# 38,64,72
3 6 N10 C2
2

NC#N10 CLKREQ# LOM_CLKREQ# 23

WWW.AliSaler.Com
4 5 LOM_PCIE_RST#_L
Size Document Number Rev
CTPM SRN10KJ-6-GP
and DisableBTPM Custom X01
BCM5761EA0KFBG-GP Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 35 of 82

5 4 3 2 1
5 4 3 2 1

SSID = TCM
Symbol : Jetway, but linked to ZTE
Product : 71.08172.00W (ZTE)

D D

China TPM Chip


X01-10 +3.3V_RUN
U3601

1 GPIO1 NC VDD 10

TP3601 TCM_GPIO3
2 GPIO2 NC VDD 19
C3603 C3604
1 6 GPIO_EXPRESS_00 VDD 24

1
GPIO3 C3602 SCD1U10V2KX-4GP SCD1U10V2KX-4GP +3.3V_RUN

SP_TPM_LPC_EN_R
C_TPM C_TPM C_TPM
38 SP_TPM_LPC_EN 1C_TPM 2 28

2
R3603 0R2J-2-GP LPC_LAD0 LPCPD#
24,35,37,38,70 LPC_LAD0 26 LAD0 GND 11

2
LPC_LAD1 23 18
24,35,37,38,70 LPC_LAD1 LAD1 GND
LPC_LAD2 20 25 SC1U6D3V2KX-GP R3601
24,35,37,38,70 LPC_LAD2 LAD2 GND
1

LPC_LAD3
R3602
24,35,37,38,70 LPC_LAD3 17 LAD3 C_TPM GND 4 DY 10KR2J-3-GP
X01-10 4K7R2J-2-GP DY

1
+3.3V_RUN 21 BA1 NC#3 3 TCM_BA1
23 CLK_PCI_TPM_CHA
2

LPC_LFRAME# LCLK TCM_PIN5


24,35,37,38,70 LPC_LFRAME# 22 LFRAME# NC#5 5
C 16 GPIO15NC#12 12 SP_TPM_LPC_EN_C C
35 LOM_PCIE_RST# LRESET#

2
27 GPIO16NC#13 13 CLK_PCH_14M_TCM 1 2
24,35,37,38 IRQ_SERIRQ
CLKRUN#_CTPM 15
SERIRQ
VR25 14 TCM_VR25 J CLK_JETWAY_14M 23
R3608
TPM_PP CLKRUN# NC#14 R3604
R3606
1 DY 2
4K7R2J-2-GP TCM_BA0
7 PP 0R2J-2-GP Z 10KR2J-3-GP
9 TESTBI/BADDBA0

2
TCM_TEST1 8

1
TESTI

1
C3605
Z C3601 R3607 J SCD1U10V2KX-4GP
SSX44-B-D-T-GP SC2D2U6D3V3KX-GP DY 1KR2J-1-GP

2
+3.3V_RUN +3.3V_RUN
71.08172.00W

1
Symbol is J China TPM
2

R3609 R3610
DY 100KR2J-1-GP DY 10KR2J-3-GP

X01-10
1

1C_TPM 2 CLKRUN#_CTPM TCM_BA0


22,37,38 CLKRUN#
2

1
R3611
0R2J-2-GP R3612 Z R3613
0R2J-2-GP
DY 10KR2J-3-GP 1KR2J-1-GP DY R3614
1

X01-10
B B

Z J
Base BA1 BA0 1(default) 0
Address PIN3 PIN9
PIN12 FLASH SRAM
EE/EF 0 0 J has internal PU with PIN12.

7E/7F 0 1
2E/2F 1 0
4E/4F 1 1
Default EE/EF as Amy recommended

A A
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TCM

5 4
WWW.AliSaler.Com 3 2
Size
Custom

Date:
Document Number
Fonseca UMA
Thursday, October 29, 2009 Sheet
1
36 of
Rev

82
X01
5 4 3 2 1

+RTC_CELL +3.3V_ALW 10KR2J-3-GP


SSID = KBC +5V_RUN
RTC_CELL_EC
R3707
+3.3V_RUN

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
1 2

SC10U6D3V5ZY-2GP
RN3702 R3702 0R2J-2-GP RUNPWROK 1 2

C3703

C3704

C3705

C3706

C3707

C3708

C3709

C3710

C3711
1 4 CLK_KBD

1
DAT_KBD 1
+3.3V_ALW
2 3
C3702 X01-12 1
R3709
2
0R2J-2-GP
VTT_PWRGD 52
SRN4K7J-8-GP SCD1U10V2KX-4GP 2

2
+3.3V_ALW
1

RN3704

B64

A11
A22
B35
A41
A58
A52

A26
R3704 CLK_MSE RN3703

B3
1 4
10KR2J-3-GP 2 3 DAT_MSE U3701 DOCK_SMB_CLK 3 2
DOCK_SMB_DAT 4 1

VBAT

VTR
VTR
VTR
VTR
VTR
VTR
VTR
VTR
SRN4K7J-8-GP
2

D JTAG_RST# SRN2K2J-1-GP D
2

R3706 C3713 PS/2 INTERFACE MISC INTERFACE RN3705


1

KBC_SDA1 A5 A10 SYSTEM_ID HOST_DEBUG_TX 3 2


23 KBC_SDA1 GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA GPIO021/RC_ID1
KBC_SCL1 BOARD_ID HOST_DEBUG_RX
100R2J-2-GP

SCD1U10V2KX-4GP

DY 23 KBC_SCL1 B6 GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK GPIO020/RC_ID2 B10


DDR_ON
4 1
68 CLK_TP_SIO_R A37 B14
2

GPIO110/PS2_CLK2/GPTP-IN6 GPIO025/UART_CLK HOST_DEBUG_TX DDR_ON 42,50 SRN10KJ-5-GP


68 DAT_TP_SIO_R B40 B44
1

GPIO111/PS2_DAT2/GPTP-OUT6 GPIO120/UART_TX HOST_DEBUG_RX HOST_DEBUG_TX 64


74 CLK_KBD A38 GPIO112/PS2_CLK1A GPIO124/GPTP-OUT5/UART_RX B46 HOST_DEBUG_RX 64,70
B41 B26 RUNPWROK RN3701
74 DAT_KBD GPIO113/PS2_DAT1A VCC_PRW GD RUNPWROK 9,38,58
A39 A25 EC_GPIO060 1 PBAT_SMBDAT 8 1
74 CLK_MSE GPIO114/PS2_CLK0A GPIO060/KBRST TP3702
B42 B36 EC_GPIO101 1 PBAT_SMBCLK 7 2
74 DAT_MSE GPIO115/PS2_DAT0A GPIO101/ECGP_SCLK TP3703
B59 B37 EC_GPIO103 1 CKG_SMBCLK 6 3
44 PBAT_SMBDAT GPIO154/I2C1C_DATA/PS2_CLK1B GPIO103/ECGP_SIN TP3704
A56 B38 EC_GPIO105 1 CKG_SMBDAT 5 4
44 PBAT_SMBCLK GPIO155/I2C1C_CLK/PS2_DAT1B GPIO105/ECGP_SOUT TP3705
A34 DDR_HVREF_RST_GATE
GPIO102/HSPI_SCLK EC_GPIO104 DDR_HVREF_RST_GATE 9 SRN2K2J-2-GP
GPIO104/HSPI_MISO A35 1 TP3707
CLK_PCI_EC A36 CPU1.5V_S3_GATE
GPIO106/HSPI_MOSI MSDATA CPU1.5V_S3_GATE 42 RN3712
JTAG INTERFACE GPIO116/MSDATA A40 MSDATA 64,70
1

JTAG_TDI A51 B43 MSCLK CHARGER_SMBDAT 3 2


70 JTAG_TDI GPIO145/JTAG_TDI GPIO117/MSCLK MSCLK 64,70
R3710 JTAG_TDO B55 A45 SIO_A20GATE CHARGER_SMBCLK 4 1
70 JTAG_TDO GPIO146/I2C1K_CLK/JTAG_TDO GPIO127/A20M SIO_A20GATE 25
DY 10R2J-2-GP 70 JTAG_CLK
JTAG_CLK
JTAG_TMS
B56 GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK GPIO153/LED3 A55 PS_ID
BAT1_LED#
PS_ID 43
SRN2K2J-1-GP
70 JTAG_TMS A53 GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS GPIO156/LED1 A57 BAT1_LED# 66
JTAG_RST# B57 B61 BAT2_LED#
2

JTAG_RST# GPIO157/LED2 FWP# BAT2_LED# 66 RN3708


CLK_PCI5035

B65
Place close 0 = Reset JTAG I/F MEC5045-LZY-GP FW P# BC_DAT_EMC4022
BC_DAT_ECE1077
8 1
7 2
to Pin58 1 = Disable FAN PWM & TACH BC_DAT_ECE5028 6 3
DOCK_POR_RST# B22 GENERAL PURPOSE I/O BC_C_DAT 5 4
74 DOCK_POR_RST# SUS_ON GPIO050/FAN_TACH1 EC_GPIO001
42 SUS_ON A21 GPIO051/FAN_TACH2 GPIO001/ECSPI_CS1 B2 1 TP3709
1

AUX_ON B23 A2 DOCK_SMB_ALERT# SRN100KJ-5-GP


35 AUX_ON GPIO052/FAN_TACH3 GPIO002/ECSPI_CS2 DOCK_SMB_ALERT# 74
1

C3716 C3715 R3711 BREATH_LED# B24 B8 FFS_INT# 2 DY R3712


1 DOCK_SMB_ALERT# 2 1
C 66,74 BREATH_LED# GPIO053/PW M0 GPIO014/GPTP-IN7/HSPI_CS1 X01.09/0819 FFS_INT1 21,40 C
1MR2J-1-GP

DY SC4D7P50V2CN-1GP SCD1U10V2KX-4GP
42 PCH_ALW_ON
PCH_ALW_ON
EC_GPIO55
A23 GPIO054/PW M1 GPIO040/GPTP-OUT3/HSPI_CS2 B18 H_SKTOCC#
ME_SUS_PWR_ACK
H_SKTOCC# 9
0R2J-2-GP
R3713
RN3707
10KR2J-3-GP
1 B25 A8 ME_SUS_PWR_ACK 22
2

TP3711 EC_GPIO56 GPIO055/PW M2 GPIO015/GPTP-OUT7 1.5V_SUS_PWRGD AUD_DOCK_SMBDAT


1 A24 B9 1.5V_SUS_PWRGD 50 3 2
2

TP3712 GPIO056/PW M3 GPIO016/GPTP-IN8 EC_GPIO017 AUD_DOCK_SMBCLK


GPIO017/GPTP-OUT8
GPIO26/GPTP-IN1
A9
A14 EC_GPIO26
1
1
TP3713
TP3719
X01-14 4 1

BC-LINK B15 ALW_PWRGD_3V_5V SRN2K2J-1-GP


GPIO27/GPTP-OUT1 ALW_PWRGD_3V_5V 46
BC_CLK_ECE5028 A43 A17 ODD_DET#
38 BC_CLK_ECE5028 GPIO123/BCM_A_CLK GPIO041 ODD_DET# 59
BC_DAT_ECE5028 B45 B39 RESET_OUT# RN3713
38 BC_DAT_ECE5028 GPIO122/BCM_A_DAT GPIO107/nRESET_OUT RESET_OUT# 22
BC_INT#_ECE5028 A42 A44 EC_GPIO125 1 CARD_SMBDAT 4 1
38 BC_INT#_ECE5028 GPIO121/BCM_A_INT# GPIO125/GPTP-IN5 TP3714
BC_CLK_EMC4022 A12 B47 PCH_RSMRST# CARD_SMBCLK 3 2
39 BC_CLK_EMC4022 GPIO022/BCM_B_CLK GPIO126 PCH_RSMRST# 22
BC_DAT_EMC4022 B13 A54 AC_PRESENT
39 BC_DAT_EMC4022 GPIO023/BCM_B_DAT GPIO151/GPTP-IN4 AC_PRESENT 22
RN3716 BC_INT#_EMC4022 A13 B58 SIO_PWRBTN# SRN2K2J-1-GP
39 BC_INT#_EMC4022 GPIO024/BCM_B_INT# GPIO152/GPTP-OUT4 SIO_PWRBTN# 22
4 DY 1 DDR_HVREF_RST_GATE TP3715 1 EC_GPIO44 B20 GPIO044/BCM_C_CLK
MSCLK 2 1
3 2 CPU1.5V_S3_GATE BC_C_DAT A18 R3737 100KR2J-1-GP
EC_GPIO42 GPIO043/BCM_C_DAT
TP3716 1 B19 GPIO042/BCM_C_INT# X01.09/0819
SRN100KJ-6-GP BC_CLK_ECE1077 A20
68 BC_CLK_ECE1077 GPIO047/LSBCM_D_CLK
BC_DAT_ECE1077 B21 MSDATA 1 DY 2
68 BC_DAT_ECE1077 GPIO046/LSBCM_D_DAT
RN3710 BC_INT#_ECE1077 A19 R3734 10KR2J-3-GP
68 BC_INT#_ECE1077 GPIO045/LSBCM_D_INT#
3 2 DDR_ON BEEP A16 SMBUS INTERFACE R3734 pull DN, Enable JTAG debug mode
SUS_ON 30 BEEP SIO_SLP_S5# GPIO032/GPTP-IN3/BCM_E_CLK DOCK_SMB_DAT
4 1 22 SIO_SLP_S5# B16 GPIO31/GPTP-OUT2/BCM_E_DAT GPIO003/I2C1A_DATA A3 DOCK_SMB_DAT 74
ACAV_IN_NB A15 B4 DOCK_SMB_CLK X01.09/0918
38,45 ACAV_IN_NB GPIO30/GPTP-IN2/BCM_E_INT# GPIO004/I2C1A_CLK DOCK_SMB_CLK 74
SRN100KJ-6-GP A4 LCD_SMBDAT
GPIO005/I2C1B_DATA LCD_SMBDAT 54 +RTC_CELL
B5 LCD_SMBCLK
GPIO006/I2C1B_CLK LCD_SMBCLK 54
2 1 AUX_ON HOST INTERFACE B7 CKG_SMBDAT
+3.3V_ALW GPIO012/I2C1H_DATA/I2C2D_DATA CKG_SMBDAT 7
100KR2J-1-GP R3720 SIO_EXT_SMI# A6 A7 CKG_SMBCLK RN3715
25 SIO_EXT_SMI# GPIO011/SMI# GPIO013/I2C1H_CLK/I2C2D_CLK CKG_SMBCLK 7
SIO_RCIN# A27 B48 AUD_DOCK_SMBDAT VCI_IN1# 4 1
25 SIO_RCIN# GPIO061/LPCPD# GPIO130/I2C2A_DATA AUD_DOCK_SMBDAT 75
2 1 PCH_ALW_ON 1 DY 2 LPC_LDRQ#_MEC B29 B49 AUD_DOCK_SMBCLK VCI_IN2# 3 2
LDRQ# GPIO131/I2C2A_CLK AUD_DOCK_SMBCLK 75
100KR2J-1-GP R3723 R3715 IRQ_SERIRQ A28 A47 CHARGER_SMBDAT
SER_IRQ GPIO132/I2C1G_DATA CHARGER_SMBDAT 45
100KR2J-1-GP 24,35,36,38 IRQ_SERIRQ PLTRST3# B30 B50 CHARGER_SMBCLK CHARGER_SMBCLK 45 SRN100KJ-6-GP
21,38,70,76 PLTRST3# LRESET# GPIO140/I2C1G_CLK
B CLK_PCI_EC A29 B52 CARD_SMBDAT B
21 CLK_PCI_EC PCI_CLK GPIO141/I2C1F_DATA/I2C2B_DATA CARD_SMBDAT 72 +3.3V_RUN
2 DY 1 RESET_OUT# LPC_LFRAME# B31 A49 CARD_SMBCLK CARD_SMBCLK 72
24,35,36,38,70 LPC_LFRAME# LFRAME# GPIO142/I2C1F_CLK/I2C2B_CLK
8K2R2J-3-GP R3724 LPC_LAD0 A30 B53 LAN_SMBDAT
24,35,36,38,70 LPC_LAD0 LAD0 GPIO143/I2C1E_DATA LAN_SMBDAT 35
LPC_LAD1 B32 A50 LAN_SMBCLK LAN_SMBCLK 35 ODD_DET# 1 2
24,35,36,38,70 LPC_LAD1 LAD1 GPIO144/I2C1E_CLK
LPC_LAD2 A31 R3729 100KR2J-1-GP
24,35,36,38,70 LPC_LAD2 LAD2 X01.09/0825
LPC_LAD3 B33 H_SKTOCC# 1 2
24,35,36,38,70 LPC_LAD3 LAD3
CLKRUN# A32 X01.09/0819 R3730 100KR2J-1-GP
22,36,38 CLKRUN# CLKRUN#
SIO_EXT_SCI# A33 DELL PWR SW INF
25 SIO_EXT_SCI# GPIO100/EC_SCI# EC_BGPO0 +3.3V_ALW
BGPO0 A59 1 TP3717
B63 VCI_IN2#
VCI_IN2# ALW_ON
MASTER CLOCK VCI_OUT A60 ALW_ON 46
EC_XTAL1 A61 A63 VCI_IN1#
XTAL1 VCI_IN1#

2
1
X3701 EC_XTAL2 POWER_SW_IN#
X01-19 TP3718 1 EC_32KHZ_OUT
A62
B62
XTAL2
GPIO160/32KHZ_OUT
VCI_IN0#
VCI_OVRD_IN
B67
B1 ACAV_IN
POWER_SW_IN# 39
ACAV_IN 39,45 +3.3V_ALW_PCH
1 4 A1 DOCK_PWR_SW# RN3714
VCI_IN3# DOCK_PWR_SW# 39
X01.09/0825 SRN2K2J-1-GP
VR_CAP1
1

VSS_RO
NC#B17
NC#B34
NC#A46
NC#A48
NC#B51
NC#A64
NC#B68

AGND

C3717 C3718
VSS2
VSS5
VSS7
VSS8

3
4
SC39P50V2JN-1GP 2 3 SC39P50V2JN-1GP
EP
2

U3702
+3.3V_ALW 1 6 LAN_SMBDAT
23 PCH_SMB_DATA
B17
B34
A46
A48
B51
A64
B68

B66

B27
B60
B11
B28

B12

B54

C1

X-32D768KHZ-40GPU
2 5
1

+RTC_CELL
X01.09/0918
R3732 RN3711 3 4
10KR2J-3-GP 4 1
+3.3V_ALW 3 2 DMN66D0LDW-7-GP
KBC_VR_CAP
23 PCH_SMB_CLK
2

FWP# C3719 SRN100KJ-6-GP


1

X01.09/0819 SC4D7U6D3V3KX-GP LAN_SMBCLK


1

A A
R3705 R3703
Fonseca UMA Revision R3733
<Core Design>
2

2KR2J-1-GP 130KR2F-GP BOARD_ID BOARD_ID 10KR2J-3-GP DY POWER_SW_IN# 1 2 R3725


39 POWER_SW_IN# POWER_SW#_MB 76
SYSTEM_ID Cap. Value Cap. Value REV
DOCK_PWR_SW# 1
10KR2J-3-GP
2 R3727 DOCK_PWR_BTN# 74
Wistron Corporation
2

BOARD_ID 39 DOCK_PWR_SW# 10KR2J-3-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
4700pF 240k ohm X00 Taipei Hsien 221, Taiwan, R.O.C.
SYSTEM_ID
1

2k ohm 4700pF 130k ohm X01 C3720 C3701


1

C3714 C3712 SC1U6D3V2KX-GP SC1U6D3V2KX-GP Title


SC4700P50V2KX-1GP SC4700P50V2KX-1GP 4700pF 4700pF 62k ohm X02 KBC - MEC5045
2

WWW.AliSaler.Com
2

Size Document Number Rev


4700pF 33k ohm -1 Custom
Fonseca UMA X01
Date: Thursday, October 29, 2009 Sheet 37 of 82
5 4 3 2 1
5 4 3 2 1

+3.3V_ALW
SSID = KBC DOCK_AC_OFF_EC 1
U3802
B
+3.3V_ALW

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U6D3V5KX-1GP

SCD1U10V2KX-4GP
VCC 5

1
C3801

C3803

C3804

C3805

C3806

C3807
37,45 ACAV_IN_NB 2 A

1
4 R3801 1 DY 2 0R2J-2-GP C3802 DY
Y SCD1U10V2KX-4GP
3 DOCK_AC_OFF_Y

2
GND +3.3V_RUN
A K

2
+3.3V_ALW 74LVC1G08GW-1-GP D3801 SDMK0340L-7-F-GP DOCK_AC_OFF 44,74

A17
B30
A43
A54

B34
B35
B68
B5

B1
1 2
1 2 SLICE_BAT_PRES# X01.09/0917 R3804 33KR2J-3-GP U3801
R3802 100KR2J-1-GP

VCC1
VCC1
VCC1
VCC1
VCC1

NC#B1
NC#B34
NC#B35
NC#B68
1 2 TP_DET# PBAT_PRES# B52 B63 SIO_SLP_M# D_CLKRUN# 2 1
D 44 PBAT_PRES# GPIOA0 GPIOI1 SIO_SLP_M# 22 D
R3806 100KR2J-1-GP SCRL_LED# A49 A60 0.75V_DDR_VTT_ON 100KR2J-1-GP R3803
66 SCRL_LED# NUM_LED# GPIOA1 GPIOI2 SIO_SLP_S4# 0.75V_DDR_VTT_ON 50
66 NUM_LED# B53 GPIOA2 GPIOI3 A61 SIO_SLP_S4# 22,50,72
RN3803 1 SIO_GPIOA3 A50 B65 SIO_SLP_S3# RN3802
TP3802 GPIOA3 GPIOI4 SIO_SLP_S3# 9,22,35,50
1 4 PCIE_WAKE# PBATT_OFF B54 A62 IMVP_PWRGD D_SERIRQ 1 4
44 PBATT_OFF GPIOA4 GPIOI5 IMVP_PWRGD 39,47
2 3 PWR_BTN_BD_DET# MDC_RST_DIS# A51 B66 IMVP_VR_ON D_DLDRQ1# 2 3
76 MDC_RST_DIS# PCIE_WAKE# GPIOA5 GPIOI6 DOCK_AC_OFF_EC IMVP_VR_ON 47
35,64,72 PCIE_WAKE# B55 GPIOA6 GPIOI7 A63
SRN100KJ-6-GP 1 SIO_GPIOA7 A52 SRN100KJ-6-GP
TP3803 GPIOA7
USB_SIDE_EN# A33 B67 AUX_EN_WOWL
63,76 USB_SIDE_EN# EN_I2S_NB_CODEC# GPIOB0/INIT# GPIOJ0 TP_DET# AUX_EN_WOWL 64
75 EN_I2S_NB_CODEC# B36 GPIOB1/SLCTIN# GPIOJ1 A64 TP_DET# 68
1 SIO_GPIOC2 A34 A5 SIO_SLP_LAN#
TP3805 GPIOC2/SLCT GPIOJ2 SIO_SLP_LAN# 22
EN_DOCK_PWR_BAR B37 B6 SIO_GPIOJ3 1
44 EN_DOCK_PWR_BAR GPIOC3/PE GPIOJ3 TP3804
PANEL_BKEN_PCH A35 A6 GPIO_PSID_SELECT
20,54 PANEL_BKEN_PCH GPIOC4/BUSY GPIOJ4 GPIO_PSID_SELECT 43
ENVDD_PCH B38 B7 CRT_SWITCH
54 LCD_TST 20,54 ENVDD_PCH GPIOC5/ACK# GPIOJ5 CRT_SWITCH 75
1 DY 2 LCD_TST A36 A7 DOCK_HP_DET
9,22,58 XDP_DBRESET# R3807 0R2J-2-GP PSID_DISABLE# GPIOC6/ERROR# GPIOJ6 DOCK_MIC_DET DOCK_HP_DET 75
43 PSID_DISABLE# A37 GPIOC7/ALF# GPIOJ7 B8 DOCK_MIC_DET 75
PANEL_BKEN_PCH 1 2 PANEL_BKEN_DGPU B40
R3824 0R2J-2-GP DOCKED GPIOD0/STROBE#
X01.09/0918 35 DOCKED A38 GPIOC1/PD7
DOCK_DET# B41 A8 ME_FWP
44,74,75 DOCK_DET# GPIOC0/PD6 GPIOK0 ME_FWP 24
AUD_NB_MUTE A39 B9 NB_AC_OFF
+3.3V_ALW 30 AUD_NB_MUTE GPIOB7/PD5 GPIOK1 NB_AC_OFF 43,44,45
MCARD_WWAN_PWRENB42 B10 1.8V_RUN_PWRGD
65 MCARD_WWAN_PWREN GPIOB6/PD4 GPIOK2 1.8V_RUN_PWRGD 51
LCD_VCC_TEST_EN A40 A10 SIO_GPIOK3 1
54 LCD_VCC_TEST_EN GPIOB5/PD3 GPIOK3 TP3807
1 SIO_GPIOB4 B43 B11 TEMP_ALERT#
TP3819 GPIOB4/PD2 GPIOK4 TEMP_ALERT# 25,58
1 2 USB_SIDE_EN# AUD_HP_NB_SENSE A41 A11 RUN_ON
30,60 AUD_HP_NB_SENSE GPIOB3/PD1 GPIOK5 RUN_ON 42,51,72
R3805 100KR2J-1-GP 1 SIO_GPIOB2 B44 B12 CPU_CATERR#
TP3808 GPIOB2/PD0 GPIOK6 CPU_CATERR# 9
A12 SPI_WP#_SEL
GPIOK7 SPI_WP#_SEL 62

69 LID_CL_SIO#
LID_CL_SIO#
CPU_VTT_ON
B32 GPIOD1
ECE5028-LZY-GP LPC_LAD0
LPC_LAD[0..3] 24,35,36,37,70
52 CPU_VTT_ON A31 GPIOD2 LAD0 A27
+3.3V_RUN 1 SIO_GPIOD3 B33 A26 LPC_LAD1
C TP3809 GPIOD3 LAD1 C
CRD_DET0 B15 B26 LPC_LAD2
CRD_DET1 GPIOD4 LAD2 LPC_LAD3
SP_TPM_LPC_EN SIO_GPIOD6
A15 GPIOD5 LAD3 B25
LPC_LFRAME# Place close to
1 DY 2 TP3820 1 B16 GPIOD6 LFRAME# A21 LPC_LFRAME# 24,35,36,37,70
R3808 10KR2J-3-GP
42 MODC_EN
MODC_EN A16 GPIOD7 LRESET# B22
A28
PLTRST3#
CLK_PCI_5028
PLTRST3# 21,37,70,76 Pin.A28
PCICLK CLK_PCI_5028 21
B20 CLKRUN# CLK_PCI_5028
CLKRUN# CLKRUN# 22,36,37
COMRXD0 A1 A23 LPC_LDRQ0#
76 COMRXD0 GPIOE0/RXD LDRQ0# LPC_LDRQ0# 24

1
1 2 WIRELESS_ON#/OFF COMTXD0 B2 A22 LPC_LDRQ1#
R3809 100KR2J-1-GP 76 COMTXD0 COMRTS0# GPIOE1/TXD LDRQ1# IRQ_SERIRQ LPC_LDRQ1# 24 R3812
76 COMRTS0#
A2 GPIOE2/RTS# SER_IRQ B21 IRQ_SERIRQ 24,35,36,37
COMDSR0# B3 A32 CLK_SIO_14M 10R2J-2-GP DY
76 COMDSR0# GPIOE3/DSR# 14_318MHZ CLK_SIO_14M 23
1 2 AUD_HP_NB_SENSE COMCTS0# A3
R3810 100KR2J-1-GP 76 COMCTS0# COMDTR0# GPIOE4/CTS#
B45

CLK_PCI50282
76 COMDTR0# COMRI0# GPIOE5/DTR#
A42 B51
1
RN3805
4 DOCK_HP_DET X01-30 76
76
COMRI0#
COMDCD0#
COMDCD0# B4
GPIOE6/RI#
GPIOE7/DCD#
VSS
2 3 DOCK_MIC_DET

SRN100KJ-6-GP VGA_IDENTIFY 1 SIO_GPIOF0 A59 B29 D_LAD0


TP3811 GPIOF0/IRMODE/IRRX3A DLAD0 D_LAD0 74
1 SIO_GPIOF1 B62 B28 D_LAD1
High = Discrete TP3812
1 SIO_GPIOF2 A58
GPIOF1/IRRX2 DLAD1
A25 D_LAD2
D_LAD1 74
TP3813 GPIOF2/IRTX2 DLAD2 D_LAD2 74

1
1 2 TEMP_ALERT# Low = UMA TP3814 1 SIO_GPIOF3 B61 GPIOF3/IRMODE/IRRX3B DLAD3 A24 D_LAD3
D_LAD3 74
C3808
R3831 10KR2J-3-GP 1 SIO_GPIOF4 A56 B23 D_LFRAME# SC4D7P50V2CN-1GP DY
TP3815 GPIOF4 DLFRAME# D_LFRAME# 74
1 2 VGA_IDENTIFY B59 A19 D_CLKRUN#
D_CLKRUN# 74

2
R3815 100KR2J-1-GP SIO_GPIOF5 GPIOF5 DCLKRUN# D_DLDRQ1#
TP3821 1 A55 GPIOF6 DLDRQ1# B24 D_DLDRQ1# 74
LOM_SMB_ALERT# B58 A20 D_SERIRQ D_SERIRQ 74
35 LOM_SMB_ALERT# GPIOF7 DSER_IRQ

LAN_LOW_PWR B47
RN3804 35 LAN_LOW_PWR CAP_LED# GPIOG0 BC_INT#_ECE5028
66 CAP_LED# A45 GPIOG1 BC_INT# A29 BC_INT#_ECE5028 37
8 1 0.75V_DDR_VTT_ON LOM_TPM_EN# B48 B31 BC_DAT_ECE5028
35 LOM_TPM_EN# GPIOG2 BC_DAT BC_DAT_ECE5028 37
LCD_TST SIO_GPIOG3 BC_CLK_ECE5028
B 7
6
2
3 RUN_ON 1 2
TP3817 1
SIO_EXT_WAKE#_R
A46
B49
GPIOG3 BC_CLK A30 BC_CLK_ECE5028 37 Place close to B

25 SIO_EXT_WAKE# GPIOG4
5 4 CPU_VTT_ON R3817 0R2J-2-GP
TP3818 1 SIO_GPIOG5
PCH_PCIE_WAKE#
A47
B50
GPIOG5
A4 RUNPWROK
Pin.A32 CLK_SIO_14M
22 PCH_PCIE_WAKE# GPIOG6 PW RGD RUNPWROK 9,37,58
SRN100KJ-5-GP WLAN_RADIO_DIS# A48
64 WLAN_RADIO_DIS# GPIOG7

1
B56 SP_TPM_LPC_EN
RN3801 OUT65 SP_TPM_LPC_EN 36 R3818
4 1 PANEL_BKEN_PCH WIRELESS_ON#/OFF B13 10R2J-2-GP DY
64 WIRELESS_ON#/OFF GPIOH0
3 2 PBATT_OFF BT_RADIO_DIS# A13 B19 TEST_PIN 1 2
73 BT_RADIO_DIS# WWAN_RADIO_DIS# GPIOH1 TEST_PIN R3819 1KR2F-3-GP
A53

CLK_SIO14M 2
SRN100KJ-6-GP 76 WWAN_RADIO_DIS# LOM_CABLE_DETECT B57 SYSOPT1/GPIOH2 CAP_LDO
35 LOM_CABLE_DETECT SYSOPT0/GPIOH3 CAP_LDO B46
EXPRCRD_PWREN# B14
72 EXPRCRD_PWREN# GPIOH4

1
EXPRCRD_STDBY# A14 C3809
MODC_EN 72 EXPRCRD_STDBY# SLICE_BAT_PRES# GPIOH5 SC4D7U6D3V3KX-GP
1 2 74 SLICE_BAT_PRES# B17 GPIOH6 VSS A9
R3821 100KR2J-1-GP PWR_BTN_BD_DET# B18 A18
76 PWR_BTN_BD_DET#

2
GPIOH7 VSS
VSS B27
VSS B39

1
TP3824 1 IRTX B60 A44 C3810
IRRX IRTX VSS SC4D7P50V2CN-1GP
2 1 A57 IRRX VSS B64 DY

2
R3820
10KR2J-3-GP
EP
C1

+3.3V_RUN
1

R3822 R3811
100KR2J-1-GP 100KR2J-1-GP
A A
PCC_EXP SC_EXP <Core Design>
CRD_DET1 CRD_DET0 Function
2

CRD_DET1
CRD_DET0
Low Low No Option Installed Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Low High Smartcard
1

R3823 R3816 Taipei Hsien 221, Taiwan, R.O.C.


100KR2J-1-GP 100KR2J-1-GP High Low Cardbus Title
NOCRD_SC NOCRD_PCC
High High Express Card SIO - MEC5028
WWW.AliSaler.Com
2

Size Document Number Rev


Custom X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 38 of 82
5 4 3 2 1
5 4 3 2 1

SSID = Thermal
EMC4022 SMBus Addr = {5E} / {5F}
37 BC_DAT_EMC4022
BC Bus clock and data signal trace length X01-45
X01-21 X01-21 37 BC_CLK_EMC4022 should be matched with +/- 0.1 inch.

SYS_IMON 45
Q3902 and C3902 Place under CPU

1
1

1
D C3901 R3902 D
C3902 Q3902 1 SC470P50V2KX-3GP REM_DIODE4_N, REM_DIODE4_P routing together. 12K7R2F-GP
SC100P50V2JN-3GP MMBT3904-7-F-GP close to the Trace width / Spacing = 10 / 10 mil

2
Guardian pins Place near the bottom SODIMM

2
Place C3902 as close to the Q3902 as possible

1
PC3901
Q3905 and C3906 Place near DIMM Skin Temp Sensor 1 R3903
DY 5K62R2F-GP
C3905

SCD22U25V3KX-GP
2
2

1
SC2200P50V2KX-2GP

2
C3906 Q3905
DY MMBT3904-7-F-GP 1 C3904 DY Q3901 1
SC100P50V2JN-3GP SC100P50V2JN-3GP MMBT3904-7-F-GP close to the U3901
1

2
Guardian pins 7 Place together
3

2
Place optimally between CPU and MEM SMDATA/BC_DATA
8
Place C3906 as close to the Q3903 as possible Place C3904 as close to the Q3901 as possible SMCLK/BC_CLK Near U3901
REM_DIODE1_P 24
REM_DIODE1_N DP1/VREF_T R3917
Q3903 and C3903 Place near WLAN 23 DN1/THERM
if use 4.7k-J, 2.1% inaccuracy for IMON
C3908 if use 1k-J, 0.5% inaccuracy for IMON

1
SC2200P50V2KX-2GP REM_DIODE4_P 27
C3903 Q3903 REM_DIODE4_N DP2/DN4 if use 470-J, 0.3% inaccuracy for IMON
SC100P50V2JN-3GP
DY MMBT3904-7-F-GP
1 26 DN2/DP4 Place near fork into U3901
close to the

2
Guardian pins REM_DIODE3_P 30 25 SYS_IMON_4022

2
REM_DIODE3_N DP3/DN5 VIN CPU_IMON_4022
29 DN3/DP5 VCP 31 1 2 CPU_IMON 12,47
+3.3V_SUS Place C3903 close to the Q3903 as possible R3917 1KR2F-3-GP

3VSUS_THRM
EMC4022-1-EZK-TR-1-GP-U
1 2 1 VDD 2 1 +3.3V_ALW
R3906 22R2J-2-GP +RTC_CELL R3907 10KR2J-3-GP
C C

1
9 BC_INT#_EMC4022
+3.3V_SUS C3918 DY C3909 ATF_INT#/BC_IRQ# POWER_SW_IN#_4022 BC_INT#_EMC4022 37
16 RTC_PW R3V POW ER_SW # 20
SC1U6D3V2KX-GP SCD1U10V2KX-4GP 2 1 21 ACAV_IN
ACAV_IN 37,45

2
+3.3V_SUS C3910 SC1U6D3V2KX-GP ACAVAIL_CLR THERMTRIP_SIO
GPIO3/PW M/THERMTRIP_SIO 15 2 DY 1 +3.3V_SUS
1

19 THERM_STP# R3909 10KR2J-3-GP


R3910 THERM_VDD_PWRGD 13 SYS_SHDN# THERM_STP# 46
1 2 VDD_PW RGD
8K2R2J-3-GP PCH_PWRGD# R3911 1 2 100KR2J-1-GP THERM_3V_PWROK# 12 1 DY 2 +RTC_CELL
R3901 1KR2J-1-GP 3V_PW ROK# R3912 47KR2J-2-GP
2

THERMTRIP2# 17
+1.05V_RUN THERMTRIP3# THERMTRIP2#
18 THERMTRIP3#
3

Rset=953,Tp=88degree
2

1 2 THERM_B1 1 THERMAL_VSET 28
R3913 Q3906 C3911 VSET

1
C3912

R3915
2K2R2J-2-GP MMBT3904-7-F-GP SCD1U10V2KX-4GP 3VSUS_THRM 1 23VSUS_THRM_1

953R2F-GP
SCD1U10V2KX-4GP
32
2

ADDR_MODE/XEN

1
R3914 4K7R2J-2-GP
9,25 H_THERMTRIP#
2 X01.09/0825

2
VDD_HA
3
Update to 4022 Rev.B

2
VDD_HB
+3.3V_SUS 6 VDD_L
FAN1_VOUT 4
58 FAN1_VOUT FAN_OUTA
1

5 FAN_OUTB TEST1 14
R3916 22
8K2R2J-3-GP FAN1_TACH_FB TEST2
58 FAN1_TACH_FB 10 TACH/GPIO1
FAN1_DET#

GND_SLG
11 GPIO2
2

B +5V_RUN B
1

R3918

33
C3913 +3.3V_RUN DOCK_PWR_SW#_R

SCD1U10V2KX-4GP
1 2 DOCK_PWR_SW# 37
SCD1U10V2KX-4GP
SC10U10V5KX-2GP
2

2
C3914

C3915
0R2J-2-GP

1
D3901
1

R3927 3 BAT54A-3
100KR2J-1-GP +RTC_CELL

2
+3.3V_SUS
R3921
FAN1_DET# 58

1
2
POWER_SW_IN#_R 1 2 POWER_SW_IN# 37
1

R3920
R3922 100KR2J-1-GP 0R2J-2-GP
100KR2J-1-GP
+3.3V_RUN R3924

1
0R2J-2-GP
2

PCH_PWRGD# POWER_SW_IN#_4022 1 DY 2
1 DY 2
2

1
D

Q3908 C3916 C3917 R3925


2N7002A-7-GP SC10U10V5KX-2GP SCD1U10V2KX-4GP 0R2J-2-GP
1

38,47 IMVP_PWRGD 1 2 IMVP_PWRGD_R G


R3926 0R2J-2-GP
S

A A
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thermal, Fan controller

5 4
WWW.AliSaler.Com 3 2
Size
Custom

Date:
Document Number
Fonseca UMA
Thursday, October 29, 2009 Sheet
1
39 of
Rev

82
X01
5 4 3 2 1

SSID = User.Interface

D D

Free Fall Sensor


+3.3V_RUN

1
C4002 C4001
SC1U10V2KX-1GP SCD1U10V2KX-4GP

2
+3.3V_RUN
C C

1
6

1
U4001 R4001
DY 100KR2J-1-GP

VDD_IO
VDD

2
CLK_SCLK_HDDFALL 14 8 FFS_INT1
SCL/SPC INT1 FFS_INT1 21,37
+3.3V_RUN CLK_SDATA_HDDFALL 13 9 FFS_INT2_R
SDA/SDI/SDO INT2 +3.3V_RUN
1 DY 0R2J-2-GP
2 HDD_FALL_SDO 12
R4004 SDO
1

1
7 CS
+3.3V_RUN 2 R4005
R4011 GND
0R2J-2-GP
DY GND 4 100KR2J-1-GP
3 RESERVED#3 GND 5
11 10 09/0730
2

2
RESERVED#11 GND
FALL_INT2 If make sure U4001 INT2 is PP
R4006 can DY
FAE/ DY is ok, chip internal pull-up resistors
From spec, Slave ADdress(SAD) is 001110xb DE351DLTR8-GP X01-50

1
Pull HIGH SAD is 0011101b
+3.3V_RUN +3.3V_RUN
Pull GND SAD is 0011100b Q4002
DMN66D0LDW -7-GP

1
B B

6
R4006 R4008
DY 100KR2J-1-GP DY 10KR2J-3-GP

2
FFS_INT2_R
FFS_INT2 59
1
R4007
DY 0R2J-2-GP
2

1 2 CLK_SCLK_HDDFALL
18,19,23,58 PCH_SMBCLK_MEM
R4009 0R2J-2-GP FFS_INT2_R
FFS_INT2_R 25
1 2 CLK_SDATA_HDDFALL
18,19,23,58 PCH_SMBDATA_MEM
R4010 0R2J-2-GP
CLK_SCLK_HDDFALL 7

CLK_SDATA_HDDFALL 7

A <Core Design> A

Layout Note
- no via, trace, under the sensor Wistron Corporation
- stay away from the screw hole or metal shield soldering joints 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
- design PCB pad based on our sensor LGA pad size (add 0.1mm)
- solder stencil opening to 90% of the PCB pad size Title
- mount the sensor near the center of mass of the NB as possible as you can
Free Fall Sensor

WWW.AliSaler.Com
Size Document Number Rev
A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 40 of 82
5 4 3 2 1
5 4 3 2 1

SSID = Reset.Suspend

D D

C C

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Power On Logic

WWW.AliSaler.Com
Size Document Number Rev
A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 41 of 82
5 4 3 2 1
5 4 3 2 1

SSID = Reset.Suspend
+3.3V_ALW_2
Design current: 1750mA

2
+3.3V_ALW_2 +15V_ALW Max current: 2500mA
Design current: 1150mA R4206 +15V_ALW +5V_ALW
Max current: 1650mA 100KR2J-1-GP +5V_RUN +5V_MOD

1
1 2SUS_ON_3V# R4207

1
R4202 R4203 MODC_EN# 1 DY 2

1
100KR2J-1-GP D G S 100KR2J-1-GP C4205
+3.3V_ALW +3.3V_SUS D G S SC10U6D3V5MX-3GP U4201 0R5J-5-GP

1
8 1

2
6

4
D
D S D
R4209 7 2

1
D S
Q4202 U4202 100KR2J-1-GP 6 3

1
D S
DMN66D0LDW-7-GP 1 D D 6 Q4204 5 D G 4 C4206 R4210 C4207
2 D D 5 DMN66D0LDW-7-GP SCD1U10V2KX-4GP 100KR2J-1-GP SC10U6D3V5MX-3GP

2
3V_SUS_ENABLE 3 G S 4 SI4800BDY-T1-GP
1

2
5A-70degC

2
1
S G D SI3456DDV-T1-GE3-GP MODC_EN_5V

SCD1U50V3KX-GP
C4202 ?A-70degC S G D

1
SC4700P50V2KX-1GP C4203 R4204 C4209
SC10U10V5KX-2GP 20KR2J-L2-GP

2
37 SUS_ON 38 MODC_EN

+3.3V_ALW_2 +15V_ALW Design current: 1850mA Design current: 700mA


Max current: 2650mA Max current: 1000mA
1 2RUN_ON_5V#
R4205
100KR2J-1-GP D G S +5V_ALW +5V_RUN
1

U4203
R4201 8 1 +5V_RUN +5V_HDD
6

D S
100KR2J-1-GP 7 2

1
D S
Q4203 6 3 1 2

1
D S
DMN66D0LDW-7-GP 5 4 C4204 R4208 R4214 0R5J-5-GP
2

D G
SC10U10V5KX-2GP 20KR2J-L2-GP
SI4800BDY-T1-GP
1

2
5A-70degC

2
C RUN_ENABLE C
S G D
1

1
1

1
C4208
SC150P50V2JN-3GP C4212 R4215 DY C4213
2

SCD1U10V2KX-4GP 100KR2J-1-GP SC10U6D3V5MX-3GP


38,51,72 RUN_ON X01-12

2
2
Design current: 2850mA
+3.3V_ALW_2 Max current: 4050mA
1 23.3V_RUN_ON# +15V_ALW +3.3V_ALW +3.3V_RUN +3.3V_RUN +3.3V_HDD
R4211
100KR2J-1-GP U4204 1 2
1

8 D S 1 R4217 0R5J-5-GP
R4212 7 D S 2

1
100KR2J-1-GP 6 D S 3
6

5 D G 4 C4210 R4213
Q4205 SC10U6D3V5MX-3GP 20KR2J-L2-GP
2

DMN66D0LDW-7-GP FDS8880-NL-GP
2

1
10A-70degC
2

1
1

3.3V_RUN_ENABLE C4215 DY R4220 DY C4201 DY


SCD1U10V2KX-4GP 100KR2J-1-GP SC10U6D3V5MX-3GP

2
1

C4211

2
SC4700P50V2KX-1GP
2

B 38,51,72 RUN_ON B
X01-12 Design current: 700mA
Max current: 700mA
+3.3V_ALW_2 +3.3V_ALW +3.3V_ALW_PCH
+3.3V_ALW_2 Design current: 2400mA
1 DY 2 PCH_ALW_ON_3V# +15V_ALW
1
R4226
2
0R5J-5-GP 1 2RUN_ON_1.5V#
Max current: 3500mA
R4221 100KR2J-1-GP
R4216 D G S U4205 X01-11 D G S +15V_ALW +1.5V_SUS +1.5V_RUN
1

100KR2J-1-GP D D 6 U4206
R4218
1
2 D DY D 5 8 1
6

1
D S
DY 100KR2J-1-GP 3 G S 4 7 2

1
D S
Q4206 Q4201 R4222 6 3
1

1
D S
DMN66D0LDW-7-GP DY SI3456DDV-T1-GE3-GP DMN66D0LDW-7-GP 100KR2J-1-GP 5 4 C4217 R4223
2

D G
?A-70degC C4214 R4219 SC10U10V5KX-2GP 100R2J-2-GP
PCH_ALW_ENABLE SC4D7U6D3V3KX-GP 20KR2J-L2-GP SI4800BDY-T1-GP
1

2
5A-70degC
2

2
S G D S G D 1.5V_RUN_discharge
2
1

C4216

1
DY SC4700P50V2KX-1GP 1.5V_RUN_ENABLE C4218

D
SC4700P50V2KX-1GP
2

37 PCH_ALW_ON

2
Q4208
RUN_ON_1.5V# G 2N7002A-7-GP
1 2 RUN_ON_1.5V
DY 0R2J-2-GP
37,50 DDR_ON
X01.09/0825 R4231

S
Q4207 1 DY 0R2J-2-GP
2
G

+5V_ALW +5V_ALW_PCH 38,51,72 RUN_ON


2N7002A-7-GP R4232
A A

D
DY S
37 CPU1.5V_S3_GATE
R4233
1 2
0R2J-2-GP
<Core Design>
1

X01.09/0917
1

C4219 R4224
SCD1U10V2KX-4GP 20KR2J-L2-GP Wistron Corporation
1 2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2

R4234 0R2J-2-GP Taipei Hsien 221, Taiwan, R.O.C.


2

X01.09/0918
Title

Power Plane Enable

5 4
WWW.AliSaler.Com 3 2
Size
Custom

Date:
Document Number

Thursday, October 29, 2009


Fonseca UMA
Sheet
1
42 of
Rev

82
X01
5 4 3 2 1

SSID = PWR.Support Adapter In


*PIN NAME DIFFERENCES* DC_IN
PIN MAXIM INTERSIL BQ24745 PIN 3,4 DC_IN+
1 GND NC ICREF CONN
3 REF VREF VREF PIN 4,5 DC_IN-
4 CCS ICOMP EAO PIN 1 ID
5 CCI NC EAI
6 CCV VCOMP FBO PIN 6,7,8,9 GND
TABLE 7 DAC NC CE
MAXIM & INTERSIL BOM DIFFERENCES 8 IINP ICM VICM
REF DES MAXIM INTERSIL TI 11 VDD VDDSMB VDDSMB
D D
R411 8.45K 1% DUMMY DUMMY 14 BATSEL NC NC
C98 0.01uF 0.1uF 0.1uF 15 FBSA VFB VFB
C459 0.1uF 10V DUMMY 200P 10V 16 FBSB NC NC
C5 1uF 10V DUMMY 1uF 10V 17 CSIN CSON CSON
R16 365K 1% 215K 1% 309K 1% 18 CSIP CSOP CSOP
R434 0 5% 10 5% 0 5% 20 DLO LGATE LGATE
R414 0 5% 10 5% 0 5% 21 LDO VDDP VDDP
C473 DUMMY 0.22uF 0.1uF 23 LX PHASE PHASE
C457 DUMMY 0.22uF 0.1uF 24 DHI UGATE UGSTE
25 BST BOOT BOOT
C442 0.01uF DUMMY DUMMY
26 VCC VCC ICOUT
C453 0.1uF 10V DUMMY DUMMY "NC" means no-connect
C36 220pF 50V DUMMY DUMMY
D23 RB751V-40 DUMMY RB751V-40
C58 3.3nF DUMMY DUMMY
R64 1 1% 0 5% 0 5%
R394 100 5% 0 5% 0 5%
R110 0 5% 8.45K 1% 8.45K 1%
R401 10K 5% 2.2K 5% 4.7K 5%
C441 0.01uF 0.01uF DUMMY +5V_ALW
C449 0.01uF 0.01uF DUMMY
R397 1K 5% DUMMY DUMMY

15KR2J-1-GP
2

1
Q41 ISS355 DUMMY DUMMY

10KR2J-3-GP
PR4302
C16 1uF 10V 1uF 10V DUMMY

1
DY PD4302

PR4301
R30 33 1% 33 1% DUMMY BAV99-4-GP

2
R408 DUMMY DUMMY 0 5%

1
R400 DUMMY DUMMY 200K 5% PSID_DISABLE#_1 1

3
PQ4302 +5V_ALW +3.3V_ALW
R403 DUMMY DUMMY 7.5K 5%

2
MMBT3904-7-F-GP

100KR2J-1-GP

3
2
C450 DUMMY DUMMY 51P 10V PSID_DISABLE#_R 1 DY 2

2K2R2F-GP
PSID_DISABLE# 38

1
PR4303 0R2J-2-GP

PR4304
C C444 DUMMY DUMMY 2000P 10V C

PR4305
C448 DUMMY DUMMY 130P 10V PQ4303 +5V_ALW

G
C446 DUMMY DUMMY 0.1uF FDV301N-NL-GP

1
C483 DUMMY DUMMY 0.1uF PD4301 PU4301

2
BAV99-4-GP
R438 10K 1% 10K 1% DUMMY

3
PS_ID_IN_1 D S PS_ID_1 1 2 NB_PSID_TS5A63157 3 4

D
R412 DUMMY DUMMY 10k 5% PR4306 33R2J-2-GP B0 A PS_ID 37
2 5
GND VCC
R440 15.8K 1% 15.8K 1% DUMMY 74 DOCK_PSID 1 6 GPIO_PSID_SELECT 38

BLM18BD102SN1D-GP
B1 S
1

R407 DUMMY 10K 5% DUMMY

1
PD4303 DY
R9 0 5% 10 5% 0 5% NC7SB3157P6X-1GP

PL4302
SM24DTCT-GP
C482 DUMMY DUMMY DUMMY 1
PR4307
DY 33R2J-2-GP
2
C12 DUMMY DUMMY DUMMY
3

R435 0 5% 10 5% 0 5%

DCIN1
4
+DC_IN +DC_IN_SS
3 6 200mil 200mil PU4302
1 +DC_IN_L +DC_IN_L 1 2 1 S D 8

SCD022U50V3KX-GP
PL4303 2 S D 7

1
5 JACK_PSID BLM41PG600-GP 3 S D 6

1MR3J-L-GP
1

1
PC4302 PD4304 G D

PC4303

PR4308
2 4 5
15ONLY

PC4301

PC4304

1 PC4305

PC4306

PR4309
7 1SMA24AT3-G-GP

SCD1U50V3KX-GP
9 AO4407A-GP

2
8 +DC_IN_GND 1 2

2
A

1
PL4304

1
SKT-JACK-190-GP BLM41PG600-GP
VZ0603M260AGT-GP

VZ0603M260AGT-GP

SCD1U50V3KX-GP

SCD01U50V2KX-1GP
1

22.10140.321

SC10U25V6KX-1GP
SCD1U50V3KX-GP

SCD1U50V3KX-GP
1
PL4301

PL4305

1MR3J-L-GP

2
1
DY DY

PR4310

PC4307

4K7R3J-2-GP
2
B B
DY

22KR3J-L-GP
C
E

1
X01-49

2
PR4311
2

2
R2
PQ4301

R1

2
Varistor PDTA124EU-1-GP

B
MAX 8731A/ISL88731

D
Adapter Trip Current R416 R502 R501 R504 PQ4304
(W) (A) 2N7002A-7-GP PR4312
100KR2J-1-GP
65 3.17 57.6K 13.0K 105 24.9K PQ4305 G 1 2 NB_AC_OFF 38,44,45
90 4.43 51.1K 17.8K 348 33.2K 3 OUT AC_OFF_R

1
1 R1 PC4308
*R504 is populated if ADAPT_TRIP_SEL is used 44 NB_AC_OFF_BJT
IN 2 GND SCD1U50V3KX-GP

S
to program for the next lower adapter. R2

2
DDTC124EUA-7F-GP
1
BQ247451 PC4309
SCD1U10V2KX-4GP
2

Adapter Trip Current R416 R502 R501 R504


(W) (A)
65 3.17 57.6K 12.4K 205 24.3K
90 4.43 51.1K 16.9K 499 32.4K
*R504 is populated if ADAPT_TRIP_SEL is used
to program for the next lower adapter.

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

5 4
WWW.AliSaler.Com 3 2
Size
C

Date:
Document Number

Thursday, October 29, 2009


DC IN Jack
Fonseca UMA
1
Sheet 43 of
Rev

82
X01
5 4 3 2 1

SSID = PWR.Support
+PWR_SRC_VCHGR +PWR_SRC PD4402 +DOCK_PWR_BAR
PDS1040-13-GP-U
+VCHGR 2
3
PU4402 PU4403 1
S D D S DY 10KR5F-2-GP

PC4402

PC4401
1 8 8 1 1 2

SC2200P50V2KX-2GP

SCD1U25V2ZY-1GP
2 S D 7 7 D S 2 PR4402

240KR2J-1-GP
1

1
3 S D 6 6 D S 3 PU4401 +3.3V_ALW_2

1
G D D G

PR4403

PR4405
4 5 5 4 1 8

100KR2J-1-GP
D
2 7 PQ4402 SW_GND 45

1
AO4407A-GP AO4407A-GP 3 6 2N7002A-7-GP PR4404
4 5 DY 100KR2J-1-GP

D
2
G DOCK_DET# 38,74,75 PQ4403

2
FDS6679AZ-GP 3 4

C
E

2
D D
2 5 G PQ4404

S
1
74 ACAV_DOCK_SRC# 2N7002A-7-GP
PQ4405 PR4406 1 6
47KR2J-2-GP +3.3V_ALW

R2
PDTA124EU-1-GP

S
DMN66D0LDW-7-GP

R1

1
PRN4401

PR4407
22KR2J-GP
2
1 4 NB_AC_OFF_CTRL

B
PQ4406 +DC_IN_SS PD4403 2 3
3 OUT AC_OFF_1
1 R1 2 SRN100KJ-6-GP +5V_ALW
38 PBATT_OFF

2
IN 2 GND
R2 +NBDOCK_DC_IN_SS 3

22KR2J-GP
1
PQ4407

PR4408
DDTC124EUA-7F-GP 1 4 3
NB_AC_OFF 38,43,45

1
5 2
DY SDMG0340LC7F-GP-U

2
PR4409 6 1
1KR6J-1-GP 43 NB_AC_OFF_BJT

2
DMN66D0LDW-7-GP
+3.3V_ALW_2

1
PC4403 +DOCK_PWR_BAR +PWR_SRC
SC1U25V3KX-1-GP PQ4408 +PWR_SRC
DY

1
FDN358P-1-GP

SCD47U25V3KX-1GP
PD4404
2

1
PR4411
S D A K PR4410 100KR2J-1-GP
PQ4409 100KR2J-1-GP

1
R2

PC4404
E

2
SDMK0340L-7-F-GP PR4412 B

100KR2J-1-GP

2
G
240KR2J-1-GPC
R1 45 ACAV_DOCK_SRC

240KR2J-1-GP

2
1
EN_DOCK_PWR_BAR#
PDTA115EU-GP

PR4413

D
2

2
PR4401 PQ4410

1
C

47KR2F-GP

2
R1 ACAV_DOCK_SRC# PQ4401

PR4414
B G

1
E 2N7002A-7-GP
C PR4415 R2 C
47KR2J-2-GP PDTC115EU-GP-U
PD4401

S
N173877696

D
A K PQ4411
38 PBATT_OFF

2
DOCK_AC_OFF 38,74 EN_DOCK_PWR_BAR# 2N7002A-7-GP
D 1 2

D
SDMK0340L-7-F-GP PR4416 G
PQ4412 PQ4413 0R2J-2-GP EN_DOCK_PWR_BAR 38

1
2N7002A-7-GP 2N7002A-7-GP
G G 1 DY 2 PR4418

S
ACAV_DOCK_SRC 45 22KR2J-GP
PR4417
0R2J-2-GP

2
S

S
PD61
1'nd 83.R2004.C81
2'nd 83.00040.M81

SSID = RBATT
+3.3V_ALW
PD4405
2

Batt Connecter +3.3V_ALW


PBAT_SMBDAT1 3

1
2

BAV99-4-GP
PR4419
10KR2J-3-GP
PD4406
B B
BATT1 2
1

11 PBAT_PRES# 38
9 PBAT_SMBCLK1 3
8
7 PBAT_ALARM# 1
6
5 PBAT_PRES1# PR4420 1 2 100R2J-2-GP PRN4402 BAV99-4-GP
4 PBAT_SMBDAT1 2 3 PBAT_SMBDAT 37
3 PBAT_SMBCLK1 1 4 PBAT_SMBCLK 37 +VCHGR
2 PD4407
SRN100J-3-GP 2
1
10 PBAT_PRES1# 3

SYN-CON9-18-GP 1

20.81244.009 BAV99-4-GP
PC4405 PC4406
SCD1U50V3KX-GP SC2200P50V2KX-2GP
1

PD4408
2
2

PBAT_ALARM# 3 DY
1

BAV99-4-GP

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

5 4
WWW.AliSaler.Com 3 2
Size
C

Date:
DOCK DCIN/BATT Connector
Document Number
Fonseca UMA
Thursday, October 29, 2009
1
Sheet 44 of
Rev

82
X01
5 4 3 2 1

SSID = Charger

+DC_IN_SS +SDC_IN +PWR_SRC CHAGER_SRC


44 ACAV_DOCK_SRC
PU4502
8 D S 1 PG4502 X01-49

SCD1U50V3KX-GP
7 D S 2 1 2 1 2

1
D S +DC_IN PR4501

PC4504
6 3

100KR2J-1-GP

33KR2J-3-GP
2

SCD1U25V2ZY-1GP
PR4502
5 D G 4 D01R2512F-4-GP GAP-CLOSE-PWR PC4503

2
G1 1 6 D1

PR4503

PC4502
1 2 PG4501

160KR2F-GP
DOCK_DCIN_IS- 74

SCD1U25V2ZY-1GP
AO4407A-GP PG4503 1 2 DY

2
GAP-CLOSE-PWR-3-GP PG4504 15ONLY

PR4504
2

1
D D
GAP-CLOSE-PWR-3-GP S2 2 5 S1 GAP-CLOSE-PWR

1 1
3 4 PG4505

1
2
G2 D2
1 2

10KR2F-2-GP

10KR2J-3-GP
2
G2 3 4 D2

PR4505

PR4506
DOCK_DCIN_IS+ 74
S2 2 5 S1 GAP-CLOSE-PWR
leakage A PQ4501 PG4506

1
SI3993DV-T1-GP 1 2

33KR2J-3-GP
D
1

2
+SDC_IN

PR4507
PQ4503 G1 1 6 D1
PQ4505 GAP-CLOSE-PWR

100KR2J-1-GP

100KR2J-1-GP
SCD1U50V3KX-GP

D
2N7002A-7-GP
2N7002A-7-GP PQ4502 PG4507

1
SI3993DV-T1-GP

PR4510

PR4511
PQ4504 PQ4506 G 1 2

2
PR4509
2N7002A-7-GP 2N7002A-7-GP
G PR4508 0R2J-2-GP GAP-CLOSE-PWR

2
DY PG4508

PC4505
G G NB_AC_OFF 38,43,44 0R2J-2-GP

S
1 2

2
1

1 2 SW_GND 44

1
S
PR4513 PR4512 GAP-CLOSE-PWR

SCD1U50V3KX-GP
S

2
100KR2J-1-GP CHAGER_SRC

PC4510
200KR2F-L-GP 1 2
300KR3F-GP

SCD1U50V3KX-GP
1

1
CHG_AGND PC4506

PC4507
+DC_IN_SS 1

1
SCD1U50V3KX-GP PR4515 CHAGER_SRC

SC1U6D3V2KX-GP
2

1
need 20mil 0R2J-2-GP DY
PR4514

SC2D2U25V5KX-1GP
2

33R3J-2-GP
ICREF
+NBDOCK_DC_IN_SS

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD1U50V3KX-GP
SC2200P50V2KX-2GP
1

1
DY 0R2J-2-GP MAX8731A_DCIN MAX8731A_CSSP

PR4518

PC4514

PC4515

PC4516

PC4513

PC4508
2 1 2 22 28 1 2
2

DCIN CSSP

5
6
7
8

5
6
7
8

1
PD4501 PR4516 PC4511

PC4512
BAT54CW-1-GP MAX8731A_ACIN SCD1U50V3KX-GP DY DY

D
D
D
D

D
D
D
D
2

SI4800BDY-T1-GP

SI4800BDY-T1-GP
MAX8731A_REF ACIN MAX8731A_CSSN CHG_AGND
+3.3V_ALW 27

2
CSSN
1

PR4519 MAX8731A_LDO 11 26
charger current
2 10KR2F-2-GP

2
VDDSMB ICOUT
1

PC4509 PR4521 PD4502


10KR2F-2-GP
49K9R2F-L-GP

SCD01U50V2KX-1GP

0R3J-0-U-GP SD103AWS-1-GP CHG_AGND


BQ24745RHDR-GP

PU4504

PU4503
2MAX8731A_BST1 K
1.4~6.3A
PR4517

25 1 A 1 2
2

G
S
S
S

G
S
S
S
BOOT MAX8731A_LDO PC4517
DY
PR4520

21
SCD1U10V2KX-4GP
2

4
3
2
1

4
3
2
1
MAX8731A_ACOK VDDP SCD1U50V3KX-GP
1 2 13
PR4522 0R2J-2-GP ACOK
2

PG4509 24
37,39 ACAV_IN UGATE
1

1
1 2 10 PR4524 1 2 PC4520 PL4501 +VCHGR1 +VCHGR
37 CHARGER_SMBCLK SCL
1

CHG_AGND 0R3J-0-U-GP PC4518 DY SC3300P50V3KX-1GP IND-5D6UH-42-GP


PC4519
15K8R3F-GP

GAP-CLOSE-PWR-3-GP 23 1 2 SCD1U50V3KX-GP MAX8731A_LX1 1 2 1 2


2

2
PG4510 PHASE PR4525
C DY C
D01R2512F-3-GP
PR4523

1 2 9 1
DY 2

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
37 CHARGER_SMBDAT

3
SDA

GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP
CHG_AGND PC4521 SC220P50V2JN-3GP

PC4523
20

SCD1U50V3KX-GP

SC2D2U25V5KX-1GP
K
2

LGATE

5
6
7
8

1
GAP-CLOSE-PWR-3-GP DY PC4522

PC4524

PC4525

PC4527

PC4526

PC4528
1

1
SC1000P50V3JN-GP-U PD4503

D
D
D
D

1 2
SI4812BDY-T1-E3-GP
PR4526 +3.3V_ALW

PG4511

PG4512
39 SYS_IMON 14
NC#14 PGND
19 DY 1SMA18AT3G-GP
100KR2J-1-GP

SCD1U50V3KX-GP

2
1 2 2 DY 1 18

A
CHG_AGND CSOP PR4527
DY

PC4529

PU4505
2
PR4528 17 4D7R6J-GP

G
S
S
S
0R2J-2-GP MAX8731A_IINP CSON
8
4K7R2J-2-GP

4
3
2
1

2
MAX8731A_CCV VICM

1
1

2
PR4529
200KR2F-L-GP
PR4530

PR4531
0R2J-2-GP
1 2
8K45R2F-2-GP

6 CHG_AGND 1 2 MAX8731A_CSIP
FBO
1MAX8731A_CCV1

MAX8731A_CCI PR4532 0R2J-2-GP


PR4533

5 16
2

1
SC220P50V2JN-3GP

EAI NC#16

2
PC4531 PR4534 MAX8731A_CCS
PC4533

4
EAO
1

1 2 SC2200P50V2KX-2GP 7K5R2F-1-GP MAX8731A_REF 3 +VCHGR

SCD1U50V3KX-GP
VREF
1

2 1 2 1 1 2 MAX8731A_DAC
7

1
PC4530 PR4535 CE +VCHGR_R MAX8731A_CSIN
DY 12 15 1 2
GND
SCD1U10V2KX-4GP

SC150P50V2JN-3GP1 GND VFB


2 PC4501 0R2J-2-GP

PC4532

SCD1U50V3KX-GP
2

2
SC56P50V2JN-2GP PR4536
PC4538

1K8R6J-GP

1K8R6J-GP
2

DY PU4501 0R2J-2-GP DY

PR4537

PC4539
29

1
DY DY DY DY

PR4539
2

1
2

1 2 DY

2
PC4534 PC4535 PC4536 PC4537
SCD1U50V3KX-GP SCD01U50V2KX-1GP SCD01U50V2KX-1GP SC1U6D3V2KX-GP PR4538

2
0R3J-0-U-GP CHG_AGND CHG_AGND
CHG_AGND

PQ4507

D
2N7002A-7-GP
This Resistor
must be 1%
ACAV_IN
DY
tolerance. G
B B

S
1 2
+DC_IN_SS +3.3V_ALW PR4540 +3.3V_ALW
1MR2F-GP
59KR2F-GP
232KR2F-GP
1

+5V_ALW +5V_ALW
PR4541

PR4542

PR4543
100KR2J-1-GP
2

1
8

5 + 3 +
7 1 2 ACAV_IN_NB 37,38 1
6 2
SCD1U50V3KX-GP

- -
PR4544
PC4541
20KR2F-L-GP

SC100P50V2JN-3GP
1

PU4506B 0R2J-2-GP PU4506A


PC4540

PR4545

PR4546
42K2R2F-L-GP

4
2

LM393ADR-1-GP LM393ADR-1-GP
PD4504
K A leakage A
1

2
2

SDMK0340L-7-F-GP

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

5 4
WWW.AliSaler.Com 3 2
Size
C

Date:
Document Number

Thursday, October 29, 2009


Battery Charger
Fonseca UMA
1
Sheet 45 of
Rev

82
X01
A B C D E

+3.3V_ALW_2
SSID = PWR.Plane.Regulator_5v3p3v 51125_VCLK

1
PR4601

SC1KP50V2KX-1GP
100KR2J-1-GP

PC4604

SCD1U25V3KX-GP

SCD1U25V3KX-GP
2

2
2

PC4602

PC4603
51125_ENTRIP PD4602
BAT54-7-F-GP

2
DY
X01-16

3
PQ4601

3
4 2N7002A-7-GP 4
PD4601 PD4603
51125_ENTIP1 D S BAT54S-7F-GP BAT54S-7F-GP
X01-13

1
+PWR_SRC +PWR_SRC_3V +PWR_SRC +PWR_SRC_5V

D
10KR2J-3-GP PQ4602 PC4605 DY PR4602

1
PG4602 PG4605 2N7002A-7-GP SC18P50V2JN-1-GP 73K2R2F-GP +15V_ALW +5V_PWR
PR4623

2
1 2 1 2 PG4606
37 ALW_ON 1 2 G GAP-CLOSE-PWR-3-GP

G
2
GAP-CLOSE-PWR GAP-CLOSE-PWR PQ4603
PG4603 PG4607 2N7002A-7-GP 1 2
1 2 1 2 39 THERM_STP# 1 2

S
1
PR4603 PR4624 51125_ENTIP2 D S

1
GAP-CLOSE-PWR GAP-CLOSE-PWR 0R2J-2-GP PC4606

1
PG4604 PG4624 DY 200KR2J-L1-GP PD4604 SC1U25V3KX-1-GP PC4608 PC4609

1
1 2 1 2 BZT52C15S-GP SCD1U25V3KX-GP SCD1U25V3KX-GP

2
PC4607 DY PR4604

2
GAP-CLOSE-PWR GAP-CLOSE-PWR SC18P50V2JN-1-GP 130KR2F-GP

A
2

2
+PWR_SRC

+PWR_SRC_3V

X01-49 PC4612 PC4601 +PWR_SRC_5V


X01-49

SC10U25V6KX-1GP

SCD01U50V2KX-1GP
1

1
+5V_PWR +5V_ALW
15ONLY DY 15ONLY PG4608
X01-16 1 2

2
PC4610 PC4611 PC4613 PC4614 PC4615
D
1

8
7
6
5

5
6
7
8

1
GAP-CLOSE-PWR
SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP
D
D
D
D
SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
3 3
D
D
D
D
D

PU4602 PG4609
PU4603

16
FDS8884-GP 1 2
2

2
PU4601
Design Current = 6.1A FDS8880-NL-GP Design Current = 8A GAP-CLOSE-PWR

VIN
PG4613
9.57<OCP<11.31A 12.54A<OCP< 14.82A

G
S
S
S
SCD1U25V3KX-GP 1 2
S
S
S
G

+3.3V_ALW +3D3V_PWR PC4616 PR4605 PC4617


TPS51125RGER-GP G S
1
2
3
4

4
3
2
1
51125_VBST2 51125_VBST1 GAP-CLOSE-PWR
2
PG4610
1
S G 2 1 1 2
0R3J-0-U-GP
9 VBST2 VBST1 22 1 2
0R3J-0-U-GP PR4606
1 2
PG4611
+3D3V_PWR SCD1U25V3KX-GP 51125_DRVH2 10 21 51125_DRVH1 +5V_PWR 1 2
PL4602 DRVH2 DRVH1 PL4601
GAP-CLOSE-PWR
PG4612 1 2 51125_LL2 11 20 51125_LL1 1 2 GAP-CLOSE-PWR
IND-2D2UH-111-GP LL2 LL1 IND-2D2UH-111-GP
2 1 PG4616
1

51125_DRVL2 51125_DRVL1
D 12
DRVL2 DRVL1
19 1 2
1

1
GAP-CLOSE-PWR PC4618 PTC4602
D
8
7
6
5

5
6
7
8
ST220U6D3VDM-15GP

PG4614 DY PR4607 DY PR4608 GAP-CLOSE-PWR

D
D
D
D
SCD1U10V2KX-4GP

D
D
D
D

PG4615 2D2R5F-2-GP PU4604 51125_VO2 51125_VO1 PU4605 2D2R5F-2-GP PG4618 PC4619 PTC4601 PTC4603 PG4601
2 1 7 24 DY
2

VO2 VO1
1

1
GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP
FDS6690AS-GP 1 2
2

SCD1U10V2KX-4GP

ST220U6D3VDM-15GP

ST100U6D3VBM-7GP
GAP-CLOSE-PWR 51125_FB2 5 2 51125_FB1 FDS6676AS-GP DY

2
VFB2 VFB1 GAP-CLOSE-PWR
PG4617

2
1

2 1 PG4619
2

2
1
G
S
S
S
DY 1 2 51125_EN
DY 820KR2F-GP 13 23 ALW_PWRGD_3V_5V 1 2
S
S
S
G

GAP-CLOSE-PWR PC4620 PR4609 EN0 PGOOD PC4621


G S DY
2

1
2
3
4

4
3
2
1
SC330P50V3KX-GP 51125_ENTIP2 6 51125_ENTIP1 SC560P50V-GP GAP-CLOSE-PWR
PG4620 S G 1

2
51125_VREF ENTRIP2 ENTRIP1
2 1 PG4621
3 15 1 2
GAP-CLOSE-PWR VREF GND
1
SCD22U10V2KX-1GP

PC4622

PG4622 51125_TONSEL 4 25 GAP-CLOSE-PWR


TONSEL GND
2 1

1
2
1

GAP-CLOSE-PWR 14 18 51125_VCLK PR4612


SKIPSEL VCLK

1
PR4611 51125_SKIPSEL 0R2J-2-GP DY
PR4610 0R2J-2-GP PR4613
DY
VREG3

VREG5
6K65R2F-GP 33KR2F-GP

1 2
2 51125_FB1_R 2
2

1 2

51125_FB2_R 74.51125.073

2
PC4623 PC4624 DY
3D3V_AUX_S5_5_51125 8

17

+3.3V_ALW
DY SC18P50V2JN-1-GP +5V_ALW_2 SC18P50V2JN-1-GP

2
+3.3V_ALW_2
2

PG4623

1
1 2
1

PR4615 PR4616
PR4614 GAP-CLOSE-PWR-3-GP 100KR2J-1-GP 21K5R2F-GP
10KR2F-2-GP
51125_VREF 2
PR4617
DY 0R2J-2-GP
1

Close to VFB Pin (pin2)

2
+3.3V_ALW_2 2 1 ALW_PWRGD_3V_5V 37
2

PR4618 0R2J-2-GP

51125_VREF 2 1
1

PR4619 0R2J-2-GP PC4625 PC4626 PC4627


SC4D7U6D3V5KX-3GP

SC22U6D3V5MX-2GP

SC10U6D3V3MX-GP

+3.3V_ALW_2 2 DY 0R2J-2-GP
1 I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
2

Close to VFB Pin (pin5) PR4620 +3.3V_ALW_2 +3.3V_RTC_LDO


Inductor: FDVE0630-1R5M=P3 TOKO 10.6 mohm Isat =10.7Arms 68.1R510.10Y
2 DY 0R2J-2-GP
1 PR4621 O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00L
PR4622 1 2 O/P cap: 100U 6.3V 6TPE100MAZB 35mOhm 1.4Arms SANYO/77.21071.07L
0R2J-2-GP H/S: FDSS8884 SO-8/ 23mohm/30mOhm@4.5Vgs/ 84.08884.037
L/S: FDS6690AS SO-8/ 12mohm/15mOhm@4.5Vgs/ 84.06690.E37
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: FDVE0630-2R2M=P3 TOKO 14mohm Isat =9.4Arms 68.2R21B.10A
O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00LTONSEL CH1 CH2 SKIPSEL VREG3 or VREG5 VREF(2V) GND
H/S: FDSS8884 SO-8/ 23mohm/30mOhm@4.5Vgs/ 84.08884.037
L/S: FDS6690AS SO-8/ 12mohm/15mOhm@4.5Vgs/ 84.06690.E37 GND 200kHz 265kHz Operating OOA Auto Skip Auto Skip
Mode PWM only
1
VREF 245kHz 305kHz 1

VREG3 300kHz 375kHz


<Core Design>
VREG5 365kHz 460kHz EN0 Open 820kΩ to GND GND
Operating
enable both enable both LDOs, disable all Wistron Corporation
Mode 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
LDOs, VCLK on VCLK off and circuit Taipei Hsien 221, Taiwan, R.O.C.
and ready to ready to turn on
turn on Title
switcher
switcher channels
channels DCDC 5V/3D3V (TPS51125)

WWW.AliSaler.Com
Size Document Number Rev
Custom
Fonseca UMA X01
Date: Thursday, October 29, 2009 Sheet 46 of 82
A B C D E
5 4 3 2 1

+PWR_SRC

PM_DPRSLPVR 12
7 VR_CLKEN#

1
+PWR_SRC IMVP_VR_ON 38 PC4702 PC4703 PC4704 PC4705

SCD1U50V3KX-GP
SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
2

2
5
6
7
8
H_VID[6..0] 12

D
D
D
D
SI7686DP-T1-GP
PU4702

1
PTC4702 PTC4701

H_VID6

H_VID5

H_VID4

H_VID3

H_VID2

H_VID1

H_VID0
DY

SE100U25VM-11GP

SE100U25VM-11GP
2

G
S
S
S
+3.3V_RUN

4
3
2
1
0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP
UGATE1 +VCC_CORE
PL4702
D PHASE1 1 2 D

PR4764
2D2R5J-1-GP
1

1
L-D36UH-1-GP

1
PR4745 PTC4703 PTC4704

5
6
7
8
1K91R2F-1-GP DY

D
D
D
D
SIR460DP-T1-GE3-GP

GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP
PU4703

ST330U2VDM-4-GP
SE220U2VDM-12GP
1SNUBBER_1
1

62883_DPRSLPVR 1

2
PR4735

PR4749

PR4773

PR4718

PR4755

PR4746

PR4730

PR4762

PR4729

PR4740
2

PG4705

PG4706
1

1
62883_CLK_EN#

62883_VR_ON

PC4737
SC330P50V2KX-3GP
62883_VID6

62883_VID5

62883_VID4

62883_VID3

62883_VID2

62883_VID1

62883_VID0

S
S
S
4 G
3
2
1

2
DY

+VCC_CORE_PHASE1
2
+3.3V_RUN LGATE1

PHASE1_R
40

39

38

37

36

35

34

33

32

31
1

PU4701
PR4720 ISEN1 1 2

CLK_EN#

VID6

VID5

VID4

VID3

VID2

VID1

VID0
DPRSLPVR

VR_ON
1K91R2F-1-GP PR4756 10KR2F-2-GP
+5V_ALW VSUM+ 1 2
PR4772 PR4767 3K65R3F-GP
2

1 2 62883_PGOOD 1 30 BOOT2 1 2B00T2_R VSUM- 1 2


38,39 IMVP_PWRGD PR4704 0R2J-2-GP PGOOD BOOT2 2D2R3J-2-GP PR4770 PR4742 1R2F-GP
12 PSI# 1 2 62883_PSI# 2
PSI# UGATE2
29 UGATE2 X01-51 0R2J-2-GP ISEN2 1 2
PR4733 0R2J-2-GP 2 DY 1 PR4716 10KR2F-2-GP
1 2 62883_RBIAS 3 28 PHASE2 ISEN3 1 2

1
RBIAS PHASE2

2
NTC 470K close to H/S MOSFET of Phase1 PR4775 147KR2F-GP PR4738 10KR2F-2-GP
1 DY 2H_PROCHOT#_R 4 27 PC4710 SCD22U25V3KX-GP PR4751
9 H_PROCHOT# PR4771 PR4758 0R2J-2-GP VR_TT# VSSP2 0R3J-0-U-GP
1 DY 2 6266A_NTC_R1 DY 2 NTC-470K-1-GP 62883_NTC 5
NTC LGATE2
26 LGATE2 +PWR_SRC

ISL62883HRTZ-T-GP

2
PR4774 1 62883_VW 62883_VCCP
4K02R2F-GP DY 2PC4787 6
VW VCCP
25

SCD01U25V2KX-3GP
1 2 62883_COMP 7 X01.09/0819 24 62883_PWM3 PC4708 PC4728 PC4713 PC4716 PC4714 PC4715

1
PR4726 COMP PWM3/LGATE1#
Update Symbol

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD1U50V3KX-GP
8K06R2F-GP 62883_FB 8 23 LGATE1
FB LGATE1

2
1 2 ISEN3 9 22

5
6
7
8
PC4719 ISEN3/FB2 VSSP1

D
D
D
D
SI7686DP-T1-GP
SC1KP50V2KX-1GP ISEN2 10 21 PHASE1 PU4704
ISEN2 PHASE1
C
X01-51 C
1

UGATE1
PC4706 PC4707

BOOT1
ISUM+
ISEN1

ISUM-
VSEN

+1.05V_VTT
SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

IMON
41
VDD
RTN

1
GND

VIN
1 DY 2 1 2
2

G
S
S
S
PR4744 PC4726 PR4723

2
2
0R2J-2-GP SC33P50V2JN-3GP 0R2J-2-GP Design Current = 48A
11

12

13

62883_ISUM- 14

15

16

17

18

19

20

4
3
2
1
PC4709 PR4786 1
SCD22U25V3KX-GP DY 100KR2F-L1-GP

2
ISEN3 262883_COMP_R ISEN1 UGATE1 PR4722 UGATE2
62883_VDD

1 2 1 1 2 +VCC_CORE
62883_VIN

PL4701
PC4725 DY PC4740 PR4752 BOOT1 1 2BOOT1_PHASE1

1
1

SC22P50V2JN-4GP SC150P50V2JN-3GP 324KR2F-GP 2D2R3J-2-GP PHASE2 1 2


PC4736 CPU_IMON

PR4765
2D2R5J-1-GP
CPU_IMON 12,39

1
SCD22U10V2KX-1GP PR4754 PR4776 +5V_ALW L-D36UH-1-GP
2

1
VSUM- 1 2 +PWR_SRC PR4731 PTC4705

5
6
7
8

GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP
0R2J-2-GP PC4734 0R2J-2-GP PC4735
X01-51 DY

6K65R2F-GP

D
D
D
D
SIR460DP-T1-GE3-GP
1 2 SCD22U10V2KX-1GP 2 1 1 2 PU4705

ST330U2VDM-4-GP
+5V_ALW

2
1SNUBBER_2
PC4722

PG4711

PG4712
PC4718 PR4759

2
1

1
1 262883_FB_VSEN 1 2 1 1R2F-GP SC1U10V2KX-1GP
PR4714 BOOT3 6208_PHASE3
X01-51 1 2

2
562R2F-GP SC390P50V2KX-GP PR4732

PC4738
2

SC330P50V2KX-3GP
VSS_SENSE_R 12
2
SC1U10V2KX-1GP

2
PC4701

S
S
S
2D2R3J-2-GP

G
1 2

2
6208_FCCM
PR4712 2KR2F-3-GP SCD22U25V3KX-GP PC4723
X01-23

6208_PWM

4
3
2
1
5

1
1
PU4707 SCD22U25V3KX-GP DY

VCC

BOOT

2
LGATE2

PHASE2_R

+VCC_CORE_PHASE2
VSUM+
2 7 PHASE3
PWM PHASE
1

1
PC4717
C4717 PC4741
C4741 8 UGATE3
1

UGATE
2P

2P

PC4721 PR4750 4 LGATE3


LGATE
SCD33U16V3KX-1GP

SCD01U16V2KX-3GP

SC330P50V2KX-3GP PR4725 2K61R2F-1-GP 6 ISEN2 1 2


2

FCCM
1

82D5R2F-1-GP PR4736 PR4780 10KR2F-2-GP

GND
GND
1

VSUM+ 1 2
1VSUM_RR
2
11KR2F-L-GP

PR4739 3K65R3F-GP
VSUM_RC
2

VSUM-
ISL6208CRZ-TGP-U 1 2

9
3
12 VCC_SENSE PR4708 1R2F-GP
2

ISEN1 1 2
1

PC4711 PR4760 10KR2F-2-GP


SC330P50V2KX-3GP PR4721 ISEN3 1 2
2

PC4742 NTC-10K-26-GP PR4707 10KR2F-2-GP


2

12 VSS_SENSE SCD01U25V2KX-3GP
1

B VSUM- +PWR_SRC B
1 2
X01-23
1

PR4748 NTC 10K close to Choke of Phase1


PC4727 649R2F-GP
1

SC1KP50V2KX-1GP
2

PC4731
SCD1U25V3KX-GP PC4729 PC4730 PC4732 PC4733
Intel support POC (Power On Configuration).
2

1
1

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD1U50V3KX-GP
SCD22U25V3KX-GP
+1.05V_VTT 2

2
5
6
7
8
D
D
D
D
SI7686DP-T1-GP
1 2 PU4706

PR4737 PR4701 PR4709 PR4734 PR4713 PR4705 PR4769 PR4724 PR4753 PR4741
1

0R2J-2-GP
1KR2J-1-GP

1KR2J-1-GP

1KR2J-1-GP

1KR2J-1-GP

1KR2J-1-GP

1KR2J-1-GP

1KR2J-1-GP

1KR2J-1-GP

1KR2J-1-GP

G
S
S
S
DY DY DY DY

4
3
2
1
2

UGATE3 +VCC_CORE
PL4703
H_VID0
H_VID1 PHASE3 1 2
H_VID2

PR4766
2D2R5J-1-GP
1
H_VID3 L-D36UH-1-GP

1
GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP
H_VID4 PTC4707 PTC4708

5
6
7
8
H_VID5 DY

D
D
D
D
SIR460DP-T1-GE3-GP

PG4713

PG4714
H_VID6 PU4708

ST330U2VDM-4-GP

ST330U2VDM-4-GP
1SNUBBER_3

2
1

1
PM_DPRSLPVR

2
PSI#

PR4715 PR4702 PR4768 PR4743 PR4727 PR4710 PR4706 PR4703 PR4777

PC4739
SC330P50V2KX-3GP

2
1

S
S
S
G
1KR2J-1-GP

1KR2J-1-GP

1KR2J-1-GP

1KR2J-1-GP

1KR2J-1-GP

1KR2J-1-GP

1KR2J-1-GP

1KR2J-1-GP

1KR2J-1-GP

4
3
2
1
DY DY DY DY DY DY

PHASE3_R

+VCC_CORE_PHASE3
2
2

LGATE3

ISEN3 1 2
PR4763 10KR2F-2-GP
A VSUM+ A
1 2
PR4784 3K65R3F-GP
VSUM- 1 2
1R2F-GP
ISEN1 1 2
PR4719 10KR2F-2-GP
ISEN2 1 2 <Core Design>
PR4728 10KR2F-2-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ISL62883 CPU_CORE

WWW.AliSaler.Com
Size Document Number Rev
A2 Fonseca UMA X01
Date: Friday, October 30, 2009 Sheet 47 of 82
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blank)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserve

WWW.AliSaler.Com
Size Document Number Rev
A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 48 of 82
5 4 3 2 1
5 4 3 2 1

SSID = PWR.Plane.Regulator_1p05v

D D

C C

(Blank)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DC to DC 1.05V

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Size Document Number Rev
A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 49 of 82
5 4 3 2 1
5 4 3 2 1

SSID = PWR.Plane.Regulator_1p5v0p75v

+5V_ALW +5V_ALW

PR50031 2 0R2J-2-GP 0D75V_EN


38 0.75V_DDR_VTT_ON

1
PR5001
5D1R3J-GP PR50041 DY 2 0R2J-2-GP
9,22,35,38 SIO_SLP_S3#

1
+5V_ALW PR50051 2 0R2J-2-GP PC5005
DY DY

SC1U10V3KX-3GP

SC1U10V3KX-3GP
PR5002 22,38,72 SIO_SLP_S4# SCD1U10V2KX-4GP
D D

2
1 2 51116_VDD

A
8K45R2F-2-GP

PC5003
1

1
PC5002 PD5001

PC5004
+3.3V_ALW 1 2 SDMK0340L-7-F-GP
DY

2
SC1KP50V2KX-1GP X01.09/0824

K
1
PR5006 X01.09/0819

16

14

15
20KR2F-L-GP PU5001
+PW R_SRC +5116_PW R_SRC +1.5V_SUS_P +1.5V_SUS

ILIM

VDDP

VDDP
PR5007 PG5003 PG5002
2

BST 22 TPS51116_VBST1 1 DY 2 TPS51116_VBST 2 1 1 2


37 1.5V_SUS_PW RGD 13 PGD 0R3J-0-U-GP GAP-CLOSE-PW R GAP-CLOSE-PW R
1 RT 2 12 NC#12 DH 21 TPS51116_UGT PG5005 PG5004
PR5008 622KR2F-GP 2 1 1 2
37,42 DDR_ON 11 EN/PSV GAP-CLOSE-PW R GAP-CLOSE-PW R
1ST 2ND 0D75V_EN 10 20 TPS51116_PHS PG5007 PG5006
VTTEN LX
TI RT 2 1 1 2
+1.5V_SUS_P 23 VTTIN
PR5008 Non_ASM ASM GAP-CLOSE-PW R GAP-CLOSE-PW R
PC5006 1 DL 19 TPS51116_LGT PG5009 PG5008
+5V_ALW SC1U10V3KX-3GP 7 2 1 1 2
NC#7
2

PR5009 1 DY 2 1M1R2J-GP TPS51116RGER-GP-U GAP-CLOSE-PW R GAP-CLOSE-PW R


+1.5V_SUS_P 1 18 PG5011 PG5010
PGND2 PGND1
PGND1 17 2 1 1 2
C PR5010 1 DY 2 0R2J-2-GP TPS51116_TON 4 C
TON TPS51116_VDDQSNS GAP-CLOSE-PW R GAP-CLOSE-PW R
8
X01-9 PR5016 1
VDDQS PG5012
2 0R2J-2-GP 24 VTT FB 9 51116_VDDQSET 1 2
+5V_ALW
2

2 PR5011 GAP-CLOSE-PW R
PC5007 VTTS +5116_PW R_SRC PG5013
DY VCCA 6 1 DY 2
VSSA

SC1KP50V2KX-1GP 1 2
GND

REF
1

0R2J-2-GP

1
+0D75V_DDR_P GAP-CLOSE-PW R
DY PC5008 PG5014
25

5
+V_DDR_MCH_REF SC1U10V3KX-3GP 1 2

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD1U50V3KX-GP

SC4D7U25V5KX-GP
GAP-CLOSE-PW R

PC5010

PC5001

PC5011

PC5012
1 2

1
PR5012 PG5015
1

0R3J-0-U-GP 1 2

5
6
7
8
PC5009

2
D
D
D
D
SCD033U16V3KX-GP PU5002 GAP-CLOSE-PW R
2

FDS8880-NL-GP

Design Current = 8.9A


+0D75V_DDR_P 13.97 <OCP< 16.51A

G
S
S
S
4
3
2
1
+0D75V_DDR_P +0.75V_DDR_VTT +1.5V_SUS_P
SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP
SCD1U10V2KX-4GP

PG5001 TPS51116_UGT
PC5013

PL5001
1

1
PC5014

PC5015

PC5016

1 2
TPS51116_VBST 1 2 TPS51116_PHS 1 2
B GAP-CLOSE-PW R B
2

PG5016 PC5017 IND-1D5UH-55-GP

SC4D7U6D3V5KX-3GP
1
1 2 SCD1U25V3KX-GP

SCD1U10V2KX-4GP
PTC5001 PTC5002

PC5018

PC5019
5
6
7
8

1
GAP-CLOSE-PW R DY PR5013

D
D
D
D
PU5003 2D2R5F-2-GP

PG5017
FDS6676AS-GP

ST220U2D5VDM-13GP

ST220U2D5VDM-13GP
GAP-CLOSE-PWR-3-GP
2

2
1
TPS51116_PHS_SET

1
G
S
S
S
DY PC5020
X01-45

4
3
2
1
SC330P50V3KX-GP

2
TPS51116_LGT TPS51116_VDDQSNS

1
PR5014
State S3 S5 VDDR VTTREF VTT 30KR2F-GP PC5021
DY SC18P50V2JN-1-GP

2
S0 Hi Hi On On On

2
51116_VDDQSET
S3 Lo Hi On On Off(Hi-Z)

1
S4/S5 Lo Lo Off Off Off PR5015
30KR2F-GP
Close to VFB Pin (pin5)

2
A <Core Design> A

VDDQSET VDDQ (V) VTTREF and VTT NOTE


I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Wistron Corporation
GND 2.5 VVDDQSNS/2 DDR Inductor: FDV1040-1R5M=P3 TOKO DCR:3.86 mohm Isat =19.7Arms 68.1R510.10Q 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
O/P cap: TLPSLV0G227M(25)12RE 25mOhm 2.5Arms NEC_TOKIN/ 77.C2271.07L Taipei Hsien 221, Taiwan, R.O.C.
H/S: FDS8880 SO-8/9.6mohm/ 12mOhm@4.5Vgs/ 84.08880.037 Title
V5IN 1.8 VVDDQSNS/2 DDR2
L/S: FDS8672S SO-8/ 5.3mOhm/7.0mohm@4.5Vgs/ 84.08672.A37
Switching freq-->400KHz DC to DC 1.5V / 0.75V

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FB Resistors Adjustable VVDDQSNS/2 1.5 V < VVDDQ < 3 V Size Document Number Rev
Custom X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 50 of 82
5 4 3 2 1
5 4 3 2 1

SSID = PWR.Plane.Regulator_1p8v LDO for +1.8V_RUN

D D

+3.3V_SUS

1
PR5101
100KR2J-1-GP

2
1.8V_RUN_PW RGD
38 1.8V_RUN_PW RGD

+3.3V_SUS +1.8V_LDOIN

PG5102
1 2 VOUT = 0.8 *(1+Rtop/Rbot)
GAP-CLOSE-PW R

C PG5103 C
1 2 +1.8V_RUN
GAP-CLOSE-PW R Design current = 1.09A

5
4
3
2
1
NC#4
NC#3

NC#1
GND
POK
DY PR5103
0R3J-0-U-GP
RT9035-18GQW-GP-U

2
GND 21
9035_NC#6 6 20 9035_NC#20 +1D8V_RUN_P +1.8V_RUN
9035_EN NC#6 NC#20 9035_ADJ PG5101
38,42,72 RUN_ON 1 2 7 EN ADJ 19
8 VIN VOUT 18 1 2
PR5102 9 17
0R2J-2-GP VIN VOUT GAP-CLOSE-PW R
10 VIN VOUT 16

1
PG5108

NC#12
NC#13
NC#14
NC#15
PR5104 1 2

VDD
PC5104 1K27R2F-L-GP PC5105 PC5106
1

1
PC5102 PC5101 PC5103 GAP-CLOSE-PW R
DY DY PU5101 DY

SC1KP50V2KX-1GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
11
12
13
14
15

2
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U10V5KX-2GP
2

2
+5V_ALW

1
PR5105

1
1KR2F-3-GP
PR5106
B 0R3J-0-U-GP B

2
2
9035_VDD

1
PC5107
SC1U10V2KX-1GP

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DC to DC +1.8V_RUN

WWW.AliSaler.Com
Size Document Number Rev
A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 51 of 82
5 4 3 2 1
5 4 3 2 1

SSID = PWR.Plane.Regulator_1p05v

D D
+PWR_SRC +1.05V_VTT_PWR_SRC

PG5202
1 2

GAP-CLOSE-PWR
PG5203 +1.05V_VTT_PWR_SRC +1.05V_VTT_P +1.05V_VTT +1.05V_VTT_P +1.05V_VTT
1 2
PG5204 PG5205
GAP-CLOSE-PWR 1 2 1 2
PG5206
1 2 GAP-CLOSE-PWR GAP-CLOSE-PWR

GAP-CLOSE-PWR TPS51218 for +1.05V_VTT PC5202 PC5201 PC5203 PC5204 1


PG5207
2 1
PG5208
2

1
PG5209

5
6
7
8

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD1U50V3KX-GP

SC4D7U25V5KX-GP
1 2 GAP-CLOSE-PWR GAP-CLOSE-PWR

D
D
D
D
PU5202 PG5210 PG5211

2
GAP-CLOSE-PWR SI7686DP-T1-GP 1 2 1 2
PG5212
1 2 GAP-CLOSE-PWR GAP-CLOSE-PWR
Max. Current = 18A PG5213 PG5201

G
S
S
S
GAP-CLOSE-PWR 1 2 1 2
PG5214 37 VTT_PWRGD Design Current = 18A

4
3
2
1
1 2 19.8<OCP<23.4A GAP-CLOSE-PWR GAP-CLOSE-PWR
73K2R2F-GP PR5202 PU5201 PG5216 PG5215
GAP-CLOSE-PWR PR5203 PC5205 1 2 1 2
X01-16 1 2
51218_TRIP
1 PGOOD GND 11
51218_VBST 1
0R3J-0-U-GP SCD1U25V3KX-GP
+1.05V_VTT_P
2 10 251117B_LL1 2 1 PL5201
GAP-CLOSE-PWR GAP-CLOSE-PWR
C TRIP VBST 51218_DRVH 51218_DRVH PG5217 PG5218 C
38 CPU_VTT_ON 3 EN DRVH 9
51218_VFB 4 8 51218_SW 1 2 1 2 1 2
VFB SW IND-1UH-80-GP
5 CCM V5IN 7
6 51218_DRVL +5V_ALW GAP-CLOSE-PWR GAP-CLOSE-PWR
DRVL
1

GAP-CLOSE-PWR-3-GP
PC5208 PC5209 PTC5202 PTC5201 PG5219
1

5
6
7
8

1
PC5206 PR5204 1 2

D
D
D
D

PG5220

SC4D7U6D3V5KX-3GP

SCD1U10V2KX-4GP

SE220U2VDM-8GP

SE220U2VDM-8GP
SC1KP50V2KX-1GP 470KR2F-GP TPS51218DSCR-GP-U PC5207 PU5203 PR5205

1
SC1U10V2KX-1GP 2D2R5J-1-GP GAP-CLOSE-PWR
SIR164DP-T1-GE3-GP
X01-16 DY
2

2
2

X01-3

2
G
S
S
S

1
PC5210

4
3
2
1
DY SC330P50V2KX-3GP

2
+1.05V_VTT +1.05V_RUN
Frequency setting
PG5223
420K -->290KHz VTT_SENSE
VTT_SENSE 12 1 2
51218_DRVL
200K -->340KHz

1
GAP-CLOSE-PWR
PR5201 PG5226
100K -->380KHz R1 10KR2F-2-GP 1 2

39K -->430KHz X01-40 GAP-CLOSE-PWR

2
PG5224
51218_VFB 1 2
+1.05V_VTT GAP-CLOSE-PWR

1
B B
PG5225
PR5206 1 2
R2 20KR2F-L-GP
PTC5203 GAP-CLOSE-PWR

1
+3.3V_ALW PG5222

SE220U2VDM-8GP
1 2
X01-12

2
1

GAP-CLOSE-PWR
PR5208 PG5221
100KR2J-1-GP 1 2

GAP-CLOSE-PWR
Vout=0.704V*(R1+R2)/R2
2

PU5205
1 6

VTT_PWRGD 2 5 H_VTTPWRGD_R
+1.05V_VTT
3 4
1

DMN66D0LDW-7-GP
1

PR5210
DY PC5211 1KR2J-1-GP
SC1U10V2KX-1GP
2

H_VTTPWRGD
H_VTTPWRGD 9

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DC to DC +1.05V_VTT
Size Document Number Rev
Custom Fonseca UMA X01
Date: Thursday, October 29, 2009 Sheet 52 of 82
5 4 3 2 1

WWW.AliSaler.Com
5 4 3 2 1

SSID = CPU.GFX.Regulator

+PWR_SRC +CPU_GFXCORE_PWR_SRC +5V_ALW

PG5302
1 2 PR5302 1 2 0R2J-2-GP 3211_VID6
13 GFX_VID6
D GAP-CLOSE-PWR PR5303 1 2 0R2J-2-GP 3211_VID5 +CPU_GFXCORE_P +CPU_GFXCORE D
13 GFX_VID5
PG5303
1 2 PR5304 1 2 0R2J-2-GP 3211_VID4 PG5304
13 GFX_VID4

1
1 2
GAP-CLOSE-PWR PR5305 1 2 0R2J-2-GP 3211_VID3
13 GFX_VID3
PG5305 PR5306 GAP-CLOSE-PWR
1 2 PR5307 1 2 0R2J-2-GP 3211_VID2 10R3J-3-GP PG5306
13 GFX_VID2
1 2

2
GAP-CLOSE-PWR PR5308 1 2 0R2J-2-GP 3211_VID1
13 GFX_VID1
PG5307 GAP-CLOSE-PWR
1 2 PR5309 1 2 0R2J-2-GP 3211_VID0 +CPU_GFXCORE_PWR_SRC PG5301
13 GFX_VID0
1 2
GAP-CLOSE-PWR +1.05V_VTT PR5301 1 DY 2 10KR2J-3-GP
PG5309 1 2 3211_GFX_VR_EN GAP-CLOSE-PWR
13 GFX_VR_EN
PR5310 0R2J-2-GP

SC1U10V2KX-1GP
1 2 PG5308

1
1 2
GAP-CLOSE-PWR +1.05V_RUN PR5311

1
4K7R2J-2-GP PC5302 PC5303 PC5304 PC5306 GAP-CLOSE-PWR

5
6
7
8

1
PC5301 PG5310

D
D
D
D
1

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD01U25V2KX-3GP
PU5302 1 2

2
PR5312 SI7686DP-T1-GP

2
+3.3V_ALW GAP-CLOSE-PWR
10KR2J-3-GP DY
GND_3211_I Max. Current = 22A PG5311
GND_3211_I 1 2
Design Current = 15.4A

G
S
S
S
32
31
30
29
28
27
26
25
13 GFX_IMON PR5313 PU5301 24.2A<OCP< 28.6A GAP-CLOSE-PWR

4
3
2
1
1

10KR2J-3-GP PG5312

VID0
VID1
VID2
VID3
VID4
VID5
VID6
EN
PR5314 1 2
5K76R2F-2-GP PC5308
X01-16

1
ADP3211MNR2G-GP SCD22U16V3KX-2-GP GAP-CLOSE-PWR
3211_PWRGD 1 24 3211_VCC +CPU_GFXCORE_P
2

VSS_AXG_SENSE PWRGD VCC 3211_BST PR5315


1 2 2 23 1 2 1R3J-L1-GP 3211_BST_1 1 2 PL5301
PC5307 SCD068U16V2KX-GP IMON BST 3211_DRVH 3211_DRVH
3 22
3211_FBRTN CLKEN# DRVH 3211_SW +CPU_GFXCORE_P +CPU_GFXCORE
4 21 1 2
FBRTN SW IND-D56UH-22-GP
5 20 +5V_ALW
FB PVCC 3211_DRVL
6 19 PG5313
COMP DRVL

1
C PR5317 C
7 18 1 2

SC3D3U10V5KX-2GP

2D2R3J-2-GP
SC47P50V2JN-3GP

+5V_ALW GPU PGND

5
6
7
8
1 2 8 17
SC220P50V2JN-3GP

ILIM GND

D
D
D
D
33 PU5303 DY GAP-CLOSE-PWR

CSCOMP
GND
1

1
PR5316 8K87R2F-2-GP PC5310 SIR460DP-T1-GE3-GP PTC5302 PTC5301 PC5312 PC5313 PG5314

CSREF
RAMP
LLINE
3211_CSCOMP

CSFB
PC5309 PC5311 1 2

IREF
RPM

ST330U2D5VDM-9GP

ST330U2D5VDM-9GP

SCD01U25V2KX-3GP
RT
2

2
GAP-CLOSE-PWR

SC1U10V2KX-1GP
S
S
S
PR5318 PC5314 20KR2F-L-GP GND_3211_I

SC470P50V2KX-3GP
PG5315

9
10
11
12
13
14
15
16
1 2 1 2 1 2 1 2

4
3
2
1

1
0R2J-2-GP
1
1KR2F-3-GP PR5319 1 2 3211_IREF PC5315 GAP-CLOSE-PWR
SC470P50V2KX-3GP PR5320 80K6R2F-GP 3211_DRVL DY PG5316

3211_CSCOMP
1 2 3211_RPM PR5321 1 2

3211_CSREF

2
3211_RAMP
3211_LLINE

3211_CSFB
PR5322 237KR2F-GP

2
1 2 3211_RT GAP-CLOSE-PWR
PR5323 340KR2F-1-GP PG5317
1 2
SC1KP50V2KX-1GP

GND_3211_I GAP-CLOSE-PWR
1

PC5316 PG5318

X01-16 X01-16 1 2
2

+CPU_GFXCORE_PWR_SRC 2 1 1 2 GAP-CLOSE-PWR
PR5325 422KR2F-1-GP PG5319
PR5326 PR5327 PR5328
PR5324 1 2
+CPU_GFXCORE 1KR2F-3-GP 1 2 1 2 1 2
GAP-CLOSE-PWR
GND_3211_I PC5318 PC5319 110KR2F-GP 61K9R2F-GP
178KR3F-GP
1

PR5335 PC5317
SC1000P100V3KX-GP

SC1KP50V2KX-1GP
100R2F-L1-GP-U SC330P50V2KX-3GP PR5330
2

1
20KR2F-L-GP

NTC-220K-2-GP
1

1 2
2

PR5331 1 2 0R2J-2-GP DY
VCC_AXG_SENSE 13
2

GND_3211_I PR5329
B B
PR5332 1 2 0R2J-2-GP VSS_AXG_SENSE 13
2
1

PR5336
100R2F-L1-GP-U
0R2J-2-GP

PR5333
2

2 3211_CSCOMP

PC5320
SC1KP50V2KX-1GP
2

GND_3211_I

PR5334 1 2 0R2J-2-GP

A A

GND_3211_I

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ADP3211 CPU_GFXCORE

5 4
WWW.AliSaler.Com 3 2
Size
Custom

Date:
Document Number

Thursday, October 29, 2009


Fonseca UMA
1
Sheet 53 of
Rev

82
X01
5 4 3 2 1

SSID = VIDEO
+LCDVDD
LED Location from left to right
HDD BATTERY C5402 C5403

1
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
X01.09/0825

2
LCD1
D 48 D

41 50
1 LVDS_CBL_DET#
LVDS_CBL_DET# 21
Near LCD1 CONN
2
3
4 eDP_CTX_LRX_N1 8 1 2 LCD_TST 38
5 eDP_CTX_LRX_P1 8 R5404 0R2J-2-GP
42 6
7 eDP_CTX_LRX_N0 8
8 eDP_CTX_LRX_P0 8
9 +3.3V_RUN
10 eDP_AUX 8
11 eDP_AUX# 8
12

1
43 13 BAT1_LED_AMBER_P 66 For DPST function
14 R5405 R5406
BAT2_LED_BLUE_P 66 10KR2J-3-GP DY DY 10KR2J-3-GP
15 BREATH_PW RLED_P 66
16 LCD_TST_C
17 LCD_SMBDAT_C R5426 1 2 100R2J-2-GP LCD_SMBDAT_1

2
18 LCD_SMBCLK_C R5427 1 2 100R2J-2-GP LCD_SMBCLK_1
19 LCD_PW M 1 2 LCD_PW M_R 1 2 LBKLT_CTL_PCH 20
44 20 LCD_BL_EN R5410 0R2J-2-GP R5412 1 2 0R2J-2-GP PANEL_BKEN_PCH 20,38
21 R5408 DY 0R2J-2-GP
eDP_LCD_HPD 8
22
X01.09/0921

1
23 +LCDVDD +3.3V_ALW

1
24 +LCDVDD R5401
EC5401 DY 100KR2J-1-GP DY LCD_SMBUS_PW R
25
26
DY
2 SC22P50V2JN-4GP +3.3V_RUN R5425
1 2
0R2J-2-GP

1
2

2
1
45 27 X01.09/0825

2
C 28 1 2 C
29 R5418 0R2J-2-GP RN5401 RN5402
30 SRN2K2J-1-GP SRN2K2J-1-GP
31
32 X01-33 X01-50

4
3

3
4
46
33
34 LCD_DET_G 1 2 15U_ONLY U5401
35 R5403 0R2J-2-GP LCD_SMBDAT_1 1 6 LCD_SMBDAT 37
36
37 2 5
38 +INV_PW R_SRC
39 3 4
40
47 51 DMN66D0LDW -7-GP
LCD_SMBCLK_1
49
LCD_SMBCLK 37
IPEX-CONN40-2R-GP-U

20.F1093.040

SSID = VIDEO SSID = Inverter

B B

+3.3V_RUN +LCDVDD LED BACKLIGHT CONVERTER POWER


Q5401 +PW R_SRC +INV_PW R_SRC
+15V_ALW 1 D D 6 LCD POWER
2 D D 5 FUSE5401
1 2 3 G S 4 1 2
R5414 330KR2J-L1-GP
1

2
SI3456DDV-T1-GE3-GP C5407 C5408
?A-70degC C5405 C5406 POLYSW -1D1A24V-1-GP
1

1 2 FPVCC_CTL1 R5415 SC1KP50V2KX-1GP SCD1U50V3KX-GP

1
SC10U6D3V5ZY-2GP

SCD1U10V2KX-4GP

C5404 SCD1U50V3KX-GP 150R3J-L-GP


X01.09/0819
2

1 DY 100KR2J-1-GP
2
R5416 X01.09/0825
Q5402
4 3 LCDVDD_1

5 2

6 1

DMN66D0LDW -7-GP

+3.3V_ALW 1 2
R5419 47KR2J-2-GP
A A
D5401 <Core Design>
1 Q5404
20,38 ENVDD_PCH
3 OUT FPVCC_CTL3
EN_LCDPW R 2 R1
3
IN 1 GND Wistron Corporation
2 R2 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
38 LCD_VCC_TEST_EN Taipei Hsien 221, Taiwan, R.O.C.
DDTC144EUA-7F-GP
BAT54C-7-F-GP
Title

LCD

WWW.AliSaler.Com
Size Document Number Rev
Custom X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 54 of 82
5 4 3 2 1
5 4 3 2 1

SSID = VIDEO
RED_CRT L5502 1 2 CRT_R
75 RED_CRT
BLM18BA220SN1D-GP
GREEN_CRT L5501 1 2 CRT_G
75 GREEN_CRT
BLM18BA220SN1D-GP
BLUE_CRT L5503 1 2 CRT_B
75 BLUE_CRT
BLM18BA220SN1D-GP

C5502

C5503

C5504
150R2F-1-GP

150R2F-1-GP

150R2F-1-GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

SC6D8P50V2CN-GP
1

1
C5505 C5506 C5507

R5502

R5503

R5501
D D
DY DY DY

2
2

2
CRT_SW ITCH_VSYNC 1 2 VSYNC_BUF
75 CRT_SW ITCH_VSYNC
R5504 0R2J-2-GP
1 2 VSYNC_DOCK 74 Layout Note:
R5505 0R2J-2-GP +5V_CRT_RUN
*Pi-filter & 150 Ohm pull-down
75 CRT_SW ITCH_HSYNC
CRT_SW ITCH_HSYNC 1 2 HSYNC_BUF resistors should be as close
R5506 0R2J-2-GP
as to CRT CONN.

1
1 2 C5508
R5507 0R2J-2-GP HSYNC_DOCK 74 SCD1U10V2KX-4GP * RGB signal will hit 75 Ohm
first, then pi-filter, finally

2
CRT CONN.

14

1
R5508
HSYNC_BUF 2 3 HSYNC_5 2 1 JVGA_HS

C 33R2J-2-GP C
U5501A

14

7
4
SSAHCT125PW R-GP
R5509
VSYNC_BUF 5 6 VSYNC_5 2 1 JVGA_VS

33R2J-2-GP
U5501B

1
SSAHCT125PW R-GP
C5509 DY DY C5501
SC100P50V2JN-3GP SC100P50V2JN-3GP

2
+5V_RUN

A
D5501 +5V_CRT_RUN
B0530W S-7-F-GP

K
I2C

2
FUSE5501
DAT_DDC2_CRT FUSE-3A32V-7-GP
75 DAT_DDC2_CRT
B CLK_DDC2_CRT B
75 CLK_DDC2_CRT

1
+5V_CRT_RUN_R

1
CRT1
C5510 C5511 16
SC22P50V2JN-4GP SC22P50V2JN-4GP

2
6
CRT_R 1 11

7
CRT_G 2 12 DAT_DDC2_CRT
8
MAX4885E has internal ESD protection CRT_B 3 13 JVGA_HS
9
and internal level shift 4 14 JVGA_VS
10
5 15 CLK_DDC2_CRT

17

D-SUB-15-36-GP
20.20431.015

CRT Connector
A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CRT

WWW.AliSaler.Com
Size Document Number Rev
A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 55 of 82
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blank)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserve

WWW.AliSaler.Com
Size Document Number Rev
A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 56 of 82
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blank)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserve

WWW.AliSaler.Com
Size Document Number Rev
A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 57 of 82
5 4 3 2 1
5 4 3 2 1

SSID = CPU SSID = Thermal


+3.3V_RUN

1
R5802
10KR2J-3-GP

2
FAN1_TACH_FB
39 FAN1_TACH_FB

1
DY EC5801
SCD1U10V2KX-4GP

2
D D

FAN1
5
FAN1_VOUT 1
39 FAN1_VOUT

AFTP5801 1 2

K
3

1
D5801 C5801 4
SC22U6D3V5MX-2GP
X01-7 SDMK0340L-7-F-GP 6

2
MLX-CON4-25-GP-U

A
CPU XDP 20.F1000.004
39 FAN1_DET#

XDP1 1 FAN1_VOUT
NP1
AFTP5802
AFTP5803 1 FAN1_TACH_FB
FAN1_DET#
X01-48
61 AFTP5804 1
1 2
62
XDP_PREQ# 3 4 XDP_OBS16 1 TP5802
9 XDP_PREQ# XDP_PRDY# XDP_OBS17 1
9 XDP_PRDY# 5 6 TP5803
7 8
XDP_OBS0 9 10 XDP_OBS8 1 TP5804
9 XDP_OBS0
XDP_OBS1 11 12 XDP_OBS9 1 TP5805
9 XDP_OBS1
13 14
XDP_OBS2 15 16 XDP_OBS10 1 TP5806
9 XDP_OBS2
XDP_OBS3 17 18 XDP_OBS11 1 TP5807
9 XDP_OBS3
19 20
TP5808 1 XDP_OBS21 21 22 XDP_OBS18 1 TP5809
TP5810 1 XDP_OBS20 23 24 XDP_OBS19 1 TP5811
25 26 +1.05V_VTT
XDP_OBS4 27 28 XDP_OBS12 1 TP5812
9 XDP_OBS4
Place R near XDP1 CONN XDP_OBS5 29 DY 30 XDP_OBS13 1 TP5801
within 2" 9 XDP_OBS5
C 31 32 C

1
XDP_OBS6 33 34 XDP_OBS14 1 TP5813 C5802
9 XDP_OBS6
XDP_OBS7 35 36 XDP_OBS15 1 TP5814 DY SCD1U16V2KX-3GP
9 XDP_OBS7
R5803 37 38

2
+1.05V_VTT H_CPUPWRGD_XDP BCLK_ITP_P
9,25 H_PWRGD 1 DY 2 1KR2J-1-GP PM_PWRBTN#_XDP
39 40
BCLK_ITP_N
BCLK_ITP_P 9
22 PM_PWRBTN#_R
1 DY 2 41 42 BCLK_ITP_N 9 1 DY 2 PLTRST1# 9,21
R5804 0R2J-2-GP 43 44 R5805 0R2J-2-GP
1 DY 2 PCIE_CLK_XDP_P 45 46 XDP_RST#_R 1 DY 2 H_CPURST# 9
9 H_PWRGD_XDP
1

C5803 R5806 1 TP_PCIE_CLK_XDP_N 47 48 XDP_DBRESET# R5807 1KR2J-1-GP XDP_DBRESET# 9,22,38


TP5815
SCD1U16V2KX-3GP DY 0R2J-2-GP 49 50
51 52 XDP_TDO XDP_TDO 9
18,19,23,40 PCH_SMBDATA_MEM
2

53 54 XDP_TRST#
18,19,23,40 PCH_SMBCLK_MEM XDP_TRST# 9
55 56 XDP_TDI
XDP_TCLK XDP_TMS XDP_TDI 9 +1.05V_VTT
57 58
9 XDP_TCLK XDP_TMS 9
59 60
63 2
R5808
DY 51R2J-2-GP
1
64
NP2

STC-CONN60A-GP-U1

20.F0971.060

B SSID = PCH A 33 ohm series resistor should be placed


B

within 1 inch (or 25.4 mm) of the PCH to


source terminate the interface.

PCH XDP
Place near PCH side XDP2 Place near XDP CONN Place near PCH side
NP1
61 +3.3V_SUS +3.3V_SUS
1 2
62
3 4 XDP_FN16 2 DY 1 LED_BD_DET#_R 25

1
5 6 XDP_FN17 R5809 2 DY 1 33R2J-2-GP R5814 R5815 R5811
SIO_EXT_SCI#_R 25
7 8 R5810 33R2J-2-GP

200R2F-L-GP

200R2F-L-GP

200R2F-L-GP
21 USB_OC#0_1_R 1 DY 2 XDP_FN0 9 10 XDP_FN8 2 DY 1 PCMCLK_REQ# 23,32
21 USB_OC#2_3_R R5812 1 DY 2 33R2J-2-GP XDP_FN1 11 12 XDP_FN9 R5801 2 DY 1 33R2J-2-GP MINI1CLK_REQ# 23,64
R5816 33R2J-2-GP 13 14 R5817 33R2J-2-GP

2
21 USB_OC#4_5 1 DY 2 XDP_FN2 15 16 XDP_FN10 2 DY 1 HDD_DET#_R 24
21 USB_OC#6_7 R5813 1 DY 2 33R2J-2-GP XDP_FN3 17 18 XDP_FN11 R5818 2 DY 1 33R2J-2-GP PCH_JTAG_TDI
PCH_GPIO19 24
PCH_JTAG_TCK R5819 33R2J-2-GP 19 20 R5820 33R2J-2-GP PCH_JTAG_TDO
21 22 PCH_JTAG_TMS
23 24
25 26
21 USB_OC#8_9 1 DY 2 XDP_FN4 27 28 XDP_FN12 2 DY 1 RTC_BAT_DET#_R 25
1

1
21 USB_OC#10_11 R5821 1 DY 2 33R2J-2-GP XDP_FN5 29 DY 30 XDP_FN13 R5822 2 DY 1 33R2J-2-GP R5830 R5827 R5831
PCH_GPIO37 25
R5823 33R2J-2-GP 31 32 R5824 33R2J-2-GP
51R2F-2-GP

100R2F-L1-GP-U

100R2F-L1-GP-U

100R2F-L1-GP-U
21 USB_OC#12_13 1 DY 2 XDP_FN6 33 34 XDP_FN14 2 DY 1
R5839 PCH_GPIO16 25
21 PCH_OC7# R5825 1 DY 2 33R2J-2-GP XDP_FN7 35 36 XDP_FN15 R5828 2 DY 1 33R2J-2-GP TEMP_ALERT# 25,38
R5829 33R2J-2-GP 37 38 R5826 33R2J-2-GP
2

2
9,37,38 RUNPWROK 39 40
1 DY 2 XDP_PWRBTN#_R 41 42
22 PM_PWRBTN#_R R5832 0R2J-2-GP +3.3V_RUN 43 44 +3.3V_RUN
45 46 PCH_XDP_RST# 2 DY 1 PLTRST2# 21,72
47 48 XDP_DBRESET# R5833 1KR2J-1-GP XDP_DBRESET# 9,22,38
A 49 50 A
51 52 PCH_JTAG_TDO_R 2 DY 1
18,19,23,40 PCH_SMBDATA_MEM PCH_JTAG_TDO 24
53 54 PCH_JTAG_RST#_R R5834 2 DY 1 0R2J-2-GP
18,19,23,40 PCH_SMBCLK_MEM PCH_JTAG_RST# 24
55 56 PCH_JTAG_TDI_R R5835 2 DY 1 0R2J-2-GP
PCH_JTAG_TCK_R PCH_JTAG_TMS_R R5836 PCH_JTAG_TDI 24
24 PCH_JTAG_TCK 1 DY 2 57 58 2 DY 1 0R2J-2-GP <Core Design>
R5837 0R2J-2-GP R5838 0R2J-2-GP PCH_JTAG_TMS 24
59 60
63
64
NP2 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
STC-CONN60A-GP-U1 Taipei Hsien 221, Taiwan, R.O.C.

20.F0971.060 Title

5 4
WWW.AliSaler.Com 3 2
Size
C

Date:
Document Number

Thursday, October 29, 2009


Reserve
Fonseca UMA
1
Sheet 58 of
Rev

82
X01
5 4 3 2 1

SSID = SATA SATA ODD Connector

X01-27

D D

ODD1
SATA_RX- and SATA_RX+ Trace 13
S1
Length match within 20 mil
24 SATA_PTX_ORX1+ S2
24 SATA_PTX_ORX1- S3
S4
24 SATA_PRX_OTX1- C5902 2 1 SCD01U50V2KX-1GP SATA_PRX_OTX1-_C S5
24 SATA_PRX_OTX1+ C5903 2 1 SCD01U50V2KX-1GP SATA_PRX_OTX1+_C S6
S7

+5V_MOD
37 ODD_DET# P1
P2
P3
1

P4
C5904 C5905 P5
SC10U6D3V5KX-1GP SCD1U10V2KX-4GP P6
2

14

SKT-SATA7P+6P-85-GP

62.10065.B01

C C

SSID = SATA SATA HDD Connector


SATA HDD Interface comment
******************************
--- GND
RX+ Place near HDD CONN
B HDD1 RX- B
+3.3V_HDD +5V_HDD
23 --- GND
NP1
1
TX-
TX+

1
2 C5906 C5907 C5908 C5909
24 SATA_PTX_HRX0+ --- GND
24 SATA_PTX_HRX0- 3
****************************** DY DY
4

SCD1U10V2KX-4GP
SC10U6D3V5KX-1GP
2

2
C5901 2 1 SCD01U50V2KX-1GP SATA_PRX_HTX0-_C 5 ------------ 3.3V

SCD1U10V2KX-4GP
24 SATA_PRX_HTX0-

SC10U6D3V5KX-1GP
24 SATA_PRX_HTX0+ C5910 2 1 SCD01U50V2KX-1GP SATA_PRX_HTX0+_C 6
7
------------ 3.3V
------------ 3.3V
--- GND
+3.3V_HDD 8
9 --- GND / Dell Detected Pin
10 --- GND
11
HDD_DET# 12 ------------ 5V
24 HDD_DET#
13 ------------ 5V
14 ------------ 5V
15
+5V_HDD 16 --- GND
17 (Dell: FFS_INT for supported HDD)
FFS_INT2 18
40 FFS_INT2 --- GND
19
20 ------------ 12V (No support)
21 ------------ 12V (No support)
22
A NP2 ------------ 12V (No support) <Core Design> A
24 ******************************
SKT-SATA22P-20-GP
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
62.10065.261 Taipei Hsien 221, Taiwan, R.O.C.

Title

HDD / ODD Connector

WWW.AliSaler.Com
Size Document Number Rev
A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 59 of 82
5 4 3 2 1
5 4 3 2 1

SSID = AUDIO SSID = AUDIO

D D
AUD_VREFOUT_B

30 AUD_VREFOUT_B
SPEAKER

1
C6002

1
SC1U10V2KX-1GP
MIC IN

R6002

R6003
4K7R2J-2-GP

4K7R2J-2-GP

2
AUD_MIC_SW ITCH SPK1
30 AUD_MIC_SW ITCH
7
AFTP6002 1 1

2
MIC1
1 AUD_SPK_L+ R6004 1 2 0R3J-0-U-GP AUD_SPK_L+_R 2
30 AUD_SPK_L+
MIC_IN_L_2 1 2 MIC_IN_L_C 2 AUD_SPK_L- R6001 1 2 0R3J-0-U-GP AUD_SPK_L-_R 3
30 MIC_IN_L_2 30 AUD_SPK_L-
L6002 6 AUD_SPK_R+ R6005 1 2 0R3J-0-U-GP AUD_SPK_R+_R 4
30 AUD_SPK_R+
MIC_IN_R_2 1 2 MIC_IN_R_C 3 AUD_SPK_R- R6006 1 2 0R3J-0-U-GP AUD_SPK_R-_R 5
30 MIC_IN_R_2 30 AUD_SPK_R-
L6003 BLM18BD601SN1D-GP 4 6
5 8
600ohm 100MHz SPEAKER_DET#

EC6005

EC6006

EC6007

EC6008
7

SC270P50V2JN-2GP

SC270P50V2JN-2GP

SC270P50V2JN-2GP

SC270P50V2JN-2GP
25 SPEAKER_DET#

1
EC6002 EC6003 8 MLX-CON6-10-GP-U
200mA 0.5ohm DC

1
NP1
NP2

SC100P50V2JN-3GP

SC100P50V2JN-3GP
2

2
AUDIO-JK128-GP 20.F0693.006
22.10088.F61

C C

AFTP6003 1 AUD_SPK_L+_R
AFTP6004 1 AUD_SPK_L-_R
AFTP6005 1 AUD_SPK_R+_R
AFTP6001 1 AUD_SPK_R-_R
AFTP6006 1 SPEAKER_DET#

SSID = AUDIO

B Hear Phone B

AUD_HP_NB_SENSE
30,38 AUD_HP_NB_SENSE
LOUT1
1
AUD_HP_JACK_L_2 1 2 AUD_HP_JACK_L_1 2
30 AUD_HP_JACK_L_2
L6004 6
AUD_HP_JACK_R_2 1 2 AUD_HP_JACK_R_1 3
30 AUD_HP_JACK_R_2
L6001 BLM18BD601SN1D-GP 4
5
600ohm 100MHz 7
8
200mA 0.5ohm DC NP1
1

C6001 C6003 EC6004 EC6001 NP2

SC1000P50V3JN-GP-U SC1000P50V3JN-GP-U
SCD01U50V2KX-1GP

SCD01U50V2KX-1GP
2

AUDIO-JK128-GP
22.10088.F61

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Audio Jack / Speaker Connector

WWW.AliSaler.Com
Size Document Number Rev
A3
Fonseca UMA X01
Date: Thursday, October 29, 2009 Sheet 60 of 82
5 4 3 2 1
5 4 3 2 1

SSID = LOM

D D

C C

(Blank)

B B

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

5 4
WWW.AliSaler.Com
3 2
Size
C

Date:
Document Number

Thursday, October 29, 2009


Reserve
Fonseca UMA
1
Sheet 61 of
Rev

82
X01
5 4 3 2 1

SSID = Flash.ROM

Pin.2
From Intel checklist, Pin.6
SPI_CS0#/CS1# Intel checklist
No series resistor required No series resistor required if routing length is 1.5"-6.5"
if routing length is 1.5"-6.5" (with 1 or 2 SPI device)
D (with 1 or 2 SPI device) D

+3.3V_ALW _PCH +3.3V_RUN +3.3V_ALW _PCH +3.3V_RUN

1
R6202 R6203 R6204 R6205
3K3R2J-3-GP DY 0R2J-2-GP 0R2J-2-GP DY 0R2J-2-GP

2
1

1
C6202 DY C6201

1
SCD1U10V2KX-4GP SC10U6D3V5MX-3GP

2
R6206
U6201 3K3R2J-3-GP
16Mb
1 2 PCH_SPI_CS0#_R 1 8 SPI_VCC
24 PCH_SPI_CS0#

2
R6207 0R2J-2-GP PCH_SPI_DIN CS# VCC SPI_HOLD# R6208 0R2J-2-GP
24 PCH_SPI_DIN 2 DO/IO1 HOLD#/IO3 7
SPI_W P#_SEL_R 3 6 SPI_CLK_R 1 2 PCH_SPI_CLK
WP#/IO2 CLK PCH_SPI_CLK 24
4 5 SPI_DO_R 1 2 PCH_SPI_DO
GND DI/IO0 PCH_SPI_DO 24
R6209 0R2J-2-GP
C SPI_W P#_SEL 1 2 SPI_W P#_SEL_R W 25Q16BVSSIG-GP C
38 SPI_W P#_SEL
R6210 0R2J-2-GP

+3.3V_ALW _PCH +3.3V_RUN +3.3V_ALW _PCH +3.3V_RUN

1
R6211 R6212 R6213 R6201
3K3R2J-3-GP DY 0R2J-2-GP 0R2J-2-GP DY 0R2J-2-GP

2
1 2 SPI_W P#_SEL_R2

1
R6214 0R2J-2-GP
C6203 DY C6204

1
SCD1U10V2KX-4GP SC10U6D3V5MX-3GP

2
R6215
U6202 3K3R2J-3-GP

24 PCH_SPI_CS1# 1 2 PCH_SPI_CS1#_R 1 32Mb 8 SPI_VCC2

2
R6216 0R2J-2-GP PCH_SPI_DIN CS# VCC SPI_HOLD#2
2 DO HOLD# 7
B SPI_W P#_SEL_R2 SPI_CLK_R B
3 WP# CLK 6
4 5 SPI_DO_R
VSS DI

W 25Q32BVSSIG-1-GP

#1 source: 72.25Q16.001 (2MB, Winbond)


X01-2 #2 source: 72.25165.A01 (2MB, MXIC)
#3 source: 72.25016.D01 (2MB, SST)

#1 source: 72.25Q32.A01 (4MB, Winbond)


#2 source: 72.25325.A01 (4MB, MXIC)

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Flash / EEPROM

WWW.AliSaler.Com
Size Document Number Rev
A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 62 of 82
5 4 3 2 1
5 4 3 2 1

SSID = USB

D
Charger USB D

G6302 1 2
U6301 USB_OC#0_1 21
+5V_ALW G6303 1 2 +5V_USB0
1 GND OC1# 8 100 mil
G6301 1 2 USB_5V_IN 2 7
IN OUT1
3 EN1# OUT2 6
G6304 1 2 4 5
EN2# OC2#

1
C6301 C6303 C6304 TC6301
C6302 GAP-CLOSE-PW R-2U-GP DY

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

ST150U6D3VDML3GP
SC4D7U10V5ZY-3GP
SC1U6D3V2KX-GP TPS2062AD-GP

2
(1A / Port)

38,76 USB_SIDE_EN#

C C

DLW21SN900SQ2LUGP

DLW21SN900SQ2LUGP
Charger USB Connector
4

3
EL6302 +5V_USB0 +5V_USB0 EL6301
S OE# Function X01-34
1

2
USB1
11
X H Disconnect 9
1 5

L L D=1D 21 USBP0- 1 DY 2 USB_0-_R 2 6 USB_01-_R 1 DY 2 USBP1- 21


21 USBP0+ R6302 1 2 0R3J-0-U-GP USB_0+_R 3 7 USB_01+_R R6303 1 2 0R3J-0-U-GP USBP1+ 21
R6304 DY 0R3J-0-U-GP 4 8 R6301 DY 0R3J-0-U-GP
H L D=2D 10
12
B SKT-USB-375-GP B

22.10321.751

X01-32

D6301
+5V_USB0
USB_01-_R 1 6 USB_0-_R
ESD I/O1 ESD I/O4
2 GND VP 5
USB_01+_R 3 4 USB_0+_R
ESD I/O2 ESD I/O3
A <Core Design> A

IP4220CZ6-GP
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

USB

WWW.AliSaler.Com
Size Document Number Rev
A3 X01
Fonseca UMA
Date: Tuesday, November 03, 2009 Sheet 63 of 82
5 4 3 2 1
5 4 3 2 1

SSID = Wireless
+3.3V_WLAN +3.3V_WLAN +1.5V_RUN DEBUG PINS
JMINI Pin Debug Pin Name EC Pin
16 HOST_DEBUG_TX B44
1

1
C6402 C6403
SCD1U10V2KX-4GP C6401 C6404 C6405 C6406 C6407 C6408

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
SCD047U10V2KX-2GP

SCD047U10V2KX-2GP

SCD047U10V2KX-2GP

SCD047U10V2KX-2GP
SC4D7U6D3V3KX-GP

17 HOST_DEBUG_RX B46
2

2
D D
19 8051_TX B43
42 8051_RX A40

Near WLAN1, Near WLAN1, then


then trace to Pin.2/52/39/41 Near Pin.24 trace to Pin.6/28/48
MiniCard WLAN connector
+3.3V_RUN
WLAN1
53
1

X01.09/0819 NP1
R6402 PCIE_WAKE# 1 2 +3.3V_WLAN
35,38,72 PCIE_WAKE#
DY 10KR2J-3-GP COEX2_WLAN_ACTIVE_R
73 COEX2_WLAN_ACTIVE 1 2 3 4
R6420 1 2 0R2J-2-GP COEX1_BT_ACTIVE_R 5 6 +1.5V_RUN
73 COEX1_BT_ACTIVE
2

R6421 0R2J-2-GP MINI1CLK_REQ# 7 8


23,58 MINI1CLK_REQ#
9 10
CLK_PCIE_MINI1# 11 12
23 CLK_PCIE_MINI1#
CLK_PCIE_MINI1 13 14
23 CLK_PCIE_MINI1
15 16 HOST_DEBUG_TX
HOST_DEBUG_TX 37
A K WLAN_RADIO_DIS# 38
HOST_DEBUG_RX 17 18 D6401 SDMK0340L-7-F-GP
37,70 HOST_DEBUG_RX MS_CLK_1 WLAN_RADIO_OFF#
C 37,70 MSCLK 1 2 19 20 C
R6411 DY 0R2J-2-GP 21 22 WLAN_PCIE_RST# 1 2 PLTRST4# 21,32,34,35
23 24 +3.3V_WLAN R6401 120R2J-2-GP
23 PCIE_PRX_WLANTX_N2
25 26
23 PCIE_PRX_WLANTX_P2
27 28 +1.5V_RUN
WIMAX_LED# 66 X01-5
29 30 2 1 MSDATA 37,70
31 32 R6414 DY 0R2J-2-GP
23 PCIE_PTX_WLANRX_N2_C

1
23 PCIE_PTX_WLANRX_P2_C 33 34
35 36 USBP4-_R
PCIE_MCARD1_DET# 37 38 USBP4+_R DY R6415
25 PCIE_MCARD1_DET# USB_MCARD1_DET# 0R2J-2-GP
25 USB_MCARD1_DET# R6412
1 DY 2 39 40
WIMAX_LED#
+3.3V_WLAN 41 42

2
0R2J-2-GP 43 44 LED_WLAN_OUT#
+5V_DBG_RUN LED_WLAN_OUT# 66
+5V_RUN 1 2 45 46
G6401 47 48 +1.5V_RUN
Debug Only. GAP-OPEN-PWR 49 50
+3.3V_ALW 1 2 +3.3V_DBG_ALW 51 52 +3.3V_WLAN
G6402 NP2
54

SKT-MINI52P-8-GP

62.10043.391

2 1
B R6413 0R3J-0-U-GP B
USBP4-_R USBP4- 21

3
+15V_ALW
DY EL6401
DLW21SN900SQ2LUGP

4
3

SRN100KJ-6-GP
RN6402
+3.3V_ALW +3.3V_WLAN

2
USBP4+_R USBP4+ 21
WLAN SW (Top View)
Wireless Switch
1
2
2 1
3.3V_WLAN_ENABLE# U6401 R6416 0R3J-0-U-GP
1 D D 6
1

OFF ON 2 D D 5
Close WLAN1
R6417 3.3V_WLAN_ENABLE 3 G S 4
200KR2J-L1-GP
SW1 SI3456DDV-T1-GE3-GP
NP1 ?A-70degC
2

1
U6402
1 2 WIRELESS_ON#/OFF_R 2 DMN66D0LDW-7-GP
38 WIRELESS_ON#/OFF
R6418 AFTP6402 1 3
10R2J-2-GP NP2
1

3
1

C6409 SW-SLIDE67-GP
SC1U10V2KX-1GP
A A
62.40083.001 <Core Design>
2

38 AUX_EN_WOWL
Wistron Corporation
1

R6419 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


100KR2J-1-GP Taipei Hsien 221, Taiwan, R.O.C.

1 WIRELESS_ON#/OFF_R Title
AFTP6401
2

WLAN / Serial Out Connector

5 4
WWW.AliSaler.Com 3 2
Size
Custom

Date:
Document Number

Thursday, October 29, 2009


Fonseca UMA
Sheet
1
64 of
Rev

82
X01
5 4 3 2 1

SSID = Wireless

D D
PCH1 BTB1 BTB2

WWAN SIM
CONN SKT

Page.76 IO Board Side

MB Board Side

C C

+15V_ALW

4
3

SRN100KJ-6-GP
RN6501
+3.3V_ALW +3.3V_RUN_W W AN

1
2
3.3V_W W AN_ENABLE# U6502
1 D D 6

1
2 D D 5
R6501 3.3V_W W AN_ENABLE 3 G S 4
200KR2J-L1-GP
SI3456DDV-T1-GE3-GP
?A-70degC

4
U6501
DMN66D0LDW -7-GP

3
B B

38 MCARD_W W AN_PW REN


1

R6502
100KR2J-1-GP
2

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

WWAN

WWW.AliSaler.Com
Size Document Number Rev
A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 65 of 82
5 4 3 2 1
5 4 3 2 1

SSID = User.interface
LED Location from left to right
(MB, Top View) +3.3V_SUS
CAPS NUM SCRLK +5V_ALW

LED6602 LED6603 LED6601 BREATH POWER LED


SCRLK LED +5V_ALW Q6603

G
Q6602 2N7002A-7-GP 1 2
R2
Q6604 R6624 120R2J-2-GP BREATH_PW RLED_B 76
E R6603 R2
D 38 SCRL_LED# 2 1 SCRL_LED_R# B R1 LED6601 E D
R6602 20KR2J-L2-GP C SCRLK_LED 1 2LED_SCRLK_R A K S D BREATH_PW RLED_R# B
37,74 BREATH_LED# R1
C BREATH_PW RLED_R
2 1
DDTA143ECA-7-F-GP R6604 BREATH_PW RLED_P 54
LED-B-98-GP
680R2J-3-GP

1
EC6602 DDTA143ECA-7-F-GP 330R2J-3-GP

1
+5V_ALW SCD1U10V2KX-4GP EC6601
CAPS LED Q6605
DY SCD1U10V2KX-4GP
DY

2
R2
E R6606

2
38 CAP_LED# 2 1 CAP_LED_R# B R1 LED6602
R6605 20KR2J-L2-GP C CAP_LED 1 2LED_CAP_R A K

DDTA143ECA-7-F-GP LED-B-98-GP
680R2J-3-GP

1
EC6603
+5V_ALW SCD1U10V2KX-4GP
NUM LED Q6606
DY +5V_RUN

2
R2
Q6607
38 NUM_LED# 2 1 NUM_LED_R# B R1
E R6608
LED6603
R2
E HDD LED
R6607 20KR2J-L2-GP C NUM_LED 1 2LED_NUM_R A K 2 1 SATA_ACT_C# B
24 SATA_ACT#_R R1
R6609 20KR2J-L2-GP C HDD_LED 2 1
DDTA143ECA-7-F-GP R6610 HDD_LED_B 77
LED-B-98-GP
680R2J-3-GP

1
EC6605 DDTA143ECA-7-F-GP 1KR2J-1-GP

1
DY SCD1U10V2KX-4GP EC6604
DY SCD1U10V2KX-4GP

2
C C
100KR2J-1-GP R6615
1 DY
WIMAX LED +3.3V_W LAN 2
D6603
X01-5
64 W IMAX_LED# K A

100KR2J-1-GP R6613 SDMK0340L-7-F-GP

WWAN LED +3.3V_RUN 1 DY 2


D6602

76 LED_W W AN_OUT# K A 14ONLY

100KR2J-1-GPR6614 SDMK0340L-7-F-GP
+5V_RUN
+3.3V_W LAN 1 DY 2 Q6609
WLAN LED D6601
R2
E R6618
64 LED_W LAN_OUT# K A 2 1LED_W LAN_OUT_R# B R1
1KR2J-1-GP
R6617 20KR2J-L2-GP C LED_W AN_OUT_R 1 2
SDMK0340L-7-F-GP LED_W LAN_OUT_B 77
DDTA143ECA-7-F-GP

1
EC6608
DY SCD1U10V2KX-4GP

2
B +5V_RUN B
Bluetooth LED Q6608
R2
E R6612
BT_ACTIVE_K# 2 1 BT_ACT_K_R# B 1KR2J-1-GP
73 BT_ACTIVE_K# R1
R6611 20KR2J-L2-GP C BT_LED_R 1 2 BT_LED_B 77
DDTA143ECA-7-F-GP

1
EC6606
DY SCD1U10V2KX-4GP

2
Battery LED (Blue) +5V_ALW 2 1 BAT2_LED_BLUE_B
BAT2_LED_BLUE_B 77
R6601 1KR2J-1-GP
Q6610
R6619 R2
E
37 BAT2_LED# 1 2BAT2_LED_R# B R1
C BAT2_LED 2 1 BAT2_LED_BLUE_P
R6620 330R2J-3-GP BAT2_LED_BLUE_P 54
10KR2J-3-GP DDTA143ECA-7-F-GP

1
EC6609
DY SCD1U10V2KX-4GP

2
A
Battery LED (Amber) 2 1 BAT1_LED_AMBER_B
BAT1_LED_AMBER_B 77
<Core Design> A

+5V_ALW R6621 1KR2J-1-GP


Q6611
R6622 R2
E Wistron Corporation
1 2BAT1_LED_R# B 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
37 BAT1_LED# R1
Taipei Hsien 221, Taiwan, R.O.C.
C BAT1_LED 2 1 BAT1_LED_AMBER_P
R6623 1KR2J-1-GP BAT1_LED_AMBER_P 54
10KR2J-3-GP DDTA143ECA-7-F-GP Title
1

EC6610
DY SCD1U10V2KX-4GP LED

WWW.AliSaler.Com
Size Document Number Rev
2

A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 66 of 82
5 4 3 2 1
5 4 3 2 1

SSID = SmartCard

D D

SmartCard Socket
SmartCard
+3.3V_RUN

C SC1 SC1SKT1 C

1
SC 1 3
34 SC_VCC 1 VCC NP2 NP2
34 SC_RST# 1 SC 2 SC_RST#_R 2 NP1 DY R6706 DY
RST NP1
1

34 SC_CLK R6703 1 SC 2 220R2F-GP SC_CLK_R 3 12 100KR2J-1-GP 2 4


CLK GND
1

C6701 C6702 R6707 34 SC_C4 R6701 1 SC 2 33R2F-3-GP SC_EG_D+ 4 11

2
R6702 220R2F-GP RESERVED#4 GND CARDBUS-SKT90-GP-U3
SC SC SC 5 10
SC1U10V2KX-1GP
SCD1U10V2KX-4GP

SC1_VPP GND GND


1 6 9
10KR2J-3-GP

TP6701
2

SC_IO_R VPP SW SC_DET# 34


34 SC_IO 1 SC 2 7 8 21.H0136.001
2

I/O RESERVED#8

1
R6704 220R2F-GP
1 SC 2 DY C6703 X01.09/0819
R6705 47KR2J-2-GP CARDBUS10P-GP-U2 SCD1U10V2KX-4GP
X01.09/0825

2
62.10024.761 Not SMT, belog to DIP!
Near SC1 CONN
Pleace near SC1 CONN
SC_EG_D- 34
SC_EG_D+ 34

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Smart Card Socket

WWW.AliSaler.Com
Size Document Number Rev
A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 67 of 82
5 4 3 2 1
5 4 3 2 1

SSID = Touch.Pad

D D

TouchPad Connector
Touch PAD Module Side
---------------------------------
TPAD1 16 TP_DET#
15 GND
18
TP_DET# 16 14 GND
38 TP_DET#
15 13 BC_CLK (ECE1077)
14
BC_CLK_ECE1077 13
12 BC_DAT (ECE1077)
37 BC_CLK_ECE1077
37 BC_DAT_ECE1077
BC_DAT_ECE1077 12 11 BC_INT# (ECE1077)
BC_INT#_ECE1077 11
C
37 BC_INT#_ECE1077 10 3.3V_ALW C
+3.3V_ALW 10
EC6801 EC6802 EC6803 9 09 3.3V_RUN (Internal NC)
1

1
+3.3V_ALW CLK_TP_SIO 8 08 PS2_CLK
SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP
DY DY DY DAT_TP_SIO 7
X01-18 6
07 PS2_DATA
2

2
+5V_ALW 5 06 5V_RUN (Backlight, No Use)
4 05 5V_ALW (Chip change to use 3V, NC)
2
1

3
2 04 PWM (Backlight, No Use)
RN6801 03 GND (Backlight, No Use)
SRN4K7J-8-GP AFTP6802 1 1
17
02 GND
R6801 01 Diag_loop
3
4

100R2J-2-GP
1 2 CLK_TP_SIO MLX-CON16-10-GP
37 CLK_TP_SIO_R
1 2 DAT_TP_SIO 20.K0227.016
37 DAT_TP_SIO_R
100R2J-2-GP
R6802
1

L6801 L6802
MLVG0402220NV09BP-GP MLVG0402220NV09BP-GP

X01-45 X01-18
2

AFTP6801 1 BC_DAT_ECE1077
B BC_CLK_ECE1077 B
AFTP6803 1
1 BC_INT#_ECE1077
X01-36 AFTP6804
AFTP6805 1 +3.3V_ALW
CLK_TP_SIO
AFTP6806 1
AFTP6807 1 DAT_TP_SIO
AFTP6808 1 +5V_ALW
AFTP6809 1 TP_DET#

+3.3V_ALW
CLK_TP_SIO

X01-36
4

D6801
PRTR5V0U2X-GP

DY
1

A <Core Design> A
DAT_TP_SIO

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Touch Pad Connector

WWW.AliSaler.Com
Size Document Number Rev
A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 68 of 82
5 4 3 2 1
5 4 3 2 1

SSID = User.interface

D D

+3.3V_ALW +3.3V_ALW
Hall Sensor
C C

1
R6902 C6902
100KR2J-1-GP SCD1U10V2KX-4GP
U6901

2
AFTP6901 1 1

2
VDD

VSS 2 1 AFTP6903

38 LID_CL_SIO# 1 2 LID_CL_SIO#_R 3 OUTPUT


R6901 0R2J-2-GP
EM-6781-T30-GP

1
C6901
SCD047U10V2KX-2GP
2
1st : 74.06781.07B (AKE)
2nd : 75.03212.060 (Allegro)
AFTP6902 1 LID_CL_SIO#_R

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Hall Sensor

WWW.AliSaler.Com
Size Document Number Rev
A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 69 of 82
5 4 3 2 1
5 4 3 2 1

SSID = User.Interface

LPC Debug port


D D

+3.3V_RUN

LDBG1
1
2 LPC_LAD0 24,35,36,37,38
3
X01-8 4
LPC_LAD1 24,35,36,37,38
LPC_LAD2 24,35,36,37,38
5 LPC_LAD3 24,35,36,37,38
6 LPC_LFRAME# 24,35,36,37,38
DY 7 PLTRST3#_C 2 DY 1 PLTRST3# 21,37,38,76
8 R7008 0R2J-2-GP
9 CLK_PCI_TPM_C 2 DY 1 CLK_PCI_TPM 23,35
10 R7002 0R2J-2-GP
11
12

MLX-CON10-7-GP
20.D0183.110
LDBG1, need pop R7008, R7002

C C

+3.3V_ALW +3.3V_ALW

JTAG Debug port

1
2
3
4
1
RN7001
R7001 SRN10KJ-6-GP
49D9R2F-GP

JTAG1

8
7
6
5
7
1 JTAG_PU

2 JTAG_TDI
X01-8 DY 3 JTAG_TMS
JTAG_CLK
JTAG_TDI 37
JTAG_TMS 37
4 JTAG_CLK 37
5 JTAG_TDO
JTAG_TDO 37
6
8

MLX-CON6-9-GP
20.D0198.106
B B

+3.3V_ALW
JDBG2
7 DY
5
4 MSDATA
MSDATA 37,64
3 MSCLK
MSCLK 37,64
2 HOST_DEBUG_RX
HOST_DEBUG_RX 37,64
1
6

MLX-CON5-10-GP
A 20.D0198.105 <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

JTAG Debug

WWW.AliSaler.Com
Size Document Number Rev
A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 70 of 82
5 4 3 2 1
5 4 3 2 1

SSID = 1394

Flash Reader Socket


D D

SDMSXD_VCC
CARD1

1 2 SD_VCC SD_VCC 4 10
VDD COMMON GROUND SWITCH SD_MMC_CD#
CARD DETECT SWITCH 11 SD_MMC_CD# 32
R7105 1 2 SD_MMC_DAT0_L 7 12 SDW P
32 SD_MMC_DAT0 DAT0 WRITE PROTECT SWITCH SDW P 32

1
0R3J-0-U-GP R7116
1 20R2J-2-GP SD_MMC_DAT3_L 1 13
32 SD_MMC_DAT3 CD/DAT3 GROUND SWITCH

1
C7106 C7103 R7114 R7117
1 20R2J-2-GP SD_MMC_DAT1_L 8
32 SD_MMC_DAT1 DATE1
DY 32 SD_MMC_DAT2 R7118
1 20R2J-2-GP SD_MMC_DAT2_L 9
R7119 DATE2
20R2J-2-GP SD_MMC_CMD_L

150KR2J-GP
1 2 3

SCD1U10V2KX-4GP
SC10U6D3V5KX-1GP
32 SD_MMC_CMD

2
R7120 0R2J-2-GP SD_MMC_CLK_L CMD VSS
5 6

2
CLK VSS
NP1 14
X01-20 NP2
NP1
NP2
GND
GND 15

32 SD_MMC_CLK 1 2 SKT-SDCARD-16-GP
R7115 0R2J-2-GP 20.I0086.001
Place near CARD1 Place near CARD1 X01.09/0921
Update SKT Symbol
X01-42

C SDW P C
SD_MMC_CD#
SD_MMC_CLK_L
SD_MMC_CMD_L
SD_MMC_DAT0_L
SD_MMC_DAT1_L
SD_MMC_DAT2_L
SD_MMC_DAT3_L

EC7106

EC7107

EC7108

EC7109

EC7110

EC7111

EC7101

EC7112
SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP
1

1
X01-20 DY DY DY DY DY DY DY DY

2
For EMI

B SSID = 1394 1 2
B
R7106 0R3J-0-U-GP Shield GND separately for pairs of
TPA+ & TPA- and TPB+ & TPB-
(15)

4
32 TPBIAS0
TPBIAS0 L7102 <-- Pin.4
DLW 21HN900SQ2LGP
SCD33U10V3KX-3GP

SCD01U16V2KX-3GP

DY 1394 Connector(15) 1394 Connector(14)


C7101

C7104
1

R7107 R7108
56R2J-4-GP 56R2J-4-GP
DY <-- Pin.1 1394
2

Name
2

1394 TPB0-
5 6 TPB0+
TPB0- TPB0- 1 TPA0-
TPA0P TPB0N TPA0+
32 TPA0P
TPA0N TPB0P 1 2 TPB0+ TPB0+ 2
32 TPA0N
TPB0P TPA0N R7101 1 2 0R3J-0-U-GP TPA0- TPA0- 3
32 TPB0P
TPB0N TPA0P R7109 0R3J-0-U-GP TPA0+ TPA0+ 4
32 TPB0N
7 8
1
1

SKT-1394-4P-25-GP
R7110 R7111 (15) DISCRET-G1
3

56R2J-4-GP 56R2J-4-GP
<-- Pin.4 22.10218.T11 22.10218.T41
L7101
2

A DLW 21HN900SQ2LGP <Core Design> A


2

TPB_EMI
DY
1

Wistron Corporation
1

C7105 R7112
SC270P50V2JN-2GP 5K11R2F-L1-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
<-- Pin.1 Taipei Hsien 221, Taiwan, R.O.C.
2

1
2

Title
Close to U3201
1394 Connector / Flash Socket

WWW.AliSaler.Com
1 2 Size Document Number Rev
R7113 0R3J-0-U-GP A3 X01
Fonseca UMA
Date: Tuesday, November 03, 2009 Sheet 71 of 82
5 4 3 2 1
5 4 3 2 1

SSID = CARDBUS
Cardbus Connector Cardbus Shocket
CBS_CCD1# CBS_CCD2# PCMCIA1
CBS_CAD[0..31] 32 3
1
SC270P50V2JN-2GP

SC270P50V2JN-2GP
DY
1

69
70
71
72
73
74
75
76
77
2
CBUS1
C7202

C7203
PCC PCC 4
35 1

69
70
71
72
73
74
75
76
77
2

2 35 1
D CBS_CCD1# 36 2 CBS_CAD0 D
32 CBS_CCD1# CBS_CAD2 36 2 CBS_CAD1 CARDBUS-SKT104-GP-U
37 37 3 3
CBS_CAD4 38 4 CBS_CAD3 21.H0164.001
CBS_CAD6 38 4 CBS_CAD5
39 39 PCC 5 5
Close to Socket 32 CBS_DATA14
CBS_DATA14 40 40 6 6 CBS_CAD7
CBS_CAD8 41 41 7 7 CBS_CC/BE0#
CBS_CC/BE0# 32 Not SMT, belog to DIP!
CBS_CAD10 42 8 CBS_CAD9
CBS_CVS1 42 8 CBS_CAD11
32 CBS_CVS1 43 43 9 9
CBS_CAD13, CBS_CAD15 Can be used CBS_CAD13 44 44 10 10 CBS_CAD12
CBS_CAD15 45 11 CBS_CAD14
as Express Card USB differential pair. CBS_CAD16 46
45 11
12 CBS_CC/BE1#
46 12 CBS_CC/BE1# 32 +5V_RUN
CBS_DATA18 47 13 CBS_CPAR
32 CBS_DATA18 47 13 CBS_CPAR 32
CBS_CBLOCK# 48 14 CBS_CPERR#
32 CBS_CBLOCK# 48 14 CBS_CPERR# 32
CBS_CSTOP# 49 15 CBS_CGNT#
32 CBS_CSTOP# 49 15 CBS_CGNT# 32
CBS_CDEVSEL# 50 16 CBS_CINT#

SC1U6D3V2KX-GP
32 CBS_CDEVSEL# 50 16 CBS_CINT# 32

1
+CBS_VCC 51 17 +CBS_VCC C7207
51 17
+CBS_VPP
CBS_CTRDY#
52 52 18 18
CBS_CCLK
+CBS_VPP PCC
32 CBS_CTRDY# 53 19 CBS_CCLK 32

2
CBS_CFRAME# 53 19 CBS_CIRDY# +3.3V_RUN
32 CBS_CFRAME# 54 54 20 20 CBS_CIRDY# 32
CBS_CAD17 55 21 CBS_CC/BE2#
55 21 CBS_CC/BE2# 32
CBS_CAD19 56 22 CBS_CAD18 U7201
CBS_CVS2 56 22 CBS_CAD20
32 CBS_CVS2 57 57 23 23 PCC

1
CBS_CRST# 58 24 CBS_CAD21 3 15 C7208
32 CBS_CRST# 58 24 32 VPPEN0 EN0 VCC5_IN
CBS_CSERR# 59 25 CBS_CAD22 4 13 PCC SC1U6D3V2KX-GP
32 CBS_CSERR# 59 25 32 VPPEN1 EN1 VCC5_IN
CBS_CREQ# 60 26 CBS_CAD23

2
32 CBS_CREQ# CBS_CC/BE3# 60 26 CBS_CAD24 +CBS_VCC
32 CBS_CC/BE3# 61 61 27 27 6 NC#6 VCC3_IN 11
CBS_CAUDIO 62 28 CBS_CAD25 7
+CBS_VCC +CBS_VPP 32 CBS_CAUDIO 62 28 NC#7
CBS_CSTSCHNG 63 29 CBS_CAD26 10 14
32 CBS_CSTSCHNG CBS_CAD28 63 29 CBS_CAD27 NC#10 VCC_OUT
64 64 30 30 VCC_OUT 12

1
C CBS_CAD30 65 31 CBS_CAD29 +CBS_VPP 5 9 C7210 C

SC10U6D3V5KX-1GP
CBS_CAD31 65 31 CBS_DATA2 FLG VCC_OUT C7209
66 32 PCC PCC
SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SC10U6D3V5KX-1GP

66 32 CBS_DATA2 32
1

C7206 CBS_CCD2# CBS_CCLKRUN# SCD01U16V2KX-3GP


C7205

67 33 CBS_CCLKRUN# 32 8

2
NP1
NP2
SCD1U10V2KX-4GP 32 CBS_CCD2# 67 33 VPP_OUT
C7204

C7201

PCC PCC PCC PCC 68 34 2

SCD1U10V2KX-4GP

SCD01U16V2KX-3GP
78
79
80
81
82
83
84
68 34 VCC3_EN
16 1
2

GND VCC5_EN

1
FOX-CONN84-GP

C7211

C7212
78
79
80
81
82
83
84

NP1
NP2
62.10024.981 PCC PCC R5531V002-GP
VCC3EN# 32
VCC5EN# 32

2
+CBS_VCC Short Current Limit, 1400mA
Close to Socket Close to Socket +CBS_VPP Short Current Limit, 300mA

SSID = ExpressCard +3.3V_ALW


RN7201
+1.5V_RUN +3.3V_RUN +3.3V_ALW

1 DY 4 CPUSB# U7202
2 3 CPPE# EXP
2 3_3VIN NC#4 4
SRN100KJ-6-GP +3.3V_CARD 3 5
3_3VOUT NC#5
NC#13 13
12 14
NewCard Shocket NewCard Connector +1.5V_CARD 11
1_5VIN
1_5VOUT
NC#14
NC#16 16

NEW 1SKT1
B NEW 1 R7207 1 B
DY 2 0R2J-2-GP
1 2
DY 28
38 EXPRCRD_STDBY#
R7206 1 EXP 2 0R2J-2-GP EXPRCRD_STDBY#_R 1 AUXOUT 15
17
+3.3V_CARDAUX
38,42,51 RUN_ON STBY# AUXIN
CARD-PUSH-2P-GP-U2 26 X01.09/0819 1 2 EXPRCRD_RST# 6
21,58 PLTRST2# EXP 0R2J-2-GP SYSRST#
21.H0156.001 25 R7201 PERST# 8 18
PCIE_PTX_EXPRX_P4_C 23 PERST# RCLKEN

1
+3.3V_RUN R7208 1 2 0R2J-2-GP CPUSB#
24 PCIE_PTX_EXPRX_N4_C 23
C7226 DY R7209 1
DY 9 CPUSB#
23 EXP 2 0R2J-2-GP CPPE# 10 CPPE#
Not SMT, belog to DIP! 22 SC22P50V2JN-4GP 19 7

2
PCIE_PRX_EXPTX_P4 23 OC# GND
1

21 X01.09/0819 1 DY 2 EXPRCRD_SHDN# 20 21
PCIE_PRX_EXPTX_N4 23 R7211 R7210 0R2J-2-GP SHDN# GND
20
10KR2J-3-GP
19 CLK_PCIE_EXP 23 DY 38 EXPRCRD_PW REN#
TPS2231MRGPR-GP
18 CLK_PCIE_EXP# 23
+3.3V_CARD 17 EXPRCRD_CPPE# EXPRCRD_CPPE#
2

16 +3.3V_CARD
EXPCLK_REQ# 23
15
SC10U10V5ZY-1GP

22,38,50 SIO_SLP_S4#
SCD1U16V2ZY-2GP

14 +3.3V_CARDAUX
1

PERST# +1.5V_CARD Max. 650mA, Average 500mA.


C7223

C7222

13
1

R7204 12 +3.3V_ALW +1.5V_RUN +3.3V_RUN


2K2R2J-2-GP PCIE_W AKE# +1.5V_CARD +3.3V_CARD Max. 1300mA, Average 1000mA
EXP DY DY 11

SC4D7U6D3V5KX-3GP
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
PCIE_W AKE# 35,38,64
10 +3.3V_CARDAUX Max. 275mA
2

C7215

C7216
9
2

1
8 C7213 C7214
CARD_SMBDAT 37
7 CARD_SMBCLK 37 EXP DY EXP EXP
6
2

2
5
4 CPUSB#
+1.5V_CARD USBP+_EXP
3
USBP-_EXP R7202
EXP 2 0R2J-2-GP
1 USBP12+ 21,32,34
2
R7203
EXP 2 0R2J-2-GP
1 USBP12- 21,32,34
EXP
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP

1 Place R near U3201 +3.3V_CARDAUX +1.5V_CARD +3.3V_CARD


A <Core Design> A
1
C7225

C7224

27

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
1

R7205
2K2R2J-2-GP EXPRESSCARD-26P-14-GP C7219

C7218

C7221

C7220
EXP DY DY Wistron Corporation
1

1
C7217
2

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


62.10081.321 EXP EXP EXP EXP EXP
2

Taipei Hsien 221, Taiwan, R.O.C.


2

2
Title

Place them near to NEW1 PCMCIA / ExpressCard


WWW.AliSaler.Com
Size Document Number Rev
Place them near to U7202 A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 72 of 82
5 4 3 2 1
5 4 3 2 1

User.interface
Camera Connector
+CAMERA_VDD CCD1 +CAMERA_VDD
12
Camera Power CTRL 10
9
CAM_MIC_CBL_DET#

C7302

C7303
8

SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
21 CAM_MIC_CBL_DET#

1
USBP11+_R 7
D USBP11-_R 6 D
5

2
4
30 AUD_DMIC_CLK_G 2 1 AUD_DMIC_CLK_G_C 3
+3.3V_RUN +CAMERA_VDD R7304 2 1 0R2J-2-GP AUD_DMIC_IN0_C 2
30 AUD_DMIC_IN0
R7305 33R2J-2-GP
1 2 1
R7306 0R3J-0-U-GP 11
Close to connector
FOX-CON10-GP-U
20.F0711.010

21 USBP11+ USBP11+_R
21 USBP11- USBP11-_R

2
EL7301
DLW 21HN900SQ2LGP

C 1 +CAMERA_VDD C
AFTP7301

AFTP7302 1 USBP11-_R

3
1 USBP11+_R
AFTP7303
1 CAM_MIC_CBL_DET#
AFTP7304
1 AUD_DMIC_CLK_G_C
AFTP7305
1 AUD_DMIC_IN0_C
AFTP7306

User.interface MB BT CONN BT Module CONN


PIN Define PIN Define
Bluetooth Connector
1 GND 1 GND
BT1

X01-26 1
12 2 USBP5+_R 12 USB_DP
+3.3V_RUN
21 USBP5+ 2
3
3 USBP5-_R 11 USB_DN
B 21 USBP5- B
4
BT_DET#
C7301

C7304

5 GND GND
SCD1U10V2KX-4GP

4 10
SC2D2U6D3V3KX-GP

21 BT_DET#
1

BT_RADIO_DIS# 6
38 BT_RADIO_DIS#
64 COEX1_BT_ACTIVE 7
1

C7305
64 COEX2_W LAN_ACTIVE 8 5 BT_DET# 2 MOD_DET
2

SC100P50V2JN-3GP DY BT_LED_C 9
+3.3V_RUN 10
2

11 6 BT_RADIO_DIS# 7 RADIO_DIS
JST-CON10-12-GP

Close to CONN Pin.4


21.D0214.110 7 COEX1_BT_ACTIVE 3 COEX1_BT_ACTIVE
8 COEX2_WLAN_ACTIVE 8 COEX2_WLAN_ACT
9 BT_LED 6 LINK_IND
+3.3V_RUN
AFTP7307 1
+5V_RUN 10 +3.3V_RUN 9 3.3V
1 COEX1_BT_ACTIVE
AFTP7308
COEX2_W LAN_ACTIVE
AFTP7309 1 11 NC
1

1 USBP5+
AFTP7310
1 USBP5- R7310
AFTP7311
BT_RADIO_DIS#
AFTP7312 1
1 BT_LED
100KR2J-1-GP 12 NC
AFTP7313
1 BT_DET#
AFTP7314
2

A BT_ACTIVE_K# 66 <Core Design> A


3

BT_LED Q7303
1
R7302
2 1
MMBT3904-7-F-GP Wistron Corporation
1KR2J-1-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2

Taipei Hsien 221, Taiwan, R.O.C.

Title

Bluetooth / Camera / DMIC


WWW.AliSaler.Com
Size Document Number Rev
A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 73 of 82
5 4 3 2 1
5 4 3 2 1

+DOCK_PWR_BAR
SSID = Docking DK1
145

1
C7402
153 160 SCD1U50V3KX-GP

2
147 +DOCK_PWR_BAR

+DOCK_PWR_BAR 148 146

1 2
DOCK_AC_OFF 38,44
161
35 DOCK_LOM_SPD10LED_GRN#
3 4 DOCK_LOM_SPD100LED_ORG# 35
DPB_DOCK_CA_DET 5 6 DPC_DOCK_CA_DET
7 8
NP1
9 10
D
20 DPB_LANE_0P_C DPC_LANE_0P_C 20
20 DPB_LANE_0N_C
11 12 DPC_LANE_0N_C 20
D
13 14
20 DPB_LANE_1P_C
15 16 DPC_LANE_1P_C 20
20 DPB_LANE_1N_C
17 18 DPC_LANE_1N_C 20
19 20
21 22
20 DPB_LANE_2P_C DPC_LANE_2P_C 20
20 DPB_LANE_2N_C
23 24 DPC_LANE_2N_C 20
25 26
20 DPB_LANE_3P_C
27 28 DPC_LANE_3P_C 20
20 DPB_LANE_3N_C
29 30 DPC_LANE_3N_C 20
31 32
DPB_DOCK_AUX_SW 33 34 DPC_DOCK_AUX_SW
DPB_DOCK_AUX_SW# 35 36 DPC_DOCK_AUX_SW#
37 38
DPB_DOCK_HPD 39 40 DPC_DOCK_HPD
20 DPB_DOCK_HPD DPC_DOCK_HPD 20
+NBDOCK_DC_IN_SS 41 42 ACAV_DOCK_SRC# 44
43 44
75 BLUE_DOCK 45 46 DAT_DDC2_DOCK 75
47 48 CLK_DDC2_DOCK 75
49 50

154 159

162 Dock eSATA


51 52
53 54 SATA_PRX_DTX_5+_C SCD01U50V2KX-1GP 1 2 C7403 SATA_PRX_DTX_5+ 24
75 RED_DOCK
55 56 SATA_PRX_DTX_5-_C SCD01U50V2KX-1GP 1 2 C7404 SATA_PRX_DTX_5- 24
57 58
75 GREEN_DOCK 59 60 SATA_PTX_DRX_5+ 24
61 62 SATA_PTX_DRX_5- 24
63 64
55 HSYNC_DOCK 65 66 USBP8+ 21
55 VSYNC_DOCK 67 68 USBP8- 21 ]----->Dock USB 1
69 70
37 CLK_MSE 71 72 USBP9+ 21
C 37 DAT_MSE 73 74 USBP9- 21 ]----->Dock USB 2 C
75 76
75 DAI_BCLK# 77 78 CLK_KBD 37
75 DAI_LRCK# 79 80 DAT_KBD 37
81 82
75 DAI_DI
83 84
75 DAI_DO# 85 86
87 88
75 DAI_12MHZ# 89 90
91 92
93 94

155 158 Clost to DK1


163
95 96 D7401
97 98 DPC_DOCK_AUX_SW 10 DYTMDS_D2+ 1 DPC_DOCK_AUX_SW
38 D_LAD0 BREATH_LED# 37,66 NC#10
99 100 DPC_DOCK_AUX_SW# 9 2 DPC_DOCK_AUX_SW#
38 D_LAD1 DOCK_LOM_ACTLED_YEL# 35 TMDS_D2- NC#2
101 102 8 3 +5V_RUN
DPC_DOCK_CA_DET TMDS_GND TMDS_VDD DPC_DOCK_CA_DET
38 D_LAD2 103 104 7 4
DOCK_LOM_TRD0+ 35 DPC_DOCK_HPD NC#7 TMDS_D1+ DPC_DOCK_HPD
38 D_LAD3 105 106 6 5
DOCK_LOM_TRD0- 35 TMDS_D1- NC#5
107 108
38 D_LFRAME# 109 110 IP4280CZ10-GP
DOCK_LOM_TRD1+ 35
38 D_CLKRUN# 111 112 DOCK_LOM_TRD1- 35
113 114
115 116 1 DY 2 D7402
38 D_SERIRQ
117 118 C7405 1 DY 2SCD1U10V2KX-4GP DPB_DOCK_AUX_SW 10 DYTMDS_D2+ 1 DPB_DOCK_AUX_SW
38 D_DLDRQ1# NC#10
119 120 C7406 SCD1U10V2KX-4GP DPB_DOCK_AUX_SW# 9 2 DPB_DOCK_AUX_SW#
CLK_PCI_DOCK TMDS_D2- NC#2
21 CLK_PCI_DOCK 121 122 DOCK_LOM_TRD2+ 35 8 3 +5V_RUN
DPB_DOCK_CA_DET TMDS_GND TMDS_VDD DPB_DOCK_CA_DET
123 124 DOCK_LOM_TRD2- 35 7 4
NC#7 TMDS_D1+
1

125 126 +RTC_CELL +3.3V_ALW DPB_DOCK_HPD 6 5 DPB_DOCK_HPD


R7408 TMDS_D1- NC#5
37 DOCK_SMB_CLK 127 128 DOCK_LOM_TRD3+ 35
10R2F-L-GP
DY 37 DOCK_SMB_DAT 129 130 DOCK_LOM_TRD3- 35 IP4280CZ10-GP

2
131 132

2
133 134 R7410 R7412
37 DOCK_SMB_ALERT# DOCK_DCIN_IS+ 45
1 2

135 136 DY 100KR2J-1-GP 100KR2J-1-GP


B 43 DOCK_PSID DOCK_DCIN_IS- 45 B
EC7401 137 138
DY 139 140 DOCK_LOM_TRD0+
37 DOCK_PWR_BTN#

1
SC4D7P50V2CN-1GP DOCK_POR_RST# 37 DOCK_LOM_TRD0-
141 142 D7403
2

1
143 144 K A DOCK_LOM_TRD1+
38 SLICE_BAT_PRES# DOCK_DET# 38,44,75
NP2 DOCK_LOM_TRD1-
164 SDMK0340L-7-F-GP DOCK_LOM_TRD2+

1
+DOCK_PWR_BAR 149 151 +DOCK_PWR_BAR DOCK_LOM_TRD2-
R7416 DOCK_LOM_TRD3+
910KR2J-GP DOCK_LOM_TRD3-
150 DY
2

C7407

1
C7408

C7409

C7410

C7411

C7412

C7413

C7414

C7415
D7404 156 157 SCD1U50V3KX-GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP
2
DY PESD24VS2UT-GP DY DY DY DY DY DY DY DY
2

152

2
JAE-CONN144D-3-GP-U
3

+3.3V_RUN +3.3V_RUN

X01-15 20.F1572.144

14
U7402B
14

U7402A
DPC_DOCK_CA_DET# 4 3 DPC_DOCK_CA_DET
DPB_DOCK_CA_DET# 2 1 DPB_DOCK_CA_DET

1
+5V_RUN
1

+5V_RUN TSAHC14PW-GP R7422

7
TSAHC14PW-GP R7401 1MR2J-1-GP
7

1MR2J-1-GP

2
2

U7403 C7416
2

U7401 C7418 SCD1U10V2KX-4GP

1
SCD1U10V2KX-4GP 1 8
1

DPC_DOCK_AUX_R 1OE# VCC


1 8 20 DPC_DOCK_AUX 2 1 2 7
DPB_DOCK_AUX_R 1OE# VCC C7419 SCD1U10V2KX-4GP 1A 2OE# DPC_DOCK_AUX_SW#
20 DPB_DOCK_AUX 2 1 2 7 3 6
C7417 SCD1U10V2KX-4GP 1A 2OE# DPB_DOCK_AUX_SW# 1B 2B
3 6 4 5
1B 2B DPC_DOCK_AUX_SW GND 2A
A From GPU 4
GND 2A
5 A
DPB_DOCK_AUX_SW DPC_DOCK_AUX_R# 1 2 DPC_DOCK_AUX# 20
DPB_DOCK_AUX_R# 1 2 +5V_RUN SN74CBTD3306CPWR-GP C7420 SCD1U10V2KX-4GP
DPB_DOCK_AUX# 20
+5V_RUN SN74CBTD3306CPWR-GP C7401 SCD1U10V2KX-4GP
<Core Design>

RN7401
2

2
U7404 C7421
+3.3V_RUN 2
1
3
4
DVI_C_DDC_CLK
DVI_C_DDC_DATA U7405 C7422
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SCD1U10V2KX-4GP SCD1U10V2KX-4GP
1

1
SRN2K2J-1-GP Taipei Hsien 221, Taiwan, R.O.C.
1 1OE# VCC 8 1 1OE# VCC 8
1 2 DVI_B_CLK_R 2 1A 2OE# 7 20 DVI_C_DDC_CLK 1 2 DVI_C_CLK_R 2 1A 2OE# 7 Title
R7423 DPB_DOCK_AUX_SW 3 6 DPB_DOCK_AUX_SW# R7424 DPC_DOCK_AUX_SW 3 6 DPC_DOCK_AUX_SW#
33R2J-2-GP 4
1B
GND
2B
2A 5 DVI_B_DAT_R 1
R7425
2 DVI_B_DDC_DATA 20
1
RN7402
4 DVI_B_DDC_CLK
33R2J-2-GP 4
1B
GND
2B
2A 5 DVI_C_DAT_R 1
R7426
2 DVI_C_DDC_DATA 20 Docking Connector

WWW.AliSaler.Com
+3.3V_RUN Size Document Number Rev
33R2J-2-GP From GPU 2 3 DVI_B_DDC_DATA 33R2J-2-GP
Custom X01
DVI_B_DDC_CLK 20
SN74CBTD3306CPWR-GP
SRN2K2J-1-GP
SN74CBTD3306CPWR-GP
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 74 of 82
5 4 3 2 1
5 4 3 2 1

SSID = DOCK CRT SWITCH SSID = DOCK AUDIO +3.3V_RUN Close to Pin.24 Close to Pin.18 Close to Pin.25
L7502
1 2 +3.3V_RUN_I2S_VDD
+3.3V_RUN BLM18EG601SN1D-GP
DDC1_DATA C7502 C7503 C7504 C7505 C7506 C7507 C7508
20 DDC1_DATA

1
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
2
DAT_DDC2_CRT DY
55 DAT_DDC2_CRT DAT_DDC2_DOCK R7502

2
74 DAT_DDC2_DOCK
100KR2J-1-GP

1
D 1 DY 33R2J-2-GP
2 DOCK_AUD_RST# D
DDC1_CLK 24,30 PCH_AZ_CODEC_RST# R7503
20 DDC1_CLK

1
C7509
CLK_DDC2_CRT SCD1U10V2KX-4GP
55 CLK_DDC2_CRT CLK_DDC2_DOCK

2
74 CLK_DDC2_DOCK CRT_SW ITCH_VSYNC U7502
CRT_SW ITCH_VSYNC 55

19
20

21
22
2

1
U7501 +3.3V_RUN_I2S_VDD 25 5 I2S_DO
AVDD DOUT
27

SCL2
SCL1
SCL0

SDA2
SDA1
SDA0
PCH_VSYNC +3.3V_RUN LEFT_LO AUD_DOCK_MIC_L_IN 30
PCH_VSYNC 20 L7501 18 DRVDD RIGHT_LO 29 AUD_DOCK_MIC_R_IN 30
+1.8V_RUN 24
CRT_SW ITCH_HSYNC DRVDD
25 GND V1 12 CRT_SW ITCH_HSYNC 55 1 2
10 7 BLM18EG601SN1D-GP 32 20
GND V0 DVDD NC#20

1
NC#19 19
+3.3V_RUN C7510 C7511 +3.3V_RUN_IOVDD X01.09/0918
MAX4885EETG-GP SC1U10V2KX-1GP SCD1U10V2KX-4GP
7 IOVDD NC#22 22
38 CRT_SW ITCH 24 11 23 X01.09/0921

2
SEL H1 PCH_HSYNC I2S_BCLK NC#23
23 EN H0 6 PCH_HSYNC 20 2 BCLK NC#28 28
C7522 C7512 I2S_DI# 4 11
DIN NC#11
1

SCD1U10V2KX-4GP CLK_12M_R 1 13
+3.3V_RUN MCLK NC#13
DY 17 9 14
SC1U10V2KX-1GP

74 BLUE_DOCK R2 VL AUD_DOCK_HP_L_OUT NC#14


18 30 AUD_DOCK_HP_L_OUT 10 16
2

55 BLUE_CRT R1 +5V_CRT_SW _VCC AUD_DOCK_HP_R_OUT LINEL NC#16


3 R0 VCC 8 30 AUD_DOCK_HP_R_OUT 12 LINER NC#15 15
NC#30 30

1
DOCK_AUD_RST# 31
+5V_RUN C7513 RESET#
G2
G1
G0

17
B2
B1
B0

R7512 SCD1U10V2KX-4GP AUD_DOCK_SMB_CLK AVSS


X01.09/0918 8 26

2
M_BLUE SCL AVSS
20 M_BLUE 2 1 X01.09/0921
15
16
4

13
14
5

AUD_DOCK_SMB_DAT 9 21
0R3J-0-U-GP SDA DRVSS
C RED_DOCK I2S_LRCLK 3 6 C
74 RED_DOCK WCLK DVSS

55 RED_CRT
RED_CRT 1 C7516
GPAD 33
SCD1U10V2KX-4GP
2

TLV320AIC3004IRHBR-GP
+3.3V_RUN
+3.3V_RUN RN7501
OSC7501 3 2
M_RED OSC 4 1
20 M_RED CRT_MUX_SWITCH CRT display
VCONT 1
GREEN_DOCK 2 SRN2K2J-1-GP U7505
74 GREEN_DOCK GREEN_CRT 0 MB GND
3 OSC_12MHZ AUD_DOCK_SMB_DAT 1 6
55 GREEN_CRT OUTPUT AUD_DOCK_SMBDAT 37
Dock 4
20 M_GREEN
M_GREEN 1 VDD
2 5

1
C7517
OSC-12MHZ-1-GP OSC SCD1U10V2KX-4GP 3 4

2
DMN66D0LDW -7-GP

+3.3V_RUN AUD_DOCK_SMBCLK 37
AUD_DOCK_FD_LOOP1 AUD_DOCK_FD_LOOP2 AUD_DOCK_SMB_CLK
1

1
C7518 C7519 R7504 OSC_12MHZ 1 OSC 2
FreqD FreqD FreqD R7501 0R2J-2-GP

10
4
SCD1U10V2KX-4GP

100KR2J-1-GP
U7504A U7504B
SC1U6D3V2KX-GP
2

14 5 14 9 CLK_FD_12M 1 CLK_12M
FreqD20R2J-2-GP 1 2 CLK_12M_R

PR

PR
VCC Q VCC Q R7505 R7506 33R2J-2-GP
2 12
2

B D D B
+VDDA Place this block FreqD FreqD
23 CLK_FD_48M 3 CLK_FD_24M 11 1 2 I2S_12MHZ
close to Audio Codec Pin14 CLK
6
CLK
8 R7507 33R2J-2-GP
Q Q
1

7 7

CL

CL
R7508 GND GND +3.3V_RUN
2K49R2F-GP TSLVC74APW R-1GP TSLVC74APW R-1GP

13
2

AUD_SENSE_B AUD_SENSE_B 30 AUD_DOCK_FD_CLR#


Frequency Divider (12M Output)
1

1
D7502 D7503 D7501 D7504
C7520 R7509 R7510
D

SC1KP50V2KX-1GP 39K2R2F-L-GP 20KR2F-L-GP DY DY DY DY


2

Q7501
FreqD 2N7002A-7-GP BAV99-4-GP BAV99-4-GP BAV99-4-GP BAV99-4-GP
2

38,44,74 DOCK_DET# G

3
DOCK_MIC_DET_R#
DOCK_HP_DET 38
+3.3V_RUN +3.3V_RUN +3.3V_RUN U7503
S

16 3 DAI_BCLK#_R 1 2
C7521 C7501 VCC 1Y#/1Y DAI_LRCK#_R R7513 1 DAI_BCLK# 74
2Y#/2Y 5 2 0R2J-2-GP DAI_LRCK# 74
1

1
SCD1U10V2KX-4GP SCD1U10V2KX-4GP 7 DAI_DO#_R R7514 1 2 0R2J-2-GP
3Y#/3Y DAI_DO# 74
3

D7505 I2S_BCLK 2 9 R7515 0R2J-2-GP


Q7502 BAV99-4-GP I2S_LRCLK 1A 4Y#/4Y DAI_12MHZ# 74
DY 4 11
2

DMN66D0LDW -7-GP I2S_DO 2A 5Y#/5Y I2S_DI#


14

14

6 3A 6Y#/6Y 13
U7402C U7402D I2S_12MHZ 10 4A
12
4

DAI_DI_1 DAI_DI_R 5A
A 74 DAI_DI 5 6 9 8 14 6A <Core Design> A

DOCK_HP_DET_R# R7511 1
38 EN_I2S_NB_CODEC# OE1#
TSAHC14PW -GP TSAHC14PW -GP DAI_OE2#
DOCK_MIC_DET 38 1 2 15 8
Wistron Corporation
7

OE2# GND
0R2J-2-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
74HC366D-GP
Title

Docking IC / SW
WWW.AliSaler.Com
Size Document Number Rev
A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 75 of 82
5 4 3 2 1
5 4 3 2 1

SSID = User.Interface

+5V_ALW +1.5V_RUN +3.3V_LAN +3.3V_SUS +3.3V_RUN_W W AN +3.3V_ALW


1

1
D C7601 C7602 C7603 C7604 C7605 C7606 D
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
2

2
Place near BTB1

IO Board Connector
+3.3V_ALW BTB1
84 86
85 NP2 +3.3V_SUS
40 41 PW R_BTN_BD_DET# 38
66 BREATH_PW RLED_B 39 42
25 USB_MCARD2_DET# 38 43 POW ER_SW #_MB 37
C 37 44 C
21 PCIE_MCARD2_DET#
36 45
35 46 +3.3V_RUN_W W AN
34 47
33 48 +5V_ALW
38 MDC_RST_DIS# 32 49
38 W W AN_RADIO_DIS# 31 50
38,63 USB_SIDE_EN# 30 51
21 USB_OC#2_3 29 52
COMRXD0 28 53 +1.5V_RUN
38 COMRXD0 COMTXD0
38 COMTXD0 27 54 NB_LOM_SPD10LED_GRN#_R 35
COMRTS0# 26 55
38 COMRTS0# +3.3V_LAN
COMDSR0# 25 56
38 COMDSR0#
COMCTS0# 24 57
38 COMCTS0# NB_LOM_ACTLED_YEL#_R 35
COMDTR0# 23 58
38 COMDTR0#
COMRI0# 22 59
38 COMRI0# NB_LOM_SPD100LED_ORG#_R 35
COMDCD0# 21 60
38 COMDCD0# LED_W W AN_OUT# 66
20 61 PLTRST3# 21,37,38,70
21 USBP13- 19 62 MINI2CLK_REQ# 23
21 USBP13+ 18 63
17 64 NB_LOM_TRD0+ 35
23 CLK_PCIE_MINI2# 16 65 NB_LOM_TRD0- 35
23 CLK_PCIE_MINI2 15 66
14 67 NB_LOM_TRD1+ 35
23 PCIE_PRX_W W ANTX_N1 13 68 NB_LOM_TRD1- 35
23 PCIE_PRX_W W ANTX_P1 12 69
11 70 NB_LOM_TRD2+ 35
23 PCIE_PTX_W W ANRX_N1_C 10 71 NB_LOM_TRD2- 35
23 PCIE_PTX_W W ANRX_P1_C 9 72
B B
8 73 NB_LOM_TRD3+ 35
24 PCH_AZ_MDC_BITCLK 7 74 NB_LOM_TRD3- 35
6 75
24 PCH_MDC_SDOUT 5 76 USBP3- 21
24 PCH_AZ_MDC_RST# 4 77 USBP3+ 21
24 PCH_MDC_SDIN1 3 78
2 79 USBP2- 21

24 PCH_AZ_MDC_SYNC 1 80 USBP2+ 21
82 NP1
81 83

TYCO-CONN80E-GP

20.F1612.080

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

IO Board CONN
WWW.AliSaler.Com
Size Document Number Rev
A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 76 of 82
5 4 3 2 1
5 4 3 2 1

SSID = User.interface

D D

LED BD Connector

LEDB1
13

AFTP7702 1 1

BAT1_LED_AMBER_B 2
66 BAT1_LED_AMBER_B
BAT2_LED_BLUE_B 3
66 BAT2_LED_BLUE_B
4
BT_LED_B 5 *Pin12 for Daughter Board DET
66 BT_LED_B
6
LED_WLAN_OUT_B 7
*Daughter Board Pin12 connect to Pin1
66 LED_WLAN_OUT_B
C 8 C
9
HDD_LED_B 10
66 HDD_LED_B
11
LED_BD_DET# 12
25 LED_BD_DET#
14

MLX-CON12-11GP

20.K0227.012

1 BAT1_LED_AMBER_B
AFTP7701
1 BAT2_LED_BLUE_B
AFTP7703
B 1 BT_LED_B
LED Location from left to right B
AFTP7704
1 LED_WLAN_OUT_B
AFTP7705
HDD BATTERY WLAN BLUE TOOTH
1 HDD_LED_B
AFTP7706
1 LED_BD_DET#
AFTP7707

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LED Board Connector


Size Document Number Rev

5 4
WWW.AliSaler.Com
3
A4

2
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 77
1
of 82
X01
5 4 3 2 1

SSID = User.Interface

D D

AFTP7802 1 +3.3V_RUN
AFTP7803 1 Biometric_USBP-
AFTP7804 1 Biometric_USBP+
AFTP7805 1 BIO_DET#

+3.3V_RUN

1
C7801
SCD1U10V2KX-4GP FP1
C 7 C

2
R7801 1
0R3J-0-U-GP
21 USBP10- 1 2 Biometric_USBP- 2
21 USBP10+ 1 2 Biometric_USBP+ 3
AFTP7801 1 4
0R3J-0-U-GP 5
R7802 6
25 BIO_DET#
8

MLX-CON6-11-GP
1

20.K0227.006
DY
EL7801
DLW21SN900SQ2LUGP
Biometric Connector
4

B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Finger Printer Board CONN


Size Document Number Rev

5 4
WWW.AliSaler.Com 3
A4

Date: Thursday, October 29, 2009


2
Fonseca UMA
Sheet 78
1
of 82
X01
5 4 3 2 1

SSID = Mechanical
X01-49
ZZ.00PAD.J11 ZZ.00PAD.I51 ZZ.00PAD.J01
+5V_ALW +5V_ALW +3.3V_RUN +5V_ALW +5V_ALW
H1 H2 H3 H4 H6 H7 H8

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP
EC7903 EC7905 +3.3V_RUN +1.05V_RUN EC7907 EC7908

HOLE296R166-GP

HOLE296R166-GP

HOLE296R166-GP

HOLE296R166-GP

HOLE256R126-GP
HTE10BE10R32-D-55-GP

HTE10BE10R32-D-55-GP

SCD1U25V2ZY-1GP
1

1
EC7902
Hole RF Cap. DY DY 1 DY 2
EC7906
DY DY

2
D SC33P50V2JN-3GP D

1
15ONLY

1
For CPU For Docking For IO Board

X01-49
ZZ.00PAD.M01 ZZ.00PAD.I71
+3.3V_ALW +1.5V_SUS +1.5V_SUS +5V_RUN +5V_RUN +5V_RUN +5V_RUN +3.3V_RUN
H9 H11 H12 H13 H14 H15 H16 H17

HOLET256B315R111-GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP
EC7909 EC7910 EC7911 EC7913 EC7914 EC7915 EC7916

HOLE355X355R126-GP

HOLE355X355R126-GP

HOLE355X355R126-GP

HOLE355X355R126-GP

HOLE355X355R126-GP

HOLE355X355R126-GP

HOLE355X355R126-GP

SCD1U25V2ZY-1GP
1

1
EC7912
Hole RF Cap. DY DY DY DY DY DY DY

2
1

15ONLY

X01-38
ZZ.00PAD.I61 ZZ.00PAD.I81
H18 H19 H20 H21 H24 H25 +3.3V_RUN +3.3V_RUN +3.3V_RUN +1.05V_RUN +1.05V_RUN +1.5V_SUS +1.5V_SUS +3.3V_RUN +3.3V_RUN

HOLE197R91-GP

HOLE197R91-GP
HOLE300X166R111-GP

HOLE300X166R111-GP

HOLE300X166R111-GP

HOLE300X166R111-GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP
EC7917 EC7918 EC7921 EC7922 EC7923 EC7919 EC7941
Hole

1
C C
RF Cap. DY DY DY DY DY DY DY

2
1 DY 2
1

1
EC7920
SC33P50V2JN-3GP

X01-49
+5V_ALW +5V_ALW +1.05V_RUN +1.05V_RUN +3.3V_RUN +3.3V_RUN +PW R_SRC +PW R_SRC

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP
EC7924 EC7925 EC7926 EC7927 EC7928 EC7929 EC7931
H10 (15) H10 (14) BOSS1

SCD1U25V2ZY-1GP
1

1
EC7930

RF Cap. DY DY DY DY DY DY DY
H10

2
H10
Name BOSS1 15ONLY
STF217R128H83-GP
HOLE355X355R126-GP

1 X01-38
1

+5V_RUN +3.3V_RUN +3.3V_RUN +3.3V_RUN +5V_RUN +5V_RUN +PW R_SRC +PW R_SRC

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP
EC7932 EC7933 EC7934 EC7935 EC7936 EC7937

1
ZZ.00PAD.I71 ZZ.00PAD.E01 34.4Y702.001 EC7939 EC7940
B RF Cap. DY DY DY DY DY DY DY DY
B

SCD1U50V3KX-GP

SCD1U50V3KX-GP
For Heatsink

2
X01-1 X01-29

34.4F822.002 34.45T31.001 34.45T31.001 X01-31


SPR1 SPR2 SPR3 SPR4 SPR5 SPR6 SPR7 +5V_ALW +3.3V_RUN +PW R_SRC +5V_RUN +3.3V_RUN
DY X01-44

SCD1U50V3KX-GP

SCD1U50V3KX-GP
EC7901 EC7904
Spring
SPRING-51-GP

SPRING-51-GP

SPRING-51-GP

SPRING-24-GP

SPRING-24-GP

SPRING-24-GP

SPRING-24-GP

1
EC7938 EC7942 EC7943
EMI Cap.
1

1
DY DY DY 15_ONLY
DY

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP
2

2
X01-35
+3.3V_RUN +3.3V_RUN +5V_CRT_RUN +5V_CRT_RUN

A <Core Design> A
14

14

14

10

14

13

Unused Parts U7402E U7402F EMI Cap.


11 10 13 12 9 8 12 11 Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
TSAHC14PW -GP TSAHC14PW -GP U5501C U5501D
7

SSAHCT125PW R-GP SSAHCT125PW R-GP Title

Unused Parts / EMI RF Cap.

WWW.AliSaler.Com
Size Document Number Rev
A3 Fonseca UMA X01
Date: Tuesday, November 03, 2009 Sheet 79 of 82
5 4 3 2 1
5 4 3 2 1

VERSON DATE NO PAGE Modified List Issue Description OWNER


1 35 (remove) R3541 ; (change) R3537 to B_TPM group LOM_TPM_EN# for B_TPM group control EE
2 54,64, (rename) F1 to FUSE5401 ; (rename) R2323 to (DY) R6402 Rename for schematic standardization EE
72 (rename) R2320 to (DY) R7211 ; (rename) C7802 to (DY) C7226 Dummy R6402 and R7211 because traces already pull high.
3 27 (change) L2702, L2703 part. Change coil for intel requirment. EE
4 27 (change) D2701, D2702 part. Change diode for PSL vender. EE
D D

08/19 5 9,37 (remove) TP3710 (add) R3730 for H_SKTOCC# traces. Dell requires add CPU socket detect function. EE
6 37 (remove) R3738 Just for JTAG debug, remove R3738 pull high. EE
7 37 (change) R3703 to 130k. Board Version (X01). EE
8 34,67 (add) R3411, C3409 to DY for CLK_SC_48M. Remain AC term for SmartCard 48Mhz clock. EE
X01 (add) 0.1uF C6703 to DY for SC_DET#. Add 0.1uF for SC_DET#.
9 47 Update PU4701 symbol. Correct error vender component P/N. Power EE
10 50 (DY) PR5007. TPS51116 already built-in BST circuit. Power EE
(change) (DY) PD5001 part. Change PD5001 to PSL vender.
11 42 (change) Q4207 part. Change MOS part due to power demand. EE
12 54 (change) FUSE5401 part. Use Poly-fuse instead of one time fuse. EE
13 54 (add) 100k R5401 to (DY) to GND. Reserved dummy location for panel backlight control. EE
14 25 (change) TPM_ID1 pull high to +3.3V_RUN Intel PCH EDS. EE
08/25 15 39 (change) U3901(SMSC EMC4002) to Rev.B SMSC Version Change. EE
16 4,35, (modify) SMBus Diagram for LAN Modify LAN SMBus for leakage from +3.3V_LAN to +3.3V_ALW_PCH. EE
C 37 (change) KBC I2C1E group link to PCH1 and U3701 pull high +3.3V_ALW_PCH. C
(change) LAN SMBus from U3503 link to U3701.
17 54 (remove) R5423, R5424. No need R pull high / down for eDP_AUX and eDP_AUX#. EE
18 32 (change) R3206 from 100k to 47k ohm. For Ricoh R5U24x sequence (GBRST#). EE
19 32 (stuff) R2316, C2309, C2310, X2301, X2301. Intel recommends use 25M Xtal for DCI signals. EE
ME

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Change List (1/3)

WWW.AliSaler.Com
Size Document Number Rev
A3 X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 80 of 82
5 4 3 2 1
5 4 3 2 1

VERSON NO PAGE ACTION reference Issue Description OWNER


X01-1 79 Change H10 14U change H10 PAD size EE
X01-2 62 Change U6201,U6202 change BIOS part number EE
X01-3 52 ADD PG5221~PG5226
combin 1.05V_RUN and 1.05V_VTT Circuit EE
49 remove +1.05V_RUN Circuit
D
X01-4 9 Change R915-->0 ohm,R920-->0 ohm EE D
X01-5 66 ADD D6603, D6602 combin WWAN ,WIMAX and WLAN LED circuit EE
DY R6615,Q6601,R6616,R6613
X01-7 58 DY XDP1,R5808 EE
X01 X01-8 70 DY LDBG1,JTAG1 EE
X01-9 50 DY PR5010 EE
change discharge mode
ADD PR5016
X01-10 36 Change R3616-->1k, C360200>1U EE
modify TCM circuit
DY R3606,R3607
remove R3605
X01-11 42 Change R4226--> 0805 size EE
X01-12 42,37 Change C4208-->150P,C4211-->4700P,R3707-->10K Tuning S3 power sequence. EE
52 DY PC5211
X01-13 46 ADD PR4623,PR4624 Tuning power sequence. EE
DY PR4624
C C
X01-14 37 Change change 1.05V_RUN_PWRGD to test pad combin 1.05V_RUN and 1.05V_VTT Circuit EE
X01-15 20 Change R2006-->110K,R2007-->110K EE
X01-16 74 Change change DK1 part number update dock connector ME
X01-17 46,52 Change PU460-->FDS8880,PU4605-->FDS6676AS,PR4602-->73K2R2F power-EE
Power team suggest
53,12 PU5203-->SI7658ADP,PC5307-->SCD068U16V2KX
PR5202-->73K2R2F,PR5328-->61K9R2F
PC5319-->SC1KP50V2KX,PC5318-->SC330P50V2KX
R1203-->0R2J-2
52 remove PU5204
X01-18 68 ADD R6801,R6802 EMC team suggest EMC
X01-19 37 modfiy connect X3701 pin2 and pin3 to GND EE
X01-20 32 modfiy R3211,R3212,R3205,R3213,R3215-->33 ohm EE
Tuning signal
ADD R7116,R7117,R7118,R7119,R7120
71 DY EC7106,EC7107,EC7108,EC7109
X01-21 39 Change C3901-->470P,C3902-->100P EE
B B
X01-22 35 ADD U3507 add LAN EEPROM 2nd source EE
X01-23 47 Change PC4729-->SCD22U25V3KX,PR4776-->6K65R2F Power team suggest power-EE
X01-24 12 ADD R1207,R1208 Power team suggest power-EE
X01-25 30 Change R3014-->2K,R3025-->2K,C3029-->1KP EE
modify DOCK MIC and HP circuit
C3030-->1KP,C3039-->1U,C3040-->1U
C3035-->1U,C3036-->1U,C3031-->1KP
C3032-->1KP,R3028-->2K,R3029-->2K
X01-26 73 remove R7308,R7309 USB1.1 does not need resistors in USB pair. EE
X01-27 59 Change ODD1 change dock connector EE
X01-28 30 Change C3010,C3023,C3024 Factory request, create spacing. EE
X01-29 79 ADD BOSS1 new part for combin pad and boss ME
X01-30 38,24 modfiy RN3805-->100K*2,RN2401-->10K*2,RN2502-->10K*2 combin resister EE
25
X01-31 79 ADD EC7919 EMC team suggest EMC
A X01-32 63 modfiy D6301 swap <Core Design> EE A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Change List (2/3)

WWW.AliSaler.Com
Size Document Number Rev
Custom X01
Fonseca UMA
Date: Thursday, October 29, 2009 Sheet 81 of 82
5 4 3 2 1
5 4 3 2 1

VERSON NO PAGE ACTION reference Issue Description OWNER


X01-33 23,54 ADD EC2301,EC2302,EC5401 EMC team suggest EMC
X01-34 63 modfiy EL6301 swap EE
X01-35 79 DY SPR7 EMC team suggest EMC
X01-36 49 ADD D6801 EMC team suggest EMC
modfiy L6801,L6802
D X01-38 79 ADD EC7919,EC7939,EC7940,EC7941 EMC team suggest EMC D

X01-39 35 ADD D3502,R3548 Prevent leakage of +3.3V_RUN. EE


X01-40 52 ADD PTC5203 EE
X01 X01-41 23 modfiy Q2303,RN2301 14U ONLY EE
X01-42 71 modfiy R7115 change R7115.2 net name to SD_MMC_CLK_L EE
X01-43 7,9,32 Change RN3202,RN2311,RN903,RN703 change size
23 RN704,RN701,RN705 EE
X01-44 79 ADD EC7942,EC7943 EMC team suggest
X01-45 39 ADD PC3901
Power team suggest
39,50 Change R3902-->12K7R2F,R3903-->5K62R2F EE
PR5014-->30K1R2F,PR5015-->29K4R2F
X01-47 22,27 Change R2205-->10K,C2713-->1U,R2407-->8.2K,R1109-->3.3K EE
24,11
X01-48 24,58 Change FAN1,RTC1 connector ME suggest
C
X01-49 43,79 stuff EC4301,EC7930,PC4503,PC4610,PC4615,EC7912,EC7902 EMC team suggest, 15 inch only EMC C

45,46
X01-50 37,40 DY R3734,R4006,R5425 EE
54
54 stuff R5418
X01-51 47 Change PC4710,PC4709,PC4723--> 0.22U25V Power team suggest power-EE
X01-52 63 DY R6301,R6302,R6303,R6304 EMC team suggest EMC
63 stuff EL6301,EL6302

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Change List (3/3)

WWW.AliSaler.Com
Size Document Number Rev
Custom X01
Fonseca UMA
Date: Tuesday, November 03, 2009 Sheet 82 of 82
5 4 3 2 1

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