Handout #19

EE362A
Fall 2015

EE362A Semiconductor Devices

Lecture 17 - MOSFET

Hyunjoo Jenny Lee

Assistant Professor
School of Electrical Engineering
Korea Advanced Institute of Science and Technology (KAIST)

*Figures that are not annotated with reference are from the education package distributed by the distributor of Neamen textbook.
 Today’s Lecture

§  Objective:
–  Nonideal effects
•  Mobility variation
•  Velocity Saturation
•  Ballistic Transport
–  MOSFET scaling
–  Threshold modification
–  Breakdown

§  Readings:
–  Chapter 11.2 – 11.4

§  Announcement:
–  Quiz will be on 12/2 (WED)!

H. J. Lee | EE | KAIST EE362A | Fall 2015 2

 Mobility Variation (1)

§  µ was a constant before.

à this assumption must be modified for two reasons.

1) Variation in mobility with gate voltage

2) velocity saturation effect à next section

H. J. Lee | EE | KAIST EE362A | Fall 2015 3

 Mobility Variation (2)

§  Variation in mobility with gate voltage

Repelled by localized columbic force

•  Attraction in y-direction:
Gate voltage Qss *
attraction Positive gate voltage produces
a force on electrons to the
surface

•  Repellence in y-direction:

Oxide charge Localized coulombic forces

repellence

Surface Scattering à
mobility decreases

H. J. Lee | EE | KAIST EE362A | Fall 2015 4

 Mobility Variation (2)

§  Transverse electrical field (in the middle of the inversion layer):

1! 1 $
Eeff = # Q'SD(max) + Q'n &
εs " 2 %

Experimentally determined: µ 0 , E0

−1/3
! Eeff $
T increases µeff = µ 0 # &
" E0 %

•  Dependent on doping, T, VG
T increases à lattice scattering •  Independent of oxide thickness

H. J. Lee | EE | KAIST EE362A | Fall 2015 5

 Velocity Saturation (1)

§  Carrier velocity saturates with increasing electric field

§  Velocity saturation will become more prominent in shorter-channel

devices since the corresponding horizontal E-field (104 V/cm) is
generally larger.

–  Example:
VDS = 5V, L = 1 µm à E = 5 x 104 V/cm

–  Thus, short channels are more subject to saturation!

H. J. Lee | EE | KAIST EE362A | Fall 2015 6

 Velocity Saturation (2)

§  What about currents?

§  When velocity saturation occurs,

W µ nCox At constant mobility,

I D(sat ) = (VGS − VT )2
2L current saturates at VDS(sat)

I D(sat ) velocity saturation = WCox (VGS − VT )vsat

107cm/s in bulk
Qinv

1) Magnitude ê
2) Square dependency à linear dependency
3) In reality, even smaller IDsat and VDsat
(∵ vsat smaller at higher VGS due to scattering)
H. J. Lee | EE | KAIST EE362A | Fall 2015 7
 Velocity Saturation (3)

§  Commonly-used model

(mobility vs. E-field)

µeff
µ= ! 2 *1/2
' ! $
)1+ # µ E
#
eff
&& ,
) " vsat % ,
( +
“field-dependent”

1)  ~ linear to VGS

2)  Smaller IDSsat

H. J. Lee | EE | KAIST EE362A | Fall 2015 8

 Velocity Saturation (4)

§  Transconductance:

∂I D(sat ) W µ nCox
gms = = (VGS − VT )
∂VGS L

gms velocity saturation = WCox vsat Constant: independent of VGS and VDS

§  Effect on transit frequency:

gm WCox vsat vsat

fT = = = Traveling L with vsat speed
2π CG 2π (CoxWL) 2π L

Cgdp ignored
H. J. Lee | EE | KAIST EE362A | Fall 2015 9
 Ballistic Transport (1)

§  Mean distance between collision (between scattering events): l

§  For short-channel devices:

–  The mean distance between collisions, l , may become comparable to L

–  If L < l , then a large fraction of carriers could travel from S to D without

experiencing a scattering event (collision)

à Very fast device (e.g. L < 1 µm, L ≈ 0.1 µm)

§  Ballistic transport:

–  Carriers travel faster than the average drift velocity or saturation velocity

H. J. Lee | EE | KAIST EE362A | Fall 2015 10

 Nonideal Effects Summary

§  Subthreshold conduction (leakage current before VT)

§  Channel length modulation (reverse junction between D and body)

§  Mobility variation (surface scattering)

§  Velocity saturation (At high E-field, mobility saturates à linear

response to VGS and smaller IDsat)

§  Ballistic transport (for short-channel device, no scattering when L <

l)

H. J. Lee | EE | KAIST EE362A | Fall 2015 11

 MOSFET Scaling (1)

§  Driving force for CMOS technology is reduction of

channel length. WHY?
–  As L ê à ID , fT é GOOD!
–  How about other device parameters??

§  “Constant-Field Scaling” Principle:

–  Device dimensions and device voltages are scaled such that E-
fields (both horizontal and vertical) remain essentially constant
(for reliability issue).

H. J. Lee | EE | KAIST EE362A | Fall 2015 12

 MOSFET Scaling (2)

§  L à kL
–  Constant horizontal E-field: voltage must also be scaled
–  Constant vertical E-field: oxide thickness must also be scaled
–  Reduced depletion region width near drain: more doping

k ≈ 0.7 per technology generation

H. J. Lee | EE | KAIST EE362A | Fall 2015 13

 MOSFET Scaling (3)

1) Current at saturation à
µ nεoxW
ID = (VG − VT )2
2tox L
µ t (kW )
→ n ox (kVG − VT )2 k reduced
2(ktox )(kL)

2) Area à WL è k2 Area (reduced)

3) Power à IV è k2IV (reduced)
4) Power density è power/area (remains unchanged!!)
5) Circuit delay(~ CV/I) è k τ (reduced)
Cox → kCox
6) Device density è 1/k2 (increased!)

H. J. Lee | EE | KAIST EE362A | Fall 2015 14

 MOSFET Scaling (4)

§  However, VT scaling is not easy

2ε qNa(2φ fp)
VT = VFB + 2φ fp + ≠ kVT
Cox
Material ∝ k
constant

§  Because of VT and other issues in the ‘standardized’ power supply

levels, circuit voltage does not scale directly with the scaling factor k.
à E-field é
à reliability ê power density é temperature é
à Gate oxide is thinner with increased E-field & closer to
breakdown

H. J. Lee | EE | KAIST EE362A | Fall 2015 15

 VT Modification (1)

§  A reduction in either or both L and W can affect VT

§  1) Short-channel Effects (VT ê as L ê)
–  Long-Channel: Gate controls all the charges in the channel
–  Short-Channel: Only a fraction of charge in the channel region is
controlled by the gate
Only this much is controlled by the gate

Area: (L+L’)/2 Ÿ x

trapezoidal

Shared by drain, xd

<Charge Sharing>
H. J. Lee | EE | KAIST EE362A | Fall 2015 16
 VT Modification (2)

§  At the threshold inversion point,

xs ≈ xd ≈ xdT ≡ xdT

§  The average bulk charge per unit area Q’B in the trapezoidal region
" L + L'%
| Q' B | ⋅L = qNaxdT $ '
# 2 &
§  From the geometry,
( %+
L + L ' * rj "$ 2xdT
= 1− $ 1+ −1''-
2L *) L # rj &-,
§  Then,
( r" %+
j 2x
Q' B = qNaxdT *1− $$ 1+ dT
−1''-
*) L # rj &-,

H. J. Lee | EE | KAIST EE362A | Fall 2015 17

 VT Modification (3)

§  Thus,

tox Very shallow junction

VT = (| Q'SD(max) | −Q'ss ) + φ ms + 2φ fp
ε ox reduces ΔVT

) &,
qNaxdT + rj #% 2xdT
ΔVT = VT ,short − VT ,long = − % 1+ −1((.
Cox +* L $ rj '.-

| Q'SD(max) |= qNaxdT (VT reduced)

Shifted in the
negative direction

H. J. Lee | EE | KAIST EE362A | Fall 2015 18

 VT Modification (4)

§  VT vs. Length

As Na é à VT é, ΔVT é As VDS é à the amount of bulk

charge controlled by the gate
L < 2µm, short channel effect
voltage decreased
becomes significant à VTê

H. J. Lee | EE | KAIST EE362A | Fall 2015 19

 Narrow-Channel Effect (1)

§  2) Narrow (small W), not short (i.e. small L)

–  VT é as W ê

Additional charge controlled

by the gate voltage
current (|Q| increased) à VT
increase

H. J. Lee | EE | KAIST EE362A | Fall 2015 20

 Narrow-Channel Effect (2)

§  Gate-controlled bulk charge

Additional charge controlled

by the gate voltage
current (|Q| increased) à VT
increase
QB = QB0 + ΔQB fitting parameter
q ⋅ Na ⋅ L ⋅ xdT (ξ ⋅ xdT )
π
(Semicircle => ξ = )
2
H. J. Lee | EE | KAIST EE362A | Fall 2015 21
 Narrow-Channel Effect (3)

§  Shift in the positive direction:

qNaxdT ξ xdT
ΔVT =
Cox W

§  VT vs. W

H. J. Lee | EE | KAIST EE362A | Fall 2015 22

 Narrow-Channel Effect (4)

§  For both cases, 3D volume should be encountered:

Short-Channel Narrow-Channel

Less gate charge to Amount of charge to

control due to charge control by gate
sharing! increases!

H. J. Lee | EE | KAIST EE362A | Fall 2015 23

 Additional Electrical Characteristics

§  1) Breakdown voltage:

several breakdown mechanisms

–  Oxide breakdown
–  Avalanche breakdown
–  Snapback breakdown
–  Near punch-through effects

H. J. Lee | EE | KAIST EE362A | Fall 2015 24

 Breakdown Voltage (1)

§  Oxide breakdown:

–  If the E-field in the oxide becomes large enough, breakdown can occur
à catastrophic failure

–  For example,
•  SiO2: The breakdown field ≈ 6 x 106 V/cm
•  Thin oxide, 500 Å à 30 V theoretically
10 V safely (maybe defects)

H. J. Lee | EE | KAIST EE362A | Fall 2015 25

 Breakdown Voltage (2)

§  Avalanche Breakdown

–  By impact ionization in the space charge region near the drain terminal
–  Remember from Chapter 7 (pn),
2
ε sE crit
VB =
2qN B
Function of doping at the low-doped region (i.e. substrate for MOSFET)

–  Example:
•  Na = 3 x 1016 for body, pn junction breakdown is ~25 V.

H. J. Lee | EE | KAIST EE362A | Fall 2015 26

 Breakdown Voltage (3)

§  Avalanche Breakdown

–  E-field is concentration at the curvature!

planar

n+ S/D

cylindrical
spherical junction
E-field is concentrated
at the curvature

H. J. Lee | EE | KAIST EE362A | Fall 2015 27

 Breakdown Voltage (4)

“High VB is preferable”

Plane (rj à∞)

planar VB

1000
Cylindrical
n+ S/D 100 (rj = 0.1 µm)

10
cylindrical
spherical junction 1
1014 1018 Na

(rj = 0.1 µm)

spherical

H. J. Lee | EE | KAIST EE362A | Fall 2015 28

 Breakdown Voltage (5)

§  Snapback breakdown

S-shaped breakdown

H. J. Lee | EE | KAIST EE362A | Fall 2015 29

 Breakdown Voltage (6)

§  Parasitic bipolar

n+-p-n+

H. J. Lee | EE | KAIST EE362A | Fall 2015 30

 Breakdown Voltage (7)

0.6-0.7V

1)  High E-field near drain

Positive feedback

2)  Avalanche breakdown starts

3)  The avalanche-generated holes flow through the substrate to the body terminal à
voltage drop is produced due to non-zero resistance at body

4)  The S-to-substrate pn junction is forward-biased

5)  Electrons in the heavily doped n-type source are injected into the substrate à diffuses
into the drain space charge region

6)  Adds to the ID

H. J. Lee | EE | KAIST EE362A | Fall 2015 31

 Breakdown Voltage (8)

§  The snapback effect can be minimized by using a heavily doped

substrate that will prevent any significant voltage drop from being
developed

H. J. Lee | EE | KAIST EE362A | Fall 2015 32

 Breakdown Voltage (9)

§  Near Punch-through Effects

§  Punch-through:
–  D-to-substrate space charge region extends completely to the S-to-
substrate space charge region
–  à no barrier between S-to-D
–  à a very large ID.

§  However, ID will begin to increase rapidly before the actual punch-
through.
–  à near punch-through or Drain-Induced-Barrier Lowering (DIBL) effect

H. J. Lee | EE | KAIST EE362A | Fall 2015 33

 Breakdown Voltage (10)

§  DIBL effect graphically, Barrier lowering

Large barrier

e-

Long-channel Short-channel

I D ∝ e( potential barrier )
ID rapidly increases

H. J. Lee | EE | KAIST EE362A | Fall 2015 34

 Breakdown Voltage (11)

§  Punch-through: xs + xd = L

S-to-substrate pn D-to-substrate
junction width

§  Near punch-through:

–  significantly less than the ideal
punch-through voltage

<punch-through effect>

H. J. Lee | EE | KAIST EE362A | Fall 2015 35

Any Questions?