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Experiment 6
COUNTER ICs
Objectives
After completing this experiment, you will be able to:
- Implement the decade counters, dual decade counters and presettable 4-bit binary
up/down counter
- Design programmable frequency division.
- Understand the operations of some IC counters.
Materials Needed
- Decimal Counters: IC 74LS90.
- Preset Table 4 bit binary up/down counter: IC 74LS193
- Dual 4-Bit Decade Counter: IC 74LS390
For further investigation:
Materials to be determined by students.
On Tuesdays (Group 1: P1a; Group 2: P1b; Group 3: P2a; Group 4: P2b; Group 5: P3b;
Group 6: P3c)
On Thursdays (Group 1: P1a; Group 2: P1b; Group 3: P2a; Group 4: P2b; Group 5: P3)
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COMPUTER SCIENCE & ENGINEERING Counter ICs
Procedures
Figure 1: IC 74LS90
IC 74LS90 contains a divide-by-two counter and a divide-by-five counter. Each counter
can be used separately or tied together (QA to input B) to form BCD counter. 74LS90 have
2 Master Reset inputs (R0(1), R0(2)) and 2 Master Set inputs (R9(1), R9(2)).
a. Implement BCD counter
14 12
CLOCK CLKA QA
1 9
CLKB QB 8
2 QC 11
3 R01 QD
6 R02 BCD TO 7-SEGMENT DISPLAY
7 R91
SW 1,2,3,4 R92
74LS90
- Connect QA to CLKB
- Connect R01, R02, R91, R92 to switches for controlling operations
- Connect outputs (QA, QB, QC, QD) to BCD to 7-segment display block
b. Use an extra IC 74LS00 and wire them as a MOD-7 counter (counting from 0 to 6)
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COMPUTER SCIENCE & ENGINEERING Counter ICs
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COMPUTER SCIENCE & ENGINEERING Counter ICs
U1A
CLOCK 1 3
4 CKA QA 5
CKB QB 6
SW 2 QC 7
CLR QD BCD TO 7 SEGMENT DISPLAY
74LS390
U1B
15 13
12 CKA QA 11
CKB QB 10
SW 14 QC 9
CLR QD BCD TO 7 SEGMENT DISPLAY
74LS390
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COMPUTER SCIENCE & ENGINEERING Counter ICs
- Show the way to design:
f(C,B,A) = CBA(1,3,5,6)
Figure 8: 74LS193
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COMPUTER SCIENCE & ENGINEERING Counter ICs
a. The function of each input and output
- The outputs QA, QB, QC, QD and CO , BO are connected to Led display as Figure 9.
- The inputs are connected to switches. Set P3P2P1P0 are equal to 0000 respectively.
- 1Hz clock is used for COUNT UP (CLKU) and COUNT DOWN (CLKD)
74LS193
SW0 15
P0
U1
Q0
3
SW1 1
P1 Q1
2
SW2 10
P2 Q2
6
SW3 9
P3 Q3
7
4 13
5 CLKD BO 12
CLKU CO
SW4 14
CLR
SW5 11
LOAD 0
CL
LOAD UP DOWN FUNCTION
R
0 1 CLK 1
0 1 1 CLK
0 10 X X
0
1 X X
1
0 1 1 1
Table 1
Let the circuit count up and down. What is the output state of CO and BO ?
b. Programmable up counters
Design a counter count up from 0100 to 1111
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COMPUTER SCIENCE & ENGINEERING Counter ICs
Build the circuit
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COMPUTER SCIENCE & ENGINEERING Counter ICs
Counter count down from 1101 to 0000
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