Assignment# 1 (Version 1)

COMSATS INSTITUTE OF INFORMATION TECHNOLOGY

Islamabad campus
Department of Electrical and Computer Engineering

Course title: Digital System Design (EEE344)

Assignment: 1st
Course Instructor: Dr. Omair Inam
Date: handed out: 22/March/2023
Submission: Due date: 29/March/2023
Total Marks: 70

Q#1:

a) Design 5 to 32 decoder using 2 to 4 decoders.

b) Design 4-bit comparator using Full adder?
c) Design 8-to-3-line priority Encoder using 4 to 2 encoders?

Q#2: A six-input CMOS AND gate can be constructed using 2 three-input AND gates and a two-
input AND gate. This approach requires 22 transistors. Show how you can use only CMOS NAND
and NOR gates to build the six-input AND gate and then calculate the number of transistors
needed.

Q#3: Convert the decimal numbers 73, 1906, −95, and −1630 into signed 12-bit numbers in the
following representations:
a) Sign and magnitude
b) 1’s complement
c) 2’s complement

Q#4: Figure-I shows a 4-bit ripple carry adder realized using full adders and Figure II shows the
circuit of a full-adder (FA). The propagation delay of the XOR, AND and OR gates in Figure II are
20 ns, 15 ns and 10 ns, respectively. Assume all the inputs to the 4-bit adder are initially reset to
0.

At t= 0, the inputs to the 4-bit adder are changed to X3X2X1X0=1110, Y3Y2Y1Y0=0101 and Z0=1.
The output of the ripple carry adder will be stable at t (in ns) = ??