FSM Description

Pinit Kumhom

vLSI Design for embedded Systems with intelligence (vDeSi) Lab

Department of Electronic and Telecommunication Engineering
Faculty of Engineering

King Mongkut’s University of Technology Thonburi

March 9, 2017

Pinit Kumhom (vDeSi Lab, KMUTT) FSM Description March 9, 2017 1 / 16

Outline

1 Finite State Machine (FSM) Behavior

What is FSM?
State Table
State Diagram
Algorithmic Sequential Machine (ASM) Chart

2 FSM Structure
FSM Entity
FSM Structure

Pinit Kumhom (vDeSi Lab, KMUTT) FSM Description March 9, 2017 2 / 16

Outline

1 Finite State Machine (FSM) Behavior

What is FSM?
State Table
State Diagram
Algorithmic Sequential Machine (ASM) Chart

2 FSM Structure
FSM Entity
FSM Structure

Pinit Kumhom (vDeSi Lab, KMUTT) FSM Description March 9, 2017 3 / 16

Finite State Machine (FSM) is a model for describing a sequence of works of a
sequential system...

It has finite states

Each state represents work (process) that produces outputs based
on current state and inputs
▶ Moore-type outputs depends only on the present state (PS)
▶ Mealy-type outputs depends on both present state and current
inputs
At a present state and under the current input conditions, the
machine transition to another state to perform the other works
▶ For a synchronous FSM, a clock signal is used to synchronize each
transition
▶ For an asynchronous FSM, a transition occurs only when input
conditions is right

Pinit Kumhom (vDeSi Lab, KMUTT) FSM Description March 9, 2017 4 / 16

Outline

1 Finite State Machine (FSM) Behavior

What is FSM?
State Table
State Diagram
Algorithmic Sequential Machine (ASM) Chart

2 FSM Structure
FSM Entity
FSM Structure

Pinit Kumhom (vDeSi Lab, KMUTT) FSM Description March 9, 2017 5 / 16

A kind of table called state table can be used to describe a FSM’s behavior...

Present State Input: a Moore-type (1) state_reg is the

state_reg 0 1 z present state signal
S0 S0, 0 S1, 0 0 (2) state_next is the
S1 S2, 0 S1, 0 0 next state signal
S2 S3, 0 S1, 0 0 (3) a is a 1-bit input signal
S3 S0, 0 S1, 1 1 (4) y is the Mealy-type out-
Next State, Mealy-type put signal
state_next, y (5) z is the Moore-type
output signal

1st column stores the Present state (PS)

Remainder columns store Next State and Mealy-type output under
a specific input value
Last column stores Moore-type outputs

Pinit Kumhom (vDeSi Lab, KMUTT) FSM Description March 9, 2017 6 / 16

Outline

1 Finite State Machine (FSM) Behavior

What is FSM?
State Table
State Diagram
Algorithmic Sequential Machine (ASM) Chart

2 FSM Structure
FSM Entity
FSM Structure

Pinit Kumhom (vDeSi Lab, KMUTT) FSM Description March 9, 2017 7 / 16

Another way to describe FSM’s behavior is to use a directed graph called state
diagram...

Pinit Kumhom (vDeSi Lab, KMUTT) FSM Description March 9, 2017 8 / 16

In a state diagram, a state is denoted by a vertex or node while a state
transition is denoted by an edge or link...

Pinit Kumhom (vDeSi Lab, KMUTT) FSM Description March 9, 2017 9 / 16

Outline

1 Finite State Machine (FSM) Behavior

What is FSM?
State Table
State Diagram
Algorithmic Sequential Machine (ASM) Chart

2 FSM Structure
FSM Entity
FSM Structure

Pinit Kumhom (vDeSi Lab, KMUTT) FSM Description March 9, 2017 10 / 16

Another way to describe FSM’s behavior is to use so called Algorithmic
Sequential Machine (ASM) chart...

Pinit Kumhom (vDeSi Lab, KMUTT) FSM Description March 9, 2017 11 / 16

In ASM chart, there are 3 kinds of blocks: (1) a rectangle for the state block
where Moore-type outputs are assigned, (2) hexagons for Boolean-type
conditions, and (3) round rectangles for coditional (Mealy-type) outputs...

(1) There is single entry

point
(2) The single rectangle
block is required
(3) Use a chain of
Boolean-type con-
ditions for multiple
leaving points
(4) No loop inside a state

Pinit Kumhom (vDeSi Lab, KMUTT) FSM Description March 9, 2017 12 / 16

Outline

1 Finite State Machine (FSM) Behavior

What is FSM?
State Table
State Diagram
Algorithmic Sequential Machine (ASM) Chart

2 FSM Structure
FSM Entity
FSM Structure

Pinit Kumhom (vDeSi Lab, KMUTT) FSM Description March 9, 2017 13 / 16

Before describing a FSM using state diagram or ASM chart or state table, one
needs to clearly define its input and output signals including the clock and
reset signals...

Pinit Kumhom (vDeSi Lab, KMUTT) FSM Description March 9, 2017 14 / 16

Outline

1 Finite State Machine (FSM) Behavior

What is FSM?
State Table
State Diagram
Algorithmic Sequential Machine (ASM) Chart

2 FSM Structure
FSM Entity
FSM Structure

Pinit Kumhom (vDeSi Lab, KMUTT) FSM Description March 9, 2017 15 / 16

Any FSM entity can be decomposed into 3 functional blocks: (1) the (state)
register block, (2) the next-state logic block, and (3) the output-logic block...

Pinit Kumhom (vDeSi Lab, KMUTT) FSM Description March 9, 2017 16 / 16